summaryrefslogtreecommitdiffstats
path: root/arch/arm/cpu/armv7/mx5/soc.c
diff options
context:
space:
mode:
authorLiu Hui-R64343 <r64343@freescale.com>2011-01-03 22:27:35 +0000
committerAlbert Aribaud <albert.aribaud@free.fr>2011-02-02 00:54:41 +0100
commit595f3e56459797d70e842bce93d0dd01455a329f (patch)
treeb15d85a465ce3460a2532e1e39767d72da97a865 /arch/arm/cpu/armv7/mx5/soc.c
parent877eb0f91543dc5bca385bb6d22454b1d43f3e2d (diff)
downloadbootable_bootloader_goldelico_gta04-595f3e56459797d70e842bce93d0dd01455a329f.zip
bootable_bootloader_goldelico_gta04-595f3e56459797d70e842bce93d0dd01455a329f.tar.gz
bootable_bootloader_goldelico_gta04-595f3e56459797d70e842bce93d0dd01455a329f.tar.bz2
MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx5/soc.c')
-rw-r--r--arch/arm/cpu/armv7/mx5/soc.c22
1 files changed, 17 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 2900119..09500b3 100644
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -33,17 +33,20 @@
#include <fsl_esdhc.h>
#endif
-#if defined(CONFIG_MX51)
-#define CPU_TYPE 0x51000
-#else
+#if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
#error "CPU_TYPE not defined"
#endif
u32 get_cpu_rev(void)
{
- int system_rev = CPU_TYPE;
+#ifdef CONFIG_MX51
+ int system_rev = 0x51000;
+#else
+ int system_rev = 0x53000;
+#endif
int reg = __raw_readl(ROM_SI_REV);
+#if defined(CONFIG_MX51)
switch (reg) {
case 0x02:
system_rev |= CHIP_REV_1_1;
@@ -57,11 +60,20 @@ u32 get_cpu_rev(void)
case 0x20:
system_rev |= CHIP_REV_3_0;
break;
- return system_rev;
default:
system_rev |= CHIP_REV_1_0;
break;
}
+#else
+ switch (reg) {
+ case 0x20:
+ system_rev |= CHIP_REV_2_0;
+ break;
+ default:
+ system_rev |= CHIP_REV_1_0;
+ break;
+ }
+#endif
return system_rev;
}