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author | wdenk <wdenk> | 2004-02-12 00:47:09 +0000 |
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committer | wdenk <wdenk> | 2004-02-12 00:47:09 +0000 |
commit | bf9e3b38f77c2eac620263dd60437c6ec47a27bf (patch) | |
tree | d03891090553d167f3eb08d7f9c3f2532e43fcc2 /board/eltec/bab7xx | |
parent | a2d18bb7d31e7b971386fef505ff0218f3b6e893 (diff) | |
download | bootable_bootloader_goldelico_gta04-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.zip bootable_bootloader_goldelico_gta04-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.tar.gz bootable_bootloader_goldelico_gta04-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.tar.bz2 |
* Some code cleanup
* Patch by Josef Baumgartner, 10 Feb 2004:
Fixes for Coldfire port
* Patch by Brad Kemp, 11 Feb 2004:
Fix CFI flash driver problems
Diffstat (limited to 'board/eltec/bab7xx')
-rw-r--r-- | board/eltec/bab7xx/bab7xx.c | 195 |
1 files changed, 97 insertions, 98 deletions
diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index c75137a..fc48ed5 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -37,17 +37,18 @@ */ ulong bab7xx_get_bus_freq (void) { - /* - * The GPIO Port 1 on BAB7xx reflects the bus speed. - */ - volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE); + /* + * The GPIO Port 1 on BAB7xx reflects the bus speed. + */ + volatile struct GPIO *gpio = + (struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE); - unsigned char data = gpio->dta1; + unsigned char data = gpio->dta1; - if (data & 0x02) - return 66666666; + if (data & 0x02) + return 66666666; - return 83333333; + return 83333333; } /*---------------------------------------------------------------------------*/ @@ -57,24 +58,26 @@ ulong bab7xx_get_bus_freq (void) */ ulong bab7xx_get_gclk_freq (void) { - static const int pllratio_to_factor[] = { - 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00, - }; + static const int pllratio_to_factor[] = { + 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, + 00, + }; - return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10); + return pllratio_to_factor[get_hid1 () >> 28] * + (bab7xx_get_bus_freq () / 10); } /*----------------------------------------------------------------------------*/ int checkcpu (void) { - uint pvr = get_pvr(); + uint pvr = get_pvr (); - printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF); - printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); + printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF); + printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000, + bab7xx_get_bus_freq () / 1000000); - return (0); + return (0); } /* ------------------------------------------------------------------------- */ @@ -82,20 +85,20 @@ int checkcpu (void) int checkboard (void) { #ifdef CFG_ADDRESS_MAP_A - puts ("Board: ELTEC BAB7xx PReP\n"); + puts ("Board: ELTEC BAB7xx PReP\n"); #else - puts ("Board: ELTEC BAB7xx CHRP\n"); + puts ("Board: ELTEC BAB7xx CHRP\n"); #endif - return (0); + return (0); } /* ------------------------------------------------------------------------- */ int checkflash (void) { - /* TODO: XXX XXX XXX */ - printf ("2 MB ## Test not implemented yet ##\n"); - return (0); + /* TODO: XXX XXX XXX */ + printf ("2 MB ## Test not implemented yet ##\n"); + return (0); } /* ------------------------------------------------------------------------- */ @@ -103,77 +106,75 @@ int checkflash (void) static unsigned int mpc106_read_cfg_dword (unsigned int reg) { - unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); + unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); - out32r(MPC106_REG_ADDR, reg_addr); + out32r (MPC106_REG_ADDR, reg_addr); - return (in32r(MPC106_REG_DATA | (reg & 0x3))); + return (in32r (MPC106_REG_DATA | (reg & 0x3))); } /* ------------------------------------------------------------------------- */ long int dram_size (int board_type) { - /* No actual initialisation to do - done when setting up - * PICRs MCCRs ME/SARs etc in ram_init.S. - */ + /* No actual initialisation to do - done when setting up + * PICRs MCCRs ME/SARs etc in ram_init.S. + */ - register unsigned long i, msar1, mear1, memSize; + register unsigned long i, msar1, mear1, memSize; #if defined(CFG_MEMTEST) - register unsigned long reg; + register unsigned long reg; - printf("Testing DRAM\n"); + printf ("Testing DRAM\n"); - /* write each mem addr with it's address */ - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - *reg = reg; + /* write each mem addr with it's address */ + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) + *reg = reg; - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - { - if (*reg != reg) - return -1; - } + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) { + if (*reg != reg) + return -1; + } #endif - /* - * Since MPC106 memory controller chip has already been set to - * control all memory, just read and interpret its memory boundery register. - */ - memSize = 0; - msar1 = mpc106_read_cfg_dword(MPC106_MSAR1); - mear1 = mpc106_read_cfg_dword(MPC106_MEAR1); - i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf; - - do - { - if (i & 0x01) /* is bank enabled ? */ - memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; - msar1 >>= 8; - mear1 >>= 8; - i >>= 1; - } while (i); - - return (memSize * 0x100000); + /* + * Since MPC106 memory controller chip has already been set to + * control all memory, just read and interpret its memory boundery register. + */ + memSize = 0; + msar1 = mpc106_read_cfg_dword (MPC106_MSAR1); + mear1 = mpc106_read_cfg_dword (MPC106_MEAR1); + i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf; + + do { + if (i & 0x01) /* is bank enabled ? */ + memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; + msar1 >>= 8; + mear1 >>= 8; + i >>= 1; + } while (i); + + return (memSize * 0x100000); } /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +long int initdram (int board_type) { - return dram_size(board_type); + return dram_size (board_type); } /* ------------------------------------------------------------------------- */ void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; + DECLARE_GLOBAL_DATA_PTR; - /* - * Jump to the main U-Boot board init code - */ - board_init_r((gd_t *)gd, dest_addr); + /* + * Jump to the main U-Boot board init code + */ + board_init_r ((gd_t *) gd, dest_addr); } /* ------------------------------------------------------------------------- */ @@ -182,14 +183,13 @@ void after_reloc (ulong dest_addr) * do_reset is done here because in this case it is board specific, since the * 7xx CPUs can only be reset by external HW (the RTC in this case). */ -void -do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { #if defined(CONFIG_RTC_MK48T59) - /* trigger watchdog immediately */ - rtc_set_watchdog(1, RTC_WD_RB_16TH); + /* trigger watchdog immediately */ + rtc_set_watchdog (1, RTC_WD_RB_16TH); #else - #error "You must define the macro CONFIG_RTC_MK48T59." +#error "You must define the macro CONFIG_RTC_MK48T59." #endif } @@ -200,16 +200,16 @@ do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) * Since the 7xx CPUs don't have an internal watchdog, this function is * board specific. We use the RTC here. */ -void watchdog_reset(void) +void watchdog_reset (void) { #if defined(CONFIG_RTC_MK48T59) - /* we use a 32 sec watchdog timer */ - rtc_set_watchdog(8, RTC_WD_RB_4); + /* we use a 32 sec watchdog timer */ + rtc_set_watchdog (8, RTC_WD_RB_4); #else - #error "You must define the macro CONFIG_RTC_MK48T59." +#error "You must define the macro CONFIG_RTC_MK48T59." #endif } -#endif /* CONFIG_WATCHDOG */ +#endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ @@ -218,29 +218,28 @@ extern GraphicDevice smi; void video_get_info_str (int line_number, char *info) { - /* init video info strings for graphic console */ - switch (line_number) - { - case 1: - sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz", - (get_pvr() >> 8) & 0xFF, - get_pvr() & 0xFF, - bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); + /* init video info strings for graphic console */ + switch (line_number) { + case 1: + sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz", + (get_pvr () >> 8) & 0xFF, + get_pvr () & 0xFF, + bab7xx_get_gclk_freq () / 1000000, + bab7xx_get_bus_freq () / 1000000); + return; + case 2: + sprintf (info, + " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", + dram_size (0) / 0x100000, flash_init () / 0x100000); + return; + case 3: + sprintf (info, " %s", smi.modeIdent); + return; + } + + /* no more info lines */ + *info = 0; return; - case 2: - sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", - dram_size(0)/0x100000, - flash_init()/0x100000); - return; - case 3: - sprintf (info, " %s", smi.modeIdent); - return; - } - - /* no more info lines */ - *info = 0; - return; } #endif |