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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mpc85xx/tlb.c | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mpc85xx/tlb.c')
-rw-r--r-- | cpu/mpc85xx/tlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 7ce7a14..a2d16ae 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -138,7 +138,7 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) * Starting at TLB1 8, use no more than 8 TLB1 entries. */ ram_tlb_index = 8; - ram_tlb_address = (unsigned int)CFG_DDR_SDRAM_BASE; + ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE; while (ram_tlb_address < (memsize_in_meg * 1024 * 1024) && ram_tlb_index < 16) { set_tlb(1, ram_tlb_address, ram_tlb_address, |