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author | Kumar Gala <galak@kernel.crashing.org> | 2008-06-09 11:07:46 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2008-08-27 11:43:48 -0500 |
commit | 6fb1b7346849ccd0c20306143e334f5b76143070 (patch) | |
tree | 320b50edcc6655272ed8d5deb2818d370a076609 /cpu/mpc85xx/tlb.c | |
parent | b5710d9974f6f0f3ddb4e67d6cccc262ab37049e (diff) | |
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FSL DDR: Add e500 TLB helper for DDR code
Provide a helper function that board code can call to map TLBs when
setting up DDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/tlb.c')
-rw-r--r-- | cpu/mpc85xx/tlb.c | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 3d15d50..7ce7a14 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -90,3 +90,67 @@ void init_tlbs(void) return ; } + +unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) +{ + unsigned int tlb_size; + unsigned int ram_tlb_index; + unsigned int ram_tlb_address; + + /* + * Determine size of each TLB1 entry. + */ + switch (memsize_in_meg) { + case 16: + case 32: + tlb_size = BOOKE_PAGESZ_16M; + break; + case 64: + case 128: + tlb_size = BOOKE_PAGESZ_64M; + break; + case 256: + case 512: + tlb_size = BOOKE_PAGESZ_256M; + break; + case 1024: + case 2048: + if (PVR_VER(get_pvr()) > PVR_VER(PVR_85xx)) + tlb_size = BOOKE_PAGESZ_1G; + else + tlb_size = BOOKE_PAGESZ_256M; + break; + default: + puts("DDR: only 16M, 32M, 64M, 128M, 256M, 512M, 1G" + " and 2G are supported.\n"); + + /* + * The memory was not able to be mapped. + * Default to a small size. + */ + tlb_size = BOOKE_PAGESZ_64M; + memsize_in_meg = 64; + break; + } + + /* + * Configure DDR TLB1 entries. + * Starting at TLB1 8, use no more than 8 TLB1 entries. + */ + ram_tlb_index = 8; + ram_tlb_address = (unsigned int)CFG_DDR_SDRAM_BASE; + while (ram_tlb_address < (memsize_in_meg * 1024 * 1024) + && ram_tlb_index < 16) { + set_tlb(1, ram_tlb_address, ram_tlb_address, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, ram_tlb_index, tlb_size, 1); + + ram_tlb_address += (0x1000 << ((tlb_size - 1) * 2)); + ram_tlb_index++; + } + + /* + * Confirm that the requested amount of memory was mapped. + */ + return memsize_in_meg; +} |