diff options
author | Stefan Roese <sr@denx.de> | 2007-02-20 10:57:08 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-02-20 10:57:08 +0100 |
commit | 4745acaa1a603b67f6b9b7970365ebadd7d6586f (patch) | |
tree | c7b1c441280494f2529745d79980174ba2d945df /cpu | |
parent | 0dc018ece13effc689e47479ea9ebf1c98a507f5 (diff) | |
download | bootable_bootloader_goldelico_gta04-4745acaa1a603b67f6b9b7970365ebadd7d6586f.zip bootable_bootloader_goldelico_gta04-4745acaa1a603b67f6b9b7970365ebadd7d6586f.tar.gz bootable_bootloader_goldelico_gta04-4745acaa1a603b67f6b9b7970365ebadd7d6586f.tar.bz2 |
[PATCH] Add support for the AMCC Katmai (440SPe) eval board
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/ppc4xx/cpu_init.c | 2 | ||||
-rw-r--r-- | cpu/ppc4xx/speed.c | 13 | ||||
-rw-r--r-- | cpu/ppc4xx/start.S | 57 |
3 files changed, 64 insertions, 8 deletions
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index ae24591..82ae443 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -314,7 +314,7 @@ cpu_init_f (void) #endif #if defined (CFG_EBC_CFG) - mtebc(epcr, CFG_EBC_CFG); + mtebc(EBC0_CFG, CFG_EBC_CFG); #endif #if defined(CONFIG_WATCHDOG) diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c index 2d16a83..06220c3 100644 --- a/cpu/ppc4xx/speed.c +++ b/cpu/ppc4xx/speed.c @@ -331,7 +331,7 @@ void get_sys_info (sys_info_t * sysInfo) unsigned long m; unsigned long prbdv0; -#if defined(CONFIG_440SPE) +#if defined(CONFIG_YUCCA) unsigned long sys_freq; unsigned long sys_per=0; unsigned long msr; @@ -348,7 +348,7 @@ void get_sys_info (sys_info_t * sysInfo) /*-------------------------------------------------------------------------+ | Calculate the system clock speed from the period. +-------------------------------------------------------------------------*/ - sys_freq=(ONE_BILLION/sys_per)*1000; + sys_freq = (ONE_BILLION / sys_per) * 1000; #endif /* Extract configured divisors */ @@ -385,17 +385,17 @@ void get_sys_info (sys_info_t * sysInfo) m = sysInfo->pllExtBusDiv * sysInfo->pllOpbDiv * sysInfo->pllFwdDivB; /* Now calculate the individual clocks */ -#if defined(CONFIG_440SPE) +#if defined(CONFIG_YUCCA) sysInfo->freqVCOMhz = (m * sys_freq) ; #else - sysInfo->freqVCOMhz = (m * CONFIG_SYS_CLK_FREQ) + (m>>1); + sysInfo->freqVCOMhz = (m * CONFIG_SYS_CLK_FREQ) + (m >> 1); #endif sysInfo->freqProcessor = sysInfo->freqVCOMhz/sysInfo->pllFwdDivA; sysInfo->freqPLB = sysInfo->freqVCOMhz/sysInfo->pllFwdDivB/prbdv0; sysInfo->freqOPB = sysInfo->freqPLB/sysInfo->pllOpbDiv; sysInfo->freqEPB = sysInfo->freqOPB/sysInfo->pllExtBusDiv; -#if defined(CONFIG_440SPE) +#if defined(CONFIG_YUCCA) /* Determine PCI Clock Period */ pci_clock_per = determine_pci_clock_per(); sysInfo->freqPCI = (ONE_BILLION/pci_clock_per) * 1000; @@ -408,7 +408,7 @@ void get_sys_info (sys_info_t * sysInfo) #endif -#if defined(CONFIG_440SPE) +#if defined(CONFIG_YUCCA) unsigned long determine_sysper(void) { unsigned int fpga_clocking_reg; @@ -583,7 +583,6 @@ unsigned long determine_sysper(void) } return(sys_per); - } /*-------------------------------------------------------------------------+ diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 8e000d3..a3db93f 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1856,3 +1856,60 @@ pll_wait: /* execution will continue from the poweron */ /* vector of 0xfffffffc */ #endif /* CONFIG_405EP */ + +#if defined(CONFIG_440) +#define function_prolog(func_name) .text; \ + .align 2; \ + .globl func_name; \ + func_name: +#define function_epilog(func_name) .type func_name,@function; \ + .size func_name,.-func_name + +/*----------------------------------------------------------------------------+ +| mttlb3. ++----------------------------------------------------------------------------*/ + function_prolog(mttlb3) + TLBWE(4,3,2) + blr + function_epilog(mttlb3) + +/*----------------------------------------------------------------------------+ +| mftlb3. ++----------------------------------------------------------------------------*/ + function_prolog(mftlb3) + TLBRE(3,3,2) + blr + function_epilog(mftlb3) + +/*----------------------------------------------------------------------------+ +| mttlb2. ++----------------------------------------------------------------------------*/ + function_prolog(mttlb2) + TLBWE(4,3,1) + blr + function_epilog(mttlb2) + +/*----------------------------------------------------------------------------+ +| mftlb2. ++----------------------------------------------------------------------------*/ + function_prolog(mftlb2) + TLBRE(3,3,1) + blr + function_epilog(mftlb2) + +/*----------------------------------------------------------------------------+ +| mttlb1. ++----------------------------------------------------------------------------*/ + function_prolog(mttlb1) + TLBWE(4,3,0) + blr + function_epilog(mttlb1) + +/*----------------------------------------------------------------------------+ +| mftlb1. ++----------------------------------------------------------------------------*/ + function_prolog(mftlb1) + TLBRE(3,3,0) + blr + function_epilog(mftlb1) +#endif /* CONFIG_440 */ |