ColdFire: Modules header files cleanup

Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

1 files changed, 0 insertions, 13 deletions

diff --git a/include/asm-m68k/m5249.h b/include/asm-m68k/m5249.h
index feb675c..fa0cb14 100644
--- a/include/asm-m68k/m5249.h
+++ b/include/asm-m68k/m5249.h
@@ -77,19 +77,6 @@
 #define MCFSIM_IPR		0x40	/* Interrupt Pend reg (r/w) */
 #define MCFSIM_IMR		0x44	/* Interrupt Mask reg (r/w) */
 
-#define MCFSIM_CSAR0		0x80	/* CS 0 Address 0 reg (r/w) */
-#define MCFSIM_CSMR0		0x84	/* CS 0 Mask 0 reg (r/w) */
-#define MCFSIM_CSCR0		0x8a	/* CS 0 Control reg (r/w) */
-#define MCFSIM_CSAR1		0x8c	/* CS 1 Address reg (r/w) */
-#define MCFSIM_CSMR1		0x90	/* CS 1 Mask reg (r/w) */
-#define MCFSIM_CSCR1		0x96	/* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2		0x98	/* CS 2 Address reg (r/w) */
-#define MCFSIM_CSMR2		0x9c	/* CS 2 Mask reg (r/w) */
-#define MCFSIM_CSCR2		0xa2	/* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3		0xa4	/* CS 3 Address reg (r/w) */
-#define MCFSIM_CSMR3		0xa8	/* CS 3 Mask reg (r/w) */
-#define MCFSIM_CSCR3		0xae	/* CS 3 Control reg (r/w) */
-
 #define MCFSIM_DCR		0x100	/* DRAM Control reg (r/w) */
 #define MCFSIM_DACR0		0x108	/* DRAM 0 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR0		0x10c	/* DRAM 0 Mask reg (r/w) */