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author | roy zang <tie-fei.zang@freescale.com> | 2006-11-02 19:08:55 +0800 |
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committer | Zang Tiefei <roy@bus.ap.freescale.net> | 2006-11-02 19:08:55 +0800 |
commit | d1927cee977126e547ceeba23e4f978f377cfb8f (patch) | |
tree | 45a645492966b0371ff9a713a7182f53c547c0f8 /net | |
parent | 78aa0c3427f3ecdeb34aabfbbe2dd23b6ad8f40e (diff) | |
download | bootable_bootloader_goldelico_gta04-d1927cee977126e547ceeba23e4f978f377cfb8f.zip bootable_bootloader_goldelico_gta04-d1927cee977126e547ceeba23e4f978f377cfb8f.tar.gz bootable_bootloader_goldelico_gta04-d1927cee977126e547ceeba23e4f978f377cfb8f.tar.bz2 |
Tundra tsi108 on chip Ethernet controller support.
The following is a brief description of the Ethernet controller:
The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
Gigabit Ethernet ports,E0 and E1. It uses a single Management interface
to manage the two physical connection devices (PHYs). Each Ethernet port
has its own statistics monitor that tracks and reports key interface
statistics. Each port supports a 256-entry hash table for address
filtering. In addition, each port is bridged to the Switch Fabric
through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
Each Ethernet port also has a pair of internal Ethernet DMA channels to
support the transmit and receive data flows. The Ethernet DMA channels
use descriptors set up in memory, the memory map of the device, and
access via the Switch Fabric. The Ethernet Controller?s DMA arbiter
handles arbitration for the Switch Fabric. The Controller also
has a register businterface for register accesses and status monitor
control.
The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
modes. The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
The GMII and TBI modes are used to connect with Gigabit PMDs. Internal
data flows to and from the Ethernet Controller through the Switch Fabric.
Each Ethernet port uses its transmit and receive DMA channels to manage
data flows through buffer descriptors that are predefined by the
system (the descriptors can exist anywhere in the system memory map).
These descriptors are data structures that point to buffers filled
with data ready to transmit over Ethernet, or they point to empty
buffers ready to receive data from Ethernet.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Diffstat (limited to 'net')
-rw-r--r-- | net/eth.c | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -52,6 +52,7 @@ extern int rtl8139_initialize(bd_t*); extern int rtl8169_initialize(bd_t*); extern int scc_initialize(bd_t*); extern int skge_initialize(bd_t*); +extern int tsi108_eth_initialize(bd_t*); extern int tsec_initialize(bd_t*, int, char *); extern int npe_initialize(bd_t *); @@ -245,6 +246,9 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_NS8382X ns8382x_initialize(bis); #endif +#if defined(CONFIG_TSI108_ETH) + tsi108_eth_initialize(bis); +#endif #if defined(CONFIG_RTL8139) rtl8139_initialize(bis); #endif |