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author | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
commit | 92988a21ad4c4c9504295ccb580c9f806134471b (patch) | |
tree | 5effc9f14170112450de05c67dafbe8d5034d595 /u-boot/board/cpu86/cpu86.h | |
parent | ca2b506783b676c95762c54ea24dcfdaae1947c9 (diff) | |
download | bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.zip bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.gz bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.bz2 |
added boot script files to repository
Diffstat (limited to 'u-boot/board/cpu86/cpu86.h')
-rw-r--r-- | u-boot/board/cpu86/cpu86.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/u-boot/board/cpu86/cpu86.h b/u-boot/board/cpu86/cpu86.h new file mode 100644 index 0000000..ca0c39f --- /dev/null +++ b/u-boot/board/cpu86/cpu86.h @@ -0,0 +1,27 @@ +#ifndef __BOARD_CPU86__ +#define __BOARD_CPU86__ + +#include <config.h> + +#define REG8(x) (*(volatile unsigned char *)(x)) + +/* CPU86 register definitions */ +#define CPU86_VME_EAC REG8(CONFIG_SYS_BCRS_BASE + 0x00) +#define CPU86_VME_SAC REG8(CONFIG_SYS_BCRS_BASE + 0x01) +#define CPU86_VME_MAC REG8(CONFIG_SYS_BCRS_BASE + 0x02) +#define CPU86_BCR REG8(CONFIG_SYS_BCRS_BASE + 0x03) +#define CPU86_BSR REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_WDOG_RPORT REG8(CONFIG_SYS_BCRS_BASE + 0x05) +#define CPU86_MBOX_IRQ REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_REV REG8(CONFIG_SYS_BCRS_BASE + 0x07) +#define CPU86_VME_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x80) +#define CPU86_VME_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x81) +#define CPU86_LOCAL_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x82) +#define CPU86_LOCAL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x83) +#define CPU86_PMCL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x84) + +/* Board Control Register bits */ +#define CPU86_BCR_FWPT 0x01 +#define CPU86_BCR_FWRE 0x02 + +#endif /* __BOARD_CPU86__ */ |