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author | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
commit | 92988a21ad4c4c9504295ccb580c9f806134471b (patch) | |
tree | 5effc9f14170112450de05c67dafbe8d5034d595 /u-boot/board/esd/vom405 | |
parent | ca2b506783b676c95762c54ea24dcfdaae1947c9 (diff) | |
download | bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.zip bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.gz bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.bz2 |
added boot script files to repository
Diffstat (limited to 'u-boot/board/esd/vom405')
-rw-r--r-- | u-boot/board/esd/vom405/Makefile | 58 | ||||
-rw-r--r-- | u-boot/board/esd/vom405/flash.c | 101 | ||||
-rw-r--r-- | u-boot/board/esd/vom405/vom405.c | 164 |
3 files changed, 323 insertions, 0 deletions
diff --git a/u-boot/board/esd/vom405/Makefile b/u-boot/board/esd/vom405/Makefile new file mode 100644 index 0000000..d4012b0 --- /dev/null +++ b/u-boot/board/esd/vom405/Makefile @@ -0,0 +1,58 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common/xilinx_jtag) +endif + +LIB = $(obj)lib$(BOARD).o + +# Objects for Xilinx JTAG programming (CPLD) +CPLD = ../common/xilinx_jtag/lenval.o \ + ../common/xilinx_jtag/micro.o \ + ../common/xilinx_jtag/ports.o + +COBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD) + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/u-boot/board/esd/vom405/flash.c b/u-boot/board/esd/vom405/flash.c new file mode 100644 index 0000000..895a836 --- /dev/null +++ b/u-boot/board/esd/vom405/flash.c @@ -0,0 +1,101 @@ +/* + * (C) Copyright 2001 + * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/ppc4xx.h> +#include <asm/processor.h> + +/* + * include common flash code (for esd boards) + */ +#include "../common/flash.c" + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (vu_long * addr, flash_info_t * info); +static void flash_get_offsets (ulong base, flash_info_t * info); + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + unsigned long size_b0; + int i; + uint pbcr; + unsigned long base_b0; + int size_val = 0; + + /* Init: no FLASHes known */ + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + flash_info[i].flash_id = FLASH_UNKNOWN; + } + + /* Static FLASH Bank configuration here - FIXME XXX */ + + size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); + + if (flash_info[0].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0<<20); + } + + /* Setup offsets */ + flash_get_offsets (-size_b0, &flash_info[0]); + + /* Re-do sizing to get full correct info */ + mtdcr(EBC0_CFGADDR, PB0CR); + pbcr = mfdcr(EBC0_CFGDATA); + mtdcr(EBC0_CFGADDR, PB0CR); + base_b0 = -size_b0; + switch (size_b0) { + case 1 << 20: + size_val = 0; + break; + case 2 << 20: + size_val = 1; + break; + case 4 << 20: + size_val = 2; + break; + case 8 << 20: + size_val = 3; + break; + case 16 << 20: + size_val = 4; + break; + } + pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17); + mtdcr(EBC0_CFGDATA, pbcr); + + /* Monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, + -CONFIG_SYS_MONITOR_LEN, + 0xffffffff, + &flash_info[0]); + + flash_info[0].size = size_b0; + + return (size_b0); +} diff --git a/u-boot/board/esd/vom405/vom405.c b/u-boot/board/esd/vom405/vom405.c new file mode 100644 index 0000000..f665a3e --- /dev/null +++ b/u-boot/board/esd/vom405/vom405.c @@ -0,0 +1,164 @@ +/* + * (C) Copyright 2001-2004 + * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <command.h> +#include <malloc.h> +#include <sja1000.h> + +DECLARE_GLOBAL_DATA_PTR; + +extern void lxt971_no_sleep(void); + +/* + * generate a short spike on the CAN tx line + * to bring the couplers in sync + */ +void init_coupler(u32 addr) +{ + struct sja1000_basic_s *ctrl = (struct sja1000_basic_s *)addr; + + /* reset */ + out_8(&ctrl->cr, CR_RR); + + /* dominant */ + out_8(&ctrl->btr0, 0x00); /* btr setup is required */ + out_8(&ctrl->btr1, 0x14); /* we use 1Mbit/s */ + out_8(&ctrl->oc, OC_TP1 | OC_TN1 | OC_POL1 | + OC_TP0 | OC_TN0 | OC_POL0 | OC_MODE1); + out_8(&ctrl->cr, 0x00); + + /* delay */ + in_8(&ctrl->cr); + in_8(&ctrl->cr); + in_8(&ctrl->cr); + in_8(&ctrl->cr); + + /* reset */ + out_8(&ctrl->cr, CR_RR); +} + +int board_early_init_f (void) +{ + /* + * IRQ 0-15 405GP internally generated; active high; level sensitive + * IRQ 16 405GP internally generated; active low; level sensitive + * IRQ 17-24 RESERVED + * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive + * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive + * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive + * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive + * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive + * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive + * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive + */ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr(UIC0ER, 0x00000000); /* disable all ints */ + mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/ + mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */ + mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ + + /* + * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us + */ + mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */ + + /* + * Reset CPLD via GPIO12 (CS3) pin + */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 12)); + udelay(1000); /* wait 1ms */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | (0x80000000 >> 12)); + udelay(1000); /* wait 1ms */ + + return 0; +} + +int misc_init_r (void) +{ + /* adjust flash start and offset */ + gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; + gd->bd->bi_flashoffset = 0; + + /* + * Init magnetic coupler + */ + if (!getenv("noinitcoupler")) + init_coupler(CAN_BA); + + return (0); +} + +/* + * Check Board Identity: + */ +int checkboard (void) +{ + char str[64]; + int i = getenv_f("serial#", str, sizeof(str)); + int flashcnt; + int delay; + u8 *led_reg = (u8 *)(CAN_BA + 0x1000); + + puts ("Board: "); + + if (i == -1) { + puts ("### No HW ID - assuming VOM405"); + } else { + puts(str); + } + + printf(" (PLD-Version=%02d)\n", in_8(led_reg)); + + /* + * Flash LEDs + */ + for (flashcnt = 0; flashcnt < 3; flashcnt++) { + out_8(led_reg, 0x40); /* LED_B..D off */ + for (delay = 0; delay < 100; delay++) + udelay(1000); + out_8(led_reg, 0x47); /* LED_B..D on */ + for (delay = 0; delay < 50; delay++) + udelay(1000); + } + out_8(led_reg, 0x40); + + return 0; +} + +void reset_phy(void) +{ +#ifdef CONFIG_LXT971_NO_SLEEP + + /* + * Disable sleep mode in LXT971 + */ + lxt971_no_sleep(); +#endif +} |