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author | H. Nikolaus Schaller <hns@goldelico.com> | 2013-01-25 10:06:25 +0100 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2013-01-25 10:06:25 +0100 |
commit | 3df518cf99af7c41a44f88bfd13df825a667ac23 (patch) | |
tree | 529285415dc35204322f0d7eb290a99f74d1e98e /u-boot/board | |
parent | 123892db1f82697dd09821f74c54c12f4bf5519b (diff) | |
download | bootable_bootloader_goldelico_gta04-3df518cf99af7c41a44f88bfd13df825a667ac23.zip bootable_bootloader_goldelico_gta04-3df518cf99af7c41a44f88bfd13df825a667ac23.tar.gz bootable_bootloader_goldelico_gta04-3df518cf99af7c41a44f88bfd13df825a667ac23.tar.bz2 |
added code to "systest wlan" command to test if U1102 works
Diffstat (limited to 'u-boot/board')
-rw-r--r-- | u-boot/board/goldelico/gta04/systest.c | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/u-boot/board/goldelico/gta04/systest.c b/u-boot/board/goldelico/gta04/systest.c index 590d70f..7c34101 100644 --- a/u-boot/board/goldelico/gta04/systest.c +++ b/u-boot/board/goldelico/gta04/systest.c @@ -585,11 +585,40 @@ int wlanbtpower(void) int wlanbttest(int test) { /* Bluetooth VAUX4 = 3.3V -- CHECKME: 3.3 V is not officially supported! We use 0x09 = 2.8V here*/ #ifdef CONFIG_OMAP3_GTA04 + int ret=0; wlanbtpower(); if(test) { + int i; // now, we should be able to test the UART for the BT part... - return !bt_hci(1); + ret |= !bt_hci(1); + /* test if U1102 (SN74AVCA604LZYX is feeding back the clock */ + omap_request_gpio(130); + omap_request_gpio(139); + omap_set_gpio_direction(130, 1); // output + omap_set_gpio_direction(139, 1); // input + writew((IDIS | PTD | DIS | M4), OMAP34XX_CTRL_BASE + CP(MMC2_CLK)); // make output GPIO + writew((IEN | PTD | DIS | M4), OMAP34XX_CTRL_BASE + CP(MMC2_DAT7)); // make input GPIO w/o pullup/down + for(i=0; i<8; i++) + { + int val; + udelay(100); + omap_set_gpio_dataout(130, i%2); // set clock output + udelay(300); + val=omap_get_gpio_datain(139); // read clock feedback + if(i%2 == 0) + { + if(val) + printf("clock 0 --> feedback 1\n"); + } + else + { + if(!val) + printf("clock 1 --> feedback 0\n"); + } + } + writew((IDIS | PTD | DIS | M0), OMAP34XX_CTRL_BASE + CP(MMC2_CLK)); // switch back to MMC clock out mode + writew((IEN | PTD | DIS | M1), OMAP34XX_CTRL_BASE + CP(MMC2_DAT7)); // switch back to MMC clock in mode } return 0; #else @@ -724,7 +753,7 @@ static struct { 136, 0, "MMC2_DIR_DAT0", CP(MMC2_DAT4) }, { 137, 0, "MMC2_DIR_DAT1", CP(MMC2_DAT5) }, { 138, 0, "MMC2_DIR_CMD", CP(MMC2_DAT6) }, - { 139, 0, "MMC2_DIR_CLKIN", CP(MMC2_DAT7) }, + { 139, 0, "MMC2_DIR_CLKIN", CP(MMC2_DAT7) }, // if U1102 works, this should follow GPIO130 { 140, 0, "BT_DX", CP(MCBSP3_DX) }, { 141, 0, "BT_DR", CP(MCBSP3_DR) }, { 142, 0, "BT_CLKX", CP(MCBSP3_CLKX) }, |