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-rw-r--r--u-boot/board/goldelico/gta04/gta04.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/u-boot/board/goldelico/gta04/gta04.h b/u-boot/board/goldelico/gta04/gta04.h
index 8249518..2ddc514 100644
--- a/u-boot/board/goldelico/gta04/gta04.h
+++ b/u-boot/board/goldelico/gta04/gta04.h
@@ -457,13 +457,13 @@ MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext An
MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
-MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M0)) /*GPIO_156 - FM TRX*/\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M0)) /*GPIO_157 - */\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M0)) /*GPIO_158 - */\
-MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | DIS | M0)) /*GPIO_159 - */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | EN | M4)) /*GPIO_160 - PENIRQ*/\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTU | EN | M0)) /*GPIO_161 - */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M0)) /*GPIO_162 - */\
+MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | EN | M4)) /*GPIO_156 - FM TRX IRQ */\
+MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M0)) /*GPIO_157 - FM RX frame sync output */\
+MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M0)) /*GPIO_158 - FM TX signal output */\
+MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | DIS | M0)) /*GPIO_159 - FM RX signal input */\
+MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | EN | M4)) /*GPIO_160 - used as PENIRQ*/\
+MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M0)) /*GPIO_161 - FM TX frame sync output */\
+MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | EN | M0)) /*GPIO_162 - FM shared RX/TX clock output */\
MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP4_CLKX*/\
MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*MCBSP4_DR*/\
MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*MCBSP4_DX*/\
@@ -516,13 +516,13 @@ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3 -> Bluetooth PCM */\
MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /**/\
MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M0)) /**/\
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /**/\
-MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M0)) /*GPIO_156 -> FM TRX*/\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M0)) /*GPIO_157 -> MCBSP1_FSR */\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M0)) /*GPIO_158 -> MCBSP1_DX */\
-MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | DIS | M0)) /*GPIO_159 -> MCBSP1_DR */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M4)) /*GPIO_160 - PENIRQ*/\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTU | EN | M0)) /*GPIO_161 -> MCBSP1_FSX */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M0)) /*GPIO_162 -> MCBSP1_CLKX */\
+MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | EN | M4)) /*GPIO_156 - FM TRX IRQ */\
+MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M0)) /*GPIO_157 - FM RX frame sync output */\
+MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M0)) /*GPIO_158 - FM TX signal output */\
+MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | DIS | M0)) /*GPIO_159 - FM RX signal input */\
+MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | EN | M4)) /*GPIO_160 - used as PENIRQ*/\
+MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M0)) /*GPIO_161 - FM TX frame sync output */\
+MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | EN | M0)) /*GPIO_162 - FM shared RX/TX clock output */\
MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\