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-rw-r--r--u-boot/board/goldelico/gta04/gta04.c4
-rw-r--r--u-boot/board/goldelico/gta04/gta04.h13
-rw-r--r--u-boot/board/goldelico/gta04b2/gta04b2.h30
-rw-r--r--u-boot/board/goldelico/gta04b3/gta04b3.h30
4 files changed, 16 insertions, 61 deletions
diff --git a/u-boot/board/goldelico/gta04/gta04.c b/u-boot/board/goldelico/gta04/gta04.c
index 6baa333..8a394f8 100644
--- a/u-boot/board/goldelico/gta04/gta04.c
+++ b/u-boot/board/goldelico/gta04/gta04.c
@@ -43,6 +43,8 @@
#include <asm/mach-types.h>
#include "gta04.h"
+char *muxname="unknown";
+
#if 0 /* testing tool; you can call notify() anywhere even before initialization to see how far the code comes */
/******************************************************************************
@@ -152,6 +154,8 @@ int misc_init_r(void)
TWL4030_PM_RECEIVER_DEV_GRP_P1);
#endif
+ setenv("mux", muxname);
+
switch (get_cpu_family()) {
case CPU_OMAP34XX:
if ((get_cpu_rev() >= CPU_3XX_ES31) &&
diff --git a/u-boot/board/goldelico/gta04/gta04.h b/u-boot/board/goldelico/gta04/gta04.h
index 2ddc514..5749bce 100644
--- a/u-boot/board/goldelico/gta04/gta04.h
+++ b/u-boot/board/goldelico/gta04/gta04.h
@@ -33,6 +33,8 @@ const omap3_sysinfo sysinfo = {
#endif
};
+extern char *muxname; // MUX settings name
+
/* BeagleBoard revisions */
#define REVISION_AXBX 0x7
#define REVISION_CX 0x6
@@ -377,7 +379,8 @@ MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\
MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
-MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
+MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/\
+muxname="BB"
#define MUX_BEAGLE_C() \
MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\
@@ -385,7 +388,8 @@ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\
MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\
MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\
MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
-MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/
+MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+muxname="BB-C"
#define MUX_BEAGLE_XM() \
MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | EN | M4)) /*GPIO_56*/\
@@ -415,7 +419,8 @@ MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\
MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\
MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\
MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
-MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/
+MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/\
+muxname="BB-XM"
/*
* IEN - Input Enable
@@ -474,6 +479,7 @@ MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTU | EN | M4)) /*GPIO_173 - Version sense*/\
MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M4)) /*GPIO_174 - USB-PHY-RESET*/\
MUX_VAL(CP(MCSPI1_CS1), (IEN | PTU | DIS | M4)) /*GPIO_175/MMC3CMD - WAKE_WWAN */\
MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176/MMC3CLK - 3G_WOE */\
+muxname="GTA04A2"
#else // GTA04A3ff has some improved mux assignments
@@ -535,6 +541,7 @@ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTU | EN | M4)) /*GPIO_174 - USB-PHY-RESET*/\
MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | DIS | M4)) /*GPIO_175/MMC3CMD - WAKE_WWAN/ON_KEY */\
MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176/MMC3CLK - 3G_WOE/ KEY_IRQ */\
MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTD | DIS | M4)) /*GPIO_186 - WWAN_RESET (GTA04A4ff) */\
+muxname="GTA04A3+"
#if 0 // test HSUSB2 wiring
/* USB EHCI (port 2) */\
diff --git a/u-boot/board/goldelico/gta04b2/gta04b2.h b/u-boot/board/goldelico/gta04b2/gta04b2.h
index 3159a83..a5cd9ae 100644
--- a/u-boot/board/goldelico/gta04b2/gta04b2.h
+++ b/u-boot/board/goldelico/gta04b2/gta04b2.h
@@ -21,6 +21,7 @@ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+muxname="GTA04B2"
#if 0
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
@@ -29,32 +30,3 @@ MUX_VAL(CP(UART3_RX_IRRX), (IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
#endif
-
-// FIXME: clean up so that we have the right PinMuxes
-#if 0
-
-MUX_VAL(CP(ETK_D0), (IEN | PTD | EN | M1)) /*GPIO_17 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 - Display STBY */\
-MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 - McBSP1-DR -> TRF EN2 */\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 - McBSP1-FSX -> TRF EN */\
-
-MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 -> UART3-RX (software)*/\
-MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 -> UART3-TX (software)*/\
-MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 -> MCSPI3-CS0*/\
-MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 - AUX */\
-MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 - POWER */\
-MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 - UART3-RTS (software) */\
-MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 - UART3-CTS (software) */\
-MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 - UART2-RX */\
-MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 - UART2-CTS */\
-MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 - UART2-RTS */\
-MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 - UART2-TX */\
-MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 - KEYIRQ -> TRF IRQ */\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 - PENIRQ */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 - McBSP1-CLKX -> UART3 Powerdown */
-
-#endif
diff --git a/u-boot/board/goldelico/gta04b3/gta04b3.h b/u-boot/board/goldelico/gta04b3/gta04b3.h
index 200c7b4..d3ba06a 100644
--- a/u-boot/board/goldelico/gta04b3/gta04b3.h
+++ b/u-boot/board/goldelico/gta04b3/gta04b3.h
@@ -21,6 +21,7 @@ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+muxname="GTA04B3"
#if 0
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
@@ -29,32 +30,3 @@ MUX_VAL(CP(UART3_RX_IRRX), (IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
#endif
-
-// FIXME: clean up so that we have the right PinMuxes
-// this below appears to be the BeagleBoard expansion port mapping and not GTA04
-#if 0
-
-MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 - Display STBY */\
-MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 - McBSP1-DR -> TRF EN2 */\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 - McBSP1-FSX -> TRF EN */\
-
-MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 -> UART3-RX (software)*/\
-MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 -> UART3-TX (software)*/\
-MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 -> MCSPI3-CS0*/\
-MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 - AUX */\
-MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 - POWER */\
-MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 - UART3-RTS (software) */\
-MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 - UART3-CTS (software) */\
-MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 - UART2-RX */\
-MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 - UART2-CTS */\
-MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 - UART2-RTS */\
-MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 - UART2-TX */\
-MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 - KEYIRQ -> TRF IRQ */\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 - PENIRQ */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 - McBSP1-CLKX -> UART3 Powerdown */
-
-#endif
generated by cgit v1.1 at 2024-12-22 12:30:30 +0000