diff options
Diffstat (limited to 'arch/arm/cpu/arm1136')
-rw-r--r-- | arch/arm/cpu/arm1136/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/cpu/arm1136/mx31/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/cpu/arm1136/omap24xx/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/cpu/arm1136/start.S | 37 | ||||
-rw-r--r-- | arch/arm/cpu/arm1136/u-boot.lds | 38 |
5 files changed, 37 insertions, 50 deletions
diff --git a/arch/arm/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile index 7701b03..930e0d1 100644 --- a/arch/arm/cpu/arm1136/Makefile +++ b/arch/arm/cpu/arm1136/Makefile @@ -23,7 +23,7 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(CPU).a +LIB = $(obj)lib$(CPU).o START = start.o COBJS = cpu.o @@ -35,7 +35,7 @@ START := $(addprefix $(obj),$(START)) all: $(obj).depend $(START) $(LIB) $(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) + $(call cmd_link_o_target, $(OBJS)) ######################################################################### diff --git a/arch/arm/cpu/arm1136/mx31/Makefile b/arch/arm/cpu/arm1136/mx31/Makefile index c8e18f7..eaed371 100644 --- a/arch/arm/cpu/arm1136/mx31/Makefile +++ b/arch/arm/cpu/arm1136/mx31/Makefile @@ -23,7 +23,7 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(SOC).a +LIB = $(obj)lib$(SOC).o COBJS += generic.o COBJS += timer.o @@ -35,7 +35,7 @@ OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) all: $(obj).depend $(LIB) $(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) + $(call cmd_link_o_target, $(OBJS)) ######################################################################### diff --git a/arch/arm/cpu/arm1136/omap24xx/Makefile b/arch/arm/cpu/arm1136/omap24xx/Makefile index 48dc7e3..0776101 100644 --- a/arch/arm/cpu/arm1136/omap24xx/Makefile +++ b/arch/arm/cpu/arm1136/omap24xx/Makefile @@ -23,7 +23,7 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(SOC).a +LIB = $(obj)lib$(SOC).o SOBJS = reset.o @@ -35,7 +35,7 @@ OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) all: $(obj).depend $(LIB) $(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) + $(call cmd_link_o_target, $(OBJS)) ######################################################################### diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index aecc943..d14a7bb 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -104,22 +104,6 @@ _bss_start_ofs: _bss_end_ofs: .word _end - _start -.globl _datarel_start_ofs -_datarel_start_ofs: - .word __datarel_start - _start - -.globl _datarelrolocal_start_ofs -_datarelrolocal_start_ofs: - .word __datarelrolocal_start - _start - -.globl _datarellocal_start_ofs -_datarellocal_start_ofs: - .word __datarellocal_start - _start - -.globl _datarelro_start_ofs -_datarelro_start_ofs: - .word __datarelro_start - _start - #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ .globl IRQ_STACK_START @@ -176,6 +160,7 @@ next: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 #ifdef CONFIG_NAND_SPL @@ -202,22 +187,22 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -226,7 +211,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -237,10 +222,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext @@ -267,7 +252,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -296,7 +281,7 @@ jump_2_ram: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm1136/u-boot.lds b/arch/arm/cpu/arm1136/u-boot.lds index 31f43f0..253adbe 100644 --- a/arch/arm/cpu/arm1136/u-boot.lds +++ b/arch/arm/cpu/arm1136/u-boot.lds @@ -20,7 +20,8 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -49,23 +50,9 @@ SECTIONS . = ALIGN(4); .data : { *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) } . = ALIGN(4); - __rel_dyn_start = .; - .rel.dyn : { *(.rel.dyn) } - __rel_dyn_end = .; - - __dynsym_start = .; - .dynsym : { *(.dynsym) } . = .; __u_boot_cmd_start = .; @@ -73,9 +60,24 @@ SECTIONS __u_boot_cmd_end = .; . = ALIGN(4); - __bss_start = .; - .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } - _end = .; + + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; + *(.bss) + . = ALIGN(4); + _end = .; + } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } |