diff options
Diffstat (limited to 'arch/arm/include/asm')
229 files changed, 0 insertions, 77845 deletions
diff --git a/arch/arm/include/asm/arch-a320/a320.h b/arch/arm/include/asm/arch-a320/a320.h deleted file mode 100644 index fbd1583..0000000 --- a/arch/arm/include/asm/arch-a320/a320.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __A320_H -#define __A320_H - -/* - * Hardware register bases - */ -#define CONFIG_FTSMC020_BASE 0x90200000 /* Static Memory Controller */ -#define CONFIG_DEBUG_LED 0x902ffffc /* Debug LED */ -#define CONFIG_FTSDMC020_BASE 0x90300000 /* SDRAM Controller */ -#define CONFIG_FTMAC100_BASE 0x90900000 /* Ethernet */ -#define CONFIG_FTPMU010_BASE 0x98100000 /* Power Management Unit */ -#define CONFIG_FTTMR010_BASE 0x98400000 /* Timer */ -#define CONFIG_FTRTC010_BASE 0x98600000 /* Real Time Clock*/ - -#endif /* __A320_H */ diff --git a/arch/arm/include/asm/arch-a320/ftsdmc020.h b/arch/arm/include/asm/arch-a320/ftsdmc020.h deleted file mode 100644 index 0699772..0000000 --- a/arch/arm/include/asm/arch-a320/ftsdmc020.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * SDRAM Controller - */ -#ifndef __FTSDMC020_H -#define __FTSDMC020_H - -#define FTSDMC020_OFFSET_TP0 0x00 -#define FTSDMC020_OFFSET_TP1 0x04 -#define FTSDMC020_OFFSET_CR 0x08 -#define FTSDMC020_OFFSET_BANK0_BSR 0x0C -#define FTSDMC020_OFFSET_BANK1_BSR 0x10 -#define FTSDMC020_OFFSET_BANK2_BSR 0x14 -#define FTSDMC020_OFFSET_BANK3_BSR 0x18 -#define FTSDMC020_OFFSET_BANK4_BSR 0x1C -#define FTSDMC020_OFFSET_BANK5_BSR 0x20 -#define FTSDMC020_OFFSET_BANK6_BSR 0x24 -#define FTSDMC020_OFFSET_BANK7_BSR 0x28 -#define FTSDMC020_OFFSET_ACR 0x34 - -/* - * Timing Parametet 0 Register - */ -#define FTSDMC020_TP0_TCL(x) ((x) & 0x3) -#define FTSDMC020_TP0_TWR(x) (((x) & 0x3) << 4) -#define FTSDMC020_TP0_TRF(x) (((x) & 0xf) << 8) -#define FTSDMC020_TP0_TRCD(x) (((x) & 0x7) << 12) -#define FTSDMC020_TP0_TRP(x) (((x) & 0xf) << 16) -#define FTSDMC020_TP0_TRAS(x) (((x) & 0xf) << 20) - -/* - * Timing Parametet 1 Register - */ -#define FTSDMC020_TP1_REF_INTV(x) ((x) & 0xffff) -#define FTSDMC020_TP1_INI_REFT(x) (((x) & 0xf) << 16) -#define FTSDMC020_TP1_INI_PREC(x) (((x) & 0xf) << 20) - -/* - * Configuration Register - */ -#define FTSDMC020_CR_SREF (1 << 0) -#define FTSDMC020_CR_PWDN (1 << 1) -#define FTSDMC020_CR_ISMR (1 << 2) -#define FTSDMC020_CR_IREF (1 << 3) -#define FTSDMC020_CR_IPREC (1 << 4) -#define FTSDMC020_CR_REFTYPE (1 << 5) - -/* - * SDRAM External Bank Base/Size Register - */ -#define FTSDMC020_BANK_ENABLE (1 << 28) - -#define FTSDMC020_BANK_BASE(addr) (((addr) >> 20) << 16) - -#define FTSDMC020_BANK_DDW_X4 (0 << 12) -#define FTSDMC020_BANK_DDW_X8 (1 << 12) -#define FTSDMC020_BANK_DDW_X16 (2 << 12) -#define FTSDMC020_BANK_DDW_X32 (3 << 12) - -#define FTSDMC020_BANK_DSZ_16M (0 << 8) -#define FTSDMC020_BANK_DSZ_64M (1 << 8) -#define FTSDMC020_BANK_DSZ_128M (2 << 8) -#define FTSDMC020_BANK_DSZ_256M (3 << 8) - -#define FTSDMC020_BANK_MBW_8 (0 << 4) -#define FTSDMC020_BANK_MBW_16 (1 << 4) -#define FTSDMC020_BANK_MBW_32 (2 << 4) - -#define FTSDMC020_BANK_SIZE_1M 0x0 -#define FTSDMC020_BANK_SIZE_2M 0x1 -#define FTSDMC020_BANK_SIZE_4M 0x2 -#define FTSDMC020_BANK_SIZE_8M 0x3 -#define FTSDMC020_BANK_SIZE_16M 0x4 -#define FTSDMC020_BANK_SIZE_32M 0x5 -#define FTSDMC020_BANK_SIZE_64M 0x6 -#define FTSDMC020_BANK_SIZE_128M 0x7 -#define FTSDMC020_BANK_SIZE_256M 0x8 - -/* - * Arbiter Control Register - */ -#define FTSDMC020_ACR_TOC(x) ((x) & 0x1f) -#define FTSDMC020_ACR_TOE (1 << 8) - -#endif /* __FTSDMC020_H */ diff --git a/arch/arm/include/asm/arch-a320/ftsmc020.h b/arch/arm/include/asm/arch-a320/ftsmc020.h deleted file mode 100644 index 95d9500..0000000 --- a/arch/arm/include/asm/arch-a320/ftsmc020.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * Static Memory Controller - */ -#ifndef __FTSMC020_H -#define __FTSMC020_H - -#ifndef __ASSEMBLY__ - -struct ftsmc020 { - struct { - unsigned int cr; /* 0x00, 0x08, 0x10, 0x18 */ - unsigned int tpr; /* 0x04, 0x0c, 0x14, 0x1c */ - } bank[4]; - unsigned int pad[8]; /* 0x20 - 0x3c */ - unsigned int ssr; /* 0x40 */ -}; - -void ftsmc020_init(void); - -#endif /* __ASSEMBLY__ */ - -/* - * Memory Bank Configuration Register - */ -#define FTSMC020_BANK_ENABLE (1 << 28) -#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000) - -#define FTSMC020_BANK_WPROT (1 << 11) - -#define FTSMC020_BANK_SIZE_32K (0xb << 4) -#define FTSMC020_BANK_SIZE_64K (0xc << 4) -#define FTSMC020_BANK_SIZE_128K (0xd << 4) -#define FTSMC020_BANK_SIZE_256K (0xe << 4) -#define FTSMC020_BANK_SIZE_512K (0xf << 4) -#define FTSMC020_BANK_SIZE_1M (0x0 << 4) -#define FTSMC020_BANK_SIZE_2M (0x1 << 4) -#define FTSMC020_BANK_SIZE_4M (0x2 << 4) -#define FTSMC020_BANK_SIZE_8M (0x3 << 4) -#define FTSMC020_BANK_SIZE_16M (0x4 << 4) -#define FTSMC020_BANK_SIZE_32M (0x5 << 4) - -#define FTSMC020_BANK_MBW_8 (0x0 << 0) -#define FTSMC020_BANK_MBW_16 (0x1 << 0) -#define FTSMC020_BANK_MBW_32 (0x2 << 0) - -/* - * Memory Bank Timing Parameter Register - */ -#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28) -#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24) -#define FTSMC020_TPR_RBE (1 << 20) -#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18) -#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16) -#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12) -#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8) -#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6) -#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4) -#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0) - -#endif /* __FTSMC020_H */ diff --git a/arch/arm/include/asm/arch-a320/fttmr010.h b/arch/arm/include/asm/arch-a320/fttmr010.h deleted file mode 100644 index 72abcb3..0000000 --- a/arch/arm/include/asm/arch-a320/fttmr010.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * Timer - */ -#ifndef __FTTMR010_H -#define __FTTMR010_H - -struct fttmr010 { - unsigned int timer1_counter; /* 0x00 */ - unsigned int timer1_load; /* 0x04 */ - unsigned int timer1_match1; /* 0x08 */ - unsigned int timer1_match2; /* 0x0c */ - unsigned int timer2_counter; /* 0x10 */ - unsigned int timer2_load; /* 0x14 */ - unsigned int timer2_match1; /* 0x18 */ - unsigned int timer2_match2; /* 0x1c */ - unsigned int timer3_counter; /* 0x20 */ - unsigned int timer3_load; /* 0x24 */ - unsigned int timer3_match1; /* 0x28 */ - unsigned int timer3_match2; /* 0x2c */ - unsigned int cr; /* 0x30 */ - unsigned int interrupt_state; /* 0x34 */ - unsigned int interrupt_mask; /* 0x38 */ -}; - -/* - * Timer Control Register - */ -#define FTTMR010_TM3_UPDOWN (1 << 11) -#define FTTMR010_TM2_UPDOWN (1 << 10) -#define FTTMR010_TM1_UPDOWN (1 << 9) -#define FTTMR010_TM3_OFENABLE (1 << 8) -#define FTTMR010_TM3_CLOCK (1 << 7) -#define FTTMR010_TM3_ENABLE (1 << 6) -#define FTTMR010_TM2_OFENABLE (1 << 5) -#define FTTMR010_TM2_CLOCK (1 << 4) -#define FTTMR010_TM2_ENABLE (1 << 3) -#define FTTMR010_TM1_OFENABLE (1 << 2) -#define FTTMR010_TM1_CLOCK (1 << 1) -#define FTTMR010_TM1_ENABLE (1 << 0) - -/* - * Timer Interrupt State & Mask Registers - */ -#define FTTMR010_TM3_OVERFLOW (1 << 8) -#define FTTMR010_TM3_MATCH2 (1 << 7) -#define FTTMR010_TM3_MATCH1 (1 << 6) -#define FTTMR010_TM2_OVERFLOW (1 << 5) -#define FTTMR010_TM2_MATCH2 (1 << 4) -#define FTTMR010_TM2_MATCH1 (1 << 3) -#define FTTMR010_TM1_OVERFLOW (1 << 2) -#define FTTMR010_TM1_MATCH2 (1 << 1) -#define FTTMR010_TM1_MATCH1 (1 << 0) - -#endif /* __FTTMR010_H */ diff --git a/arch/arm/include/asm/arch-arm720t/hardware.h b/arch/arm/include/asm/arch-arm720t/hardware.h deleted file mode 100644 index 9bee19f..0000000 --- a/arch/arm/include/asm/arch-arm720t/hardware.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef __ARM7_HW_H -#define __ARM7_HW_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#if defined(CONFIG_NETARM) -#include <asm/arch-arm720t/netarm_registers.h> -#elif defined(CONFIG_IMPA7) -/* include IMPA7 specific hardware file if there was one */ -#elif defined(CONFIG_EP7312) -/* include EP7312 specific hardware file if there was one */ -#elif defined(CONFIG_ARMADILLO) -/* include armadillo specific hardware file if there was one */ -#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) -/* include IntegratorCP/CM720T specific hardware file if there was one */ -#else -#error No hardware file defined for this configuration -#endif - -#endif /* __ARM7_HW_H */ diff --git a/arch/arm/include/asm/arch-arm720t/netarm_dma_module.h b/arch/arm/include/asm/arch-arm720t/netarm_dma_module.h deleted file mode 100644 index 328eaf0..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_dma_module.h +++ /dev/null @@ -1,182 +0,0 @@ -/* * include/asm-armnommu/arch-netarm/netarm_dma_module.h - * - * Copyright (C) 2000 NETsilicon, Inc. - * Copyright (C) 2000 WireSpeed Communications Corporation - * - * This software is copyrighted by WireSpeed. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall WireSpeed - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Joe deBlaquiere - * David Smith - */ - -#ifndef __NETARM_DMA_MODULE_REGISTERS_H -#define __NETARM_DMA_MODULE_REGISTERS_H - -/* GEN unit register offsets */ - -#define NETARM_DMA_MODULE_BASE (0xFF900000) - -#define get_dma_reg_addr(c) ((volatile unsigned int *)(NETARM_DMA_MODULE_BASE + (c))) - -#define NETARM_DMA1A_BFR_DESCRPTOR_PTR (0x00) -#define NETARM_DMA1A_CONTROL (0x10) -#define NETARM_DMA1A_STATUS (0x14) -#define NETARM_DMA1B_BFR_DESCRPTOR_PTR (0x20) -#define NETARM_DMA1B_CONTROL (0x30) -#define NETARM_DMA1B_STATUS (0x34) -#define NETARM_DMA1C_BFR_DESCRPTOR_PTR (0x40) -#define NETARM_DMA1C_CONTROL (0x50) -#define NETARM_DMA1C_STATUS (0x54) -#define NETARM_DMA1D_BFR_DESCRPTOR_PTR (0x60) -#define NETARM_DMA1D_CONTROL (0x70) -#define NETARM_DMA1D_STATUS (0x74) - -#define NETARM_DMA2_BFR_DESCRPTOR_PTR (0x80) -#define NETARM_DMA2_CONTROL (0x90) -#define NETARM_DMA2_STATUS (0x94) - -#define NETARM_DMA3_BFR_DESCRPTOR_PTR (0xA0) -#define NETARM_DMA3_CONTROL (0xB0) -#define NETARM_DMA3_STATUS (0xB4) - -#define NETARM_DMA4_BFR_DESCRPTOR_PTR (0xC0) -#define NETARM_DMA4_CONTROL (0xD0) -#define NETARM_DMA4_STATUS (0xD4) - -#define NETARM_DMA5_BFR_DESCRPTOR_PTR (0xE0) -#define NETARM_DMA5_CONTROL (0xF0) -#define NETARM_DMA5_STATUS (0xF4) - -#define NETARM_DMA6_BFR_DESCRPTOR_PTR (0x100) -#define NETARM_DMA6_CONTROL (0x110) -#define NETARM_DMA6_STATUS (0x114) - -#define NETARM_DMA7_BFR_DESCRPTOR_PTR (0x120) -#define NETARM_DMA7_CONTROL (0x130) -#define NETARM_DMA7_STATUS (0x134) - -#define NETARM_DMA8_BFR_DESCRPTOR_PTR (0x140) -#define NETARM_DMA8_CONTROL (0x150) -#define NETARM_DMA8_STATUS (0x154) - -#define NETARM_DMA9_BFR_DESCRPTOR_PTR (0x160) -#define NETARM_DMA9_CONTROL (0x170) -#define NETARM_DMA9_STATUS (0x174) - -#define NETARM_DMA10_BFR_DESCRPTOR_PTR (0x180) -#define NETARM_DMA10_CONTROL (0x190) -#define NETARM_DMA10_STATUS (0x194) - -/* select bitfield defintions */ - -/* DMA Control Register ( 0xFF90_0XX0 ) */ - -#define NETARM_DMA_CTL_ENABLE (0x80000000) - -#define NETARM_DMA_CTL_ABORT (0x40000000) - -#define NETARM_DMA_CTL_BUS_100_PERCENT (0x00000000) -#define NETARM_DMA_CTL_BUS_75_PERCENT (0x10000000) -#define NETARM_DMA_CTL_BUS_50_PERCENT (0x20000000) -#define NETARM_DMA_CTL_BUS_25_PERCENT (0x30000000) - -#define NETARM_DMA_CTL_BUS_MASK (0x30000000) - -#define NETARM_DMA_CTL_MODE_FB_TO_MEM (0x00000000) -#define NETARM_DMA_CTL_MODE_FB_FROM_MEM (0x04000000) -#define NETARM_DMA_CTL_MODE_MEM_TO_MEM (0x08000000) - -#define NETARM_DMA_CTL_BURST_NONE (0x00000000) -#define NETARM_DMA_CTL_BURST_8_BYTE (0x01000000) -#define NETARM_DMA_CTL_BURST_16_BYTE (0x02000000) - -#define NETARM_DMA_CTL_BURST_MASK (0x03000000) - -#define NETARM_DMA_CTL_SRC_INCREMENT (0x00200000) - -#define NETARM_DMA_CTL_DST_INCREMENT (0x00100000) - -/* these apply only to ext xfers on DMA 3 or 4 */ - -#define NETARM_DMA_CTL_CH_3_4_REQ_EXT (0x00800000) - -#define NETARM_DMA_CTL_CH_3_4_DATA_32 (0x00000000) -#define NETARM_DMA_CTL_CH_3_4_DATA_16 (0x00010000) -#define NETARM_DMA_CTL_CH_3_4_DATA_8 (0x00020000) - -#define NETARM_DMA_CTL_STATE(X) ((X) & 0xFC00) -#define NETARM_DMA_CTL_INDEX(X) ((X) & 0x03FF) - -/* DMA Status Register ( 0xFF90_0XX4 ) */ - -#define NETARM_DMA_STAT_NC_INTPEN (0x80000000) -#define NETARM_DMA_STAT_EC_INTPEN (0x40000000) -#define NETARM_DMA_STAT_NR_INTPEN (0x20000000) -#define NETARM_DMA_STAT_CA_INTPEN (0x10000000) -#define NETARM_DMA_STAT_INTPEN_MASK (0xF0000000) - -#define NETARM_DMA_STAT_NC_INT_EN (0x00800000) -#define NETARM_DMA_STAT_EC_INT_EN (0x00400000) -#define NETARM_DMA_STAT_NR_INT_EN (0x00200000) -#define NETARM_DMA_STAT_CA_INT_EN (0x00100000) -#define NETARM_DMA_STAT_INT_EN_MASK (0x00F00000) - -#define NETARM_DMA_STAT_WRAP (0x00080000) -#define NETARM_DMA_STAT_IDONE (0x00040000) -#define NETARM_DMA_STAT_LAST (0x00020000) -#define NETARM_DMA_STAT_FULL (0x00010000) - -#define NETARM_DMA_STAT_BUFLEN(X) ((X) & 0x7FFF) - -/* DMA Buffer Descriptor Word 0 bitfields. */ - -#define NETARM_DMA_BD0_WRAP (0x80000000) -#define NETARM_DMA_BD0_IDONE (0x40000000) -#define NETARM_DMA_BD0_LAST (0x20000000) -#define NETARM_DMA_BD0_BUFPTR_MASK (0x1FFFFFFF) - -/* DMA Buffer Descriptor Word 1 bitfields. */ - -#define NETARM_DMA_BD1_STATUS_MASK (0xFFFF0000) -#define NETARM_DMA_BD1_FULL (0x00008000) -#define NETARM_DMA_BD1_BUFLEN_MASK (0x00007FFF) - -#ifndef __ASSEMBLER__ - -typedef struct __NETARM_DMA_Buff_Desc_FlyBy -{ - unsigned int word0; - unsigned int word1; -} NETARM_DMA_Buff_Desc_FlyBy, *pNETARM_DMA_Buff_Desc_FlyBy ; - -typedef struct __NETARM_DMA_Buff_Desc_M_to_M -{ - unsigned int word0; - unsigned int word1; - unsigned int word2; - unsigned int word3; -} NETARM_DMA_Buff_Desc_M_to_M, *pNETARM_DMA_Buff_Desc_M_to_M ; - -#endif - -#endif diff --git a/arch/arm/include/asm/arch-arm720t/netarm_eni_module.h b/arch/arm/include/asm/arch-arm720t/netarm_eni_module.h deleted file mode 100644 index 317b354..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_eni_module.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * include/asm-armnommu/arch-netarm/netarm_eni_module.h - * - * Copyright (C) 2000 NETsilicon, Inc. - * Copyright (C) 2000 WireSpeed Communications Corporation - * - * This software is copyrighted by WireSpeed. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall WireSpeed - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : David Smith - */ - -#ifndef __NETARM_ENI_MODULE_REGISTERS_H -#define __NETARM_ENI_MODULE_REGISTERS_H - -/* ENI unit register offsets */ - -/* #ifdef CONFIG_ARCH_NETARM */ -#define NETARM_ENI_MODULE_BASE (0xFFA00000) -/* #endif / * CONFIG_ARCH_NETARM */ - -#define get_eni_reg_addr(c) ((volatile unsigned int *)(NETARM_ENI_MODULE_BASE + (c))) -#define get_eni_ctl_reg_addr(minor) \ - (get_eni_reg_addr(NETARM_ENI_1284_PORT1_CONTROL) + (minor)) - -#define NETARM_ENI_GENERAL_CONTROL (0x00) -#define NETARM_ENI_STATUS_CONTROL (0x04) -#define NETARM_ENI_FIFO_MODE_DATA (0x08) - -#define NETARM_ENI_1284_PORT1_CONTROL (0x10) -#define NETARM_ENI_1284_PORT2_CONTROL (0x14) -#define NETARM_ENI_1284_PORT3_CONTROL (0x18) -#define NETARM_ENI_1284_PORT4_CONTROL (0x1c) - -#define NETARM_ENI_1284_CHANNEL1_DATA (0x20) -#define NETARM_ENI_1284_CHANNEL2_DATA (0x24) -#define NETARM_ENI_1284_CHANNEL3_DATA (0x28) -#define NETARM_ENI_1284_CHANNEL4_DATA (0x2c) - -#define NETARM_ENI_ENI_CONTROL (0x30) -#define NETARM_ENI_ENI_PULSED_INTR (0x34) -#define NETARM_ENI_ENI_SHARED_RAM_ADDR (0x38) -#define NETARM_ENI_ENI_SHARED (0x3c) - -/* select bitfield defintions */ - -/* General Control Register (0xFFA0_0000) */ - -#define NETARM_ENI_GCR_ENIMODE_IEEE1284 (0x00000001) -#define NETARM_ENI_GCR_ENIMODE_SHRAM16 (0x00000004) -#define NETARM_ENI_GCR_ENIMODE_SHRAM8 (0x00000005) -#define NETARM_ENI_GCR_ENIMODE_FIFO16 (0x00000006) -#define NETARM_ENI_GCR_ENIMODE_FIFO8 (0x00000007) - -#define NETARM_ENI_GCR_ENIMODE_MASK (0x00000007) - -/* IEEE 1284 Port Control Registers 1-4 (0xFFA0_0010, 0xFFA0_0014, - 0xFFA0_0018, 0xFFA0_001c) */ - -#define NETARM_ENI_1284PC_PORT_ENABLE (0x80000000) -#define NETARM_ENI_1284PC_DMA_ENABLE (0x40000000) -#define NETARM_ENI_1284PC_OBE_INT_EN (0x20000000) -#define NETARM_ENI_1284PC_ACK_INT_EN (0x10000000) -#define NETARM_ENI_1284PC_ECP_MODE (0x08000000) -#define NETARM_ENI_1284PC_LOOPBACK_MODE (0x04000000) - -#define NETARM_ENI_1284PC_STROBE_TIME0 (0x00000000) /* 0.5 uS */ -#define NETARM_ENI_1284PC_STROBE_TIME1 (0x01000000) /* 1.0 uS */ -#define NETARM_ENI_1284PC_STROBE_TIME2 (0x02000000) /* 5.0 uS */ -#define NETARM_ENI_1284PC_STROBE_TIME3 (0x03000000) /* 10.0 uS */ -#define NETARM_ENI_1284PC_STROBE_MASK (0x03000000) - -#define NETARM_ENI_1284PC_MAN_STROBE_EN (0x00800000) -#define NETARM_ENI_1284PC_FAST_MODE (0x00400000) -#define NETARM_ENI_1284PC_BIDIR_MODE (0x00200000) - -#define NETARM_ENI_1284PC_MAN_STROBE (0x00080000) -#define NETARM_ENI_1284PC_AUTO_FEED (0x00040000) -#define NETARM_ENI_1284PC_INIT (0x00020000) -#define NETARM_ENI_1284PC_HSELECT (0x00010000) -#define NETARM_ENI_1284PC_FE_INT_EN (0x00008000) -#define NETARM_ENI_1284PC_EPP_MODE (0x00004000) -#define NETARM_ENI_1284PC_IBR_INT_EN (0x00002000) -#define NETARM_ENI_1284PC_IBR (0x00001000) - -#define NETARM_ENI_1284PC_RXFDB_1BYTE (0x00000400) -#define NETARM_ENI_1284PC_RXFDB_2BYTE (0x00000800) -#define NETARM_ENI_1284PC_RXFDB_3BYTE (0x00000c00) -#define NETARM_ENI_1284PC_RXFDB_4BYTE (0x00000000) - -#define NETARM_ENI_1284PC_RBCC (0x00000200) -#define NETARM_ENI_1284PC_RBCT (0x00000100) -#define NETARM_ENI_1284PC_ACK (0x00000080) -#define NETARM_ENI_1284PC_FIFO_E (0x00000040) -#define NETARM_ENI_1284PC_OBE (0x00000020) -#define NETARM_ENI_1284PC_ACK_INT (0x00000010) -#define NETARM_ENI_1284PC_BUSY (0x00000008) -#define NETARM_ENI_1284PC_PE (0x00000004) -#define NETARM_ENI_1284PC_PSELECT (0x00000002) -#define NETARM_ENI_1284PC_FAULT (0x00000001) - -#endif /* __NETARM_ENI_MODULE_REGISTERS_H */ diff --git a/arch/arm/include/asm/arch-arm720t/netarm_eth_module.h b/arch/arm/include/asm/arch-arm720t/netarm_eth_module.h deleted file mode 100644 index 8f2f369..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_eth_module.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * include/asm-armnommu/arch-netarm/netarm_eth_module.h - * - * Copyright (C) 2000 NETsilicon, Inc. - * Copyright (C) 2000 WireSpeed Communications Corporation - * - * This software is copyrighted by WireSpeed. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall WireSpeed - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Jackie Smith Cashion - * David Smith - */ - -#ifndef __NETARM_ETH_MODULE_REGISTERS_H -#define __NETARM_ETH_MODULE_REGISTERS_H - -/* ETH unit register offsets */ - -#define NETARM_ETH_MODULE_BASE (0xFF800000) - -#define get_eth_reg_addr(c) ((volatile unsigned int *)(NETARM_ETH_MODULE_BASE + (c))) - -#define NETARM_ETH_GEN_CTRL (0x000) /* Ethernet Gen Control Reg */ -#define NETARM_ETH_GEN_STAT (0x004) /* Ethernet Gen Status Reg */ -#define NETARM_ETH_FIFO_DAT1 (0x008) /* Fifo Data Reg 1 */ -#define NETARM_ETH_FIFO_DAT2 (0x00C) /* Fifo Data Reg 2 */ -#define NETARM_ETH_TX_STAT (0x010) /* Transmit Status Reg */ -#define NETARM_ETH_RX_STAT (0x014) /* Receive Status Reg */ - -#define NETARM_ETH_MAC_CFG (0x400) /* MAC Configuration Reg */ -#define NETARM_ETH_PCS_CFG (0x408) /* PCS Configuration Reg */ -#define NETARM_ETH_STL_CFG (0x410) /* STL Configuration Reg */ -#define NETARM_ETH_B2B_IPG_GAP_TMR (0x440) /* Back-to-back IPG - Gap Timer Reg */ -#define NETARM_ETH_NB2B_IPG_GAP_TMR (0x444) /* Non Back-to-back - IPG Gap Timer Reg */ -#define NETARM_ETH_MII_CMD (0x540) /* MII (PHY) Command Reg */ -#define NETARM_ETH_MII_ADDR (0x544) /* MII Address Reg */ -#define NETARM_ETH_MII_WRITE (0x548) /* MII Write Data Reg */ -#define NETARM_ETH_MII_READ (0x54C) /* MII Read Data Reg */ -#define NETARM_ETH_MII_IND (0x550) /* MII Indicators Reg */ -#define NETARM_ETH_MIB_CRCEC (0x580) /* (MIB) CRC Error Counter */ -#define NETARM_ETH_MIB_AEC (0x584) /* Alignment Error Counter */ -#define NETARM_ETH_MIB_CEC (0x588) /* Code Error Counter */ -#define NETARM_ETH_MIB_LFC (0x58C) /* Long Frame Counter */ -#define NETARM_ETH_MIB_SFC (0x590) /* Short Frame Counter */ -#define NETARM_ETH_MIB_LCC (0x594) /* Late Collision Counter */ -#define NETARM_ETH_MIB_EDC (0x598) /* Excessive Deferral - Counter */ -#define NETARM_ETH_MIB_MCC (0x59C) /* Maximum Collision Counter */ -#define NETARM_ETH_SAL_FILTER (0x5C0) /* SAL Station Address - Filter Reg */ -#define NETARM_ETH_SAL_STATION_ADDR_1 (0x5C4) /* SAL Station Address - Reg */ -#define NETARM_ETH_SAL_STATION_ADDR_2 (0x5C8) -#define NETARM_ETH_SAL_STATION_ADDR_3 (0x5CC) -#define NETARM_ETH_SAL_HASH_TBL_1 (0x5D0) /* SAL Multicast Hash Table*/ -#define NETARM_ETH_SAL_HASH_TBL_2 (0x5D4) -#define NETARM_ETH_SAL_HASH_TBL_3 (0x5D8) -#define NETARM_ETH_SAL_HASH_TBL_4 (0x5DC) - -/* select bitfield defintions */ - -/* Ethernet General Control Register (0xFF80_0000) */ - -#define NETARM_ETH_GCR_ERX (0x80000000) /* Enable Receive FIFO */ -#define NETARM_ETH_GCR_ERXDMA (0x40000000) /* Enable Receive DMA */ -#define NETARM_ETH_GCR_ETX (0x00800000) /* Enable Transmit FIFO */ -#define NETARM_ETH_GCR_ETXDMA (0x00400000) /* Enable Transmit DMA */ -#define NETARM_ETH_GCR_ETXWM_50 (0x00100000) /* Transmit FIFO Water - Mark. Start transmit - when FIFO is 50% - full. */ -#define NETARM_ETH_GCR_PNA (0x00000400) /* pSOS pNA Buffer - Descriptor Format */ - -/* Ethernet General Status Register (0xFF80_0004) */ - -#define NETARM_ETH_GST_RXFDB (0x30000000) -#define NETARM_ETH_GST_RXREGR (0x08000000) /* Receive Register - Ready */ -#define NETARM_ETH_GST_RXFIFOH (0x04000000) -#define NETARM_ETH_GST_RXBR (0x02000000) -#define NETARM_ETH_GST_RXSKIP (0x01000000) - -#define NETARM_ETH_GST_TXBC (0x00020000) - - -/* Ethernet Transmit Status Register (0xFF80_0010) */ - -#define NETARM_ETH_TXSTAT_TXOK (0x00008000) - - -/* Ethernet Receive Status Register (0xFF80_0014) */ - -#define NETARM_ETH_RXSTAT_SIZE (0xFFFF0000) -#define NETARM_ETH_RXSTAT_RXOK (0x00002000) - - -/* PCS Configuration Register (0xFF80_0408) */ - -#define NETARM_ETH_PCSC_NOCFR (0x1) /* Disable Ciphering */ -#define NETARM_ETH_PCSC_ENJAB (0x2) /* Enable Jabber Protection */ -#define NETARM_ETH_PCSC_CLKS_25M (0x0) /* 25 MHz Clock Speed Select */ -#define NETARM_ETH_PCSC_CLKS_33M (0x4) /* 33 MHz Clock Speed Select */ - -/* STL Configuration Register (0xFF80_0410) */ - -#define NETARM_ETH_STLC_RXEN (0x2) /* Enable Packet Receiver */ -#define NETARM_ETH_STLC_AUTOZ (0x4) /* Auto Zero Statistics */ - -/* MAC Configuration Register (0xFF80_0400) */ - -#define NETARM_ETH_MACC_HUGEN (0x1) /* Enable Unlimited Transmit - Frame Sizes */ -#define NETARM_ETH_MACC_PADEN (0x4) /* Automatic Pad Fill Frames - to 64 Bytes */ -#define NETARM_ETH_MACC_CRCEN (0x8) /* Append CRC to Transmit - Frames */ - -/* MII (PHY) Command Register (0xFF80_0540) */ - -#define NETARM_ETH_MIIC_RSTAT (0x1) /* Single Scan for Read Data */ - -/* MII Indicators Register (0xFF80_0550) */ - -#define NETARM_ETH_MIII_BUSY (0x1) /* MII I/F Busy with - Read/Write */ - -/* SAL Station Address Filter Register (0xFF80_05C0) */ - -#define NETARM_ETH_SALF_PRO (0x8) /* Enable Promiscuous Mode */ -#define NETARM_ETH_SALF_PRM (0x4) /* Accept All Multicast - Packets */ -#define NETARM_ETH_SALF_PRA (0x2) /* Accept Mulitcast Packets - using Hash Table */ -#define NETARM_ETH_SALF_BROAD (0x1) /* Accept All Broadcast - Packets */ - - -#endif /* __NETARM_GEN_MODULE_REGISTERS_H */ diff --git a/arch/arm/include/asm/arch-arm720t/netarm_gen_module.h b/arch/arm/include/asm/arch-arm720t/netarm_gen_module.h deleted file mode 100644 index 13656a3..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_gen_module.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * include/asm-armnommu/arch-netarm/netarm_gen_module.h - * - * Copyright (C) 2005 - * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> - * - * Copyright (C) 2000, 2001 NETsilicon, Inc. - * Copyright (C) 2000, 2001 Red Hat, Inc. - * - * This software is copyrighted by Red Hat. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall Red Hat - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Joe deBlaquiere - * - * Modified to support NS7520 by Art Shipkowski. - */ - -#ifndef __NETARM_GEN_MODULE_REGISTERS_H -#define __NETARM_GEN_MODULE_REGISTERS_H - -/* GEN unit register offsets */ - -#define NETARM_GEN_MODULE_BASE (0xFFB00000) - -#define get_gen_reg_addr(c) ((volatile unsigned int *)(NETARM_GEN_MODULE_BASE + (c))) - -#define NETARM_GEN_SYSTEM_CONTROL (0x00) -#define NETARM_GEN_STATUS_CONTROL (0x04) -#define NETARM_GEN_PLL_CONTROL (0x08) -#define NETARM_GEN_SOFTWARE_SERVICE (0x0c) - -#define NETARM_GEN_TIMER1_CONTROL (0x10) -#define NETARM_GEN_TIMER1_STATUS (0x14) -#define NETARM_GEN_TIMER2_CONTROL (0x18) -#define NETARM_GEN_TIMER2_STATUS (0x1c) - -#define NETARM_GEN_PORTA (0x20) -#ifndef CONFIG_NETARM_NS7520 -#define NETARM_GEN_PORTB (0x24) -#endif -#define NETARM_GEN_PORTC (0x28) - -#define NETARM_GEN_INTR_ENABLE (0x30) -#define NETARM_GEN_INTR_ENABLE_SET (0x34) -#define NETARM_GEN_INTR_ENABLE_CLR (0x38) -#define NETARM_GEN_INTR_STATUS_EN (0x34) -#define NETARM_GEN_INTR_STATUS_RAW (0x38) - -#define NETARM_GEN_CACHE_CONTROL1 (0x40) -#define NETARM_GEN_CACHE_CONTROL2 (0x44) - -/* select bitfield definitions */ - -/* System Control Register ( 0xFFB0_0000 ) */ - -#define NETARM_GEN_SYS_CFG_LENDIAN (0x80000000) -#define NETARM_GEN_SYS_CFG_BENDIAN (0x00000000) - -#define NETARM_GEN_SYS_CFG_BUSQRTR (0x00000000) -#define NETARM_GEN_SYS_CFG_BUSHALF (0x20000000) -#define NETARM_GEN_SYS_CFG_BUSFULL (0x40000000) - -#define NETARM_GEN_SYS_CFG_BCLK_DISABLE (0x10000000) - -#define NETARM_GEN_SYS_CFG_WDOG_EN (0x01000000) -#define NETARM_GEN_SYS_CFG_WDOG_IRQ (0x00000000) -#define NETARM_GEN_SYS_CFG_WDOG_FIQ (0x00400000) -#define NETARM_GEN_SYS_CFG_WDOG_RST (0x00800000) -#define NETARM_GEN_SYS_CFG_WDOG_24 (0x00000000) -#define NETARM_GEN_SYS_CFG_WDOG_26 (0x00100000) -#define NETARM_GEN_SYS_CFG_WDOG_28 (0x00200000) -#define NETARM_GEN_SYS_CFG_WDOG_29 (0x00300000) - -#define NETARM_GEN_SYS_CFG_BUSMON_EN (0x00040000) -#define NETARM_GEN_SYS_CFG_BUSMON_128 (0x00000000) -#define NETARM_GEN_SYS_CFG_BUSMON_64 (0x00010000) -#define NETARM_GEN_SYS_CFG_BUSMON_32 (0x00020000) -#define NETARM_GEN_SYS_CFG_BUSMON_16 (0x00030000) - -#define NETARM_GEN_SYS_CFG_USER_EN (0x00008000) -#define NETARM_GEN_SYS_CFG_BUSER_EN (0x00004000) - -#define NETARM_GEN_SYS_CFG_BUSARB_INT (0x00002000) -#define NETARM_GEN_SYS_CFG_BUSARB_EXT (0x00000000) - -#define NETARM_GEN_SYS_CFG_DMATST (0x00001000) - -#define NETARM_GEN_SYS_CFG_TEALAST (0x00000800) - -#define NETARM_GEN_SYS_CFG_ALIGN_ABORT (0x00000400) - -#define NETARM_GEN_SYS_CFG_CACHE_EN (0x00000200) - -#define NETARM_GEN_SYS_CFG_WRI_BUF_EN (0x00000100) - -#define NETARM_GEN_SYS_CFG_CACHE_INIT (0x00000080) - -/* PLL Control Register ( 0xFFB0_0008 ) */ - -#define NETARM_GEN_PLL_CTL_PLLCNT_MASK (0x0F000000) - -#define NETARM_GEN_PLL_CTL_PLLCNT(x) (((x)<<24) & \ - NETARM_GEN_PLL_CTL_PLLCNT_MASK) - -/* Defaults for POLTST and ICP Fields in PLL CTL */ -#define NETARM_GEN_PLL_CTL_OUTDIV(x) (x) -#define NETARM_GEN_PLL_CTL_INDIV(x) ((x)<<6) -#define NETARM_GEN_PLL_CTL_POLTST_DEF (0x00000E00) -#define NETARM_GEN_PLL_CTL_ICP_DEF (0x0000003C) - - -/* Software Service Register ( 0xFFB0_000C ) */ - -#define NETARM_GEN_SW_SVC_RESETA (0x123) -#define NETARM_GEN_SW_SVC_RESETB (0x321) - -/* PORT C Register ( 0xFFB0_0028 ) */ - -#ifndef CONFIG_NETARM_NS7520 -#define NETARM_GEN_PORT_MODE(x) (((x)<<24) + (0xFF00)) -#define NETARM_GEN_PORT_DIR(x) (((x)<<16) + (0xFF00)) -#else -#define NETARM_GEN_PORT_MODE(x) ((x)<<24) -#define NETARM_GEN_PORT_DIR(x) ((x)<<16) -#define NETARM_GEN_PORT_CSF(x) ((x)<<8) -#endif - -/* Timer Registers ( 0xFFB0_0010 0xFFB0_0018 ) */ - -#define NETARM_GEN_TCTL_ENABLE (0x80000000) -#define NETARM_GEN_TCTL_INT_ENABLE (0x40000000) - -#define NETARM_GEN_TCTL_USE_IRQ (0x00000000) -#define NETARM_GEN_TCTL_USE_FIQ (0x20000000) - -#define NETARM_GEN_TCTL_USE_PRESCALE (0x10000000) -#define NETARM_GEN_TCTL_INIT_COUNT(x) ((x) & 0x1FF) - -#define NETARM_GEN_TSTAT_INTPEN (0x40000000) -#if ~defined(CONFIG_NETARM_NS7520) -#define NETARM_GEN_TSTAT_CTC_MASK (0x000001FF) -#else -#define NETARM_GEN_TSTAT_CTC_MASK (0x0FFFFFFF) -#endif - -/* prescale to msecs conversion */ - -#if !defined(CONFIG_NETARM_PLL_BYPASS) -#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 20480 ) * ( 0x1FF - ( (x) & \ - NETARM_GEN_TSTAT_CTC_MASK ) + \ - 1 ) ) / (NETARM_XTAL_FREQ/1000) ) - -#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(20480*(x)))-1) & \ - NETARM_GEN_TSTAT_CTC_MASK ) | \ - NETARM_GEN_TCTL_USE_PRESCALE ) - -#else -#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 4096 ) * ( 0x1FF - ( (x) & \ - NETARM_GEN_TSTAT_CTC_MASK ) + \ - 1 ) ) / (NETARM_XTAL_FREQ/1000) ) - -#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(4096*(x)))-1) & \ - NETARM_GEN_TSTAT_CTC_MASK ) | \ - NETARM_GEN_TCTL_USE_PRESCALE ) -#endif - -#endif diff --git a/arch/arm/include/asm/arch-arm720t/netarm_mem_module.h b/arch/arm/include/asm/arch-arm720t/netarm_mem_module.h deleted file mode 100644 index c650c3b..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_mem_module.h +++ /dev/null @@ -1,184 +0,0 @@ -/* - * include/asm-armnommu/arch-netarm/netarm_mem_module.h - * - * Copyright (C) 2005 - * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> - * - * Copyright (C) 2000, 2001 NETsilicon, Inc. - * Copyright (C) 2000, 2001 Red Hat, Inc. - * - * This software is copyrighted by Red Hat. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall Red Hat - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Joe deBlaquiere - * - * Modified to support NS7520 by Art Shipkowski. - */ - -#ifndef __NETARM_MEM_MODULE_REGISTERS_H -#define __NETARM_MEM_MODULE_REGISTERS_H - -/* GEN unit register offsets */ - -#define NETARM_MEM_MODULE_BASE (0xFFC00000) - -#define NETARM_MEM_MODULE_CONFIG (0x00) -#define NETARM_MEM_CS0_BASE_ADDR (0x10) -#define NETARM_MEM_CS0_OPTIONS (0x14) -#define NETARM_MEM_CS1_BASE_ADDR (0x20) -#define NETARM_MEM_CS1_OPTIONS (0x24) -#define NETARM_MEM_CS2_BASE_ADDR (0x30) -#define NETARM_MEM_CS2_OPTIONS (0x34) -#define NETARM_MEM_CS3_BASE_ADDR (0x40) -#define NETARM_MEM_CS3_OPTIONS (0x44) -#define NETARM_MEM_CS4_BASE_ADDR (0x50) -#define NETARM_MEM_CS4_OPTIONS (0x54) - -/* select bitfield defintions */ - -/* Module Configuration Register ( 0xFFC0_0000 ) */ - -#define NETARM_MEM_CFG_REFR_COUNT_MASK (0xFF000000) -#define NETARM_MEM_CFG_REFRESH_EN (0x00800000) - -#define NETARM_MEM_CFG_REFR_CYCLE_8CLKS (0x00000000) -#define NETARM_MEM_CFG_REFR_CYCLE_6CLKS (0x00200000) -#define NETARM_MEM_CFG_REFR_CYCLE_5CLKS (0x00400000) -#define NETARM_MEM_CFG_REFR_CYCLE_4CLKS (0x00600000) - -#define NETARM_MEM_CFG_PORTC_AMUX (0x00100000) - -#define NETARM_MEM_CFG_A27_ADDR (0x00080000) -#define NETARM_MEM_CFG_A27_CS0OE (0x00000000) - -#define NETARM_MEM_CFG_A26_ADDR (0x00040000) -#define NETARM_MEM_CFG_A26_CS0WE (0x00000000) - -#define NETARM_MEM_CFG_A25_ADDR (0x00020000) -#define NETARM_MEM_CFG_A25_BLAST (0x00000000) - -#define NETARM_MEM_CFG_PORTC_AMUX2 (0x00010000) - - -/* range on this period is about 1 to 275 usec (with 18.432MHz clock) */ -/* the expression will round down, so make sure to reverse it to verify */ -/* it is what you want. period = [( count + 1 ) * 20] / Fcrystal */ -/* (note: Fxtal = Fcrystal/5, see HWRefGuide sections 8.2.5 and 11.3.2) */ - -#define NETARM_MEM_REFR_PERIOD_USEC(p) (NETARM_MEM_CFG_REFR_COUNT_MASK & \ - (((((NETARM_XTAL_FREQ/(1000))*p)/(20000) \ - ) - (1) ) << (24))) - -#if 0 -/* range on this period is about 1 to 275 usec (with 18.432MHz clock) */ -/* the expression will round down, so make sure to reverse it toverify */ -/* it is what you want. period = [( count + 1 ) * 4] / Fxtal */ - -#define NETARM_MEM_REFR_PERIOD_USEC(p) (NETARM_MEM_CFG_REFR_COUNT_MASK & \ - (((((NETARM_XTAL_FREQ/(1000))*p)/(4000) \ - ) - (1) ) << (24))) -#endif - -/* Base Address Registers (0xFFC0_00X0) */ - -#define NETARM_MEM_BAR_BASE_MASK (0xFFFFF000) - -/* macro to define base */ - -#define NETARM_MEM_BAR_BASE(x) ((x) & NETARM_MEM_BAR_BASE_MASK) - -#define NETARM_MEM_BAR_DRAM_FP (0x00000000) -#define NETARM_MEM_BAR_DRAM_EDO (0x00000100) -#define NETARM_MEM_BAR_DRAM_SYNC (0x00000200) - -#define NETARM_MEM_BAR_DRAM_MUX_INT (0x00000000) -#define NETARM_MEM_BAR_DRAM_MUX_EXT (0x00000080) - -#define NETARM_MEM_BAR_DRAM_MUX_BAL (0x00000000) -#define NETARM_MEM_BAR_DRAM_MUX_UNBAL (0x00000020) - -#define NETARM_MEM_BAR_1BCLK_IDLE (0x00000010) - -#define NETARM_MEM_BAR_DRAM_SEL (0x00000008) - -#define NETARM_MEM_BAR_BURST_EN (0x00000004) - -#define NETARM_MEM_BAR_WRT_PROT (0x00000002) - -#define NETARM_MEM_BAR_VALID (0x00000001) - -/* Option Registers (0xFFC0_00X4) */ - -/* macro to define which bits of the base are significant */ - -#define NETARM_MEM_OPT_BASE_USE(x) ((x) & NETARM_MEM_BAR_BASE_MASK) - -#define NETARM_MEM_OPT_WAIT_MASK (0x00000F00) - -#define NETARM_MEM_OPT_WAIT_STATES(x) (((x) << 8 ) & NETARM_MEM_OPT_WAIT_MASK ) - -#define NETARM_MEM_OPT_BCYC_1 (0x00000000) -#define NETARM_MEM_OPT_BCYC_2 (0x00000040) -#define NETARM_MEM_OPT_BCYC_3 (0x00000080) -#define NETARM_MEM_OPT_BCYC_4 (0x000000C0) - -#define NETARM_MEM_OPT_BSIZE_2 (0x00000000) -#define NETARM_MEM_OPT_BSIZE_4 (0x00000010) -#define NETARM_MEM_OPT_BSIZE_8 (0x00000020) -#define NETARM_MEM_OPT_BSIZE_16 (0x00000030) - -#define NETARM_MEM_OPT_32BIT (0x00000000) -#define NETARM_MEM_OPT_16BIT (0x00000004) -#define NETARM_MEM_OPT_8BIT (0x00000008) -#define NETARM_MEM_OPT_32BIT_EXT_ACK (0x0000000C) - -#define NETARM_MEM_OPT_BUS_SIZE_MASK (0x0000000C) - -#define NETARM_MEM_OPT_READ_ASYNC (0x00000000) -#define NETARM_MEM_OPT_READ_SYNC (0x00000002) - -#define NETARM_MEM_OPT_WRITE_ASYNC (0x00000000) -#define NETARM_MEM_OPT_WRITE_SYNC (0x00000001) - -#ifdef CONFIG_NETARM_NS7520 -/* The NS7520 has a second options register for each chip select */ -#define NETARM_MEM_CS0_OPTIONS_B (0x18) -#define NETARM_MEM_CS1_OPTIONS_B (0x28) -#define NETARM_MEM_CS2_OPTIONS_B (0x38) -#define NETARM_MEM_CS3_OPTIONS_B (0x48) -#define NETARM_MEM_CS4_OPTIONS_B (0x58) - -/* Option B Registers (0xFFC0_00x8) */ -#define NETARM_MEM_OPTB_SYNC_1_STAGE (0x00000001) -#define NETARM_MEM_OPTB_SYNC_2_STAGE (0x00000002) -#define NETARM_MEM_OPTB_BCYC_PLUS0 (0x00000000) -#define NETARM_MEM_OPTB_BCYC_PLUS4 (0x00000004) -#define NETARM_MEM_OPTB_BCYC_PLUS8 (0x00000008) -#define NETARM_MEM_OPTB_BCYC_PLUS12 (0x0000000C) - -#define NETARM_MEM_OPTB_WAIT_PLUS0 (0x00000000) -#define NETARM_MEM_OPTB_WAIT_PLUS16 (0x00000010) -#define NETARM_MEM_OPTB_WAIT_PLUS32 (0x00000020) -#define NETARM_MEM_OPTB_WAIT_PLUS48 (0x00000030) -#endif - -#endif diff --git a/arch/arm/include/asm/arch-arm720t/netarm_registers.h b/arch/arm/include/asm/arch-arm720t/netarm_registers.h deleted file mode 100644 index fa88128..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_registers.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * linux/include/asm-arm/arch-netarm/netarm_registers.h - * - * Copyright (C) 2005 - * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> - * - * Copyright (C) 2000, 2001 NETsilicon, Inc. - * Copyright (C) 2000, 2001 WireSpeed Communications Corporation - * - * This software is copyrighted by WireSpeed. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall WireSpeed - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Joe deBlaquiere - * - * Modified to support NS7520 by Art Shipkowski. - */ - -#ifndef __NET_ARM_REGISTERS_H -#define __NET_ARM_REGISTERS_H - -#include <config.h> - -/* fundamental constants : */ -/* the input crystal/clock frequency ( in Hz ) */ -#define NETARM_XTAL_FREQ_25MHz (18432000) -#define NETARM_XTAL_FREQ_33MHz (23698000) -#define NETARM_XTAL_FREQ_48MHz (48000000) -#define NETARM_XTAL_FREQ_55MHz (55000000) -#define NETARM_XTAL_FREQ_EMLIN1 (20000000) - -/* the frequency of SYS_CLK */ -#if defined(CONFIG_NETARM_EMLIN) - -/* EMLIN board: 33 MHz (exp.) */ -#define NETARM_PLL_COUNT_VAL 6 -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz - -#elif defined(CONFIG_NETARM_NET40_REV2) - -/* NET+40 Rev2 boards: 33 MHz (with NETARM_XTAL_FREQ_25MHz) */ -#define NETARM_PLL_COUNT_VAL 6 -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz - -#elif defined(CONFIG_NETARM_NET40_REV4) - -/* NET+40 Rev4 boards with EDO must clock slower: 25 MHz (with - NETARM_XTAL_FREQ_25MHz) 4 */ -#define NETARM_PLL_COUNT_VAL 4 -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz - -#elif defined(CONFIG_NETARM_NET50) - -/* NET+50 boards: 40 MHz (with NETARM_XTAL_FREQ_25MHz) */ -#define NETARM_PLL_COUNT_VAL 8 -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz - -#else /* CONFIG_NETARM_NS7520 */ - -#define NETARM_PLL_COUNT_VAL 0 - -#if defined(CONFIG_BOARD_UNC20) -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_48MHz -#else -#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_55MHz -#endif - -#endif - -/* #include "arm_registers.h" */ -#include <asm/arch/netarm_gen_module.h> -#include <asm/arch/netarm_mem_module.h> -#include <asm/arch/netarm_ser_module.h> -#include <asm/arch/netarm_eni_module.h> -#include <asm/arch/netarm_dma_module.h> -#include <asm/arch/netarm_eth_module.h> - -#endif diff --git a/arch/arm/include/asm/arch-arm720t/netarm_ser_module.h b/arch/arm/include/asm/arch-arm720t/netarm_ser_module.h deleted file mode 100644 index 6fbae11..0000000 --- a/arch/arm/include/asm/arch-arm720t/netarm_ser_module.h +++ /dev/null @@ -1,347 +0,0 @@ -/* - * linux/include/asm-arm/arch-netarm/netarm_ser_module.h - * - * Copyright (C) 2000 NETsilicon, Inc. - * Copyright (C) 2000 Red Hat, Inc. - * - * This software is copyrighted by Red Hat. LICENSEE agrees that - * it will not delete this copyright notice, trademarks or protective - * notices from any copy made by LICENSEE. - * - * This software is provided "AS-IS" and any express or implied - * warranties or conditions, including but not limited to any - * implied warranties of merchantability and fitness for a particular - * purpose regarding this software. In no event shall Red Hat - * be liable for any indirect, consequential, or incidental damages, - * loss of profits or revenue, loss of use or data, or interruption - * of business, whether the alleged damages are labeled in contract, - * tort, or indemnity. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * author(s) : Joe deBlaquiere - * Clark Williams - */ - -#ifndef __NETARM_SER_MODULE_REGISTERS_H -#define __NETARM_SER_MODULE_REGISTERS_H - -#ifndef __ASSEMBLER__ - -/* (--sub)#include "types.h" */ - -/* serial channel control structure */ -typedef struct { - u32 ctrl_a; - u32 ctrl_b; - u32 status_a; - u32 bitrate; - u32 fifo; - u32 rx_buf_timer; - u32 rx_char_timer; - u32 rx_match; - u32 rx_match_mask; - u32 ctrl_c; - u32 status_b; - u32 status_c; - u32 fifo_last; - u32 unused[3]; -} netarm_serial_channel_t; - -#endif - -/* SER unit register offsets */ - -/* #ifdef CONFIG_ARCH_NETARM */ -#define NETARM_SER_MODULE_BASE (0xFFD00000) -/* #else */ -/* extern serial_channel_t netarm_dummy_registers[]; */ -/* #define NETARM_SER_MODULE_BASE (netarm_dummy_registers) */ -/* #ifndef NETARM_XTAL_FREQ */ -/* #define NETARM_XTAL_FREQ 18432000 */ -/* #endif */ -/* #endif */ - -/* calculate the sysclk value from the pll setting */ -#define NETARM_PLLED_SYSCLK_FREQ (( NETARM_XTAL_FREQ / 5 ) * \ - ( NETARM_PLL_COUNT_VAL + 3 )) - -#define get_serial_channel(c) (&(((netarm_serial_channel_t *)NETARM_SER_MODULE_BASE)[c])) - -#define NETARM_SER_CH1_CTRL_A (0x00) -#define NETARM_SER_CH1_CTRL_B (0x04) -#define NETARM_SER_CH1_STATUS_A (0x08) -#define NETARM_SER_CH1_BITRATE (0x0C) -#define NETARM_SER_CH1_FIFO (0x10) -#define NETARM_SER_CH1_RX_BUF_TMR (0x14) -#define NETARM_SER_CH1_RX_CHAR_TMR (0x18) -#define NETARM_SER_CH1_RX_MATCH (0x1c) -#define NETARM_SER_CH1_RX_MATCH_MASK (0x20) -#define NETARM_SER_CH1_CTRL_C (0x24) -#define NETARM_SER_CH1_STATUS_B (0x28) -#define NETARM_SER_CH1_STATUS_C (0x2c) -#define NETARM_SER_CH1_FIFO_LAST (0x30) - -#define NETARM_SER_CH2_CTRL_A (0x40) -#define NETARM_SER_CH2_CTRL_B (0x44) -#define NETARM_SER_CH2_STATUS_A (0x48) -#define NETARM_SER_CH2_BITRATE (0x4C) -#define NETARM_SER_CH2_FIFO (0x50) -#define NETARM_SER_CH2_RX_BUF_TMR (0x54) -#define NETARM_SER_CH2_RX_CHAR_TMR (0x58) -#define NETARM_SER_CH2_RX_MATCH (0x5c) -#define NETARM_SER_CH2_RX_MATCH_MASK (0x60) -#define NETARM_SER_CH2_CTRL_C (0x64) -#define NETARM_SER_CH2_STATUS_B (0x68) -#define NETARM_SER_CH2_STATUS_C (0x6c) -#define NETARM_SER_CH2_FIFO_LAST (0x70) - -/* select bitfield defintions */ - -/* Control Register A */ - -#define NETARM_SER_CTLA_ENABLE (0x80000000) -#define NETARM_SER_CTLA_BRK (0x40000000) - -#define NETARM_SER_CTLA_STICKP (0x20000000) - -#define NETARM_SER_CTLA_P_EVEN (0x18000000) -#define NETARM_SER_CTLA_P_ODD (0x08000000) -#define NETARM_SER_CTLA_P_NONE (0x00000000) - -/* if you read the errata, you will find that the STOP bits don't work right */ -#define NETARM_SER_CTLA_2STOP (0x00000000) -#define NETARM_SER_CTLA_3STOP (0x04000000) - -#define NETARM_SER_CTLA_5BITS (0x00000000) -#define NETARM_SER_CTLA_6BITS (0x01000000) -#define NETARM_SER_CTLA_7BITS (0x02000000) -#define NETARM_SER_CTLA_8BITS (0x03000000) - -#define NETARM_SER_CTLA_CTSTX (0x00800000) -#define NETARM_SER_CTLA_RTSRX (0x00400000) - -#define NETARM_SER_CTLA_LOOP_REM (0x00200000) -#define NETARM_SER_CTLA_LOOP_LOC (0x00100000) - -#define NETARM_SER_CTLA_GPIO2 (0x00080000) -#define NETARM_SER_CTLA_GPIO1 (0x00040000) - -#define NETARM_SER_CTLA_DTR_EN (0x00020000) -#define NETARM_SER_CTLA_RTS_EN (0x00010000) - -#define NETARM_SER_CTLA_IE_RX_BRK (0x00008000) -#define NETARM_SER_CTLA_IE_RX_FRMERR (0x00004000) -#define NETARM_SER_CTLA_IE_RX_PARERR (0x00002000) -#define NETARM_SER_CTLA_IE_RX_OVERRUN (0x00001000) -#define NETARM_SER_CTLA_IE_RX_RDY (0x00000800) -#define NETARM_SER_CTLA_IE_RX_HALF (0x00000400) -#define NETARM_SER_CTLA_IE_RX_FULL (0x00000200) -#define NETARM_SER_CTLA_IE_RX_DMAEN (0x00000100) -#define NETARM_SER_CTLA_IE_RX_DCD (0x00000080) -#define NETARM_SER_CTLA_IE_RX_RI (0x00000040) -#define NETARM_SER_CTLA_IE_RX_DSR (0x00000020) - -#define NETARM_SER_CTLA_IE_RX_ALL (NETARM_SER_CTLA_IE_RX_BRK \ - |NETARM_SER_CTLA_IE_RX_FRMERR \ - |NETARM_SER_CTLA_IE_RX_PARERR \ - |NETARM_SER_CTLA_IE_RX_OVERRUN \ - |NETARM_SER_CTLA_IE_RX_RDY \ - |NETARM_SER_CTLA_IE_RX_HALF \ - |NETARM_SER_CTLA_IE_RX_FULL \ - |NETARM_SER_CTLA_IE_RX_DMAEN \ - |NETARM_SER_CTLA_IE_RX_DCD \ - |NETARM_SER_CTLA_IE_RX_RI \ - |NETARM_SER_CTLA_IE_RX_DSR) - -#define NETARM_SER_CTLA_IE_TX_CTS (0x00000010) -#define NETARM_SER_CTLA_IE_TX_EMPTY (0x00000008) -#define NETARM_SER_CTLA_IE_TX_HALF (0x00000004) -#define NETARM_SER_CTLA_IE_TX_FULL (0x00000002) -#define NETARM_SER_CTLA_IE_TX_DMAEN (0x00000001) - -#define NETARM_SER_CTLA_IE_TX_ALL (NETARM_SER_CTLA_IE_TX_CTS \ - |NETARM_SER_CTLA_IE_TX_EMPTY \ - |NETARM_SER_CTLA_IE_TX_HALF \ - |NETARM_SER_CTLA_IE_TX_FULL \ - |NETARM_SER_CTLA_IE_TX_DMAEN) - -/* Control Register B */ - -#define NETARM_SER_CTLB_MATCH1_EN (0x80000000) -#define NETARM_SER_CTLB_MATCH2_EN (0x40000000) -#define NETARM_SER_CTLB_MATCH3_EN (0x20000000) -#define NETARM_SER_CTLB_MATCH4_EN (0x10000000) - -#define NETARM_SER_CTLB_RBGT_EN (0x08000000) -#define NETARM_SER_CTLB_RCGT_EN (0x04000000) - -#define NETARM_SER_CTLB_UART_MODE (0x00000000) -#define NETARM_SER_CTLB_HDLC_MODE (0x00100000) -#define NETARM_SER_CTLB_SPI_MAS_MODE (0x00200000) -#define NETARM_SER_CTLB_SPI_SLV_MODE (0x00300000) - -#define NETARM_SER_CTLB_REV_BIT_ORDER (0x00080000) - -#define NETARM_SER_CTLB_MAM1 (0x00040000) -#define NETARM_SER_CTLB_MAM2 (0x00020000) - -/* Status Register A */ - -#define NETARM_SER_STATA_MATCH1 (0x80000000) -#define NETARM_SER_STATA_MATCH2 (0x40000000) -#define NETARM_SER_STATA_MATCH3 (0x20000000) -#define NETARM_SER_STATA_MATCH4 (0x10000000) - -#define NETARM_SER_STATA_BGAP (0x80000000) -#define NETARM_SER_STATA_CGAP (0x40000000) - -#define NETARM_SER_STATA_RX_1B (0x00100000) -#define NETARM_SER_STATA_RX_2B (0x00200000) -#define NETARM_SER_STATA_RX_3B (0x00300000) -#define NETARM_SER_STATA_RX_4B (0x00000000) - -/* downshifted values */ - -#define NETARM_SER_STATA_RXFDB_1BYTES (0x001) -#define NETARM_SER_STATA_RXFDB_2BYTES (0x002) -#define NETARM_SER_STATA_RXFDB_3BYTES (0x003) -#define NETARM_SER_STATA_RXFDB_4BYTES (0x000) - -#define NETARM_SER_STATA_RXFDB_MASK (0x00300000) -#define NETARM_SER_STATA_RXFDB(x) (((x) & NETARM_SER_STATA_RXFDB_MASK) \ - >> 20) - -#define NETARM_SER_STATA_DCD (0x00080000) -#define NETARM_SER_STATA_RI (0x00040000) -#define NETARM_SER_STATA_DSR (0x00020000) -#define NETARM_SER_STATA_CTS (0x00010000) - -#define NETARM_SER_STATA_RX_BRK (0x00008000) -#define NETARM_SER_STATA_RX_FRMERR (0x00004000) -#define NETARM_SER_STATA_RX_PARERR (0x00002000) -#define NETARM_SER_STATA_RX_OVERRUN (0x00001000) -#define NETARM_SER_STATA_RX_RDY (0x00000800) -#define NETARM_SER_STATA_RX_HALF (0x00000400) -#define NETARM_SER_STATA_RX_CLOSED (0x00000200) -#define NETARM_SER_STATA_RX_FULL (0x00000100) -#define NETARM_SER_STATA_RX_DCD (0x00000080) -#define NETARM_SER_STATA_RX_RI (0x00000040) -#define NETARM_SER_STATA_RX_DSR (0x00000020) - -#define NETARM_SER_STATA_TX_CTS (0x00000010) -#define NETARM_SER_STATA_TX_RDY (0x00000008) -#define NETARM_SER_STATA_TX_HALF (0x00000004) -#define NETARM_SER_STATA_TX_FULL (0x00000002) -#define NETARM_SER_STATA_TX_DMAEN (0x00000001) - -/* you have to clear all receive signals to get the fifo to move forward */ -#define NETARM_SER_STATA_CLR_ALL (NETARM_SER_STATA_RX_BRK | \ - NETARM_SER_STATA_RX_FRMERR | \ - NETARM_SER_STATA_RX_PARERR | \ - NETARM_SER_STATA_RX_OVERRUN | \ - NETARM_SER_STATA_RX_HALF | \ - NETARM_SER_STATA_RX_CLOSED | \ - NETARM_SER_STATA_RX_FULL | \ - NETARM_SER_STATA_RX_DCD | \ - NETARM_SER_STATA_RX_RI | \ - NETARM_SER_STATA_RX_DSR | \ - NETARM_SER_STATA_TX_CTS ) - -/* Bit Rate Registers */ - -#define NETARM_SER_BR_EN (0x80000000) -#define NETARM_SER_BR_TMODE (0x40000000) - -#define NETARM_SER_BR_RX_CLK_INT (0x00000000) -#define NETARM_SER_BR_RX_CLK_EXT (0x20000000) -#define NETARM_SER_BR_TX_CLK_INT (0x00000000) -#define NETARM_SER_BR_TX_CLK_EXT (0x10000000) - -#define NETARM_SER_BR_RX_CLK_DRV (0x08000000) -#define NETARM_SER_BR_TX_CLK_DRV (0x04000000) - -#define NETARM_SER_BR_CLK_EXT_5 (0x00000000) -#define NETARM_SER_BR_CLK_SYSTEM (0x01000000) -#define NETARM_SER_BR_CLK_OUT1A (0x02000000) -#define NETARM_SER_BR_CLK_OUT2A (0x03000000) - -#define NETARM_SER_BR_TX_CLK_INV (0x00800000) -#define NETARM_SER_BR_RX_CLK_INV (0x00400000) - -/* complete settings assuming system clock input is 18MHz */ - -#define NETARM_SER_BR_MASK (0x000007FF) - -/* bit rate determined from equation Fbr = Fxtal / [ 10 * ( N + 1 ) ] */ -/* from section 7.5.4 of HW Ref Guide */ - -/* #ifdef CONFIG_NETARM_PLL_BYPASS */ -#define NETARM_SER_BR_X16(x) ( NETARM_SER_BR_EN | \ - NETARM_SER_BR_RX_CLK_INT | \ - NETARM_SER_BR_TX_CLK_INT | \ - NETARM_SER_BR_CLK_EXT_5 | \ - ( ( ( ( NETARM_XTAL_FREQ / \ - ( x * 10 ) ) - 1 ) / 16 ) & \ - NETARM_SER_BR_MASK ) ) -/* -#else -#define NETARM_SER_BR_X16(x) ( NETARM_SER_BR_EN | \ - NETARM_SER_BR_RX_CLK_INT | \ - NETARM_SER_BR_TX_CLK_INT | \ - NETARM_SER_BR_CLK_SYSTEM | \ - ( ( ( ( NETARM_PLLED_SYSCLK_FREQ / \ - ( x * 2 ) ) - 1 ) / 16 ) & \ - NETARM_SER_BR_MASK ) ) -#endif -*/ - -/* Receive Buffer Gap Timer */ - -#define NETARM_SER_RX_GAP_TIMER_EN (0x80000000) -#define NETARM_SER_RX_GAP_MASK (0x00003FFF) - -/* rx gap is a function of bit rate x */ - -/* #ifdef CONFIG_NETARM_PLL_BYPASS */ -#define NETARM_SER_RXGAP(x) ( NETARM_SER_RX_GAP_TIMER_EN | \ - ( ( ( ( 10 * NETARM_XTAL_FREQ ) / \ - ( x * 5 * 512 ) ) - 1 ) & \ - NETARM_SER_RX_GAP_MASK ) ) -/* -#else -#define NETARM_SER_RXGAP(x) ( NETARM_SER_RX_GAP_TIMER_EN | \ - ( ( ( ( 2 * NETARM_PLLED_SYSCLK_FREQ ) / \ - ( x * 512 ) ) - 1 ) & \ - NETARM_SER_RX_GAP_MASK ) ) -#endif -*/ - -#if 0 -#define NETARM_SER_RXGAP(x) ( NETARM_SER_RX_GAP_TIMER_EN | \ - ( ( ( ( 2 * NETARM_PLLED_SYSCLK_FREQ ) / \ - ( x * 5 * 512 ) ) - 1 ) & \ - NETARM_SER_RX_GAP_MASK ) ) -#define NETARM_SER_RXGAP(x) ( NETARM_SER_RX_GAP_TIMER_EN | \ - ( ( ( ( 10 * NETARM_XTAL_FREQ ) / \ - ( x * 512 ) ) - 1 ) & \ - NETARM_SER_RX_GAP_MASK ) ) -#endif - -#define MIN_BAUD_RATE 600 -#define MAX_BAUD_RATE 115200 - -/* the default BAUD rate for the BOOTLOADER, there is a separate */ -/* setting in the serial driver <arch/armnommu/drivers/char/serial-netarm.h> */ -#define DEFAULT_BAUD_RATE 9600 -#define NETARM_SER_FIFO_SIZE 32 -#define MIN_GAP 0 - -#endif diff --git a/arch/arm/include/asm/arch-armada100/armada100.h b/arch/arm/include/asm/arch-armada100/armada100.h deleted file mode 100644 index d5d125a..0000000 --- a/arch/arm/include/asm/arch-armada100/armada100.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * (C) Copyright 2010 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * Contributor: Mahavir Jain <mjain@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ASM_ARCH_ARMADA100_H -#define _ASM_ARCH_ARMADA100_H - -#ifndef __ASSEMBLY__ -#include <asm/types.h> -#include <asm/io.h> -#endif /* __ASSEMBLY__ */ - -#if defined (CONFIG_ARMADA100) -#include <asm/arch/cpu.h> - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1<<1) /* Functional Clock Enable */ -#define APBC_RST (1<<2) /* Reset Generation */ -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -/* Register Base Addresses */ -#define ARMD1_DRAM_BASE 0xB0000000 -#define ARMD1_TIMER_BASE 0xD4014000 -#define ARMD1_APBC1_BASE 0xD4015000 -#define ARMD1_APBC2_BASE 0xD4015800 -#define ARMD1_UART1_BASE 0xD4017000 -#define ARMD1_UART2_BASE 0xD4018000 -#define ARMD1_GPIO_BASE 0xD4019000 -#define ARMD1_SSP1_BASE 0xD401B000 -#define ARMD1_SSP2_BASE 0xD401C000 -#define ARMD1_MFPR_BASE 0xD401E000 -#define ARMD1_SSP3_BASE 0xD401F000 -#define ARMD1_SSP4_BASE 0xD4020000 -#define ARMD1_SSP5_BASE 0xD4021000 -#define ARMD1_UART3_BASE 0xD4026000 -#define ARMD1_MPMU_BASE 0xD4050000 -#define ARMD1_APMU_BASE 0xD4282800 -#define ARMD1_CPU_BASE 0xD4282C00 - -/* - * Main Power Management (MPMU) Registers - * Refer Datasheet Appendix A.8 - */ -struct armd1mpmu_registers { - u8 pad0[0x08 - 0x00]; - u32 fccr; /*0x0008*/ - u32 pocr; /*0x000c*/ - u32 posr; /*0x0010*/ - u32 succr; /*0x0014*/ - u8 pad1[0x030 - 0x014 - 4]; - u32 gpcr; /*0x0030*/ - u8 pad2[0x200 - 0x030 - 4]; - u32 wdtpcr; /*0x0200*/ - u8 pad3[0x1000 - 0x200 - 4]; - u32 apcr; /*0x1000*/ - u32 apsr; /*0x1004*/ - u8 pad4[0x1020 - 0x1004 - 4]; - u32 aprr; /*0x1020*/ - u32 acgr; /*0x1024*/ - u32 arsr; /*0x1028*/ -}; - -/* - * APB1 Clock Reset/Control Registers - * Refer Datasheet Appendix A.10 - */ -struct armd1apb1_registers { - u32 uart1; /*0x000*/ - u32 uart2; /*0x004*/ - u32 gpio; /*0x008*/ - u32 pwm1; /*0x00c*/ - u32 pwm2; /*0x010*/ - u32 pwm3; /*0x014*/ - u32 pwm4; /*0x018*/ - u8 pad0[0x028 - 0x018 - 4]; - u32 rtc; /*0x028*/ - u32 twsi0; /*0x02c*/ - u32 kpc; /*0x030*/ - u32 timers; /*0x034*/ - u8 pad1[0x03c - 0x034 - 4]; - u32 aib; /*0x03c*/ - u32 sw_jtag; /*0x040*/ - u32 timer1; /*0x044*/ - u32 onewire; /*0x048*/ - u8 pad2[0x050 - 0x048 - 4]; - u32 asfar; /*0x050 AIB Secure First Access Reg*/ - u32 assar; /*0x054 AIB Secure Second Access Reg*/ - u8 pad3[0x06c - 0x054 - 4]; - u32 twsi1; /*0x06c*/ - u32 uart3; /*0x070*/ - u8 pad4[0x07c - 0x070 - 4]; - u32 timer2; /*0x07C*/ - u8 pad5[0x084 - 0x07c - 4]; - u32 ac97; /*0x084*/ -}; - -#endif /* CONFIG_ARMADA100 */ -#endif /* _ASM_ARCH_ARMADA100_H */ diff --git a/arch/arm/include/asm/arch-armada100/config.h b/arch/arm/include/asm/arch-armada100/config.h deleted file mode 100644 index d804002..0000000 --- a/arch/arm/include/asm/arch-armada100/config.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/* - * This file should be included in board config header file. - * - * It supports common definitions for Armada100 platform - */ - -#ifndef _ARMD1_CONFIG_H -#define _ARMD1_CONFIG_H - -#define CONFIG_ARM926EJS 1 /* Basic Architecture */ - -#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ -#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ -#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ -#define MV_MFPR_BASE ARMD1_MFPR_BASE -#define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE -#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register - represents UART Unit Enable */ - -#endif /* _ARMD1_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-armada100/cpu.h b/arch/arm/include/asm/arch-armada100/cpu.h deleted file mode 100644 index 0518a6a..0000000 --- a/arch/arm/include/asm/arch-armada100/cpu.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * (C) Copyright 2010 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com>, Contributor: Mahavir Jain <mjain@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ARMADA100CPU_H -#define _ARMADA100CPU_H - -#include <asm/io.h> -#include <asm/system.h> - -/* - * CPU Interface Registers - * Refer Datasheet Appendix A.2 - */ -struct armd1cpu_registers { - u32 chip_id; /* Chip Id Reg */ - u32 pad; - u32 cpu_conf; /* CPU Conf Reg */ - u32 pad1; - u32 cpu_sram_spd; /* CPU SRAM Speed Reg */ - u32 pad2; - u32 cpu_l2c_spd; /* CPU L2cache Speed Conf */ - u32 mcb_conf; /* MCB Conf Reg */ - u32 sys_boot_ctl; /* Sytem Boot Control */ -}; - -/* - * Functions - */ -u32 armd1_sdram_base(int); -u32 armd1_sdram_size(int); - -#endif /* _ARMADA100CPU_H */ diff --git a/arch/arm/include/asm/arch-armada100/mfp.h b/arch/arm/include/asm/arch-armada100/mfp.h deleted file mode 100644 index d21a79f..0000000 --- a/arch/arm/include/asm/arch-armada100/mfp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Based on linux/arch/arm/mach-mpp/include/mfp-pxa168.h - * (C) Copyright 2007 - * Marvell Semiconductor <www.marvell.com> - * 2007-08-21: eric miao <eric.miao@marvell.com> - * - * (C) Copyright 2010 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * Contributor: Mahavir Jain <mjain@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef __ARMADA100_MFP_H -#define __ARMADA100_MFP_H - -/* - * Frequently used MFP Configuration macros for all ARMADA100 family of SoCs - * - * offset, pull,pF, drv,dF, edge,eF ,afn,aF - */ -/* UART1 */ -#define MFP107_UART1_TXD MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST -#define MFP107_UART1_RXD MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST -#define MFP108_UART1_RXD MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST -#define MFP108_UART1_TXD MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST -#define MFP109_UART1_CTS MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM -#define MFP109_UART1_RTS MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM -#define MFP110_UART1_RTS MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM -#define MFP110_UART1_CTS MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM -#define MFP111_UART1_RI MFP_REG(0x01bc) | MFP_AF1 | MFP_DRIVE_MEDIUM -#define MFP111_UART1_DSR MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM -#define MFP112_UART1_DTR MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM -#define MFP112_UART1_DCD MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM - -/* UART2 */ -#define MFP47_UART2_RXD MFP_REG(0x0028) | MFP_AF6 | MFP_DRIVE_MEDIUM -#define MFP48_UART2_TXD MFP_REG(0x002c) | MFP_AF6 | MFP_DRIVE_MEDIUM -#define MFP88_UART2_RXD MFP_REG(0x0160) | MFP_AF2 | MFP_DRIVE_MEDIUM -#define MFP89_UART2_TXD MFP_REG(0x0164) | MFP_AF2 | MFP_DRIVE_MEDIUM - -/* UART3 */ -#define MFPO8_UART3_RXD MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM -#define MFPO9_UART3_TXD MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM - -/* More macros can be defined here... */ - -#define MFP_PIN_MAX 117 - -#endif /* __ARMADA100_MFP_H */ diff --git a/arch/arm/include/asm/arch-armv7/sysctrl.h b/arch/arm/include/asm/arch-armv7/sysctrl.h deleted file mode 100644 index 4e45167..0000000 --- a/arch/arm/include/asm/arch-armv7/sysctrl.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2010 Linaro - * Matt Waddel, <matt.waddel@linaro.org> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _SYSCTRL_H_ -#define _SYSCTRL_H_ - -/* System controller (SP810) register definitions */ -#define SP810_TIMER0_ENSEL (1 << 15) -#define SP810_TIMER1_ENSEL (1 << 17) -#define SP810_TIMER2_ENSEL (1 << 19) -#define SP810_TIMER3_ENSEL (1 << 21) - -struct sysctrl { - u32 scctrl; /* 0x000 */ - u32 scsysstat; - u32 scimctrl; - u32 scimstat; - u32 scxtalctrl; - u32 scpllctrl; - u32 scpllfctrl; - u32 scperctrl0; - u32 scperctrl1; - u32 scperen; - u32 scperdis; - u32 scperclken; - u32 scperstat; - u32 res1[0x006]; - u32 scflashctrl; /* 0x04c */ - u32 res2[0x3a4]; - u32 scsysid0; /* 0xee0 */ - u32 scsysid1; - u32 scsysid2; - u32 scsysid3; - u32 scitcr; - u32 scitir0; - u32 scitir1; - u32 scitor; - u32 sccntctrl; - u32 sccntdata; - u32 sccntstep; - u32 res3[0x32]; - u32 scperiphid0; /* 0xfe0 */ - u32 scperiphid1; - u32 scperiphid2; - u32 scperiphid3; - u32 scpcellid0; - u32 scpcellid1; - u32 scpcellid2; - u32 scpcellid3; -}; -#endif /* _SYSCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-armv7/systimer.h b/arch/arm/include/asm/arch-armv7/systimer.h deleted file mode 100644 index e745e37..0000000 --- a/arch/arm/include/asm/arch-armv7/systimer.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * (C) Copyright 2010 Linaro - * Matt Waddel, <matt.waddel@linaro.org> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _SYSTIMER_H_ -#define _SYSTIMER_H_ - -/* AMBA timer register base address */ -#define SYSTIMER_BASE 0x10011000 - -#define SYSHZ_CLOCK 1000000 /* Timers -> 1Mhz */ -#define SYSTIMER_RELOAD 0xFFFFFFFF -#define SYSTIMER_EN (1 << 7) -#define SYSTIMER_32BIT (1 << 1) - -struct systimer { - u32 timer0load; /* 0x00 */ - u32 timer0value; - u32 timer0control; - u32 timer0intclr; - u32 timer0ris; - u32 timer0mis; - u32 timer0bgload; - u32 timer1load; /* 0x20 */ - u32 timer1value; - u32 timer1control; - u32 timer1intclr; - u32 timer1ris; - u32 timer1mis; - u32 timer1bgload; -}; -#endif /* _SYSTIMER_H_ */ diff --git a/arch/arm/include/asm/arch-armv7/wdt.h b/arch/arm/include/asm/arch-armv7/wdt.h deleted file mode 100644 index ee74c38..0000000 --- a/arch/arm/include/asm/arch-armv7/wdt.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (C) Copyright 2010 - * Matt Waddel, <matt.waddel@linaro.org> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _WDT_H_ -#define _WDT_H_ - -/* Watchdog timer (SP805) register base address */ -#define WDT_BASE 0x100E5000 - -#define WDT_EN 0x2 -#define WDT_RESET_LOAD 0x0 - -struct wdt { - u32 wdogload; /* 0x000 */ - u32 wdogvalue; - u32 wdogcontrol; - u32 wdogintclr; - u32 wdogris; - u32 wdogmis; - u32 res1[0x2F9]; - u32 wdoglock; /* 0xC00 */ - u32 res2[0xBE]; - u32 wdogitcr; /* 0xF00 */ - u32 wdogitop; - u32 res3[0x35]; - u32 wdogperiphid0; /* 0xFE0 */ - u32 wdogperiphid1; - u32 wdogperiphid2; - u32 wdogperiphid3; - u32 wdogpcellid0; - u32 wdogpcellid1; - u32 wdogpcellid2; - u32 wdogpcellid3; -}; - -#endif /* _WDT_H_ */ diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h deleted file mode 100644 index 0067190..0000000 --- a/arch/arm/include/asm/arch-at91/at91_common.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop@leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_COMMON_H -#define AT91_COMMON_H - -void at91_can_hw_init(void); -void at91_macb_hw_init(void); -void at91_mci_hw_init(void); -void at91_serial_hw_init(void); -void at91_serial0_hw_init(void); -void at91_serial1_hw_init(void); -void at91_serial2_hw_init(void); -void at91_serial3_hw_init(void); -void at91_spi0_hw_init(unsigned long cs_mask); -void at91_spi1_hw_init(unsigned long cs_mask); -void at91_uhp_hw_init(void); - -#endif /* AT91_COMMON_H */ diff --git a/arch/arm/include/asm/arch-at91/at91_dbu.h b/arch/arm/include/asm/arch-at91/at91_dbu.h deleted file mode 100644 index 3429293..0000000 --- a/arch/arm/include/asm/arch-at91/at91_dbu.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - * - * Debug Unit - * Based on AT91SAM9XE datasheet - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_DBU_H -#define AT91_DBU_H - -#ifndef __ASSEMBLY__ - -typedef struct at91_dbu { - u32 cr; /* Control Register WO */ - u32 mr; /* Mode Register RW */ - u32 ier; /* Interrupt Enable Register WO */ - u32 idr; /* Interrupt Disable Register WO */ - u32 imr; /* Interrupt Mask Register RO */ - u32 sr; /* Status Register RO */ - u32 rhr; /* Receive Holding Register RO */ - u32 thr; /* Transmit Holding Register WO */ - u32 brgr; /* Baud Rate Generator Register RW */ - u32 res1[7];/* 0x0024 - 0x003C Reserved */ - u32 cidr; /* Chip ID Register RO */ - u32 exid; /* Chip ID Extension Register RO */ - u32 fnr; /* Force NTRST Register RW */ -} at91_dbu_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_DBU_CID_ARCH_MASK 0x0ff00000 -#define AT91_DBU_CID_ARCH_9xx 0x01900000 -#define AT91_DBU_CID_ARCH_9XExx 0x02900000 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_eefc.h b/arch/arm/include/asm/arch-at91/at91_eefc.h deleted file mode 100644 index d45b3de..0000000 --- a/arch/arm/include/asm/arch-at91/at91_eefc.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (C) 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - * - * Enhanced Embedded Flash Controller - * Based on AT91SAM9XE datasheet - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_EEFC_H -#define AT91_EEFC_H - -#ifndef __ASSEMBLY__ - -typedef struct at91_eefc { - u32 fmr; /* Flash Mode Register RW */ - u32 fcr; /* Flash Command Register WO */ - u32 fsr; /* Flash Status Register RO */ - u32 frr; /* Flash Result Register RO */ -} at91_eefc_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_EEFC_FMR_FWS_MASK 0x00000f00 -#define AT91_EEFC_FMR_FRDY_BIT 0x00000001 - -#define AT91_EEFC_FCR_KEY 0x5a000000 -#define AT91_EEFC_FCR_FARG_MASK 0x00ffff00 -#define AT91_EEFC_FCR_FARG_SHIFT 8 -#define AT91_EEFC_FCR_FCMD_GETD 0x0 -#define AT91_EEFC_FCR_FCMD_WP 0x1 -#define AT91_EEFC_FCR_FCMD_WPL 0x2 -#define AT91_EEFC_FCR_FCMD_EWP 0x3 -#define AT91_EEFC_FCR_FCMD_EWPL 0x4 -#define AT91_EEFC_FCR_FCMD_EA 0x5 -#define AT91_EEFC_FCR_FCMD_SLB 0x8 -#define AT91_EEFC_FCR_FCMD_CLB 0x9 -#define AT91_EEFC_FCR_FCMD_GLB 0xA -#define AT91_EEFC_FCR_FCMD_SGPB 0xB -#define AT91_EEFC_FCR_FCMD_CGPB 0xC -#define AT91_EEFC_FCR_FCMD_GGPB 0xD - -#define AT91_EEFC_FSR_FRDY 1 -#define AT91_EEFC_FSR_FCMDE 2 -#define AT91_EEFC_FSR_FLOCKE 4 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_emac.h b/arch/arm/include/asm/arch-at91/at91_emac.h deleted file mode 100644 index 0e2ff78..0000000 --- a/arch/arm/include/asm/arch-at91/at91_emac.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * based on AT91RM9200 datasheet revision I (36. Ethernet MAC (EMAC)) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_H -#define AT91_H - -typedef struct at91_emac { - u32 ctl; - u32 cfg; - u32 sr; - u32 tar; - u32 tcr; - u32 tsr; - u32 rbqp; - u32 reserved0; - u32 rsr; - u32 isr; - u32 ier; - u32 idr; - u32 imr; - u32 man; - u32 reserved1[2]; - u32 fra; - u32 scol; - u32 mocl; - u32 ok; - u32 seqe; - u32 ale; - u32 dte; - u32 lcol; - u32 ecol; - u32 cse; - u32 tue; - u32 cde; - u32 elr; - u32 rjb; - u32 usf; - u32 sqee; - u32 drfc; - u32 reserved2[3]; - u32 hsh; - u32 hsl; - u32 sa1l; - u32 sa1h; - u32 sa2l; - u32 sa2h; - u32 sa3l; - u32 sa3h; - u32 sa4l; - u32 sa4h; -} at91_emac_t; - -#define AT91_EMAC_CTL_LB 0x0001 -#define AT91_EMAC_CTL_LBL 0x0002 -#define AT91_EMAC_CTL_RE 0x0004 -#define AT91_EMAC_CTL_TE 0x0008 -#define AT91_EMAC_CTL_MPE 0x0010 -#define AT91_EMAC_CTL_CSR 0x0020 -#define AT91_EMAC_CTL_ISR 0x0040 -#define AT91_EMAC_CTL_WES 0x0080 -#define AT91_EMAC_CTL_BP 0x1000 - -#define AT91_EMAC_CFG_SPD 0x0001 -#define AT91_EMAC_CFG_FD 0x0002 -#define AT91_EMAC_CFG_BR 0x0004 -#define AT91_EMAC_CFG_CAF 0x0010 -#define AT91_EMAC_CFG_NBC 0x0020 -#define AT91_EMAC_CFG_MTI 0x0040 -#define AT91_EMAC_CFG_UNI 0x0080 -#define AT91_EMAC_CFG_BIG 0x0100 -#define AT91_EMAC_CFG_EAE 0x0200 -#define AT91_EMAC_CFG_CLK_MASK 0xFFFFF3FF -#define AT91_EMAC_CFG_MCLK_8 0x0000 -#define AT91_EMAC_CFG_MCLK_16 0x0400 -#define AT91_EMAC_CFG_MCLK_32 0x0800 -#define AT91_EMAC_CFG_MCLK_64 0x0C00 -#define AT91_EMAC_CFG_RTY 0x1000 -#define AT91_EMAC_CFG_RMII 0x2000 - -#define AT91_EMAC_SR_LINK 0x0001 -#define AT91_EMAC_SR_MDIO 0x0002 -#define AT91_EMAC_SR_IDLE 0x0004 - -#define AT91_EMAC_TCR_LEN(x) (x & 0x7FF) -#define AT91_EMAC_TCR_NCRC 0x8000 - -#define AT91_EMAC_TSR_OVR 0x0001 -#define AT91_EMAC_TSR_COL 0x0002 -#define AT91_EMAC_TSR_RLE 0x0004 -#define AT91_EMAC_TSR_TXIDLE 0x0008 -#define AT91_EMAC_TSR_BNQ 0x0010 -#define AT91_EMAC_TSR_COMP 0x0020 -#define AT91_EMAC_TSR_UND 0x0040 - -#define AT91_EMAC_RSR_BNA 0x0001 -#define AT91_EMAC_RSR_REC 0x0002 -#define AT91_EMAC_RSR_OVR 0x0004 - -/* ISR, IER, IDR, IMR use the same bits */ -#define AT91_EMAC_IxR_DONE 0x0001 -#define AT91_EMAC_IxR_RCOM 0x0002 -#define AT91_EMAC_IxR_RBNA 0x0004 -#define AT91_EMAC_IxR_TOVR 0x0008 -#define AT91_EMAC_IxR_TUND 0x0010 -#define AT91_EMAC_IxR_RTRY 0x0020 -#define AT91_EMAC_IxR_TBRE 0x0040 -#define AT91_EMAC_IxR_TCOM 0x0080 -#define AT91_EMAC_IxR_TIDLE 0x0100 -#define AT91_EMAC_IxR_LINK 0x0200 -#define AT91_EMAC_IxR_ROVR 0x0400 -#define AT91_EMAC_IxR_HRESP 0x0800 - -#define AT91_EMAC_MAN_DATA_MASK 0xFFFF -#define AT91_EMAC_MAN_CODE_802_3 0x00020000 -#define AT91_EMAC_MAN_REGA(reg) ((reg & 0x1F) << 18) -#define AT91_EMAC_MAN_PHYA(phy) ((phy & 0x1F) << 23) -#define AT91_EMAC_MAN_RW_R 0x20000000 -#define AT91_EMAC_MAN_RW_W 0x10000000 -#define AT91_EMAC_MAN_HIGH 0x40000000 -#define AT91_EMAC_MAN_LOW 0x80000000 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_gpbr.h b/arch/arm/include/asm/arch-at91/at91_gpbr.h deleted file mode 100644 index cf1d790..0000000 --- a/arch/arm/include/asm/arch-at91/at91_gpbr.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - * - * General Purpose Backup Registers - * Based on AT91SAM9XE datasheet - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_GPBR_H -#define AT91_GPBR_H - -/* - * The Atmel AT91SAM9 series has a small resource of 4 nonvolatile - * 32 Bit registers (buffered by the Vbu power). - * - * Please consider carefully before using this resource for tasks - * that do not really need nonvolatile registers. Maybe you can - * store information in EEPROM or FLASH instead. - * - * However, if you use a GPBR please document its use here and - * reference the define in your code! - * - * known typical uses of the GPBRs: - * GPBR[0]: offset for RTT timekeeping (u-boot, kernel) - * GPBR[1]: unused - * GPBR[2]: unused - * GPBR[3]: bootcount (u-boot) - */ -#define AT91_GPBR_INDEX_TIMEOFF 0 -#define AT91_GPBR_INDEX_BOOTCOUNT 3 - -#ifndef __ASSEMBLY__ - -typedef struct at91_gpbr { - u32 reg[4]; -} at91_gpbr_t; - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h deleted file mode 100644 index f99b1d4..0000000 --- a/arch/arm/include/asm/arch-at91/at91_matrix.h +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_MATRIX_H -#define AT91_MATRIX_H - -#ifdef __ASSEMBLY__ - -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) -#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C) -#elif defined(CONFIG_AT91SAM9261) -#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30) -#elif defined(CONFIG_AT91SAM9263) -#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120) -#elif defined(CONFIG_AT91SAM9G45) -#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x128) -#else -#error AT91_ASM_MATRIX_CSA0 is not definied for current CPU -#endif - -#define AT91_ASM_MATRIX_MCFG AT91_MATRIX_BASE - -#else -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) -#define AT91_MATRIX_MASTERS 6 -#define AT91_MATRIX_SLAVES 5 -#elif defined(CONFIG_AT91SAM9261) -#define AT91_MATRIX_MASTERS 1 -#define AT91_MATRIX_SLAVES 5 -#elif defined(CONFIG_AT91SAM9263) -#define AT91_MATRIX_MASTERS 9 -#define AT91_MATRIX_SLAVES 7 -#elif defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_MASTERS 11 -#define AT91_MATRIX_SLAVES 8 -#else -#error CPU not supported. Please update at91_matrix.h -#endif - -typedef struct at91_priority { - u32 a; - u32 b; -} at91_priority_t; - -typedef struct at91_matrix { - u32 mcfg[AT91_MATRIX_MASTERS]; -#if defined(CONFIG_AT91SAM9261) - u32 scfg[AT91_MATRIX_SLAVES]; - u32 res61_1[3]; - u32 tcr; - u32 res61_2[2]; - u32 csa; - u32 pucr; - u32 res61_3[114]; -#else - u32 reserve1[16 - AT91_MATRIX_MASTERS]; - u32 scfg[AT91_MATRIX_SLAVES]; - u32 reserve2[16 - AT91_MATRIX_SLAVES]; - at91_priority_t pr[AT91_MATRIX_SLAVES]; - u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)]; - u32 mrcr; /* 0x100 Master Remap Control */ - u32 reserve4[3]; -#if defined(CONFIG_AT91SAM9G45) - u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */ - u32 womr; /* 0x1E4 Write Protect Mode */ - u32 wpsr; /* 0x1E8 Write Protect Status */ - u32 resg45_1[10]; -#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) - u32 res60_1[3]; - u32 csa; - u32 res60_2[56]; -#elif defined(CONFIG_AT91SAM9263) - u32 res63_1; - u32 tcmr; - u32 res63_2[2]; - u32 csa[2]; - u32 res63_3[54]; -#else - u32 reserve5[60]; -#endif -#endif -} at91_matrix_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_MATRIX_CSA_DBPUC 0x00000100 -#define AT91_MATRIX_CSA_VDDIOMSEL_1_8V 0x00000000 -#define AT91_MATRIX_CSA_VDDIOMSEL_3_3V 0x00010000 - -#define AT91_MATRIX_CSA_EBI_CS1A 0x00000002 -#define AT91_MATRIX_CSA_EBI_CS3A 0x00000008 -#define AT91_MATRIX_CSA_EBI_CS4A 0x00000010 -#define AT91_MATRIX_CSA_EBI_CS5A 0x00000020 - -#define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008 - -#if defined CONFIG_AT91SAM9261 -/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_MCFG_RCB0 (1 << 0) -/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_MCFG_RCB1 (1 << 1) -#endif - -/* Undefined Length Burst Type */ -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ - defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x00000000 -#define AT91_MATRIX_MCFG_ULBT_SINGLE 0x00000001 -#define AT91_MATRIX_MCFG_ULBT_FOUR 0x00000002 -#define AT91_MATRIX_MCFG_ULBT_EIGHT 0x00000003 -#define AT91_MATRIX_MCFG_ULBT_SIXTEEN 0x00000004 -#endif -#if defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO 0x00000005 -#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR 0x00000006 -#define AT91_MATRIX_MCFG_ULBT_128 0x00000007 -#endif - -/* Default Master Type */ -#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE 0x00000000 -#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST 0x00010000 -#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED 0x00020000 - -/* Fixed Index of Default Master */ -#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) -#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) -#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) -#endif - -/* Maximum Number of Allowed Cycles for a Burst */ -#if defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) -#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ - defined(CONFIG_AT91SAM9263) -#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) -#endif - -/* Arbitration Type */ -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) -#define AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN 0x00000000 -#define AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY 0x01000000 -#endif - -/* Master Remap Control Register */ -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ - defined(CONFIG_AT91SAM9G45) -/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_MRCR_RCB0 (1 << 0) -/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_MRCR_RCB1 (1 << 1) -#endif -#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_MRCR_RCB2 0x00000004 -#define AT91_MATRIX_MRCR_RCB3 0x00000008 -#define AT91_MATRIX_MRCR_RCB4 0x00000010 -#define AT91_MATRIX_MRCR_RCB5 0x00000020 -#define AT91_MATRIX_MRCR_RCB6 0x00000040 -#define AT91_MATRIX_MRCR_RCB7 0x00000080 -#define AT91_MATRIX_MRCR_RCB8 0x00000100 -#endif -#if defined(CONFIG_AT91SAM9G45) -#define AT91_MATRIX_MRCR_RCB9 0x00000200 -#define AT91_MATRIX_MRCR_RCB10 0x00000400 -#define AT91_MATRIX_MRCR_RCB11 0x00000800 -#endif - -/* TCM Configuration Register */ -#if defined(CONFIG_AT91SAM9G45) -/* Size of ITCM enabled memory block */ -#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 -#define AT91_MATRIX_TCMR_ITCM_32 0x00000040 -/* Size of DTCM enabled memory block */ -#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 -#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 -#define AT91_MATRIX_TCMR_DTCM_64 0x00000070 -/* Wait state TCM register */ -#define AT91_MATRIX_TCMR_TCM_NO_WS 0x00000000 -#define AT91_MATRIX_TCMR_TCM_ONE_WS 0x00000800 -#endif -#if defined(CONFIG_AT91SAM9263) -/* Size of ITCM enabled memory block */ -#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 -#define AT91_MATRIX_TCMR_ITCM_16 0x00000005 -#define AT91_MATRIX_TCMR_ITCM_32 0x00000006 -/* Size of DTCM enabled memory block */ -#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 -#define AT91_MATRIX_TCMR_DTCM_16 0x00000050 -#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 -#endif -#if defined(CONFIG_AT91SAM9261) -/* Size of ITCM enabled memory block */ -#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 -#define AT91_MATRIX_TCMR_ITCM_16 0x00000005 -#define AT91_MATRIX_TCMR_ITCM_32 0x00000006 -#define AT91_MATRIX_TCMR_ITCM_64 0x00000007 -/* Size of DTCM enabled memory block */ -#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 -#define AT91_MATRIX_TCMR_DTCM_16 0x00000050 -#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 -#define AT91_MATRIX_TCMR_DTCM_64 0x00000070 -#endif - -#if defined(CONFIG_AT91SAM9G45) -/* Video Mode Configuration Register */ -#define AT91C_MATRIX_VDEC_SEL_OFF 0x00000000 -#define AT91C_MATRIX_VDEC_SEL_ON 0x00000001 -/* Write Protect Mode Register */ -#define AT91_MATRIX_WPMR_WP_WPDIS 0x00000000 -#define AT91_MATRIX_WPMR_WP_WPEN 0x00000001 -#define AT91_MATRIX_WPMR_WPKEY 0xFFFFFF00 /* Write Protect KEY */ -/* Write Protect Status Register */ -#define AT91_MATRIX_WPSR_NO_WPV 0x00000000 -#define AT91_MATRIX_WPSR_WPV 0x00000001 -#define AT91_MATRIX_WPSR_WPVSRC 0x00FFFF00 /* Write Protect Violation Source */ -#endif - -/* USB Pad Pull-Up Control Register */ -#if defined(CONFIG_AT91SAM9261) -#define AT91_MATRIX_USBPUCR_PUON 0x40000000 -#endif - -#define AT91_MATRIX_PRA_M0(x) ((x & 3) << 0) /* Master 0 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M1(x) ((x & 3) << 4) /* Master 1 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M2(x) ((x & 3) << 8) /* Master 2 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M3(x) ((x & 3) << 12) /* Master 3 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M4(x) ((x & 3) << 16) /* Master 4 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M5(x) ((x & 3) << 20) /* Master 5 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M6(x) ((x & 3) << 24) /* Master 6 Priority Reg. A*/ -#define AT91_MATRIX_PRA_M7(x) ((x & 3) << 28) /* Master 7 Priority Reg. A*/ -#define AT91_MATRIX_PRB_M8(x) ((x & 3) << 0) /* Master 8 Priority Reg. B) */ -#define AT91_MATRIX_PRB_M9(x) ((x & 3) << 4) /* Master 9 Priority Reg. B) */ -#define AT91_MATRIX_PRB_M10(x) ((x & 3) << 8) /* Master 10 Priority Reg. B) */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h deleted file mode 100644 index acfbd10..0000000 --- a/arch/arm/include/asm/arch-at91/at91_mc.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_MC_H -#define AT91_MC_H - -#define AT91_ASM_MC_EBI_CSA (AT91_MC_BASE + 0x60) -#define AT91_ASM_MC_EBI_CFG (AT91_MC_BASE + 0x64) -#define AT91_ASM_MC_SMC_CSR0 (AT91_MC_BASE + 0x70) -#define AT91_ASM_MC_SDRAMC_MR (AT91_MC_BASE + 0x90) -#define AT91_ASM_MC_SDRAMC_TR (AT91_MC_BASE + 0x94) -#define AT91_ASM_MC_SDRAMC_CR (AT91_MC_BASE + 0x98) - -#ifndef __ASSEMBLY__ - -typedef struct at91_ebi { - u32 csa; /* 0x00 Chip Select Assignment Register */ - u32 cfgr; /* 0x04 Configuration Register */ - u32 reserved[2]; -} __attribute__ ((packed)) at91_ebi_t; - -#define AT91_EBI_CSA_CS0A 0x0001 -#define AT91_EBI_CSA_CS1A 0x0002 - -#define AT91_EBI_CSA_CS3A 0x0008 -#define AT91_EBI_CSA_CS4A 0x0010 - -typedef struct at91_sdramc { - u32 mr; /* 0x00 SDRAMC Mode Register */ - u32 tr; /* 0x04 SDRAMC Refresh Timer Register */ - u32 cr; /* 0x08 SDRAMC Configuration Register */ - u32 ssr; /* 0x0C SDRAMC Self Refresh Register */ - u32 lpr; /* 0x10 SDRAMC Low Power Register */ - u32 ier; /* 0x14 SDRAMC Interrupt Enable Register */ - u32 idr; /* 0x18 SDRAMC Interrupt Disable Register */ - u32 imr; /* 0x1C SDRAMC Interrupt Mask Register */ - u32 icr; /* 0x20 SDRAMC Interrupt Status Register */ - u32 reserved[3]; -} __attribute__ ((packed)) at91_sdramc_t; - -typedef struct at91_smc { - u32 csr[8]; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_smc_t; - -#define AT91_SMC_CSR_RWHOLD(x) ((x & 0x7) << 28) -#define AT91_SMC_CSR_RWSETUP(x) ((x & 0x7) << 24) -#define AT91_SMC_CSR_ACSS_STANDARD 0x00000000 -#define AT91_SMC_CSR_ACSS_1CYCLE 0x00010000 -#define AT91_SMC_CSR_ACSS_2CYCLE 0x00020000 -#define AT91_SMC_CSR_ACSS_3CYCLE 0x00030000 -#define AT91_SMC_CSR_DRP 0x00008000 -#define AT91_SMC_CSR_DBW_8 0x00004000 -#define AT91_SMC_CSR_DBW_16 0x00002000 -#define AT91_SMC_CSR_BAT_8 0x00000000 -#define AT91_SMC_CSR_BAT_16 0x00001000 -#define AT91_SMC_CSR_TDF(x) ((x & 0xF) << 8) -#define AT91_SMC_CSR_WSEN 0x00000080 -#define AT91_SMC_CSR_NWS(x) (x & 0x7F) - -typedef struct at91_bfc { - u32 mr; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_bfc_t; - -typedef struct at91_mc { - u32 rcr; /* 0x00 MC Remap Control Register */ - u32 asr; /* 0x04 MC Abort Status Register */ - u32 aasr; /* 0x08 MC Abort Address Status Reg */ - u32 mpr; /* 0x0C MC Master Priority Register */ - u32 reserved1[20]; /* 0x10-0x5C */ - at91_ebi_t ebi; /* 0x60 - 0x6C EBI */ - at91_smc_t smc; /* 0x70 - 0x8C SMC User Interface */ - at91_sdramc_t sdramc; /* 0x90 - 0xBC SDRAMC User Interface */ - at91_bfc_t bfc; /* 0xC0 BFC User Interface */ - u32 reserved2[15]; -} __attribute__ ((packed)) at91_mc_t; - -#endif -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_pdc.h b/arch/arm/include/asm/arch-at91/at91_pdc.h deleted file mode 100644 index 42f87ca..0000000 --- a/arch/arm/include/asm/arch-at91/at91_pdc.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_PDC_H -#define AT91_PDC_H - -typedef struct at91_pdc { - u32 rpr; /* 0x100 Receive Pointer Register */ - u32 rcr; /* 0x104 Receive Counter Register */ - u32 tpr; /* 0x108 Transmit Pointer Register */ - u32 tcr; /* 0x10C Transmit Counter Register */ - u32 pnpr; /* 0x110 Receive Next Pointer Register */ - u32 pncr; /* 0x114 Receive Next Counter Register */ - u32 tnpr; /* 0x118 Transmit Next Pointer Register */ - u32 tncr; /* 0x11C Transmit Next Counter Register */ - u32 ptcr; /* 0x120 Transfer Control Register */ - u32 ptsr; /* 0x124 Transfer Status Register */ -} at91_pdc_t; - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h deleted file mode 100644 index f7915a3..0000000 --- a/arch/arm/include/asm/arch-at91/at91_pio.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - - -#define AT91_ASM_PIO_RANGE 0x200 -#define AT91_ASM_PIOC_ASR \ - (AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x70) -#define AT91_ASM_PIOC_BSR \ - (AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x74) -#define AT91_ASM_PIOC_PDR \ - (AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x04) -#define AT91_ASM_PIOC_PUDR \ - (AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x60) - -#define AT91_ASM_PIOD_PDR \ - (AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x04) -#define AT91_ASM_PIOD_PUDR \ - (AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x60) -#define AT91_ASM_PIOD_ASR \ - (AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x70) - -#ifndef __ASSEMBLY__ - -typedef struct at91_port { - u32 per; /* 0x00 PIO Enable Register */ - u32 pdr; /* 0x04 PIO Disable Register */ - u32 psr; /* 0x08 PIO Status Register */ - u32 reserved0; - u32 oer; /* 0x10 Output Enable Register */ - u32 odr; /* 0x14 Output Disable Registerr */ - u32 osr; /* 0x18 Output Status Register */ - u32 reserved1; - u32 ifer; /* 0x20 Input Filter Enable Register */ - u32 ifdr; /* 0x24 Input Filter Disable Register */ - u32 ifsr; /* 0x28 Input Filter Status Register */ - u32 reserved2; - u32 sodr; /* 0x30 Set Output Data Register */ - u32 codr; /* 0x34 Clear Output Data Register */ - u32 odsr; /* 0x38 Output Data Status Register */ - u32 pdsr; /* 0x3C Pin Data Status Register */ - u32 ier; /* 0x40 Interrupt Enable Register */ - u32 idr; /* 0x44 Interrupt Disable Register */ - u32 imr; /* 0x48 Interrupt Mask Register */ - u32 isr; /* 0x4C Interrupt Status Register */ - u32 mder; /* 0x50 Multi-driver Enable Register */ - u32 mddr; /* 0x54 Multi-driver Disable Register */ - u32 mdsr; /* 0x58 Multi-driver Status Register */ - u32 reserved3; - u32 pudr; /* 0x60 Pull-up Disable Register */ - u32 puer; /* 0x64 Pull-up Enable Register */ - u32 pusr; /* 0x68 Pad Pull-up Status Register */ - u32 reserved4; - u32 asr; /* 0x70 Select A Register */ - u32 bsr; /* 0x74 Select B Register */ - u32 absr; /* 0x78 AB Select Status Register */ - u32 reserved5[9]; /* */ - u32 ower; /* 0xA0 Output Write Enable Register */ - u32 owdr; /* 0xA4 Output Write Disable Register */ - u32 owsr; /* OxA8 utput Write Status Register */ - u32 reserved6[85]; -} at91_port_t; - -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ - defined(CONFIG_AT91SAM9G10) || defined(CONFIG_AT91SAM9G20) -#define AT91_PIO_PORTS 3 -#elif defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \ - defined(CONFIG_AT91SAM9M10G45) -#define AT91_PIO_PORTS 5 -#elif defined(CONFIG_AT91RM9200) || defined(CONFIG_AT91CAP9) || \ - defined(CONFIG_AT91SAM9RL) -#define AT91_PIO_PORTS 4 -#else -#error "Unsupported cpu. Please update at91_pio.h" -#endif - -typedef union at91_pio { - struct { - at91_port_t pioa; - at91_port_t piob; - at91_port_t pioc; - #if (AT91_PIO_PORTS > 3) - at91_port_t piod; - #endif - #if (AT91_PIO_PORTS > 4) - at91_port_t pioe; - #endif - } ; - at91_port_t port[AT91_PIO_PORTS]; -} at91_pio_t; - -#ifdef CONFIG_AT91_GPIO -int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup); -int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup); -int at91_set_pio_input(unsigned port, unsigned pin, int use_pullup); -int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on); -int at91_set_pio_output(unsigned port, unsigned pin, int value); -int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup); -int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup); -int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on); -int at91_set_pio_value(unsigned port, unsigned pin, int value); -int at91_get_pio_value(unsigned port, unsigned pin); -#endif -#endif - -#define AT91_PIO_PORTA 0x0 -#define AT91_PIO_PORTB 0x1 -#define AT91_PIO_PORTC 0x2 -#define AT91_PIO_PORTD 0x3 -#define AT91_PIO_PORTE 0x4 - -#ifdef CONFIG_AT91_LEGACY - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#endif - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_pit.h b/arch/arm/include/asm/arch-at91/at91_pit.h deleted file mode 100644 index 61aca79..0000000 --- a/arch/arm/include/asm/arch-at91/at91_pit.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pit.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Periodic Interval Timer (PIT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIT_H -#define AT91_PIT_H - -typedef struct at91_pit { - u32 mr; /* 0x00 Mode Register */ - u32 sr; /* 0x04 Status Register */ - u32 pivr; /* 0x08 Periodic Interval Value Register */ - u32 piir; /* 0x0C Periodic Interval Image Register */ -} at91_pit_t; - -#define AT91_PIT_MR_IEN 0x02000000 -#define AT91_PIT_MR_EN 0x01000000 -#define AT91_PIT_MR_PIV_MASK(x) (x & 0x000fffff) -#define AT91_PIT_MR_PIV(x) (x & AT91_PIT_MR_PIV_MASK) - -#ifdef CONFIG_AT91_LEGACY - -#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ -#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ -#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ -#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ - -#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ -#define AT91_PIT_PITS (1 << 0) /* Timer Status */ - -#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ -#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ -#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ -#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ - -#endif /* CONFIG_AT91_LEGACY */ -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h deleted file mode 100644 index fb8bb17..0000000 --- a/arch/arm/include/asm/arch-at91/at91_pmc.h +++ /dev/null @@ -1,245 +0,0 @@ -/* - * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_pmc.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * Power Management Controller (PMC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PMC_H -#define AT91_PMC_H - -#define AT91_ASM_PMC_MOR (AT91_PMC_BASE + 0x20) -#define AT91_ASM_PMC_PLLAR (AT91_PMC_BASE + 0x28) -#define AT91_ASM_PMC_PLLBR (AT91_PMC_BASE + 0x2c) -#define AT91_ASM_PMC_MCKR (AT91_PMC_BASE + 0x30) -#define AT91_ASM_PMC_SR (AT91_PMC_BASE + 0x68) - -#ifndef __ASSEMBLY__ - -#include <asm/types.h> - -typedef struct at91_pmc { - u32 scer; /* 0x00 System Clock Enable Register */ - u32 scdr; /* 0x04 System Clock Disable Register */ - u32 scsr; /* 0x08 System Clock Status Register */ - u32 reserved0; - u32 pcer; /* 0x10 Peripheral Clock Enable Register */ - u32 pcdr; /* 0x14 Peripheral Clock Disable Register */ - u32 pcsr; /* 0x18 Peripheral Clock Status Register */ - u32 uckr; /* 0x1C UTMI Clock Register */ - u32 mor; /* 0x20 Main Oscilator Register */ - u32 mcfr; /* 0x24 Main Clock Frequency Register */ - u32 pllar; /* 0x28 PLL A Register */ - u32 pllbr; /* 0x2C PLL B Register */ - u32 mckr; /* 0x30 Master Clock Register */ - u32 reserved1; - u32 usb; /* 0x38 USB Clock Register */ - u32 reserved2; - u32 pck[4]; /* 0x40 Programmable Clock Register 0 - 3 */ - u32 reserved3[4]; - u32 ier; /* 0x60 Interrupt Enable Register */ - u32 idr; /* 0x64 Interrupt Disable Register */ - u32 sr; /* 0x68 Status Register */ - u32 imr; /* 0x6C Interrupt Mask Register */ - u32 reserved4[4]; - u32 pllicpr; /* 0x80 Change Pump Current Register (SAM9) */ - u32 reserved5[21]; - u32 wpmr; /* 0xE4 Write Protect Mode Register (CAP0) */ - u32 wpsr; /* 0xE8 Write Protect Status Register (CAP0) */ - u32 reserved8[5]; -} at91_pmc_t; - -#endif /* end not assembly */ - -#define AT91_PMC_MOR_MOSCEN 0x01 -#define AT91_PMC_MOR_OSCBYPASS 0x02 -#define AT91_PMC_MOR_OSCOUNT(x) ((x & 0xff) << 8) - -#define AT91_PMC_PLLXR_DIV(x) (x & 0xFF) -#define AT91_PMC_PLLXR_PLLCOUNT(x) ((x & 0x3F) << 8) -#define AT91_PMC_PLLXR_OUT(x) ((x & 0x03) << 14) -#define AT91_PMC_PLLXR_MUL(x) ((x & 0x7FF) << 16) -#define AT91_PMC_PLLAR_29 0x20000000 -#define AT91_PMC_PLLBR_USBDIV_1 0x00000000 -#define AT91_PMC_PLLBR_USBDIV_2 0x10000000 -#define AT91_PMC_PLLBR_USBDIV_4 0x20000000 - -#define AT91_PMC_MCFR_MAINRDY 0x00010000 -#define AT91_PMC_MCFR_MAINF_MASK 0x0000FFFF - -#define AT91_PMC_MCKR_CSS_SLOW 0x00000000 -#define AT91_PMC_MCKR_CSS_MAIN 0x00000001 -#define AT91_PMC_MCKR_CSS_PLLA 0x00000002 -#define AT91_PMC_MCKR_CSS_PLLB 0x00000003 -#define AT91_PMC_MCKR_CSS_MASK 0x00000003 - -#define AT91_PMC_MCKR_PRES_1 0x00000000 -#define AT91_PMC_MCKR_PRES_2 0x00000004 -#define AT91_PMC_MCKR_PRES_4 0x00000008 -#define AT91_PMC_MCKR_PRES_8 0x0000000C -#define AT91_PMC_MCKR_PRES_16 0x00000010 -#define AT91_PMC_MCKR_PRES_32 0x00000014 -#define AT91_PMC_MCKR_PRES_64 0x00000018 -#define AT91_PMC_MCKR_PRES_MASK 0x0000001C - -#ifdef CONFIG_AT91RM9200 -#define AT91_PMC_MCKR_MDIV_1 0x00000000 -#define AT91_PMC_MCKR_MDIV_2 0x00000100 -#define AT91_PMC_MCKR_MDIV_3 0x00000200 -#define AT91_PMC_MCKR_MDIV_4 0x00000300 -#define AT91_PMC_MCKR_MDIV_MASK 0x00000300 -#else -#define AT91_PMC_MCKR_MDIV_1 0x00000000 -#define AT91_PMC_MCKR_MDIV_2 0x00000100 -#define AT91_PMC_MCKR_MDIV_4 0x00000200 -#define AT91_PMC_MCKR_MDIV_MASK 0x00000300 -#endif - -#define AT91_PMC_MCKR_PLLADIV_1 0x00001000 -#define AT91_PMC_MCKR_PLLADIV_2 0x00002000 - -#define AT91_PMC_IXR_MOSCS 0x00000001 -#define AT91_PMC_IXR_LOCKA 0x00000002 -#define AT91_PMC_IXR_LOCKB 0x00000004 -#define AT91_PMC_IXR_MCKRDY 0x00000008 -#define AT91_PMC_IXR_LOCKU 0x00000040 -#define AT91_PMC_IXR_PCKRDY0 0x00000100 -#define AT91_PMC_IXR_PCKRDY1 0x00000200 -#define AT91_PMC_IXR_PCKRDY2 0x00000400 -#define AT91_PMC_IXR_PCKRDY3 0x00000800 - -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ - -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ -#endif - -#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ -#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */ -#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ -#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ -#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ -#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ -#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ - -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ - -#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */ -#endif - -#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ -#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ -#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ -#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI PLL Start-up Time */ - -#ifdef CONFIG_AT91_LEGACY -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ -#endif -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ -#ifdef CONFIG_AT91_LEGACY -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ -#endif -#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ -#ifdef CONFIG_AT91_LEGACY -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ -#endif -#define AT91_PMC_DIV (0xff << 0) /* Divider */ -#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ -#define AT91_PMC_USBDIV_1 (0 << 28) -#define AT91_PMC_USBDIV_2 (1 << 28) -#define AT91_PMC_USBDIV_4 (2 << 28) -#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ -#define AT91_PMC_PLLA_WR_ERRATA (1 << 29) /* Bit 29 must always be set to 1 when programming the CKGR_PLLAR register */ - -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ -#endif -#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -#define AT91_PMC_CSS_SLOW (0 << 0) -#define AT91_PMC_CSS_MAIN (1 << 0) -#define AT91_PMC_CSS_PLLA (2 << 0) -#define AT91_PMC_CSS_PLLB (3 << 0) -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) -#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ -#define AT91RM9200_PMC_MDIV_2 (1 << 8) -#define AT91RM9200_PMC_MDIV_3 (2 << 8) -#define AT91RM9200_PMC_MDIV_4 (3 << 8) -#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ -#define AT91SAM9_PMC_MDIV_2 (1 << 8) -#define AT91SAM9_PMC_MDIV_4 (2 << 8) -#define AT91SAM9_PMC_MDIV_3 (3 << 8) /* [some SAM9 only] */ -#define AT91SAM9_PMC_MDIV_6 (3 << 8) -#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */ -#define AT91_PMC_PDIV_1 (0 << 12) -#define AT91_PMC_PDIV_2 (1 << 12) - -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register */ -#endif -#define AT91_PMC_USBS_USB_PLLA (0x0) /* USB Clock Input is PLLA */ -#define AT91_PMC_USBS_USB_UPLL (0x1) /* USB Clock Input is UPLL */ -#define AT91_PMC_USBDIV_8 (0x7 << 8) /* USB Clock divided by 8 */ -#define AT91_PMC_USBDIV_10 (0x9 << 8) /* USB Clock divided by 10 */ - -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ - -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ -#endif -#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ -#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ -#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ - -#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ -#endif -#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ -#ifdef CONFIG_AT91_LEGACY -#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ -#endif /* CONFIG_AT91_LEGACY */ -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h deleted file mode 100644 index 9ff2c5b..0000000 --- a/arch/arm/include/asm/arch-at91/at91_rstc.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Reset Controller (RSTC) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RSTC_H -#define AT91_RSTC_H - -#define AT91_ASM_RSTC_MR (AT91_RSTC_BASE + 0x08) - -#ifndef __ASSEMBLY__ - -typedef struct at91_rstc { - u32 cr; /* Reset Controller Control Register */ - u32 sr; /* Reset Controller Status Register */ - u32 mr; /* Reset Controller Mode Register */ -} at91_rstc_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_RSTC_KEY 0xA5000000 - -#define AT91_RSTC_CR_PROCRST 0x00000001 -#define AT91_RSTC_CR_PERRST 0x00000004 -#define AT91_RSTC_CR_EXTRST 0x00000008 - -#define AT91_RSTC_MR_URSTEN 0x00000001 -#define AT91_RSTC_MR_URSTIEN 0x00000010 -#define AT91_RSTC_MR_ERSTL(x) ((x & 0xf) << 8) -#define AT91_RSTC_MR_ERSTL_MASK 0x0000FF00 - -#define AT91_RSTC_SR_NRSTL 0x00010000 - -#ifdef CONFIG_AT91_LEGACY - -#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ -#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ -#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ -#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ - -#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ -#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ -#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ -#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) -#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) -#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) -#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) -#define AT91_RSTC_RSTTYP_USER (4 << 8) -#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ -#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ - -#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ -#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ -#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ -#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ - -#endif /* CONFIG_AT91_LEGACY */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_rtt.h b/arch/arm/include/asm/arch-at91/at91_rtt.h deleted file mode 100644 index e0253ef..0000000 --- a/arch/arm/include/asm/arch-at91/at91_rtt.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - * - * Real-time Timer - * Based on AT91SAM9XE datasheet - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#ifndef __ASSEMBLY__ - -typedef struct at91_rtt { - u32 mr; /* Mode Register RW 0x00008000 */ - u32 ar; /* Alarm Register RW 0xFFFFFFFF */ - u32 vr; /* Value Register RO 0x00000000 */ - u32 sr; /* Status Register RO 0x00000000 */ -} at91_rtt_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_RTT_MR_RTPRES 0x0000ffff -#define AT91_RTT_MR_ALMIEN 0x00010000 -#define AT91_RTT_RTTINCIEN 0x00020000 -#define AT91_RTT_RTTRST 0x00040000 - -#define AT91_RTT_SR_ALMS 0x00000001 -#define AT91_RTT_SR_RTTINC 0x00000002 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_shdwn.h b/arch/arm/include/asm/arch-at91/at91_shdwn.h deleted file mode 100644 index 874f988..0000000 --- a/arch/arm/include/asm/arch-at91/at91_shdwn.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - * - * Shutdown Controller - * Based on AT91SAM9XE datasheet - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SHDWN_H -#define AT91_SHDWN_H - -#ifndef __ASSEMBLY__ - -struct at91_shdwn { - u32 cr; /* Control Rer. WO */ - u32 mr; /* Mode Register RW 0x00000003 */ - u32 sr; /* Status Register RO 0x00000000 */ -}; - -#endif /* __ASSEMBLY__ */ - -#define AT91_SHDW_CR_KEY 0xa5000000 -#define AT91_SHDW_CR_SHDW 0x00000001 - -#define AT91_SHDW_MR_RTTWKEN 0x00010000 -#define AT91_SHDW_MR_CPTWK0 0x000000f0 -#define AT91_SHDW_MR_WKMODE0H2L 0x00000002 -#define AT91_SHDW_MR_WKMODE0L2H 0x00000001 - -#define AT91_SHDW_SR_RTTWK 0x00010000 -#define AT91_SHDW_SR_WAKEUP0 0x00000001 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h b/arch/arm/include/asm/arch-at91/at91_spi.h deleted file mode 100644 index c520e89..0000000 --- a/arch/arm/include/asm/arch-at91/at91_spi.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Serial Peripheral Interface (SPI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SPI_H -#define AT91_SPI_H - -#include <asm/arch/at91_pdc.h> - -typedef struct at91_spi { - u32 cr; /* 0x00 Control Register */ - u32 mr; /* 0x04 Mode Register */ - u32 rdr; /* 0x08 Receive Data Register */ - u32 tdr; /* 0x0C Transmit Data Register */ - u32 sr; /* 0x10 Status Register */ - u32 ier; /* 0x14 Interrupt Enable Register */ - u32 idr; /* 0x18 Interrupt Disable Register */ - u32 imr; /* 0x1C Interrupt Mask Register */ - u32 reserve1[4]; - u32 csr[4]; /* 0x30 Chip Select Register 0-3 */ - u32 reserve2[48]; - at91_pdc_t pdc; -} at91_spi_t; - -#ifdef CONFIG_AT91_LEGACY - -#define AT91_SPI_CR 0x00 /* Control Register */ -#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ -#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ -#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_MR 0x04 /* Mode Register */ -#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ -#define AT91_SPI_PS_FIXED (0 << 1) -#define AT91_SPI_PS_VARIABLE (1 << 1) -#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ - -#define AT91_SPI_RDR 0x08 /* Receive Data Register */ -#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ - -#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ -#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_SR 0x10 /* Status Register */ -#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ -#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ -#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ -#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ -#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ - -#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ -#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ -#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ - -#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ -#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ -#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -#define AT91_SPI_BITS_8 (0 << 4) -#define AT91_SPI_BITS_9 (1 << 4) -#define AT91_SPI_BITS_10 (2 << 4) -#define AT91_SPI_BITS_11 (3 << 4) -#define AT91_SPI_BITS_12 (4 << 4) -#define AT91_SPI_BITS_13 (5 << 4) -#define AT91_SPI_BITS_14 (6 << 4) -#define AT91_SPI_BITS_15 (7 << 4) -#define AT91_SPI_BITS_16 (8 << 4) -#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ - -#define AT91_SPI_RPR 0x0100 /* Receive Pointer Register */ - -#define AT91_SPI_RCR 0x0104 /* Receive Counter Register */ - -#define AT91_SPI_TPR 0x0108 /* Transmit Pointer Register */ - -#define AT91_SPI_TCR 0x010c /* Transmit Counter Register */ - -#define AT91_SPI_RNPR 0x0110 /* Receive Next Pointer Register */ - -#define AT91_SPI_RNCR 0x0114 /* Receive Next Counter Register */ - -#define AT91_SPI_TNPR 0x0118 /* Transmit Next Pointer Register */ - -#define AT91_SPI_TNCR 0x011c /* Transmit Next Counter Register */ - -#define AT91_SPI_PTCR 0x0120 /* PDC Transfer Control Register */ -#define AT91_SPI_RXTEN (0x1 << 0) /* Receiver Transfer Enable */ -#define AT91_SPI_RXTDIS (0x1 << 1) /* Receiver Transfer Disable */ -#define AT91_SPI_TXTEN (0x1 << 8) /* Transmitter Transfer Enable */ -#define AT91_SPI_TXTDIS (0x1 << 9) /* Transmitter Transfer Disable */ - -#define AT91_SPI_PTSR 0x0124 /* PDC Transfer Status Register */ - -#endif /* CONFIG_AT91_LEGACY */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_st.h b/arch/arm/include/asm/arch-at91/at91_st.h deleted file mode 100644 index 53f9320..0000000 --- a/arch/arm/include/asm/arch-at91/at91_st.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_ST_H -#define AT91_ST_H - -typedef struct at91_st { - - u32 cr; - u32 pimr; - u32 wdmr; - u32 rtmr; - u32 sr; - u32 ier; - u32 idr; - u32 imr; - u32 rtar; - u32 crtr; -} __attribute__ ((packed)) at91_st_t ; - -#define AT91_ST_CR_WDRST 1 - -#define AT91_ST_WDMR_WDV(x) (x & 0xFFFF) -#define AT91_ST_WDMR_RSTEN 0x00010000 -#define AT91_ST_WDMR_EXTEN 0x00020000 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_tc.h b/arch/arm/include/asm/arch-at91/at91_tc.h deleted file mode 100644 index 1e180ad..0000000 --- a/arch/arm/include/asm/arch-at91/at91_tc.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91_TC_H -#define AT91_TC_H - -typedef struct at91_tcc { - u32 ccr; /* 0x00 Channel Control Register */ - u32 cmr; /* 0x04 Channel Mode Register */ - u32 reserved1[2]; - u32 cv; /* 0x10 Counter Value */ - u32 ra; /* 0x14 Register A */ - u32 rb; /* 0x18 Register B */ - u32 rc; /* 0x1C Register C */ - u32 sr; /* 0x20 Status Register */ - u32 ier; /* 0x24 Interrupt Enable Register */ - u32 idr; /* 0x28 Interrupt Disable Register */ - u32 imr; /* 0x2C Interrupt Mask Register */ - u32 reserved3[4]; -} __attribute__ ((packed)) at91_tcc_t; - -#define AT91_TC_CCR_CLKEN 0x00000001 -#define AT91_TC_CCR_CLKDIS 0x00000002 -#define AT91_TC_CCR_SWTRG 0x00000004 - -#define AT91_TC_CMR_CPCTRG 0x00004000 - -#define AT91_TC_CMR_TCCLKS_CLOCK1 0x00000000 -#define AT91_TC_CMR_TCCLKS_CLOCK2 0x00000001 -#define AT91_TC_CMR_TCCLKS_CLOCK3 0x00000002 -#define AT91_TC_CMR_TCCLKS_CLOCK4 0x00000003 -#define AT91_TC_CMR_TCCLKS_CLOCK5 0x00000004 -#define AT91_TC_CMR_TCCLKS_XC0 0x00000005 -#define AT91_TC_CMR_TCCLKS_XC1 0x00000006 -#define AT91_TC_CMR_TCCLKS_XC2 0x00000007 - -typedef struct at91_tc { - at91_tcc_t tc[3]; /* 0x00 TC Channel 0-2 */ - u32 bcr; /* 0xC0 TC Block Control Register */ - u32 bmr; /* 0xC4 TC Block Mode Register */ -} __attribute__ ((packed)) at91_tc_t; - -#define AT91_TC_BMR_TC0XC0S_TCLK0 0x00000000 -#define AT91_TC_BMR_TC0XC0S_NONE 0x00000001 -#define AT91_TC_BMR_TC0XC0S_TIOA1 0x00000002 -#define AT91_TC_BMR_TC0XC0S_TIOA2 0x00000003 - -#define AT91_TC_BMR_TC1XC1S_TCLK1 0x00000000 -#define AT91_TC_BMR_TC1XC1S_NONE 0x00000004 -#define AT91_TC_BMR_TC1XC1S_TIOA0 0x00000008 -#define AT91_TC_BMR_TC1XC1S_TIOA2 0x0000000C - -#define AT91_TC_BMR_TC2XC2S_TCLK2 0x00000000 -#define AT91_TC_BMR_TC2XC2S_NONE 0x00000010 -#define AT91_TC_BMR_TC2XC2S_TIOA0 0x00000020 -#define AT91_TC_BMR_TC2XC2S_TIOA1 0x00000030 - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91_wdt.h b/arch/arm/include/asm/arch-at91/at91_wdt.h deleted file mode 100644 index cf08daf..0000000 --- a/arch/arm/include/asm/arch-at91/at91_wdt.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_wdt.h] - * - * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Watchdog Timer (WDT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_WDT_H -#define AT91_WDT_H - -#ifdef __ASSEMBLY__ - -#define AT91_ASM_WDT_MR (AT91_WDT_BASE + 0x04) - -#else - -typedef struct at91_wdt { - u32 cr; - u32 mr; - u32 sr; -} at91_wdt_t; - -#endif - -#define AT91_WDT_CR_WDRSTT 1 -#define AT91_WDT_CR_KEY 0xa5000000 /* KEY Password */ - -#define AT91_WDT_MR_WDV(x) (x & 0xfff) -#define AT91_WDT_MR_WDFIEN 0x00001000 -#define AT91_WDT_MR_WDRSTEN 0x00002000 -#define AT91_WDT_MR_WDRPROC 0x00004000 -#define AT91_WDT_MR_WDDIS 0x00008000 -#define AT91_WDT_MR_WDD(x) ((x & 0xfff) << 16) -#define AT91_WDT_MR_WDDBGHLT 0x10000000 -#define AT91_WDT_MR_WDIDLEHLT 0x20000000 - -#ifdef CONFIG_AT91_LEGACY - -#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ -#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ -#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ - -#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ -#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ -#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ -#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ -#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ -#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ -#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ -#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ -#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ - -#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ -#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ -#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ - -#endif /* CONFIG_AT91_LEGACY */ -#endif diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h deleted file mode 100644 index 5af6fdc..0000000 --- a/arch/arm/include/asm/arch-at91/at91cap9.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h] - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_H -#define AT91CAP9_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ -#define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ -#define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ -#define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ -#define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ -#define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ -#define AT91CAP9_ID_US0 8 /* USART 0 */ -#define AT91CAP9_ID_US1 9 /* USART 1 */ -#define AT91CAP9_ID_US2 10 /* USART 2 */ -#define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ -#define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ -#define AT91CAP9_ID_CAN 13 /* CAN */ -#define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ -#define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ -#define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ -#define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ -#define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ -#define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ -#define AT91CAP9_ID_EMAC 22 /* Ethernet */ -#define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ -#define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ -#define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ -#define AT91CAP9_ID_LCDC 26 /* LCD Controller */ -#define AT91CAP9_ID_DMA 27 /* DMA Controller */ -#define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ -#define AT91CAP9_ID_UHP 29 /* USB Host Port */ -#define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - -#define AT91_PIO_BASE 0xfffff200 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_PIT_BASE 0xfffffd30 - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91CAP9_BASE_UDPHS 0xfff78000 -#define AT91CAP9_BASE_TCB0 0xfff7c000 -#define AT91CAP9_BASE_TC0 0xfff7c000 -#define AT91CAP9_BASE_TC1 0xfff7c040 -#define AT91CAP9_BASE_TC2 0xfff7c080 -#define AT91CAP9_BASE_MCI0 0xfff80000 -#define AT91CAP9_BASE_MCI1 0xfff84000 -#define AT91CAP9_BASE_TWI 0xfff88000 -#define AT91CAP9_BASE_US0 0xfff8c000 -#define AT91CAP9_BASE_US1 0xfff90000 -#define AT91CAP9_BASE_US2 0xfff94000 -#define AT91CAP9_BASE_SSC0 0xfff98000 -#define AT91CAP9_BASE_SSC1 0xfff9c000 -#define AT91CAP9_BASE_AC97C 0xfffa0000 -#define AT91CAP9_BASE_SPI0 0xfffa4000 -#define AT91CAP9_BASE_SPI1 0xfffa8000 -#define AT91CAP9_BASE_CAN 0xfffac000 -#define AT91CAP9_BASE_PWMC 0xfffb8000 -#define AT91CAP9_BASE_EMAC 0xfffbc000 -#define AT91CAP9_BASE_ADC 0xfffc0000 -#define AT91CAP9_BASE_ISI 0xfffc4000 -#define AT91_BASE_SYS 0xffffe200 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) -#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVB (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVC (0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0 AT91CAP9_BASE_US0 -#define AT91_USART1 AT91CAP9_BASE_US1 -#define AT91_USART2 AT91CAP9_BASE_US2 - -/* - * SCKCR flags - */ -#define AT91CAP9_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ -#define AT91CAP9_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ -#define AT91CAP9_SCKCR_OSCSEL_RC (0 << 3) -#define AT91CAP9_SCKCR_OSCSEL_32 (1 << 3) - -#endif /* CONFIG_AT91_LEGACY */ -/* - * Internal Memory. - */ -#define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ -#define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ - -#define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ - -#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91CAP9_UDPHS_BASE 0x00600000 /* USB High Speed Device Port */ -#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ - -#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 - -/* - * Cpu Name - */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91CAP9" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91cap9_matrix.h b/arch/arm/include/asm/arch-at91/at91cap9_matrix.h deleted file mode 100644 index 22b7e9b..0000000 --- a/arch/arm/include/asm/arch-at91/at91cap9_matrix.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9_matrix.h] - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_MATRIX_H -#define AT91CAP9_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ -#define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ -#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ -#define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ -#define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ -#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ -#define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ -#define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91rm9200.h b/arch/arm/include/asm/arch-at91/at91rm9200.h deleted file mode 100644 index 1bee6f2..0000000 --- a/arch/arm/include/asm/arch-at91/at91rm9200.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __AT91RM9200_H__ -#define __AT91RM9200_H__ - -/* Periperial Identifiers */ - -#define AT91_ID_SYS 1 /* System Peripheral */ -#define AT91_ID_PIOA 2 /* PIO port A */ -#define AT91_ID_PIOB 3 /* PIO port B */ -#define AT91_ID_PIOC 4 /* PIO port C */ -#define AT91_ID_PIOD 5 /* PIO port D BGA only */ -#define AT91_ID_USART0 6 /* USART 0 */ -#define AT91_ID_USART1 7 /* USART 1 */ -#define AT91_ID_USART2 8 /* USART 2 */ -#define AT91_ID_USART3 9 /* USART 3 */ -#define AT91_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91_ID_UDP 11 /* USB Device Port */ -#define AT91_ID_TWI 12 /* Two Wire Interface */ -#define AT91_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91_ID_SSC0 14 /* Synch. Serial Controller 0 */ -#define AT91_ID_SSC1 15 /* Synch. Serial Controller 1 */ -#define AT91_ID_SSC2 16 /* Synch. Serial Controller 2 */ -#define AT91_ID_TC0 17 /* Timer Counter 0 */ -#define AT91_ID_TC1 18 /* Timer Counter 1 */ -#define AT91_ID_TC2 19 /* Timer Counter 2 */ -#define AT91_ID_TC3 20 /* Timer Counter 3 */ -#define AT91_ID_TC4 21 /* Timer Counter 4 */ -#define AT91_ID_TC5 22 /* Timer Counter 5 */ -#define AT91_ID_UHP 23 /* OHCI USB Host Port */ -#define AT91_ID_EMAC 24 /* Ethernet MAC */ -#define AT91_ID_IRQ0 25 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ1 26 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ2 27 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ3 28 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ4 29 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ5 30 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ6 31 /* Advanced Interrupt Controller */ - -#define AT91_USB_HOST_BASE 0x00300000 - -#define AT91_TC_BASE 0xFFFA0000 -#define AT91_UDP_BASE 0xFFFB0000 -#define AT91_MCI_BASE 0xFFFB4000 -#define AT91_TWI_BASE 0xFFFB8000 -#define AT91_EMAC_BASE 0xFFFBC000 -#define AT91_USART_BASE 0xFFFC0000 /* 4x 0x4000 Offset */ -#define AT91_SCC_BASE 0xFFFD0000 /* 4x 0x4000 Offset */ -#define AT91_SPI_BASE 0xFFFE0000 - -#define AT91_AIC_BASE 0xFFFFF000 -#define AT91_DBGU_BASE 0xFFFFF200 -#define AT91_PIO_BASE 0xFFFFF400 /* 4x 0x200 Offset */ -#define AT91_PMC_BASE 0xFFFFFC00 -#define AT91_ST_BASE 0xFFFFFD00 -#define AT91_ST_BASE 0xFFFFFD00 -#define AT91_RTC_BASE 0xFFFFFE00 -#define AT91_MC_BASE 0xFFFFFF00 - - -/* AT91RM9200 Periperial Multiplexing A */ -/* Port A */ -#define AT91_PMX_AA_EREFCK 0x00000080 -#define AT91_PMX_AA_ETXCK 0x00000080 -#define AT91_PMX_AA_ETXEN 0x00000100 -#define AT91_PMX_AA_ETX0 0x00000200 -#define AT91_PMX_AA_ETX1 0x00000400 -#define AT91_PMX_AA_ECRS 0x00000800 -#define AT91_PMX_AA_ECRSDV 0x00000800 -#define AT91_PMX_AA_ERX0 0x00001000 -#define AT91_PMX_AA_ERX1 0x00002000 -#define AT91_PMX_AA_ERXER 0x00004000 -#define AT91_PMX_AA_EMDC 0x00008000 -#define AT91_PMX_AA_EMDIO 0x00010000 - -#define AT91_PMX_AA_TXD2 0x00810000 - -#define AT91_PMX_AA_TWD 0x02000000 -#define AT91_PMX_AA_TWCK 0x04000000 - -/* Port B */ -#define AT91_PMX_BA_ERXCK 0x00080000 -#define AT91_PMX_BA_ECOL 0x00040000 -#define AT91_PMX_BA_ERXDV 0x00020000 -#define AT91_PMX_BA_ERX3 0x00010000 -#define AT91_PMX_BA_ERX2 0x00008000 -#define AT91_PMX_BA_ETXER 0x00004000 -#define AT91_PMX_BA_ETX3 0x00002000 -#define AT91_PMX_BA_ETX2 0x00001000 - -/* Port B */ - -#define AT91_PMX_CA_BFCK 0x00000001 -#define AT91_PMX_CA_BFRDY 0x00000002 -#define AT91_PMX_CA_SMOE 0x00000002 -#define AT91_PMX_CA_BFAVD 0x00000004 -#define AT91_PMX_CA_BFBAA 0x00000008 -#define AT91_PMX_CA_SMWE 0x00000008 -#define AT91_PMX_CA_BFOE 0x00000010 -#define AT91_PMX_CA_BFWE 0x00000020 -#define AT91_PMX_CA_NWAIT 0x00000040 -#define AT91_PMX_CA_A23 0x00000080 -#define AT91_PMX_CA_A24 0x00000100 -#define AT91_PMX_CA_A25 0x00000200 -#define AT91_PMX_CA_CFRNW 0x00000200 -#define AT91_PMX_CA_NCS4 0x00000400 -#define AT91_PMX_CA_CFCS 0x00000400 -#define AT91_PMX_CA_NCS5 0x00000800 -#define AT91_PMX_CA_CFCE1 0x00001000 -#define AT91_PMX_CA_NCS6 0x00001000 -#define AT91_PMX_CA_CFCE2 0x00002000 -#define AT91_PMX_CA_NCS7 0x00002000 -#define AT91_PMX_CA_D16_31 0xFFFF0000 - -#define CONFIG_SYS_AT91_CPU_NAME "AT91RM9200" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h deleted file mode 100644 index 7fd60b7..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9260.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h] - * - * (C) 2006 Andrew Victor - * - * Common definitions. - * Based on AT91SAM9260 datasheet revision A (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_H -#define AT91SAM9260_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ -#define AT91SAM9260_ID_US0 6 /* USART 0 */ -#define AT91SAM9260_ID_US1 7 /* USART 1 */ -#define AT91SAM9260_ID_US2 8 /* USART 2 */ -#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ -#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9260_ID_UHP 20 /* USB Host port */ -#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ -#define AT91SAM9260_ID_US3 23 /* USART 3 */ -#define AT91SAM9260_ID_US4 24 /* USART 4 */ -#define AT91SAM9260_ID_US5 25 /* USART 5 */ -#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ -#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ -#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ -#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - -#define AT91_EMAC_BASE 0xfffc4000 -#define AT91_SDRAMC_BASE 0xffffea00 -#define AT91_SMC_BASE 0xffffec00 -#define AT91_MATRIX_BASE 0xffffee00 -#define AT91_PIO_BASE 0xfffff400 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_SHDWN_BASE 0xfffffd10 -#define AT91_RTT_BASE 0xfffffd20 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 -/* - * The AT91SAM9XE has the GPBRs at a different address than - * the AT91SAM9260/9G20. - */ -#ifdef CONFIG_AT91SAM9XE -# define AT91_GPR_BASE 0xfffffd60 -#else -# define AT91_GPR_BASE 0xfffffd50 -#endif - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9260_BASE_TCB0 0xfffa0000 -#define AT91SAM9260_BASE_TC0 0xfffa0000 -#define AT91SAM9260_BASE_TC1 0xfffa0040 -#define AT91SAM9260_BASE_TC2 0xfffa0080 -#define AT91SAM9260_BASE_UDP 0xfffa4000 -#define AT91SAM9260_BASE_MCI 0xfffa8000 -#define AT91SAM9260_BASE_TWI 0xfffac000 -#define AT91SAM9260_BASE_US0 0xfffb0000 -#define AT91SAM9260_BASE_US1 0xfffb4000 -#define AT91SAM9260_BASE_US2 0xfffb8000 -#define AT91SAM9260_BASE_SSC 0xfffbc000 -#define AT91SAM9260_BASE_ISI 0xfffc0000 -#define AT91SAM9260_BASE_EMAC 0xfffc4000 -#define AT91SAM9260_BASE_SPI0 0xfffc8000 -#define AT91SAM9260_BASE_SPI1 0xfffcc000 -#define AT91SAM9260_BASE_US3 0xfffd0000 -#define AT91SAM9260_BASE_US4 0xfffd4000 -#define AT91SAM9260_BASE_US5 0xfffd8000 -#define AT91SAM9260_BASE_TCB1 0xfffdc000 -#define AT91SAM9260_BASE_TC3 0xfffdc000 -#define AT91SAM9260_BASE_TC4 0xfffdc040 -#define AT91SAM9260_BASE_TC5 0xfffdc080 -#define AT91SAM9260_BASE_ADC 0xfffe0000 -#define AT91_BASE_SYS 0xffffe800 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9260_BASE_US0 -#define AT91_USART1 AT91SAM9260_BASE_US1 -#define AT91_USART2 AT91SAM9260_BASE_US2 -#define AT91_USART3 AT91SAM9260_BASE_US3 -#define AT91_USART4 AT91SAM9260_BASE_US4 -#define AT91_USART5 AT91SAM9260_BASE_US5 - -#endif /* CONFIG_AT91_LEGACY */ - -/* - * Internal Memory. - */ -#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ -#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ -#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ -#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ -#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ - -#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ - -#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */ -#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ - -/* - * Cpu Name - */ -#if defined(CONFIG_AT91SAM9XE) -# define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9XE" -#elif defined(CONFIG_AT91SAM9260) -# define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9260" -#elif defined(CONFIG_AT91SAM9G20) -# define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G20" -#endif - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h deleted file mode 100644 index f8b023d..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9260 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_MATRIX_H -#define AT91SAM9260_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h deleted file mode 100644 index 7ca0283..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9261.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h] - * - * Copyright (C) SAN People - * - * Common definitions. - * Based on AT91SAM9261 datasheet revision E. (Preliminary) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_H -#define AT91SAM9261_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9261_ID_US0 6 /* USART 0 */ -#define AT91SAM9261_ID_US1 7 /* USART 1 */ -#define AT91SAM9261_ID_US2 8 /* USART 2 */ -#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9261_ID_UHP 20 /* USB Host port */ -#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ -#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - -#define AT91_SDRAMC_BASE 0xffffea00 -#define AT91_SMC_BASE 0xffffec00 -#define AT91_MATRIX_BASE 0xffffee00 -#define AT91_PIO_BASE 0xfffff400 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_RTT_BASE 0xfffffd20 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 -#define AT91_GPBR_BASE 0xfffffd50 - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9261_BASE_TCB0 0xfffa0000 -#define AT91SAM9261_BASE_TC0 0xfffa0000 -#define AT91SAM9261_BASE_TC1 0xfffa0040 -#define AT91SAM9261_BASE_TC2 0xfffa0080 -#define AT91SAM9261_BASE_UDP 0xfffa4000 -#define AT91SAM9261_BASE_MCI 0xfffa8000 -#define AT91SAM9261_BASE_TWI 0xfffac000 -#define AT91SAM9261_BASE_US0 0xfffb0000 -#define AT91SAM9261_BASE_US1 0xfffb4000 -#define AT91SAM9261_BASE_US2 0xfffb8000 -#define AT91SAM9261_BASE_SSC0 0xfffbc000 -#define AT91SAM9261_BASE_SSC1 0xfffc0000 -#define AT91SAM9261_BASE_SSC2 0xfffc4000 -#define AT91SAM9261_BASE_SPI0 0xfffc8000 -#define AT91SAM9261_BASE_SPI1 0xfffcc000 -#define AT91_BASE_SYS 0xffffea00 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9261_BASE_US0 -#define AT91_USART1 AT91SAM9261_BASE_US1 -#define AT91_USART2 AT91SAM9261_BASE_US2 - -#endif /* CONFIG_AT91_LEGACY */ - -/* - * Internal Memory. - */ -#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ - -#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ -#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ - -/* - * Cpu Name - */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h deleted file mode 100644 index e2bfc4b..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_MATRIX_H -#define AT91SAM9261_MATRIX_H - -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h deleted file mode 100644 index 4ada1ce..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h] - * - * (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_H -#define AT91SAM9263_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ -#define AT91SAM9263_ID_US0 7 /* USART 0 */ -#define AT91SAM9263_ID_US1 8 /* USART 1 */ -#define AT91SAM9263_ID_US2 9 /* USART 2 */ -#define AT91SAM9263_ID_MCI0 10 /* Multimedia Card Interface 0 */ -#define AT91SAM9263_ID_MCI1 11 /* Multimedia Card Interface 1 */ -#define AT91SAM9263_ID_CAN 12 /* CAN */ -#define AT91SAM9263_ID_TWI 13 /* Two-Wire Interface */ -#define AT91SAM9263_ID_SPI0 14 /* Serial Peripheral Interface 0 */ -#define AT91SAM9263_ID_SPI1 15 /* Serial Peripheral Interface 1 */ -#define AT91SAM9263_ID_SSC0 16 /* Serial Synchronous Controller 0 */ -#define AT91SAM9263_ID_SSC1 17 /* Serial Synchronous Controller 1 */ -#define AT91SAM9263_ID_AC97C 18 /* AC97 Controller */ -#define AT91SAM9263_ID_TCB 19 /* Timer Counter 0, 1 and 2 */ -#define AT91SAM9263_ID_PWMC 20 /* Pulse Width Modulation Controller */ -#define AT91SAM9263_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9263_ID_2DGE 23 /* 2D Graphic Engine */ -#define AT91SAM9263_ID_UDP 24 /* USB Device Port */ -#define AT91SAM9263_ID_ISI 25 /* Image Sensor Interface */ -#define AT91SAM9263_ID_LCDC 26 /* LCD Controller */ -#define AT91SAM9263_ID_DMA 27 /* DMA Controller */ -#define AT91SAM9263_ID_UHP 29 /* USB Host port */ -#define AT91SAM9263_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9263_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - -#define AT91_EMAC_BASE 0xfffbc000 -#define AT91_ECC0_BASE 0xffffe000 -#define AT91_SDRAMC0_BASE 0xffffe200 -#define AT91_SMC0_BASE 0xffffe400 -#define AT91_ECC1_BASE 0xffffe600 -#define AT91_SDRAMC1_BASE 0xffffe800 -#define AT91_SMC1_BASE 0xffffea00 -#define AT91_MATRIX_BASE 0xffffec00 -#define AT91_CCFG_BASE 0xffffed10 -#define AT91_DBGU_BASE 0xffffee00 -#define AT91_AIC_BASE 0xfffff000 -#define AT91_PIO_BASE 0xfffff200 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_RTT0_BASE 0xfffffd20 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 -#define AT91_RTT1_BASE 0xfffffd50 -#define AT91_GPBR_BASE 0xfffffd60 - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9263_BASE_UDP 0xfff78000 -#define AT91SAM9263_BASE_TCB0 0xfff7c000 -#define AT91SAM9263_BASE_TC0 0xfff7c000 -#define AT91SAM9263_BASE_TC1 0xfff7c040 -#define AT91SAM9263_BASE_TC2 0xfff7c080 -#define AT91SAM9263_BASE_MCI0 0xfff80000 -#define AT91SAM9263_BASE_MCI1 0xfff84000 -#define AT91SAM9263_BASE_TWI 0xfff88000 -#define AT91SAM9263_BASE_US0 0xfff8c000 -#define AT91SAM9263_BASE_US1 0xfff90000 -#define AT91SAM9263_BASE_US2 0xfff94000 -#define AT91SAM9263_BASE_SSC0 0xfff98000 -#define AT91SAM9263_BASE_SSC1 0xfff9c000 -#define AT91SAM9263_BASE_AC97C 0xfffa0000 -#define AT91SAM9263_BASE_SPI0 0xfffa4000 -#define AT91SAM9263_BASE_SPI1 0xfffa8000 -#define AT91SAM9263_BASE_CAN 0xfffac000 -#define AT91SAM9263_BASE_PWMC 0xfffb8000 -#define AT91SAM9263_BASE_EMAC 0xfffbc000 -#define AT91SAM9263_BASE_ISI 0xfffc4000 -#define AT91SAM9263_BASE_2DGE 0xfffc8000 -#define AT91_BASE_SYS 0xffffe000 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) -#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) -#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) -#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) -#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9263_BASE_US0 -#define AT91_USART1 AT91SAM9263_BASE_US1 -#define AT91_USART2 AT91SAM9263_BASE_US2 - -#define AT91_SMC AT91_SMC0 -#define AT91_SDRAMC AT91_SDRAMC0 - -#endif /* CONFIG_AT91_LEGACY */ - -/* - * Internal Memory. - */ -#define AT91SAM9263_SRAM0_BASE 0x00300000 /* Internal SRAM 0 base address */ -#define AT91SAM9263_SRAM0_SIZE (80 * SZ_1K) /* Internal SRAM 0 size (80Kb) */ - -#define AT91SAM9263_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9263_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */ - -#define AT91SAM9263_SRAM1_BASE 0x00500000 /* Internal SRAM 1 base address */ -#define AT91SAM9263_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ - -#define AT91SAM9263_LCDC_BASE 0x00700000 /* LCD Controller */ -#define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ -#define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ - -/* - * Cpu Name - */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h deleted file mode 100644 index 83aaaab..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263_matrix.h] - * - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_MATRIX_H -#define AT91SAM9263_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) -#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h deleted file mode 100644 index 6d97189..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jrosoft.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_AT91SAM9_MATRIX_H -#define __ASM_ARCH_AT91SAM9_MATRIX_H - -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) -#include <asm/arch/at91sam9260_matrix.h> -#elif defined(CONFIG_AT91SAM9261) -#include <asm/arch/at91sam9261_matrix.h> -#elif defined(CONFIG_AT91SAM9263) -#include <asm/arch/at91sam9263_matrix.h> -#elif defined(CONFIG_AT91SAM9RL) -#include <asm/arch/at91sam9rl_matrix.h> -#elif defined(CONFIG_AT91CAP9) -#include <asm/arch/at91cap9_matrix.h> -#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) -#include <asm/arch/at91sam9g45_matrix.h> -#else -#error "Unsupported AT91SAM9/CAP9 processor" -#endif - -#endif /* __ASM_ARCH_AT91SAM9_MATRIX_H */ diff --git a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h deleted file mode 100644 index c3da3a6..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_wdt.h] - * - * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * SDRAM Controllers (SDRAMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9_SDRAMC_H -#define AT91SAM9_SDRAMC_H - -#ifdef __ASSEMBLY__ - -#ifndef AT91_SDRAMC_BASE -#define AT91_SDRAMC_BASE AT91_SDRAMC0_BASE -#endif - -#define AT91_ASM_SDRAMC_MR AT91_SDRAMC_BASE -#define AT91_ASM_SDRAMC_TR (AT91_SDRAMC_BASE + 0x04) -#define AT91_ASM_SDRAMC_CR (AT91_SDRAMC_BASE + 0x08) -#define AT91_ASM_SDRAMC_MDR (AT91_SDRAMC_BASE + 0x24) - -#endif - -/* SDRAM Controller (SDRAMC) registers */ -#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL 0 -#define AT91_SDRAMC_MODE_NOP 1 -#define AT91_SDRAMC_MODE_PRECHARGE 2 -#define AT91_SDRAMC_MODE_LMR 3 -#define AT91_SDRAMC_MODE_REFRESH 4 -#define AT91_SDRAMC_MODE_EXT_LMR 5 -#define AT91_SDRAMC_MODE_DEEP 6 - -#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */ - -#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_1 (1 << 5) -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_CAS_3 (3 << 5) -#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 7) -#define AT91_SDRAMC_DBW_16 (1 << 7) -#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */ -#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */ -#define AT91_SDRAMC_LPCB_DISABLE 0 -#define AT91_SDRAMC_LPCB_SELF_REFRESH 1 -#define AT91_SDRAMC_LPCB_POWER_DOWN 2 -#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3 -#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */ -#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ -#define AT91_SDRAMC_DS (3 << 10) /* Drive Strength */ -#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ -#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12) -#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12) -#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12) - -#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ -#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */ - -#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */ -#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */ -#define AT91_SDRAMC_MD_SDRAM 0 -#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 - - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9_smc.h b/arch/arm/include/asm/arch-at91/at91sam9_smc.h deleted file mode 100644 index d180c8a..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9_smc.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Static Memory Controllers (SMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9_SMC_H -#define AT91SAM9_SMC_H - -#ifdef __ASSEMBLY__ - -#ifndef AT91_SMC_BASE -#define AT91_SMC_BASE AT91_SMC0_BASE -#endif - -#define AT91_ASM_SMC_SETUP0 AT91_SMC_BASE -#define AT91_ASM_SMC_PULSE0 (AT91_SMC_BASE + 0x04) -#define AT91_ASM_SMC_CYCLE0 (AT91_SMC_BASE + 0x08) -#define AT91_ASM_SMC_MODE0 (AT91_SMC_BASE + 0x0C) - -#else - -typedef struct at91_cs { - u32 setup; /* 0x00 SMC Setup Register */ - u32 pulse; /* 0x04 SMC Pulse Register */ - u32 cycle; /* 0x08 SMC Cycle Register */ - u32 mode; /* 0x0C SMC Mode Register */ -} at91_cs_t; - -typedef struct at91_smc { - at91_cs_t cs[8]; -} at91_smc_t; - -#endif /* __ASSEMBLY__ */ - -#define AT91_SMC_SETUP_NWE(x) (x & 0x3f) -#define AT91_SMC_SETUP_NCS_WR(x) ((x & 0x3f) << 8) -#define AT91_SMC_SETUP_NRD(x) ((x & 0x3f) << 16) -#define AT91_SMC_SETUP_NCS_RD(x) ((x & 0x3f) << 24) - -#define AT91_SMC_PULSE_NWE(x) (x & 0x7f) -#define AT91_SMC_PULSE_NCS_WR(x) ((x & 0x7f) << 8) -#define AT91_SMC_PULSE_NRD(x) ((x & 0x7f) << 16) -#define AT91_SMC_PULSE_NCS_RD(x) ((x & 0x7f) << 24) - -#define AT91_SMC_CYCLE_NWE(x) (x & 0x1ff) -#define AT91_SMC_CYCLE_NRD(x) ((x & 0x1ff) << 16) - -#define AT91_SMC_MODE_RM_NCS 0x00000000 -#define AT91_SMC_MODE_RM_NRD 0x00000001 -#define AT91_SMC_MODE_WM_NCS 0x00000000 -#define AT91_SMC_MODE_WM_NWE 0x00000002 - -#define AT91_SMC_MODE_EXNW_DISABLE 0x00000000 -#define AT91_SMC_MODE_EXNW_FROZEN 0x00000020 -#define AT91_SMC_MODE_EXNW_READY 0x00000030 - -#define AT91_SMC_MODE_BAT 0x00000100 -#define AT91_SMC_MODE_DBW_8 0x00000000 -#define AT91_SMC_MODE_DBW_16 0x00001000 -#define AT91_SMC_MODE_DBW_32 0x00002000 -#define AT91_SMC_MODE_TDF_CYCLE(x) ((x & 0xf) << 16) -#define AT91_SMC_MODE_TDF 0x00100000 -#define AT91_SMC_MODE_PMEN 0x01000000 -#define AT91_SMC_MODE_PS_4 0x00000000 -#define AT91_SMC_MODE_PS_8 0x10000000 -#define AT91_SMC_MODE_PS_16 0x20000000 -#define AT91_SMC_MODE_PS_32 0x30000000 - -#ifdef CONFIG_AT91_LEGACY - -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ -#define AT91_SMC_NWESETUP_(x) ((x) << 0) -#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ -#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) -#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ -#define AT91_SMC_NRDSETUP_(x) ((x) << 16) -#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ -#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) - -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ -#define AT91_SMC_NWEPULSE_(x) ((x) << 0) -#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ -#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) -#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ -#define AT91_SMC_NRDPULSE_(x) ((x) << 16) -#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ -#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) - -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ -#define AT91_SMC_NWECYCLE_(x) ((x) << 0) -#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ -#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) - -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ -#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ -#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) -#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) -#define AT91_SMC_EXNWMODE_READY (3 << 4) -#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ -#define AT91_SMC_BAT_SELECT (0 << 8) -#define AT91_SMC_BAT_WRITE (1 << 8) -#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ -#define AT91_SMC_DBW_8 (0 << 12) -#define AT91_SMC_DBW_16 (1 << 12) -#define AT91_SMC_DBW_32 (2 << 12) -#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ -#define AT91_SMC_TDF_(x) ((x) << 16) -#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ -#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ -#define AT91_SMC_PS (3 << 28) /* Page Size */ -#define AT91_SMC_PS_4 (0 << 28) -#define AT91_SMC_PS_8 (1 << 28) -#define AT91_SMC_PS_16 (2 << 28) -#define AT91_SMC_PS_32 (3 << 28) - -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#endif - -#endif -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h deleted file mode 100644 index 445f4b2..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9g45.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Chip-specific header file for the AT91SAM9M1x family - * - * Copyright (C) 2008 Atmel Corporation. - * - * Common definitions. - * Based on AT91SAM9G45 preliminary datasheet. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9G45_H -#define AT91SAM9G45_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Controller Interrupt */ -#define AT91SAM9G45_ID_PIOA 2 /* Parallel I/O Controller A */ -#define AT91SAM9G45_ID_PIOB 3 /* Parallel I/O Controller B */ -#define AT91SAM9G45_ID_PIOC 4 /* Parallel I/O Controller C */ -#define AT91SAM9G45_ID_PIODE 5 /* Parallel I/O Controller D and E */ -#define AT91SAM9G45_ID_TRNG 6 /* True Random Number Generator */ -#define AT91SAM9G45_ID_US0 7 /* USART 0 */ -#define AT91SAM9G45_ID_US1 8 /* USART 1 */ -#define AT91SAM9G45_ID_US2 9 /* USART 2 */ -#define AT91SAM9G45_ID_US3 10 /* USART 3 */ -#define AT91SAM9G45_ID_MCI0 11 /* High Speed Multimedia Card Interface 0 */ -#define AT91SAM9G45_ID_TWI0 12 /* Two-Wire Interface 0 */ -#define AT91SAM9G45_ID_TWI1 13 /* Two-Wire Interface 1 */ -#define AT91SAM9G45_ID_SPI0 14 /* Serial Peripheral Interface 0 */ -#define AT91SAM9G45_ID_SPI1 15 /* Serial Peripheral Interface 1 */ -#define AT91SAM9G45_ID_SSC0 16 /* Synchronous Serial Controller 0 */ -#define AT91SAM9G45_ID_SSC1 17 /* Synchronous Serial Controller 1 */ -#define AT91SAM9G45_ID_TCB 18 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ -#define AT91SAM9G45_ID_PWMC 19 /* Pulse Width Modulation Controller */ -#define AT91SAM9G45_ID_TSC 20 /* Touch Screen ADC Controller */ -#define AT91SAM9G45_ID_DMA 21 /* DMA Controller */ -#define AT91SAM9G45_ID_UHPHS 22 /* USB Host High Speed */ -#define AT91SAM9G45_ID_LCDC 23 /* LCD Controller */ -#define AT91SAM9G45_ID_AC97C 24 /* AC97 Controller */ -#define AT91SAM9G45_ID_EMAC 25 /* Ethernet MAC */ -#define AT91SAM9G45_ID_ISI 26 /* Image Sensor Interface */ -#define AT91SAM9G45_ID_UDPHS 27 /* USB Device High Speed */ -#define AT91SAM9G45_ID_AESTDESSHA 28 /* AES + T-DES + SHA */ -#define AT91SAM9G45_ID_MCI1 29 /* High Speed Multimedia Card Interface 1 */ -#define AT91SAM9G45_ID_VDEC 30 /* Video Decoder */ -#define AT91SAM9G45_ID_IRQ0 31 /* Advanced Interrupt Controller */ - -#define AT91_EMAC_BASE 0xfffbc000 -#define AT91_SMC_BASE 0xffffe800 -#define AT91_MATRIX_BASE 0xffffea00 -#define AT91_PIO_BASE 0xfffff200 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9G45_BASE_UDPHS 0xfff78000 -#define AT91SAM9G45_BASE_TC0 0xfff7c000 -#define AT91SAM9G45_BASE_TC1 0xfff7c040 -#define AT91SAM9G45_BASE_TC2 0xfff7c080 -#define AT91SAM9G45_BASE_MCI0 0xfff80000 -#define AT91SAM9G45_BASE_TWI0 0xfff84000 -#define AT91SAM9G45_BASE_TWI1 0xfff88000 -#define AT91SAM9G45_BASE_US0 0xfff8c000 -#define AT91SAM9G45_BASE_US1 0xfff90000 -#define AT91SAM9G45_BASE_US2 0xfff94000 -#define AT91SAM9G45_BASE_US3 0xfff98000 -#define AT91SAM9G45_BASE_SSC0 0xfff9c000 -#define AT91SAM9G45_BASE_SSC1 0xfffa0000 -#define AT91SAM9G45_BASE_SPI0 0xfffa4000 -#define AT91SAM9G45_BASE_SPI1 0xfffa8000 -#define AT91SAM9G45_BASE_AC97C 0xfffac000 -#define AT91SAM9G45_BASE_TSC 0xfffb0000 -#define AT91SAM9G45_BASE_ISI 0xfffb4000 -#define AT91SAM9G45_BASE_PWMC 0xfffb8000 -#define AT91SAM9G45_BASE_EMAC 0xfffbc000 -#define AT91SAM9G45_BASE_AES 0xfffc0000 -#define AT91SAM9G45_BASE_TDES 0xfffc4000 -#define AT91SAM9G45_BASE_SHA 0xfffc8000 -#define AT91SAM9G45_BASE_TRNG 0xfffcc000 -#define AT91SAM9G45_BASE_MCI1 0xfffd0000 -#define AT91SAM9G45_BASE_TC3 0xfffd4000 -#define AT91SAM9G45_BASE_TC4 0xfffd4040 -#define AT91SAM9G45_BASE_TC5 0xfffd4080 -#define AT91_BASE_SYS 0xffffe200 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) -#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9G45_BASE_US0 -#define AT91_USART1 AT91SAM9G45_BASE_US1 -#define AT91_USART2 AT91SAM9G45_BASE_US2 -#define AT91_USART3 AT91SAM9G45_BASE_US3 - -#endif - -/* - * Internal Memory. - */ -#define AT91SAM9G45_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9G45_SRAM_SIZE SZ_64K /* Internal SRAM size (64Kb) */ - -#define AT91SAM9G45_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9G45_ROM_SIZE SZ_64K /* Internal ROM size (64Kb) */ - -#define AT91SAM9G45_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91SAM9G45_UDPHS_FIFO 0x00600000 /* USB Device HS controller */ -#define AT91SAM9G45_HCI_BASE 0x00700000 /* USB Host controller (OHCI) */ -#define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */ -#define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */ - -#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 - -/* - * Cpu Name - */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h deleted file mode 100644 index 1620e1b..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Matrix-centric header file for the AT91SAM9M1x family - * - * Copyright (C) 2008 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9G45 preliminary datasheet. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9G45_MATRIX_H -#define AT91SAM9G45_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0) -#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0) -#define AT91_MATRIX_ULBT_128 (7 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x110) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) -#define AT91_MATRIX_TCM_NWS (0x1 << 11) /* Wait state TCM register */ -#define AT91_MATRIX_TCM_NO_WS (0x0 << 11) -#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11) - -#define AT91_MATRIX_VIDEO (AT91_MATRIX + 0x118) /* Video Mode Configuration Register */ -#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */ -#define AT91C_VDEC_SEL_OFF (0 << 0) -#define AT91C_VDEC_SEL_ON (1 << 0) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x128) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF0 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF1 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) -#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) -#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ -#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) -#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) -#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ -#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) -#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) - -#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ -#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ -#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) -#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) -#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ - -#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ -#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ -#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) -#define AT91_MATRIX_WPSR_WPV (1 << 0) -#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h deleted file mode 100644 index 8eb0d4f..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h] - * - * Copyright (C) 2007 Atmel Corporation - * - * Common definitions. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_H -#define AT91SAM9RL_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Controller */ -#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ -#define AT91SAM9RL_ID_US0 6 /* USART 0 */ -#define AT91SAM9RL_ID_US1 7 /* USART 1 */ -#define AT91SAM9RL_ID_US2 8 /* USART 2 */ -#define AT91SAM9RL_ID_US3 9 /* USART 3 */ -#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ -#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ -#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ -#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ -#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ -#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ -#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ -#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ -#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ -#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ -#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ -#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ - -#define AT91_SDRAMC_BASE 0xffffea00 -#define AT91_SMC_BASE 0xffffec00 -#define AT91_MATRIX_BASE 0xffffee00 -#define AT91_PIO_BASE 0xfffff400 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 - -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9RL_BASE_TCB0 0xfffa0000 -#define AT91SAM9RL_BASE_TC0 0xfffa0000 -#define AT91SAM9RL_BASE_TC1 0xfffa0040 -#define AT91SAM9RL_BASE_TC2 0xfffa0080 -#define AT91SAM9RL_BASE_MCI 0xfffa4000 -#define AT91SAM9RL_BASE_TWI0 0xfffa8000 -#define AT91SAM9RL_BASE_TWI1 0xfffac000 -#define AT91SAM9RL_BASE_US0 0xfffb0000 -#define AT91SAM9RL_BASE_US1 0xfffb4000 -#define AT91SAM9RL_BASE_US2 0xfffb8000 -#define AT91SAM9RL_BASE_US3 0xfffbc000 -#define AT91SAM9RL_BASE_SSC0 0xfffc0000 -#define AT91SAM9RL_BASE_SSC1 0xfffc4000 -#define AT91SAM9RL_BASE_PWMC 0xfffc8000 -#define AT91SAM9RL_BASE_SPI 0xfffcc000 -#define AT91SAM9RL_BASE_TSC 0xfffd0000 -#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 -#define AT91SAM9RL_BASE_AC97C 0xfffd8000 -#define AT91_BASE_SYS 0xffffc000 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9RL_BASE_US0 -#define AT91_USART1 AT91SAM9RL_BASE_US1 -#define AT91_USART2 AT91SAM9RL_BASE_US2 -#define AT91_USART3 AT91SAM9RL_BASE_US3 - -#endif /* CONFIG_AT91_LEGACY */ - -/* - * Internal Memory. - */ -#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ - -#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ - -#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ - -/* - * Cpu Name - */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9RL" - -#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h deleted file mode 100644 index af8d914..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_MATRIX_H -#define AT91SAM9RL_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - - -#endif diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h deleted file mode 100644 index 457e6c9..0000000 --- a/arch/arm/include/asm/arch-at91/clk.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2007 - * Stelian Pop <stelian.pop@leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_CLK_H__ -#define __ASM_ARM_ARCH_CLK_H__ - -#include <asm/arch/hardware.h> - -unsigned long get_cpu_clk_rate(void); -unsigned long get_main_clk_rate(void); -unsigned long get_mck_clk_rate(void); -unsigned long get_plla_clk_rate(void); -unsigned long get_pllb_clk_rate(void); -unsigned int get_pllb_init(void); - -static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) -{ - return get_mck_clk_rate(); -} - -static inline unsigned long get_usart_clk_rate(unsigned int dev_id) -{ - return get_mck_clk_rate(); -} - -static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) -{ - return get_mck_clk_rate(); -} - -static inline unsigned long get_spi_clk_rate(unsigned int dev_id) -{ - return get_mck_clk_rate(); -} - -static inline unsigned long get_twi_clk_rate(unsigned int dev_id) -{ - return get_mck_clk_rate(); -} - -static inline unsigned long get_mci_clk_rate(void) -{ - return get_mck_clk_rate(); -} - -int at91_clock_init(unsigned long main_clock); -#endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/arch/arm/include/asm/arch-at91/gpio.h b/arch/arm/include/asm/arch-at91/gpio.h deleted file mode 100644 index 716f81f..0000000 --- a/arch/arm/include/asm/arch-at91/gpio.h +++ /dev/null @@ -1,238 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h] - * - * Copyright (C) 2005 HP Labs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_AT91_GPIO_H -#define __ASM_ARCH_AT91_GPIO_H - -#include <asm/io.h> -#include <asm/errno.h> -#include <asm/arch/at91_pio.h> -#include <asm/arch/hardware.h> - -#ifdef CONFIG_AT91_LEGACY - -#define PIN_BASE 32 - -#define MAX_GPIO_BANKS 5 - -/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ - -#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) -#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) -#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) -#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) -#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) -#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) -#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) -#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) -#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) -#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) -#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) -#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) -#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) -#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) -#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) -#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) -#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) -#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) -#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) -#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) -#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) -#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) -#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) -#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) -#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) -#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) -#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) -#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) -#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) -#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) -#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) -#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) - -#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) -#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) -#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) -#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) -#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) -#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) -#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) -#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) -#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) -#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) -#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) -#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) -#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) -#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) -#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) -#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) -#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) -#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) -#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) -#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) -#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) -#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) -#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) -#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) -#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) -#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) -#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) -#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) -#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) -#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) -#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) -#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) - -#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) -#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) -#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) -#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) -#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) -#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) -#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) -#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) -#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) -#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) -#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) -#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) -#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) -#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) -#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) -#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) -#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) -#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) -#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) -#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) -#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) -#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) -#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) -#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) -#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) -#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) -#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) -#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) -#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) -#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) -#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) -#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) - -#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) -#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) -#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) -#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) -#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) -#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) -#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) -#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) -#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) -#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) -#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) -#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) -#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) -#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) -#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) -#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) -#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) -#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) -#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) -#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) -#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) -#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) -#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) -#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) -#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) -#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) -#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) -#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) -#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) -#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) -#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) -#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) - -#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) -#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) -#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) -#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) -#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) -#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) -#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) -#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) -#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) -#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) -#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) -#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) -#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) -#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) -#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) -#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) -#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) -#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) -#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) -#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) -#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) -#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) -#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) -#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) -#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) -#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) -#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) -#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) -#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) -#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) -#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) -#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) - -static unsigned long at91_pios[] = { - AT91_PIOA, - AT91_PIOB, - AT91_PIOC, -#ifdef AT91_PIOD - AT91_PIOD, -#ifdef AT91_PIOE - AT91_PIOE -#endif -#endif -}; - -static inline void *pin_to_controller(unsigned pin) -{ - pin -= PIN_BASE; - pin /= 32; - return (void *)(AT91_BASE_SYS + at91_pios[pin]); -} - -static inline unsigned pin_to_mask(unsigned pin) -{ - pin -= PIN_BASE; - return 1 << (pin % 32); -} - -/* The following macros are need for backward compatibility */ -#define at91_set_GPIO_periph(x, y) \ - at91_set_gpio_periph((x - PIN_BASE) / 32,(x % 32), y) -#define at91_set_A_periph(x, y) \ - at91_set_a_periph((x - PIN_BASE) / 32,(x % 32), y) -#define at91_set_B_periph(x, y) \ - at91_set_b_periph((x - PIN_BASE) / 32,(x % 32), y) -#define at91_set_gpio_output(x, y) \ - at91_set_pio_output((x - PIN_BASE) / 32,(x % 32), y) -#define at91_set_gpio_input(x, y) \ - at91_set_pio_input((x - PIN_BASE) / 32,(x % 32), y) -#define at91_set_gpio_value(x, y) \ - at91_set_pio_value((x - PIN_BASE) / 32,(x % 32), y) -#define at91_get_gpio_value(x) \ - at91_get_pio_value((x - PIN_BASE) / 32,(x % 32)) -#else -#define at91_set_gpio_value(x, y) at91_set_pio_value(x, y) -#define at91_get_gpio_value(x) at91_get_pio_value(x) -#endif -#endif diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h deleted file mode 100644 index 6b44d61..0000000 --- a/arch/arm/include/asm/arch-at91/hardware.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h] - * - * Copyright (C) 2003 SAN People - * Copyright (C) 2003 ATMEL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/sizes.h> - -#if defined(CONFIG_AT91RM9200) -#include <asm/arch-at91/at91rm9200.h> -#define AT91_PMC_UHP AT91RM9200_PMC_UHP -#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) -#include <asm/arch/at91sam9260.h> -#define AT91_BASE_MCI AT91SAM9260_BASE_MCI -#define AT91_BASE_SPI AT91SAM9260_BASE_SPI0 -#define AT91_BASE_SPI1 AT91SAM9260_BASE_SPI1 -#define AT91_ID_UHP AT91SAM9260_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) -#include <asm/arch/at91sam9261.h> -#define AT91_BASE_SPI AT91SAM9261_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9261_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9263) -#include <asm/arch/at91sam9263.h> -#define AT91_BASE_SPI AT91SAM9263_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9263_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9RL) -#include <asm/arch/at91sam9rl.h> -#define AT91_BASE_SPI AT91SAM9RL_BASE_SPI -#define AT91_ID_UHP AT91SAM9RL_ID_UHP -#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) -#include <asm/arch/at91sam9g45.h> -#define AT91_BASE_EMAC AT91SAM9G45_BASE_EMAC -#define AT91_BASE_SPI AT91SAM9G45_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9G45_ID_UHPHS -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91CAP9) -#include <asm/arch/at91cap9.h> -#define AT91_BASE_SPI AT91CAP9_BASE_SPI0 -#define AT91_ID_UHP AT91CAP9_ID_UHP -#define AT91_PMC_UHP AT91CAP9_PMC_UHP -#elif defined(CONFIG_AT91X40) -#include <asm/arch/at91x40.h> -#else -#error "Unsupported AT91 processor" -#endif - -/* External Memory Map */ -#define AT91_CHIPSELECT_0 0x10000000 -#define AT91_CHIPSELECT_1 0x20000000 -#define AT91_CHIPSELECT_2 0x30000000 -#define AT91_CHIPSELECT_3 0x40000000 -#define AT91_CHIPSELECT_4 0x50000000 -#define AT91_CHIPSELECT_5 0x60000000 -#define AT91_CHIPSELECT_6 0x70000000 -#define AT91_CHIPSELECT_7 0x80000000 - -/* SDRAM */ -#ifdef CONFIG_DRAM_BASE -#define AT91_SDRAM_BASE CONFIG_DRAM_BASE -#else -#define AT91_SDRAM_BASE AT91_CHIPSELECT_1 -#endif - -/* Clocks */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - -#endif diff --git a/arch/arm/include/asm/arch-at91/io.h b/arch/arm/include/asm/arch-at91/io.h deleted file mode 100644 index 38d185e..0000000 --- a/arch/arm/include/asm/arch-at91/io.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/io.h] - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include <asm/io.h> - -#ifdef CONFIG_AT91_LEGACY - -static inline unsigned int at91_sys_read(unsigned int reg_offset) -{ - void *addr = (void *)AT91_BASE_SYS; - - return __raw_readl(addr + reg_offset); -} - -static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) -{ - void *addr = (void *)AT91_BASE_SYS; - - __raw_writel(value, addr + reg_offset); -} -#endif - -#endif diff --git a/arch/arm/include/asm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h deleted file mode 100644 index d489fa2..0000000 --- a/arch/arm/include/asm/arch-at91/memory-map.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop@leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_MEMORYMAP_H__ -#define __ASM_ARM_ARCH_MEMORYMAP_H__ - -#include <asm/arch/hardware.h> - -#define USART0_BASE AT91_USART0 -#define USART1_BASE AT91_USART1 -#define USART2_BASE AT91_USART2 -#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU) -#define SPI0_BASE AT91_BASE_SPI -#define SPI1_BASE AT91_BASE_SPI1 - -#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */ diff --git a/arch/arm/include/asm/arch-at91rm9200/AT91RM9200.h b/arch/arm/include/asm/arch-at91rm9200/AT91RM9200.h deleted file mode 100644 index 00bae1c..0000000 --- a/arch/arm/include/asm/arch-at91rm9200/AT91RM9200.h +++ /dev/null @@ -1,812 +0,0 @@ -/* - * (C) Copyright 2003 - * AT91RM9200 definitions - * Author : ATMEL AT91 application group - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef AT91RM9200_H -#define AT91RM9200_H - -#ifndef __ASSEMBLY__ -typedef volatile unsigned int AT91_REG; /* Hardware register definition */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Timer Counter Channel Interface */ -/*****************************************************************************/ -typedef struct _AT91S_TC -{ - AT91_REG TC_CCR; /* Channel Control Register */ - AT91_REG TC_CMR; /* Channel Mode Register */ - AT91_REG Reserved0[2]; /* */ - AT91_REG TC_CV; /* Counter Value */ - AT91_REG TC_RA; /* Register A */ - AT91_REG TC_RB; /* Register B */ - AT91_REG TC_RC; /* Register C */ - AT91_REG TC_SR; /* Status Register */ - AT91_REG TC_IER; /* Interrupt Enable Register */ - AT91_REG TC_IDR; /* Interrupt Disable Register */ - AT91_REG TC_IMR; /* Interrupt Mask Register */ -} AT91S_TC, *AT91PS_TC; - -#define AT91C_TC_TIMER_DIV1_CLOCK ((unsigned int) 0x0 << 0) /* (TC) MCK/2 */ -#define AT91C_TC_TIMER_DIV2_CLOCK ((unsigned int) 0x1 << 0) /* (TC) MCK/8 */ -#define AT91C_TC_TIMER_DIV3_CLOCK ((unsigned int) 0x2 << 0) /* (TC) MCK/32 */ -#define AT91C_TC_TIMER_DIV4_CLOCK ((unsigned int) 0x3 << 0) /* (TC) MCK/128 */ -#define AT91C_TC_SLOW_CLOCK ((unsigned int) 0x4 << 0) /* (TC) SLOW CLK*/ -#define AT91C_TC_XC0_CLOCK ((unsigned int) 0x5 << 0) /* (TC) XC0 */ -#define AT91C_TC_XC1_CLOCK ((unsigned int) 0x6 << 0) /* (TC) XC1 */ -#define AT91C_TC_XC2_CLOCK ((unsigned int) 0x7 << 0) /* (TC) XC2 */ -#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) /* (TCB) None signal connected to XC0 */ -#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) /* (TCB) None signal connected to XC1 */ -#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) /* (TCB) None signal connected to XC2 */ -#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) /* (TC) Counter Clock Disable Command */ -#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) /* (TC) Software Trigger Command */ -#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) /* (TC) Counter Clock Enable Command */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Usart */ -/*****************************************************************************/ -typedef struct _AT91S_USART -{ - AT91_REG US_CR; /* Control Register */ - AT91_REG US_MR; /* Mode Register */ - AT91_REG US_IER; /* Interrupt Enable Register */ - AT91_REG US_IDR; /* Interrupt Disable Register */ - AT91_REG US_IMR; /* Interrupt Mask Register */ - AT91_REG US_CSR; /* Channel Status Register */ - AT91_REG US_RHR; /* Receiver Holding Register */ - AT91_REG US_THR; /* Transmitter Holding Register */ - AT91_REG US_BRGR; /* Baud Rate Generator Register */ - AT91_REG US_RTOR; /* Receiver Time-out Register */ - AT91_REG US_TTGR; /* Transmitter Time-guard Register */ - AT91_REG Reserved0[5]; /* */ - AT91_REG US_FIDI; /* FI_DI_Ratio Register */ - AT91_REG US_NER; /* Nb Errors Register */ - AT91_REG US_XXR; /* XON_XOFF Register */ - AT91_REG US_IF; /* IRDA_FILTER Register */ - AT91_REG Reserved1[44]; /* */ - AT91_REG US_RPR; /* Receive Pointer Register */ - AT91_REG US_RCR; /* Receive Counter Register */ - AT91_REG US_TPR; /* Transmit Pointer Register */ - AT91_REG US_TCR; /* Transmit Counter Register */ - AT91_REG US_RNPR; /* Receive Next Pointer Register */ - AT91_REG US_RNCR; /* Receive Next Counter Register */ - AT91_REG US_TNPR; /* Transmit Next Pointer Register */ - AT91_REG US_TNCR; /* Transmit Next Counter Register */ - AT91_REG US_PTCR; /* PDC Transfer Control Register */ - AT91_REG US_PTSR; /* PDC Transfer Status Register */ -} AT91S_USART, *AT91PS_USART; - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Clock Generator Controler */ -/*****************************************************************************/ -typedef struct _AT91S_CKGR -{ - AT91_REG CKGR_MOR; /* Main Oscillator Register */ - AT91_REG CKGR_MCFR; /* Main Clock Frequency Register */ - AT91_REG CKGR_PLLAR; /* PLL A Register */ - AT91_REG CKGR_PLLBR; /* PLL B Register */ -} AT91S_CKGR, *AT91PS_CKGR; - -/* -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- */ -#define AT91C_CKGR_MOSCEN ((unsigned int) 0x1 << 0) /* (CKGR) Main Oscillator Enable */ -#define AT91C_CKGR_OSCTEST ((unsigned int) 0x1 << 1) /* (CKGR) Oscillator Test */ -#define AT91C_CKGR_OSCOUNT ((unsigned int) 0xFF << 8) /* (CKGR) Main Oscillator Start-up Time */ - -/* -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- */ -#define AT91C_CKGR_MAINF ((unsigned int) 0xFFFF << 0) /* (CKGR) Main Clock Frequency */ -#define AT91C_CKGR_MAINRDY ((unsigned int) 0x1 << 16) /* (CKGR) Main Clock Ready */ - -/* -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register -------- */ -#define AT91C_CKGR_DIVA ((unsigned int) 0xFF << 0) /* (CKGR) Divider Selected */ -#define AT91C_CKGR_DIVA_0 ((unsigned int) 0x0) /* (CKGR) Divider output is 0 */ -#define AT91C_CKGR_DIVA_BYPASS ((unsigned int) 0x1) /* (CKGR) Divider is bypassed */ -#define AT91C_CKGR_PLLACOUNT ((unsigned int) 0x3F << 8) /* (CKGR) PLL A Counter */ -#define AT91C_CKGR_OUTA ((unsigned int) 0x3 << 14) /* (CKGR) PLL A Output Frequency Range */ -#define AT91C_CKGR_OUTA_0 ((unsigned int) 0x0 << 14) /* (CKGR) Please refer to the PLLA datasheet */ -#define AT91C_CKGR_OUTA_1 ((unsigned int) 0x1 << 14) /* (CKGR) Please refer to the PLLA datasheet */ -#define AT91C_CKGR_OUTA_2 ((unsigned int) 0x2 << 14) /* (CKGR) Please refer to the PLLA datasheet */ -#define AT91C_CKGR_OUTA_3 ((unsigned int) 0x3 << 14) /* (CKGR) Please refer to the PLLA datasheet */ -#define AT91C_CKGR_MULA ((unsigned int) 0x7FF << 16) /* (CKGR) PLL A Multiplier */ -#define AT91C_CKGR_SRCA ((unsigned int) 0x1 << 29) /* (CKGR) PLL A Source */ - -/* -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register -------- */ -#define AT91C_CKGR_DIVB ((unsigned int) 0xFF << 0) /* (CKGR) Divider Selected */ -#define AT91C_CKGR_DIVB_0 ((unsigned int) 0x0) /* (CKGR) Divider output is 0 */ -#define AT91C_CKGR_DIVB_BYPASS ((unsigned int) 0x1) /* (CKGR) Divider is bypassed */ -#define AT91C_CKGR_PLLBCOUNT ((unsigned int) 0x3F << 8) /* (CKGR) PLL B Counter */ -#define AT91C_CKGR_OUTB ((unsigned int) 0x3 << 14) /* (CKGR) PLL B Output Frequency Range */ -#define AT91C_CKGR_OUTB_0 ((unsigned int) 0x0 << 14) /* (CKGR) Please refer to the PLLB datasheet */ -#define AT91C_CKGR_OUTB_1 ((unsigned int) 0x1 << 14) /* (CKGR) Please refer to the PLLB datasheet */ -#define AT91C_CKGR_OUTB_2 ((unsigned int) 0x2 << 14) /* (CKGR) Please refer to the PLLB datasheet */ -#define AT91C_CKGR_OUTB_3 ((unsigned int) 0x3 << 14) /* (CKGR) Please refer to the PLLB datasheet */ -#define AT91C_CKGR_MULB ((unsigned int) 0x7FF << 16) /* (CKGR) PLL B Multiplier */ -#define AT91C_CKGR_USB_96M ((unsigned int) 0x1 << 28) /* (CKGR) Divider for USB Ports */ -#define AT91C_CKGR_USB_PLL ((unsigned int) 0x1 << 29) /* (CKGR) PLL Use */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Parallel Input Output Controler */ -/*****************************************************************************/ -typedef struct _AT91S_PIO -{ - AT91_REG PIO_PER; /* PIO Enable Register */ - AT91_REG PIO_PDR; /* PIO Disable Register */ - AT91_REG PIO_PSR; /* PIO Status Register */ - AT91_REG Reserved0[1]; /* */ - AT91_REG PIO_OER; /* Output Enable Register */ - AT91_REG PIO_ODR; /* Output Disable Registerr */ - AT91_REG PIO_OSR; /* Output Status Register */ - AT91_REG Reserved1[1]; /* */ - AT91_REG PIO_IFER; /* Input Filter Enable Register */ - AT91_REG PIO_IFDR; /* Input Filter Disable Register */ - AT91_REG PIO_IFSR; /* Input Filter Status Register */ - AT91_REG Reserved2[1]; /* */ - AT91_REG PIO_SODR; /* Set Output Data Register */ - AT91_REG PIO_CODR; /* Clear Output Data Register */ - AT91_REG PIO_ODSR; /* Output Data Status Register */ - AT91_REG PIO_PDSR; /* Pin Data Status Register */ - AT91_REG PIO_IER; /* Interrupt Enable Register */ - AT91_REG PIO_IDR; /* Interrupt Disable Register */ - AT91_REG PIO_IMR; /* Interrupt Mask Register */ - AT91_REG PIO_ISR; /* Interrupt Status Register */ - AT91_REG PIO_MDER; /* Multi-driver Enable Register */ - AT91_REG PIO_MDDR; /* Multi-driver Disable Register */ - AT91_REG PIO_MDSR; /* Multi-driver Status Register */ - AT91_REG Reserved3[1]; /* */ - AT91_REG PIO_PPUDR; /* Pull-up Disable Register */ - AT91_REG PIO_PPUER; /* Pull-up Enable Register */ - AT91_REG PIO_PPUSR; /* Pad Pull-up Status Register */ - AT91_REG Reserved4[1]; /* */ - AT91_REG PIO_ASR; /* Select A Register */ - AT91_REG PIO_BSR; /* Select B Register */ - AT91_REG PIO_ABSR; /* AB Select Status Register */ - AT91_REG Reserved5[9]; /* */ - AT91_REG PIO_OWER; /* Output Write Enable Register */ - AT91_REG PIO_OWDR; /* Output Write Disable Register */ - AT91_REG PIO_OWSR; /* Output Write Status Register */ -} AT91S_PIO, *AT91PS_PIO; - - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Debug Unit */ -/*****************************************************************************/ -typedef struct _AT91S_DBGU -{ - AT91_REG DBGU_CR; /* Control Register */ - AT91_REG DBGU_MR; /* Mode Register */ - AT91_REG DBGU_IER; /* Interrupt Enable Register */ - AT91_REG DBGU_IDR; /* Interrupt Disable Register */ - AT91_REG DBGU_IMR; /* Interrupt Mask Register */ - AT91_REG DBGU_CSR; /* Channel Status Register */ - AT91_REG DBGU_RHR; /* Receiver Holding Register */ - AT91_REG DBGU_THR; /* Transmitter Holding Register */ - AT91_REG DBGU_BRGR; /* Baud Rate Generator Register */ - AT91_REG Reserved0[7]; /* */ - AT91_REG DBGU_C1R; /* Chip ID1 Register */ - AT91_REG DBGU_C2R; /* Chip ID2 Register */ - AT91_REG DBGU_FNTR; /* Force NTRST Register */ - AT91_REG Reserved1[45]; /* */ - AT91_REG DBGU_RPR; /* Receive Pointer Register */ - AT91_REG DBGU_RCR; /* Receive Counter Register */ - AT91_REG DBGU_TPR; /* Transmit Pointer Register */ - AT91_REG DBGU_TCR; /* Transmit Counter Register */ - AT91_REG DBGU_RNPR; /* Receive Next Pointer Register */ - AT91_REG DBGU_RNCR; /* Receive Next Counter Register */ - AT91_REG DBGU_TNPR; /* Transmit Next Pointer Register */ - AT91_REG DBGU_TNCR; /* Transmit Next Counter Register */ - AT91_REG DBGU_PTCR; /* PDC Transfer Control Register */ - AT91_REG DBGU_PTSR; /* PDC Transfer Status Register */ -} AT91S_DBGU, *AT91PS_DBGU; - -/* -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- */ -#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) /* (DBGU) RXRDY Interrupt */ -#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) /* (DBGU) TXRDY Interrupt */ -#define AT91C_US_ENDRX ((unsigned int) 0x1 << 3) /* (DBGU) End of Receive Transfer Interrupt */ -#define AT91C_US_ENDTX ((unsigned int) 0x1 << 4) /* (DBGU) End of Transmit Interrupt */ -#define AT91C_US_OVRE ((unsigned int) 0x1 << 5) /* (DBGU) Overrun Interrupt */ -#define AT91C_US_FRAME ((unsigned int) 0x1 << 6) /* (DBGU) Framing Error Interrupt */ -#define AT91C_US_PARE ((unsigned int) 0x1 << 7) /* (DBGU) Parity Error Interrupt */ -#define AT91C_US_TXEMPTY ((unsigned int) 0x1 << 9) /* (DBGU) TXEMPTY Interrupt */ -#define AT91C_US_TXBUFE ((unsigned int) 0x1 << 11) /* (DBGU) TXBUFE Interrupt */ -#define AT91C_US_RXBUFF ((unsigned int) 0x1 << 12) /* (DBGU) RXBUFF Interrupt */ -#define AT91C_US_COMM_TX ((unsigned int) 0x1 << 30) /* (DBGU) COMM_TX Interrupt */ -#define AT91C_US_COMM_RX ((unsigned int) 0x1 << 31) /* (DBGU) COMM_RX Interrupt */ - -/* -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- */ -#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) /* (DBGU) Reset Receiver */ -#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) /* (DBGU) Reset Transmitter */ -#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) /* (DBGU) Receiver Enable */ -#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) /* (DBGU) Receiver Disable */ -#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) /* (DBGU) Transmitter Enable */ -#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) /* (DBGU) Transmitter Disable */ - -#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) /* (USART) Clock */ -#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) /* (USART) Character Length: 8 bits */ -#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) /* (DBGU) No Parity */ -#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) /* (USART) 1 stop bit */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface */ -/*****************************************************************************/ -typedef struct _AT91S_SMC2 -{ - AT91_REG SMC2_CSR[8]; /* SMC2 Chip Select Register */ -} AT91S_SMC2, *AT91PS_SMC2; - -/* -------- SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register -------- */ -#define AT91C_SMC2_NWS ((unsigned int) 0x7F << 0) /* (SMC2) Number of Wait States */ -#define AT91C_SMC2_WSEN ((unsigned int) 0x1 << 7) /* (SMC2) Wait State Enable */ -#define AT91C_SMC2_TDF ((unsigned int) 0xF << 8) /* (SMC2) Data Float Time */ -#define AT91C_SMC2_BAT ((unsigned int) 0x1 << 12) /* (SMC2) Byte Access Type */ -#define AT91C_SMC2_DBW ((unsigned int) 0x1 << 13) /* (SMC2) Data Bus Width */ -#define AT91C_SMC2_DBW_16 ((unsigned int) 0x1 << 13) /* (SMC2) 16-bit. */ -#define AT91C_SMC2_DBW_8 ((unsigned int) 0x2 << 13) /* (SMC2) 8-bit. */ -#define AT91C_SMC2_DRP ((unsigned int) 0x1 << 15) /* (SMC2) Data Read Protocol */ -#define AT91C_SMC2_ACSS ((unsigned int) 0x3 << 16) /* (SMC2) Address to Chip Select Setup */ -#define AT91C_SMC2_ACSS_STANDARD ((unsigned int) 0x0 << 16) /* (SMC2) Standard, asserted at the beginning of the access and deasserted at the end. */ -#define AT91C_SMC2_ACSS_1_CYCLE ((unsigned int) 0x1 << 16) /* (SMC2) One cycle less at the beginning and the end of the access. */ -#define AT91C_SMC2_ACSS_2_CYCLES ((unsigned int) 0x2 << 16) /* (SMC2) Two cycles less at the beginning and the end of the access. */ -#define AT91C_SMC2_ACSS_3_CYCLES ((unsigned int) 0x3 << 16) /* (SMC2) Three cycles less at the beginning and the end of the access. */ -#define AT91C_SMC2_RWSETUP ((unsigned int) 0x7 << 24) /* (SMC2) Read and Write Signal Setup Time */ -#define AT91C_SMC2_RWHOLD ((unsigned int) 0x7 << 29) /* (SMC2) Read and Write Signal Hold Time */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Power Management Controler */ -/*****************************************************************************/ -typedef struct _AT91S_PMC -{ - AT91_REG PMC_SCER; /* System Clock Enable Register */ - AT91_REG PMC_SCDR; /* System Clock Disable Register */ - AT91_REG PMC_SCSR; /* System Clock Status Register */ - AT91_REG Reserved0[1]; /* */ - AT91_REG PMC_PCER; /* Peripheral Clock Enable Register */ - AT91_REG PMC_PCDR; /* Peripheral Clock Disable Register */ - AT91_REG PMC_PCSR; /* Peripheral Clock Status Register */ - AT91_REG Reserved1[5]; /* */ - AT91_REG PMC_MCKR; /* Master Clock Register */ - AT91_REG Reserved2[3]; /* */ - AT91_REG PMC_PCKR[8]; /* Programmable Clock Register */ - AT91_REG PMC_IER; /* Interrupt Enable Register */ - AT91_REG PMC_IDR; /* Interrupt Disable Register */ - AT91_REG PMC_SR; /* Status Register */ - AT91_REG PMC_IMR; /* Interrupt Mask Register */ -} AT91S_PMC, *AT91PS_PMC; - -/*------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------*/ -#define AT91C_PMC_PCK ((unsigned int) 0x1 << 0) /* (PMC) Processor Clock */ -#define AT91C_PMC_UDP ((unsigned int) 0x1 << 1) /* (PMC) USB Device Port Clock */ -#define AT91C_PMC_MCKUDP ((unsigned int) 0x1 << 2) /* (PMC) USB Device Port Master Clock Automatic Disable on Suspend */ -#define AT91C_PMC_UHP ((unsigned int) 0x1 << 4) /* (PMC) USB Host Port Clock */ -#define AT91C_PMC_PCK0 ((unsigned int) 0x1 << 8) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK1 ((unsigned int) 0x1 << 9) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK2 ((unsigned int) 0x1 << 10) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK3 ((unsigned int) 0x1 << 11) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK4 ((unsigned int) 0x1 << 12) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK5 ((unsigned int) 0x1 << 13) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK6 ((unsigned int) 0x1 << 14) /* (PMC) Programmable Clock Output */ -#define AT91C_PMC_PCK7 ((unsigned int) 0x1 << 15) /* (PMC) Programmable Clock Output */ -/*-------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register ------*/ -/*-------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------*/ -/*-------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------*/ -#define AT91C_PMC_CSS ((unsigned int) 0x3 << 0) /* (PMC) Programmable Clock Selection */ -#define AT91C_PMC_CSS_SLOW_CLK ((unsigned int) 0x0) /* (PMC) Slow Clock is selected */ -#define AT91C_PMC_CSS_MAIN_CLK ((unsigned int) 0x1) /* (PMC) Main Clock is selected */ -#define AT91C_PMC_CSS_PLLA_CLK ((unsigned int) 0x2) /* (PMC) Clock from PLL A is selected */ -#define AT91C_PMC_CSS_PLLB_CLK ((unsigned int) 0x3) /* (PMC) Clock from PLL B is selected */ -#define AT91C_PMC_PRES ((unsigned int) 0x7 << 2) /* (PMC) Programmable Clock Prescaler */ -#define AT91C_PMC_PRES_CLK ((unsigned int) 0x0 << 2) /* (PMC) Selected clock */ -#define AT91C_PMC_PRES_CLK_2 ((unsigned int) 0x1 << 2) /* (PMC) Selected clock divided by 2 */ -#define AT91C_PMC_PRES_CLK_4 ((unsigned int) 0x2 << 2) /* (PMC) Selected clock divided by 4 */ -#define AT91C_PMC_PRES_CLK_8 ((unsigned int) 0x3 << 2) /* (PMC) Selected clock divided by 8 */ -#define AT91C_PMC_PRES_CLK_16 ((unsigned int) 0x4 << 2) /* (PMC) Selected clock divided by 16 */ -#define AT91C_PMC_PRES_CLK_32 ((unsigned int) 0x5 << 2) /* (PMC) Selected clock divided by 32 */ -#define AT91C_PMC_PRES_CLK_64 ((unsigned int) 0x6 << 2) /* (PMC) Selected clock divided by 64 */ -#define AT91C_PMC_MDIV ((unsigned int) 0x3 << 8) /* (PMC) Master Clock Division */ -#define AT91C_PMC_MDIV_1 ((unsigned int) 0x0 << 8) /* (PMC) The master clock and the processor clock are the same */ -#define AT91C_PMC_MDIV_2 ((unsigned int) 0x1 << 8) /* (PMC) The processor clock is twice as fast as the master clock */ -#define AT91C_PMC_MDIV_3 ((unsigned int) 0x2 << 8) /* (PMC) The processor clock is three times faster than the master clock */ -#define AT91C_PMC_MDIV_4 ((unsigned int) 0x3 << 8) /* (PMC) The processor clock is four times faster than the master clock */ -/*------ PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------*/ -/*------ PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------*/ -#define AT91C_PMC_MOSCS ((unsigned int) 0x1 << 0) /* (PMC) MOSC Status/Enable/Disable/Mask */ -#define AT91C_PMC_LOCKA ((unsigned int) 0x1 << 1) /* (PMC) PLL A Status/Enable/Disable/Mask */ -#define AT91C_PMC_LOCKB ((unsigned int) 0x1 << 2) /* (PMC) PLL B Status/Enable/Disable/Mask */ -#define AT91C_PMC_MCKRDY ((unsigned int) 0x1 << 3) /* (PMC) MCK_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK0RDY ((unsigned int) 0x1 << 8) /* (PMC) PCK0_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK1RDY ((unsigned int) 0x1 << 9) /* (PMC) PCK1_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK2RDY ((unsigned int) 0x1 << 10) /* (PMC) PCK2_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK3RDY ((unsigned int) 0x1 << 11) /* (PMC) PCK3_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK4RDY ((unsigned int) 0x1 << 12) /* (PMC) PCK4_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK5RDY ((unsigned int) 0x1 << 13) /* (PMC) PCK5_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK6RDY ((unsigned int) 0x1 << 14) /* (PMC) PCK6_RDY Status/Enable/Disable/Mask */ -#define AT91C_PMC_PCK7RDY ((unsigned int) 0x1 << 15) /* (PMC) PCK7_RDY Status/Enable/Disable/Mask */ -/*---- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------*/ -/*-------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------*/ -/*-------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------*/ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Ethernet MAC */ -/*****************************************************************************/ -typedef struct _AT91S_EMAC -{ - AT91_REG EMAC_CTL; /* Network Control Register */ - AT91_REG EMAC_CFG; /* Network Configuration Register */ - AT91_REG EMAC_SR; /* Network Status Register */ - AT91_REG EMAC_TAR; /* Transmit Address Register */ - AT91_REG EMAC_TCR; /* Transmit Control Register */ - AT91_REG EMAC_TSR; /* Transmit Status Register */ - AT91_REG EMAC_RBQP; /* Receive Buffer Queue Pointer */ - AT91_REG Reserved0[1]; /* */ - AT91_REG EMAC_RSR; /* Receive Status Register */ - AT91_REG EMAC_ISR; /* Interrupt Status Register */ - AT91_REG EMAC_IER; /* Interrupt Enable Register */ - AT91_REG EMAC_IDR; /* Interrupt Disable Register */ - AT91_REG EMAC_IMR; /* Interrupt Mask Register */ - AT91_REG EMAC_MAN; /* PHY Maintenance Register */ - AT91_REG Reserved1[2]; /* */ - AT91_REG EMAC_FRA; /* Frames Transmitted OK Register */ - AT91_REG EMAC_SCOL; /* Single Collision Frame Register */ - AT91_REG EMAC_MCOL; /* Multiple Collision Frame Register */ - AT91_REG EMAC_OK; /* Frames Received OK Register */ - AT91_REG EMAC_SEQE; /* Frame Check Sequence Error Register */ - AT91_REG EMAC_ALE; /* Alignment Error Register */ - AT91_REG EMAC_DTE; /* Deferred Transmission Frame Register */ - AT91_REG EMAC_LCOL; /* Late Collision Register */ - AT91_REG EMAC_ECOL; /* Excessive Collision Register */ - AT91_REG EMAC_CSE; /* Carrier Sense Error Register */ - AT91_REG EMAC_TUE; /* Transmit Underrun Error Register */ - AT91_REG EMAC_CDE; /* Code Error Register */ - AT91_REG EMAC_ELR; /* Excessive Length Error Register */ - AT91_REG EMAC_RJB; /* Receive Jabber Register */ - AT91_REG EMAC_USF; /* Undersize Frame Register */ - AT91_REG EMAC_SQEE; /* SQE Test Error Register */ - AT91_REG EMAC_DRFC; /* Discarded RX Frame Register */ - AT91_REG Reserved2[3]; /* */ - AT91_REG EMAC_HSH; /* Hash Address High[63:32] */ - AT91_REG EMAC_HSL; /* Hash Address Low[31:0] */ - AT91_REG EMAC_SA1L; /* Specific Address 1 Low, First 4 bytes */ - AT91_REG EMAC_SA1H; /* Specific Address 1 High, Last 2 bytes */ - AT91_REG EMAC_SA2L; /* Specific Address 2 Low, First 4 bytes */ - AT91_REG EMAC_SA2H; /* Specific Address 2 High, Last 2 bytes */ - AT91_REG EMAC_SA3L; /* Specific Address 3 Low, First 4 bytes */ - AT91_REG EMAC_SA3H; /* Specific Address 3 High, Last 2 bytes */ - AT91_REG EMAC_SA4L; /* Specific Address 4 Low, First 4 bytes */ - AT91_REG EMAC_SA4H; /* Specific Address 4 High, Last 2 bytesr */ -} AT91S_EMAC, *AT91PS_EMAC; - -/* -------- EMAC_CTL : (EMAC Offset: 0x0) -------- */ -#define AT91C_EMAC_LB ((unsigned int) 0x1 << 0) /* (EMAC) Loopback. Optional. When set, loopback signal is at high level. */ -#define AT91C_EMAC_LBL ((unsigned int) 0x1 << 1) /* (EMAC) Loopback local. */ -#define AT91C_EMAC_RE ((unsigned int) 0x1 << 2) /* (EMAC) Receive enable. */ -#define AT91C_EMAC_TE ((unsigned int) 0x1 << 3) /* (EMAC) Transmit enable. */ -#define AT91C_EMAC_MPE ((unsigned int) 0x1 << 4) /* (EMAC) Management port enable. */ -#define AT91C_EMAC_CSR ((unsigned int) 0x1 << 5) /* (EMAC) Clear statistics registers. */ -#define AT91C_EMAC_ISR ((unsigned int) 0x1 << 6) /* (EMAC) Increment statistics registers. */ -#define AT91C_EMAC_WES ((unsigned int) 0x1 << 7) /* (EMAC) Write enable for statistics registers. */ -#define AT91C_EMAC_BP ((unsigned int) 0x1 << 8) /* (EMAC) Back pressure. */ - -/* -------- EMAC_CFG : (EMAC Offset: 0x4) Network Configuration Register -------- */ -#define AT91C_EMAC_SPD ((unsigned int) 0x1 << 0) /* (EMAC) Speed. */ -#define AT91C_EMAC_FD ((unsigned int) 0x1 << 1) /* (EMAC) Full duplex. */ -#define AT91C_EMAC_BR ((unsigned int) 0x1 << 2) /* (EMAC) Bit rate. */ -#define AT91C_EMAC_CAF ((unsigned int) 0x1 << 4) /* (EMAC) Copy all frames. */ -#define AT91C_EMAC_NBC ((unsigned int) 0x1 << 5) /* (EMAC) No broadcast. */ -#define AT91C_EMAC_MTI ((unsigned int) 0x1 << 6) /* (EMAC) Multicast hash enable */ -#define AT91C_EMAC_UNI ((unsigned int) 0x1 << 7) /* (EMAC) Unicast hash enable. */ -#define AT91C_EMAC_BIG ((unsigned int) 0x1 << 8) /* (EMAC) Receive 1522 bytes. */ -#define AT91C_EMAC_EAE ((unsigned int) 0x1 << 9) /* (EMAC) External address match enable. */ -#define AT91C_EMAC_CLK ((unsigned int) 0x3 << 10) /* (EMAC) */ -#define AT91C_EMAC_CLK_HCLK_8 ((unsigned int) 0x0 << 10) /* (EMAC) HCLK divided by 8 */ -#define AT91C_EMAC_CLK_HCLK_16 ((unsigned int) 0x1 << 10) /* (EMAC) HCLK divided by 16 */ -#define AT91C_EMAC_CLK_HCLK_32 ((unsigned int) 0x2 << 10) /* (EMAC) HCLK divided by 32 */ -#define AT91C_EMAC_CLK_HCLK_64 ((unsigned int) 0x3 << 10) /* (EMAC) HCLK divided by 64 */ -#define AT91C_EMAC_RTY ((unsigned int) 0x1 << 12) /* (EMAC) */ -#define AT91C_EMAC_RMII ((unsigned int) 0x1 << 13) /* (EMAC) */ - -/* -------- EMAC_SR : (EMAC Offset: 0x8) Network Status Register -------- */ -#define AT91C_EMAC_MDIO ((unsigned int) 0x1 << 1) /* (EMAC) */ -#define AT91C_EMAC_IDLE ((unsigned int) 0x1 << 2) /* (EMAC) */ - -/* -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register ------- */ -#define AT91C_EMAC_LEN ((unsigned int) 0x7FF << 0) /* (EMAC) */ -#define AT91C_EMAC_NCRC ((unsigned int) 0x1 << 15) /* (EMAC) */ - -/* -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register ------- */ -#define AT91C_EMAC_OVR ((unsigned int) 0x1 << 0) /* (EMAC) */ -#define AT91C_EMAC_COL ((unsigned int) 0x1 << 1) /* (EMAC) */ -#define AT91C_EMAC_RLE ((unsigned int) 0x1 << 2) /* (EMAC) */ -#define AT91C_EMAC_TXIDLE ((unsigned int) 0x1 << 3) /* (EMAC) */ -#define AT91C_EMAC_BNQ ((unsigned int) 0x1 << 4) /* (EMAC) */ -#define AT91C_EMAC_COMP ((unsigned int) 0x1 << 5) /* (EMAC) */ -#define AT91C_EMAC_UND ((unsigned int) 0x1 << 6) /* (EMAC) */ - -/* -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- */ -#define AT91C_EMAC_BNA ((unsigned int) 0x1 << 0) /* (EMAC) */ -#define AT91C_EMAC_REC ((unsigned int) 0x1 << 1) /* (EMAC) */ -#define AT91C_EMAC_RSR_OVR ((unsigned int) 0x1 << 2) /* (EMAC) */ - -/* -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register ------- */ -#define AT91C_EMAC_DONE ((unsigned int) 0x1 << 0) /* (EMAC) */ -#define AT91C_EMAC_RCOM ((unsigned int) 0x1 << 1) /* (EMAC) */ -#define AT91C_EMAC_RBNA ((unsigned int) 0x1 << 2) /* (EMAC) */ -#define AT91C_EMAC_TOVR ((unsigned int) 0x1 << 3) /* (EMAC) */ -#define AT91C_EMAC_TUND ((unsigned int) 0x1 << 4) /* (EMAC) */ -#define AT91C_EMAC_RTRY ((unsigned int) 0x1 << 5) /* (EMAC) */ -#define AT91C_EMAC_TBRE ((unsigned int) 0x1 << 6) /* (EMAC) */ -#define AT91C_EMAC_TCOM ((unsigned int) 0x1 << 7) /* (EMAC) */ -#define AT91C_EMAC_TIDLE ((unsigned int) 0x1 << 8) /* (EMAC) */ -#define AT91C_EMAC_LINK ((unsigned int) 0x1 << 9) /* (EMAC) */ -#define AT91C_EMAC_ROVR ((unsigned int) 0x1 << 10) /* (EMAC) */ -#define AT91C_EMAC_HRESP ((unsigned int) 0x1 << 11) /* (EMAC) */ - -/* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register ------- */ -/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register ------ */ -/* -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- */ -/* -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- */ -#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) /* (EMAC) */ -#define AT91C_EMAC_CODE ((unsigned int) 0x3 << 16) /* (EMAC) */ -#define AT91C_EMAC_CODE_802_3 ((unsigned int) 0x2 << 16) /* (EMAC) Write Operation */ -#define AT91C_EMAC_REGA ((unsigned int) 0x1F << 18) /* (EMAC) */ -#define AT91C_EMAC_PHYA ((unsigned int) 0x1F << 23) /* (EMAC) */ -#define AT91C_EMAC_RW ((unsigned int) 0x3 << 28) /* (EMAC) */ -#define AT91C_EMAC_RW_R ((unsigned int) 0x2 << 28) /* (EMAC) Read Operation */ -#define AT91C_EMAC_RW_W ((unsigned int) 0x1 << 28) /* (EMAC) Write Operation */ -#define AT91C_EMAC_HIGH ((unsigned int) 0x1 << 30) /* (EMAC) */ -#define AT91C_EMAC_LOW ((unsigned int) 0x1 << 31) /* (EMAC) */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Serial Parallel Interface */ -/*****************************************************************************/ -typedef struct _AT91S_SPI -{ - AT91_REG SPI_CR; /* Control Register */ - AT91_REG SPI_MR; /* Mode Register */ - AT91_REG SPI_RDR; /* Receive Data Register */ - AT91_REG SPI_TDR; /* Transmit Data Register */ - AT91_REG SPI_SR; /* Status Register */ - AT91_REG SPI_IER; /* Interrupt Enable Register */ - AT91_REG SPI_IDR; /* Interrupt Disable Register */ - AT91_REG SPI_IMR; /* Interrupt Mask Register */ - AT91_REG Reserved0[4]; /* */ - AT91_REG SPI_CSR[4]; /* Chip Select Register */ - AT91_REG Reserved1[48]; /* */ - AT91_REG SPI_RPR; /* Receive Pointer Register */ - AT91_REG SPI_RCR; /* Receive Counter Register */ - AT91_REG SPI_TPR; /* Transmit Pointer Register */ - AT91_REG SPI_TCR; /* Transmit Counter Register */ - AT91_REG SPI_RNPR; /* Receive Next Pointer Register */ - AT91_REG SPI_RNCR; /* Receive Next Counter Register */ - AT91_REG SPI_TNPR; /* Transmit Next Pointer Register */ - AT91_REG SPI_TNCR; /* Transmit Next Counter Register */ - AT91_REG SPI_PTCR; /* PDC Transfer Control Register */ - AT91_REG SPI_PTSR; /* PDC Transfer Status Register */ -} AT91S_SPI, *AT91PS_SPI; - -/* -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- */ -#define AT91C_SPI_SPIEN ((unsigned int) 0x1 << 0) /* (SPI) SPI Enable */ -#define AT91C_SPI_SPIDIS ((unsigned int) 0x1 << 1) /* (SPI) SPI Disable */ -#define AT91C_SPI_SWRST ((unsigned int) 0x1 << 7) /* (SPI) SPI Software reset */ - -/* -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- */ -#define AT91C_SPI_MSTR ((unsigned int) 0x1 << 0) /* (SPI) Master/Slave Mode */ -#define AT91C_SPI_PS ((unsigned int) 0x1 << 1) /* (SPI) Peripheral Select */ -#define AT91C_SPI_PS_FIXED ((unsigned int) 0x0 << 1) /* (SPI) Fixed Peripheral Select */ -#define AT91C_SPI_PS_VARIABLE ((unsigned int) 0x1 << 1) /* (SPI) Variable Peripheral Select */ -#define AT91C_SPI_PCSDEC ((unsigned int) 0x1 << 2) /* (SPI) Chip Select Decode */ -#define AT91C_SPI_DIV32 ((unsigned int) 0x1 << 3) /* (SPI) Clock Selection */ -#define AT91C_SPI_MODFDIS ((unsigned int) 0x1 << 4) /* (SPI) Mode Fault Detection */ -#define AT91C_SPI_LLB ((unsigned int) 0x1 << 7) /* (SPI) Clock Selection */ -#define AT91C_SPI_PCS ((unsigned int) 0xF << 16) /* (SPI) Peripheral Chip Select */ -#define AT91C_SPI_DLYBCS ((unsigned int) 0xFF << 24) /* (SPI) Delay Between Chip Selects */ - -/* -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- */ -#define AT91C_SPI_RD ((unsigned int) 0xFFFF << 0) /* (SPI) Receive Data */ -#define AT91C_SPI_RPCS ((unsigned int) 0xF << 16) /* (SPI) Peripheral Chip Select Status */ - -/* -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- */ -#define AT91C_SPI_TD ((unsigned int) 0xFFFF << 0) /* (SPI) Transmit Data */ -#define AT91C_SPI_TPCS ((unsigned int) 0xF << 16) /* (SPI) Peripheral Chip Select Status */ - -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define AT91C_SPI_RDRF ((unsigned int) 0x1 << 0) /* (SPI) Receive Data Register Full */ -#define AT91C_SPI_TDRE ((unsigned int) 0x1 << 1) /* (SPI) Transmit Data Register Empty */ -#define AT91C_SPI_MODF ((unsigned int) 0x1 << 2) /* (SPI) Mode Fault Error */ -#define AT91C_SPI_OVRES ((unsigned int) 0x1 << 3) /* (SPI) Overrun Error Status */ -#define AT91C_SPI_SPENDRX ((unsigned int) 0x1 << 4) /* (SPI) End of Receiver Transfer */ -#define AT91C_SPI_SPENDTX ((unsigned int) 0x1 << 5) /* (SPI) End of Receiver Transfer */ -#define AT91C_SPI_RXBUFF ((unsigned int) 0x1 << 6) /* (SPI) RXBUFF Interrupt */ -#define AT91C_SPI_TXBUFE ((unsigned int) 0x1 << 7) /* (SPI) TXBUFE Interrupt */ -#define AT91C_SPI_SPIENS ((unsigned int) 0x1 << 16) /* (SPI) Enable Status */ - -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register ------- */ -/* -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- */ -/* -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- */ -#define AT91C_SPI_CPOL ((unsigned int) 0x1 << 0) /* (SPI) Clock Polarity */ -#define AT91C_SPI_NCPHA ((unsigned int) 0x1 << 1) /* (SPI) Clock Phase */ -#define AT91C_SPI_BITS ((unsigned int) 0xF << 4) /* (SPI) Bits Per Transfer */ -#define AT91C_SPI_BITS_8 ((unsigned int) 0x0 << 4) /* (SPI) 8 Bits Per transfer */ -#define AT91C_SPI_BITS_9 ((unsigned int) 0x1 << 4) /* (SPI) 9 Bits Per transfer */ -#define AT91C_SPI_BITS_10 ((unsigned int) 0x2 << 4) /* (SPI) 10 Bits Per transfer */ -#define AT91C_SPI_BITS_11 ((unsigned int) 0x3 << 4) /* (SPI) 11 Bits Per transfer */ -#define AT91C_SPI_BITS_12 ((unsigned int) 0x4 << 4) /* (SPI) 12 Bits Per transfer */ -#define AT91C_SPI_BITS_13 ((unsigned int) 0x5 << 4) /* (SPI) 13 Bits Per transfer */ -#define AT91C_SPI_BITS_14 ((unsigned int) 0x6 << 4) /* (SPI) 14 Bits Per transfer */ -#define AT91C_SPI_BITS_15 ((unsigned int) 0x7 << 4) /* (SPI) 15 Bits Per transfer */ -#define AT91C_SPI_BITS_16 ((unsigned int) 0x8 << 4) /* (SPI) 16 Bits Per transfer */ -#define AT91C_SPI_SCBR ((unsigned int) 0xFF << 8) /* (SPI) Serial Clock Baud Rate */ -#define AT91C_SPI_DLYBS ((unsigned int) 0xFF << 16) /* (SPI) Serial Clock Baud Rate */ -#define AT91C_SPI_DLYBCT ((unsigned int) 0xFF << 24) /* (SPI) Delay Between Consecutive Transfers */ - -/*****************************************************************************/ -/* SOFTWARE API DEFINITION FOR Peripheral Data Controller */ -/*****************************************************************************/ -typedef struct _AT91S_PDC -{ - AT91_REG PDC_RPR; /* Receive Pointer Register */ - AT91_REG PDC_RCR; /* Receive Counter Register */ - AT91_REG PDC_TPR; /* Transmit Pointer Register */ - AT91_REG PDC_TCR; /* Transmit Counter Register */ - AT91_REG PDC_RNPR; /* Receive Next Pointer Register */ - AT91_REG PDC_RNCR; /* Receive Next Counter Register */ - AT91_REG PDC_TNPR; /* Transmit Next Pointer Register */ - AT91_REG PDC_TNCR; /* Transmit Next Counter Register */ - AT91_REG PDC_PTCR; /* PDC Transfer Control Register */ - AT91_REG PDC_PTSR; /* PDC Transfer Status Register */ -} AT91S_PDC, *AT91PS_PDC; - -/* -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- */ -#define AT91C_PDC_RXTEN ((unsigned int) 0x1 << 0) /* (PDC) Receiver Transfer Enable */ -#define AT91C_PDC_RXTDIS ((unsigned int) 0x1 << 1) /* (PDC) Receiver Transfer Disable */ -#define AT91C_PDC_TXTEN ((unsigned int) 0x1 << 8) /* (PDC) Transmitter Transfer Enable */ -#define AT91C_PDC_TXTDIS ((unsigned int) 0x1 << 9) /* (PDC) Transmitter Transfer Disable */ -/* -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- */ - -/* ========== Register definition ==================================== */ -#define AT91C_SPI_CSR ((AT91_REG *) 0xFFFE0030) /* (SPI) Chip Select Register */ -#define AT91C_PMC_PCER ((AT91_REG *) 0xFFFFFC10) /* (PMC) Peripheral Clock Enable Register */ -#define AT91C_PMC_PCDR ((AT91_REG *) 0xFFFFFC14) /* (PMC) Peripheral Clock Enable Register */ -#define AT91C_PMC_SCER ((AT91_REG *) 0xFFFFFC00) /* (PMC) Peripheral Clock Enable Register */ -#define AT91C_PMC_SCDR ((AT91_REG *) 0xFFFFFC04) /* (PMC) Peripheral Clock Enable Register */ -#define AT91C_PIOA_PER ((AT91_REG *) 0xFFFFF400) /* (PIOA) PIO Enable Register */ -#define AT91C_PIOA_PDR ((AT91_REG *) 0xFFFFF404) /* (PIOA) PIO Disable Register */ -#define AT91C_PIOA_PSR ((AT91_REG *) 0xFFFFF408) /* (PIOA) PIO Status Register */ -#define AT91C_PIOA_OER ((AT91_REG *) 0xFFFFF410) /* (PIOA) PIO Output Enable Register */ -#define AT91C_PIOA_ODR ((AT91_REG *) 0xFFFFF414) /* (PIOA) PIO Output Disable Register */ -#define AT91C_PIOA_OSR ((AT91_REG *) 0xFFFFF418) /* (PIOA) PIO Output Status Register */ -#define AT91C_PIOA_IFER ((AT91_REG *) 0xFFFFF420) /* (PIOA) PIO Glitch Input Filter Enable Register */ -#define AT91C_PIOA_IFDR ((AT91_REG *) 0xFFFFF424) /* (PIOA) PIO Glitch Input Filter Disable Register */ -#define AT91C_PIOA_IFSR ((AT91_REG *) 0xFFFFF428) /* (PIOA) PIO Glitch Input Filter Status Register */ -#define AT91C_PIOA_SODR ((AT91_REG *) 0xFFFFF430) /* (PIOA) PIO Set Output Data Register */ -#define AT91C_PIOA_CODR ((AT91_REG *) 0xFFFFF434) /* (PIOA) PIO Clear Output Data Register */ -#define AT91C_PIOA_ODSR ((AT91_REG *) 0xFFFFF438) /* (PIOA) PIO Output Data Status Register */ -#define AT91C_PIOA_PDSR ((AT91_REG *) 0xFFFFF43C) /* (PIOA) PIO Pin Data Status Register */ -#define AT91C_PIOA_IER ((AT91_REG *) 0xFFFFF440) /* (PIOA) PIO Interrupt Enable Register */ -#define AT91C_PIOA_IDR ((AT91_REG *) 0xFFFFF444) /* (PIOA) PIO Interrupt Disable Register */ -#define AT91C_PIOA_IMR ((AT91_REG *) 0xFFFFF448) /* (PIOA) PIO Interrupt Mask Register */ -#define AT91C_PIOA_ISR ((AT91_REG *) 0xFFFFF44C) /* (PIOA) PIO Interrupt Status Register */ -#define AT91C_PIOA_MDER ((AT91_REG *) 0xFFFFF450) /* (PIOA) PIO Multi-drive Enable Register */ -#define AT91C_PIOA_MDDR ((AT91_REG *) 0xFFFFF454) /* (PIOA) PIO Multi-drive Disable Register */ -#define AT91C_PIOA_MDSR ((AT91_REG *) 0xFFFFF458) /* (PIOA) PIO Multi-drive Status Register */ -#define AT91C_PIOA_PUDR ((AT91_REG *) 0xFFFFF460) /* (PIOA) PIO Pull-up Disable Register */ -#define AT91C_PIOA_PUER ((AT91_REG *) 0xFFFFF464) /* (PIOA) PIO Pull-up Enable Register */ -#define AT91C_PIOA_PUSR ((AT91_REG *) 0xFFFFF468) /* (PIOA) PIO Pull-up Status Register */ -#define AT91C_PIOA_ASR ((AT91_REG *) 0xFFFFF470) /* (PIOA) PIO Peripheral A Select Register */ -#define AT91C_PIOA_BSR ((AT91_REG *) 0xFFFFF474) /* (PIOA) PIO Peripheral B Select Register */ -#define AT91C_PIOA_ABSR ((AT91_REG *) 0xFFFFF478) /* (PIOA) PIO Peripheral AB Select Register */ -#define AT91C_PIOA_OWER ((AT91_REG *) 0xFFFFF4A0) /* (PIOA) PIO Output Write Enable Register */ -#define AT91C_PIOA_OWDR ((AT91_REG *) 0xFFFFF4A4) /* (PIOA) PIO Output Write Disable Register */ -#define AT91C_PIOA_OWSR ((AT91_REG *) 0xFFFFF4A8) /* (PIOA) PIO Output Write Status Register */ -#define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) /* (PIOB) PIO Disable Register */ - -#define AT91C_PIO_PA30 ((unsigned int) 1 << 30) /* Pin Controlled by PA30 */ -#define AT91C_PIO_PC0 ((unsigned int) 1 << 0) /* Pin Controlled by PC0 */ -#define AT91C_PC0_BFCK ((unsigned int) AT91C_PIO_PC0) /* Burst Flash Clock */ -#define AT91C_PA30_DRXD ((unsigned int) AT91C_PIO_PA30) /* DBGU Debug Receive Data */ -#define AT91C_PIO_PA31 ((unsigned int) 1 << 31) /* Pin Controlled by PA31 */ -#define AT91C_PA25_TWD ((unsigned int) 1 << 25) -#define AT91C_PA26_TWCK ((unsigned int) 1 << 26) -#define AT91C_PA31_DTXD ((unsigned int) AT91C_PIO_PA31) /* DBGU Debug Transmit Data */ -#define AT91C_PIO_PA17 ((unsigned int) 1 << 17) /* Pin Controlled by PA17 */ -#define AT91C_PA17_TXD0 AT91C_PIO_PA17 /* USART0 Transmit Data */ -#define AT91C_PIO_PA18 ((unsigned int) 1 << 18) /* Pin Controlled by PA18 */ -#define AT91C_PA18_RXD0 AT91C_PIO_PA18 /* USART0 Receive Data */ -#define AT91C_PIO_PB20 ((unsigned int) 1 << 20) /* Pin Controlled by PB20 */ -#define AT91C_PB20_RXD1 AT91C_PIO_PB20 /* USART1 Receive Data */ -#define AT91C_PIO_PB21 ((unsigned int) 1 << 21) /* Pin Controlled by PB21 */ -#define AT91C_PB21_TXD1 AT91C_PIO_PB21 /* USART1 Transmit Data */ - -#define AT91C_ID_SYS ((unsigned int) 1) /* System Peripheral */ -#define AT91C_ID_PIOA ((unsigned int) 2) /* PIO port A */ -#define AT91C_ID_PIOB ((unsigned int) 3) /* PIO port B */ -#define AT91C_ID_PIOC ((unsigned int) 4) /* PIO port C */ -#define AT91C_ID_USART0 ((unsigned int) 6) /* USART 0 */ -#define AT91C_ID_USART1 ((unsigned int) 7) /* USART 1 */ -#define AT91C_ID_TWI ((unsigned int) 12) /* Two Wire Interface */ -#define AT91C_ID_SPI ((unsigned int) 13) /* Serial Peripheral Interface */ -#define AT91C_ID_TC0 ((unsigned int) 17) /* Timer Counter 0 */ -#define AT91C_ID_UHP ((unsigned int) 23) /* OHCI USB Host Port */ -#define AT91C_ID_EMAC ((unsigned int) 24) /* Ethernet MAC */ - -#define AT91C_PIO_PC1 ((unsigned int) 1 << 1) /* Pin Controlled by PC1 */ -#define AT91C_PC1_BFRDY_SMOE ((unsigned int) AT91C_PIO_PC1) /* Burst Flash Ready */ -#define AT91C_PIO_PC3 ((unsigned int) 1 << 3) /* Pin Controlled by PC3 */ -#define AT91C_PC3_BFBAA_SMWE ((unsigned int) AT91C_PIO_PC3) /* Burst Flash Address Advance / SmartMedia Write Enable */ -#define AT91C_PIO_PC2 ((unsigned int) 1 << 2) /* Pin Controlled by PC2 */ -#define AT91C_PC2_BFAVD ((unsigned int) AT91C_PIO_PC2) /* Burst Flash Address Valid */ -#define AT91C_PIO_PB1 ((unsigned int) 1 << 1) /* Pin Controlled by PB1 */ - -#define AT91C_PIO_PA23 ((unsigned int) 1 << 23) /* Pin Controlled by PA23 */ -#define AT91C_PA23_TXD2 ((unsigned int) AT91C_PIO_PA23) /* USART 2 Transmit Data */ - -#define AT91C_PIO_PA0 ((unsigned int) 1 << 0) /* Pin Controlled by PA0 */ -#define AT91C_PA0_MISO ((unsigned int) AT91C_PIO_PA0) /* SPI Master In Slave */ -#define AT91C_PIO_PA1 ((unsigned int) 1 << 1) /* Pin Controlled by PA1 */ -#define AT91C_PA1_MOSI ((unsigned int) AT91C_PIO_PA1) /* SPI Master Out Slave */ -#define AT91C_PIO_PA2 ((unsigned int) 1 << 2) /* Pin Controlled by PA2 */ -#define AT91C_PA2_SPCK ((unsigned int) AT91C_PIO_PA2) /* SPI Serial Clock */ -#define AT91C_PIO_PA3 ((unsigned int) 1 << 3) /* Pin Controlled by PA3 */ -#define AT91C_PA3_NPCS0 ((unsigned int) AT91C_PIO_PA3) /* SPI Peripheral Chip Select 0 */ -#define AT91C_PIO_PA4 ((unsigned int) 1 << 4) /* Pin Controlled by PA4 */ -#define AT91C_PA4_NPCS1 ((unsigned int) AT91C_PIO_PA4) /* SPI Peripheral Chip Select 1 */ -#define AT91C_PIO_PA5 ((unsigned int) 1 << 5) /* Pin Controlled by PA5 */ -#define AT91C_PA5_NPCS2 ((unsigned int) AT91C_PIO_PA5) /* SPI Peripheral Chip Select 2 */ -#define AT91C_PIO_PA6 ((unsigned int) 1 << 6) /* Pin Controlled by PA6 */ -#define AT91C_PA6_NPCS3 ((unsigned int) AT91C_PIO_PA6) /* SPI Peripheral Chip Select 3 */ - -#define AT91C_PIO_PA16 ((unsigned int) 1 << 16) /* Pin Controlled by PA16 */ -#define AT91C_PA16_EMDIO ((unsigned int) AT91C_PIO_PA16) /* Ethernet MAC Management Data Input/Output */ -#define AT91C_PIO_PA15 ((unsigned int) 1 << 15) /* Pin Controlled by PA15 */ -#define AT91C_PA15_EMDC ((unsigned int) AT91C_PIO_PA15) /* Ethernet MAC Management Data Clock */ -#define AT91C_PIO_PA14 ((unsigned int) 1 << 14) /* Pin Controlled by PA14 */ -#define AT91C_PA14_ERXER ((unsigned int) AT91C_PIO_PA14) /* Ethernet MAC Receive Error */ -#define AT91C_PIO_PA13 ((unsigned int) 1 << 13) /* Pin Controlled by PA13 */ -#define AT91C_PA13_ERX1 ((unsigned int) AT91C_PIO_PA13) /* Ethernet MAC Receive Data 1 */ -#define AT91C_PIO_PA12 ((unsigned int) 1 << 12) /* Pin Controlled by PA12 */ -#define AT91C_PA12_ERX0 ((unsigned int) AT91C_PIO_PA12) /* Ethernet MAC Receive Data 0 */ -#define AT91C_PIO_PA11 ((unsigned int) 1 << 11) /* Pin Controlled by PA11 */ -#define AT91C_PA11_ECRS_ECRSDV ((unsigned int) AT91C_PIO_PA11) /* Ethernet MAC Carrier Sense/Carrier Sense and Data Valid */ -#define AT91C_PIO_PA10 ((unsigned int) 1 << 10) /* Pin Controlled by PA10 */ -#define AT91C_PA10_ETX1 ((unsigned int) AT91C_PIO_PA10) /* Ethernet MAC Transmit Data 1 */ -#define AT91C_PIO_PA9 ((unsigned int) 1 << 9) /* Pin Controlled by PA9 */ -#define AT91C_PA9_ETX0 ((unsigned int) AT91C_PIO_PA9) /* Ethernet MAC Transmit Data 0 */ -#define AT91C_PIO_PA8 ((unsigned int) 1 << 8) /* Pin Controlled by PA8 */ -#define AT91C_PA8_ETXEN ((unsigned int) AT91C_PIO_PA8) /* Ethernet MAC Transmit Enable */ -#define AT91C_PIO_PA7 ((unsigned int) 1 << 7) /* Pin Controlled by PA7 */ -#define AT91C_PA7_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PA7) /* Ethernet MAC Transmit Clock/Reference Clock */ - -#define AT91C_PIO_PB0 ((unsigned int) 1 << 0) /* Pin Controlled by PB3 */ -#define AT91C_PIO_PB1 ((unsigned int) 1 << 1) /* Pin Controlled by PB3 */ -#define AT91C_PIO_PB2 ((unsigned int) 1 << 2) /* Pin Controlled by PB3 */ -#define AT91C_PIO_PB3 ((unsigned int) 1 << 3) /* Pin Controlled by PB3 */ -#define AT91C_PIO_PB4 ((unsigned int) 1 << 4) /* Pin Controlled by PB4 */ -#define AT91C_PIO_PB5 ((unsigned int) 1 << 5) /* Pin Controlled by PB5 */ -#define AT91C_PIO_PB6 ((unsigned int) 1 << 6) /* Pin Controlled by PB6 */ -#define AT91C_PIO_PB7 ((unsigned int) 1 << 7) /* Pin Controlled by PB7 */ -#define AT91C_PIO_PB22 ((unsigned int) 1 << 22) /* Pin Controlled by PB22 */ -#define AT91C_PIO_PB25 ((unsigned int) 1 << 25) /* Pin Controlled by PB25 */ -#define AT91C_PB25_DSR1 ((unsigned int) AT91C_PIO_PB25) /* USART 1 Data Set ready */ -#define AT91C_PB25_EF100 ((unsigned int) AT91C_PIO_PB25) /* Ethernet MAC Force 100 Mbits */ -#define AT91C_PIO_PB19 ((unsigned int) 1 << 19) /* Pin Controlled by PB19 */ -#define AT91C_PB19_DTR1 ((unsigned int) AT91C_PIO_PB19) /* USART 1 Data Terminal ready */ -#define AT91C_PB19_ERXCK ((unsigned int) AT91C_PIO_PB19) /* Ethernet MAC Receive Clock */ -#define AT91C_PIO_PB18 ((unsigned int) 1 << 18) /* Pin Controlled by PB18 */ -#define AT91C_PB18_RI1 ((unsigned int) AT91C_PIO_PB18) /* USART 1 Ring Indicator */ -#define AT91C_PB18_ECOL ((unsigned int) AT91C_PIO_PB18) /* Ethernet MAC Collision Detected */ -#define AT91C_PIO_PB17 ((unsigned int) 1 << 17) /* Pin Controlled by PB17 */ -#define AT91C_PB17_RF2 ((unsigned int) AT91C_PIO_PB17) /* SSC Receive Frame Sync 2 */ -#define AT91C_PB17_ERXDV ((unsigned int) AT91C_PIO_PB17) /* Ethernet MAC Receive Data Valid */ -#define AT91C_PIO_PB16 ((unsigned int) 1 << 16) /* Pin Controlled by PB16 */ -#define AT91C_PB16_RK2 ((unsigned int) AT91C_PIO_PB16) /* SSC Receive Clock 2 */ -#define AT91C_PB16_ERX3 ((unsigned int) AT91C_PIO_PB16) /* Ethernet MAC Receive Data 3 */ -#define AT91C_PIO_PB15 ((unsigned int) 1 << 15) /* Pin Controlled by PB15 */ -#define AT91C_PB15_RD2 ((unsigned int) AT91C_PIO_PB15) /* SSC Receive Data 2 */ -#define AT91C_PB15_ERX2 ((unsigned int) AT91C_PIO_PB15) /* Ethernet MAC Receive Data 2 */ -#define AT91C_PIO_PB14 ((unsigned int) 1 << 14) /* Pin Controlled by PB14 */ -#define AT91C_PB14_TD2 ((unsigned int) AT91C_PIO_PB14) /* SSC Transmit Data 2 */ -#define AT91C_PB14_ETXER ((unsigned int) AT91C_PIO_PB14) /* Ethernet MAC Transmikt Coding Error */ -#define AT91C_PIO_PB13 ((unsigned int) 1 << 13) /* Pin Controlled by PB13 */ -#define AT91C_PB13_TK2 ((unsigned int) AT91C_PIO_PB13) /* SSC Transmit Clock 2 */ -#define AT91C_PB13_ETX3 ((unsigned int) AT91C_PIO_PB13) /* Ethernet MAC Transmit Data 3 */ -#define AT91C_PIO_PB12 ((unsigned int) 1 << 12) /* Pin Controlled by PB12 */ -#define AT91C_PB12_TF2 ((unsigned int) AT91C_PIO_PB12) /* SSC Transmit Frame Sync 2 */ -#define AT91C_PB12_ETX2 ((unsigned int) AT91C_PIO_PB12) /* Ethernet MAC Transmit Data 2 */ - -#define AT91C_PIOB_BSR ((AT91_REG *) 0xFFFFF674) /* (PIOB) Select B Register */ -#define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) /* (PIOB) PIO Disable Register */ - -#define AT91C_EBI_CS3A_SMC_SmartMedia ((unsigned int) 0x1 << 3) /* (EBI) Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated. */ -#define AT91C_SMC2_ACSS_STANDARD ((unsigned int) 0x0 << 16) /* (SMC2) Standard, asserted at the beginning of the access and deasserted at the end. */ -#define AT91C_SMC2_DBW_8 ((unsigned int) 0x2 << 13) /* (SMC2) 8-bit. */ -#define AT91C_SMC2_WSEN ((unsigned int) 0x1 << 7) /* (SMC2) Wait State Enable */ -#define AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) /* (PIOC) Select A Register */ -#define AT91C_PIOC_SODR ((AT91_REG *) 0xFFFFF830) /* (PIOC) Set Output Data Register */ -#define AT91C_PIOC_CODR ((AT91_REG *) 0xFFFFF834) /* (PIOC) Clear Output Data Register */ -#define AT91C_PIOC_PDSR ((AT91_REG *) 0xFFFFF83C) /* (PIOC) Pin Data Status Register */ - -#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) /* (AIC) Base Address */ -#define AT91C_BASE_DBGU ((AT91PS_DBGU) 0xFFFFF200) /* (DBGU) Base Address */ -#define AT91C_BASE_PIOA ((AT91PS_PIO) 0xFFFFF400) /* (PIOA) Base Address */ -#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) /* (PIOB) Base Address */ -#define AT91C_BASE_PIOC ((AT91PS_PIO) 0xFFFFF800) /* (PIOC) Base Address */ -#define AT91C_BASE_PIOD ((AT91PS_PIO) 0xFFFFFA00) /* (PIOC) Base Address */ -#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) /* (PMC) Base Address */ -#if 0 -#define AT91C_BASE_ST ((AT91PS_ST) 0xFFFFFD00) /* (PMC) Base Address */ -#define AT91C_BASE_RTC ((AT91PS_RTC) 0xFFFFFE00) /* (PMC) Base Address */ -#define AT91C_BASE_MC ((AT91PS_MC) 0xFFFFFF00) /* (PMC) Base Address */ -#endif - -#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) /* (TC0) Base Address */ -#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFA4000) /* (TC0) Base Address */ -#if 0 -#define AT91C_BASE_UDP ((AT91PS_UDP) 0xFFFB0000) /* (TC0) Base Address */ -#define AT91C_BASE_MCI ((AT91PS_MCI) 0xFFFB4000) /* (TC0) Base Address */ -#define AT91C_BASE_TWI ((AT91PS_TWI) 0xFFFB8000) /* (TC0) Base Address */ -#endif -#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFBC000) /* (EMAC) Base Address */ -#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFC0000) /* (US0) Base Address */ -#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFC4000) /* (US1) Base Address */ -#define AT91C_BASE_US2 ((AT91PS_USART) 0xFFFC8000) /* (US1) Base Address */ -#define AT91C_BASE_US3 ((AT91PS_USART) 0xFFFCC000) /* (US1) Base Address */ -#define AT91C_BASE_SPI ((AT91PS_SPI) 0xFFFE0000) /* (SPI) Base Address */ - -#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) /* (CKGR) Base Address */ -#define AT91C_EBI_CSA ((AT91_REG *) 0xFFFFFF60) /* (EBI) Chip Select Assignment Register */ -#define AT91C_BASE_SMC2 ((AT91PS_SMC2) 0xFFFFFF70) /* (SMC2) Base Address */ -#define AT91C_TCB0_BMR ((AT91_REG *) 0xFFFA00C4) /* (TCB0) TC Block Mode Register */ -#define AT91C_TCB0_BCR ((AT91_REG *) 0xFFFA00C0) /* (TCB0) TC Block Control Register */ -#define AT91C_PIOC_PDR ((AT91_REG *) 0xFFFFF804) /* (PIOC) PIO Disable Register */ -#define AT91C_PIOC_PER ((AT91_REG *) 0xFFFFF800) /* (PIOC) PIO Enable Register */ -#define AT91C_PIOC_ODR ((AT91_REG *) 0xFFFFF814) /* (PIOC) Output Disable Registerr */ -#define AT91C_PIOB_PER ((AT91_REG *) 0xFFFFF600) /* (PIOB) PIO Enable Register */ -#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */ -#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */ - -#else -/* flash */ -#define AT91C_MC_PUIA 0xFFFFFF10 -#define AT91C_MC_PUP 0xFFFFFF50 -#define AT91C_MC_PUER 0xFFFFFF54 -#define AT91C_MC_ASR 0xFFFFFF04 -#define AT91C_MC_AASR 0xFFFFFF08 -#define AT91C_EBI_CFGR 0xFFFFFF64 -#define AT91C_SMC_CSR0 0xFFFFFF70 - -/* clocks */ -#define AT91C_PLLAR 0xFFFFFC28 -#define AT91C_PLLBR 0xFFFFFC2C -#define AT91C_MCKR 0xFFFFFC30 - -#define AT91C_BASE_CKGR 0xFFFFFC20 -#define AT91C_CKGR_MOR 0 - -/* sdram */ -#define AT91C_PIOC_ASR 0xFFFFF870 -#define AT91C_PIOC_BSR 0xFFFFF874 -#define AT91C_PIOC_PDR 0xFFFFF804 -#define AT91C_EBI_CSA 0xFFFFFF60 -#define AT91C_SDRC_CR 0xFFFFFF98 -#define AT91C_SDRC_MR 0xFFFFFF90 -#define AT91C_SDRC_TR 0xFFFFFF94 - -#endif /* __ASSEMBLY__ */ -#endif /* AT91RM9200_H */ diff --git a/arch/arm/include/asm/arch-at91rm9200/hardware.h b/arch/arm/include/asm/arch-at91rm9200/hardware.h deleted file mode 100644 index b868e38..0000000 --- a/arch/arm/include/asm/arch-at91rm9200/hardware.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/include/asm-arm/arch-at91/hardware.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/sizes.h> - -#ifndef __ASSEMBLY__ -#include "AT91RM9200.h" -#endif - -/* Virtual and Physical base address for system peripherals */ -#define AT91_SYS_BASE 0xFFFFF000 /*4K */ - -/* Virtual and Physical base addresses of user peripherals */ -#define AT91_SPI_BASE 0xFFFE0000 /*16K */ -#define AT91_SSC2_BASE 0xFFFD8000 /*16K */ -#define AT91_SSC1_BASE 0xFFFD4000 /*16K */ -#define AT91_SSC0_BASE 0xFFFD0000 /*16K */ -#define AT91_USART3_BASE 0xFFFCC000 /*16K */ -#define AT91_USART2_BASE 0xFFFC8000 /*16K */ -#define AT91_USART1_BASE 0xFFFC4000 /*16K */ -#define AT91_USART0_BASE 0xFFFC0000 /*16K */ -#define AT91_EMAC_BASE 0xFFFBC000 /*16K */ -#define AT91_TWI_BASE 0xFFFB8000 /*16K */ -#define AT91_MCI_BASE 0xFFFB4000 /*16K */ -#define AT91_UDP_BASE 0xFFFB0000 /*16K */ -#define AT91_TCB1_BASE 0xFFFA4000 /*16K */ -#define AT91_TCB0_BASE 0xFFFA0000 /*16K */ - -#define AT91_USB_HOST_BASE 0x00300000 - -/* - * Where in virtual memory the IO devices (timers, system controllers - * and so on) - */ -#define AT91_IO_BASE 0xF0000000 /* Virt/Phys Address of IO */ - -/* FLASH */ -#define AT91_FLASH_BASE 0x10000000 /* NCS0 */ - -/* SDRAM */ -#define AT91_SDRAM_BASE 0x20000000 /* NCS1 */ - -/* SmartMedia */ -#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3 */ - -/* Definition of interrupt priority levels */ -#define AT91C_AIC_PRIOR_0 AT91C_AIC_PRIOR_LOWEST -#define AT91C_AIC_PRIOR_1 ((unsigned int) 0x1) -#define AT91C_AIC_PRIOR_2 ((unsigned int) 0x2) -#define AT91C_AIC_PRIOR_3 ((unsigned int) 0x3) -#define AT91C_AIC_PRIOR_4 ((unsigned int) 0x4) -#define AT91C_AIC_PRIOR_5 ((unsigned int) 0x5) -#define AT91C_AIC_PRIOR_6 ((unsigned int) 0x6) -#define AT91C_AIC_PRIOR_7 AT91C_AIC_PRIOR_HIGEST - -#endif diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h b/arch/arm/include/asm/arch-davinci/davinci_misc.h deleted file mode 100644 index 347aa89..0000000 --- a/arch/arm/include/asm/arch-davinci/davinci_misc.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (C) 2008 Lyrtech <www.lyrtech.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MISC_H -#define __MISC_H - -/* pin muxer definitions */ -#define PIN_MUX_NUM_FIELDS 8 /* Per register */ -#define PIN_MUX_FIELD_SIZE 4 /* n in bits */ -#define PIN_MUX_FIELD_MASK ((1 << PIN_MUX_FIELD_SIZE) - 1) - -/* pin definition */ -struct pinmux_config { - dv_reg *mux; /* Address of mux register */ - unsigned char value; /* Value to set in field */ - unsigned char field; /* field number */ -}; - -/* pin table definition */ -struct pinmux_resource { - const struct pinmux_config *pins; - const int n_pins; -}; - -#define PINMUX_ITEM(item) { \ - .pins = item, \ - .n_pins = ARRAY_SIZE(item) \ - } - -#define HAWKBOARD_KICK0_UNLOCK 0x83e70b13 -#define HAWKBOARD_KICK1_UNLOCK 0x95a4f1e0 - -struct lpsc_resource { - const int lpsc_no; -}; - -int dvevm_read_mac_address(uint8_t *buf); -void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr); -int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins); -int davinci_configure_pin_mux_items(const struct pinmux_resource *item, - int n_items); -#if defined(CONFIG_DRIVER_TI_EMAC) && defined(CONFIG_MACH_DAVINCI_DA850_EVM) -void davinci_emac_mii_mode_sel(int mode_sel); -#endif -#if defined(CONFIG_SOC_DA8XX) -void irq_init(void); -int da8xx_configure_lpsc_items(const struct lpsc_resource *item, - const int n_items); -#endif - -#endif /* __MISC_H */ diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h deleted file mode 100644 index 4a4ee04..0000000 --- a/arch/arm/include/asm/arch-davinci/emac_defs.h +++ /dev/null @@ -1,395 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Based on: - * - * ---------------------------------------------------------------------------- - * - * dm644x_emac.h - * - * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM - * - * Copyright (C) 2005 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - - * Modifications: - * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot. - * - */ - -#ifndef _DM644X_EMAC_H_ -#define _DM644X_EMAC_H_ - -#include <asm/arch/hardware.h> - -#ifdef CONFIG_SOC_DM365 -#define EMAC_BASE_ADDR (0x01d07000) -#define EMAC_WRAPPER_BASE_ADDR (0x01d0a000) -#define EMAC_WRAPPER_RAM_ADDR (0x01d08000) -#define EMAC_MDIO_BASE_ADDR (0x01d0b000) -#define DAVINCI_EMAC_VERSION2 -#elif defined(CONFIG_SOC_DA8XX) -#define EMAC_BASE_ADDR DAVINCI_EMAC_CNTRL_REGS_BASE -#define EMAC_WRAPPER_BASE_ADDR DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE -#define EMAC_WRAPPER_RAM_ADDR DAVINCI_EMAC_WRAPPER_RAM_BASE -#define EMAC_MDIO_BASE_ADDR DAVINCI_MDIO_CNTRL_REGS_BASE -#define DAVINCI_EMAC_VERSION2 -#else -#define EMAC_BASE_ADDR (0x01c80000) -#define EMAC_WRAPPER_BASE_ADDR (0x01c81000) -#define EMAC_WRAPPER_RAM_ADDR (0x01c82000) -#define EMAC_MDIO_BASE_ADDR (0x01c84000) -#endif - -#ifdef CONFIG_SOC_DM646X -#define DAVINCI_EMAC_VERSION2 -#define DAVINCI_EMAC_GIG_ENABLE -#endif - -#ifdef CONFIG_SOC_DM646X -/* MDIO module input frequency */ -#define EMAC_MDIO_BUS_FREQ 76500000 -/* MDIO clock output frequency */ -#define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */ -#elif defined(CONFIG_SOC_DM365) -/* MDIO module input frequency */ -#define EMAC_MDIO_BUS_FREQ 121500000 -/* MDIO clock output frequency */ -#define EMAC_MDIO_CLOCK_FREQ 2200000 /* 2.2 MHz */ -#elif defined(CONFIG_SOC_DA8XX) -/* MDIO module input frequency */ -#define EMAC_MDIO_BUS_FREQ clk_get(DAVINCI_MDIO_CLKID) -/* MDIO clock output frequency */ -#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ -#else -/* MDIO module input frequency */ -#define EMAC_MDIO_BUS_FREQ 99000000 /* PLL/6 - 99 MHz */ -/* MDIO clock output frequency */ -#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ -#endif - -/* PHY mask - set only those phy number bits where phy is/can be connected */ -#define EMAC_MDIO_PHY_NUM CONFIG_EMAC_MDIO_PHY_NUM -#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM) - -/* Ethernet Min/Max packet size */ -#define EMAC_MIN_ETHERNET_PKT_SIZE 60 -#define EMAC_MAX_ETHERNET_PKT_SIZE 1518 -#define EMAC_PKT_ALIGN 18 /* 1518 + 18 = 1536 (packet aligned on 32 byte boundry) */ - -/* Number of RX packet buffers - * NOTE: Only 1 buffer supported as of now - */ -#define EMAC_MAX_RX_BUFFERS 10 - - -/*********************************************** - ******** Internally used macros *************** - ***********************************************/ - -#define EMAC_CH_TX 1 -#define EMAC_CH_RX 0 - -/* Each descriptor occupies 4 words, lets start RX desc's at 0 and - * reserve space for 64 descriptors max - */ -#define EMAC_RX_DESC_BASE 0x0 -#define EMAC_TX_DESC_BASE 0x1000 - -/* EMAC Teardown value */ -#define EMAC_TEARDOWN_VALUE 0xfffffffc - -/* MII Status Register */ -#define MII_STATUS_REG 1 - -/* Number of statistics registers */ -#define EMAC_NUM_STATS 36 - - -/* EMAC Descriptor */ -typedef volatile struct _emac_desc -{ - u_int32_t next; /* Pointer to next descriptor in chain */ - u_int8_t *buffer; /* Pointer to data buffer */ - u_int32_t buff_off_len; /* Buffer Offset(MSW) and Length(LSW) */ - u_int32_t pkt_flag_len; /* Packet Flags(MSW) and Length(LSW) */ -} emac_desc; - -/* CPPI bit positions */ -#define EMAC_CPPI_SOP_BIT (0x80000000) -#define EMAC_CPPI_EOP_BIT (0x40000000) -#define EMAC_CPPI_OWNERSHIP_BIT (0x20000000) -#define EMAC_CPPI_EOQ_BIT (0x10000000) -#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT (0x08000000) -#define EMAC_CPPI_PASS_CRC_BIT (0x04000000) - -#define EMAC_CPPI_RX_ERROR_FRAME (0x03fc0000) - -#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20) -#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1) -#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 << 7) -#define EMAC_MACCONTROL_GIGFORCE (1 << 17) -#define EMAC_MACCONTROL_RMIISPEED_100 (1 << 15) - -#define EMAC_MAC_ADDR_MATCH (1 << 19) -#define EMAC_MAC_ADDR_IS_VALID (1 << 20) - -#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE (0x200000) -#define EMAC_RXMBPENABLE_RXBROADEN (0x2000) - - -#define MDIO_CONTROL_IDLE (0x80000000) -#define MDIO_CONTROL_ENABLE (0x40000000) -#define MDIO_CONTROL_FAULT_ENABLE (0x40000) -#define MDIO_CONTROL_FAULT (0x80000) -#define MDIO_USERACCESS0_GO (0x80000000) -#define MDIO_USERACCESS0_WRITE_READ (0x0) -#define MDIO_USERACCESS0_WRITE_WRITE (0x40000000) -#define MDIO_USERACCESS0_ACK (0x20000000) - -/* Ethernet MAC Registers Structure */ -typedef struct { - dv_reg TXIDVER; - dv_reg TXCONTROL; - dv_reg TXTEARDOWN; - u_int8_t RSVD0[4]; - dv_reg RXIDVER; - dv_reg RXCONTROL; - dv_reg RXTEARDOWN; - u_int8_t RSVD1[100]; - dv_reg TXINTSTATRAW; - dv_reg TXINTSTATMASKED; - dv_reg TXINTMASKSET; - dv_reg TXINTMASKCLEAR; - dv_reg MACINVECTOR; - u_int8_t RSVD2[12]; - dv_reg RXINTSTATRAW; - dv_reg RXINTSTATMASKED; - dv_reg RXINTMASKSET; - dv_reg RXINTMASKCLEAR; - dv_reg MACINTSTATRAW; - dv_reg MACINTSTATMASKED; - dv_reg MACINTMASKSET; - dv_reg MACINTMASKCLEAR; - u_int8_t RSVD3[64]; - dv_reg RXMBPENABLE; - dv_reg RXUNICASTSET; - dv_reg RXUNICASTCLEAR; - dv_reg RXMAXLEN; - dv_reg RXBUFFEROFFSET; - dv_reg RXFILTERLOWTHRESH; - u_int8_t RSVD4[8]; - dv_reg RX0FLOWTHRESH; - dv_reg RX1FLOWTHRESH; - dv_reg RX2FLOWTHRESH; - dv_reg RX3FLOWTHRESH; - dv_reg RX4FLOWTHRESH; - dv_reg RX5FLOWTHRESH; - dv_reg RX6FLOWTHRESH; - dv_reg RX7FLOWTHRESH; - dv_reg RX0FREEBUFFER; - dv_reg RX1FREEBUFFER; - dv_reg RX2FREEBUFFER; - dv_reg RX3FREEBUFFER; - dv_reg RX4FREEBUFFER; - dv_reg RX5FREEBUFFER; - dv_reg RX6FREEBUFFER; - dv_reg RX7FREEBUFFER; - dv_reg MACCONTROL; - dv_reg MACSTATUS; - dv_reg EMCONTROL; - dv_reg FIFOCONTROL; - dv_reg MACCONFIG; - dv_reg SOFTRESET; - u_int8_t RSVD5[88]; - dv_reg MACSRCADDRLO; - dv_reg MACSRCADDRHI; - dv_reg MACHASH1; - dv_reg MACHASH2; - dv_reg BOFFTEST; - dv_reg TPACETEST; - dv_reg RXPAUSE; - dv_reg TXPAUSE; - u_int8_t RSVD6[16]; - dv_reg RXGOODFRAMES; - dv_reg RXBCASTFRAMES; - dv_reg RXMCASTFRAMES; - dv_reg RXPAUSEFRAMES; - dv_reg RXCRCERRORS; - dv_reg RXALIGNCODEERRORS; - dv_reg RXOVERSIZED; - dv_reg RXJABBER; - dv_reg RXUNDERSIZED; - dv_reg RXFRAGMENTS; - dv_reg RXFILTERED; - dv_reg RXQOSFILTERED; - dv_reg RXOCTETS; - dv_reg TXGOODFRAMES; - dv_reg TXBCASTFRAMES; - dv_reg TXMCASTFRAMES; - dv_reg TXPAUSEFRAMES; - dv_reg TXDEFERRED; - dv_reg TXCOLLISION; - dv_reg TXSINGLECOLL; - dv_reg TXMULTICOLL; - dv_reg TXEXCESSIVECOLL; - dv_reg TXLATECOLL; - dv_reg TXUNDERRUN; - dv_reg TXCARRIERSENSE; - dv_reg TXOCTETS; - dv_reg FRAME64; - dv_reg FRAME65T127; - dv_reg FRAME128T255; - dv_reg FRAME256T511; - dv_reg FRAME512T1023; - dv_reg FRAME1024TUP; - dv_reg NETOCTETS; - dv_reg RXSOFOVERRUNS; - dv_reg RXMOFOVERRUNS; - dv_reg RXDMAOVERRUNS; - u_int8_t RSVD7[624]; - dv_reg MACADDRLO; - dv_reg MACADDRHI; - dv_reg MACINDEX; - u_int8_t RSVD8[244]; - dv_reg TX0HDP; - dv_reg TX1HDP; - dv_reg TX2HDP; - dv_reg TX3HDP; - dv_reg TX4HDP; - dv_reg TX5HDP; - dv_reg TX6HDP; - dv_reg TX7HDP; - dv_reg RX0HDP; - dv_reg RX1HDP; - dv_reg RX2HDP; - dv_reg RX3HDP; - dv_reg RX4HDP; - dv_reg RX5HDP; - dv_reg RX6HDP; - dv_reg RX7HDP; - dv_reg TX0CP; - dv_reg TX1CP; - dv_reg TX2CP; - dv_reg TX3CP; - dv_reg TX4CP; - dv_reg TX5CP; - dv_reg TX6CP; - dv_reg TX7CP; - dv_reg RX0CP; - dv_reg RX1CP; - dv_reg RX2CP; - dv_reg RX3CP; - dv_reg RX4CP; - dv_reg RX5CP; - dv_reg RX6CP; - dv_reg RX7CP; -} emac_regs; - -/* EMAC Wrapper Registers Structure */ -typedef struct { -#ifdef DAVINCI_EMAC_VERSION2 - dv_reg idver; - dv_reg softrst; - dv_reg emctrl; - dv_reg c0rxthreshen; - dv_reg c0rxen; - dv_reg c0txen; - dv_reg c0miscen; - dv_reg c1rxthreshen; - dv_reg c1rxen; - dv_reg c1txen; - dv_reg c1miscen; - dv_reg c2rxthreshen; - dv_reg c2rxen; - dv_reg c2txen; - dv_reg c2miscen; - dv_reg c0rxthreshstat; - dv_reg c0rxstat; - dv_reg c0txstat; - dv_reg c0miscstat; - dv_reg c1rxthreshstat; - dv_reg c1rxstat; - dv_reg c1txstat; - dv_reg c1miscstat; - dv_reg c2rxthreshstat; - dv_reg c2rxstat; - dv_reg c2txstat; - dv_reg c2miscstat; - dv_reg c0rximax; - dv_reg c0tximax; - dv_reg c1rximax; - dv_reg c1tximax; - dv_reg c2rximax; - dv_reg c2tximax; -#else - u_int8_t RSVD0[4100]; - dv_reg EWCTL; - dv_reg EWINTTCNT; -#endif -} ewrap_regs; - -/* EMAC MDIO Registers Structure */ -typedef struct { - dv_reg VERSION; - dv_reg CONTROL; - dv_reg ALIVE; - dv_reg LINK; - dv_reg LINKINTRAW; - dv_reg LINKINTMASKED; - u_int8_t RSVD0[8]; - dv_reg USERINTRAW; - dv_reg USERINTMASKED; - dv_reg USERINTMASKSET; - dv_reg USERINTMASKCLEAR; - u_int8_t RSVD1[80]; - dv_reg USERACCESS0; - dv_reg USERPHYSEL0; - dv_reg USERACCESS1; - dv_reg USERPHYSEL1; -} mdio_regs; - -int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data); -int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data); - -typedef struct -{ - char name[64]; - int (*init)(int phy_addr); - int (*is_phy_connected)(int phy_addr); - int (*get_link_speed)(int phy_addr); - int (*auto_negotiate)(int phy_addr); -} phy_t; - -#define PHY_LXT972 (0x001378e2) -int lxt972_is_phy_connected(int phy_addr); -int lxt972_get_link_speed(int phy_addr); -int lxt972_init_phy(int phy_addr); -int lxt972_auto_negotiate(int phy_addr); - -#define PHY_DP83848 (0x20005c90) -int dp83848_is_phy_connected(int phy_addr); -int dp83848_get_link_speed(int phy_addr); -int dp83848_init_phy(int phy_addr); -int dp83848_auto_negotiate(int phy_addr); - -#define PHY_ET1011C (0x282f013) -int et1011c_get_link_speed(int phy_addr); - -#endif /* _DM644X_EMAC_H_ */ diff --git a/arch/arm/include/asm/arch-davinci/emif_defs.h b/arch/arm/include/asm/arch-davinci/emif_defs.h deleted file mode 100644 index b48ec17..0000000 --- a/arch/arm/include/asm/arch-davinci/emif_defs.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _EMIF_DEFS_H_ -#define _EMIF_DEFS_H_ - -#include <asm/arch/hardware.h> - -struct davinci_emif_regs { - u_int32_t ercsr; - u_int32_t awccr; - u_int32_t sdbcr; - u_int32_t sdrcr; - u_int32_t ab1cr; - u_int32_t ab2cr; - u_int32_t ab3cr; - u_int32_t ab4cr; - u_int32_t sdtimr; - u_int32_t ddrsr; - u_int32_t ddrphycr; - u_int32_t ddrphysr; - u_int32_t totar; - u_int32_t totactr; - u_int32_t ddrphyid_rev; - u_int32_t sdsretr; - u_int32_t eirr; - u_int32_t eimr; - u_int32_t eimsr; - u_int32_t eimcr; - u_int32_t ioctrlr; - u_int32_t iostatr; - u_int8_t rsvd0[8]; - u_int32_t nandfcr; - u_int32_t nandfsr; - u_int8_t rsvd1[8]; - u_int32_t nandfecc[4]; - u_int8_t rsvd2[60]; - u_int32_t nand4biteccload; - u_int32_t nand4bitecc[4]; - u_int32_t nanderradd1; - u_int32_t nanderradd2; - u_int32_t nanderrval1; - u_int32_t nanderrval2; -}; - -#define davinci_emif_regs \ - ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE) - -#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2)) -#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) -#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4) -#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2))) -#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) -#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) - -/* Chip Select setup */ -#define DAVINCI_ABCR_STROBE_SELECT (1 << 31) -#define DAVINCI_ABCR_EXT_WAIT (1 << 30) -#define DAVINCI_ABCR_WSETUP(n) (n << 26) -#define DAVINCI_ABCR_WSTROBE(n) (n << 20) -#define DAVINCI_ABCR_WHOLD(n) (n << 17) -#define DAVINCI_ABCR_RSETUP(n) (n << 13) -#define DAVINCI_ABCR_RSTROBE(n) (n << 7) -#define DAVINCI_ABCR_RHOLD(n) (n << 4) -#define DAVINCI_ABCR_TA(n) (n << 2) -#define DAVINCI_ABCR_ASIZE_16BIT 1 -#define DAVINCI_ABCR_ASIZE_8BIT 0 - -#endif diff --git a/arch/arm/include/asm/arch-davinci/gpio_defs.h b/arch/arm/include/asm/arch-davinci/gpio_defs.h deleted file mode 100644 index 1be2ac2..0000000 --- a/arch/arm/include/asm/arch-davinci/gpio_defs.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments Incorporated - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _GPIO_DEFS_H_ -#define _GPIO_DEFS_H_ - -#ifndef CONFIG_SOC_DA8XX -#define DAVINCI_GPIO_BINTEN 0x01C67008 -#define DAVINCI_GPIO_BANK01 0x01C67010 -#define DAVINCI_GPIO_BANK23 0x01C67038 -#define DAVINCI_GPIO_BANK45 0x01C67060 -#define DAVINCI_GPIO_BANK67 0x01C67088 - -#else /* CONFIG_SOC_DA8XX */ -#define DAVINCI_GPIO_BINTEN 0x01E26008 -#define DAVINCI_GPIO_BANK01 0x01E26010 -#define DAVINCI_GPIO_BANK23 0x01E26038 -#define DAVINCI_GPIO_BANK45 0x01E26060 -#define DAVINCI_GPIO_BANK67 0x01E26088 -#endif /* CONFIG_SOC_DA8XX */ - -struct davinci_gpio { - unsigned int dir; - unsigned int out_data; - unsigned int set_data; - unsigned int clr_data; - unsigned int in_data; - unsigned int set_rising; - unsigned int clr_rising; - unsigned int set_falling; - unsigned int clr_falling; - unsigned int intstat; -}; - -struct davinci_gpio_bank { - int num_gpio; - unsigned int irq_num; - unsigned int irq_mask; - unsigned long *in_use; - unsigned long base; -}; - -#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01) -#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23) -#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) -#define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67) - -#endif diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h deleted file mode 100644 index df3f549..0000000 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ /dev/null @@ -1,481 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Based on: - * - * ------------------------------------------------------------------------- - * - * linux/include/asm-arm/arch-davinci/hardware.h - * - * Copyright (C) 2006 Texas Instruments. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <config.h> -#include <asm/sizes.h> - -#define REG(addr) (*(volatile unsigned int *)(addr)) -#define REG_P(addr) ((volatile unsigned int *)(addr)) - -typedef volatile unsigned int dv_reg; -typedef volatile unsigned int * dv_reg_p; - -/* - * Base register addresses - * - * NOTE: some of these DM6446-specific addresses DO NOT WORK - * on other DaVinci chips. Double check them before you try - * using the addresses ... or PSC module identifiers, etc. - */ -#ifndef CONFIG_SOC_DA8XX - -#define DAVINCI_DMA_3PCC_BASE (0x01c00000) -#define DAVINCI_DMA_3PTC0_BASE (0x01c10000) -#define DAVINCI_DMA_3PTC1_BASE (0x01c10400) -#define DAVINCI_UART0_BASE (0x01c20000) -#define DAVINCI_UART1_BASE (0x01c20400) -#define DAVINCI_I2C_BASE (0x01c21000) -#define DAVINCI_TIMER0_BASE (0x01c21400) -#define DAVINCI_TIMER1_BASE (0x01c21800) -#define DAVINCI_WDOG_BASE (0x01c21c00) -#define DAVINCI_PWM0_BASE (0x01c22000) -#define DAVINCI_PWM1_BASE (0x01c22400) -#define DAVINCI_PWM2_BASE (0x01c22800) -#define DAVINCI_SYSTEM_MODULE_BASE (0x01c40000) -#define DAVINCI_PLL_CNTRL0_BASE (0x01c40800) -#define DAVINCI_PLL_CNTRL1_BASE (0x01c40c00) -#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01c41000) -#define DAVINCI_ARM_INTC_BASE (0x01c48000) -#define DAVINCI_USB_OTG_BASE (0x01c64000) -#define DAVINCI_CFC_ATA_BASE (0x01c66000) -#define DAVINCI_SPI_BASE (0x01c66800) -#define DAVINCI_GPIO_BASE (0x01c67000) -#define DAVINCI_VPSS_REGS_BASE (0x01c70000) -#if !defined(CONFIG_SOC_DM646X) -#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) -#endif -#define DAVINCI_DDR_BASE (0x80000000) - -#ifdef CONFIG_SOC_DM644X -#define DAVINCI_UART2_BASE 0x01c20800 -#define DAVINCI_UHPI_BASE 0x01c67800 -#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01c80000 -#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01c81000 -#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01c82000 -#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01c84000 -#define DAVINCI_IMCOP_BASE 0x01cc0000 -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e00000 -#define DAVINCI_VLYNQ_BASE 0x01e01000 -#define DAVINCI_ASP_BASE 0x01e02000 -#define DAVINCI_MMC_SD_BASE 0x01e10000 -#define DAVINCI_MS_BASE 0x01e20000 -#define DAVINCI_VLYNQ_REMOTE_BASE 0x0c000000 - -#elif defined(CONFIG_SOC_DM355) -#define DAVINCI_MMC_SD1_BASE 0x01e00000 -#define DAVINCI_ASP0_BASE 0x01e02000 -#define DAVINCI_ASP1_BASE 0x01e04000 -#define DAVINCI_UART2_BASE 0x01e06000 -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e10000 -#define DAVINCI_MMC_SD0_BASE 0x01e11000 - -#elif defined(CONFIG_SOC_DM365) -#define DAVINCI_MMC_SD1_BASE 0x01d00000 -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000 -#define DAVINCI_MMC_SD0_BASE 0x01d11000 - -#elif defined(CONFIG_SOC_DM646X) -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000 -#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x44000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x46000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 - -#endif - -#else /* CONFIG_SOC_DA8XX */ - -#define DAVINCI_UART0_BASE 0x01c42000 -#define DAVINCI_UART1_BASE 0x01d0c000 -#define DAVINCI_UART2_BASE 0x01d0d000 -#define DAVINCI_I2C0_BASE 0x01c22000 -#define DAVINCI_I2C1_BASE 0x01e28000 -#define DAVINCI_TIMER0_BASE 0x01c20000 -#define DAVINCI_TIMER1_BASE 0x01c21000 -#define DAVINCI_WDOG_BASE 0x01c21000 -#define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 -#define DAVINCI_PSC0_BASE 0x01c10000 -#define DAVINCI_PSC1_BASE 0x01e27000 -#define DAVINCI_SPI0_BASE 0x01c41000 -#define DAVINCI_USB_OTG_BASE 0x01e00000 -#define DAVINCI_SPI1_BASE (cpu_is_da830() ? \ - 0x01e12000 : 0x01f0e000) -#define DAVINCI_GPIO_BASE 0x01e26000 -#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01e23000 -#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000 -#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01e20000 -#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01e24000 -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x68000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x40000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x60000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x62000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE4_BASE 0x64000000 -#define DAVINCI_ASYNC_EMIF_DATA_CE5_BASE 0x66000000 -#define DAVINCI_DDR_EMIF_CTRL_BASE 0xb0000000 -#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000 -#define DAVINCI_INTC_BASE 0xfffee000 -#define DAVINCI_BOOTCFG_BASE 0x01c14000 -#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18) - -#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38) -#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) -#define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40) -#define GPIO_BANK2_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x44) -#endif /* CONFIG_SOC_DA8XX */ - -/* Power and Sleep Controller (PSC) Domains */ -#define DAVINCI_GPSC_ARMDOMAIN 0 -#define DAVINCI_GPSC_DSPDOMAIN 1 - -#ifndef CONFIG_SOC_DA8XX - -#define DAVINCI_LPSC_VPSSMSTR 0 -#define DAVINCI_LPSC_VPSSSLV 1 -#define DAVINCI_LPSC_TPCC 2 -#define DAVINCI_LPSC_TPTC0 3 -#define DAVINCI_LPSC_TPTC1 4 -#define DAVINCI_LPSC_EMAC 5 -#define DAVINCI_LPSC_EMAC_WRAPPER 6 -#define DAVINCI_LPSC_MDIO 7 -#define DAVINCI_LPSC_IEEE1394 8 -#define DAVINCI_LPSC_USB 9 -#define DAVINCI_LPSC_ATA 10 -#define DAVINCI_LPSC_VLYNQ 11 -#define DAVINCI_LPSC_UHPI 12 -#define DAVINCI_LPSC_DDR_EMIF 13 -#define DAVINCI_LPSC_AEMIF 14 -#define DAVINCI_LPSC_MMC_SD 15 -#define DAVINCI_LPSC_MEMSTICK 16 -#define DAVINCI_LPSC_McBSP 17 -#define DAVINCI_LPSC_I2C 18 -#define DAVINCI_LPSC_UART0 19 -#define DAVINCI_LPSC_UART1 20 -#define DAVINCI_LPSC_UART2 21 -#define DAVINCI_LPSC_SPI 22 -#define DAVINCI_LPSC_PWM0 23 -#define DAVINCI_LPSC_PWM1 24 -#define DAVINCI_LPSC_PWM2 25 -#define DAVINCI_LPSC_GPIO 26 -#define DAVINCI_LPSC_TIMER0 27 -#define DAVINCI_LPSC_TIMER1 28 -#define DAVINCI_LPSC_TIMER2 29 -#define DAVINCI_LPSC_SYSTEM_SUBSYS 30 -#define DAVINCI_LPSC_ARM 31 -#define DAVINCI_LPSC_SCR2 32 -#define DAVINCI_LPSC_SCR3 33 -#define DAVINCI_LPSC_SCR4 34 -#define DAVINCI_LPSC_CROSSBAR 35 -#define DAVINCI_LPSC_CFG27 36 -#define DAVINCI_LPSC_CFG3 37 -#define DAVINCI_LPSC_CFG5 38 -#define DAVINCI_LPSC_GEM 39 -#define DAVINCI_LPSC_IMCOP 40 - -#define DAVINCI_DM646X_LPSC_EMAC 14 -#define DAVINCI_DM646X_LPSC_UART0 26 -#define DAVINCI_DM646X_LPSC_I2C 31 -#define DAVINCI_DM646X_LPSC_TIMER0 34 - -#else /* CONFIG_SOC_DA8XX */ - -enum davinci_lpsc_ids { - DAVINCI_LPSC_TPCC = 0, - DAVINCI_LPSC_TPTC0, - DAVINCI_LPSC_TPTC1, - DAVINCI_LPSC_AEMIF, - DAVINCI_LPSC_SPI0, - DAVINCI_LPSC_MMC_SD, - DAVINCI_LPSC_AINTC, - DAVINCI_LPSC_ARM_RAM_ROM, - DAVINCI_LPSC_SECCTL_KEYMGR, - DAVINCI_LPSC_UART0, - DAVINCI_LPSC_SCR0, - DAVINCI_LPSC_SCR1, - DAVINCI_LPSC_SCR2, - DAVINCI_LPSC_DMAX, - DAVINCI_LPSC_ARM, - DAVINCI_LPSC_GEM, - /* for LPSCs in PSC1, offset from 32 for differentiation */ - DAVINCI_LPSC_PSC1_BASE = 32, - DAVINCI_LPSC_USB11, - DAVINCI_LPSC_USB20, - DAVINCI_LPSC_GPIO, - DAVINCI_LPSC_UHPI, - DAVINCI_LPSC_EMAC, - DAVINCI_LPSC_DDR_EMIF, - DAVINCI_LPSC_McASP0, - DAVINCI_LPSC_McASP1, - DAVINCI_LPSC_McASP2, - DAVINCI_LPSC_SPI1, - DAVINCI_LPSC_I2C1, - DAVINCI_LPSC_UART1, - DAVINCI_LPSC_UART2, - DAVINCI_LPSC_LCDC, - DAVINCI_LPSC_ePWM, - DAVINCI_LPSC_eCAP, - DAVINCI_LPSC_eQEP, - DAVINCI_LPSC_SCR_P0, - DAVINCI_LPSC_SCR_P1, - DAVINCI_LPSC_CR_P3, - DAVINCI_LPSC_L3_CBA_RAM -}; - -#endif /* CONFIG_SOC_DA8XX */ - -void lpsc_on(unsigned int id); -void dsp_on(void); - -void davinci_enable_uart0(void); -void davinci_enable_emac(void); -void davinci_enable_i2c(void); -void davinci_errata_workarounds(void); - -#ifndef CONFIG_SOC_DA8XX - -/* Some PSC defines */ -#define PSC_CHP_SHRTSW (0x01c40038) -#define PSC_GBLCTL (0x01c41010) -#define PSC_EPCPR (0x01c41070) -#define PSC_EPCCR (0x01c41078) -#define PSC_PTCMD (0x01c41120) -#define PSC_PTSTAT (0x01c41128) -#define PSC_PDSTAT (0x01c41200) -#define PSC_PDSTAT1 (0x01c41204) -#define PSC_PDCTL (0x01c41300) -#define PSC_PDCTL1 (0x01c41304) - -#define PSC_MDCTL_BASE (0x01c41a00) -#define PSC_MDSTAT_BASE (0x01c41800) - -#define VDD3P3V_PWDN (0x01c40048) -#define UART0_PWREMU_MGMT (0x01c20030) - -#define PSC_SILVER_BULLET (0x01c41a20) - -#else /* CONFIG_SOC_DA8XX */ - -#define PSC_PSC0_MODULE_ID_CNT 16 -#define PSC_PSC1_MODULE_ID_CNT 32 - -struct davinci_psc_regs { - dv_reg revid; - dv_reg rsvd0[71]; - dv_reg ptcmd; - dv_reg rsvd1; - dv_reg ptstat; - dv_reg rsvd2[437]; - union { - struct { - dv_reg mdstat[PSC_PSC0_MODULE_ID_CNT]; - dv_reg rsvd3[112]; - dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT]; - } psc0; - struct { - dv_reg mdstat[PSC_PSC1_MODULE_ID_CNT]; - dv_reg rsvd3[96]; - dv_reg mdctl[PSC_PSC1_MODULE_ID_CNT]; - } psc1; - }; -}; - -#define davinci_psc0_regs ((struct davinci_psc_regs *)DAVINCI_PSC0_BASE) -#define davinci_psc1_regs ((struct davinci_psc_regs *)DAVINCI_PSC1_BASE) - -#endif /* CONFIG_SOC_DA8XX */ - -#ifndef CONFIG_SOC_DA8XX - -/* Miscellania... */ -#define VBPR (0x20000020) - -/* NOTE: system control modules are *highly* chip-specific, both - * as to register content (e.g. for muxing) and which registers exist. - */ -#define PINMUX0 0x01c40000 -#define PINMUX1 0x01c40004 -#define PINMUX2 0x01c40008 -#define PINMUX3 0x01c4000c -#define PINMUX4 0x01c40010 - -#else /* CONFIG_SOC_DA8XX */ - -struct davinci_pllc_regs { - dv_reg revid; - dv_reg rsvd1[56]; - dv_reg rstype; - dv_reg rsvd2[6]; - dv_reg pllctl; - dv_reg ocsel; - dv_reg rsvd3[2]; - dv_reg pllm; - dv_reg prediv; - dv_reg plldiv1; - dv_reg plldiv2; - dv_reg plldiv3; - dv_reg oscdiv; - dv_reg postdiv; - dv_reg rsvd4[3]; - dv_reg pllcmd; - dv_reg pllstat; - dv_reg alnctl; - dv_reg dchange; - dv_reg cken; - dv_reg ckstat; - dv_reg systat; - dv_reg rsvd5[3]; - dv_reg plldiv4; - dv_reg plldiv5; - dv_reg plldiv6; - dv_reg plldiv7; - dv_reg rsvd6[32]; - dv_reg emucnt0; - dv_reg emucnt1; -}; - -#define davinci_pllc_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE) -#define DAVINCI_PLLC_DIV_MASK 0x1f - -#define ASYNC3 get_async3_src() -#define PLL1_SYSCLK2 ((1 << 16) | 0x2) -#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3) -/* Clock IDs */ -enum davinci_clk_ids { - DAVINCI_SPI0_CLKID = 2, - DAVINCI_UART2_CLKID = 2, - DAVINCI_MDIO_CLKID = 4, - DAVINCI_ARM_CLKID = 6, - DAVINCI_PLLM_CLKID = 0xff, - DAVINCI_PLLC_CLKID = 0x100, - DAVINCI_AUXCLK_CLKID = 0x101 -}; - -int clk_get(enum davinci_clk_ids id); - -/* Boot config */ -struct davinci_syscfg_regs { - dv_reg revid; - dv_reg rsvd[13]; - dv_reg kick0; - dv_reg kick1; - dv_reg rsvd1[56]; - dv_reg pinmux[20]; - dv_reg suspsrc; - dv_reg chipsig; - dv_reg chipsig_clr; - dv_reg cfgchip0; - dv_reg cfgchip1; - dv_reg cfgchip2; - dv_reg cfgchip3; - dv_reg cfgchip4; -}; - -#define davinci_syscfg_regs \ - ((struct davinci_syscfg_regs *)DAVINCI_BOOTCFG_BASE) - -/* Emulation suspend bits */ -#define DAVINCI_SYSCFG_SUSPSRC_EMAC (1 << 5) -#define DAVINCI_SYSCFG_SUSPSRC_I2C (1 << 16) -#define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21) -#define DAVINCI_SYSCFG_SUSPSRC_SPI1 (1 << 22) -#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20) -#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27) - -/* Interrupt controller */ -struct davinci_aintc_regs { - dv_reg revid; - dv_reg cr; - dv_reg dummy0[2]; - dv_reg ger; - dv_reg dummy1[219]; - dv_reg ecr1; - dv_reg ecr2; - dv_reg ecr3; - dv_reg dummy2[1117]; - dv_reg hier; -}; - -#define davinci_aintc_regs ((struct davinci_aintc_regs *)DAVINCI_INTC_BASE) - -struct davinci_uart_ctrl_regs { - dv_reg revid1; - dv_reg revid2; - dv_reg pwremu_mgmt; - dv_reg mdr; -}; - -#define DAVINCI_UART_CTRL_BASE 0x28 -#define DAVINCI_UART0_CTRL_ADDR (DAVINCI_UART0_BASE + DAVINCI_UART_CTRL_BASE) -#define DAVINCI_UART1_CTRL_ADDR (DAVINCI_UART1_BASE + DAVINCI_UART_CTRL_BASE) -#define DAVINCI_UART2_CTRL_ADDR (DAVINCI_UART2_BASE + DAVINCI_UART_CTRL_BASE) - -#define davinci_uart0_ctrl_regs \ - ((struct davinci_uart_ctrl_regs *)DAVINCI_UART0_CTRL_ADDR) -#define davinci_uart1_ctrl_regs \ - ((struct davinci_uart_ctrl_regs *)DAVINCI_UART1_CTRL_ADDR) -#define davinci_uart2_ctrl_regs \ - ((struct davinci_uart_ctrl_regs *)DAVINCI_UART2_CTRL_ADDR) - -/* UART PWREMU_MGMT definitions */ -#define DAVINCI_UART_PWREMU_MGMT_FREE (1 << 0) -#define DAVINCI_UART_PWREMU_MGMT_URRST (1 << 13) -#define DAVINCI_UART_PWREMU_MGMT_UTRST (1 << 14) - -static inline int cpu_is_da830(void) -{ - unsigned int jtag_id = REG(JTAG_ID_REG); - unsigned short part_no = (jtag_id >> 12) & 0xffff; - - return ((part_no == 0xb7df) ? 1 : 0); -} -static inline int cpu_is_da850(void) -{ - unsigned int jtag_id = REG(JTAG_ID_REG); - unsigned short part_no = (jtag_id >> 12) & 0xffff; - - return ((part_no == 0xb7d1) ? 1 : 0); -} - -static inline int get_async3_src(void) -{ - return (REG(&davinci_syscfg_regs->cfgchip3) & 0x10) ? - PLL1_SYSCLK2 : 2; -} - -#endif /* CONFIG_SOC_DA8XX */ - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-davinci/i2c_defs.h b/arch/arm/include/asm/arch-davinci/i2c_defs.h deleted file mode 100644 index 24cd268..0000000 --- a/arch/arm/include/asm/arch-davinci/i2c_defs.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * - * Some changes copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _DAVINCI_I2C_H_ -#define _DAVINCI_I2C_H_ - -#define I2C_WRITE 0 -#define I2C_READ 1 - -#ifndef CONFIG_SOC_DA8XX -#define I2C_BASE 0x01c21000 -#else -#define I2C_BASE 0x01c22000 -#endif - -#define I2C_OA (I2C_BASE + 0x00) -#define I2C_IE (I2C_BASE + 0x04) -#define I2C_STAT (I2C_BASE + 0x08) -#define I2C_SCLL (I2C_BASE + 0x0c) -#define I2C_SCLH (I2C_BASE + 0x10) -#define I2C_CNT (I2C_BASE + 0x14) -#define I2C_DRR (I2C_BASE + 0x18) -#define I2C_SA (I2C_BASE + 0x1c) -#define I2C_DXR (I2C_BASE + 0x20) -#define I2C_CON (I2C_BASE + 0x24) -#define I2C_IV (I2C_BASE + 0x28) -#define I2C_PSC (I2C_BASE + 0x30) - -/* I2C masks */ - -/* I2C Interrupt Enable Register (I2C_IE): */ -#define I2C_IE_SCD_IE (1 << 5) /* Stop condition detect interrupt enable */ -#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */ -#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */ -#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */ -#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */ - -/* I2C Status Register (I2C_STAT): */ - -#define I2C_STAT_BB (1 << 12) /* Bus busy */ -#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ -#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ -#define I2C_STAT_AAS (1 << 9) /* Address as slave */ -#define I2C_STAT_SCD (1 << 5) /* Stop condition detect */ -#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */ -#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */ -#define I2C_STAT_ARDY (1 << 2) /* Register access ready */ -#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */ - - -/* I2C Interrupt Code Register (I2C_INTCODE): */ - -#define I2C_INTCODE_MASK 7 -#define I2C_INTCODE_NONE 0 -#define I2C_INTCODE_AL 1 /* Arbitration lost */ -#define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */ -#define I2C_INTCODE_ARDY 3 /* Register access ready */ -#define I2C_INTCODE_RRDY 4 /* Rcv data ready */ -#define I2C_INTCODE_XRDY 5 /* Xmit data ready */ -#define I2C_INTCODE_SCD 6 /* Stop condition detect */ - - -/* I2C Configuration Register (I2C_CON): */ - -#define I2C_CON_EN (1 << 5) /* I2C module enable */ -#define I2C_CON_STB (1 << 4) /* Start byte mode (master mode only) */ -#define I2C_CON_MST (1 << 10) /* Master/slave mode */ -#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode (master mode only) */ -#define I2C_CON_XA (1 << 8) /* Expand address */ -#define I2C_CON_STP (1 << 11) /* Stop condition (master mode only) */ -#define I2C_CON_STT (1 << 13) /* Start condition (master mode only) */ -#define I2C_CON_FREE (1 << 14) /* Free run on emulation */ - -#define I2C_TIMEOUT 0xffff0000 /* Timeout mask for poll_i2c_irq() */ - -#endif diff --git a/arch/arm/include/asm/arch-davinci/nand_defs.h b/arch/arm/include/asm/arch-davinci/nand_defs.h deleted file mode 100644 index 10f3a39..0000000 --- a/arch/arm/include/asm/arch-davinci/nand_defs.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts shamelesly stolen from Linux Kernel source tree. - * - * ------------------------------------------------------------ - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _NAND_DEFS_H_ -#define _NAND_DEFS_H_ - -#include <asm/arch/hardware.h> - -#ifdef CONFIG_SOC_DM646X -#define MASK_CLE 0x80000 -#define MASK_ALE 0x40000 -#else -#define MASK_CLE 0x10 -#define MASK_ALE 0x08 -#endif - -#define NAND_READ_START 0x00 -#define NAND_READ_END 0x30 -#define NAND_STATUS 0x70 - -extern void davinci_nand_init(struct nand_chip *nand); - -#endif diff --git a/arch/arm/include/asm/arch-davinci/sdmmc_defs.h b/arch/arm/include/asm/arch-davinci/sdmmc_defs.h deleted file mode 100644 index 853fd40..0000000 --- a/arch/arm/include/asm/arch-davinci/sdmmc_defs.h +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Davinci MMC Controller Defines - Based on Linux davinci_mmc.c - * - * Copyright (C) 2010 Texas Instruments Incorporated - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _SDMMC_DEFS_H_ -#define _SDMMC_DEFS_H_ - -#include <asm/arch/hardware.h> - -/* MMC Control Reg fields */ -#define MMCCTL_DATRST (1 << 0) -#define MMCCTL_CMDRST (1 << 1) -#define MMCCTL_WIDTH_4_BIT (1 << 2) -#define MMCCTL_DATEG_DISABLED (0 << 6) -#define MMCCTL_DATEG_RISING (1 << 6) -#define MMCCTL_DATEG_FALLING (2 << 6) -#define MMCCTL_DATEG_BOTH (3 << 6) -#define MMCCTL_PERMDR_LE (0 << 9) -#define MMCCTL_PERMDR_BE (1 << 9) -#define MMCCTL_PERMDX_LE (0 << 10) -#define MMCCTL_PERMDX_BE (1 << 10) - -/* MMC Clock Control Reg fields */ -#define MMCCLK_CLKEN (1 << 8) -#define MMCCLK_CLKRT_MASK (0xFF << 0) - -/* MMC Status Reg0 fields */ -#define MMCST0_DATDNE (1 << 0) -#define MMCST0_BSYDNE (1 << 1) -#define MMCST0_RSPDNE (1 << 2) -#define MMCST0_TOUTRD (1 << 3) -#define MMCST0_TOUTRS (1 << 4) -#define MMCST0_CRCWR (1 << 5) -#define MMCST0_CRCRD (1 << 6) -#define MMCST0_CRCRS (1 << 7) -#define MMCST0_DXRDY (1 << 9) -#define MMCST0_DRRDY (1 << 10) -#define MMCST0_DATED (1 << 11) -#define MMCST0_TRNDNE (1 << 12) - -#define MMCST0_ERR_MASK (0x00F8) - -/* MMC Status Reg1 fields */ -#define MMCST1_BUSY (1 << 0) -#define MMCST1_CLKSTP (1 << 1) -#define MMCST1_DXEMP (1 << 2) -#define MMCST1_DRFUL (1 << 3) -#define MMCST1_DAT3ST (1 << 4) -#define MMCST1_FIFOEMP (1 << 5) -#define MMCST1_FIFOFUL (1 << 6) - -/* MMC INT Mask Reg fields */ -#define MMCIM_EDATDNE (1 << 0) -#define MMCIM_EBSYDNE (1 << 1) -#define MMCIM_ERSPDNE (1 << 2) -#define MMCIM_ETOUTRD (1 << 3) -#define MMCIM_ETOUTRS (1 << 4) -#define MMCIM_ECRCWR (1 << 5) -#define MMCIM_ECRCRD (1 << 6) -#define MMCIM_ECRCRS (1 << 7) -#define MMCIM_EDXRDY (1 << 9) -#define MMCIM_EDRRDY (1 << 10) -#define MMCIM_EDATED (1 << 11) -#define MMCIM_ETRNDNE (1 << 12) - -#define MMCIM_MASKALL (0xFFFFFFFF) - -/* MMC Resp Tout Reg fields */ -#define MMCTOR_TOR_MASK (0xFF) /* dont write to reg, | it */ -#define MMCTOR_TOD_20_16_SHIFT (8) - -/* MMC Data Read Tout Reg fields */ -#define MMCTOD_TOD_0_15_MASK (0xFFFF) - -/* MMC Block len Reg fields */ -#define MMCBLEN_BLEN_MASK (0xFFF) - -/* MMC Num Blocks Reg fields */ -#define MMCNBLK_NBLK_MASK (0xFFFF) -#define MMCNBLK_NBLK_MAX (0xFFFF) - -/* MMC Num Blocks Counter Reg fields */ -#define MMCNBLC_NBLC_MASK (0xFFFF) - -/* MMC Cmd Reg fields */ -#define MMCCMD_CMD_MASK (0x3F) -#define MMCCMD_PPLEN (1 << 7) -#define MMCCMD_BSYEXP (1 << 8) -#define MMCCMD_RSPFMT_NONE (0 << 9) -#define MMCCMD_RSPFMT_R1567 (1 << 9) -#define MMCCMD_RSPFMT_R2 (2 << 9) -#define MMCCMD_RSPFMT_R3 (3 << 9) -#define MMCCMD_DTRW (1 << 11) -#define MMCCMD_STRMTP (1 << 12) -#define MMCCMD_WDATX (1 << 13) -#define MMCCMD_INITCK (1 << 14) -#define MMCCMD_DCLR (1 << 15) -#define MMCCMD_DMATRIG (1 << 16) - -/* FIFO control Reg fields */ -#define MMCFIFOCTL_FIFORST (1 << 0) -#define MMCFIFOCTL_FIFODIR (1 << 1) -#define MMCFIFOCTL_FIFOLEV (1 << 2) -#define MMCFIFOCTL_ACCWD_4 (0 << 3) /* access width of 4 bytes */ -#define MMCFIFOCTL_ACCWD_3 (1 << 3) /* access width of 3 bytes */ -#define MMCFIFOCTL_ACCWD_2 (2 << 3) /* access width of 2 bytes */ -#define MMCFIFOCTL_ACCWD_1 (3 << 3) /* access width of 1 byte */ - -/* Davinci MMC Register definitions */ -struct davinci_mmc_regs { - dv_reg mmcctl; - dv_reg mmcclk; - dv_reg mmcst0; - dv_reg mmcst1; - dv_reg mmcim; - dv_reg mmctor; - dv_reg mmctod; - dv_reg mmcblen; - dv_reg mmcnblk; - dv_reg mmcnblc; - dv_reg mmcdrr; - dv_reg mmcdxr; - dv_reg mmccmd; - dv_reg mmcarghl; - dv_reg mmcrsp01; - dv_reg mmcrsp23; - dv_reg mmcrsp45; - dv_reg mmcrsp67; - dv_reg mmcdrsp; - dv_reg mmcetok; - dv_reg mmccidx; - dv_reg mmcckc; - dv_reg mmctorc; - dv_reg mmctodc; - dv_reg mmcblnc; - dv_reg sdioctl; - dv_reg sdiost0; - dv_reg sdioien; - dv_reg sdioist; - dv_reg mmcfifoctl; -}; - -/* Davinci MMC board definitions */ -struct davinci_mmc { - struct davinci_mmc_regs *reg_base; /* Register base address */ - uint input_clk; /* Input clock to MMC controller */ - uint host_caps; /* Host capabilities */ - uint voltages; /* Host supported voltages */ - uint version; /* MMC Controller version */ -}; - -enum { - MMC_CTLR_VERSION_1 = 0, /* DM644x and DM355 */ - MMC_CTLR_VERSION_2, /* DA830 */ -}; - -int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host); - -#endif /* _SDMMC_DEFS_H */ diff --git a/arch/arm/include/asm/arch-ep93xx/ep93xx.h b/arch/arm/include/asm/arch-ep93xx/ep93xx.h deleted file mode 100644 index 806557a..0000000 --- a/arch/arm/include/asm/arch-ep93xx/ep93xx.h +++ /dev/null @@ -1,596 +0,0 @@ -/* - * Cirrus Logic EP93xx register definitions. - * - * Copyright (C) 2009 - * Matthias Kaehlcke <matthias@kaehlcke.net> - * - * Copyright (C) 2006 - * Dominic Rath <Dominic.Rath@gmx.de> - * - * Copyright (C) 2004, 2005 - * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> - * - * Based in large part on linux/include/asm-arm/arch-ep93xx/regmap.h, which is - * - * Copyright (C) 2004 Ray Lehtiniemi - * Copyright (C) 2003 Cirrus Logic, Inc - * Copyright (C) 1999 ARM Limited. - * - * See file CREDITS for list of people who contributed to this project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#define EP93XX_AHB_BASE 0x80000000 -#define EP93XX_APB_BASE 0x80800000 - -/* - * 0x80000000 - 0x8000FFFF: DMA - */ -#define DMA_OFFSET 0x000000 -#define DMA_BASE (EP93XX_AHB_BASE | DMA_OFFSET) - -#ifndef __ASSEMBLY__ -struct dma_channel { - uint32_t control; - uint32_t interrupt; - uint32_t ppalloc; - uint32_t status; - uint32_t reserved0; - uint32_t remain; - uint32_t reserved1[2]; - uint32_t maxcnt0; - uint32_t base0; - uint32_t current0; - uint32_t reserved2; - uint32_t maxcnt1; - uint32_t base1; - uint32_t current1; - uint32_t reserved3; -}; - -struct dma_regs { - struct dma_channel m2p_channel_0; - struct dma_channel m2p_channel_1; - struct dma_channel m2p_channel_2; - struct dma_channel m2p_channel_3; - struct dma_channel m2m_channel_0; - struct dma_channel m2m_channel_1; - struct dma_channel reserved0[2]; - struct dma_channel m2p_channel_5; - struct dma_channel m2p_channel_4; - struct dma_channel m2p_channel_7; - struct dma_channel m2p_channel_6; - struct dma_channel m2p_channel_9; - struct dma_channel m2p_channel_8; - uint32_t channel_arbitration; - uint32_t reserved[15]; - uint32_t global_interrupt; -}; -#endif - -/* - * 0x80010000 - 0x8001FFFF: Ethernet MAC - */ -#define MAC_OFFSET 0x010000 -#define MAC_BASE (EP93XX_AHB_BASE | MAC_OFFSET) - -#ifndef __ASSEMBLY__ -struct mac_queue { - uint32_t badd; - union { /* deal with half-word aligned registers */ - uint32_t blen; - union { - uint16_t filler; - uint16_t curlen; - }; - }; - uint32_t curadd; -}; - -struct mac_regs { - uint32_t rxctl; - uint32_t txctl; - uint32_t testctl; - uint32_t reserved0; - uint32_t miicmd; - uint32_t miidata; - uint32_t miists; - uint32_t reserved1; - uint32_t selfctl; - uint32_t inten; - uint32_t intstsp; - uint32_t intstsc; - uint32_t reserved2[2]; - uint32_t diagad; - uint32_t diagdata; - uint32_t gt; - uint32_t fct; - uint32_t fcf; - uint32_t afp; - union { - struct { - uint32_t indad; - uint32_t indad_upper; - }; - uint32_t hashtbl; - }; - uint32_t reserved3[2]; - uint32_t giintsts; - uint32_t giintmsk; - uint32_t giintrosts; - uint32_t giintfrc; - uint32_t txcollcnt; - uint32_t rxmissnct; - uint32_t rxruntcnt; - uint32_t reserved4; - uint32_t bmctl; - uint32_t bmsts; - uint32_t rxbca; - uint32_t reserved5; - struct mac_queue rxdq; - uint32_t rxdqenq; - struct mac_queue rxstsq; - uint32_t rxstsqenq; - struct mac_queue txdq; - uint32_t txdqenq; - struct mac_queue txstsq; - uint32_t reserved6; - uint32_t rxbufthrshld; - uint32_t txbufthrshld; - uint32_t rxststhrshld; - uint32_t txststhrshld; - uint32_t rxdthrshld; - uint32_t txdthrshld; - uint32_t maxfrmlen; - uint32_t maxhdrlen; -}; -#endif - -#define SELFCTL_RWP (1 << 7) -#define SELFCTL_GPO0 (1 << 5) -#define SELFCTL_PUWE (1 << 4) -#define SELFCTL_PDWE (1 << 3) -#define SELFCTL_MIIL (1 << 2) -#define SELFCTL_RESET (1 << 0) - -#define INTSTS_RWI (1 << 30) -#define INTSTS_RXMI (1 << 29) -#define INTSTS_RXBI (1 << 28) -#define INTSTS_RXSQI (1 << 27) -#define INTSTS_TXLEI (1 << 26) -#define INTSTS_ECIE (1 << 25) -#define INTSTS_TXUHI (1 << 24) -#define INTSTS_MOI (1 << 18) -#define INTSTS_TXCOI (1 << 17) -#define INTSTS_RXROI (1 << 16) -#define INTSTS_MIII (1 << 12) -#define INTSTS_PHYI (1 << 11) -#define INTSTS_TI (1 << 10) -#define INTSTS_AHBE (1 << 8) -#define INTSTS_OTHER (1 << 4) -#define INTSTS_TXSQ (1 << 3) -#define INTSTS_RXSQ (1 << 2) - -#define BMCTL_MT (1 << 13) -#define BMCTL_TT (1 << 12) -#define BMCTL_UNH (1 << 11) -#define BMCTL_TXCHR (1 << 10) -#define BMCTL_TXDIS (1 << 9) -#define BMCTL_TXEN (1 << 8) -#define BMCTL_EH2 (1 << 6) -#define BMCTL_EH1 (1 << 5) -#define BMCTL_EEOB (1 << 4) -#define BMCTL_RXCHR (1 << 2) -#define BMCTL_RXDIS (1 << 1) -#define BMCTL_RXEN (1 << 0) - -#define BMSTS_TXACT (1 << 7) -#define BMSTS_TP (1 << 4) -#define BMSTS_RXACT (1 << 3) -#define BMSTS_QID_MASK 0x07 -#define BMSTS_QID_RXDATA 0x00 -#define BMSTS_QID_TXDATA 0x01 -#define BMSTS_QID_RXSTS 0x02 -#define BMSTS_QID_TXSTS 0x03 -#define BMSTS_QID_RXDESC 0x04 -#define BMSTS_QID_TXDESC 0x05 - -#define AFP_MASK 0x07 -#define AFP_IAPRIMARY 0x00 -#define AFP_IASECONDARY1 0x01 -#define AFP_IASECONDARY2 0x02 -#define AFP_IASECONDARY3 0x03 -#define AFP_TX 0x06 -#define AFP_HASH 0x07 - -#define RXCTL_PAUSEA (1 << 20) -#define RXCTL_RXFCE1 (1 << 19) -#define RXCTL_RXFCE0 (1 << 18) -#define RXCTL_BCRC (1 << 17) -#define RXCTL_SRXON (1 << 16) -#define RXCTL_RCRCA (1 << 13) -#define RXCTL_RA (1 << 12) -#define RXCTL_PA (1 << 11) -#define RXCTL_BA (1 << 10) -#define RXCTL_MA (1 << 9) -#define RXCTL_IAHA (1 << 8) -#define RXCTL_IA3 (1 << 3) -#define RXCTL_IA2 (1 << 2) -#define RXCTL_IA1 (1 << 1) -#define RXCTL_IA0 (1 << 0) - -#define TXCTL_DEFDIS (1 << 7) -#define TXCTL_MBE (1 << 6) -#define TXCTL_ICRC (1 << 5) -#define TXCTL_TPD (1 << 4) -#define TXCTL_OCOLL (1 << 3) -#define TXCTL_SP (1 << 2) -#define TXCTL_PB (1 << 1) -#define TXCTL_STXON (1 << 0) - -#define MIICMD_REGAD_MASK (0x001F) -#define MIICMD_PHYAD_MASK (0x03E0) -#define MIICMD_OPCODE_MASK (0xC000) -#define MIICMD_PHYAD_8950 (0x0000) -#define MIICMD_OPCODE_READ (0x8000) -#define MIICMD_OPCODE_WRITE (0x4000) - -#define MIISTS_BUSY (1 << 0) - -/* - * 0x80020000 - 0x8002FFFF: USB OHCI - */ -#define USB_OFFSET 0x020000 -#define USB_BASE (EP93XX_AHB_BASE | USB_OFFSET) - -/* - * 0x80030000 - 0x8003FFFF: Raster engine - */ -#if (defined(CONFIG_EP9307) || defined(CONFIG_EP9312) || defined(CONFIG_EP9315)) -#define RASTER_OFFSET 0x030000 -#define RASTER_BASE (EP93XX_AHB_BASE | RASTER_OFFSET) -#endif - -/* - * 0x80040000 - 0x8004FFFF: Graphics accelerator - */ -#if defined(CONFIG_EP9315) -#define GFX_OFFSET 0x040000 -#define GFX_BASE (EP93XX_AHB_BASE | GFX_OFFSET) -#endif - -/* - * 0x80050000 - 0x8005FFFF: Reserved - */ - -/* - * 0x80060000 - 0x8006FFFF: SDRAM controller - */ -#define SDRAM_OFFSET 0x060000 -#define SDRAM_BASE (EP93XX_AHB_BASE | SDRAM_OFFSET) - -#ifndef __ASSEMBLY__ -struct sdram_regs { - uint32_t reserved; - uint32_t glconfig; - uint32_t refrshtimr; - uint32_t bootsts; - uint32_t devcfg0; - uint32_t devcfg1; - uint32_t devcfg2; - uint32_t devcfg3; -}; -#endif - -#define SDRAM_DEVCFG_EXTBUSWIDTH (1 << 2) -#define SDRAM_DEVCFG_BANKCOUNT (1 << 3) -#define SDRAM_DEVCFG_SROMLL (1 << 5) -#define SDRAM_DEVCFG_CASLAT_2 0x00010000 -#define SDRAM_DEVCFG_RASTOCAS_2 0x00200000 - -#define GLCONFIG_INIT (1 << 0) -#define GLCONFIG_MRS (1 << 1) -#define GLCONFIG_SMEMBUSY (1 << 5) -#define GLCONFIG_LCR (1 << 6) -#define GLCONFIG_REARBEN (1 << 7) -#define GLCONFIG_CLKSHUTDOWN (1 << 30) -#define GLCONFIG_CKE (1 << 31) - -/* - * 0x80070000 - 0x8007FFFF: Reserved - */ - -/* - * 0x80080000 - 0x8008FFFF: SRAM controller & PCMCIA - */ -#define SMC_OFFSET 0x080000 -#define SMC_BASE (EP93XX_AHB_BASE | SMC_OFFSET) - -#ifndef __ASSEMBLY__ -struct smc_regs { - uint32_t bcr0; - uint32_t bcr1; - uint32_t bcr2; - uint32_t bcr3; - uint32_t reserved0[2]; - uint32_t bcr6; - uint32_t bcr7; -#if defined(CONFIG_EP9315) - uint32_t pcattribute; - uint32_t pccommon; - uint32_t pcio; - uint32_t reserved1[5]; - uint32_t pcmciactrl; -#endif -}; -#endif - -#define SMC_BCR_IDCY_SHIFT 0 -#define SMC_BCR_WST1_SHIFT 5 -#define SMC_BCR_BLE (1 << 10) -#define SMC_BCR_WST2_SHIFT 11 -#define SMC_BCR_MW_SHIFT 28 - -/* - * 0x80090000 - 0x8009FFFF: Boot ROM - */ - -/* - * 0x800A0000 - 0x800AFFFF: IDE interface - */ - -/* - * 0x800B0000 - 0x800BFFFF: VIC1 - */ - -/* - * 0x800C0000 - 0x800CFFFF: VIC2 - */ - -/* - * 0x800D0000 - 0x800FFFFF: Reserved - */ - -/* - * 0x80800000 - 0x8080FFFF: Reserved - */ - -/* - * 0x80810000 - 0x8081FFFF: Timers - */ -#define TIMER_OFFSET 0x010000 -#define TIMER_BASE (EP93XX_APB_BASE | TIMER_OFFSET) - -#ifndef __ASSEMBLY__ -struct timer { - uint32_t load; - uint32_t value; - uint32_t control; - uint32_t clear; -}; - -struct timer4 { - uint32_t value_low; - uint32_t value_high; -}; - -struct timer_regs { - struct timer timer1; - uint32_t reserved0[4]; - struct timer timer2; - uint32_t reserved1[12]; - struct timer4 timer4; - uint32_t reserved2[6]; - struct timer timer3; -}; -#endif - -/* - * 0x80820000 - 0x8082FFFF: I2S - */ -#define I2S_OFFSET 0x020000 -#define I2S_BASE (EP93XX_APB_BASE | I2S_OFFSET) - -/* - * 0x80830000 - 0x8083FFFF: Security - */ -#define SECURITY_OFFSET 0x030000 -#define SECURITY_BASE (EP93XX_APB_BASE | SECURITY_OFFSET) - -#define EXTENSIONID (SECURITY_BASE + 0x2714) - -/* - * 0x80840000 - 0x8084FFFF: GPIO - */ -#define GPIO_OFFSET 0x040000 -#define GPIO_BASE (EP93XX_APB_BASE | GPIO_OFFSET) - -#ifndef __ASSEMBLY__ -struct gpio_int { - uint32_t inttype1; - uint32_t inttype2; - uint32_t eoi; - uint32_t inten; - uint32_t intsts; - uint32_t rawintsts; - uint32_t db; -}; - -struct gpio_regs { - uint32_t padr; - uint32_t pbdr; - uint32_t pcdr; - uint32_t pddr; - uint32_t paddr; - uint32_t pbddr; - uint32_t pcddr; - uint32_t pdddr; - uint32_t pedr; - uint32_t peddr; - uint32_t reserved0[2]; - uint32_t pfdr; - uint32_t pfddr; - uint32_t pgdr; - uint32_t pgddr; - uint32_t phdr; - uint32_t phddr; - uint32_t reserved1; - uint32_t finttype1; - uint32_t finttype2; - uint32_t reserved2; - struct gpio_int pfint; - uint32_t reserved3[10]; - struct gpio_int paint; - struct gpio_int pbint; - uint32_t eedrive; -}; -#endif - -/* - * 0x80850000 - 0x8087FFFF: Reserved - */ - -/* - * 0x80880000 - 0x8088FFFF: AAC - */ -#define AAC_OFFSET 0x080000 -#define AAC_BASE (EP93XX_APB_BASE | AAC_OFFSET) - -/* - * 0x80890000 - 0x8089FFFF: Reserved - */ - -/* - * 0x808A0000 - 0x808AFFFF: SPI - */ -#define SPI_OFFSET 0x0A0000 -#define SPI_BASE (EP93XX_APB_BASE | SPI_OFFSET) - -/* - * 0x808B0000 - 0x808BFFFF: IrDA - */ -#define IRDA_OFFSET 0x0B0000 -#define IRDA_BASE (EP93XX_APB_BASE | IRDA_OFFSET) - -/* - * 0x808C0000 - 0x808CFFFF: UART1 - */ -#define UART1_OFFSET 0x0C0000 -#define UART1_BASE (EP93XX_APB_BASE | UART1_OFFSET) - -/* - * 0x808D0000 - 0x808DFFFF: UART2 - */ -#define UART2_OFFSET 0x0D0000 -#define UART2_BASE (EP93XX_APB_BASE | UART2_OFFSET) - -/* - * 0x808E0000 - 0x808EFFFF: UART3 - */ -#define UART3_OFFSET 0x0E0000 -#define UART3_BASE (EP93XX_APB_BASE | UART3_OFFSET) - -/* - * 0x808F0000 - 0x808FFFFF: Key Matrix - */ -#define KEY_OFFSET 0x0F0000 -#define KEY_BASE (EP93XX_APB_BASE | KEY_OFFSET) - -/* - * 0x80900000 - 0x8090FFFF: Touchscreen - */ -#define TOUCH_OFFSET 0x900000 -#define TOUCH_BASE (EP93XX_APB_BASE | TOUCH_OFFSET) - -/* - * 0x80910000 - 0x8091FFFF: Pulse Width Modulation - */ -#define PWM_OFFSET 0x910000 -#define PWM_BASE (EP93XX_APB_BASE | PWM_OFFSET) - -/* - * 0x80920000 - 0x8092FFFF: Real time clock - */ -#define RTC_OFFSET 0x920000 -#define RTC_BASE (EP93XX_APB_BASE | RTC_OFFSET) - -/* - * 0x80930000 - 0x8093FFFF: Syscon - */ -#define SYSCON_OFFSET 0x930000 -#define SYSCON_BASE (EP93XX_APB_BASE | SYSCON_OFFSET) - -#ifndef __ASSEMBLY__ -struct syscon_regs { - uint32_t pwrsts; - uint32_t pwrcnt; - uint32_t halt; - uint32_t stby; - uint32_t reserved0[2]; - uint32_t teoi; - uint32_t stfclr; - uint32_t clkset1; - uint32_t clkset2; - uint32_t reserved1[6]; - uint32_t scratch0; - uint32_t scratch1; - uint32_t reserved2[2]; - uint32_t apbwait; - uint32_t bustmstrarb; - uint32_t bootmodeclr; - uint32_t reserved3[9]; - uint32_t devicecfg; - uint32_t vidclkdiv; - uint32_t mirclkdiv; - uint32_t i2sclkdiv; - uint32_t keytchclkdiv; - uint32_t chipid; - uint32_t reserved4; - uint32_t syscfg; - uint32_t reserved5[8]; - uint32_t sysswlock; -}; -#else -#define SYSCON_SCRATCH0 (SYSCON_BASE + 0x0040) -#endif - -#define SYSCON_PWRCNT_UART_BAUD (1 << 29) - -#define SYSCON_CLKSET_PLL_X2IPD_SHIFT 0 -#define SYSCON_CLKSET_PLL_X2FBD2_SHIFT 5 -#define SYSCON_CLKSET_PLL_X1FBD1_SHIFT 11 -#define SYSCON_CLKSET_PLL_PS_SHIFT 16 -#define SYSCON_CLKSET1_PCLK_DIV_SHIFT 18 -#define SYSCON_CLKSET1_HCLK_DIV_SHIFT 20 -#define SYSCON_CLKSET1_NBYP1 (1 << 23) -#define SYSCON_CLKSET1_FCLK_DIV_SHIFT 25 - -#define SYSCON_CLKSET2_PLL2_EN (1 << 18) -#define SYSCON_CLKSET2_NBYP2 (1 << 19) -#define SYSCON_CLKSET2_USB_DIV_SHIFT 28 - -#define SYSCON_CHIPID_REV_MASK 0xF0000000 -#define SYSCON_DEVICECFG_SWRST (1 << 31) - -/* - * 0x80930000 - 0x8093FFFF: Watchdog Timer - */ -#define WATCHDOG_OFFSET 0x940000 -#define WATCHDOG_BASE (EP93XX_APB_BASE | WATCHDOG_OFFSET) - -/* - * 0x80950000 - 0x9000FFFF: Reserved - */ diff --git a/arch/arm/include/asm/arch-imx/imx-regs.h b/arch/arm/include/asm/arch-imx/imx-regs.h deleted file mode 100644 index ec94ba9..0000000 --- a/arch/arm/include/asm/arch-imx/imx-regs.h +++ /dev/null @@ -1,634 +0,0 @@ -#ifndef _IMX_REGS_H -#define _IMX_REGS_H -/* ------------------------------------------------------------------------ - * Motorola IMX system registers - * ------------------------------------------------------------------------ - * - */ - -#define IO_ADDRESS(x) ((x) | IMX_IO_BASE) - -# ifndef __ASSEMBLY__ -# define __REG(x) (*((volatile u32 *)IO_ADDRESS(x))) -# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) -# else -# define __REG(x) (x) -# define __REG2(x,y) ((x)+(y)) -#endif - -#define IMX_IO_BASE 0x00200000 - -/* - * Register BASEs, based on OFFSETs - * - */ -#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) -#define IMX_WDT_BASE (0x01000 + IMX_IO_BASE) -#define IMX_TIM1_BASE (0x02000 + IMX_IO_BASE) -#define IMX_TIM2_BASE (0x03000 + IMX_IO_BASE) -#define IMX_RTC_BASE (0x04000 + IMX_IO_BASE) -#define IMX_LCDC_BASE (0x05000 + IMX_IO_BASE) -#define IMX_UART1_BASE (0x06000 + IMX_IO_BASE) -#define IMX_UART2_BASE (0x07000 + IMX_IO_BASE) -#define IMX_PWM_BASE (0x08000 + IMX_IO_BASE) -#define IMX_DMAC_BASE (0x09000 + IMX_IO_BASE) -#define IMX_AIPI2_BASE (0x10000 + IMX_IO_BASE) -#define IMX_SIM_BASE (0x11000 + IMX_IO_BASE) -#define IMX_USBD_BASE (0x12000 + IMX_IO_BASE) -#define IMX_SPI1_BASE (0x13000 + IMX_IO_BASE) -#define IMX_MMC_BASE (0x14000 + IMX_IO_BASE) -#define IMX_ASP_BASE (0x15000 + IMX_IO_BASE) -#define IMX_BTA_BASE (0x16000 + IMX_IO_BASE) -#define IMX_I2C_BASE (0x17000 + IMX_IO_BASE) -#define IMX_SSI_BASE (0x18000 + IMX_IO_BASE) -#define IMX_SPI2_BASE (0x19000 + IMX_IO_BASE) -#define IMX_MSHC_BASE (0x1A000 + IMX_IO_BASE) -#define IMX_PLL_BASE (0x1B000 + IMX_IO_BASE) -#define IMX_SYSCTRL_BASE (0x1B800 + IMX_IO_BASE) -#define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) -#define IMX_EIM_BASE (0x20000 + IMX_IO_BASE) -#define IMX_SDRAMC_BASE (0x21000 + IMX_IO_BASE) -#define IMX_MMA_BASE (0x22000 + IMX_IO_BASE) -#define IMX_AITC_BASE (0x23000 + IMX_IO_BASE) -#define IMX_CSI_BASE (0x24000 + IMX_IO_BASE) - -/* Watchdog Registers*/ - -#define WCR __REG(IMX_WDT_BASE + 0x00) /* Watchdog Control Register */ -#define WSR __REG(IMX_WDT_BASE + 0x04) /* Watchdog Service Register */ -#define WSTR __REG(IMX_WDT_BASE + 0x08) /* Watchdog Status Register */ - -/* SYSCTRL Registers */ -#define SIDR __REG(IMX_SYSCTRL_BASE + 0x4) /* Silicon ID Register */ -#define FMCR __REG(IMX_SYSCTRL_BASE + 0x8) /* Function Multiplex Control Register */ -#define GPCR __REG(IMX_SYSCTRL_BASE + 0xC) /* Function Multiplex Control Register */ - -/* Chip Select Registers */ -#define CS0U __REG(IMX_EIM_BASE) /* Chip Select 0 Upper Register */ -#define CS0L __REG(IMX_EIM_BASE + 0x4) /* Chip Select 0 Lower Register */ -#define CS1U __REG(IMX_EIM_BASE + 0x8) /* Chip Select 1 Upper Register */ -#define CS1L __REG(IMX_EIM_BASE + 0xc) /* Chip Select 1 Lower Register */ -#define CS2U __REG(IMX_EIM_BASE + 0x10) /* Chip Select 2 Upper Register */ -#define CS2L __REG(IMX_EIM_BASE + 0x14) /* Chip Select 2 Lower Register */ -#define CS3U __REG(IMX_EIM_BASE + 0x18) /* Chip Select 3 Upper Register */ -#define CS3L __REG(IMX_EIM_BASE + 0x1c) /* Chip Select 3 Lower Register */ -#define CS4U __REG(IMX_EIM_BASE + 0x20) /* Chip Select 4 Upper Register */ -#define CS4L __REG(IMX_EIM_BASE + 0x24) /* Chip Select 4 Lower Register */ -#define CS5U __REG(IMX_EIM_BASE + 0x28) /* Chip Select 5 Upper Register */ -#define CS5L __REG(IMX_EIM_BASE + 0x2c) /* Chip Select 5 Lower Register */ -#define EIM __REG(IMX_EIM_BASE + 0x30) /* EIM Configuration Register */ - -/* SDRAM controller registers */ - -#define SDCTL0 __REG(IMX_SDRAMC_BASE) /* SDRAM 0 Control Register */ -#define SDCTL1 __REG(IMX_SDRAMC_BASE + 0x4) /* SDRAM 1 Control Register */ -#define SDMISC __REG(IMX_SDRAMC_BASE + 0x14) /* Miscellaneous Register */ -#define SDRST __REG(IMX_SDRAMC_BASE + 0x18) /* SDRAM Reset Register */ - -/* PLL registers */ -#define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ -#define CSCR_SPLL_RESTART (1<<22) -#define CSCR_MPLL_RESTART (1<<21) -#define CSCR_SYSTEM_SEL (1<<16) -#define CSCR_BCLK_DIV (0xf<<10) -#define CSCR_MPU_PRESC (1<<15) -#define CSCR_SPEN (1<<1) -#define CSCR_MPEN (1<<0) - -#define MPCTL0 __REG(IMX_PLL_BASE + 0x4) /* MCU PLL Control Register 0 */ -#define MPCTL1 __REG(IMX_PLL_BASE + 0x8) /* MCU PLL and System Clock Register 1 */ -#define SPCTL0 __REG(IMX_PLL_BASE + 0xc) /* System PLL Control Register 0 */ -#define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */ -#define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ - -/* - * GPIO Module and I/O Multiplexer - * x = 0..3 for reg_A, reg_B, reg_C, reg_D - */ -#define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) -#define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) -#define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) -#define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) -#define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) -#define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) -#define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) -#define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) -#define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) -#define SSR(x) __REG2(IMX_GPIO_BASE + 0x24, ((x) & 3) << 8) -#define ICR1(x) __REG2(IMX_GPIO_BASE + 0x28, ((x) & 3) << 8) -#define ICR2(x) __REG2(IMX_GPIO_BASE + 0x2c, ((x) & 3) << 8) -#define IMR(x) __REG2(IMX_GPIO_BASE + 0x30, ((x) & 3) << 8) -#define ISR(x) __REG2(IMX_GPIO_BASE + 0x34, ((x) & 3) << 8) -#define GPR(x) __REG2(IMX_GPIO_BASE + 0x38, ((x) & 3) << 8) -#define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8) -#define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8) - -#define GPIO_PORT_MAX 3 - -#define GPIO_PIN_MASK 0x1f -#define GPIO_PORT_MASK (0x3 << 5) - -#define GPIO_PORT_SHIFT 5 -#define GPIO_PORTA (0<<5) -#define GPIO_PORTB (1<<5) -#define GPIO_PORTC (2<<5) -#define GPIO_PORTD (3<<5) - -#define GPIO_OUT (1<<7) -#define GPIO_IN (0<<7) -#define GPIO_PUEN (1<<8) - -#define GPIO_PF (0<<9) -#define GPIO_AF (1<<9) - -#define GPIO_OCR_SHIFT 10 -#define GPIO_OCR_MASK (3<<10) -#define GPIO_AIN (0<<10) -#define GPIO_BIN (1<<10) -#define GPIO_CIN (2<<10) -#define GPIO_DR (3<<10) - -#define GPIO_AOUT_SHIFT 12 -#define GPIO_AOUT_MASK (3<<12) -#define GPIO_AOUT (0<<12) -#define GPIO_AOUT_ISR (1<<12) -#define GPIO_AOUT_0 (2<<12) -#define GPIO_AOUT_1 (3<<12) - -#define GPIO_BOUT_SHIFT 14 -#define GPIO_BOUT_MASK (3<<14) -#define GPIO_BOUT (0<<14) -#define GPIO_BOUT_ISR (1<<14) -#define GPIO_BOUT_0 (2<<14) -#define GPIO_BOUT_1 (3<<14) - -#define GPIO_GIUS (1<<16) - -/* assignements for GPIO alternate/primary functions */ - -/* FIXME: This list is not completed. The correct directions are - * missing on some (many) pins - */ -#define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 ) -#define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) -#define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 ) -#define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) -#define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) -#define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) -#define PA4_PF_CSI_D0 ( GPIO_PORTA | GPIO_PF | 4 ) -#define PA5_PF_CSI_D1 ( GPIO_PORTA | GPIO_PF | 5 ) -#define PA6_PF_CSI_D2 ( GPIO_PORTA | GPIO_PF | 6 ) -#define PA7_PF_CSI_D3 ( GPIO_PORTA | GPIO_PF | 7 ) -#define PA8_PF_CSI_D4 ( GPIO_PORTA | GPIO_PF | 8 ) -#define PA9_PF_CSI_D5 ( GPIO_PORTA | GPIO_PF | 9 ) -#define PA10_PF_CSI_D6 ( GPIO_PORTA | GPIO_PF | 10 ) -#define PA11_PF_CSI_D7 ( GPIO_PORTA | GPIO_PF | 11 ) -#define PA12_PF_CSI_VSYNC ( GPIO_PORTA | GPIO_PF | 12 ) -#define PA13_PF_CSI_HSYNC ( GPIO_PORTA | GPIO_PF | 13 ) -#define PA14_PF_CSI_PIXCLK ( GPIO_PORTA | GPIO_PF | 14 ) -#define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) -#define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) -#define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) -#define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 ) -#define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) -#define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) -#define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) -#define PA21_PF_A0 ( GPIO_PORTA | GPIO_PF | 21 ) -#define PA22_PF_CS4 ( GPIO_PORTA | GPIO_PF | 22 ) -#define PA23_PF_CS5 ( GPIO_PORTA | GPIO_PF | 23 ) -#define PA24_PF_A16 ( GPIO_PORTA | GPIO_PF | 24 ) -#define PA24_AF_ETMTRACEPKT0 ( GPIO_PORTA | GPIO_AF | 24 ) -#define PA25_PF_A17 ( GPIO_PORTA | GPIO_PF | 25 ) -#define PA25_AF_ETMTRACEPKT1 ( GPIO_PORTA | GPIO_AF | 25 ) -#define PA26_PF_A18 ( GPIO_PORTA | GPIO_PF | 26 ) -#define PA26_AF_ETMTRACEPKT2 ( GPIO_PORTA | GPIO_AF | 26 ) -#define PA27_PF_A19 ( GPIO_PORTA | GPIO_PF | 27 ) -#define PA27_AF_ETMTRACEPKT3 ( GPIO_PORTA | GPIO_AF | 27 ) -#define PA28_PF_A20 ( GPIO_PORTA | GPIO_PF | 28 ) -#define PA28_AF_ETMPIPESTAT0 ( GPIO_PORTA | GPIO_AF | 28 ) -#define PA29_PF_A21 ( GPIO_PORTA | GPIO_PF | 29 ) -#define PA29_AF_ETMPIPESTAT1 ( GPIO_PORTA | GPIO_AF | 29 ) -#define PA30_PF_A22 ( GPIO_PORTA | GPIO_PF | 30 ) -#define PA30_AF_ETMPIPESTAT2 ( GPIO_PORTA | GPIO_AF | 30 ) -#define PA31_PF_A23 ( GPIO_PORTA | GPIO_PF | 31 ) -#define PA31_AF_ETMTRACECLK ( GPIO_PORTA | GPIO_AF | 31 ) -#define PB8_PF_SD_DAT0 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8 ) -#define PB8_AF_MS_PIO ( GPIO_PORTB | GPIO_AF | 8 ) -#define PB9_PF_SD_DAT1 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9 ) -#define PB9_AF_MS_PI1 ( GPIO_PORTB | GPIO_AF | 9 ) -#define PB10_PF_SD_DAT2 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10 ) -#define PB10_AF_MS_SCLKI ( GPIO_PORTB | GPIO_AF | 10 ) -#define PB11_PF_SD_DAT3 ( GPIO_PORTB | GPIO_PF | 11 ) -#define PB11_AF_MS_SDIO ( GPIO_PORTB | GPIO_AF | 11 ) -#define PB12_PF_SD_CLK ( GPIO_PORTB | GPIO_PF | 12 ) -#define PB12_AF_MS_SCLK0 ( GPIO_PORTB | GPIO_AF | 12 ) -#define PB13_PF_SD_CMD ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13 ) -#define PB13_AF_MS_BS ( GPIO_PORTB | GPIO_AF | 13 ) -#define PB14_AF_SSI_RXFS ( GPIO_PORTB | GPIO_AF | 14 ) -#define PB15_AF_SSI_RXCLK ( GPIO_PORTB | GPIO_AF | 15 ) -#define PB16_AF_SSI_RXDAT ( GPIO_PORTB | GPIO_IN | GPIO_AF | 16 ) -#define PB17_AF_SSI_TXDAT ( GPIO_PORTB | GPIO_OUT | GPIO_AF | 17 ) -#define PB18_AF_SSI_TXFS ( GPIO_PORTB | GPIO_AF | 18 ) -#define PB19_AF_SSI_TXCLK ( GPIO_PORTB | GPIO_AF | 19 ) -#define PB20_PF_USBD_AFE ( GPIO_PORTB | GPIO_PF | 20 ) -#define PB21_PF_USBD_OE ( GPIO_PORTB | GPIO_PF | 21 ) -#define PB22_PFUSBD_RCV ( GPIO_PORTB | GPIO_PF | 22 ) -#define PB23_PF_USBD_SUSPND ( GPIO_PORTB | GPIO_PF | 23 ) -#define PB24_PF_USBD_VP ( GPIO_PORTB | GPIO_PF | 24 ) -#define PB25_PF_USBD_VM ( GPIO_PORTB | GPIO_PF | 25 ) -#define PB26_PF_USBD_VPO ( GPIO_PORTB | GPIO_PF | 26 ) -#define PB27_PF_USBD_VMO ( GPIO_PORTB | GPIO_PF | 27 ) -#define PB28_PF_UART2_CTS ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 28 ) -#define PB29_PF_UART2_RTS ( GPIO_PORTB | GPIO_IN | GPIO_PF | 29 ) -#define PB30_PF_UART2_TXD ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 30 ) -#define PB31_PF_UART2_RXD ( GPIO_PORTB | GPIO_IN | GPIO_PF | 31 ) -#define PC3_PF_SSI_RXFS ( GPIO_PORTC | GPIO_PF | 3 ) -#define PC4_PF_SSI_RXCLK ( GPIO_PORTC | GPIO_PF | 4 ) -#define PC5_PF_SSI_RXDAT ( GPIO_PORTC | GPIO_IN | GPIO_PF | 5 ) -#define PC6_PF_SSI_TXDAT ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 6 ) -#define PC7_PF_SSI_TXFS ( GPIO_PORTC | GPIO_PF | 7 ) -#define PC8_PF_SSI_TXCLK ( GPIO_PORTC | GPIO_PF | 8 ) -#define PC9_PF_UART1_CTS ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 9 ) -#define PC10_PF_UART1_RTS ( GPIO_PORTC | GPIO_IN | GPIO_PF | 10 ) -#define PC11_PF_UART1_TXD ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 11 ) -#define PC12_PF_UART1_RXD ( GPIO_PORTC | GPIO_IN | GPIO_PF | 12 ) -#define PC13_PF_SPI1_SPI_RDY ( GPIO_PORTC | GPIO_PF | 13 ) -#define PC14_PF_SPI1_SCLK ( GPIO_PORTC | GPIO_PF | 14 ) -#define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) -#define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) -#define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) -#define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 ) -#define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 ) -#define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 ) -#define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 ) -#define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 ) -#define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 ) -#define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 ) -#define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) -#define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) -#define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) -#define PD7_AF_UART2_DTR ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) -#define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 ) -#define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) -#define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) -#define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 ) -#define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) -#define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) -#define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 ) -#define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) -#define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) -#define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 ) -#define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) -#define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) -#define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) -#define PD14_PF_FLM_VSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 14 ) -#define PD15_PF_LD0 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 15 ) -#define PD16_PF_LD1 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 16 ) -#define PD17_PF_LD2 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 17 ) -#define PD18_PF_LD3 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 18 ) -#define PD19_PF_LD4 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 19 ) -#define PD20_PF_LD5 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 20 ) -#define PD21_PF_LD6 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 21 ) -#define PD22_PF_LD7 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 22 ) -#define PD23_PF_LD8 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 23 ) -#define PD24_PF_LD9 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 24 ) -#define PD25_PF_LD10 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 25 ) -#define PD26_PF_LD11 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 26 ) -#define PD27_PF_LD12 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 27 ) -#define PD28_PF_LD13 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 28 ) -#define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) -#define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) -#define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) -#define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 ) - -/* - * PWM controller - */ -#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */ -#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */ -#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */ -#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */ - -#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */ -#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */ -#define PWMC_SWR (0x01<<16) /* Software Reset */ -#define PWMC_CLKSRC (0x01<<15) /* Clock Source */ -#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */ -#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */ -#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */ -#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */ -#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */ -#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ -#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */ - -#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ -#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ -#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ - -/* - * DMA Controller - */ -#define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ -#define DISR __REG(IMX_DMAC_BASE +0x04) /* DMA Interrupt status Register */ -#define DIMR __REG(IMX_DMAC_BASE +0x08) /* DMA Interrupt mask Register */ -#define DBTOSR __REG(IMX_DMAC_BASE +0x0c) /* DMA Burst timeout status Register */ -#define DRTOSR __REG(IMX_DMAC_BASE +0x10) /* DMA Request timeout Register */ -#define DSESR __REG(IMX_DMAC_BASE +0x14) /* DMA Transfer Error Status Register */ -#define DBOSR __REG(IMX_DMAC_BASE +0x18) /* DMA Buffer overflow status Register */ -#define DBTOCR __REG(IMX_DMAC_BASE +0x1c) /* DMA Burst timeout control Register */ -#define WSRA __REG(IMX_DMAC_BASE +0x40) /* W-Size Register A */ -#define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */ -#define YSRA __REG(IMX_DMAC_BASE +0x48) /* Y-Size Register A */ -#define WSRB __REG(IMX_DMAC_BASE +0x4c) /* W-Size Register B */ -#define XSRB __REG(IMX_DMAC_BASE +0x50) /* X-Size Register B */ -#define YSRB __REG(IMX_DMAC_BASE +0x54) /* Y-Size Register B */ -#define SAR(x) __REG2( IMX_DMAC_BASE + 0x80, (x) << 6) /* Source Address Registers */ -#define DAR(x) __REG2( IMX_DMAC_BASE + 0x84, (x) << 6) /* Destination Address Registers */ -#define CNTR(x) __REG2( IMX_DMAC_BASE + 0x88, (x) << 6) /* Count Registers */ -#define CCR(x) __REG2( IMX_DMAC_BASE + 0x8c, (x) << 6) /* Control Registers */ -#define RSSR(x) __REG2( IMX_DMAC_BASE + 0x90, (x) << 6) /* Request source select Registers */ -#define BLR(x) __REG2( IMX_DMAC_BASE + 0x94, (x) << 6) /* Burst length Registers */ -#define RTOR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Request timeout Registers */ -#define BUCR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Bus Utilization Registers */ - -/* TODO: define DMA_REQ lines */ - -#define DCR_DRST (1<<1) -#define DCR_DEN (1<<0) -#define DBTOCR_EN (1<<15) -#define DBTOCR_CNT(x) ((x) & 0x7fff ) -#define CNTR_CNT(x) ((x) & 0xffffff ) -#define CCR_DMOD_LINEAR ( 0x0 << 12 ) -#define CCR_DMOD_2D ( 0x1 << 12 ) -#define CCR_DMOD_FIFO ( 0x2 << 12 ) -#define CCR_DMOD_EOBFIFO ( 0x3 << 12 ) -#define CCR_SMOD_LINEAR ( 0x0 << 10 ) -#define CCR_SMOD_2D ( 0x1 << 10 ) -#define CCR_SMOD_FIFO ( 0x2 << 10 ) -#define CCR_SMOD_EOBFIFO ( 0x3 << 10 ) -#define CCR_MDIR_DEC (1<<9) -#define CCR_MSEL_B (1<<8) -#define CCR_DSIZ_32 ( 0x0 << 6 ) -#define CCR_DSIZ_8 ( 0x1 << 6 ) -#define CCR_DSIZ_16 ( 0x2 << 6 ) -#define CCR_SSIZ_32 ( 0x0 << 4 ) -#define CCR_SSIZ_8 ( 0x1 << 4 ) -#define CCR_SSIZ_16 ( 0x2 << 4 ) -#define CCR_REN (1<<3) -#define CCR_RPT (1<<2) -#define CCR_FRC (1<<1) -#define CCR_CEN (1<<0) -#define RTOR_EN (1<<15) -#define RTOR_CLK (1<<14) -#define RTOR_PSC (1<<13) - -/* - * LCD Controller - */ - -#define LCDC_SSA __REG(IMX_LCDC_BASE+0x00) - -#define LCDC_SIZE __REG(IMX_LCDC_BASE+0x04) -#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) -#define SIZE_YMAX(y) ( (y) & 0x1ff ) - -#define LCDC_VPW __REG(IMX_LCDC_BASE+0x08) -#define VPW_VPW(x) ( (x) & 0x3ff ) - -#define LCDC_CPOS __REG(IMX_LCDC_BASE+0x0C) -#define CPOS_CC1 (1<<31) -#define CPOS_CC0 (1<<30) -#define CPOS_OP (1<<28) -#define CPOS_CXP(x) (((x) & 3ff) << 16) -#define CPOS_CYP(y) ((y) & 0x1ff) - -#define LCDC_LCWHB __REG(IMX_LCDC_BASE+0x10) -#define LCWHB_BK_EN (1<<31) -#define LCWHB_CW(w) (((w) & 0x1f) << 24) -#define LCWHB_CH(h) (((h) & 0x1f) << 16) -#define LCWHB_BD(x) ((x) & 0xff) - -#define LCDC_LCHCC __REG(IMX_LCDC_BASE+0x14) -#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) -#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) -#define LCHCC_CUR_COL_B(b) ((b) & 0x1f) - -#define LCDC_PCR __REG(IMX_LCDC_BASE+0x18) -#define PCR_TFT (1<<31) -#define PCR_COLOR (1<<30) -#define PCR_PBSIZ_1 (0<<28) -#define PCR_PBSIZ_2 (1<<28) -#define PCR_PBSIZ_4 (2<<28) -#define PCR_PBSIZ_8 (3<<28) -#define PCR_BPIX_1 (0<<25) -#define PCR_BPIX_2 (1<<25) -#define PCR_BPIX_4 (2<<25) -#define PCR_BPIX_8 (3<<25) -#define PCR_BPIX_12 (4<<25) -#define PCR_BPIX_16 (4<<25) -#define PCR_PIXPOL (1<<24) -#define PCR_FLMPOL (1<<23) -#define PCR_LPPOL (1<<22) -#define PCR_CLKPOL (1<<21) -#define PCR_OEPOL (1<<20) -#define PCR_SCLKIDLE (1<<19) -#define PCR_END_SEL (1<<18) -#define PCR_END_BYTE_SWAP (1<<17) -#define PCR_REV_VS (1<<16) -#define PCR_ACD_SEL (1<<15) -#define PCR_ACD(x) (((x) & 0x7f) << 8) -#define PCR_SCLK_SEL (1<<7) -#define PCR_SHARP (1<<6) -#define PCR_PCD(x) ((x) & 0x3f) - -#define LCDC_HCR __REG(IMX_LCDC_BASE+0x1C) -#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) -#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) -#define HCR_H_WAIT_2(x) ((x) & 0xff) - -#define LCDC_VCR __REG(IMX_LCDC_BASE+0x20) -#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) -#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) -#define VCR_V_WAIT_2(x) ((x) & 0xff) - -#define LCDC_POS __REG(IMX_LCDC_BASE+0x24) -#define POS_POS(x) ((x) & 1f) - -#define LCDC_LSCR1 __REG(IMX_LCDC_BASE+0x28) -#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) -#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) -#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) -#define LSCR1_GRAY2(x) (((x) & 0xf) << 4) -#define LSCR1_GRAY1(x) (((x) & 0xf)) - -#define LCDC_PWMR __REG(IMX_LCDC_BASE+0x2C) -#define PWMR_CLS(x) (((x) & 0x1ff) << 16) -#define PWMR_LDMSK (1<<15) -#define PWMR_SCR1 (1<<10) -#define PWMR_SCR0 (1<<9) -#define PWMR_CC_EN (1<<8) -#define PWMR_PW(x) ((x) & 0xff) - -#define LCDC_DMACR __REG(IMX_LCDC_BASE+0x30) -#define DMACR_BURST (1<<31) -#define DMACR_HM(x) (((x) & 0xf) << 16) -#define DMACR_TM(x) ((x) &0xf) - -#define LCDC_RMCR __REG(IMX_LCDC_BASE+0x34) -#define RMCR_LCDC_EN (1<<1) -#define RMCR_SELF_REF (1<<0) - -#define LCDC_LCDICR __REG(IMX_LCDC_BASE+0x38) -#define LCDICR_INT_SYN (1<<2) -#define LCDICR_INT_CON (1) - -#define LCDC_LCDISR __REG(IMX_LCDC_BASE+0x40) -#define LCDISR_UDR_ERR (1<<3) -#define LCDISR_ERR_RES (1<<2) -#define LCDISR_EOF (1<<1) -#define LCDISR_BOF (1<<0) -/* - * UART Module - */ -#define URXD0(x) __REG2( IMX_UART1_BASE + 0x0, ((x) & 1) << 12) /* Receiver Register */ -#define URTX0(x) __REG2( IMX_UART1_BASE + 0x40, ((x) & 1) << 12) /* Transmitter Register */ -#define UCR1(x) __REG2( IMX_UART1_BASE + 0x80, ((x) & 1) << 12) /* Control Register 1 */ -#define UCR2(x) __REG2( IMX_UART1_BASE + 0x84, ((x) & 1) << 12) /* Control Register 2 */ -#define UCR3(x) __REG2( IMX_UART1_BASE + 0x88, ((x) & 1) << 12) /* Control Register 3 */ -#define UCR4(x) __REG2( IMX_UART1_BASE + 0x8c, ((x) & 1) << 12) /* Control Register 4 */ -#define UFCR(x) __REG2( IMX_UART1_BASE + 0x90, ((x) & 1) << 12) /* FIFO Control Register */ -#define USR1(x) __REG2( IMX_UART1_BASE + 0x94, ((x) & 1) << 12) /* Status Register 1 */ -#define USR2(x) __REG2( IMX_UART1_BASE + 0x98, ((x) & 1) << 12) /* Status Register 2 */ -#define UESC(x) __REG2( IMX_UART1_BASE + 0x9c, ((x) & 1) << 12) /* Escape Character Register */ -#define UTIM(x) __REG2( IMX_UART1_BASE + 0xa0, ((x) & 1) << 12) /* Escape Timer Register */ -#define UBIR(x) __REG2( IMX_UART1_BASE + 0xa4, ((x) & 1) << 12) /* BRM Incremental Register */ -#define UBMR(x) __REG2( IMX_UART1_BASE + 0xa8, ((x) & 1) << 12) /* BRM Modulator Register */ -#define UBRC(x) __REG2( IMX_UART1_BASE + 0xac, ((x) & 1) << 12) /* Baud Rate Count Register */ -#define BIPR1(x) __REG2( IMX_UART1_BASE + 0xb0, ((x) & 1) << 12) /* Incremental Preset Register 1 */ -#define BIPR2(x) __REG2( IMX_UART1_BASE + 0xb4, ((x) & 1) << 12) /* Incremental Preset Register 2 */ -#define BIPR3(x) __REG2( IMX_UART1_BASE + 0xb8, ((x) & 1) << 12) /* Incremental Preset Register 3 */ -#define BIPR4(x) __REG2( IMX_UART1_BASE + 0xbc, ((x) & 1) << 12) /* Incremental Preset Register 4 */ -#define BMPR1(x) __REG2( IMX_UART1_BASE + 0xc0, ((x) & 1) << 12) /* BRM Modulator Register 1 */ -#define BMPR2(x) __REG2( IMX_UART1_BASE + 0xc4, ((x) & 1) << 12) /* BRM Modulator Register 2 */ -#define BMPR3(x) __REG2( IMX_UART1_BASE + 0xc8, ((x) & 1) << 12) /* BRM Modulator Register 3 */ -#define BMPR4(x) __REG2( IMX_UART1_BASE + 0xcc, ((x) & 1) << 12) /* BRM Modulator Register 4 */ -#define UTS(x) __REG2( IMX_UART1_BASE + 0xd0, ((x) & 1) << 12) /* UART Test Register */ - -/* UART Control Register Bit Fields.*/ -#define URXD_CHARRDY (1<<15) -#define URXD_ERR (1<<14) -#define URXD_OVRRUN (1<<13) -#define URXD_FRMERR (1<<12) -#define URXD_BRK (1<<11) -#define URXD_PRERR (1<<10) -#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ -#define UCR1_ADBR (1<<14) /* Auto detect baud rate */ -#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ -#define UCR1_IDEN (1<<12) /* Idle condition interrupt */ -#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ -#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ -#define UCR1_IREN (1<<7) /* Infrared interface enable */ -#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ -#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ -#define UCR1_SNDBRK (1<<4) /* Send break */ -#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ -#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ -#define UCR1_DOZE (1<<1) /* Doze */ -#define UCR1_UARTEN (1<<0) /* UART enabled */ -#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ -#define UCR2_IRTS (1<<14) /* Ignore RTS pin */ -#define UCR2_CTSC (1<<13) /* CTS pin control */ -#define UCR2_CTS (1<<12) /* Clear to send */ -#define UCR2_ESCEN (1<<11) /* Escape enable */ -#define UCR2_PREN (1<<8) /* Parity enable */ -#define UCR2_PROE (1<<7) /* Parity odd/even */ -#define UCR2_STPB (1<<6) /* Stop */ -#define UCR2_WS (1<<5) /* Word size */ -#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ -#define UCR2_TXEN (1<<2) /* Transmitter enabled */ -#define UCR2_RXEN (1<<1) /* Receiver enabled */ -#define UCR2_SRST (1<<0) /* SW reset */ -#define UCR3_DTREN (1<<13) /* DTR interrupt enable */ -#define UCR3_PARERREN (1<<12) /* Parity enable */ -#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ -#define UCR3_DSR (1<<10) /* Data set ready */ -#define UCR3_DCD (1<<9) /* Data carrier detect */ -#define UCR3_RI (1<<8) /* Ring indicator */ -#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ -#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ -#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ -#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ -#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ -#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ -#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ -#define UCR3_BPEN (1<<0) /* Preset registers enable */ -#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ -#define UCR4_INVR (1<<9) /* Inverted infrared reception */ -#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ -#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ -#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ -#define UCR4_IRSC (1<<5) /* IR special case */ -#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ -#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ -#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ -#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ -#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ -#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ -#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ -#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ -#define USR1_RTSS (1<<14) /* RTS pin status */ -#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ -#define USR1_RTSD (1<<12) /* RTS delta */ -#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ -#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ -#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ -#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ -#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ -#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ -#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ -#define USR2_ADET (1<<15) /* Auto baud rate detect complete */ -#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ -#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ -#define USR2_IDLE (1<<12) /* Idle condition */ -#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ -#define USR2_WAKE (1<<7) /* Wake */ -#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ -#define USR2_TXDC (1<<3) /* Transmitter complete */ -#define USR2_BRCD (1<<2) /* Break condition */ -#define USR2_ORE (1<<1) /* Overrun error */ -#define USR2_RDR (1<<0) /* Recv data ready */ -#define UTS_FRCPERR (1<<13) /* Force parity error */ -#define UTS_LOOP (1<<12) /* Loop tx and rx */ -#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ -#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ -#define UTS_TXFULL (1<<4) /* TxFIFO full */ -#define UTS_RXFULL (1<<3) /* RxFIFO full */ -#define UTS_SOFTRST (1<<0) /* Software reset */ - -/* General purpose timers registers */ -#define TCTL1 __REG(IMX_TIM1_BASE) -#define TPRER1 __REG(IMX_TIM1_BASE + 0x4) -#define TCMP1 __REG(IMX_TIM1_BASE + 0x8) -#define TCR1 __REG(IMX_TIM1_BASE + 0xc) -#define TCN1 __REG(IMX_TIM1_BASE + 0x10) -#define TSTAT1 __REG(IMX_TIM1_BASE + 0x14) -#define TCTL2 __REG(IMX_TIM2_BASE) -#define TPRER2 __REG(IMX_TIM2_BASE + 0x4) -#define TCMP2 __REG(IMX_TIM2_BASE + 0x8) -#define TCR2 __REG(IMX_TIM2_BASE + 0xc) -#define TCN2 __REG(IMX_TIM2_BASE + 0x10) -#define TSTAT2 __REG(IMX_TIM2_BASE + 0x14) - -/* General purpose timers bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<8) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (7<<1) /* Clock source */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - -#endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-ixp/ixp425.h b/arch/arm/include/asm/arch-ixp/ixp425.h deleted file mode 100644 index 2114437..0000000 --- a/arch/arm/include/asm/arch-ixp/ixp425.h +++ /dev/null @@ -1,543 +0,0 @@ -/* - * include/asm-arm/arch-ixp425/ixp425.h - * - * Register definitions for IXP425 - * - * Copyright (C) 2002 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _ASM_ARM_IXP425_H_ -#define _ASM_ARM_IXP425_H_ - -#define BIT(x) (1<<(x)) - -/* FIXME: Only this does work for u-boot... find out why... [RS] */ -#define UBOOT_REG_FIX 1 -#ifdef UBOOT_REG_FIX -# undef io_p2v -# undef __REG -# ifndef __ASSEMBLY__ -# define io_p2v(PhAdd) (PhAdd) -# define __REG(x) (*((volatile u32 *)io_p2v(x))) -# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) -# else -# define __REG(x) (x) -# endif -#endif /* UBOOT_REG_FIX */ - -/* - * - * IXP425 Memory map: - * - * Phy Phy Size Map Size Virt Description - * ========================================================================= - * - * 0x00000000 0x10000000 SDRAM 1 - * - * 0x10000000 0x10000000 SDRAM 2 - * - * 0x20000000 0x10000000 SDRAM 3 - * - * 0x30000000 0x10000000 SDRAM 4 - * - * The above four are aliases to the same memory location (0x00000000) - * - * 0x48000000 0x4000000 PCI Memory - * - * 0x50000000 0x10000000 Not Mapped EXP BUS - * - * 0x6000000 0x00004000 0x4000 0xFFFEB000 QMgr - * - * 0xC0000000 0x100 0x1000 0xFFFDD000 PCI CFG - * - * 0xC4000000 0x100 0x1000 0xFFFDE000 EXP CFG - * - * 0xC8000000 0xC000 0xC000 0xFFFDF000 PERIPHERAL - * - * 0xCC000000 0x100 0x1000 Not Mapped SDRAM CFG - */ - -/* - * SDRAM - */ -#define IXP425_SDRAM_BASE (0x00000000) -#define IXP425_SDRAM_BASE_ALT (0x10000000) - - -/* - * PCI Configuration space - */ -#define IXP425_PCI_CFG_BASE_PHYS (0xC0000000) -#define IXP425_PCI_CFG_REGION_SIZE (0x00001000) - -/* - * Expansion BUS Configuration registers - */ -#define IXP425_EXP_CFG_BASE_PHYS (0xC4000000) -#define IXP425_EXP_CFG_REGION_SIZE (0x00001000) - -/* - * Peripheral space - */ -#define IXP425_PERIPHERAL_BASE_PHYS (0xC8000000) -#define IXP425_PERIPHERAL_REGION_SIZE (0x0000C000) - -/* - * SDRAM configuration registers - */ -#define IXP425_SDRAM_CFG_BASE_PHYS (0xCC000000) - -/* - * Q Manager space .. not static mapped - */ -#define IXP425_QMGR_BASE_PHYS (0x60000000) -#define IXP425_QMGR_REGION_SIZE (0x00004000) - -/* - * Expansion BUS - * - * Expansion Bus 'lives' at either base1 or base 2 depending on the value of - * Exp Bus config registers: - * - * Setting bit 31 of IXP425_EXP_CFG0 puts SDRAM at zero, - * and The expansion bus to IXP425_EXP_BUS_BASE2 - */ -#define IXP425_EXP_BUS_BASE1_PHYS (0x00000000) -#define IXP425_EXP_BUS_BASE2_PHYS (0x50000000) - -#define IXP425_EXP_BUS_BASE_PHYS IXP425_EXP_BUS_BASE2_PHYS - -#define IXP425_EXP_BUS_REGION_SIZE (0x08000000) -#define IXP425_EXP_BUS_CSX_REGION_SIZE (0x01000000) - -#define IXP425_EXP_BUS_CS0_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x00000000) -#define IXP425_EXP_BUS_CS1_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x01000000) -#define IXP425_EXP_BUS_CS2_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x02000000) -#define IXP425_EXP_BUS_CS3_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x03000000) -#define IXP425_EXP_BUS_CS4_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x04000000) -#define IXP425_EXP_BUS_CS5_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x05000000) -#define IXP425_EXP_BUS_CS6_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x06000000) -#define IXP425_EXP_BUS_CS7_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x07000000) - -#define IXP425_FLASH_WRITABLE (0x2) -#define IXP425_FLASH_DEFAULT (0xbcd23c40) -#define IXP425_FLASH_WRITE (0xbcd23c42) - -#define IXP425_EXP_CS0_OFFSET 0x00 -#define IXP425_EXP_CS1_OFFSET 0x04 -#define IXP425_EXP_CS2_OFFSET 0x08 -#define IXP425_EXP_CS3_OFFSET 0x0C -#define IXP425_EXP_CS4_OFFSET 0x10 -#define IXP425_EXP_CS5_OFFSET 0x14 -#define IXP425_EXP_CS6_OFFSET 0x18 -#define IXP425_EXP_CS7_OFFSET 0x1C -#define IXP425_EXP_CFG0_OFFSET 0x20 -#define IXP425_EXP_CFG1_OFFSET 0x24 -#define IXP425_EXP_CFG2_OFFSET 0x28 -#define IXP425_EXP_CFG3_OFFSET 0x2C - -/* - * Expansion Bus Controller registers. - */ -#ifndef __ASSEMBLY__ -#define IXP425_EXP_REG(x) ((volatile u32 *)(IXP425_EXP_CFG_BASE_PHYS+(x))) -#else -#define IXP425_EXP_REG(x) (IXP425_EXP_CFG_BASE_PHYS+(x)) -#endif - -#define IXP425_EXP_CS0 IXP425_EXP_REG(IXP425_EXP_CS0_OFFSET) -#define IXP425_EXP_CS1 IXP425_EXP_REG(IXP425_EXP_CS1_OFFSET) -#define IXP425_EXP_CS2 IXP425_EXP_REG(IXP425_EXP_CS2_OFFSET) -#define IXP425_EXP_CS3 IXP425_EXP_REG(IXP425_EXP_CS3_OFFSET) -#define IXP425_EXP_CS4 IXP425_EXP_REG(IXP425_EXP_CS4_OFFSET) -#define IXP425_EXP_CS5 IXP425_EXP_REG(IXP425_EXP_CS5_OFFSET) -#define IXP425_EXP_CS6 IXP425_EXP_REG(IXP425_EXP_CS6_OFFSET) -#define IXP425_EXP_CS7 IXP425_EXP_REG(IXP425_EXP_CS7_OFFSET) - -#define IXP425_EXP_CFG0 IXP425_EXP_REG(IXP425_EXP_CFG0_OFFSET) -#define IXP425_EXP_CFG1 IXP425_EXP_REG(IXP425_EXP_CFG1_OFFSET) -#define IXP425_EXP_CFG2 IXP425_EXP_REG(IXP425_EXP_CFG2_OFFSET) -#define IXP425_EXP_CFG3 IXP425_EXP_REG(IXP425_EXP_CFG3_OFFSET) - -/* - * SDRAM Controller registers. - */ -#define IXP425_SDR_CONFIG_OFFSET 0x00 -#define IXP425_SDR_REFRESH_OFFSET 0x04 -#define IXP425_SDR_IR_OFFSET 0x08 - -#define IXP425_SDRAM_REG(x) (IXP425_SDRAM_CFG_BASE_PHYS+(x)) - -#define IXP425_SDR_CONFIG IXP425_SDRAM_REG(IXP425_SDR_CONFIG_OFFSET) -#define IXP425_SDR_REFRESH IXP425_SDRAM_REG(IXP425_SDR_REFRESH_OFFSET) -#define IXP425_SDR_IR IXP425_SDRAM_REG(IXP425_SDR_IR_OFFSET) - -/* - * UART registers - */ -#define IXP425_UART1 0 -#define IXP425_UART2 0x1000 - -#define IXP425_UART_RBR_OFFSET 0x00 -#define IXP425_UART_THR_OFFSET 0x00 -#define IXP425_UART_DLL_OFFSET 0x00 -#define IXP425_UART_IER_OFFSET 0x04 -#define IXP425_UART_DLH_OFFSET 0x04 -#define IXP425_UART_IIR_OFFSET 0x08 -#define IXP425_UART_FCR_OFFSET 0x00 -#define IXP425_UART_LCR_OFFSET 0x0c -#define IXP425_UART_MCR_OFFSET 0x10 -#define IXP425_UART_LSR_OFFSET 0x14 -#define IXP425_UART_MSR_OFFSET 0x18 -#define IXP425_UART_SPR_OFFSET 0x1c -#define IXP425_UART_ISR_OFFSET 0x20 - -#define IXP425_UART_CFG_BASE_PHYS (0xc8000000) - -#define RBR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_RBR_OFFSET) -#define THR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_THR_OFFSET) -#define DLL(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_DLL_OFFSET) -#define IER(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_IER_OFFSET) -#define DLH(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_DLH_OFFSET) -#define IIR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_IIR_OFFSET) -#define FCR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_FCR_OFFSET) -#define LCR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_LCR_OFFSET) -#define MCR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_MCR_OFFSET) -#define LSR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_LSR_OFFSET) -#define MSR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_MSR_OFFSET) -#define SPR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_SPR_OFFSET) -#define ISR(x) __REG(IXP425_UART_CFG_BASE_PHYS+(x)+IXP425_UART_ISR_OFFSET) - -#define IER_DMAE (1 << 7) /* DMA Requests Enable */ -#define IER_UUE (1 << 6) /* UART Unit Enable */ -#define IER_NRZE (1 << 5) /* NRZ coding Enable */ -#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */ -#define IER_MIE (1 << 3) /* Modem Interrupt Enable */ -#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */ -#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */ -#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */ - -#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */ -#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */ -#define IIR_TOD (1 << 3) /* Time Out Detected */ -#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */ -#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */ -#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */ - -#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */ -#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */ -#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */ -#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */ -#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */ -#define FCR_ITL_1 (0) -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */ -#define LCR_SB (1 << 6) /* Set Break */ -#define LCR_STKYP (1 << 5) /* Sticky Parity */ -#define LCR_EPS (1 << 4) /* Even Parity Select */ -#define LCR_PEN (1 << 3) /* Parity Enable */ -#define LCR_STB (1 << 2) /* Stop Bit */ -#define LCR_WLS1 (1 << 1) /* Word Length Select */ -#define LCR_WLS0 (1 << 0) /* Word Length Select */ - -#define LSR_FIFOE (1 << 7) /* FIFO Error Status */ -#define LSR_TEMT (1 << 6) /* Transmitter Empty */ -#define LSR_TDRQ (1 << 5) /* Transmit Data Request */ -#define LSR_BI (1 << 4) /* Break Interrupt */ -#define LSR_FE (1 << 3) /* Framing Error */ -#define LSR_PE (1 << 2) /* Parity Error */ -#define LSR_OE (1 << 1) /* Overrun Error */ -#define LSR_DR (1 << 0) /* Data Ready */ - -#define MCR_LOOP (1 << 4) */ -#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */ -#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */ -#define MCR_RTS (1 << 1) /* Request to Send */ -#define MCR_DTR (1 << 0) /* Data Terminal Ready */ - -#define MSR_DCD (1 << 7) /* Data Carrier Detect */ -#define MSR_RI (1 << 6) /* Ring Indicator */ -#define MSR_DSR (1 << 5) /* Data Set Ready */ -#define MSR_CTS (1 << 4) /* Clear To Send */ -#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */ -#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */ -#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */ -#define MSR_DCTS (1 << 0) /* Delta Clear To Send */ - -#define IXP425_CONSOLE_UART_BASE_PHYS IXP425_UART1_BASE_PHYS -/* - * Peripheral Space Registers - */ -#define IXP425_UART1_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x0000) -#define IXP425_UART2_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x1000) -#define IXP425_PMU_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x2000) -#define IXP425_INTC_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x3000) -#define IXP425_GPIO_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x4000) -#define IXP425_TIMER_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x5000) -#define IXP425_NPEA_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x6000) -#define IXP425_NPEB_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x7000) -#define IXP425_NPEC_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x8000) -#define IXP425_EthA_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0x9000) -#define IXP425_EthB_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0xA000) -#define IXP425_USB_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0xB000) - -/* - * UART Register Definitions , Offsets only as there are 2 UARTS. - * IXP425_UART1_BASE , IXP425_UART2_BASE. - */ - -#undef UART_NO_RX_INTERRUPT - -#define IXP425_UART_XTAL 14745600 - -/* - * Constants to make it easy to access Interrupt Controller registers - */ -#define IXP425_ICPR_OFFSET 0x00 /* Interrupt Status */ -#define IXP425_ICMR_OFFSET 0x04 /* Interrupt Enable */ -#define IXP425_ICLR_OFFSET 0x08 /* Interrupt IRQ/FIQ Select */ -#define IXP425_ICIP_OFFSET 0x0C /* IRQ Status */ -#define IXP425_ICFP_OFFSET 0x10 /* FIQ Status */ -#define IXP425_ICHR_OFFSET 0x14 /* Interrupt Priority */ -#define IXP425_ICIH_OFFSET 0x18 /* IRQ Highest Pri Int */ -#define IXP425_ICFH_OFFSET 0x1C /* FIQ Highest Pri Int */ - -#define N_IRQS 32 -#define IXP425_TIMER_2_IRQ 11 - -/* - * Interrupt Controller Register Definitions. - */ -#ifndef __ASSEMBLY__ -#define IXP425_INTC_REG(x) ((volatile u32 *)(IXP425_INTC_BASE_PHYS+(x))) -#else -#define IXP425_INTC_REG(x) (IXP425_INTC_BASE_PHYS+(x)) -#endif - -#define IXP425_ICPR IXP425_INTC_REG(IXP425_ICPR_OFFSET) -#define IXP425_ICMR IXP425_INTC_REG(IXP425_ICMR_OFFSET) -#define IXP425_ICLR IXP425_INTC_REG(IXP425_ICLR_OFFSET) -#define IXP425_ICIP IXP425_INTC_REG(IXP425_ICIP_OFFSET) -#define IXP425_ICFP IXP425_INTC_REG(IXP425_ICFP_OFFSET) -#define IXP425_ICHR IXP425_INTC_REG(IXP425_ICHR_OFFSET) -#define IXP425_ICIH IXP425_INTC_REG(IXP425_ICIH_OFFSET) -#define IXP425_ICFH IXP425_INTC_REG(IXP425_ICFH_OFFSET) - -/* - * Constants to make it easy to access GPIO registers - */ -#define IXP425_GPIO_GPOUTR_OFFSET 0x00 -#define IXP425_GPIO_GPOER_OFFSET 0x04 -#define IXP425_GPIO_GPINR_OFFSET 0x08 -#define IXP425_GPIO_GPISR_OFFSET 0x0C -#define IXP425_GPIO_GPIT1R_OFFSET 0x10 -#define IXP425_GPIO_GPIT2R_OFFSET 0x14 -#define IXP425_GPIO_GPCLKR_OFFSET 0x18 -#define IXP425_GPIO_GPDBSELR_OFFSET 0x1C - -/* - * GPIO Register Definitions. - * [Only perform 32bit reads/writes] - */ -#define IXP425_GPIO_REG(x) ((volatile u32 *)(IXP425_GPIO_BASE_PHYS+(x))) - -#define IXP425_GPIO_GPOUTR IXP425_GPIO_REG(IXP425_GPIO_GPOUTR_OFFSET) -#define IXP425_GPIO_GPOER IXP425_GPIO_REG(IXP425_GPIO_GPOER_OFFSET) -#define IXP425_GPIO_GPINR IXP425_GPIO_REG(IXP425_GPIO_GPINR_OFFSET) -#define IXP425_GPIO_GPISR IXP425_GPIO_REG(IXP425_GPIO_GPISR_OFFSET) -#define IXP425_GPIO_GPIT1R IXP425_GPIO_REG(IXP425_GPIO_GPIT1R_OFFSET) -#define IXP425_GPIO_GPIT2R IXP425_GPIO_REG(IXP425_GPIO_GPIT2R_OFFSET) -#define IXP425_GPIO_GPCLKR IXP425_GPIO_REG(IXP425_GPIO_GPCLKR_OFFSET) -#define IXP425_GPIO_GPDBSELR IXP425_GPIO_REG(IXP425_GPIO_GPDBSELR_OFFSET) - -/* - * Macros to make it easy to access the GPIO registers - */ -#define GPIO_OUTPUT_ENABLE(line) *IXP425_GPIO_GPOER &= ~(1 << (line)) -#define GPIO_OUTPUT_DISABLE(line) *IXP425_GPIO_GPOER |= (1 << (line)) -#define GPIO_OUTPUT_SET(line) *IXP425_GPIO_GPOUTR |= (1 << (line)) -#define GPIO_OUTPUT_CLEAR(line) *IXP425_GPIO_GPOUTR &= ~(1 << (line)) -#define GPIO_INT_ACT_LOW_SET(line) *IXP425_GPIO_GPIT1R = \ - (*IXP425_GPIO_GPIT1R & ~(0x7 << (line * 3))) | (0x1 << (line * 3)) - -/* - * Constants to make it easy to access Timer Control/Status registers - */ -#define IXP425_OSTS_OFFSET 0x00 /* Continious TimeStamp */ -#define IXP425_OST1_OFFSET 0x04 /* Timer 1 Timestamp */ -#define IXP425_OSRT1_OFFSET 0x08 /* Timer 1 Reload */ -#define IXP425_OST2_OFFSET 0x0C /* Timer 2 Timestamp */ -#define IXP425_OSRT2_OFFSET 0x10 /* Timer 2 Reload */ -#define IXP425_OSWT_OFFSET 0x14 /* Watchdog Timer */ -#define IXP425_OSWE_OFFSET 0x18 /* Watchdog Enable */ -#define IXP425_OSWK_OFFSET 0x1C /* Watchdog Key */ -#define IXP425_OSST_OFFSET 0x20 /* Timer Status */ - -/* - * Operating System Timer Register Definitions. - */ - -#ifndef __ASSEMBLY__ -#define IXP425_TIMER_REG(x) ((volatile u32 *)(IXP425_TIMER_BASE_PHYS+(x))) -#else -#define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x)) -#endif - -#if 0 /* test-only: also defined in npe/include/... */ -#define IXP425_OSTS IXP425_TIMER_REG(IXP425_OSTS_OFFSET) -#endif -#define IXP425_OST1 IXP425_TIMER_REG(IXP425_OST1_OFFSET) -#define IXP425_OSRT1 IXP425_TIMER_REG(IXP425_OSRT1_OFFSET) -#define IXP425_OST2 IXP425_TIMER_REG(IXP425_OST2_OFFSET) -#define IXP425_OSRT2 IXP425_TIMER_REG(IXP425_OSRT2_OFFSET) -#define IXP425_OSWT IXP425_TIMER_REG(IXP425_OSWT_OFFSET) -#define IXP425_OSWE IXP425_TIMER_REG(IXP425_OSWE_OFFSET) -#define IXP425_OSWK IXP425_TIMER_REG(IXP425_OSWK_OFFSET) -#define IXP425_OSST IXP425_TIMER_REG(IXP425_OSST_OFFSET) - -/* - * Timer register values and bit definitions - */ -#define IXP425_OST_ENABLE BIT(0) -#define IXP425_OST_ONE_SHOT BIT(1) -/* Low order bits of reload value ignored */ -#define IXP425_OST_RELOAD_MASK (0x3) -#define IXP425_OST_DISABLED (0x0) -#define IXP425_OSST_TIMER_1_PEND BIT(0) -#define IXP425_OSST_TIMER_2_PEND BIT(1) -#define IXP425_OSST_TIMER_TS_PEND BIT(2) -#define IXP425_OSST_TIMER_WDOG_PEND BIT(3) -#define IXP425_OSST_TIMER_WARM_RESET BIT(4) - -/* - * Constants to make it easy to access PCI Control/Status registers - */ -#define PCI_NP_AD_OFFSET 0x00 -#define PCI_NP_CBE_OFFSET 0x04 -#define PCI_NP_WDATA_OFFSET 0x08 -#define PCI_NP_RDATA_OFFSET 0x0c -#define PCI_CRP_AD_CBE_OFFSET 0x10 -#define PCI_CRP_WDATA_OFFSET 0x14 -#define PCI_CRP_RDATA_OFFSET 0x18 -#define PCI_CSR_OFFSET 0x1c -#define PCI_ISR_OFFSET 0x20 -#define PCI_INTEN_OFFSET 0x24 -#define PCI_DMACTRL_OFFSET 0x28 -#define PCI_AHBMEMBASE_OFFSET 0x2c -#define PCI_AHBIOBASE_OFFSET 0x30 -#define PCI_PCIMEMBASE_OFFSET 0x34 -#define PCI_AHBDOORBELL_OFFSET 0x38 -#define PCI_PCIDOORBELL_OFFSET 0x3C -#define PCI_ATPDMA0_AHBADDR_OFFSET 0x40 -#define PCI_ATPDMA0_PCIADDR_OFFSET 0x44 -#define PCI_ATPDMA0_LENADDR_OFFSET 0x48 -#define PCI_ATPDMA1_AHBADDR_OFFSET 0x4C -#define PCI_ATPDMA1_PCIADDR_OFFSET 0x50 -#define PCI_ATPDMA1_LENADDR_OFFSET 0x54 - -/* - * PCI Control/Status Registers - */ -#define IXP425_PCI_CSR(x) ((volatile u32 *)(IXP425_PCI_CFG_BASE_PHYS+(x))) - -#define PCI_NP_AD IXP425_PCI_CSR(PCI_NP_AD_OFFSET) -#define PCI_NP_CBE IXP425_PCI_CSR(PCI_NP_CBE_OFFSET) -#define PCI_NP_WDATA IXP425_PCI_CSR(PCI_NP_WDATA_OFFSET) -#define PCI_NP_RDATA IXP425_PCI_CSR(PCI_NP_RDATA_OFFSET) -#define PCI_CRP_AD_CBE IXP425_PCI_CSR(PCI_CRP_AD_CBE_OFFSET) -#define PCI_CRP_WDATA IXP425_PCI_CSR(PCI_CRP_WDATA_OFFSET) -#define PCI_CRP_RDATA IXP425_PCI_CSR(PCI_CRP_RDATA_OFFSET) -#define PCI_CSR IXP425_PCI_CSR(PCI_CSR_OFFSET) -#define PCI_ISR IXP425_PCI_CSR(PCI_ISR_OFFSET) -#define PCI_INTEN IXP425_PCI_CSR(PCI_INTEN_OFFSET) -#define PCI_DMACTRL IXP425_PCI_CSR(PCI_DMACTRL_OFFSET) -#define PCI_AHBMEMBASE IXP425_PCI_CSR(PCI_AHBMEMBASE_OFFSET) -#define PCI_AHBIOBASE IXP425_PCI_CSR(PCI_AHBIOBASE_OFFSET) -#define PCI_PCIMEMBASE IXP425_PCI_CSR(PCI_PCIMEMBASE_OFFSET) -#define PCI_AHBDOORBELL IXP425_PCI_CSR(PCI_AHBDOORBELL_OFFSET) -#define PCI_PCIDOORBELL IXP425_PCI_CSR(PCI_PCIDOORBELL_OFFSET) -#define PCI_ATPDMA0_AHBADDR IXP425_PCI_CSR(PCI_ATPDMA0_AHBADDR_OFFSET) -#define PCI_ATPDMA0_PCIADDR IXP425_PCI_CSR(PCI_ATPDMA0_PCIADDR_OFFSET) -#define PCI_ATPDMA0_LENADDR IXP425_PCI_CSR(PCI_ATPDMA0_LENADDR_OFFSET) -#define PCI_ATPDMA1_AHBADDR IXP425_PCI_CSR(PCI_ATPDMA1_AHBADDR_OFFSET) -#define PCI_ATPDMA1_PCIADDR IXP425_PCI_CSR(PCI_ATPDMA1_PCIADDR_OFFSET) -#define PCI_ATPDMA1_LENADDR IXP425_PCI_CSR(PCI_ATPDMA1_LENADDR_OFFSET) - -/* - * PCI register values and bit definitions - */ - -/* CSR bit definitions */ -#define PCI_CSR_HOST BIT(0) -#define PCI_CSR_ARBEN BIT(1) -#define PCI_CSR_ADS BIT(2) -#define PCI_CSR_PDS BIT(3) -#define PCI_CSR_ABE BIT(4) -#define PCI_CSR_DBT BIT(5) -#define PCI_CSR_ASE BIT(8) -#define PCI_CSR_IC BIT(15) - -/* ISR (Interrupt status) Register bit definitions */ -#define PCI_ISR_PSE BIT(0) -#define PCI_ISR_PFE BIT(1) -#define PCI_ISR_PPE BIT(2) -#define PCI_ISR_AHBE BIT(3) -#define PCI_ISR_APDC BIT(4) -#define PCI_ISR_PADC BIT(5) -#define PCI_ISR_ADB BIT(6) -#define PCI_ISR_PDB BIT(7) - -/* INTEN (Interrupt Enable) Register bit definitions */ -#define PCI_INTEN_PSE BIT(0) -#define PCI_INTEN_PFE BIT(1) -#define PCI_INTEN_PPE BIT(2) -#define PCI_INTEN_AHBE BIT(3) -#define PCI_INTEN_APDC BIT(4) -#define PCI_INTEN_PADC BIT(5) -#define PCI_INTEN_ADB BIT(6) -#define PCI_INTEN_PDB BIT(7) - -/* - * Shift value for byte enable on NP cmd/byte enable register - */ -#define IXP425_PCI_NP_CBE_BESL 4 - -/* - * PCI commands supported by NP access unit - */ -#define NP_CMD_IOREAD 0x2 -#define NP_CMD_IOWRITE 0x3 -#define NP_CMD_CONFIGREAD 0xa -#define NP_CMD_CONFIGWRITE 0xb -#define NP_CMD_MEMREAD 0x6 -#define NP_CMD_MEMWRITE 0x7 - -#if 0 -#ifndef __ASSEMBLY__ -extern int ixp425_pci_read(u32 addr, u32 cmd, u32* data); -extern int ixp425_pci_write(u32 addr, u32 cmd, u32 data); -extern void ixp425_pci_init(void *); -#endif -#endif - -/* - * Constants for CRP access into local config space - */ -#define CRP_AD_CBE_BESL 20 -#define CRP_AD_CBE_WRITE BIT(16) - -/* - * Clock Speed Definitions. - */ -#define IXP425_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */ - - -#endif diff --git a/arch/arm/include/asm/arch-ixp/ixp425pci.h b/arch/arm/include/asm/arch-ixp/ixp425pci.h deleted file mode 100644 index 9ea3319..0000000 --- a/arch/arm/include/asm/arch-ixp/ixp425pci.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * IXP PCI Init - * (C) Copyright 2004 eslab.whut.edu.cn - * Yue Hu(huyue_whut@yahoo.com.cn), Ligong Xue(lgxue@hotmail.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _IXP425PCI_H_ -#define _IXP425PCI_H_ - -#define TRUE 1 -#define FALSE 0 -#define OK 0 -#define ERROR -1 -#define BOOL int - -#define IXP425_PCI_MAX_BAR_PER_FUNC 6 -#define IXP425_PCI_MAX_BAR (IXP425_PCI_MAX_BAR_PER_FUNC * \ - IXP425_PCI_MAX_FUNC_ON_BUS) - -enum PciBarId -{ - CSR_BAR=0, - IO_BAR, - SD_BAR, - NO_BAR -}; - -/*Base address register descriptor*/ -typedef struct -{ - unsigned int size; - unsigned int address; -} PciBar; - -typedef struct -{ - unsigned int bus; - unsigned int device; - unsigned int func; - unsigned int irq; - BOOL error; - unsigned short vendor_id; - unsigned short device_id; - /*We need an extra entry in this array for dummy placeholder*/ - PciBar bar[IXP425_PCI_MAX_BAR_PER_FUNC + 1]; -} PciDevice; - -/* Mask definitions*/ -#define IXP425_PCI_TOP_WORD_OF_LONG_MASK 0xffff0000 -#define IXP425_PCI_TOP_BYTE_OF_LONG_MASK 0xff000000 -#define IXP425_PCI_BOTTOM_WORD_OF_LONG_MASK 0x0000ffff -#define IXP425_PCI_BOTTOM_TRIBYTES_OF_LONG_MASK 0x00ffffff -#define IXP425_PCI_BOTTOM_NIBBLE_OF_LONG_MASK 0x0000000f -#define IXP425_PCI_MAX_UINT32 0xffffffff - - -#define IXP425_PCI_BAR_QUERY 0xffffffff - -#define IXP425_PCI_BAR_MEM_BASE 0x100000 -#define IXP425_PCI_BAR_IO_BASE 0x000000 - -/*define the maximum number of bus segments - we support a single segment*/ -#define IXP425_PCI_MAX_BUS 1 -/*define the maximum number of cards per bus segment*/ -#define IXP425_PCI_MAX_DEV 4 -/*define the maximum number of functions per device*/ -#define IXP425_PCI_MAX_FUNC 8 -/* define the maximum number of separate functions that we can - potentially have on the bus*/ -#define IXP425_PCI_MAX_FUNC_ON_BUS (1+ IXP425_PCI_MAX_FUNC * \ - IXP425_PCI_MAX_DEV * \ - IXP425_PCI_MAX_BUS) -/*define the maximum number of BARs per function*/ -#define IXP425_PCI_MAX_BAR_PER_FUNC 6 -#define IXP425_PCI_MAX_BAR (IXP425_PCI_MAX_BAR_PER_FUNC * \ - IXP425_PCI_MAX_FUNC_ON_BUS) - -#define PCI_NP_CBE_BESL (4) -#define PCI_NP_AD_FUNCSL (8) - -#define REG_WRITE(b,o,v) (*(volatile unsigned int*)((b+o))=(v)) -#define REG_READ(b,o,v) ((v)=(*(volatile unsigned int*)((b+o)))) - -#define PCI_DELAY 500 -#define USEC_LOOP_COUNT 533 -#define PCI_SETTLE_USEC 200 -#define PCI_MIN_RESET_ASSERT_USEC 2000 - -/*Register addressing definitions for PCI controller configuration - and status registers*/ - -#define PCI_CSR_BASE (0xC0000000) -/* -#define PCI_NP_AD_OFFSET (0x00) -#define PCI_NP_CBE_OFFSET (0x04) -#define PCI_NP_WDATA_OFFSET (0x08) -#define PCI_NP_RDATA_OFFSET (0x0C) -#define PCI_CRP_OFFSET (0x10) -#define PCI_CRP_WDATA_OFFSET (0x14) -#define PCI_CRP_RDATA_OFFSET (0x18) -#define PCI_CSR_OFFSET (0x1C) -#define PCI_ISR_OFFSET (0x20) -#define PCI_INTEN_OFFSET (0x24) -#define PCI_DMACTRL_OFFSET (0x28) -#define PCI_AHBMEMBASE_OFFSET (0x2C) -#define PCI_AHBIOBASE_OFFSET (0x30) -#define PCI_PCIMEMBASE_OFFSET (0x34) -#define PCI_AHBDOORBELL_OFFSET (0x38) -#define PCI_PCIDOORBELL_OFFSET (0x3C) -#define PCI_ATPDMA0_AHBADDR (0x40) -#define PCI_ATPDMA0_PCIADDR (0x44) -#define PCI_ATPDMA0_LENADDR (0x48) -#define PCI_ATPDMA1_AHBADDR (0x4C) -#define PCI_ATPDMA1_PCIADDR (0x50) -#define PCI_ATPDMA1_LENADDR (0x54) -#define PCI_PTADMA0_AHBADDR (0x58) -#define PCI_PTADMA0_PCIADDR (0x5C) -#define PCI_PTADMA0_LENADDR (0x60) -#define PCI_PTADMA1_AHBADDR (0x64) -#define PCI_PTADMA1_PCIADDR (0x68) -#define PCI_PTADMA1_LENADDR (0x6C) -*/ -/*Non prefetch registers bit definitions*/ -/* -#define NP_CMD_INTACK (0x0) -#define NP_CMD_SPECIAL (0x1) -#define NP_CMD_IOREAD (0x2) -#define NP_CMD_IOWRITE (0x3) -#define NP_CMD_MEMREAD (0x6) -#define NP_CMD_MEMWRITE (0x7) -#define NP_CMD_CONFIGREAD (0xa) -#define NP_CMD_CONFIGWRITE (0xb) -*/ - -/*define the default setting of the AHB memory base reg*/ -#define IXP425_PCI_AHBMEMBASE_DEFAULT 0x00010203 -#define IXP425_PCI_AHBIOBASE_DEFAULT 0x0 -#define IXP425_PCI_PCIMEMBASE_DEFAULT 0x0 - -/*define the default settings for the controller's BARs*/ -#ifdef IXP425_PCI_SIMPLE_MAPPING -#define IXP425_PCI_BAR_0_DEFAULT 0x00000000 -#define IXP425_PCI_BAR_1_DEFAULT 0x01000000 -#define IXP425_PCI_BAR_2_DEFAULT 0x02000000 -#define IXP425_PCI_BAR_3_DEFAULT 0x03000000 -#define IXP425_PCI_BAR_4_DEFAULT 0x00000000 -#define IXP425_PCI_BAR_5_DEFAULT 0x00000000 -#else -#define IXP425_PCI_BAR_0_DEFAULT 0x40000000 -#define IXP425_PCI_BAR_1_DEFAULT 0x41000000 -#define IXP425_PCI_BAR_2_DEFAULT 0x42000000 -#define IXP425_PCI_BAR_3_DEFAULT 0x43000000 -#define IXP425_PCI_BAR_4_DEFAULT 0x00000000 -#define IXP425_PCI_BAR_5_DEFAULT 0x00000000 -#endif - -/*Configuration Port register bit definitions*/ -#define PCI_CRP_WRITE BIT(16) - -/*ISR (Interrupt status) Register bit definitions*/ -#define PCI_ISR_PSE BIT(0) -#define PCI_ISR_PFE BIT(1) -#define PCI_ISR_PPE BIT(2) -#define PCI_ISR_AHBE BIT(3) -#define PCI_ISR_APDC BIT(4) -#define PCI_ISR_PADC BIT(5) -#define PCI_ISR_ADB BIT(6) -#define PCI_ISR_PDB BIT(7) - -/*INTEN (Interrupt Enable) Register bit definitions*/ -#define PCI_INTEN_PSE BIT(0) -#define PCI_INTEN_PFE BIT(1) -#define PCI_INTEN_PPE BIT(2) -#define PCI_INTEN_AHBE BIT(3) -#define PCI_INTEN_APDC BIT(4) -#define PCI_INTEN_PADC BIT(5) -#define PCI_INTEN_ADB BIT(6) -#define PCI_INTEN_PDB BIT(7) - -/*PCI configuration regs.*/ - -#define PCI_CFG_VENDOR_ID 0x00 -#define PCI_CFG_DEVICE_ID 0x02 -#define PCI_CFG_COMMAND 0x04 -#define PCI_CFG_STATUS 0x06 -#define PCI_CFG_REVISION 0x08 -#define PCI_CFG_PROGRAMMING_IF 0x09 -#define PCI_CFG_SUBCLASS 0x0a -#define PCI_CFG_CLASS 0x0b -#define PCI_CFG_CACHE_LINE_SIZE 0x0c -#define PCI_CFG_LATENCY_TIMER 0x0d -#define PCI_CFG_HEADER_TYPE 0x0e -#define PCI_CFG_BIST 0x0f -#define PCI_CFG_BASE_ADDRESS_0 0x10 -#define PCI_CFG_BASE_ADDRESS_1 0x14 -#define PCI_CFG_BASE_ADDRESS_2 0x18 -#define PCI_CFG_BASE_ADDRESS_3 0x1c -#define PCI_CFG_BASE_ADDRESS_4 0x20 -#define PCI_CFG_BASE_ADDRESS_5 0x24 -#define PCI_CFG_CIS 0x28 -#define PCI_CFG_SUB_VENDOR_ID 0x2c -#define PCI_CFG_SUB_SYSTEM_ID 0x2e -#define PCI_CFG_EXPANSION_ROM 0x30 -#define PCI_CFG_RESERVED_0 0x34 -#define PCI_CFG_RESERVED_1 0x38 -#define PCI_CFG_DEV_INT_LINE 0x3c -#define PCI_CFG_DEV_INT_PIN 0x3d -#define PCI_CFG_MIN_GRANT 0x3e -#define PCI_CFG_MAX_LATENCY 0x3f -#define PCI_CFG_SPECIAL_USE 0x41 -#define PCI_CFG_MODE 0x43 - -/*Specify the initial command we send to PCI devices*/ -#define INITIAL_PCI_CMD (PCI_CMD_IO_ENABLE \ - | PCI_CMD_MEM_ENABLE \ - | PCI_CMD_MASTER_ENABLE \ - | PCI_CMD_WI_ENABLE) - -/*define the sub vendor and subsystem to be used */ -#define IXP425_PCI_SUB_VENDOR_SYSTEM 0x00000000 - -#define PCI_IRQ_LINES 4 - -#define PCI_CMD_IO_ENABLE 0x0001 /* IO access enable */ -#define PCI_CMD_MEM_ENABLE 0x0002 /* memory access enable */ -#define PCI_CMD_MASTER_ENABLE 0x0004 /* bus master enable */ -#define PCI_CMD_MON_ENABLE 0x0008 /* monitor special cycles enable */ -#define PCI_CMD_WI_ENABLE 0x0010 /* write and invalidate enable */ -#define PCI_CMD_SNOOP_ENABLE 0x0020 /* palette snoop enable */ -#define PCI_CMD_PERR_ENABLE 0x0040 /* parity error enable */ -#define PCI_CMD_WC_ENABLE 0x0080 /* wait cycle enable */ -#define PCI_CMD_SERR_ENABLE 0x0100 /* system error enable */ -#define PCI_CMD_FBTB_ENABLE 0x0200 /* fast back to back enable */ - - -/*CSR Register bit definitions*/ -#define PCI_CSR_HOST BIT(0) -#define PCI_CSR_ARBEN BIT(1) -#define PCI_CSR_ADS BIT(2) -#define PCI_CSR_PDS BIT(3) -#define PCI_CSR_ABE BIT(4) -#define PCI_CSR_DBT BIT(5) -#define PCI_CSR_ASE BIT(8) -#define PCI_CSR_IC BIT(15) - -/*Configuration command bit definitions*/ -#define PCI_CFG_CMD_IOAE BIT(0) -#define PCI_CFG_CMD_MAE BIT(1) -#define PCI_CFG_CMD_BME BIT(2) -#define PCI_CFG_CMD_MWIE BIT(4) -#define PCI_CFG_CMD_SER BIT(8) -#define PCI_CFG_CMD_FBBE BIT(9) -#define PCI_CFG_CMD_MDPE BIT(24) -#define PCI_CFG_CMD_STA BIT(27) -#define PCI_CFG_CMD_RTA BIT(28) -#define PCI_CFG_CMD_RMA BIT(29) -#define PCI_CFG_CMD_SSE BIT(30) -#define PCI_CFG_CMD_DPE BIT(31) - -/*DMACTRL DMA Control and status Register*/ -#define PCI_DMACTRL_APDCEN BIT(0) -#define PCI_DMACTRL_APDC0 BIT(4) -#define PCI_DMACTRL_APDE0 BIT(5) -#define PCI_DMACTRL_APDC1 BIT(6) -#define PCI_DMACTRL_APDE1 BIT(7) -#define PCI_DMACTRL_PADCEN BIT(8) -#define PCI_DMACTRL_PADC0 BIT(12) -#define PCI_DMACTRL_PADE0 BIT(13) -#define PCI_DMACTRL_PADC1 BIT(14) -#define PCI_DMACTRL_PADE1 BIT(15) - -/* GPIO related register */ -#undef IXP425_GPIO_GPOUTR -#undef IXP425_GPIO_GPOER -#undef IXP425_GPIO_GPINR -#undef IXP425_GPIO_GPISR -#undef IXP425_GPIO_GPIT1R -#undef IXP425_GPIO_GPIT2R -#undef IXP425_GPIO_GPCLKR - -#define IXP425_GPIO_GPOUTR 0xC8004000 -#define IXP425_GPIO_GPOER 0xC8004004 -#define IXP425_GPIO_GPINR 0xC8004008 -#define IXP425_GPIO_GPISR 0xC800400C -#define IXP425_GPIO_GPIT1R 0xC8004010 -#define IXP425_GPIO_GPIT2R 0xC8004014 -#define IXP425_GPIO_GPCLKR 0xC8004018 - -#define READ_GPIO_REG(addr,val) \ - (val) = *((volatile int *)(addr)); -#define WRITE_GPIO_REG(addr,val) \ - *((volatile int *)(addr)) = (val); - -#endif diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/include/asm/arch-kirkwood/config.h deleted file mode 100644 index 71ba464..0000000 --- a/arch/arm/include/asm/arch-kirkwood/config.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/* - * This file should be included in board config header file. - * - * It supports common definitions for Kirkwood platform - */ - -#ifndef _KW_CONFIG_H -#define _KW_CONFIG_H - -#if defined (CONFIG_KW88F6281) -#include <asm/arch/kw88f6281.h> -#elif defined (CONFIG_KW88F6192) -#include <asm/arch/kw88f6192.h> -#else -#error "SOC Name not defined" -#endif /* CONFIG_KW88F6281 */ - -#define CONFIG_ARM926EJS 1 /* Basic Architecture */ - -#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ -#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ -#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ - -/* - * By default kwbimage.cfg from board specific folder is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - -/* Kirkwood has 2k of Security SRAM, use it for SP */ -#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 -#define CONFIG_NR_DRAM_BANKS_MAX 2 - -#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE -#define MV_UART_CONSOLE_BASE KW_UART0_BASE -#define MV_SATA_BASE KW_SATA_BASE -#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET -#define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET - -/* - * NAND configuration - */ -#ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_KIRKWOOD -#define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */ -#define NAND_ALLOW_ERASE_ALL 1 -#endif - -/* - * SPI Flash configuration - */ -#ifdef CONFIG_CMD_SF -#define CONFIG_HARD_SPI 1 -#define CONFIG_KIRKWOOD_SPI 1 -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */ -#endif - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ -#define CONFIG_MII /* expose smi ove miiphy interface */ -#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ -#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ -#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ -#endif /* CONFIG_CMD_NET */ - -/* - * USB/EHCI - */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_EHCI_KIRKWOOD -#define CONFIG_EHCI_IS_TDI -#endif /* CONFIG_CMD_USB */ - -/* - * IDE Support on SATA ports - */ -#ifdef CONFIG_CMD_IDE -#define __io -#define CONFIG_CMD_EXT2 -#define CONFIG_MVSATA_IDE -#define CONFIG_IDE_PREINIT -#define CONFIG_MVSATA_IDE_USE_PORT1 -/* Needs byte-swapping for ATA data register */ -#define CONFIG_IDE_SWAP_IO -/* Data, registers and alternate blocks are at the same offset */ -#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) -#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) -#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) -/* Each 8-bit ATA register is aligned to a 4-bytes address */ -#define CONFIG_SYS_ATA_STRIDE 4 -/* Controller supports 48-bits LBA addressing */ -#define CONFIG_LBA48 -/* CONFIG_CMD_IDE requires some #defines for ATA registers */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 2 -/* ATA registers base is at SATA controller base */ -#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE -#endif /* CONFIG_CMD_IDE */ - -/* - * I2C related stuff - */ -#ifdef CONFIG_CMD_I2C -#define CONFIG_I2C_MVTWSI -#define CONFIG_SYS_I2C_SLAVE 0x0 -#define CONFIG_SYS_I2C_SPEED 100000 -#endif - -#endif /* _KW_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h b/arch/arm/include/asm/arch-kirkwood/cpu.h deleted file mode 100644 index d28c51a..0000000 --- a/arch/arm/include/asm/arch-kirkwood/cpu.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _KWCPU_H -#define _KWCPU_H - -#include <asm/system.h> - -#ifndef __ASSEMBLY__ - -#define KWCPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target << 4) \ - | (attr << 8) | (kw_winctrl_calcsize(size) << 16)) - -#define KWGBE_PORT_SERIAL_CONTROL1_REG(_x) \ - ((_x ? KW_EGIGA0_BASE : KW_EGIGA1_BASE) + 0x44c) - -#define KW_REG_PCIE_DEVID (KW_REG_PCIE_BASE + 0x00) -#define KW_REG_PCIE_REVID (KW_REG_PCIE_BASE + 0x08) -#define KW_REG_DEVICE_ID (KW_MPP_BASE + 0x34) -#define KW_REG_SYSRST_CNT (KW_MPP_BASE + 0x50) -#define SYSRST_CNT_1SEC_VAL (25*1000000) -#define KW_REG_MPP_OUT_DRV_REG (KW_MPP_BASE + 0xE0) - -enum memory_bank { - BANK0, - BANK1, - BANK2, - BANK3 -}; - -enum kwcpu_winen { - KWCPU_WIN_DISABLE, - KWCPU_WIN_ENABLE -}; - -enum kwcpu_target { - KWCPU_TARGET_RESERVED, - KWCPU_TARGET_MEMORY, - KWCPU_TARGET_1RESERVED, - KWCPU_TARGET_SASRAM, - KWCPU_TARGET_PCIE -}; - -enum kwcpu_attrib { - KWCPU_ATTR_SASRAM = 0x01, - KWCPU_ATTR_DRAM_CS0 = 0x0e, - KWCPU_ATTR_DRAM_CS1 = 0x0d, - KWCPU_ATTR_DRAM_CS2 = 0x0b, - KWCPU_ATTR_DRAM_CS3 = 0x07, - KWCPU_ATTR_NANDFLASH = 0x2f, - KWCPU_ATTR_SPIFLASH = 0x1e, - KWCPU_ATTR_BOOTROM = 0x1d, - KWCPU_ATTR_PCIE_IO = 0xe0, - KWCPU_ATTR_PCIE_MEM = 0xe8 -}; - -/* - * Default Device Address MAP BAR values - */ -#define KW_DEFADR_PCI_MEM 0x90000000 -#define KW_DEFADR_PCI_IO 0xC0000000 -#define KW_DEFADR_PCI_IO_REMAP 0xC0000000 -#define KW_DEFADR_SASRAM 0xC8010000 -#define KW_DEFADR_NANDF 0xD8000000 -#define KW_DEFADR_SPIF 0xE8000000 -#define KW_DEFADR_BOOTROM 0xF8000000 - -/* - * read feroceon/sheeva core extra feature register - * using co-proc instruction - */ -static inline unsigned int readfr_extra_feature_reg(void) -{ - unsigned int val; - asm volatile ("mrc p15, 1, %0, c15, c1, 0 @ readfr exfr":"=r" - (val)::"cc"); - return val; -} - -/* - * write feroceon/sheeva core extra feature register - * using co-proc instruction - */ -static inline void writefr_extra_feature_reg(unsigned int val) -{ - asm volatile ("mcr p15, 1, %0, c15, c1, 0 @ writefr exfr"::"r" - (val):"cc"); - isb(); -} - -/* - * MBus-L to Mbus Bridge Registers - * Ref: Datasheet sec:A.3 - */ -struct kwwin_registers { - u32 ctrl; - u32 base; - u32 remap_lo; - u32 remap_hi; -}; - -/* - * CPU control and status Registers - * Ref: Datasheet sec:A.3.2 - */ -struct kwcpu_registers { - u32 config; /*0x20100 */ - u32 ctrl_stat; /*0x20104 */ - u32 rstoutn_mask; /* 0x20108 */ - u32 sys_soft_rst; /* 0x2010C */ - u32 ahb_mbus_cause_irq; /* 0x20110 */ - u32 ahb_mbus_mask_irq; /* 0x20114 */ - u32 pad1[2]; - u32 ftdll_config; /* 0x20120 */ - u32 pad2; - u32 l2_cfg; /* 0x20128 */ -}; - -/* - * GPIO Registers - * Ref: Datasheet sec:A.19 - */ -struct kwgpio_registers { - u32 dout; - u32 oe; - u32 blink_en; - u32 din_pol; - u32 din; - u32 irq_cause; - u32 irq_mask; - u32 irq_level; -}; - -/* - * functions - */ -void reset_cpu(unsigned long ignored); -unsigned char get_random_hex(void); -unsigned int kw_sdram_bar(enum memory_bank bank); -unsigned int kw_sdram_bs(enum memory_bank bank); -int kw_config_adr_windows(void); -void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val, - unsigned int gpp0_oe, unsigned int gpp1_oe); -int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15, - unsigned int mpp16_23, unsigned int mpp24_31, - unsigned int mpp32_39, unsigned int mpp40_47, - unsigned int mpp48_55); -unsigned int kw_winctrl_calcsize(unsigned int sizeval); -#endif /* __ASSEMBLY__ */ -#endif /* _KWCPU_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/gpio.h b/arch/arm/include/asm/arch-kirkwood/gpio.h deleted file mode 100644 index cd1bc00..0000000 --- a/arch/arm/include/asm/arch-kirkwood/gpio.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * arch/asm-arm/mach-kirkwood/include/mach/gpio.h - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/* - * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver. - * Removed kernel level irq handling. Took some macros from kernel to - * allow build. - * - * Dieter Kiermaier dk-arm-linux@gmx.de - */ - -#ifndef __KIRKWOOD_GPIO_H -#define __KIRKWOOD_GPIO_H - -/* got from kernel include/linux/bitops.h */ -#define BITS_PER_BYTE 8 -#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) - -#define GPIO_MAX 50 -#define GPIO_OFF(pin) (((pin) >> 5) ? 0x0040 : 0x0000) -#define GPIO_OUT(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00) -#define GPIO_IO_CONF(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04) -#define GPIO_BLINK_EN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08) -#define GPIO_IN_POL(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c) -#define GPIO_DATA_IN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10) -#define GPIO_EDGE_CAUSE(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14) -#define GPIO_EDGE_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18) -#define GPIO_LEVEL_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c) - -/* - * Kirkwood-specific GPIO API - */ - -void kw_gpio_set_valid(unsigned pin, int mode); -int kw_gpio_is_valid(unsigned pin, int mode); -int kw_gpio_direction_input(unsigned pin); -int kw_gpio_direction_output(unsigned pin, int value); -int kw_gpio_get_value(unsigned pin); -void kw_gpio_set_value(unsigned pin, int value); -void kw_gpio_set_blink(unsigned pin, int blink); -void kw_gpio_set_unused(unsigned pin); - -#define GPIO_INPUT_OK (1 << 0) -#define GPIO_OUTPUT_OK (1 << 1) - -#endif diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h deleted file mode 100644 index 0104418..0000000 --- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Header file for the Marvell's Feroceon CPU core. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ASM_ARCH_KIRKWOOD_H -#define _ASM_ARCH_KIRKWOOD_H - -#ifndef __ASSEMBLY__ -#include <asm/types.h> -#include <asm/io.h> -#endif /* __ASSEMBLY__ */ - -#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131) -#include <asm/arch/cpu.h> - -/* SOC specific definations */ -#define INTREG_BASE 0xd0000000 -#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x) -#define KW_OFFSET_REG (INTREG_BASE + 0x20080) - -/* undocumented registers */ -#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470)) -#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478)) - -#define KW_TWSI_BASE (KW_REGISTER(0x11000)) -#define KW_UART0_BASE (KW_REGISTER(0x12000)) -#define KW_UART1_BASE (KW_REGISTER(0x12100)) -#define KW_MPP_BASE (KW_REGISTER(0x10000)) -#define KW_GPIO0_BASE (KW_REGISTER(0x10100)) -#define KW_GPIO1_BASE (KW_REGISTER(0x10140)) -#define KW_NANDF_BASE (KW_REGISTER(0x10418)) -#define KW_SPI_BASE (KW_REGISTER(0x10600)) -#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000)) -#define KW_CPU_REG_BASE (KW_REGISTER(0x20100)) -#define KW_TIMER_BASE (KW_REGISTER(0x20300)) -#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000)) -#define KW_USB20_BASE (KW_REGISTER(0x50000)) -#define KW_EGIGA0_BASE (KW_REGISTER(0x72000)) -#define KW_EGIGA1_BASE (KW_REGISTER(0x76000)) -#define KW_SATA_BASE (KW_REGISTER(0x80000)) - -/* Kirkwood Sata controller has two ports */ -#define KW_SATA_PORT0_OFFSET 0x2000 -#define KW_SATA_PORT1_OFFSET 0x4000 - -/* Kirkwood GbE controller has two ports */ -#define MAX_MVGBE_DEVS 2 -#define MVGBE0_BASE KW_EGIGA0_BASE -#define MVGBE1_BASE KW_EGIGA1_BASE - -#if defined (CONFIG_KW88F6281) -#include <asm/arch/kw88f6281.h> -#elif defined (CONFIG_KW88F6192) -#include <asm/arch/kw88f6192.h> -#else -#error "SOC Name not defined" -#endif /* CONFIG_KW88F6281 */ -#endif /* CONFIG_FEROCEON_88FR131 */ -#endif /* _ASM_ARCH_KIRKWOOD_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6192.h b/arch/arm/include/asm/arch-kirkwood/kw88f6192.h deleted file mode 100644 index bbb7cee..0000000 --- a/arch/arm/include/asm/arch-kirkwood/kw88f6192.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Header file for Feroceon CPU core 88FR131 Based KW88F6192 SOC. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _CONFIG_KW88F6192_H -#define _CONFIG_KW88F6192_H - -/* SOC specific definations */ -#define KW88F6192_REGS_PHYS_BASE 0xf1000000 -#define KW_REGS_PHY_BASE KW88F6192_REGS_PHYS_BASE - -/* TCLK Core Clock defination */ -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */ - -#endif /* _CONFIG_KW88F6192_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h deleted file mode 100644 index 80723ea..0000000 --- a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ASM_ARCH_KW88F6281_H -#define _ASM_ARCH_KW88F6281_H - -/* SOC specific definations */ -#define KW88F6281_REGS_PHYS_BASE 0xf1000000 -#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE - -/* TCLK Core Clock defination*/ -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ - -#endif /* _ASM_ARCH_KW88F6281_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/mpp.h b/arch/arm/include/asm/arch-kirkwood/mpp.h deleted file mode 100644 index b3c090e..0000000 --- a/arch/arm/include/asm/arch-kirkwood/mpp.h +++ /dev/null @@ -1,317 +0,0 @@ -/* - * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins - * - * Copyright 2009: Marvell Technology Group Ltd. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef __KIRKWOOD_MPP_H -#define __KIRKWOOD_MPP_H - -#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \ - /* MPP number */ ((_num) & 0xff) | \ - /* MPP select value */ (((_sel) & 0xf) << 8) | \ - /* may be input signal */ ((!!(_in)) << 12) | \ - /* may be output signal */ ((!!(_out)) << 13) | \ - /* available on F6180 */ ((!!(_F6180)) << 14) | \ - /* available on F6190 */ ((!!(_F6190)) << 15) | \ - /* available on F6192 */ ((!!(_F6192)) << 16) | \ - /* available on F6281 */ ((!!(_F6281)) << 17)) - -#define MPP_NUM(x) ((x) & 0xff) -#define MPP_SEL(x) (((x) >> 8) & 0xf) - - /* num sel i o 6180 6190 6192 6281 */ - -#define MPP_INPUT_MASK MPP( 0, 0x0, 1, 0, 0, 0, 0, 0 ) -#define MPP_OUTPUT_MASK MPP( 0, 0x0, 0, 1, 0, 0, 0, 0 ) - -#define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0 ) -#define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0 ) -#define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0 ) -#define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1 ) - -#define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1 ) - -#define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1 ) -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1 ) -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1 ) -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_TW_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1 ) -#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1 ) -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1 ) -#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP9_TW_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1 ) -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1 ) -#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1 ) -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1 ) - -#define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP11_UART0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1 ) -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1 ) -#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1 ) -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1 ) - -#define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1 ) -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1 ) - -#define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1 ) - -#define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1 ) - -#define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1 ) - -#define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP20_GE1_0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP20_AUDIO_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1 ) -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1 ) - -#define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP21_GE1_1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP21_AUDIO_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP22_GE1_2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP22_AUDIO_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1 ) - -#define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP23_GE1_3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP23_AUDIO_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP24_TDM_SPI_CS0 DEV( 24, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP24_GE1_4 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP24_AUDIO_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP25_GE1_5 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP25_AUDIO_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP26_GE1_6 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP26_AUDIO_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP27_GE1_7 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP27_AUDIO_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1 ) - -#define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1 ) -#define MPP28_GE1_8 MPP( 28, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP28_AUDIO_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1 ) - -#define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1 ) -#define MPP29_GE1_9 MPP( 29, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1 ) -#define MPP30_GE1_10 MPP( 30, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1 ) -#define MPP31_GE1_11 MPP( 31, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP32_GE1_12 MPP( 32, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP33_GPIO MPP( 33, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP33_GE1_13 MPP( 33, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP34_GE1_14 MPP( 34, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP35_GE1_15 MPP( 35, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1 ) -#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1 ) - -#define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP36_AUDIO_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP37_AUDIO_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP38_AUDIO_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP39_AUDIO_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP40_AUDIO_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1 ) -#define MPP41_AUDIO_I2SLRC MPP( 41, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP42_AUDIO_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1 ) -#define MPP43_AUDIO_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1 ) -#define MPP44_AUDIO_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1 ) - -#define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1 ) - -#define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1 ) - -#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 1, 0, 0, 0, 1 ) - -#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1 ) - -#define MPP_MAX 49 - -void kirkwood_mpp_conf(unsigned int *mpp_list); - -#endif diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h b/arch/arm/include/asm/arch-kirkwood/spi.h deleted file mode 100644 index 1d5043f..0000000 --- a/arch/arm/include/asm/arch-kirkwood/spi.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Derived from drivers/spi/mpc8xxx_spi.c - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef __KW_SPI_H__ -#define __KW_SPI_H__ - -/* SPI Registers on kirkwood SOC */ -struct kwspi_registers { - u32 ctrl; /* 0x10600 */ - u32 cfg; /* 0x10604 */ - u32 dout; /* 0x10608 */ - u32 din; /* 0x1060c */ - u32 irq_cause; /* 0x10610 */ - u32 irq_mask; /* 0x10614 */ -}; - -#define KWSPI_CLKPRESCL_MASK 0x1f -#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */ -#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ -#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ -#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ -#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ -#define KWSPI_XFERLEN_1BYTE 0 -#define KWSPI_XFERLEN_2BYTE (1 << 5) -#define KWSPI_XFERLEN_MASK (1 << 5) -#define KWSPI_ADRLEN_1BYTE 0 -#define KWSPI_ADRLEN_2BYTE 1 << 8 -#define KWSPI_ADRLEN_3BYTE 2 << 8 -#define KWSPI_ADRLEN_4BYTE 3 << 8 -#define KWSPI_ADRLEN_MASK 3 << 8 -#define KWSPI_TIMEOUT 10000 - -#endif /* __KW_SPI_H__ */ diff --git a/arch/arm/include/asm/arch-ks8695/platform.h b/arch/arm/include/asm/arch-ks8695/platform.h deleted file mode 100644 index de20015..0000000 --- a/arch/arm/include/asm/arch-ks8695/platform.h +++ /dev/null @@ -1,306 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __address_h -#define __address_h 1 - -#define KS8695_SDRAM_START 0x00000000 -#define KS8695_SDRAM_SIZE 0x01000000 -#define KS8695_MEM_SIZE KS8695_SDRAM_SIZE -#define KS8695_MEM_START KS8695_SDRAM_START - -#define KS8695_PCMCIA_IO_BASE 0x03800000 -#define KS8695_PCMCIA_IO_SIZE 0x00040000 - -#define KS8695_IO_BASE 0x03FF0000 -#define KS8695_IO_SIZE 0x00010000 - -#define KS8695_SYSTEN_CONFIG 0x00 -#define KS8695_SYSTEN_BUS_CLOCK 0x04 - -#define KS8695_FLASH_START 0x02800000 -#define KS8695_FLASH_SIZE 0x00400000 - -/*i/o control registers offset difinitions*/ -#define KS8695_IO_CTRL0 0x4000 -#define KS8695_IO_CTRL1 0x4004 -#define KS8695_IO_CTRL2 0x4008 -#define KS8695_IO_CTRL3 0x400C - -/*memory control registers offset difinitions*/ -#define KS8695_MEM_CTRL0 0x4010 -#define KS8695_MEM_CTRL1 0x4014 -#define KS8695_MEM_CTRL2 0x4018 -#define KS8695_MEM_CTRL3 0x401C -#define KS8695_MEM_GENERAL 0x4020 -#define KS8695_SDRAM_CTRL0 0x4030 -#define KS8695_SDRAM_CTRL1 0x4034 -#define KS8695_SDRAM_GENERAL 0x4038 -#define KS8695_SDRAM_BUFFER 0x403C -#define KS8695_SDRAM_REFRESH 0x4040 - -/*WAN control registers offset difinitions*/ -#define KS8695_WAN_DMA_TX 0x6000 -#define KS8695_WAN_DMA_RX 0x6004 -#define KS8695_WAN_DMA_TX_START 0x6008 -#define KS8695_WAN_DMA_RX_START 0x600C -#define KS8695_WAN_TX_LIST 0x6010 -#define KS8695_WAN_RX_LIST 0x6014 -#define KS8695_WAN_MAC_LOW 0x6018 -#define KS8695_WAN_MAC_HIGH 0x601C -#define KS8695_WAN_MAC_ELOW 0x6080 -#define KS8695_WAN_MAC_EHIGH 0x6084 - -/*LAN control registers offset difinitions*/ -#define KS8695_LAN_DMA_TX 0x8000 -#define KS8695_LAN_DMA_RX 0x8004 -#define KS8695_LAN_DMA_TX_START 0x8008 -#define KS8695_LAN_DMA_RX_START 0x800C -#define KS8695_LAN_TX_LIST 0x8010 -#define KS8695_LAN_RX_LIST 0x8014 -#define KS8695_LAN_MAC_LOW 0x8018 -#define KS8695_LAN_MAC_HIGH 0x801C -#define KS8695_LAN_MAC_ELOW 0X8080 -#define KS8695_LAN_MAC_EHIGH 0X8084 - -/*HPNA control registers offset difinitions*/ -#define KS8695_HPNA_DMA_TX 0xA000 -#define KS8695_HPNA_DMA_RX 0xA004 -#define KS8695_HPNA_DMA_TX_START 0xA008 -#define KS8695_HPNA_DMA_RX_START 0xA00C -#define KS8695_HPNA_TX_LIST 0xA010 -#define KS8695_HPNA_RX_LIST 0xA014 -#define KS8695_HPNA_MAC_LOW 0xA018 -#define KS8695_HPNA_MAC_HIGH 0xA01C -#define KS8695_HPNA_MAC_ELOW 0xA080 -#define KS8695_HPNA_MAC_EHIGH 0xA084 - -/*UART control registers offset difinitions*/ -#define KS8695_UART_RX_BUFFER 0xE000 -#define KS8695_UART_TX_HOLDING 0xE004 - -#define KS8695_UART_FIFO_CTRL 0xE008 -#define KS8695_UART_FIFO_TRIG01 0x00 -#define KS8695_UART_FIFO_TRIG04 0x80 -#define KS8695_UART_FIFO_TXRST 0x03 -#define KS8695_UART_FIFO_RXRST 0x02 -#define KS8695_UART_FIFO_FEN 0x01 - -#define KS8695_UART_LINE_CTRL 0xE00C -#define KS8695_UART_LINEC_BRK 0x40 -#define KS8695_UART_LINEC_EPS 0x10 -#define KS8695_UART_LINEC_PEN 0x08 -#define KS8695_UART_LINEC_STP2 0x04 -#define KS8695_UART_LINEC_WLEN8 0x03 -#define KS8695_UART_LINEC_WLEN7 0x02 -#define KS8695_UART_LINEC_WLEN6 0x01 -#define KS8695_UART_LINEC_WLEN5 0x00 - -#define KS8695_UART_MODEM_CTRL 0xE010 -#define KS8695_UART_MODEMC_RTS 0x02 -#define KS8695_UART_MODEMC_DTR 0x01 - -#define KS8695_UART_LINE_STATUS 0xE014 -#define KS8695_UART_LINES_TXFE 0x20 -#define KS8695_UART_LINES_BE 0x10 -#define KS8695_UART_LINES_FE 0x08 -#define KS8695_UART_LINES_PE 0x04 -#define KS8695_UART_LINES_OE 0x02 -#define KS8695_UART_LINES_RXFE 0x01 -#define KS8695_UART_LINES_ANY (KS8695_UART_LINES_OE|KS8695_UART_LINES_BE|KS8695_UART_LINES_PE|KS8695_UART_LINES_FE) - -#define KS8695_UART_MODEM_STATUS 0xE018 -#define KS8695_UART_MODEM_DCD 0x80 -#define KS8695_UART_MODEM_DSR 0x20 -#define KS8695_UART_MODEM_CTS 0x10 -#define KS8695_UART_MODEM_DDCD 0x08 -#define KS8695_UART_MODEM_DDSR 0x02 -#define KS8695_UART_MODEM_DCTS 0x01 -#define UART8695_MODEM_ANY 0xFF - -#define KS8695_UART_DIVISOR 0xE01C -#define KS8695_UART_STATUS 0xE020 - -/*Interrupt controlller registers offset difinitions*/ -#define KS8695_INT_CONTL 0xE200 -#define KS8695_INT_ENABLE 0xE204 -#define KS8695_INT_ENABLE_MODEM 0x0800 -#define KS8695_INT_ENABLE_ERR 0x0400 -#define KS8695_INT_ENABLE_RX 0x0200 -#define KS8695_INT_ENABLE_TX 0x0100 - -#define KS8695_INT_STATUS 0xE208 -#define KS8695_INT_WAN_PRIORITY 0xE20C -#define KS8695_INT_HPNA_PRIORITY 0xE210 -#define KS8695_INT_LAN_PRIORITY 0xE214 -#define KS8695_INT_TIMER_PRIORITY 0xE218 -#define KS8695_INT_UART_PRIORITY 0xE21C -#define KS8695_INT_EXT_PRIORITY 0xE220 -#define KS8695_INT_CHAN_PRIORITY 0xE224 -#define KS8695_INT_BUSERROR_PRO 0xE228 -#define KS8695_INT_MASK_STATUS 0xE22C -#define KS8695_FIQ_PEND_PRIORITY 0xE230 -#define KS8695_IRQ_PEND_PRIORITY 0xE234 - -/*timer registers offset difinitions*/ -#define KS8695_TIMER_CTRL 0xE400 -#define KS8695_TIMER1 0xE404 -#define KS8695_TIMER0 0xE408 -#define KS8695_TIMER1_PCOUNT 0xE40C -#define KS8695_TIMER0_PCOUNT 0xE410 - -/*GPIO registers offset difinitions*/ -#define KS8695_GPIO_MODE 0xE600 -#define KS8695_GPIO_CTRL 0xE604 -#define KS8695_GPIO_DATA 0xE608 - -/*SWITCH registers offset difinitions*/ -#define KS8695_SWITCH_CTRL0 0xE800 -#define KS8695_SWITCH_CTRL1 0xE804 -#define KS8695_SWITCH_PORT1 0xE808 -#define KS8695_SWITCH_PORT2 0xE80C -#define KS8695_SWITCH_PORT3 0xE810 -#define KS8695_SWITCH_PORT4 0xE814 -#define KS8695_SWITCH_PORT5 0xE818 -#define KS8695_SWITCH_AUTO0 0xE81C -#define KS8695_SWITCH_AUTO1 0xE820 -#define KS8695_SWITCH_LUE_CTRL 0xE824 -#define KS8695_SWITCH_LUE_HIGH 0xE828 -#define KS8695_SWITCH_LUE_LOW 0xE82C -#define KS8695_SWITCH_ADVANCED 0xE830 - -#define KS8695_SWITCH_LPPM12 0xE874 -#define KS8695_SWITCH_LPPM34 0xE878 - -/*host communication registers difinitions*/ -#define KS8695_DSCP_HIGH 0xE834 -#define KS8695_DSCP_LOW 0xE838 -#define KS8695_SWITCH_MAC_HIGH 0xE83C -#define KS8695_SWITCH_MAC_LOW 0xE840 - -/*miscellaneours registers difinitions*/ -#define KS8695_MANAGE_COUNTER 0xE844 -#define KS8695_MANAGE_DATA 0xE848 -#define KS8695_LAN12_POWERMAGR 0xE84C -#define KS8695_LAN34_POWERMAGR 0xE850 - -#define KS8695_DEVICE_ID 0xEA00 -#define KS8695_REVISION_ID 0xEA04 - -#define KS8695_MISC_CONTROL 0xEA08 -#define KS8695_WAN_CONTROL 0xEA0C -#define KS8695_WAN_POWERMAGR 0xEA10 -#define KS8695_WAN_PHY_CONTROL 0xEA14 -#define KS8695_WAN_PHY_STATUS 0xEA18 - -/* bus clock definitions*/ -#define KS8695_BUS_CLOCK_125MHZ 0x0 -#define KS8695_BUS_CLOCK_100MHZ 0x1 -#define KS8695_BUS_CLOCK_62MHZ 0x2 -#define KS8695_BUS_CLOCK_50MHZ 0x3 -#define KS8695_BUS_CLOCK_41MHZ 0x4 -#define KS8695_BUS_CLOCK_33MHZ 0x5 -#define KS8695_BUS_CLOCK_31MHZ 0x6 -#define KS8695_BUS_CLOCK_25MHZ 0x7 - -/* ------------------------------------------------------------------------------- - * definations for IRQ - * -------------------------------------------------------------------------------*/ - -#define KS8695_INT_EXT_INT0 2 -#define KS8695_INT_EXT_INT1 3 -#define KS8695_INT_EXT_INT2 4 -#define KS8695_INT_EXT_INT3 5 -#define KS8695_INT_TIMERINT0 6 -#define KS8695_INT_TIMERINT1 7 -#define KS8695_INT_UART_TX 8 -#define KS8695_INT_UART_RX 9 -#define KS8695_INT_UART_LINE_ERR 10 -#define KS8695_INT_UART_MODEMS 11 -#define KS8695_INT_LAN_STOP_RX 12 -#define KS8695_INT_LAN_STOP_TX 13 -#define KS8695_INT_LAN_BUF_RX_STATUS 14 -#define KS8695_INT_LAN_BUF_TX_STATUS 15 -#define KS8695_INT_LAN_RX_STATUS 16 -#define KS8695_INT_LAN_TX_STATUS 17 -#define KS8695_INT_HPAN_STOP_RX 18 -#define KS8695_INT_HPNA_STOP_TX 19 -#define KS8695_INT_HPNA_BUF_RX_STATUS 20 -#define KS8695_INT_HPNA_BUF_TX_STATUS 21 -#define KS8695_INT_HPNA_RX_STATUS 22 -#define KS8695_INT_HPNA_TX_STATUS 23 -#define KS8695_INT_BUS_ERROR 24 -#define KS8695_INT_WAN_STOP_RX 25 -#define KS8695_INT_WAN_STOP_TX 26 -#define KS8695_INT_WAN_BUF_RX_STATUS 27 -#define KS8695_INT_WAN_BUF_TX_STATUS 28 -#define KS8695_INT_WAN_RX_STATUS 29 -#define KS8695_INT_WAN_TX_STATUS 30 - -#define KS8695_INT_UART KS8695_INT_UART_TX - -/* ------------------------------------------------------------------------------- - * Interrupt bit positions - * - * ------------------------------------------------------------------------------- - */ - -#define KS8695_INTMASK_EXT_INT0 ( 1 << KS8695_INT_EXT_INT0 ) -#define KS8695_INTMASK_EXT_INT1 ( 1 << KS8695_INT_EXT_INT1 ) -#define KS8695_INTMASK_EXT_INT2 ( 1 << KS8695_INT_EXT_INT2 ) -#define KS8695_INTMASK_EXT_INT3 ( 1 << KS8695_INT_EXT_INT3 ) -#define KS8695_INTMASK_TIMERINT0 ( 1 << KS8695_INT_TIMERINT0 ) -#define KS8695_INTMASK_TIMERINT1 ( 1 << KS8695_INT_TIMERINT1 ) -#define KS8695_INTMASK_UART_TX ( 1 << KS8695_INT_UART_TX ) -#define KS8695_INTMASK_UART_RX ( 1 << KS8695_INT_UART_RX ) -#define KS8695_INTMASK_UART_LINE_ERR ( 1 << KS8695_INT_UART_LINE_ERR ) -#define KS8695_INTMASK_UART_MODEMS ( 1 << KS8695_INT_UART_MODEMS ) -#define KS8695_INTMASK_LAN_STOP_RX ( 1 << KS8695_INT_LAN_STOP_RX ) -#define KS8695_INTMASK_LAN_STOP_TX ( 1 << KS8695_INT_LAN_STOP_TX ) -#define KS8695_INTMASK_LAN_BUF_RX_STATUS ( 1 << KS8695_INT_LAN_BUF_RX_STATUS ) -#define KS8695_INTMASK_LAN_BUF_TX_STATUS ( 1 << KS8695_INT_LAN_BUF_TX_STATUS ) -#define KS8695_INTMASK_LAN_RX_STATUS ( 1 << KS8695_INT_LAN_RX_STATUS ) -#define KS8695_INTMASK_LAN_TX_STATUS ( 1 << KS8695_INT_LAN_RX_STATUS ) -#define KS8695_INTMASK_HPAN_STOP_RX ( 1 << KS8695_INT_HPAN_STOP_RX ) -#define KS8695_INTMASK_HPNA_STOP_TX ( 1 << KS8695_INT_HPNA_STOP_TX ) -#define KS8695_INTMASK_HPNA_BUF_RX_STATUS ( 1 << KS8695_INT_HPNA_BUF_RX_STATUS ) -#define KS8695_INTMAKS_HPNA_BUF_TX_STATUS ( 1 << KS8695_INT_HPNA_BUF_TX_STATUS -#define KS8695_INTMASK_HPNA_RX_STATUS ( 1 << KS8695_INT_HPNA_RX_STATUS ) -#define KS8695_INTMASK_HPNA_TX_STATUS ( 1 << KS8695_INT_HPNA_TX_STATUS ) -#define KS8695_INTMASK_BUS_ERROR ( 1 << KS8695_INT_BUS_ERROR ) -#define KS8695_INTMASK_WAN_STOP_RX ( 1 << KS8695_INT_WAN_STOP_RX ) -#define KS8695_INTMASK_WAN_STOP_TX ( 1 << KS8695_INT_WAN_STOP_TX ) -#define KS8695_INTMASK_WAN_BUF_RX_STATUS ( 1 << KS8695_INT_WAN_BUF_RX_STATUS ) -#define KS8695_INTMASK_WAN_BUF_TX_STATUS ( 1 << KS8695_INT_WAN_BUF_TX_STATUS ) -#define KS8695_INTMASK_WAN_RX_STATUS ( 1 << KS8695_INT_WAN_RX_STATUS ) -#define KS8695_INTMASK_WAN_TX_STATUS ( 1 << KS8695_INT_WAN_TX_STATUS ) - -#define KS8695_SC_VALID_INT 0xFFFFFFFF -#define MAXIRQNUM 31 - -/* - * Timer definitions - * - * Use timer 1 & 2 - * (both run at 25MHz). - * - */ -#define TICKS_PER_uSEC 25 -#define mSEC_1 1000 -#define mSEC_10 (mSEC_1 * 10) - -#endif - -/* END */ diff --git a/arch/arm/include/asm/arch-lpc2292/hardware.h b/arch/arm/include/asm/arch-lpc2292/hardware.h deleted file mode 100644 index 5e227e3..0000000 --- a/arch/arm/include/asm/arch-lpc2292/hardware.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#if defined(CONFIG_LPC2292) -#include <asm/arch-lpc2292/lpc2292_registers.h> -#else -#error No hardware file defined for this configuration -#endif - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h b/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h deleted file mode 100644 index 5715f3e..0000000 --- a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h +++ /dev/null @@ -1,225 +0,0 @@ -#ifndef __LPC2292_REGISTERS_H -#define __LPC2292_REGISTERS_H - -#include <config.h> - -/* Macros for reading/writing registers */ -#define PUT8(reg, value) (*(volatile unsigned char*)(reg) = (value)) -#define PUT16(reg, value) (*(volatile unsigned short*)(reg) = (value)) -#define PUT32(reg, value) (*(volatile unsigned int*)(reg) = (value)) -#define GET8(reg) (*(volatile unsigned char*)(reg)) -#define GET16(reg) (*(volatile unsigned short*)(reg)) -#define GET32(reg) (*(volatile unsigned int*)(reg)) - -/* External Memory Controller */ - -#define BCFG0 0xFFE00000 /* 32-bits */ -#define BCFG1 0xFFE00004 /* 32-bits */ -#define BCFG2 0xFFE00008 /* 32-bits */ -#define BCFG3 0xFFE0000c /* 32-bits */ - -/* System Control Block */ - -#define EXTINT 0xE01FC140 -#define EXTWAKE 0xE01FC144 -#define EXTMODE 0xE01FC148 -#define EXTPOLAR 0xE01FC14C -#define MEMMAP 0xE01FC040 -#define PLLCON 0xE01FC080 -#define PLLCFG 0xE01FC084 -#define PLLSTAT 0xE01FC088 -#define PLLFEED 0xE01FC08C -#define PCON 0xE01FC0C0 -#define PCONP 0xE01FC0C4 -#define VPBDIV 0xE01FC100 - -/* Memory Acceleration Module */ - -#define MAMCR 0xE01FC000 -#define MAMTIM 0xE01FC004 - -/* Vectored Interrupt Controller */ - -#define VICIRQStatus 0xFFFFF000 -#define VICFIQStatus 0xFFFFF004 -#define VICRawIntr 0xFFFFF008 -#define VICIntSelect 0xFFFFF00C -#define VICIntEnable 0xFFFFF010 -#define VICIntEnClr 0xFFFFF014 -#define VICSoftInt 0xFFFFF018 -#define VICSoftIntClear 0xFFFFF01C -#define VICProtection 0xFFFFF020 -#define VICVectAddr 0xFFFFF030 -#define VICDefVectAddr 0xFFFFF034 -#define VICVectAddr0 0xFFFFF100 -#define VICVectAddr1 0xFFFFF104 -#define VICVectAddr2 0xFFFFF108 -#define VICVectAddr3 0xFFFFF10C -#define VICVectAddr4 0xFFFFF110 -#define VICVectAddr5 0xFFFFF114 -#define VICVectAddr6 0xFFFFF118 -#define VICVectAddr7 0xFFFFF11C -#define VICVectAddr8 0xFFFFF120 -#define VICVectAddr9 0xFFFFF124 -#define VICVectAddr10 0xFFFFF128 -#define VICVectAddr11 0xFFFFF12C -#define VICVectAddr12 0xFFFFF130 -#define VICVectAddr13 0xFFFFF134 -#define VICVectAddr14 0xFFFFF138 -#define VICVectAddr15 0xFFFFF13C -#define VICVectCntl0 0xFFFFF200 -#define VICVectCntl1 0xFFFFF204 -#define VICVectCntl2 0xFFFFF208 -#define VICVectCntl3 0xFFFFF20C -#define VICVectCntl4 0xFFFFF210 -#define VICVectCntl5 0xFFFFF214 -#define VICVectCntl6 0xFFFFF218 -#define VICVectCntl7 0xFFFFF21C -#define VICVectCntl8 0xFFFFF220 -#define VICVectCntl9 0xFFFFF224 -#define VICVectCntl10 0xFFFFF228 -#define VICVectCntl11 0xFFFFF22C -#define VICVectCntl12 0xFFFFF230 -#define VICVectCntl13 0xFFFFF234 -#define VICVectCntl14 0xFFFFF238 -#define VICVectCntl15 0xFFFFF23C - -/* Pin connect block */ - -#define PINSEL0 0xE002C000 /* 32 bits */ -#define PINSEL1 0xE002C004 /* 32 bits */ -#define PINSEL2 0xE002C014 /* 32 bits */ - -/* GPIO */ - -#define IO0PIN 0xE0028000 -#define IO0SET 0xE0028004 -#define IO0DIR 0xE0028008 -#define IO0CLR 0xE002800C -#define IO1PIN 0xE0028010 -#define IO1SET 0xE0028014 -#define IO1DIR 0xE0028018 -#define IO1CLR 0xE002801C -#define IO2PIN 0xE0028020 -#define IO2SET 0xE0028024 -#define IO2DIR 0xE0028028 -#define IO2CLR 0xE002802C -#define IO3PIN 0xE0028030 -#define IO3SET 0xE0028034 -#define IO3DIR 0xE0028038 -#define IO3CLR 0xE002803C - -/* Uarts */ - -#define U0RBR 0xE000C000 -#define U0THR 0xE000C000 -#define U0IER 0xE000C004 -#define U0IIR 0xE000C008 -#define U0FCR 0xE000C008 -#define U0LCR 0xE000C00C -#define U0LSR 0xE000C014 -#define U0SCR 0xE000C01C -#define U0DLL 0xE000C000 -#define U0DLM 0xE000C004 - -#define U1RBR 0xE0010000 -#define U1THR 0xE0010000 -#define U1IER 0xE0010004 -#define U1IIR 0xE0010008 -#define U1FCR 0xE0010008 -#define U1LCR 0xE001000C -#define U1MCR 0xE0010010 -#define U1LSR 0xE0010014 -#define U1MSR 0xE0010018 -#define U1SCR 0xE001001C -#define U1DLL 0xE0010000 -#define U1DLM 0xE0010004 - -/* I2C */ - -#define I2CONSET 0xE001C000 -#define I2STAT 0xE001C004 -#define I2DAT 0xE001C008 -#define I2ADR 0xE001C00C -#define I2SCLH 0xE001C010 -#define I2SCLL 0xE001C014 -#define I2CONCLR 0xE001C018 - -/* SPI */ - -#define S0SPCR 0xE0020000 -#define S0SPSR 0xE0020004 -#define S0SPDR 0xE0020008 -#define S0SPCCR 0xE002000C -#define S0SPINT 0xE002001C - -#define S1SPCR 0xE0030000 -#define S1SPSR 0xE0030004 -#define S1SPDR 0xE0030008 -#define S1SPCCR 0xE003000C -#define S1SPINT 0xE003001C - -/* CAN controller */ - -/* skip for now */ - -/* Timers */ - -#define T0IR 0xE0004000 -#define T0TCR 0xE0004004 -#define T0TC 0xE0004008 -#define T0PR 0xE000400C -#define T0PC 0xE0004010 -#define T0MCR 0xE0004014 -#define T0MR0 0xE0004018 -#define T0MR1 0xE000401C -#define T0MR2 0xE0004020 -#define T0MR3 0xE0004024 -#define T0CCR 0xE0004028 -#define T0CR0 0xE000402C -#define T0CR1 0xE0004030 -#define T0CR2 0xE0004034 -#define T0CR3 0xE0004038 -#define T0EMR 0xE000403C - -#define T1IR 0xE0008000 -#define T1TCR 0xE0008004 -#define T1TC 0xE0008008 -#define T1PR 0xE000800C -#define T1PC 0xE0008010 -#define T1MCR 0xE0008014 -#define T1MR0 0xE0008018 -#define T1MR1 0xE000801C -#define T1MR2 0xE0008020 -#define T1MR3 0xE0008024 -#define T1CCR 0xE0008028 -#define T1CR0 0xE000802C -#define T1CR1 0xE0008030 -#define T1CR2 0xE0008034 -#define T1CR3 0xE0008038 -#define T1EMR 0xE000803C - -/* PWM */ - -/* skip for now */ - -/* A/D converter */ - -/* skip for now */ - -/* Real Time Clock */ - -/* skip for now */ - -/* Watchdog */ - -#define WDMOD 0xE0000000 -#define WDTC 0xE0000004 -#define WDFEED 0xE0000008 -#define WDTV 0xE000000C - -/* EmbeddedICE LOGIC */ - -/* skip for now */ - -#endif diff --git a/arch/arm/include/asm/arch-lpc2292/spi.h b/arch/arm/include/asm/arch-lpc2292/spi.h deleted file mode 100644 index 6ae66e8..0000000 --- a/arch/arm/include/asm/arch-lpc2292/spi.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - This file defines the interface to the lpc22xx SPI module. - Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com) - - This file may be included in software not adhering to the GPL. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef SPI_H -#define SPI_H - -#include <config.h> -#include <common.h> -#include <asm/errno.h> -#include <asm/arch/hardware.h> - -#define SPIF 0x80 - -#define spi_lock() disable_interrupts(); -#define spi_unlock() enable_interrupts(); - -extern unsigned long spi_flags; -extern unsigned char spi_idle; - -int spi_init(void); - -static inline unsigned char spi_read(void) -{ - unsigned char b; - - PUT8(S0SPDR, spi_idle); - while (!(GET8(S0SPSR) & SPIF)); - b = GET8(S0SPDR); - - return b; -} - -static inline void spi_write(unsigned char b) -{ - PUT8(S0SPDR, b); - while (!(GET8(S0SPSR) & SPIF)); - GET8(S0SPDR); /* this will clear the SPIF bit */ -} - -static inline void spi_set_clock(unsigned char clk_value) -{ - PUT8(S0SPCCR, clk_value); -} - -static inline void spi_set_cfg(unsigned char phase, - unsigned char polarity, - unsigned char lsbf) -{ - unsigned char v = 0x20; /* master bit set */ - - if (phase) - v |= 0x08; /* set phase bit */ - if (polarity) { - v |= 0x10; /* set polarity bit */ - spi_idle = 0xFF; - } else { - spi_idle = 0x00; - } - if (lsbf) - v |= 0x40; /* set lsbf bit */ - - PUT8(S0SPCR, v); -} -#endif /* SPI_H */ diff --git a/arch/arm/include/asm/arch-mb86r0x/asm-offsets.h b/arch/arm/include/asm/arch-mb86r0x/asm-offsets.h deleted file mode 100644 index 0bc5279..0000000 --- a/arch/arm/include/asm/arch-mb86r0x/asm-offsets.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * (C) Copyright 2010 - * Matthias Weisser <weisserm@arcor.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef ASM_OFFSETS_H -#define ASM_OFFSETS_H - -/* - * Offset definitions for DDR controller - */ -#define DDR2_DRIC 0x00 -#define DDR2_DRIC1 0x02 -#define DDR2_DRIC2 0x04 -#define DDR2_DRCA 0x06 -#define DDR2_DRCM 0x08 -#define DDR2_DRCST1 0x0a -#define DDR2_DRCST2 0x0c -#define DDR2_DRCR 0x0e -#define DDR2_DRCF 0x20 -#define DDR2_DRASR 0x30 -#define DDR2_DRIMS 0x50 -#define DDR2_DROS 0x60 -#define DDR2_DRIBSODT1 0x64 -#define DDR2_DROABA 0x70 -#define DDR2_DROBS 0x84 - -/* - * Offset definitions Chip Control Module - */ -#define CCNT_CDCRC 0xec - -/* - * Offset definitions clock reset generator - */ -#define CRG_CRPR 0x00 -#define CRG_CRHA 0x18 -#define CRG_CRPA 0x1c -#define CRG_CRPB 0x20 -#define CRG_CRHB 0x24 -#define CRG_CRAM 0x28 - -/* - * Offset definitions External bus interface - */ -#define MEMC_MCFMODE0 0x00 -#define MEMC_MCFMODE2 0x08 -#define MEMC_MCFMODE4 0x10 -#define MEMC_MCFTIM0 0x20 -#define MEMC_MCFTIM2 0x28 -#define MEMC_MCFTIM4 0x30 -#define MEMC_MCFAREA0 0x40 -#define MEMC_MCFAREA2 0x48 -#define MEMC_MCFAREA4 0x50 - -#endif /* ASM_OFFSETS_H */ diff --git a/arch/arm/include/asm/arch-mb86r0x/hardware.h b/arch/arm/include/asm/arch-mb86r0x/hardware.h deleted file mode 100644 index d1e57c0..0000000 --- a/arch/arm/include/asm/arch-mb86r0x/hardware.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * (C) Copyright 2007 - * - * Author : Carsten Schneider, mycable GmbH - * <cs@mycable.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/sizes.h> -#include <asm/arch/mb86r0x.h> - -#endif diff --git a/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h b/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h deleted file mode 100644 index 36a28b7..0000000 --- a/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h +++ /dev/null @@ -1,573 +0,0 @@ -/* - * (C) Copyright 2007 - * - * mb86r0x definitions - * - * Author : Carsten Schneider, mycable GmbH - * <cs@mycable.de> - * - * (C) Copyright 2010 - * Matthias Weisser <weisserm@arcor.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef MB86R0X_H -#define MB86R0X_H - -#ifndef __ASSEMBLY__ - -/* GPIO registers */ -struct mb86r0x_gpio { - uint32_t gpdr0; - uint32_t gpdr1; - uint32_t gpdr2; - uint32_t res; - uint32_t gpddr0; - uint32_t gpddr1; - uint32_t gpddr2; -}; - -/* PWM registers */ -struct mb86r0x_pwm { - uint32_t bcr; - uint32_t tpr; - uint32_t pr; - uint32_t dr; - uint32_t cr; - uint32_t sr; - uint32_t ccr; - uint32_t ir; -}; - -/* The mb86r0x chip control (CCNT) register set. */ -struct mb86r0x_ccnt { - uint32_t ccid; - uint32_t csrst; - uint32_t pad0[2]; - uint32_t cist; - uint32_t cistm; - uint32_t cgpio_ist; - uint32_t cgpio_istm; - uint32_t cgpio_ip; - uint32_t cgpio_im; - uint32_t caxi_bw; - uint32_t caxi_ps; - uint32_t cmux_md; - uint32_t cex_pin_st; - uint32_t cmlb; - uint32_t pad1[1]; - uint32_t cusb; - uint32_t pad2[41]; - uint32_t cbsc; - uint32_t cdcrc; - uint32_t cmsr0; - uint32_t cmsr1; - uint32_t pad3[2]; -}; - -/* The mb86r0x clock reset generator */ -struct mb86r0x_crg { - uint32_t crpr; - uint32_t pad0; - uint32_t crwr; - uint32_t crsr; - uint32_t crda; - uint32_t crdb; - uint32_t crha; - uint32_t crpa; - uint32_t crpb; - uint32_t crhb; - uint32_t cram; -}; - -/* The mb86r0x timer */ -struct mb86r0x_timer { - uint32_t load; - uint32_t value; - uint32_t control; - uint32_t intclr; - uint32_t ris; - uint32_t mis; - uint32_t bgload; -}; - -/* mb86r0x gdc display controller */ -struct mb86r0x_gdc_dsp { - /* Display settings */ - uint32_t dcm0; - uint16_t pad00; - uint16_t htp; - uint16_t hdp; - uint16_t hdb; - uint16_t hsp; - uint8_t hsw; - uint8_t vsw; - uint16_t pad01; - uint16_t vtr; - uint16_t vsp; - uint16_t vdp; - uint16_t wx; - uint16_t wy; - uint16_t ww; - uint16_t wh; - - /* Layer 0 */ - uint32_t l0m; - uint32_t l0oa; - uint32_t l0da; - uint16_t l0dx; - uint16_t l0dy; - - /* Layer 1 */ - uint32_t l1m; - uint32_t cbda0; - uint32_t cbda1; - uint32_t pad02; - - /* Layer 2 */ - uint32_t l2m; - uint32_t l2oa0; - uint32_t l2da0; - uint32_t l2oa1; - uint32_t l2da1; - uint16_t l2dx; - uint16_t l2dy; - - /* Layer 3 */ - uint32_t l3m; - uint32_t l3oa0; - uint32_t l3da0; - uint32_t l3oa1; - uint32_t l3da1; - uint16_t l3dx; - uint16_t l3dy; - - /* Layer 4 */ - uint32_t l4m; - uint32_t l4oa0; - uint32_t l4da0; - uint32_t l4oa1; - uint32_t l4da1; - uint16_t l4dx; - uint16_t l4dy; - - /* Layer 5 */ - uint32_t l5m; - uint32_t l5oa0; - uint32_t l5da0; - uint32_t l5oa1; - uint32_t l5da1; - uint16_t l5dx; - uint16_t l5dy; - - /* Cursor */ - uint16_t cutc; - uint8_t cpm; - uint8_t csize; - uint32_t cuoa0; - uint16_t cux0; - uint16_t cuy0; - uint32_t cuoa1; - uint16_t cux1; - uint16_t cuy1; - - /* Layer blending */ - uint32_t l0bld; - uint32_t pad03; - uint32_t l0tc; - uint16_t l3tc; - uint16_t l2tc; - uint32_t pad04[15]; - - /* Display settings */ - uint32_t dcm1; - uint32_t dcm2; - uint32_t dcm3; - uint32_t pad05; - - /* Layer 0 extended */ - uint32_t l0em; - uint16_t l0wx; - uint16_t l0wy; - uint16_t l0ww; - uint16_t l0wh; - uint32_t pad06; - - /* Layer 1 extended */ - uint32_t l1em; - uint16_t l1wx; - uint16_t l1wy; - uint16_t l1ww; - uint16_t l1wh; - uint32_t pad07; - - /* Layer 2 extended */ - uint32_t l2em; - uint16_t l2wx; - uint16_t l2wy; - uint16_t l2ww; - uint16_t l2wh; - uint32_t pad08; - - /* Layer 3 extended */ - uint32_t l3em; - uint16_t l3wx; - uint16_t l3wy; - uint16_t l3ww; - uint16_t l3wh; - uint32_t pad09; - - /* Layer 4 extended */ - uint32_t l4em; - uint16_t l4wx; - uint16_t l4wy; - uint16_t l4ww; - uint16_t l4wh; - uint32_t pad10; - - /* Layer 5 extended */ - uint32_t l5em; - uint16_t l5wx; - uint16_t l5wy; - uint16_t l5ww; - uint16_t l5wh; - uint32_t pad11; - - /* Multi screen control */ - uint32_t msc; - uint32_t pad12[3]; - uint32_t dls; - uint32_t dbgc; - - /* Layer blending */ - uint32_t l1bld; - uint32_t l2bld; - uint32_t l3bld; - uint32_t l4bld; - uint32_t l5bld; - uint32_t pad13; - - /* Extended transparency control */ - uint32_t l0etc; - uint32_t l1etc; - uint32_t l2etc; - uint32_t l3etc; - uint32_t l4etc; - uint32_t l5etc; - uint32_t pad14[10]; - - /* YUV coefficients */ - uint32_t l1ycr0; - uint32_t l1ycr1; - uint32_t l1ycg0; - uint32_t l1ycg1; - uint32_t l1ycb0; - uint32_t l1ycb1; - uint32_t pad15[130]; - - /* Layer palletes */ - uint32_t l0pal[256]; - uint32_t l1pal[256]; - uint32_t pad16[256]; - uint32_t l2pal[256]; - uint32_t l3pal[256]; - uint32_t pad17[256]; - - /* PWM settings */ - uint32_t vpwmm; - uint16_t vpwms; - uint16_t vpwme; - uint32_t vpwmc; - uint32_t pad18[253]; -}; - -/* mb86r0x gdc capture controller */ -struct mb86r0x_gdc_cap { - uint32_t vcm; - uint32_t csc; - uint32_t vcs; - uint32_t pad01; - - uint32_t cbm; - uint32_t cboa; - uint32_t cbla; - uint16_t cihstr; - uint16_t civstr; - uint16_t cihend; - uint16_t civend; - uint32_t pad02; - - uint32_t chp; - uint32_t cvp; - uint32_t pad03[4]; - - uint32_t clpf; - uint32_t pad04; - uint32_t cmss; - uint32_t cmds; - uint32_t pad05[12]; - - uint32_t rgbhc; - uint32_t rgbhen; - uint32_t rgbven; - uint32_t pad06; - uint32_t rgbs; - uint32_t pad07[11]; - - uint32_t rgbcmy; - uint32_t rgbcmcb; - uint32_t rgbcmcr; - uint32_t rgbcmb; - uint32_t pad08[12 + 1984]; -}; - -/* mb86r0x gdc draw */ -struct mb86r0x_gdc_draw { - uint32_t ys; - uint32_t xs; - uint32_t dxdy; - uint32_t xus; - uint32_t dxudy; - uint32_t xls; - uint32_t dxldy; - uint32_t usn; - uint32_t lsn; - uint32_t pad01[7]; - uint32_t rs; - uint32_t drdx; - uint32_t drdy; - uint32_t gs; - uint32_t dgdx; - uint32_t dgdy; - uint32_t bs; - uint32_t dbdx; - uint32_t dbdy; - uint32_t pad02[7]; - uint32_t zs; - uint32_t dzdx; - uint32_t dzdy; - uint32_t pad03[13]; - uint32_t ss; - uint32_t dsdx; - uint32_t dsdy; - uint32_t ts; - uint32_t dtdx; - uint32_t dtdy; - uint32_t qs; - uint32_t dqdx; - uint32_t dqdy; - uint32_t pad04[23]; - uint32_t lpn; - uint32_t lxs; - uint32_t lxde; - uint32_t lys; - uint32_t lyde; - uint32_t lzs; - uint32_t lzde; - uint32_t pad05[13]; - uint32_t pxdc; - uint32_t pydc; - uint32_t pzdc; - uint32_t pad06[25]; - uint32_t rxs; - uint32_t rys; - uint32_t rsizex; - uint32_t rsizey; - uint32_t pad07[12]; - uint32_t saddr; - uint32_t sstride; - uint32_t srx; - uint32_t sry; - uint32_t daddr; - uint32_t dstride; - uint32_t drx; - uint32_t dry; - uint32_t brsizex; - uint32_t brsizey; - uint32_t tcolor; - uint32_t pad08[93]; - uint32_t blpo; - uint32_t pad09[7]; - uint32_t ctr; - uint32_t ifsr; - uint32_t ifcnt; - uint32_t sst; - uint32_t ds; - uint32_t pst; - uint32_t est; - uint32_t pad10; - uint32_t mdr0; - uint32_t mdr1; - uint32_t mdr2; - uint32_t mdr3; - uint32_t mdr4; - uint32_t pad14[2]; - uint32_t mdr7; - uint32_t fbr; - uint32_t xres; - uint32_t zbr; - uint32_t tbr; - uint32_t pfbr; - uint32_t cxmin; - uint32_t cxmax; - uint32_t cymin; - uint32_t cymax; - uint32_t txs; - uint32_t tis; - uint32_t toa; - uint32_t sho; - uint32_t abr; - uint32_t pad15[2]; - uint32_t fc; - uint32_t bc; - uint32_t alf; - uint32_t blp; - uint32_t pad16; - uint32_t tbc; - uint32_t pad11[42]; - uint32_t lx0dc; - uint32_t ly0dc; - uint32_t lx1dc; - uint32_t ly1dc; - uint32_t pad12[12]; - uint32_t x0dc; - uint32_t y0dc; - uint32_t x1dc; - uint32_t y1dc; - uint32_t x2dc; - uint32_t y2dc; - uint32_t pad13[666]; -}; - -/* mb86r0x gdc geometry engine */ -struct mb86r0x_gdc_geom { - uint32_t gctr; - uint32_t pad00[15]; - uint32_t gmdr0; - uint32_t gmdr1; - uint32_t gmdr2; - uint32_t pad01[237]; - uint32_t dfifog; - uint32_t pad02[767]; -}; - -/* mb86r0x gdc */ -struct mb86r0x_gdc { - uint32_t pad00[2]; - uint32_t lts; - uint32_t pad01; - uint32_t lsta; - uint32_t pad02[3]; - uint32_t ist; - uint32_t imask; - uint32_t pad03[6]; - uint32_t lsa; - uint32_t lco; - uint32_t lreq; - - uint32_t pad04[16*1024 - 19]; - struct mb86r0x_gdc_dsp dsp0; - struct mb86r0x_gdc_dsp dsp1; - uint32_t pad05[4*1024 - 2]; - uint32_t vccc; - uint32_t vcsr; - struct mb86r0x_gdc_cap cap0; - struct mb86r0x_gdc_cap cap1; - uint32_t pad06[4*1024]; - uint32_t texture_base[16*1024]; - struct mb86r0x_gdc_draw draw; - uint32_t pad07[7*1024]; - struct mb86r0x_gdc_geom geom; - uint32_t pad08[7*1024]; -}; - -#endif /* __ASSEMBLY__ */ - -/* - * Physical Address Defines - */ -#define MB86R0x_DDR2_BASE 0xf3000000 -#define MB86R0x_GDC_BASE 0xf1fc0000 -#define MB86R0x_CCNT_BASE 0xfff42000 -#define MB86R0x_CAN0_BASE 0xfff54000 -#define MB86R0x_CAN1_BASE 0xfff55000 -#define MB86R0x_I2C0_BASE 0xfff56000 -#define MB86R0x_I2C1_BASE 0xfff57000 -#define MB86R0x_EHCI_BASE 0xfff80000 -#define MB86R0x_OHCI_BASE 0xfff81000 -#define MB86R0x_IRC1_BASE 0xfffb0000 -#define MB86R0x_MEMC_BASE 0xfffc0000 -#define MB86R0x_TIMER_BASE 0xfffe0000 -#define MB86R0x_UART0_BASE 0xfffe1000 -#define MB86R0x_UART1_BASE 0xfffe2000 -#define MB86R0x_IRCE_BASE 0xfffe4000 -#define MB86R0x_CRG_BASE 0xfffe7000 -#define MB86R0x_IRC0_BASE 0xfffe8000 -#define MB86R0x_GPIO_BASE 0xfffe9000 -#define MB86R0x_PWM0_BASE 0xfff41000 -#define MB86R0x_PWM1_BASE 0xfff41100 - -#define MB86R0x_CRSR_SWRSTREQ (1 << 1) - -/* - * Timer register bits - */ -#define MB86R0x_TIMER_ENABLE (1 << 7) -#define MB86R0x_TIMER_MODE_MSK (1 << 6) -#define MB86R0x_TIMER_MODE_FR (0 << 6) -#define MB86R0x_TIMER_MODE_PD (1 << 6) - -#define MB86R0x_TIMER_INT_EN (1 << 5) -#define MB86R0x_TIMER_PRS_MSK (3 << 2) -#define MB86R0x_TIMER_PRS_4S (1 << 2) -#define MB86R0x_TIMER_PRS_8S (1 << 3) -#define MB86R0x_TIMER_SIZE_32 (1 << 1) -#define MB86R0x_TIMER_ONE_SHT (1 << 0) - -/* - * Clock reset generator bits - */ -#define MB86R0x_CRG_CRPR_PLLRDY (1 << 8) -#define MB86R0x_CRG_CRPR_PLLMODE (0x1f << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X49 (0 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X46 (1 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X37 (2 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X20 (3 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X47 (4 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X44 (5 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X36 (6 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X19 (7 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X39 (8 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X38 (9 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X30 (10 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X15 (11 << 0) -/* - * DDR2 controller bits - */ -#define MB86R0x_DDR2_DRCI_DRINI (1 << 15) -#define MB86R0x_DDR2_DRCI_CKEN (1 << 14) -#define MB86R0x_DDR2_DRCI_DRCMD (1 << 0) -#define MB86R0x_DDR2_DRCI_CMD (MB86R0x_DDR2_DRCI_DRINI | \ - MB86R0x_DDR2_DRCI_CKEN | \ - MB86R0x_DDR2_DRCI_DRCMD) -#define MB86R0x_DDR2_DRCI_INIT (MB86R0x_DDR2_DRCI_DRINI | \ - MB86R0x_DDR2_DRCI_CKEN) -#define MB86R0x_DDR2_DRCI_NORMAL MB86R0x_DDR2_DRCI_CKEN -#endif /* MB86R0X_H */ diff --git a/arch/arm/include/asm/arch-mx25/clock.h b/arch/arm/include/asm/arch-mx25/clock.h deleted file mode 100644 index c59f588..0000000 --- a/arch/arm/include/asm/arch-mx25/clock.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * - * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com> - * - * Modified for mx25 by John Rigby <jrigby@gmail.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H - -ulong imx_get_perclk(int clk); -ulong imx_get_ahbclk(void); - -#define imx_get_uartclk() imx_get_perclk(15) -#define imx_get_fecclk() (imx_get_ahbclk()/2) - - -#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h deleted file mode 100644 index 55ad115..0000000 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ /dev/null @@ -1,321 +0,0 @@ -/* - * Copyright (C) 2009, DENX Software Engineering - * Author: John Rigby <jcrigby@gmail.com - * - * Based on arch-mx31/mx31-regs.h - * Copyright (C) 2009 Ilya Yanok, - * Emcraft Systems <yanok@emcraft.com> - * and arch-mx27/imx-regs.h - * Copyright (C) 2007 Pengutronix, - * Sascha Hauer <s.hauer@pengutronix.de> - * Copyright (C) 2009 Ilya Yanok, - * Emcraft Systems <yanok@emcraft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _IMX_REGS_H -#define _IMX_REGS_H - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_FEC_MXC -extern void mx25_fec_init_pins(void); -extern void imx_get_mac_from_fuse(unsigned char *mac); -#endif - -/* Clock Control Module (CCM) registers */ -struct ccm_regs { - u32 mpctl; /* Core PLL Control */ - u32 upctl; /* USB PLL Control */ - u32 cctl; /* Clock Control */ - u32 cgr0; /* Clock Gating Control 0 */ - u32 cgr1; /* Clock Gating Control 1 */ - u32 cgr2; /* Clock Gating Control 2 */ - u32 pcdr[4]; /* PER Clock Dividers */ - u32 rcsr; /* CCM Status */ - u32 crdr; /* CCM Reset and Debug */ - u32 dcvr0; /* DPTC Comparator Value 0 */ - u32 dcvr1; /* DPTC Comparator Value 1 */ - u32 dcvr2; /* DPTC Comparator Value 2 */ - u32 dcvr3; /* DPTC Comparator Value 3 */ - u32 ltr0; /* Load Tracking 0 */ - u32 ltr1; /* Load Tracking 1 */ - u32 ltr2; /* Load Tracking 2 */ - u32 ltr3; /* Load Tracking 3 */ - u32 ltbr0; /* Load Tracking Buffer 0 */ - u32 ltbr1; /* Load Tracking Buffer 1 */ - u32 pcmr0; /* Power Management Control 0 */ - u32 pcmr1; /* Power Management Control 1 */ - u32 pcmr2; /* Power Management Control 2 */ - u32 mcr; /* Miscellaneous Control */ - u32 lpimr0; /* Low Power Interrupt Mask 0 */ - u32 lpimr1; /* Low Power Interrupt Mask 1 */ -}; - -/* Enhanced SDRAM Controller (ESDRAMC) registers */ -struct esdramc_regs { - u32 ctl0; /* control 0 */ - u32 cfg0; /* configuration 0 */ - u32 ctl1; /* control 1 */ - u32 cfg1; /* configuration 1 */ - u32 misc; /* miscellaneous */ - u32 pad[3]; - u32 cdly1; /* Delay Line 1 configuration debug */ - u32 cdly2; /* delay line 2 configuration debug */ - u32 cdly3; /* delay line 3 configuration debug */ - u32 cdly4; /* delay line 4 configuration debug */ - u32 cdly5; /* delay line 5 configuration debug */ - u32 cdlyl; /* delay line cycle length debug */ -}; - -/* GPIO registers */ -struct gpio_regs { - u32 dr; /* data */ - u32 dir; /* direction */ - u32 psr; /* pad satus */ - u32 icr1; /* interrupt config 1 */ - u32 icr2; /* interrupt config 2 */ - u32 imr; /* interrupt mask */ - u32 isr; /* interrupt status */ - u32 edge_sel; /* edge select */ -}; - -/* General Purpose Timer (GPT) registers */ -struct gpt_regs { - u32 ctrl; /* control */ - u32 pre; /* prescaler */ - u32 stat; /* status */ - u32 intr; /* interrupt */ - u32 cmp[3]; /* output compare 1-3 */ - u32 capt[2]; /* input capture 1-2 */ - u32 counter; /* counter */ -}; - -/* Watchdog Timer (WDOG) registers */ -struct wdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ - u16 wicr; /* Interrupt Control */ - u16 wmcr; /* Misc Control */ -}; - -/* IIM control registers */ -struct iim_regs { - u32 iim_stat; - u32 iim_statm; - u32 iim_err; - u32 iim_emask; - u32 iim_fctl; - u32 iim_ua; - u32 iim_la; - u32 iim_sdat; - u32 iim_prev; - u32 iim_srev; - u32 iim_prog_p; - u32 res1[0x1f5]; - struct fuse_bank { - u32 fuse_regs[0x20]; - u32 fuse_rsvd[0xe0]; - } bank[3]; -}; - -struct fuse_bank0_regs { - u32 fuse0_25[0x1a]; - u32 mac_addr[6]; -}; - -#endif - -/* AIPS 1 */ -#define IMX_AIPS1_BASE (0x43F00000) -#define IMX_MAX_BASE (0x43F04000) -#define IMX_CLKCTL_BASE (0x43F08000) -#define IMX_ETB_SLOT4_BASE (0x43F0C000) -#define IMX_ETB_SLOT5_BASE (0x43F10000) -#define IMX_ECT_CTIO_BASE (0x43F18000) -#define IMX_I2C_BASE (0x43F80000) -#define IMX_I2C3_BASE (0x43F84000) -#define IMX_CAN1_BASE (0x43F88000) -#define IMX_CAN2_BASE (0x43F8C000) -#define IMX_UART1_BASE (0x43F90000) -#define IMX_UART2_BASE (0x43F94000) -#define IMX_I2C2_BASE (0x43F98000) -#define IMX_OWIRE_BASE (0x43F9C000) -#define IMX_CSPI1_BASE (0x43FA4000) -#define IMX_KPP_BASE (0x43FA8000) -#define IMX_IOPADMUX_BASE (0x43FAC000) -#define IMX_IOPADCTL_BASE (0x43FAC22C) -#define IMX_IOPADGRPCTL_BASE (0x43FAC418) -#define IMX_IOPADINPUTSEL_BASE (0x43FAC460) -#define IMX_AUDMUX_BASE (0x43FB0000) -#define IMX_ECT_IP1_BASE (0x43FB8000) -#define IMX_ECT_IP2_BASE (0x43FBC000) - -/* SPBA */ -#define IMX_SPBA_BASE (0x50000000) -#define IMX_CSPI3_BASE (0x50004000) -#define IMX_UART4_BASE (0x50008000) -#define IMX_UART3_BASE (0x5000C000) -#define IMX_CSPI2_BASE (0x50010000) -#define IMX_SSI2_BASE (0x50014000) -#define IMX_ESAI_BASE (0x50018000) -#define IMX_ATA_DMA_BASE (0x50020000) -#define IMX_SIM1_BASE (0x50024000) -#define IMX_SIM2_BASE (0x50028000) -#define IMX_UART5_BASE (0x5002C000) -#define IMX_TSC_BASE (0x50030000) -#define IMX_SSI1_BASE (0x50034000) -#define IMX_FEC_BASE (0x50038000) -#define IMX_SPBA_CTRL_BASE (0x5003C000) - -/* AIPS 2 */ -#define IMX_AIPS2_BASE (0x53F00000) -#define IMX_CCM_BASE (0x53F80000) -#define IMX_GPT4_BASE (0x53F84000) -#define IMX_GPT3_BASE (0x53F88000) -#define IMX_GPT2_BASE (0x53F8C000) -#define IMX_GPT1_BASE (0x53F90000) -#define IMX_EPIT1_BASE (0x53F94000) -#define IMX_EPIT2_BASE (0x53F98000) -#define IMX_GPIO4_BASE (0x53F9C000) -#define IMX_PWM2_BASE (0x53FA0000) -#define IMX_GPIO3_BASE (0x53FA4000) -#define IMX_PWM3_BASE (0x53FA8000) -#define IMX_SCC_BASE (0x53FAC000) -#define IMX_SCM_BASE (0x53FAE000) -#define IMX_SMN_BASE (0x53FAF000) -#define IMX_RNGD_BASE (0x53FB0000) -#define IMX_MMC_SDHC1_BASE (0x53FB4000) -#define IMX_MMC_SDHC2_BASE (0x53FB8000) -#define IMX_LCDC_BASE (0x53FBC000) -#define IMX_SLCDC_BASE (0x53FC0000) -#define IMX_PWM4_BASE (0x53FC8000) -#define IMX_GPIO1_BASE (0x53FCC000) -#define IMX_GPIO2_BASE (0x53FD0000) -#define IMX_SDMA_BASE (0x53FD4000) -#define IMX_WDT_BASE (0x53FDC000) -#define IMX_PWM1_BASE (0x53FE0000) -#define IMX_RTIC_BASE (0x53FEC000) -#define IMX_IIM_BASE (0x53FF0000) -#define IMX_USB_BASE (0x53FF4000) -#define IMX_CSI_BASE (0x53FF8000) -#define IMX_DRYICE_BASE (0x53FFC000) - -#define IMX_ARM926_ROMPATCH (0x60000000) -#define IMX_ARM926_ASIC (0x68000000) - -/* 128K Internal Static RAM */ -#define IMX_RAM_BASE (0x78000000) - -/* SDRAM BANKS */ -#define IMX_SDRAM_BANK0_BASE (0x80000000) -#define IMX_SDRAM_BANK1_BASE (0x90000000) - -#define IMX_WEIM_CS0 (0xA0000000) -#define IMX_WEIM_CS1 (0xA8000000) -#define IMX_WEIM_CS2 (0xB0000000) -#define IMX_WEIM_CS3 (0xB2000000) -#define IMX_WEIM_CS4 (0xB4000000) -#define IMX_ESDRAMC_BASE (0xB8001000) -#define IMX_WEIM_CTRL_BASE (0xB8002000) -#define IMX_M3IF_CTRL_BASE (0xB8003000) -#define IMX_EMI_CTRL_BASE (0xB8004000) - -/* NAND Flash Controller */ -#define IMX_NFC_BASE (0xBB000000) -#define NFC_BASE_ADDR IMX_NFC_BASE - -/* CCM bitfields */ -#define CCM_PLL_MFI_SHIFT 10 -#define CCM_PLL_MFI_MASK 0xf -#define CCM_PLL_MFN_SHIFT 0 -#define CCM_PLL_MFN_MASK 0x3ff -#define CCM_PLL_MFD_SHIFT 16 -#define CCM_PLL_MFD_MASK 0x3ff -#define CCM_PLL_PD_SHIFT 26 -#define CCM_PLL_PD_MASK 0xf -#define CCM_CCTL_ARM_DIV_SHIFT 30 -#define CCM_CCTL_ARM_DIV_MASK 3 -#define CCM_CCTL_AHB_DIV_SHIFT 28 -#define CCM_CCTL_AHB_DIV_MASK 3 -#define CCM_CCTL_ARM_SRC (1 << 14) -#define CCM_CGR1_GPT1 (1 << 19) -#define CCM_PERCLK_REG(clk) (clk / 4) -#define CCM_PERCLK_SHIFT(clk) (8 * (clk % 4)) -#define CCM_PERCLK_MASK 0x3f -#define CCM_RCSR_NF_16BIT_SEL (1 << 14) -#define CCM_RCSR_NF_PS(v) ((v >> 26) & 3) - -/* ESDRAM Controller register bitfields */ -#define ESDCTL_PRCT(x) (((x) & 0x3f) << 0) -#define ESDCTL_BL (1 << 7) -#define ESDCTL_FP (1 << 8) -#define ESDCTL_PWDT(x) (((x) & 3) << 10) -#define ESDCTL_SREFR(x) (((x) & 7) << 13) -#define ESDCTL_DSIZ_16_UPPER (0 << 16) -#define ESDCTL_DSIZ_16_LOWER (1 << 16) -#define ESDCTL_DSIZ_32 (2 << 16) -#define ESDCTL_COL8 (0 << 20) -#define ESDCTL_COL9 (1 << 20) -#define ESDCTL_COL10 (2 << 20) -#define ESDCTL_ROW11 (0 << 24) -#define ESDCTL_ROW12 (1 << 24) -#define ESDCTL_ROW13 (2 << 24) -#define ESDCTL_ROW14 (3 << 24) -#define ESDCTL_ROW15 (4 << 24) -#define ESDCTL_SP (1 << 27) -#define ESDCTL_SMODE_NORMAL (0 << 28) -#define ESDCTL_SMODE_PRECHARGE (1 << 28) -#define ESDCTL_SMODE_AUTO_REF (2 << 28) -#define ESDCTL_SMODE_LOAD_MODE (3 << 28) -#define ESDCTL_SMODE_MAN_REF (4 << 28) -#define ESDCTL_SDE (1 << 31) - -#define ESDCFG_TRC(x) (((x) & 0xf) << 0) -#define ESDCFG_TRCD(x) (((x) & 0x7) << 4) -#define ESDCFG_TCAS(x) (((x) & 0x3) << 8) -#define ESDCFG_TRRD(x) (((x) & 0x3) << 10) -#define ESDCFG_TRAS(x) (((x) & 0x7) << 12) -#define ESDCFG_TWR (1 << 15) -#define ESDCFG_TMRD(x) (((x) & 0x3) << 16) -#define ESDCFG_TRP(x) (((x) & 0x3) << 18) -#define ESDCFG_TWTR (1 << 20) -#define ESDCFG_TXP(x) (((x) & 0x3) << 21) - -#define ESDMISC_RST (1 << 1) -#define ESDMISC_MDDREN (1 << 2) -#define ESDMISC_MDDR_DL_RST (1 << 3) -#define ESDMISC_MDDR_MDIS (1 << 4) -#define ESDMISC_LHD (1 << 5) -#define ESDMISC_MA10_SHARE (1 << 6) -#define ESDMISC_SDRAM_RDY (1 << 31) - -/* GPT bits */ -#define GPT_CTRL_SWR (1 << 15) /* Software reset */ -#define GPT_CTRL_FRR (1 << 9) /* Freerun / restart */ -#define GPT_CTRL_CLKSOURCE_32 (4 << 6) /* Clock source */ -#define GPT_CTRL_TEN 1 /* Timer enable */ - -/* WDOG enable */ -#define WCR_WDE 0x04 -#define WSR_UNLOCK1 0x5555 -#define WSR_UNLOCK2 0xAAAA - -#endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx25/imx25-pinmux.h b/arch/arm/include/asm/arch-mx25/imx25-pinmux.h deleted file mode 100644 index a4c658b..0000000 --- a/arch/arm/include/asm/arch-mx25/imx25-pinmux.h +++ /dev/null @@ -1,421 +0,0 @@ -/* - * iopin settings are controlled by four different sets of registers - * iopad mux control - * individual iopad setup (voltage select, pull/keep, drive strength ...) - * group iopad setup (same as above but for groups of signals) - * input select when multiple inputs are possible - */ - -/* - * software pad mux control - */ -/* SW Input On (Loopback) */ -#define MX25_PIN_MUX_SION (1 << 4) -/* MUX Mode (0-7) */ -#define MX25_PIN_MUX_MODE(mode) ((mode & 0x7) << 0) -struct iomuxc_mux_ctl { - u32 gpr1; - u32 observe_int_mux; - u32 pad_a10; - u32 pad_a13; - u32 pad_a14; - u32 pad_a15; - u32 pad_a16; - u32 pad_a17; - u32 pad_a18; - u32 pad_a19; - u32 pad_a20; - u32 pad_a21; - u32 pad_a22; - u32 pad_a23; - u32 pad_a24; - u32 pad_a25; - u32 pad_eb0; - u32 pad_eb1; - u32 pad_oe; - u32 pad_cs0; - u32 pad_cs1; - u32 pad_cs4; - u32 pad_cs5; - u32 pad_nf_ce0; - u32 pad_ecb; - u32 pad_lba; - u32 pad_bclk; - u32 pad_rw; - u32 pad_nfwe_b; - u32 pad_nfre_b; - u32 pad_nfale; - u32 pad_nfcle; - u32 pad_nfwp_b; - u32 pad_nfrb; - u32 pad_d15; - u32 pad_d14; - u32 pad_d13; - u32 pad_d12; - u32 pad_d11; - u32 pad_d10; - u32 pad_d9; - u32 pad_d8; - u32 pad_d7; - u32 pad_d6; - u32 pad_d5; - u32 pad_d4; - u32 pad_d3; - u32 pad_d2; - u32 pad_d1; - u32 pad_d0; - u32 pad_ld0; - u32 pad_ld1; - u32 pad_ld2; - u32 pad_ld3; - u32 pad_ld4; - u32 pad_ld5; - u32 pad_ld6; - u32 pad_ld7; - u32 pad_ld8; - u32 pad_ld9; - u32 pad_ld10; - u32 pad_ld11; - u32 pad_ld12; - u32 pad_ld13; - u32 pad_ld14; - u32 pad_ld15; - u32 pad_hsync; - u32 pad_vsync; - u32 pad_lsclk; - u32 pad_oe_acd; - u32 pad_contrast; - u32 pad_pwm; - u32 pad_csi_d2; - u32 pad_csi_d3; - u32 pad_csi_d4; - u32 pad_csi_d5; - u32 pad_csi_d6; - u32 pad_csi_d7; - u32 pad_csi_d8; - u32 pad_csi_d9; - u32 pad_csi_mclk; - u32 pad_csi_vsync; - u32 pad_csi_hsync; - u32 pad_csi_pixclk; - u32 pad_i2c1_clk; - u32 pad_i2c1_dat; - u32 pad_cspi1_mosi; - u32 pad_cspi1_miso; - u32 pad_cspi1_ss0; - u32 pad_cspi1_ss1; - u32 pad_cspi1_sclk; - u32 pad_cspi1_rdy; - u32 pad_uart1_rxd; - u32 pad_uart1_txd; - u32 pad_uart1_rts; - u32 pad_uart1_cts; - u32 pad_uart2_rxd; - u32 pad_uart2_txd; - u32 pad_uart2_rts; - u32 pad_uart2_cts; - u32 pad_sd1_cmd; - u32 pad_sd1_clk; - u32 pad_sd1_data0; - u32 pad_sd1_data1; - u32 pad_sd1_data2; - u32 pad_sd1_data3; - u32 pad_kpp_row0; - u32 pad_kpp_row1; - u32 pad_kpp_row2; - u32 pad_kpp_row3; - u32 pad_kpp_col0; - u32 pad_kpp_col1; - u32 pad_kpp_col2; - u32 pad_kpp_col3; - u32 pad_fec_mdc; - u32 pad_fec_mdio; - u32 pad_fec_tdata0; - u32 pad_fec_tdata1; - u32 pad_fec_tx_en; - u32 pad_fec_rdata0; - u32 pad_fec_rdata1; - u32 pad_fec_rx_dv; - u32 pad_fec_tx_clk; - u32 pad_rtck; - u32 pad_de_b; - u32 pad_gpio_a; - u32 pad_gpio_b; - u32 pad_gpio_c; - u32 pad_gpio_d; - u32 pad_gpio_e; - u32 pad_gpio_f; - u32 pad_ext_armclk; - u32 pad_upll_bypclk; - u32 pad_vstby_req; - u32 pad_vstby_ack; - u32 pad_power_fail; - u32 pad_clko; - u32 pad_boot_mode0; - u32 pad_boot_mode1; -}; - -/* - * software pad control - */ -/* Select 3.3 or 1.8 volts */ -#define MX25_PIN_PAD_CTL_DVS_33 (0 << 13) -#define MX25_PIN_PAD_CTL_DVS_18 (1 << 13) -/* Enable hysteresis */ -#define MX25_PIN_PAD_CTL_HYS (1 << 8) -/* Enable pull/keeper */ -#define MX25_PIN_PAD_CTL_PKE (1 << 7) -/* 0 - keeper / 1 - pull */ -#define MX25_PIN_PAD_CTL_PUE (1 << 6) -/* pull up/down strength */ -#define MX25_PIN_PAD_CTL_100K_PD (0 << 4) -#define MX25_PIN_PAD_CTL_47K_PU (1 << 4) -#define MX25_PIN_PAD_CTL_100K_PU (2 << 4) -#define MX25_PIN_PAD_CTL_22K_PU (3 << 4) -/* open drain control */ -#define MX25_PIN_PAD_CTL_OD (1 << 3) -/* drive strength */ -#define MX25_PIN_PAD_CTL_DS_NOM (0 << 1) -#define MX25_PIN_PAD_CTL_DS_HIGH (1 << 1) -#define MX25_PIN_PAD_CTL_DS_MAX (2 << 1) -#define MX25_PIN_PAD_CTL_DS_MAX11 (3 << 1) -/* slew rate */ -#define MX25_PIN_PAD_CTL_SRE_SLOW (0 << 0) -#define MX25_PIN_PAD_CTL_SRE_FAST (1 << 0) -struct iomuxc_pad_ctl { - u32 pad_a13; - u32 pad_a14; - u32 pad_a15; - u32 pad_a17; - u32 pad_a18; - u32 pad_a19; - u32 pad_a20; - u32 pad_a21; - u32 pad_a23; - u32 pad_a24; - u32 pad_a25; - u32 pad_eb0; - u32 pad_eb1; - u32 pad_oe; - u32 pad_cs4; - u32 pad_cs5; - u32 pad_nf_ce0; - u32 pad_ecb; - u32 pad_lba; - u32 pad_rw; - u32 pad_nfrb; - u32 pad_d15; - u32 pad_d14; - u32 pad_d13; - u32 pad_d12; - u32 pad_d11; - u32 pad_d10; - u32 pad_d9; - u32 pad_d8; - u32 pad_d7; - u32 pad_d6; - u32 pad_d5; - u32 pad_d4; - u32 pad_d3; - u32 pad_d2; - u32 pad_d1; - u32 pad_d0; - u32 pad_ld0; - u32 pad_ld1; - u32 pad_ld2; - u32 pad_ld3; - u32 pad_ld4; - u32 pad_ld5; - u32 pad_ld6; - u32 pad_ld7; - u32 pad_ld8; - u32 pad_ld9; - u32 pad_ld10; - u32 pad_ld11; - u32 pad_ld12; - u32 pad_ld13; - u32 pad_ld14; - u32 pad_ld15; - u32 pad_hsync; - u32 pad_vsync; - u32 pad_lsclk; - u32 pad_oe_acd; - u32 pad_contrast; - u32 pad_pwm; - u32 pad_csi_d2; - u32 pad_csi_d3; - u32 pad_csi_d4; - u32 pad_csi_d5; - u32 pad_csi_d6; - u32 pad_csi_d7; - u32 pad_csi_d8; - u32 pad_csi_d9; - u32 pad_csi_mclk; - u32 pad_csi_vsync; - u32 pad_csi_hsync; - u32 pad_csi_pixclk; - u32 pad_i2c1_clk; - u32 pad_i2c1_dat; - u32 pad_cspi1_mosi; - u32 pad_cspi1_miso; - u32 pad_cspi1_ss0; - u32 pad_cspi1_ss1; - u32 pad_cspi1_sclk; - u32 pad_cspi1_rdy; - u32 pad_uart1_rxd; - u32 pad_uart1_txd; - u32 pad_uart1_rts; - u32 pad_uart1_cts; - u32 pad_uart2_rxd; - u32 pad_uart2_txd; - u32 pad_uart2_rts; - u32 pad_uart2_cts; - u32 pad_sd1_cmd; - u32 pad_sd1_clk; - u32 pad_sd1_data0; - u32 pad_sd1_data1; - u32 pad_sd1_data2; - u32 pad_sd1_data3; - u32 pad_kpp_row0; - u32 pad_kpp_row1; - u32 pad_kpp_row2; - u32 pad_kpp_row3; - u32 pad_kpp_col0; - u32 pad_kpp_col1; - u32 pad_kpp_col2; - u32 pad_kpp_col3; - u32 pad_fec_mdc; - u32 pad_fec_mdio; - u32 pad_fec_tdata0; - u32 pad_fec_tdata1; - u32 pad_fec_tx_en; - u32 pad_fec_rdata0; - u32 pad_fec_rdata1; - u32 pad_fec_rx_dv; - u32 pad_fec_tx_clk; - u32 pad_rtck; - u32 pad_tdo; - u32 pad_de_b; - u32 pad_gpio_a; - u32 pad_gpio_b; - u32 pad_gpio_c; - u32 pad_gpio_d; - u32 pad_gpio_e; - u32 pad_gpio_f; - u32 pad_vstby_req; - u32 pad_vstby_ack; - u32 pad_power_fail; - u32 pad_clko; -}; - - -/* - * Pad group drive strength and voltage select - * Same fields as iomuxc_pad_ctl plus ddr type - */ -/* Select DDR type */ -#define MX25_PIN_PAD_CTL_DDR_18 (0 << 11) -#define MX25_PIN_PAD_CTL_DDR_33 (1 << 11) -#define MX25_PIN_PAD_CTL_DDR_MAX (2 << 11) -struct iomuxc_pad_grp_ctl { - u32 grp_dvs_misc; - u32 grp_dse_fec; - u32 grp_dvs_jtag; - u32 grp_dse_nfc; - u32 grp_dse_csi; - u32 grp_dse_weim; - u32 grp_dse_ddr; - u32 grp_dvs_crm; - u32 grp_dse_kpp; - u32 grp_dse_sdhc1; - u32 grp_dse_lcd; - u32 grp_dse_uart; - u32 grp_dvs_nfc; - u32 grp_dvs_csi; - u32 grp_dse_cspi1; - u32 grp_ddrtype; - u32 grp_dvs_sdhc1; - u32 grp_dvs_lcd; -}; - -/* - * Pad input select control - * Select which pad to connect to an input port - * where multiple pads can function as given input - */ -#define MX25_PAD_INPUT_SELECT_DAISY(in) ((in & 0x7) << 0) -struct iomuxc_pad_input_select { - u32 audmux_p4_input_da_amx; - u32 audmux_p4_input_db_amx; - u32 audmux_p4_input_rxclk_amx; - u32 audmux_p4_input_rxfs_amx; - u32 audmux_p4_input_txclk_amx; - u32 audmux_p4_input_txfs_amx; - u32 audmux_p7_input_da_amx; - u32 audmux_p7_input_txfs_amx; - u32 can1_ipp_ind_canrx; - u32 can2_ipp_ind_canrx; - u32 csi_ipp_csi_d_0; - u32 csi_ipp_csi_d_1; - u32 cspi1_ipp_ind_ss3_b; - u32 cspi2_ipp_cspi_clk_in; - u32 cspi2_ipp_ind_dataready_b; - u32 cspi2_ipp_ind_miso; - u32 cspi2_ipp_ind_mosi; - u32 cspi2_ipp_ind_ss0_b; - u32 cspi2_ipp_ind_ss1_b; - u32 cspi3_ipp_cspi_clk_in; - u32 cspi3_ipp_ind_dataready_b; - u32 cspi3_ipp_ind_miso; - u32 cspi3_ipp_ind_mosi; - u32 cspi3_ipp_ind_ss0_b; - u32 cspi3_ipp_ind_ss1_b; - u32 cspi3_ipp_ind_ss2_b; - u32 cspi3_ipp_ind_ss3_b; - u32 esdhc1_ipp_dat4_in; - u32 esdhc1_ipp_dat5_in; - u32 esdhc1_ipp_dat6_in; - u32 esdhc1_ipp_dat7_in; - u32 esdhc2_ipp_card_clk_in; - u32 esdhc2_ipp_cmd_in; - u32 esdhc2_ipp_dat0_in; - u32 esdhc2_ipp_dat1_in; - u32 esdhc2_ipp_dat2_in; - u32 esdhc2_ipp_dat3_in; - u32 esdhc2_ipp_dat4_in; - u32 esdhc2_ipp_dat5_in; - u32 esdhc2_ipp_dat6_in; - u32 esdhc2_ipp_dat7_in; - u32 fec_fec_col; - u32 fec_fec_crs; - u32 fec_fec_rdata_2; - u32 fec_fec_rdata_3; - u32 fec_fec_rx_clk; - u32 fec_fec_rx_er; - u32 i2c2_ipp_scl_in; - u32 i2c2_ipp_sda_in; - u32 i2c3_ipp_scl_in; - u32 i2c3_ipp_sda_in; - u32 kpp_ipp_ind_col_4; - u32 kpp_ipp_ind_col_5; - u32 kpp_ipp_ind_col_6; - u32 kpp_ipp_ind_col_7; - u32 kpp_ipp_ind_row_4; - u32 kpp_ipp_ind_row_5; - u32 kpp_ipp_ind_row_6; - u32 kpp_ipp_ind_row_7; - u32 sim1_pin_sim_rcvd1_in; - u32 sim1_pin_sim_simpd1; - u32 sim1_sim_rcvd1_io; - u32 sim2_pin_sim_rcvd1_in; - u32 sim2_pin_sim_simpd1; - u32 sim2_sim_rcvd1_io; - u32 uart3_ipp_uart_rts_b; - u32 uart3_ipp_uart_rxd_mux; - u32 uart4_ipp_uart_rts_b; - u32 uart4_ipp_uart_rxd_mux; - u32 uart5_ipp_uart_rts_b; - u32 uart5_ipp_uart_rxd_mux; - u32 usb_top_ipp_ind_otg_usb_oc; - u32 usb_top_ipp_ind_uh2_usb_oc; -}; diff --git a/arch/arm/include/asm/arch-mx27/asm-offsets.h b/arch/arm/include/asm/arch-mx27/asm-offsets.h deleted file mode 100644 index 497afe5..0000000 --- a/arch/arm/include/asm/arch-mx27/asm-offsets.h +++ /dev/null @@ -1,16 +0,0 @@ -#define AIPI1_PSR0 0x10000000 -#define AIPI1_PSR1 0x10000004 -#define AIPI2_PSR0 0x10020000 -#define AIPI2_PSR1 0x10020004 -#define CSCR 0x10027000 -#define MPCTL0 0x10027004 -#define SPCTL0 0x1002700c -#define PCDR0 0x10027018 -#define PCDR1 0x1002701c -#define PCCR0 0x10027020 -#define PCCR1 0x10027024 -#define ESDCTL0_ROF 0x00 -#define ESDCFG0_ROF 0x04 -#define ESDCTL1_ROF 0x08 -#define ESDCFG1_ROF 0x0C -#define ESDMISC_ROF 0x10 diff --git a/arch/arm/include/asm/arch-mx27/clock.h b/arch/arm/include/asm/arch-mx27/clock.h deleted file mode 100644 index 7e9c7aa..0000000 --- a/arch/arm/include/asm/arch-mx27/clock.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * - * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H -unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); - -ulong imx_get_mpllclk(void); -ulong imx_get_armclk(void); -ulong imx_get_spllclk(void); -ulong imx_get_fclk(void); -ulong imx_get_hclk(void); -ulong imx_get_bclk(void); -ulong imx_get_perclk1(void); -ulong imx_get_perclk2(void); -ulong imx_get_perclk3(void); -ulong imx_get_ahbclk(void); - -#define imx_get_uartclk imx_get_perclk1 -#define imx_get_fecclk imx_get_ahbclk - -#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h deleted file mode 100644 index 8f40aa7..0000000 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ /dev/null @@ -1,526 +0,0 @@ -/* - * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> - * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _IMX_REGS_H -#define _IMX_REGS_H - -#ifndef __ASSEMBLY__ - -extern void imx_gpio_mode (int gpio_mode); - -#ifdef CONFIG_MXC_UART -extern void mx27_uart_init_pins(void); -#endif /* CONFIG_MXC_UART */ - -#ifdef CONFIG_FEC_MXC -extern void mx27_fec_init_pins(void); -extern void imx_get_mac_from_fuse(unsigned char *mac); -#endif /* CONFIG_FEC_MXC */ - -#ifdef CONFIG_MXC_MMC -extern void mx27_sd1_init_pins(void); -extern void mx27_sd2_init_pins(void); -#endif /* CONFIG_MXC_MMC */ - -/* AIPI */ -struct aipi_regs { - u32 psr0; - u32 psr1; -}; - -/* System Control */ -struct system_control_regs { - u32 res[5]; - u32 fmcr; - u32 gpcr; - u32 wbcr; - u32 dscr1; - u32 dscr2; - u32 dscr3; - u32 dscr4; - u32 dscr5; - u32 dscr6; - u32 dscr7; - u32 dscr8; - u32 dscr9; - u32 dscr10; - u32 dscr11; - u32 dscr12; - u32 dscr13; - u32 pscr; - u32 pmcr; - u32 res1; - u32 dcvr0; - u32 dcvr1; - u32 dcvr2; - u32 dcvr3; -}; - -/* Chip Select Registers */ -struct weim_regs { - u32 cs0u; /* Chip Select 0 Upper Register */ - u32 cs0l; /* Chip Select 0 Lower Register */ - u32 cs0a; /* Chip Select 0 Addition Register */ - u32 pad0; - u32 cs1u; /* Chip Select 1 Upper Register */ - u32 cs1l; /* Chip Select 1 Lower Register */ - u32 cs1a; /* Chip Select 1 Addition Register */ - u32 pad1; - u32 cs2u; /* Chip Select 2 Upper Register */ - u32 cs2l; /* Chip Select 2 Lower Register */ - u32 cs2a; /* Chip Select 2 Addition Register */ - u32 pad2; - u32 cs3u; /* Chip Select 3 Upper Register */ - u32 cs3l; /* Chip Select 3 Lower Register */ - u32 cs3a; /* Chip Select 3 Addition Register */ - u32 pad3; - u32 cs4u; /* Chip Select 4 Upper Register */ - u32 cs4l; /* Chip Select 4 Lower Register */ - u32 cs4a; /* Chip Select 4 Addition Register */ - u32 pad4; - u32 cs5u; /* Chip Select 5 Upper Register */ - u32 cs5l; /* Chip Select 5 Lower Register */ - u32 cs5a; /* Chip Select 5 Addition Register */ - u32 pad5; - u32 eim; /* WEIM Configuration Register */ -}; - -/* SDRAM Controller registers */ -struct esdramc_regs { -/* Enhanced SDRAM Control Register 0 */ - u32 esdctl0; -/* Enhanced SDRAM Configuration Register 0 */ - u32 esdcfg0; -/* Enhanced SDRAM Control Register 1 */ - u32 esdctl1; -/* Enhanced SDRAM Configuration Register 1 */ - u32 esdcfg1; -/* Enhanced SDRAM Miscellanious Register */ - u32 esdmisc; -}; - -/* Watchdog Registers*/ -struct wdog_regs { - u32 wcr; - u32 wsr; - u32 wstr; -}; - -/* PLL registers */ -struct pll_regs { - u32 cscr; /* Clock Source Control Register */ - u32 mpctl0; /* MCU PLL Control Register 0 */ - u32 mpctl1; /* MCU PLL Control Register 1 */ - u32 spctl0; /* System PLL Control Register 0 */ - u32 spctl1; /* System PLL Control Register 1 */ - u32 osc26mctl; /* Oscillator 26M Register */ - u32 pcdr0; /* Peripheral Clock Divider Register 0 */ - u32 pcdr1; /* Peripheral Clock Divider Register 1 */ - u32 pccr0; /* Peripheral Clock Control Register 0 */ - u32 pccr1; /* Peripheral Clock Control Register 1 */ - u32 ccsr; /* Clock Control Status Register */ -}; - -/* - * Definitions for the clocksource registers - */ -struct gpt_regs { - u32 gpt_tctl; - u32 gpt_tprer; - u32 gpt_tcmp; - u32 gpt_tcr; - u32 gpt_tcn; - u32 gpt_tstat; -}; - -/* - * GPIO Module and I/O Multiplexer - */ -#define PORTA 0 -#define PORTB 1 -#define PORTC 2 -#define PORTD 3 -#define PORTE 4 -#define PORTF 5 - -struct gpio_regs { - struct { - u32 ddir; - u32 ocr1; - u32 ocr2; - u32 iconfa1; - u32 iconfa2; - u32 iconfb1; - u32 iconfb2; - u32 dr; - u32 gius; - u32 ssr; - u32 icr1; - u32 icr2; - u32 imr; - u32 isr; - u32 gpr; - u32 swr; - u32 puen; - u32 res[0x2f]; - } port[6]; -}; - -/* IIM Control Registers */ -struct iim_regs { - u32 iim_stat; - u32 iim_statm; - u32 iim_err; - u32 iim_emask; - u32 iim_fctl; - u32 iim_ua; - u32 iim_la; - u32 iim_sdat; - u32 iim_prev; - u32 iim_srev; - u32 iim_prog_p; - u32 iim_scs0; - u32 iim_scs1; - u32 iim_scs2; - u32 iim_scs3; - u32 res[0x1f1]; - struct fuse_bank { - u32 fuse_regs[0x20]; - u32 fuse_rsvd[0xe0]; - } bank[1]; -}; - -struct fuse_bank0_regs { - u32 fuse0_3[5]; - u32 mac_addr[6]; - u32 fuse10_31[0x16]; -}; - -#endif - -#define IMX_IO_BASE 0x10000000 - -#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) -#define IMX_WDT_BASE (0x02000 + IMX_IO_BASE) -#define IMX_TIM1_BASE (0x03000 + IMX_IO_BASE) -#define IMX_TIM2_BASE (0x04000 + IMX_IO_BASE) -#define IMX_TIM3_BASE (0x05000 + IMX_IO_BASE) -#define IMX_UART1_BASE (0x0a000 + IMX_IO_BASE) -#define IMX_UART2_BASE (0x0b000 + IMX_IO_BASE) -#define IMX_UART3_BASE (0x0c000 + IMX_IO_BASE) -#define IMX_UART4_BASE (0x0d000 + IMX_IO_BASE) -#define IMX_I2C1_BASE (0x12000 + IMX_IO_BASE) -#define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE) -#define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE) -#define IMX_TIM5_BASE (0x1a000 + IMX_IO_BASE) -#define IMX_UART5_BASE (0x1b000 + IMX_IO_BASE) -#define IMX_UART6_BASE (0x1c000 + IMX_IO_BASE) -#define IMX_I2C2_BASE (0x1D000 + IMX_IO_BASE) -#define IMX_TIM6_BASE (0x1f000 + IMX_IO_BASE) -#define IMX_AIPI2_BASE (0x20000 + IMX_IO_BASE) -#define IMX_PLL_BASE (0x27000 + IMX_IO_BASE) -#define IMX_SYSTEM_CTL_BASE (0x27800 + IMX_IO_BASE) -#define IMX_IIM_BASE (0x28000 + IMX_IO_BASE) -#define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE) - -#define IMX_ESD_BASE (0xD8001000) -#define IMX_WEIM_BASE (0xD8002000) - -/* FMCR System Control bit definition*/ -#define UART4_RXD_CTL (1 << 25) -#define UART4_RTS_CTL (1 << 24) -#define KP_COL6_CTL (1 << 18) -#define KP_ROW7_CTL (1 << 17) -#define KP_ROW6_CTL (1 << 16) -#define PC_WAIT_B_CTL (1 << 14) -#define PC_READY_CTL (1 << 13) -#define PC_VS1_CTL (1 << 12) -#define PC_VS2_CTL (1 << 11) -#define PC_BVD1_CTL (1 << 10) -#define PC_BVD2_CTL (1 << 9) -#define IOS16_CTL (1 << 8) -#define NF_FMS (1 << 5) -#define NF_16BIT_SEL (1 << 4) -#define SLCDC_SEL (1 << 2) -#define SDCS1_SEL (1 << 1) -#define SDCS0_SEL (1 << 0) - - -/* important definition of some bits of WCR */ -#define WCR_WDE 0x04 - -#define CSCR_MPEN (1 << 0) -#define CSCR_SPEN (1 << 1) -#define CSCR_FPM_EN (1 << 2) -#define CSCR_OSC26M_DIS (1 << 3) -#define CSCR_OSC26M_DIV1P5 (1 << 4) -#define CSCR_AHB_DIV -#define CSCR_ARM_DIV -#define CSCR_ARM_SRC_MPLL (1 << 15) -#define CSCR_MCU_SEL (1 << 16) -#define CSCR_SP_SEL (1 << 17) -#define CSCR_MPLL_RESTART (1 << 18) -#define CSCR_SPLL_RESTART (1 << 19) -#define CSCR_MSHC_SEL (1 << 20) -#define CSCR_H264_SEL (1 << 21) -#define CSCR_SSI1_SEL (1 << 22) -#define CSCR_SSI2_SEL (1 << 23) -#define CSCR_SD_CNT -#define CSCR_USB_DIV -#define CSCR_UPDATE_DIS (1 << 31) - -#define MPCTL1_BRMO (1 << 6) -#define MPCTL1_LF (1 << 15) - -#define PCCR0_SSI2_EN (1 << 0) -#define PCCR0_SSI1_EN (1 << 1) -#define PCCR0_SLCDC_EN (1 << 2) -#define PCCR0_SDHC3_EN (1 << 3) -#define PCCR0_SDHC2_EN (1 << 4) -#define PCCR0_SDHC1_EN (1 << 5) -#define PCCR0_SDC_EN (1 << 6) -#define PCCR0_SAHARA_EN (1 << 7) -#define PCCR0_RTIC_EN (1 << 8) -#define PCCR0_RTC_EN (1 << 9) -#define PCCR0_PWM_EN (1 << 11) -#define PCCR0_OWIRE_EN (1 << 12) -#define PCCR0_MSHC_EN (1 << 13) -#define PCCR0_LCDC_EN (1 << 14) -#define PCCR0_KPP_EN (1 << 15) -#define PCCR0_IIM_EN (1 << 16) -#define PCCR0_I2C2_EN (1 << 17) -#define PCCR0_I2C1_EN (1 << 18) -#define PCCR0_GPT6_EN (1 << 19) -#define PCCR0_GPT5_EN (1 << 20) -#define PCCR0_GPT4_EN (1 << 21) -#define PCCR0_GPT3_EN (1 << 22) -#define PCCR0_GPT2_EN (1 << 23) -#define PCCR0_GPT1_EN (1 << 24) -#define PCCR0_GPIO_EN (1 << 25) -#define PCCR0_FEC_EN (1 << 26) -#define PCCR0_EMMA_EN (1 << 27) -#define PCCR0_DMA_EN (1 << 28) -#define PCCR0_CSPI3_EN (1 << 29) -#define PCCR0_CSPI2_EN (1 << 30) -#define PCCR0_CSPI1_EN (1 << 31) - -#define PCCR1_MSHC_BAUDEN (1 << 2) -#define PCCR1_NFC_BAUDEN (1 << 3) -#define PCCR1_SSI2_BAUDEN (1 << 4) -#define PCCR1_SSI1_BAUDEN (1 << 5) -#define PCCR1_H264_BAUDEN (1 << 6) -#define PCCR1_PERCLK4_EN (1 << 7) -#define PCCR1_PERCLK3_EN (1 << 8) -#define PCCR1_PERCLK2_EN (1 << 9) -#define PCCR1_PERCLK1_EN (1 << 10) -#define PCCR1_HCLK_USB (1 << 11) -#define PCCR1_HCLK_SLCDC (1 << 12) -#define PCCR1_HCLK_SAHARA (1 << 13) -#define PCCR1_HCLK_RTIC (1 << 14) -#define PCCR1_HCLK_LCDC (1 << 15) -#define PCCR1_HCLK_H264 (1 << 16) -#define PCCR1_HCLK_FEC (1 << 17) -#define PCCR1_HCLK_EMMA (1 << 18) -#define PCCR1_HCLK_EMI (1 << 19) -#define PCCR1_HCLK_DMA (1 << 20) -#define PCCR1_HCLK_CSI (1 << 21) -#define PCCR1_HCLK_BROM (1 << 22) -#define PCCR1_HCLK_ATA (1 << 23) -#define PCCR1_WDT_EN (1 << 24) -#define PCCR1_USB_EN (1 << 25) -#define PCCR1_UART6_EN (1 << 26) -#define PCCR1_UART5_EN (1 << 27) -#define PCCR1_UART4_EN (1 << 28) -#define PCCR1_UART3_EN (1 << 29) -#define PCCR1_UART2_EN (1 << 30) -#define PCCR1_UART1_EN (1 << 31) - -/* SDRAM Controller registers bitfields */ -#define ESDCTL_PRCT(x) (((x) & 0x3f) << 0) -#define ESDCTL_BL (1 << 7) -#define ESDCTL_FP (1 << 8) -#define ESDCTL_PWDT(x) (((x) & 3) << 10) -#define ESDCTL_SREFR(x) (((x) & 7) << 13) -#define ESDCTL_DSIZ_16_UPPER (0 << 16) -#define ESDCTL_DSIZ_16_LOWER (1 << 16) -#define ESDCTL_DSIZ_32 (2 << 16) -#define ESDCTL_COL8 (0 << 20) -#define ESDCTL_COL9 (1 << 20) -#define ESDCTL_COL10 (2 << 20) -#define ESDCTL_ROW11 (0 << 24) -#define ESDCTL_ROW12 (1 << 24) -#define ESDCTL_ROW13 (2 << 24) -#define ESDCTL_ROW14 (3 << 24) -#define ESDCTL_ROW15 (4 << 24) -#define ESDCTL_SP (1 << 27) -#define ESDCTL_SMODE_NORMAL (0 << 28) -#define ESDCTL_SMODE_PRECHARGE (1 << 28) -#define ESDCTL_SMODE_AUTO_REF (2 << 28) -#define ESDCTL_SMODE_LOAD_MODE (3 << 28) -#define ESDCTL_SMODE_MAN_REF (4 << 28) -#define ESDCTL_SDE (1 << 31) - -#define ESDCFG_TRC(x) (((x) & 0xf) << 0) -#define ESDCFG_TRCD(x) (((x) & 0x7) << 4) -#define ESDCFG_TCAS(x) (((x) & 0x3) << 8) -#define ESDCFG_TRRD(x) (((x) & 0x3) << 10) -#define ESDCFG_TRAS(x) (((x) & 0x7) << 12) -#define ESDCFG_TWR (1 << 15) -#define ESDCFG_TMRD(x) (((x) & 0x3) << 16) -#define ESDCFG_TRP(x) (((x) & 0x3) << 18) -#define ESDCFG_TWTR (1 << 20) -#define ESDCFG_TXP(x) (((x) & 0x3) << 21) - -#define ESDMISC_RST (1 << 1) -#define ESDMISC_MDDREN (1 << 2) -#define ESDMISC_MDDR_DL_RST (1 << 3) -#define ESDMISC_MDDR_MDIS (1 << 4) -#define ESDMISC_LHD (1 << 5) -#define ESDMISC_MA10_SHARE (1 << 6) -#define ESDMISC_SDRAM_RDY (1 << 31) - -#define PC5_PF_I2C2_DATA (GPIO_PORTC | GPIO_OUT | GPIO_PF | 5) -#define PC6_PF_I2C2_CLK (GPIO_PORTC | GPIO_OUT | GPIO_PF | 6) -#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 7) -#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 8) -#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 9) -#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 10) -#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 11) -#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 12) -#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 13) - -#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 0) -#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 1) -#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 2) -#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 3) -#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 4) -#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 5) -#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 6) -#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 7) -#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_IN | GPIO_AF | 8) -#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 9) -#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 10) -#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 11) -#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 12) -#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 13) -#define PD14_AOUT_FEC_CLR (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 14) -#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 15) -#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16) -#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_OUT | GPIO_AIN | 23) - -#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_OUT | GPIO_PF | 0) -#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_OUT | GPIO_PF | 1) -#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2) -#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3) -#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4) -#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6) -#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7) -#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8) -#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 9) -#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 10) -#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 11) -#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 12) -#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) -#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) -#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) -#define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18) -#define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19) -#define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20) -#define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21) -#define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22) -#define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23) -#define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) -#define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) -#define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) -#define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) -#define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) -#define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) -#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) -#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) -#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_OUT | GPIO_PF | 24) -#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_OUT | GPIO_PF | 25) - -/* Clocksource Bitfields */ -#define TCTL_SWR (1 << 15) /* Software reset */ -#define TCTL_FRR (1 << 8) /* Freerun / restart */ -#define TCTL_CAP (3 << 6) /* Capture Edge */ -#define TCTL_OM (1 << 5) /* output mode */ -#define TCTL_IRQEN (1 << 4) /* interrupt enable */ -#define TCTL_CLKSOURCE 1 /* Clock source bit position */ -#define TCTL_TEN 1 /* Timer enable */ -#define TPRER_PRES 0xff /* Prescale */ -#define TSTAT_CAPT (1 << 1) /* Capture event */ -#define TSTAT_COMP 1 /* Compare event */ - -#define GPIO_PIN_MASK 0x1f - -#define GPIO_PORT_SHIFT 5 -#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) - -#define GPIO_PORTA (PORTA << GPIO_PORT_SHIFT) -#define GPIO_PORTB (PORTB << GPIO_PORT_SHIFT) -#define GPIO_PORTC (PORTC << GPIO_PORT_SHIFT) -#define GPIO_PORTD (PORTD << GPIO_PORT_SHIFT) -#define GPIO_PORTE (PORTE << GPIO_PORT_SHIFT) -#define GPIO_PORTF (PORTF << GPIO_PORT_SHIFT) - -#define GPIO_OUT (1 << 8) -#define GPIO_IN (0 << 8) -#define GPIO_PUEN (1 << 9) - -#define GPIO_PF (1 << 10) -#define GPIO_AF (1 << 11) - -#define GPIO_OCR_SHIFT 12 -#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) -#define GPIO_AIN (0 << GPIO_OCR_SHIFT) -#define GPIO_BIN (1 << GPIO_OCR_SHIFT) -#define GPIO_CIN (2 << GPIO_OCR_SHIFT) -#define GPIO_GPIO (3 << GPIO_OCR_SHIFT) - -#define GPIO_AOUT_SHIFT 14 -#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) - -#define GPIO_BOUT_SHIFT 16 -#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) - -#define IIM_STAT_BUSY (1 << 7) -#define IIM_STAT_PRGD (1 << 1) -#define IIM_STAT_SNSD (1 << 0) -#define IIM_ERR_PRGE (1 << 7) -#define IIM_ERR_WPE (1 << 6) -#define IIM_ERR_OPE (1 << 5) -#define IIM_ERR_RPE (1 << 4) -#define IIM_ERR_WLRE (1 << 3) -#define IIM_ERR_SNSE (1 << 2) -#define IIM_ERR_PARITYE (1 << 1) - -#endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx27/mxcmmc.h b/arch/arm/include/asm/arch-mx27/mxcmmc.h deleted file mode 100644 index 4c83cc7..0000000 --- a/arch/arm/include/asm/arch-mx27/mxcmmc.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef ASM_ARCH_MXCMMC_H -#define ASM_ARCH_MXCMMC_H - -int mxc_mmc_init(bd_t *bis); - -#endif diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h deleted file mode 100644 index 105f7d8..0000000 --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h +++ /dev/null @@ -1,742 +0,0 @@ -/* - * - * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MX31_REGS_H -#define __ASM_ARCH_MX31_REGS_H - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> - -/* Clock control module registers */ -struct clock_control_regs { - u32 ccmr; - u32 pdr0; - u32 pdr1; - u32 rcsr; - u32 mpctl; - u32 upctl; - u32 spctl; - u32 cosr; - u32 cgr0; - u32 cgr1; - u32 cgr2; - u32 wimr0; - u32 ldc; - u32 dcvr0; - u32 dcvr1; - u32 dcvr2; - u32 dcvr3; - u32 ltr0; - u32 ltr1; - u32 ltr2; - u32 ltr3; - u32 ltbr0; - u32 ltbr1; - u32 pmcr0; - u32 pmcr1; - u32 pdr2; -}; - -/* GPIO Registers */ -struct gpio_regs { - u32 gpio_dr; - u32 gpio_dir; - u32 gpio_psr; -}; - -struct cspi_regs { - u32 rxdata; - u32 txdata; - u32 ctrl; - u32 intr; - u32 dma; - u32 stat; - u32 period; - u32 test; -}; - -#define IOMUX_PADNUM_MASK 0x1ff -#define IOMUX_PIN(gpionum, padnum) ((padnum) & IOMUX_PADNUM_MASK) - -/* - * various IOMUX pad functions - */ -enum iomux_pad_config { - PAD_CTL_NOLOOPBACK = 0x0 << 9, - PAD_CTL_LOOPBACK = 0x1 << 9, - PAD_CTL_PKE_NONE = 0x0 << 8, - PAD_CTL_PKE_ENABLE = 0x1 << 8, - PAD_CTL_PUE_KEEPER = 0x0 << 7, - PAD_CTL_PUE_PUD = 0x1 << 7, - PAD_CTL_100K_PD = 0x0 << 5, - PAD_CTL_100K_PU = 0x1 << 5, - PAD_CTL_47K_PU = 0x2 << 5, - PAD_CTL_22K_PU = 0x3 << 5, - PAD_CTL_HYS_CMOS = 0x0 << 4, - PAD_CTL_HYS_SCHMITZ = 0x1 << 4, - PAD_CTL_ODE_CMOS = 0x0 << 3, - PAD_CTL_ODE_OpenDrain = 0x1 << 3, - PAD_CTL_DRV_NORMAL = 0x0 << 1, - PAD_CTL_DRV_HIGH = 0x1 << 1, - PAD_CTL_DRV_MAX = 0x2 << 1, - PAD_CTL_SRE_SLOW = 0x0 << 0, - PAD_CTL_SRE_FAST = 0x1 << 0 -}; - -/* - * This enumeration is constructed based on the Section - * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated - * value is constructed based on the rules described above. - */ - -enum iomux_pins { - MX31_PIN_TTM_PAD = IOMUX_PIN(0xff, 0), - MX31_PIN_CSPI3_SPI_RDY = IOMUX_PIN(0xff, 1), - MX31_PIN_CSPI3_SCLK = IOMUX_PIN(0xff, 2), - MX31_PIN_CSPI3_MISO = IOMUX_PIN(0xff, 3), - MX31_PIN_CSPI3_MOSI = IOMUX_PIN(0xff, 4), - MX31_PIN_CLKSS = IOMUX_PIN(0xff, 5), - MX31_PIN_CE_CONTROL = IOMUX_PIN(0xff, 6), - MX31_PIN_ATA_RESET_B = IOMUX_PIN(95, 7), - MX31_PIN_ATA_DMACK = IOMUX_PIN(94, 8), - MX31_PIN_ATA_DIOW = IOMUX_PIN(93, 9), - MX31_PIN_ATA_DIOR = IOMUX_PIN(92, 10), - MX31_PIN_ATA_CS1 = IOMUX_PIN(91, 11), - MX31_PIN_ATA_CS0 = IOMUX_PIN(90, 12), - MX31_PIN_SD1_DATA3 = IOMUX_PIN(63, 13), - MX31_PIN_SD1_DATA2 = IOMUX_PIN(62, 14), - MX31_PIN_SD1_DATA1 = IOMUX_PIN(61, 15), - MX31_PIN_SD1_DATA0 = IOMUX_PIN(60, 16), - MX31_PIN_SD1_CLK = IOMUX_PIN(59, 17), - MX31_PIN_SD1_CMD = IOMUX_PIN(58, 18), - MX31_PIN_D3_SPL = IOMUX_PIN(0xff, 19), - MX31_PIN_D3_CLS = IOMUX_PIN(0xff, 20), - MX31_PIN_D3_REV = IOMUX_PIN(0xff, 21), - MX31_PIN_CONTRAST = IOMUX_PIN(0xff, 22), - MX31_PIN_VSYNC3 = IOMUX_PIN(0xff, 23), - MX31_PIN_READ = IOMUX_PIN(0xff, 24), - MX31_PIN_WRITE = IOMUX_PIN(0xff, 25), - MX31_PIN_PAR_RS = IOMUX_PIN(0xff, 26), - MX31_PIN_SER_RS = IOMUX_PIN(89, 27), - MX31_PIN_LCS1 = IOMUX_PIN(88, 28), - MX31_PIN_LCS0 = IOMUX_PIN(87, 29), - MX31_PIN_SD_D_CLK = IOMUX_PIN(86, 30), - MX31_PIN_SD_D_IO = IOMUX_PIN(85, 31), - MX31_PIN_SD_D_I = IOMUX_PIN(84, 32), - MX31_PIN_DRDY0 = IOMUX_PIN(0xff, 33), - MX31_PIN_FPSHIFT = IOMUX_PIN(0xff, 34), - MX31_PIN_HSYNC = IOMUX_PIN(0xff, 35), - MX31_PIN_VSYNC0 = IOMUX_PIN(0xff, 36), - MX31_PIN_LD17 = IOMUX_PIN(0xff, 37), - MX31_PIN_LD16 = IOMUX_PIN(0xff, 38), - MX31_PIN_LD15 = IOMUX_PIN(0xff, 39), - MX31_PIN_LD14 = IOMUX_PIN(0xff, 40), - MX31_PIN_LD13 = IOMUX_PIN(0xff, 41), - MX31_PIN_LD12 = IOMUX_PIN(0xff, 42), - MX31_PIN_LD11 = IOMUX_PIN(0xff, 43), - MX31_PIN_LD10 = IOMUX_PIN(0xff, 44), - MX31_PIN_LD9 = IOMUX_PIN(0xff, 45), - MX31_PIN_LD8 = IOMUX_PIN(0xff, 46), - MX31_PIN_LD7 = IOMUX_PIN(0xff, 47), - MX31_PIN_LD6 = IOMUX_PIN(0xff, 48), - MX31_PIN_LD5 = IOMUX_PIN(0xff, 49), - MX31_PIN_LD4 = IOMUX_PIN(0xff, 50), - MX31_PIN_LD3 = IOMUX_PIN(0xff, 51), - MX31_PIN_LD2 = IOMUX_PIN(0xff, 52), - MX31_PIN_LD1 = IOMUX_PIN(0xff, 53), - MX31_PIN_LD0 = IOMUX_PIN(0xff, 54), - MX31_PIN_USBH2_DATA1 = IOMUX_PIN(0xff, 55), - MX31_PIN_USBH2_DATA0 = IOMUX_PIN(0xff, 56), - MX31_PIN_USBH2_NXT = IOMUX_PIN(0xff, 57), - MX31_PIN_USBH2_STP = IOMUX_PIN(0xff, 58), - MX31_PIN_USBH2_DIR = IOMUX_PIN(0xff, 59), - MX31_PIN_USBH2_CLK = IOMUX_PIN(0xff, 60), - MX31_PIN_USBOTG_DATA7 = IOMUX_PIN(0xff, 61), - MX31_PIN_USBOTG_DATA6 = IOMUX_PIN(0xff, 62), - MX31_PIN_USBOTG_DATA5 = IOMUX_PIN(0xff, 63), - MX31_PIN_USBOTG_DATA4 = IOMUX_PIN(0xff, 64), - MX31_PIN_USBOTG_DATA3 = IOMUX_PIN(0xff, 65), - MX31_PIN_USBOTG_DATA2 = IOMUX_PIN(0xff, 66), - MX31_PIN_USBOTG_DATA1 = IOMUX_PIN(0xff, 67), - MX31_PIN_USBOTG_DATA0 = IOMUX_PIN(0xff, 68), - MX31_PIN_USBOTG_NXT = IOMUX_PIN(0xff, 69), - MX31_PIN_USBOTG_STP = IOMUX_PIN(0xff, 70), - MX31_PIN_USBOTG_DIR = IOMUX_PIN(0xff, 71), - MX31_PIN_USBOTG_CLK = IOMUX_PIN(0xff, 72), - MX31_PIN_USB_BYP = IOMUX_PIN(31, 73), - MX31_PIN_USB_OC = IOMUX_PIN(30, 74), - MX31_PIN_USB_PWR = IOMUX_PIN(29, 75), - MX31_PIN_SJC_MOD = IOMUX_PIN(0xff, 76), - MX31_PIN_DE_B = IOMUX_PIN(0xff, 77), - MX31_PIN_TRSTB = IOMUX_PIN(0xff, 78), - MX31_PIN_TDO = IOMUX_PIN(0xff, 79), - MX31_PIN_TDI = IOMUX_PIN(0xff, 80), - MX31_PIN_TMS = IOMUX_PIN(0xff, 81), - MX31_PIN_TCK = IOMUX_PIN(0xff, 82), - MX31_PIN_RTCK = IOMUX_PIN(0xff, 83), - MX31_PIN_KEY_COL7 = IOMUX_PIN(57, 84), - MX31_PIN_KEY_COL6 = IOMUX_PIN(56, 85), - MX31_PIN_KEY_COL5 = IOMUX_PIN(55, 86), - MX31_PIN_KEY_COL4 = IOMUX_PIN(54, 87), - MX31_PIN_KEY_COL3 = IOMUX_PIN(0xff, 88), - MX31_PIN_KEY_COL2 = IOMUX_PIN(0xff, 89), - MX31_PIN_KEY_COL1 = IOMUX_PIN(0xff, 90), - MX31_PIN_KEY_COL0 = IOMUX_PIN(0xff, 91), - MX31_PIN_KEY_ROW7 = IOMUX_PIN(53, 92), - MX31_PIN_KEY_ROW6 = IOMUX_PIN(52, 93), - MX31_PIN_KEY_ROW5 = IOMUX_PIN(51, 94), - MX31_PIN_KEY_ROW4 = IOMUX_PIN(50, 95), - MX31_PIN_KEY_ROW3 = IOMUX_PIN(0xff, 96), - MX31_PIN_KEY_ROW2 = IOMUX_PIN(0xff, 97), - MX31_PIN_KEY_ROW1 = IOMUX_PIN(0xff, 98), - MX31_PIN_KEY_ROW0 = IOMUX_PIN(0xff, 99), - MX31_PIN_BATT_LINE = IOMUX_PIN(49, 100), - MX31_PIN_CTS2 = IOMUX_PIN(0xff, 101), - MX31_PIN_RTS2 = IOMUX_PIN(0xff, 102), - MX31_PIN_TXD2 = IOMUX_PIN(28, 103), - MX31_PIN_RXD2 = IOMUX_PIN(27, 104), - MX31_PIN_DTR_DCE2 = IOMUX_PIN(48, 105), - MX31_PIN_DCD_DTE1 = IOMUX_PIN(47, 106), - MX31_PIN_RI_DTE1 = IOMUX_PIN(46, 107), - MX31_PIN_DSR_DTE1 = IOMUX_PIN(45, 108), - MX31_PIN_DTR_DTE1 = IOMUX_PIN(44, 109), - MX31_PIN_DCD_DCE1 = IOMUX_PIN(43, 110), - MX31_PIN_RI_DCE1 = IOMUX_PIN(42, 111), - MX31_PIN_DSR_DCE1 = IOMUX_PIN(41, 112), - MX31_PIN_DTR_DCE1 = IOMUX_PIN(40, 113), - MX31_PIN_CTS1 = IOMUX_PIN(39, 114), - MX31_PIN_RTS1 = IOMUX_PIN(38, 115), - MX31_PIN_TXD1 = IOMUX_PIN(37, 116), - MX31_PIN_RXD1 = IOMUX_PIN(36, 117), - MX31_PIN_CSPI2_SPI_RDY = IOMUX_PIN(0xff, 118), - MX31_PIN_CSPI2_SCLK = IOMUX_PIN(0xff, 119), - MX31_PIN_CSPI2_SS2 = IOMUX_PIN(0xff, 120), - MX31_PIN_CSPI2_SS1 = IOMUX_PIN(0xff, 121), - MX31_PIN_CSPI2_SS0 = IOMUX_PIN(0xff, 122), - MX31_PIN_CSPI2_MISO = IOMUX_PIN(0xff, 123), - MX31_PIN_CSPI2_MOSI = IOMUX_PIN(0xff, 124), - MX31_PIN_CSPI1_SPI_RDY = IOMUX_PIN(0xff, 125), - MX31_PIN_CSPI1_SCLK = IOMUX_PIN(0xff, 126), - MX31_PIN_CSPI1_SS2 = IOMUX_PIN(0xff, 127), - MX31_PIN_CSPI1_SS1 = IOMUX_PIN(0xff, 128), - MX31_PIN_CSPI1_SS0 = IOMUX_PIN(0xff, 129), - MX31_PIN_CSPI1_MISO = IOMUX_PIN(0xff, 130), - MX31_PIN_CSPI1_MOSI = IOMUX_PIN(0xff, 131), - MX31_PIN_SFS6 = IOMUX_PIN(26, 132), - MX31_PIN_SCK6 = IOMUX_PIN(25, 133), - MX31_PIN_SRXD6 = IOMUX_PIN(24, 134), - MX31_PIN_STXD6 = IOMUX_PIN(23, 135), - MX31_PIN_SFS5 = IOMUX_PIN(0xff, 136), - MX31_PIN_SCK5 = IOMUX_PIN(0xff, 137), - MX31_PIN_SRXD5 = IOMUX_PIN(22, 138), - MX31_PIN_STXD5 = IOMUX_PIN(21, 139), - MX31_PIN_SFS4 = IOMUX_PIN(0xff, 140), - MX31_PIN_SCK4 = IOMUX_PIN(0xff, 141), - MX31_PIN_SRXD4 = IOMUX_PIN(20, 142), - MX31_PIN_STXD4 = IOMUX_PIN(19, 143), - MX31_PIN_SFS3 = IOMUX_PIN(0xff, 144), - MX31_PIN_SCK3 = IOMUX_PIN(0xff, 145), - MX31_PIN_SRXD3 = IOMUX_PIN(18, 146), - MX31_PIN_STXD3 = IOMUX_PIN(17, 147), - MX31_PIN_I2C_DAT = IOMUX_PIN(0xff, 148), - MX31_PIN_I2C_CLK = IOMUX_PIN(0xff, 149), - MX31_PIN_CSI_PIXCLK = IOMUX_PIN(83, 150), - MX31_PIN_CSI_HSYNC = IOMUX_PIN(82, 151), - MX31_PIN_CSI_VSYNC = IOMUX_PIN(81, 152), - MX31_PIN_CSI_MCLK = IOMUX_PIN(80, 153), - MX31_PIN_CSI_D15 = IOMUX_PIN(79, 154), - MX31_PIN_CSI_D14 = IOMUX_PIN(78, 155), - MX31_PIN_CSI_D13 = IOMUX_PIN(77, 156), - MX31_PIN_CSI_D12 = IOMUX_PIN(76, 157), - MX31_PIN_CSI_D11 = IOMUX_PIN(75, 158), - MX31_PIN_CSI_D10 = IOMUX_PIN(74, 159), - MX31_PIN_CSI_D9 = IOMUX_PIN(73, 160), - MX31_PIN_CSI_D8 = IOMUX_PIN(72, 161), - MX31_PIN_CSI_D7 = IOMUX_PIN(71, 162), - MX31_PIN_CSI_D6 = IOMUX_PIN(70, 163), - MX31_PIN_CSI_D5 = IOMUX_PIN(69, 164), - MX31_PIN_CSI_D4 = IOMUX_PIN(68, 165), - MX31_PIN_M_GRANT = IOMUX_PIN(0xff, 166), - MX31_PIN_M_REQUEST = IOMUX_PIN(0xff, 167), - MX31_PIN_PC_POE = IOMUX_PIN(0xff, 168), - MX31_PIN_PC_RW_B = IOMUX_PIN(0xff, 169), - MX31_PIN_IOIS16 = IOMUX_PIN(0xff, 170), - MX31_PIN_PC_RST = IOMUX_PIN(0xff, 171), - MX31_PIN_PC_BVD2 = IOMUX_PIN(0xff, 172), - MX31_PIN_PC_BVD1 = IOMUX_PIN(0xff, 173), - MX31_PIN_PC_VS2 = IOMUX_PIN(0xff, 174), - MX31_PIN_PC_VS1 = IOMUX_PIN(0xff, 175), - MX31_PIN_PC_PWRON = IOMUX_PIN(0xff, 176), - MX31_PIN_PC_READY = IOMUX_PIN(0xff, 177), - MX31_PIN_PC_WAIT_B = IOMUX_PIN(0xff, 178), - MX31_PIN_PC_CD2_B = IOMUX_PIN(0xff, 179), - MX31_PIN_PC_CD1_B = IOMUX_PIN(0xff, 180), - MX31_PIN_D0 = IOMUX_PIN(0xff, 181), - MX31_PIN_D1 = IOMUX_PIN(0xff, 182), - MX31_PIN_D2 = IOMUX_PIN(0xff, 183), - MX31_PIN_D3 = IOMUX_PIN(0xff, 184), - MX31_PIN_D4 = IOMUX_PIN(0xff, 185), - MX31_PIN_D5 = IOMUX_PIN(0xff, 186), - MX31_PIN_D6 = IOMUX_PIN(0xff, 187), - MX31_PIN_D7 = IOMUX_PIN(0xff, 188), - MX31_PIN_D8 = IOMUX_PIN(0xff, 189), - MX31_PIN_D9 = IOMUX_PIN(0xff, 190), - MX31_PIN_D10 = IOMUX_PIN(0xff, 191), - MX31_PIN_D11 = IOMUX_PIN(0xff, 192), - MX31_PIN_D12 = IOMUX_PIN(0xff, 193), - MX31_PIN_D13 = IOMUX_PIN(0xff, 194), - MX31_PIN_D14 = IOMUX_PIN(0xff, 195), - MX31_PIN_D15 = IOMUX_PIN(0xff, 196), - MX31_PIN_NFRB = IOMUX_PIN(16, 197), - MX31_PIN_NFCE_B = IOMUX_PIN(15, 198), - MX31_PIN_NFWP_B = IOMUX_PIN(14, 199), - MX31_PIN_NFCLE = IOMUX_PIN(13, 200), - MX31_PIN_NFALE = IOMUX_PIN(12, 201), - MX31_PIN_NFRE_B = IOMUX_PIN(11, 202), - MX31_PIN_NFWE_B = IOMUX_PIN(10, 203), - MX31_PIN_SDQS3 = IOMUX_PIN(0xff, 204), - MX31_PIN_SDQS2 = IOMUX_PIN(0xff, 205), - MX31_PIN_SDQS1 = IOMUX_PIN(0xff, 206), - MX31_PIN_SDQS0 = IOMUX_PIN(0xff, 207), - MX31_PIN_SDCLK_B = IOMUX_PIN(0xff, 208), - MX31_PIN_SDCLK = IOMUX_PIN(0xff, 209), - MX31_PIN_SDCKE1 = IOMUX_PIN(0xff, 210), - MX31_PIN_SDCKE0 = IOMUX_PIN(0xff, 211), - MX31_PIN_SDWE = IOMUX_PIN(0xff, 212), - MX31_PIN_CAS = IOMUX_PIN(0xff, 213), - MX31_PIN_RAS = IOMUX_PIN(0xff, 214), - MX31_PIN_RW = IOMUX_PIN(0xff, 215), - MX31_PIN_BCLK = IOMUX_PIN(0xff, 216), - MX31_PIN_LBA = IOMUX_PIN(0xff, 217), - MX31_PIN_ECB = IOMUX_PIN(0xff, 218), - MX31_PIN_CS5 = IOMUX_PIN(0xff, 219), - MX31_PIN_CS4 = IOMUX_PIN(0xff, 220), - MX31_PIN_CS3 = IOMUX_PIN(0xff, 221), - MX31_PIN_CS2 = IOMUX_PIN(0xff, 222), - MX31_PIN_CS1 = IOMUX_PIN(0xff, 223), - MX31_PIN_CS0 = IOMUX_PIN(0xff, 224), - MX31_PIN_OE = IOMUX_PIN(0xff, 225), - MX31_PIN_EB1 = IOMUX_PIN(0xff, 226), - MX31_PIN_EB0 = IOMUX_PIN(0xff, 227), - MX31_PIN_DQM3 = IOMUX_PIN(0xff, 228), - MX31_PIN_DQM2 = IOMUX_PIN(0xff, 229), - MX31_PIN_DQM1 = IOMUX_PIN(0xff, 230), - MX31_PIN_DQM0 = IOMUX_PIN(0xff, 231), - MX31_PIN_SD31 = IOMUX_PIN(0xff, 232), - MX31_PIN_SD30 = IOMUX_PIN(0xff, 233), - MX31_PIN_SD29 = IOMUX_PIN(0xff, 234), - MX31_PIN_SD28 = IOMUX_PIN(0xff, 235), - MX31_PIN_SD27 = IOMUX_PIN(0xff, 236), - MX31_PIN_SD26 = IOMUX_PIN(0xff, 237), - MX31_PIN_SD25 = IOMUX_PIN(0xff, 238), - MX31_PIN_SD24 = IOMUX_PIN(0xff, 239), - MX31_PIN_SD23 = IOMUX_PIN(0xff, 240), - MX31_PIN_SD22 = IOMUX_PIN(0xff, 241), - MX31_PIN_SD21 = IOMUX_PIN(0xff, 242), - MX31_PIN_SD20 = IOMUX_PIN(0xff, 243), - MX31_PIN_SD19 = IOMUX_PIN(0xff, 244), - MX31_PIN_SD18 = IOMUX_PIN(0xff, 245), - MX31_PIN_SD17 = IOMUX_PIN(0xff, 246), - MX31_PIN_SD16 = IOMUX_PIN(0xff, 247), - MX31_PIN_SD15 = IOMUX_PIN(0xff, 248), - MX31_PIN_SD14 = IOMUX_PIN(0xff, 249), - MX31_PIN_SD13 = IOMUX_PIN(0xff, 250), - MX31_PIN_SD12 = IOMUX_PIN(0xff, 251), - MX31_PIN_SD11 = IOMUX_PIN(0xff, 252), - MX31_PIN_SD10 = IOMUX_PIN(0xff, 253), - MX31_PIN_SD9 = IOMUX_PIN(0xff, 254), - MX31_PIN_SD8 = IOMUX_PIN(0xff, 255), - MX31_PIN_SD7 = IOMUX_PIN(0xff, 256), - MX31_PIN_SD6 = IOMUX_PIN(0xff, 257), - MX31_PIN_SD5 = IOMUX_PIN(0xff, 258), - MX31_PIN_SD4 = IOMUX_PIN(0xff, 259), - MX31_PIN_SD3 = IOMUX_PIN(0xff, 260), - MX31_PIN_SD2 = IOMUX_PIN(0xff, 261), - MX31_PIN_SD1 = IOMUX_PIN(0xff, 262), - MX31_PIN_SD0 = IOMUX_PIN(0xff, 263), - MX31_PIN_SDBA0 = IOMUX_PIN(0xff, 264), - MX31_PIN_SDBA1 = IOMUX_PIN(0xff, 265), - MX31_PIN_A25 = IOMUX_PIN(0xff, 266), - MX31_PIN_A24 = IOMUX_PIN(0xff, 267), - MX31_PIN_A23 = IOMUX_PIN(0xff, 268), - MX31_PIN_A22 = IOMUX_PIN(0xff, 269), - MX31_PIN_A21 = IOMUX_PIN(0xff, 270), - MX31_PIN_A20 = IOMUX_PIN(0xff, 271), - MX31_PIN_A19 = IOMUX_PIN(0xff, 272), - MX31_PIN_A18 = IOMUX_PIN(0xff, 273), - MX31_PIN_A17 = IOMUX_PIN(0xff, 274), - MX31_PIN_A16 = IOMUX_PIN(0xff, 275), - MX31_PIN_A14 = IOMUX_PIN(0xff, 276), - MX31_PIN_A15 = IOMUX_PIN(0xff, 277), - MX31_PIN_A13 = IOMUX_PIN(0xff, 278), - MX31_PIN_A12 = IOMUX_PIN(0xff, 279), - MX31_PIN_A11 = IOMUX_PIN(0xff, 280), - MX31_PIN_MA10 = IOMUX_PIN(0xff, 281), - MX31_PIN_A10 = IOMUX_PIN(0xff, 282), - MX31_PIN_A9 = IOMUX_PIN(0xff, 283), - MX31_PIN_A8 = IOMUX_PIN(0xff, 284), - MX31_PIN_A7 = IOMUX_PIN(0xff, 285), - MX31_PIN_A6 = IOMUX_PIN(0xff, 286), - MX31_PIN_A5 = IOMUX_PIN(0xff, 287), - MX31_PIN_A4 = IOMUX_PIN(0xff, 288), - MX31_PIN_A3 = IOMUX_PIN(0xff, 289), - MX31_PIN_A2 = IOMUX_PIN(0xff, 290), - MX31_PIN_A1 = IOMUX_PIN(0xff, 291), - MX31_PIN_A0 = IOMUX_PIN(0xff, 292), - MX31_PIN_VPG1 = IOMUX_PIN(0xff, 293), - MX31_PIN_VPG0 = IOMUX_PIN(0xff, 294), - MX31_PIN_DVFS1 = IOMUX_PIN(0xff, 295), - MX31_PIN_DVFS0 = IOMUX_PIN(0xff, 296), - MX31_PIN_VSTBY = IOMUX_PIN(0xff, 297), - MX31_PIN_POWER_FAIL = IOMUX_PIN(0xff, 298), - MX31_PIN_CKIL = IOMUX_PIN(0xff, 299), - MX31_PIN_BOOT_MODE4 = IOMUX_PIN(0xff, 300), - MX31_PIN_BOOT_MODE3 = IOMUX_PIN(0xff, 301), - MX31_PIN_BOOT_MODE2 = IOMUX_PIN(0xff, 302), - MX31_PIN_BOOT_MODE1 = IOMUX_PIN(0xff, 303), - MX31_PIN_BOOT_MODE0 = IOMUX_PIN(0xff, 304), - MX31_PIN_CLKO = IOMUX_PIN(0xff, 305), - MX31_PIN_POR_B = IOMUX_PIN(0xff, 306), - MX31_PIN_RESET_IN_B = IOMUX_PIN(0xff, 307), - MX31_PIN_CKIH = IOMUX_PIN(0xff, 308), - MX31_PIN_SIMPD0 = IOMUX_PIN(35, 309), - MX31_PIN_SRX0 = IOMUX_PIN(34, 310), - MX31_PIN_STX0 = IOMUX_PIN(33, 311), - MX31_PIN_SVEN0 = IOMUX_PIN(32, 312), - MX31_PIN_SRST0 = IOMUX_PIN(67, 313), - MX31_PIN_SCLK0 = IOMUX_PIN(66, 314), - MX31_PIN_GPIO3_1 = IOMUX_PIN(65, 315), - MX31_PIN_GPIO3_0 = IOMUX_PIN(64, 316), - MX31_PIN_GPIO1_6 = IOMUX_PIN(6, 317), - MX31_PIN_GPIO1_5 = IOMUX_PIN(5, 318), - MX31_PIN_GPIO1_4 = IOMUX_PIN(4, 319), - MX31_PIN_GPIO1_3 = IOMUX_PIN(3, 320), - MX31_PIN_GPIO1_2 = IOMUX_PIN(2, 321), - MX31_PIN_GPIO1_1 = IOMUX_PIN(1, 322), - MX31_PIN_GPIO1_0 = IOMUX_PIN(0, 323), - MX31_PIN_PWMO = IOMUX_PIN(9, 324), - MX31_PIN_WATCHDOG_RST = IOMUX_PIN(0xff, 325), - MX31_PIN_COMPARE = IOMUX_PIN(8, 326), - MX31_PIN_CAPTURE = IOMUX_PIN(7, 327), -}; - -/* Bit definitions for RCSR register in CCM */ -#define CCM_RCSR_NF16B (1 << 31) -#define CCM_RCSR_NFMS (1 << 30) - -#endif - -#define __REG(x) (*((volatile u32 *)(x))) -#define __REG16(x) (*((volatile u16 *)(x))) -#define __REG8(x) (*((volatile u8 *)(x))) - -#define CCM_BASE 0x53f80000 -#define CCM_CCMR (CCM_BASE + 0x00) -#define CCM_PDR0 (CCM_BASE + 0x04) -#define CCM_PDR1 (CCM_BASE + 0x08) -#define CCM_RCSR (CCM_BASE + 0x0c) -#define CCM_MPCTL (CCM_BASE + 0x10) -#define CCM_UPCTL (CCM_BASE + 0x14) -#define CCM_SPCTL (CCM_BASE + 0x18) -#define CCM_COSR (CCM_BASE + 0x1C) -#define CCM_CGR0 (CCM_BASE + 0x20) -#define CCM_CGR1 (CCM_BASE + 0x24) -#define CCM_CGR2 (CCM_BASE + 0x28) - -#define CCMR_MDS (1 << 7) -#define CCMR_SBYCS (1 << 4) -#define CCMR_MPE (1 << 3) -#define CCMR_PRCS_MASK (3 << 1) -#define CCMR_FPM (1 << 1) -#define CCMR_CKIH (2 << 1) - -#define PDR0_CSI_PODF(x) (((x) & 0x1ff) << 23) -#define PDR0_PER_PODF(x) (((x) & 0x1f) << 16) -#define PDR0_HSP_PODF(x) (((x) & 0x7) << 11) -#define PDR0_NFC_PODF(x) (((x) & 0x7) << 8) -#define PDR0_IPG_PODF(x) (((x) & 0x3) << 6) -#define PDR0_MAX_PODF(x) (((x) & 0x7) << 3) -#define PDR0_MCU_PODF(x) ((x) & 0x7) - -#define PLL_PD(x) (((x) & 0xf) << 26) -#define PLL_MFD(x) (((x) & 0x3ff) << 16) -#define PLL_MFI(x) (((x) & 0xf) << 10) -#define PLL_MFN(x) (((x) & 0x3ff) << 0) - -#define WEIM_ESDCTL0 0xB8001000 -#define WEIM_ESDCFG0 0xB8001004 -#define WEIM_ESDCTL1 0xB8001008 -#define WEIM_ESDCFG1 0xB800100C -#define WEIM_ESDMISC 0xB8001010 - -#define ESDCTL_SDE (1 << 31) -#define ESDCTL_CMD_RW (0 << 28) -#define ESDCTL_CMD_PRECHARGE (1 << 28) -#define ESDCTL_CMD_AUTOREFRESH (2 << 28) -#define ESDCTL_CMD_LOADMODEREG (3 << 28) -#define ESDCTL_CMD_MANUALREFRESH (4 << 28) -#define ESDCTL_ROW_13 (2 << 24) -#define ESDCTL_ROW(x) ((x) << 24) -#define ESDCTL_COL_9 (1 << 20) -#define ESDCTL_COL(x) ((x) << 20) -#define ESDCTL_DSIZ(x) ((x) << 16) -#define ESDCTL_SREFR(x) ((x) << 13) -#define ESDCTL_PWDT(x) ((x) << 10) -#define ESDCTL_FP(x) ((x) << 8) -#define ESDCTL_BL(x) ((x) << 7) -#define ESDCTL_PRCT(x) ((x) << 0) - -#define WEIM_BASE 0xb8002000 -#define CSCR_U(x) (WEIM_BASE + (x) * 0x10) -#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10) -#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10) - -#define IOMUXC_BASE 0x43FAC000 -#define IOMUXC_GPR (IOMUXC_BASE + 0x8) -#define IOMUXC_SW_MUX_CTL(x) (IOMUXC_BASE + 0xc + (x) * 4) -#define IOMUXC_SW_PAD_CTL(x) (IOMUXC_BASE + 0x154 + (x) * 4) - -#define IPU_BASE 0x53fc0000 -#define IPU_CONF IPU_BASE - -#define IPU_CONF_PXL_ENDIAN (1<<8) -#define IPU_CONF_DU_EN (1<<7) -#define IPU_CONF_DI_EN (1<<6) -#define IPU_CONF_ADC_EN (1<<5) -#define IPU_CONF_SDC_EN (1<<4) -#define IPU_CONF_PF_EN (1<<3) -#define IPU_CONF_ROT_EN (1<<2) -#define IPU_CONF_IC_EN (1<<1) -#define IPU_CONF_SCI_EN (1<<0) - -#define ARM_PPMRR 0x40000015 - -#define WDOG_BASE 0x53FDC000 - -/* - * GPIO - */ -#define GPIO1_BASE_ADDR 0x53FCC000 -#define GPIO2_BASE_ADDR 0x53FD0000 -#define GPIO3_BASE_ADDR 0x53FA4000 -#define GPIO_DR 0x00000000 /* data register */ -#define GPIO_GDIR 0x00000004 /* direction register */ -#define GPIO_PSR 0x00000008 /* pad status register */ - -/* - * Signal Multiplexing (IOMUX) - */ - -/* bits in the SW_MUX_CTL registers */ -#define MUX_CTL_OUT_GPIO_DR (0 << 4) -#define MUX_CTL_OUT_FUNC (1 << 4) -#define MUX_CTL_OUT_ALT1 (2 << 4) -#define MUX_CTL_OUT_ALT2 (3 << 4) -#define MUX_CTL_OUT_ALT3 (4 << 4) -#define MUX_CTL_OUT_ALT4 (5 << 4) -#define MUX_CTL_OUT_ALT5 (6 << 4) -#define MUX_CTL_OUT_ALT6 (7 << 4) -#define MUX_CTL_IN_NONE (0 << 0) -#define MUX_CTL_IN_GPIO (1 << 0) -#define MUX_CTL_IN_FUNC (2 << 0) -#define MUX_CTL_IN_ALT1 (4 << 0) -#define MUX_CTL_IN_ALT2 (8 << 0) - -#define MUX_CTL_FUNC (MUX_CTL_OUT_FUNC | MUX_CTL_IN_FUNC) -#define MUX_CTL_ALT1 (MUX_CTL_OUT_ALT1 | MUX_CTL_IN_ALT1) -#define MUX_CTL_ALT2 (MUX_CTL_OUT_ALT2 | MUX_CTL_IN_ALT2) -#define MUX_CTL_GPIO (MUX_CTL_OUT_GPIO_DR | MUX_CTL_IN_GPIO) - -/* Register offsets based on IOMUXC_BASE */ -/* 0x00 .. 0x7b */ -#define MUX_CTL_USBH2_DATA1 0x40 -#define MUX_CTL_USBH2_DIR 0x44 -#define MUX_CTL_USBH2_STP 0x45 -#define MUX_CTL_USBH2_NXT 0x46 -#define MUX_CTL_USBH2_DATA0 0x47 -#define MUX_CTL_USBH2_CLK 0x4B -#define MUX_CTL_RTS1 0x7c -#define MUX_CTL_CTS1 0x7d -#define MUX_CTL_DTR_DCE1 0x7e -#define MUX_CTL_DSR_DCE1 0x7f -#define MUX_CTL_CSPI2_SCLK 0x80 -#define MUX_CTL_CSPI2_SPI_RDY 0x81 -#define MUX_CTL_RXD1 0x82 -#define MUX_CTL_TXD1 0x83 -#define MUX_CTL_CSPI2_MISO 0x84 -#define MUX_CTL_CSPI2_SS0 0x85 -#define MUX_CTL_CSPI2_SS1 0x86 -#define MUX_CTL_CSPI2_SS2 0x87 -#define MUX_CTL_CSPI1_SS2 0x88 -#define MUX_CTL_CSPI1_SCLK 0x89 -#define MUX_CTL_CSPI1_SPI_RDY 0x8a -#define MUX_CTL_CSPI2_MOSI 0x8b -#define MUX_CTL_CSPI1_MOSI 0x8c -#define MUX_CTL_CSPI1_MISO 0x8d -#define MUX_CTL_CSPI1_SS0 0x8e -#define MUX_CTL_CSPI1_SS1 0x8f -#define MUX_CTL_STXD6 0x90 -#define MUX_CTL_SRXD6 0x91 -#define MUX_CTL_SCK6 0x92 -#define MUX_CTL_SFS6 0x93 - -#define MUX_CTL_STXD3 0x9C -#define MUX_CTL_SRXD3 0x9D -#define MUX_CTL_SCK3 0x9E -#define MUX_CTL_SFS3 0x9F - -#define MUX_CTL_NFC_WP 0xD0 -#define MUX_CTL_NFC_CE 0xD1 -#define MUX_CTL_NFC_RB 0xD2 -#define MUX_CTL_NFC_WE 0xD4 -#define MUX_CTL_NFC_RE 0xD5 -#define MUX_CTL_NFC_ALE 0xD6 -#define MUX_CTL_NFC_CLE 0xD7 - - -#define MUX_CTL_CAPTURE 0x150 -#define MUX_CTL_COMPARE 0x151 - -/* - * Helper macros for the MUX_[contact name]__[pin function] macros - */ -#define IOMUX_MODE_POS 9 -#define IOMUX_MODE(contact, mode) (((mode) << IOMUX_MODE_POS) | (contact)) - -/* - * These macros can be used in mx31_gpio_mux() and have the form - * MUX_[contact name]__[pin function] - */ -#define MUX_RXD1__UART1_RXD_MUX IOMUX_MODE(MUX_CTL_RXD1, MUX_CTL_FUNC) -#define MUX_TXD1__UART1_TXD_MUX IOMUX_MODE(MUX_CTL_TXD1, MUX_CTL_FUNC) -#define MUX_RTS1__UART1_RTS_B IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC) -#define MUX_CTS1__UART1_CTS_B IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC) - -#define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_FUNC) -#define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, MUX_CTL_FUNC) -#define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, MUX_CTL_FUNC) -#define MUX_CSPI2_MOSI__CSPI2_MOSI IOMUX_MODE(MUX_CTL_CSPI2_MOSI, MUX_CTL_FUNC) -#define MUX_CSPI2_MISO__CSPI2_MISO IOMUX_MODE(MUX_CTL_CSPI2_MISO, MUX_CTL_FUNC) -#define MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B \ - IOMUX_MODE(MUX_CTL_CSPI2_SPI_RDY, MUX_CTL_FUNC) -#define MUX_CSPI2_SCLK__CSPI2_CLK IOMUX_MODE(MUX_CTL_CSPI2_SCLK, MUX_CTL_FUNC) - -#define MUX_CSPI1_SS0__CSPI1_SS0_B IOMUX_MODE(MUX_CTL_CSPI1_SS0, MUX_CTL_FUNC) -#define MUX_CSPI1_SS1__CSPI1_SS1_B IOMUX_MODE(MUX_CTL_CSPI1_SS1, MUX_CTL_FUNC) -#define MUX_CSPI1_SS2__CSPI1_SS2_B IOMUX_MODE(MUX_CTL_CSPI1_SS2, MUX_CTL_FUNC) -#define MUX_CSPI1_MOSI__CSPI1_MOSI IOMUX_MODE(MUX_CTL_CSPI1_MOSI, MUX_CTL_FUNC) -#define MUX_CSPI1_MISO__CSPI1_MISO IOMUX_MODE(MUX_CTL_CSPI1_MISO, MUX_CTL_FUNC) -#define MUX_CSPI1_SPI_RDY__CSPI1_DATAREADY_B \ - IOMUX_MODE(MUX_CTL_CSPI1_SPI_RDY, MUX_CTL_FUNC) -#define MUX_CSPI1_SCLK__CSPI1_CLK IOMUX_MODE(MUX_CTL_CSPI1_SCLK, MUX_CTL_FUNC) - -#define MUX_CSPI2_MOSI__I2C2_SCL IOMUX_MODE(MUX_CTL_CSPI2_MOSI, MUX_CTL_ALT1) -#define MUX_CSPI2_MISO__I2C2_SDA IOMUX_MODE(MUX_CTL_CSPI2_MISO, MUX_CTL_ALT1) - -/* PAD control registers for SDR/DDR */ -#define IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B (IOMUXC_BASE + 0x26C) -#define IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0 (IOMUXC_BASE + 0x270) -#define IOMUXC_SW_PAD_CTL_BCLK_RW_RAS (IOMUXC_BASE + 0x274) -#define IOMUXC_SW_PAD_CTL_CS5_ECB_LBA (IOMUXC_BASE + 0x278) -#define IOMUXC_SW_PAD_CTL_CS2_CS3_CS4 (IOMUXC_BASE + 0x27C) -#define IOMUXC_SW_PAD_CTL_OE_CS0_CS1 (IOMUXC_BASE + 0x280) -#define IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1 (IOMUXC_BASE + 0x284) -#define IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2 (IOMUXC_BASE + 0x288) -#define IOMUXC_SW_PAD_CTL_SD29_SD30_SD31 (IOMUXC_BASE + 0x28C) -#define IOMUXC_SW_PAD_CTL_SD26_SD27_SD28 (IOMUXC_BASE + 0x290) -#define IOMUXC_SW_PAD_CTL_SD23_SD24_SD25 (IOMUXC_BASE + 0x294) -#define IOMUXC_SW_PAD_CTL_SD20_SD21_SD22 (IOMUXC_BASE + 0x298) -#define IOMUXC_SW_PAD_CTL_SD17_SD18_SD19 (IOMUXC_BASE + 0x29C) -#define IOMUXC_SW_PAD_CTL_SD14_SD15_SD16 (IOMUXC_BASE + 0x2A0) -#define IOMUXC_SW_PAD_CTL_SD11_SD12_SD13 (IOMUXC_BASE + 0x2A4) -#define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10 (IOMUXC_BASE + 0x2A8) -#define IOMUXC_SW_PAD_CTL_SD5_SD6_SD7 (IOMUXC_BASE + 0x2AC) -#define IOMUXC_SW_PAD_CTL_SD2_SD3_SD4 (IOMUXC_BASE + 0x2B0) -#define IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1 (IOMUXC_BASE + 0x2B4) -#define IOMUXC_SW_PAD_CTL_A24_A25_SDBA1 (IOMUXC_BASE + 0x2B8) -#define IOMUXC_SW_PAD_CTL_A21_A22_A23 (IOMUXC_BASE + 0x2BC) -#define IOMUXC_SW_PAD_CTL_A18_A19_A20 (IOMUXC_BASE + 0x2C0) -#define IOMUXC_SW_PAD_CTL_A15_A16_A17 (IOMUXC_BASE + 0x2C4) -#define IOMUXC_SW_PAD_CTL_A12_A13_A14 (IOMUXC_BASE + 0x2C8) -#define IOMUXC_SW_PAD_CTL_A10_MA10_A11 (IOMUXC_BASE + 0x2CC) -#define IOMUXC_SW_PAD_CTL_A7_A8_A9 (IOMUXC_BASE + 0x2D0) -#define IOMUXC_SW_PAD_CTL_A4_A5_A6 (IOMUXC_BASE + 0x2D4) -#define IOMUXC_SW_PAD_CTL_A1_A2_A3 (IOMUXC_BASE + 0x2D8) -#define IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0 (IOMUXC_BASE + 0x2DC) - -/* - * Memory regions and CS - */ -#define IPU_MEM_BASE 0x70000000 -#define CSD0_BASE 0x80000000 -#define CSD1_BASE 0x90000000 -#define CS0_BASE 0xA0000000 -#define CS1_BASE 0xA8000000 -#define CS2_BASE 0xB0000000 -#define CS3_BASE 0xB2000000 -#define CS4_BASE 0xB4000000 -#define CS4_PSRAM_BASE 0xB5000000 -#define CS5_BASE 0xB6000000 -#define PCMCIA_MEM_BASE 0xC0000000 - -/* - * NAND controller - */ -#define NFC_BASE_ADDR 0xB8000000 - -/* - * Internal RAM (16KB) - */ -#define IRAM_BASE_ADDR 0x1FFFC000 -#define IRAM_SIZE (16 * 1024) - -#define MX31_AIPS1_BASE_ADDR 0x43f00000 -#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) - -/* USB portsc */ -/* values for portsc field */ -#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) -#define MXC_EHCI_FORCE_FS (1 << 24) -#define MXC_EHCI_UTMI_8BIT (0 << 28) -#define MXC_EHCI_UTMI_16BIT (1 << 28) -#define MXC_EHCI_SERIAL (1 << 29) -#define MXC_EHCI_MODE_UTMI (0 << 30) -#define MXC_EHCI_MODE_PHILIPS (1 << 30) -#define MXC_EHCI_MODE_ULPI (2 << 30) -#define MXC_EHCI_MODE_SERIAL (3 << 30) - -/* values for flags field */ -#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) -#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) -#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) -#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) -#define MXC_EHCI_INTERFACE_MASK (0xf) - -#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) -#define MXC_EHCI_TTL_ENABLED (1 << 6) - -#define MXC_EHCI_INTERNAL_PHY (1 << 7) -#define MXC_EHCI_IPPUE_DOWN (1 << 8) -#define MXC_EHCI_IPPUE_UP (1 << 9) - -#endif /* __ASM_ARCH_MX31_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h deleted file mode 100644 index a755212..0000000 --- a/arch/arm/include/asm/arch-mx31/mx31.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * - * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MX31_H -#define __ASM_ARCH_MX31_H - -extern u32 mx31_get_ipg_clk(void); -#define imx_get_uartclk mx31_get_ipg_clk -extern void mx31_gpio_mux(unsigned long mode); -extern void mx31_set_pad(enum iomux_pins pin, u32 config); - -void mx31_uart1_hw_init(void); -void mx31_spi2_hw_init(void); - -#endif /* __ASM_ARCH_MX31_H */ diff --git a/arch/arm/include/asm/arch-mx35/clock.h b/arch/arm/include/asm/arch-mx35/clock.h deleted file mode 100644 index 4c0ddfd..0000000 --- a/arch/arm/include/asm/arch-mx35/clock.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H - -enum mxc_clock { - MXC_ARM_CLK = 0, - MXC_AHB_CLK, - MXC_IPG_CLK, - MXC_IPG_PERCLK, - MXC_UART_CLK, - MXC_ESDHC_CLK, - MXC_USB_CLK, - MXC_CSPI_CLK, - MXC_FEC_CLK, -}; - -unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); - -u32 imx_get_uartclk(void); -u32 imx_get_fecclk(void); -unsigned int mxc_get_clock(enum mxc_clock clk); - -#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx35/crm_regs.h b/arch/arm/include/asm/arch-mx35/crm_regs.h deleted file mode 100644 index e903cf1..0000000 --- a/arch/arm/include/asm/arch-mx35/crm_regs.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - * Copyright 2004-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CPU_ARM1136_MX35_CRM_REGS_H__ -#define __CPU_ARM1136_MX35_CRM_REGS_H__ - -/* Register bit definitions */ -#define MXC_CCM_CCMR_WFI (1 << 30) -#define MXC_CCM_CCMR_STBY_EXIT_SRC (1 << 29) -#define MXC_CCM_CCMR_VSTBY (1 << 28) -#define MXC_CCM_CCMR_WBEN (1 << 27) -#define MXC_CCM_CCMR_VOL_RDY_CNT_OFFSET 20 -#define MXC_CCM_CCMR_VOL_RDY_CNT_MASK (0xF << 20) -#define MXC_CCM_CCMR_ROMW_OFFSET 18 -#define MXC_CCM_CCMR_ROMW_MASK (0x3 << 18) -#define MXC_CCM_CCMR_RAMW_OFFSET 21 -#define MXC_CCM_CCMR_RAMW_MASK (0x3 << 21) -#define MXC_CCM_CCMR_LPM_OFFSET 14 -#define MXC_CCM_CCMR_LPM_MASK (0x3 << 14) -#define MXC_CCM_CCMR_UPE (1 << 9) -#define MXC_CCM_CCMR_MPE (1 << 3) - -#define MXC_CCM_PDR0_PER_SEL (1 << 26) -#define MXC_CCM_PDR0_IPU_HND_BYP (1 << 23) -#define MXC_CCM_PDR0_HSP_PODF_OFFSET 20 -#define MXC_CCM_PDR0_HSP_PODF_MASK (0x3 << 20) -#define MXC_CCM_PDR0_CON_MUX_DIV_OFFSET 16 -#define MXC_CCM_PDR0_CON_MUX_DIV_MASK (0xF << 16) -#define MXC_CCM_PDR0_CKIL_SEL (1 << 15) -#define MXC_CCM_PDR0_PER_PODF_OFFSET 12 -#define MXC_CCM_PDR0_PER_PODF_MASK (0xF << 12) -#define MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET 9 -#define MXC_CCM_PDR0_AUTO_MUX_DIV_MASK (0x7 << 9) -#define MXC_CCM_PDR0_AUTO_CON 0x1 - -#define MXC_CCM_PDR1_MSHC_PRDF_OFFSET 28 -#define MXC_CCM_PDR1_MSHC_PRDF_MASK (0x7 << 28) -#define MXC_CCM_PDR1_MSHC_PODF_OFFSET 22 -#define MXC_CCM_PDR1_MSHC_PODF_MASK (0x3F << 22) -#define MXC_CCM_PDR1_MSHC_M_U (1 << 7) - -#define MXC_CCM_PDR2_SSI2_PRDF_OFFSET 27 -#define MXC_CCM_PDR2_SSI2_PRDF_MASK (0x7 << 27) -#define MXC_CCM_PDR2_SSI1_PRDF_OFFSET 24 -#define MXC_CCM_PDR2_SSI1_PRDF_MASK (0x7 << 24) -#define MXC_CCM_PDR2_CSI_PRDF_OFFSET 19 -#define MXC_CCM_PDR2_CSI_PRDF_MASK (0x7 << 19) -#define MXC_CCM_PDR2_CSI_PODF_OFFSET 16 -#define MXC_CCM_PDR2_CSI_PODF_MASK (0x7 << 16) -#define MXC_CCM_PDR2_SSI2_PODF_OFFSET 8 -#define MXC_CCM_PDR2_SSI2_PODF_MASK (0x3F << 8) -#define MXC_CCM_PDR2_CSI_M_U (1 << 7) -#define MXC_CCM_PDR2_SSI_M_U (1 << 6) -#define MXC_CCM_PDR2_SSI1_PODF_OFFSET 0 -#define MXC_CCM_PDR2_SSI1_PODF_MASK (0x3F) - -#define MXC_CCM_PDR3_SPDIF_PRDF_OFFSET 29 -#define MXC_CCM_PDR3_SPDIF_PRDF_MASK (0x7 << 29) -#define MXC_CCM_PDR3_SPDIF_PODF_OFFSET 23 -#define MXC_CCM_PDR3_SPDIF_PODF_MASK (0x3F << 23) -#define MXC_CCM_PDR3_SPDIF_M_U (1 << 22) -#define MXC_CCM_PDR3_ESDHC3_PRDF_OFFSET 19 -#define MXC_CCM_PDR3_ESDHC3_PRDF_MASK (0x7 << 19) -#define MXC_CCM_PDR3_ESDHC3_PODF_OFFSET 16 -#define MXC_CCM_PDR3_ESDHC3_PODF_MASK (0x7 << 16) -#define MXC_CCM_PDR3_UART_M_U (1 << 15) -#define MXC_CCM_PDR3_ESDHC2_PRDF_OFFSET 11 -#define MXC_CCM_PDR3_ESDHC2_PRDF_MASK (0x7 << 11) -#define MXC_CCM_PDR3_ESDHC2_PODF_OFFSET 8 -#define MXC_CCM_PDR3_ESDHC2_PODF_MASK (0x7 << 8) -#define MXC_CCM_PDR3_ESDHC_M_U (1 << 6) -#define MXC_CCM_PDR3_ESDHC1_PRDF_OFFSET 3 -#define MXC_CCM_PDR3_ESDHC1_PRDF_MASK (0x7 << 3) -#define MXC_CCM_PDR3_ESDHC1_PODF_OFFSET 0 -#define MXC_CCM_PDR3_ESDHC1_PODF_MASK (0x7) - -#define MXC_CCM_PDR4_NFC_PODF_OFFSET 28 -#define MXC_CCM_PDR4_NFC_PODF_MASK (0xF << 28) -#define MXC_CCM_PDR4_USB_PRDF_OFFSET 25 -#define MXC_CCM_PDR4_USB_PRDF_MASK (0x7 << 25) -#define MXC_CCM_PDR4_USB_PODF_OFFSET 22 -#define MXC_CCM_PDR4_USB_PODF_MASK (0x7 << 22) -#define MXC_CCM_PDR4_PER0_PRDF_OFFSET 19 -#define MXC_CCM_PDR4_PER0_PRDF_MASK (0x7 << 19) -#define MXC_CCM_PDR4_PER0_PODF_OFFSET 16 -#define MXC_CCM_PDR4_PER0_PODF_MASK (0x7 << 16) -#define MXC_CCM_PDR4_UART_PRDF_OFFSET 13 -#define MXC_CCM_PDR4_UART_PRDF_MASK (0x7 << 13) -#define MXC_CCM_PDR4_UART_PODF_OFFSET 10 -#define MXC_CCM_PDR4_UART_PODF_MASK (0x7 << 10) -#define MXC_CCM_PDR4_USB_M_U (1 << 9) - -/* Bit definitions for RCSR */ -#define MXC_CCM_RCSR_BUS_WIDTH (1 << 29) -#define MXC_CCM_RCSR_BUS_16BIT (1 << 29) -#define MXC_CCM_RCSR_PAGE_SIZE (3 << 27) -#define MXC_CCM_RCSR_PAGE_512 (0 << 27) -#define MXC_CCM_RCSR_PAGE_2K (1 << 27) -#define MXC_CCM_RCSR_PAGE_4K1 (2 << 27) -#define MXC_CCM_RCSR_PAGE_4K2 (3 << 27) -#define MXC_CCM_RCSR_SOFT_RESET (1 << 15) -#define MXC_CCM_RCSR_NF16B (1 << 14) -#define MXC_CCM_RCSR_NFC_4K (1 << 9) -#define MXC_CCM_RCSR_NFC_FMS (1 << 8) - -/* Bit definitions for both MCU, PERIPHERAL PLL control registers */ -#define MXC_CCM_PCTL_BRM 0x80000000 -#define MXC_CCM_PCTL_PD_OFFSET 26 -#define MXC_CCM_PCTL_PD_MASK (0xF << 26) -#define MXC_CCM_PCTL_MFD_OFFSET 16 -#define MXC_CCM_PCTL_MFD_MASK (0x3FF << 16) -#define MXC_CCM_PCTL_MFI_OFFSET 10 -#define MXC_CCM_PCTL_MFI_MASK (0xF << 10) -#define MXC_CCM_PCTL_MFN_OFFSET 0 -#define MXC_CCM_PCTL_MFN_MASK 0x3FF - -/* Bit definitions for Audio clock mux register*/ -#define MXC_CCM_ACMR_ESAI_CLK_SEL_OFFSET 12 -#define MXC_CCM_ACMR_ESAI_CLK_SEL_MASK (0xF << 12) -#define MXC_CCM_ACMR_SPDIF_CLK_SEL_OFFSET 8 -#define MXC_CCM_ACMR_SPDIF_CLK_SEL_MASK (0xF << 8) -#define MXC_CCM_ACMR_SSI1_CLK_SEL_OFFSET 4 -#define MXC_CCM_ACMR_SSI1_CLK_SEL_MASK (0xF << 4) -#define MXC_CCM_ACMR_SSI2_CLK_SEL_OFFSET 0 -#define MXC_CCM_ACMR_SSI2_CLK_SEL_MASK (0xF << 0) - -/* Bit definitions for Clock gating Register*/ -#define MXC_CCM_CGR0_ASRC_OFFSET 0 -#define MXC_CCM_CGR0_ASRC_MASK (0x3 << 0) -#define MXC_CCM_CGR0_ATA_OFFSET 2 -#define MXC_CCM_CGR0_ATA_MASK (0x3 << 2) -#define MXC_CCM_CGR0_CAN1_OFFSET 6 -#define MXC_CCM_CGR0_CAN1_MASK (0x3 << 6) -#define MXC_CCM_CGR0_CAN2_OFFSET 8 -#define MXC_CCM_CGR0_CAN2_MASK (0x3 << 8) -#define MXC_CCM_CGR0_CSPI1_OFFSET 10 -#define MXC_CCM_CGR0_CSPI1_MASK (0x3 << 10) -#define MXC_CCM_CGR0_CSPI2_OFFSET 12 -#define MXC_CCM_CGR0_CSPI2_MASK (0x3 << 12) -#define MXC_CCM_CGR0_ECT_OFFSET 14 -#define MXC_CCM_CGR0_ECT_MASK (0x3 << 14) -#define MXC_CCM_CGR0_EDI0_OFFSET 16 -#define MXC_CCM_CGR0_EDI0_MASK (0x3 << 16) -#define MXC_CCM_CGR0_EMI_OFFSET 18 -#define MXC_CCM_CGR0_EMI_MASK (0x3 << 18) -#define MXC_CCM_CGR0_EPIT1_OFFSET 20 -#define MXC_CCM_CGR0_EPIT1_MASK (0x3 << 20) -#define MXC_CCM_CGR0_EPIT2_OFFSET 22 -#define MXC_CCM_CGR0_EPIT2_MASK (0x3 << 22) -#define MXC_CCM_CGR0_ESAI_OFFSET 24 -#define MXC_CCM_CGR0_ESAI_MASK (0x3 << 24) -#define MXC_CCM_CGR0_ESDHC1_OFFSET 26 -#define MXC_CCM_CGR0_ESDHC1_MASK (0x3 << 26) -#define MXC_CCM_CGR0_ESDHC2_OFFSET 28 -#define MXC_CCM_CGR0_ESDHC2_MASK (0x3 << 28) -#define MXC_CCM_CGR0_ESDHC3_OFFSET 30 -#define MXC_CCM_CGR0_ESDHC3_MASK (0x3 << 30) - -#define MXC_CCM_CGR1_FEC_OFFSET 0 -#define MXC_CCM_CGR1_FEC_MASK (0x3 << 0) -#define MXC_CCM_CGR1_GPIO1_OFFSET 2 -#define MXC_CCM_CGR1_GPIO1_MASK (0x3 << 2) -#define MXC_CCM_CGR1_GPIO2_OFFSET 4 -#define MXC_CCM_CGR1_GPIO2_MASK (0x3 << 4) -#define MXC_CCM_CGR1_GPIO3_OFFSET 6 -#define MXC_CCM_CGR1_GPIO3_MASK (0x3 << 6) -#define MXC_CCM_CGR1_GPT_OFFSET 8 -#define MXC_CCM_CGR1_GPT_MASK (0x3 << 8) -#define MXC_CCM_CGR1_I2C1_OFFSET 10 -#define MXC_CCM_CGR1_I2C1_MASK (0x3 << 10) -#define MXC_CCM_CGR1_I2C2_OFFSET 12 -#define MXC_CCM_CGR1_I2C2_MASK (0x3 << 12) -#define MXC_CCM_CGR1_I2C3_OFFSET 14 -#define MXC_CCM_CGR1_I2C3_MASK (0x3 << 14) -#define MXC_CCM_CGR1_IOMUXC_OFFSET 16 -#define MXC_CCM_CGR1_IOMUXC_MASK (0x3 << 16) -#define MXC_CCM_CGR1_IPU_OFFSET 18 -#define MXC_CCM_CGR1_IPU_MASK (0x3 << 18) -#define MXC_CCM_CGR1_KPP_OFFSET 20 -#define MXC_CCM_CGR1_KPP_MASK (0x3 << 20) -#define MXC_CCM_CGR1_MLB_OFFSET 22 -#define MXC_CCM_CGR1_MLB_MASK (0x3 << 22) -#define MXC_CCM_CGR1_MSHC_OFFSET 24 -#define MXC_CCM_CGR1_MSHC_MASK (0x3 << 24) -#define MXC_CCM_CGR1_OWIRE_OFFSET 26 -#define MXC_CCM_CGR1_OWIRE_MASK (0x3 << 26) -#define MXC_CCM_CGR1_PWM_OFFSET 28 -#define MXC_CCM_CGR1_PWM_MASK (0x3 << 28) -#define MXC_CCM_CGR1_RNGC_OFFSET 30 -#define MXC_CCM_CGR1_RNGC_MASK (0x3 << 30) - -#define MXC_CCM_CGR2_RTC_OFFSET 0 -#define MXC_CCM_CGR2_RTC_MASK (0x3 << 0) -#define MXC_CCM_CGR2_RTIC_OFFSET 2 -#define MXC_CCM_CGR2_RTIC_MASK (0x3 << 2) -#define MXC_CCM_CGR2_SCC_OFFSET 4 -#define MXC_CCM_CGR2_SCC_MASK (0x3 << 4) -#define MXC_CCM_CGR2_SDMA_OFFSET 6 -#define MXC_CCM_CGR2_SDMA_MASK (0x3 << 6) -#define MXC_CCM_CGR2_SPBA_OFFSET 8 -#define MXC_CCM_CGR2_SPBA_MASK (0x3 << 8) -#define MXC_CCM_CGR2_SPDIF_OFFSET 10 -#define MXC_CCM_CGR2_SPDIF_MASK (0x3 << 10) -#define MXC_CCM_CGR2_SSI1_OFFSET 12 -#define MXC_CCM_CGR2_SSI1_MASK (0x3 << 12) -#define MXC_CCM_CGR2_SSI2_OFFSET 14 -#define MXC_CCM_CGR2_SSI2_MASK (0x3 << 14) -#define MXC_CCM_CGR2_UART1_OFFSET 16 -#define MXC_CCM_CGR2_UART1_MASK (0x3 << 16) -#define MXC_CCM_CGR2_UART2_OFFSET 18 -#define MXC_CCM_CGR2_UART2_MASK (0x3 << 18) -#define MXC_CCM_CGR2_UART3_OFFSET 20 -#define MXC_CCM_CGR2_UART3_MASK (0x3 << 20) -#define MXC_CCM_CGR2_USBOTG_OFFSET 22 -#define MXC_CCM_CGR2_USBOTG_MASK (0x3 << 22) -#define MXC_CCM_CGR2_WDOG_OFFSET 24 -#define MXC_CCM_CGR2_WDOG_MASK (0x3 << 24) -#define MXC_CCM_CGR2_MAX_OFFSET 26 -#define MXC_CCM_CGR2_MAX_MASK (0x3 << 26) -#define MXC_CCM_CGR2_MAX_ENABLE (0x2 << 26) -#define MXC_CCM_CGR2_AUDMUX_OFFSET 30 -#define MXC_CCM_CGR2_AUDMUX_MASK (0x3 << 30) - -#define MXC_CCM_CGR3_CSI_OFFSET 0 -#define MXC_CCM_CGR3_CSI_MASK (0x3 << 0) -#define MXC_CCM_CGR3_IIM_OFFSET 2 -#define MXC_CCM_CGR3_IIM_MASK (0x3 << 2) -#define MXC_CCM_CGR3_GPU2D_OFFSET 4 -#define MXC_CCM_CGR3_GPU2D_MASK (0x3 << 4) - -#define MXC_CCM_COSR_CLKOSEL_MASK 0x1F -#define MXC_CCM_COSR_CLKOSEL_OFFSET 0 -#define MXC_CCM_COSR_CLKOEN (1 << 5) -#define MXC_CCM_COSR_CLKOUTDIV_1 (1 << 6) -#define MXC_CCM_COSR_CLKOUT_PREDIV_MASK (0x7 << 10) -#define MXC_CCM_COSR_CLKOUT_PREDIV_OFFSET 10 -#define MXC_CCM_COSR_CLKOUT_PRODIV_MASK (0x7 << 13) -#define MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET 13 -#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_MASK (0x3 << 16) -#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_OFFSET 16 -#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_MASK (0x3 << 18) -#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_OFFSET 18 -#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_MASK (0x3 << 20) -#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_OFFSET 20 -#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_MASK (0x3 << 22) -#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_OFFSET 22 -#define MXC_CCM_COSR_ASRC_AUDIO_EN (1 << 24) -#define MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK (0x3F << 26) -#define MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET 26 - -#endif diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h deleted file mode 100644 index e741fb0..0000000 --- a/arch/arm/include/asm/arch-mx35/imx-regs.h +++ /dev/null @@ -1,303 +0,0 @@ -/* - * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> - * - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MX35_H -#define __ASM_ARCH_MX35_H - -/* - * IRAM - */ -#define IRAM_BASE_ADDR 0x10000000 /* internal ram */ -#define IRAM_SIZE 0x00020000 /* 128 KB */ - -/* - * AIPS 1 - */ -#define AIPS1_BASE_ADDR 0x43F00000 -#define AIPS1_CTRL_BASE_ADDR AIPS1_BASE_ADDR -#define MAX_BASE_ADDR 0x43F04000 -#define EVTMON_BASE_ADDR 0x43F08000 -#define CLKCTL_BASE_ADDR 0x43F0C000 -#define I2C_BASE_ADDR 0x43F80000 -#define I2C3_BASE_ADDR 0x43F84000 -#define ATA_BASE_ADDR 0x43F8C000 -#define UART1_BASE_ADDR 0x43F90000 -#define UART2_BASE_ADDR 0x43F94000 -#define I2C2_BASE_ADDR 0x43F98000 -#define CSPI1_BASE_ADDR 0x43FA4000 -#define IOMUXC_BASE_ADDR 0x43FAC000 - -/* - * SPBA - */ -#define SPBA_BASE_ADDR 0x50000000 -#define UART3_BASE_ADDR 0x5000C000 -#define CSPI2_BASE_ADDR 0x50010000 -#define ATA_DMA_BASE_ADDR 0x50020000 -#define FEC_BASE_ADDR 0x50038000 -#define SPBA_CTRL_BASE_ADDR 0x5003C000 - -/* - * AIPS 2 - */ -#define AIPS2_BASE_ADDR 0x53F00000 -#define AIPS2_CTRL_BASE_ADDR AIPS2_BASE_ADDR -#define CCM_BASE_ADDR 0x53F80000 -#define GPT1_BASE_ADDR 0x53F90000 -#define EPIT1_BASE_ADDR 0x53F94000 -#define EPIT2_BASE_ADDR 0x53F98000 -#define GPIO3_BASE_ADDR 0x53FA4000 -#define MMC_SDHC1_BASE_ADDR 0x53FB4000 -#define MMC_SDHC2_BASE_ADDR 0x53FB8000 -#define MMC_SDHC3_BASE_ADDR 0x53FBC000 -#define IPU_CTRL_BASE_ADDR 0x53FC0000 -#define GPIO3_BASE_ADDR 0x53FA4000 -#define GPIO1_BASE_ADDR 0x53FCC000 -#define GPIO2_BASE_ADDR 0x53FD0000 -#define SDMA_BASE_ADDR 0x53FD4000 -#define RTC_BASE_ADDR 0x53FD8000 -#define WDOG_BASE_ADDR 0x53FDC000 -#define PWM_BASE_ADDR 0x53FE0000 -#define RTIC_BASE_ADDR 0x53FEC000 -#define IIM_BASE_ADDR 0x53FF0000 - -#define IMX_CCM_BASE CCM_BASE_ADDR - -/* - * ROMPATCH and AVIC - */ -#define ROMPATCH_BASE_ADDR 0x60000000 -#define AVIC_BASE_ADDR 0x68000000 - -/* - * NAND, SDRAM, WEIM, M3IF, EMI controllers - */ -#define EXT_MEM_CTRL_BASE 0xB8000000 -#define ESDCTL_BASE_ADDR 0xB8001000 -#define WEIM_BASE_ADDR 0xB8002000 -#define WEIM_CTRL_CS0 WEIM_BASE_ADDR -#define WEIM_CTRL_CS1 (WEIM_BASE_ADDR + 0x10) -#define WEIM_CTRL_CS2 (WEIM_BASE_ADDR + 0x20) -#define WEIM_CTRL_CS3 (WEIM_BASE_ADDR + 0x30) -#define WEIM_CTRL_CS4 (WEIM_BASE_ADDR + 0x40) -#define WEIM_CTRL_CS5 (WEIM_BASE_ADDR + 0x50) -#define M3IF_BASE_ADDR 0xB8003000 -#define EMI_BASE_ADDR 0xB8004000 - -#define NFC_BASE_ADDR 0xBB000000 - -/* - * Memory regions and CS - */ -#define IPU_MEM_BASE_ADDR 0x70000000 -#define CSD0_BASE_ADDR 0x80000000 -#define CSD1_BASE_ADDR 0x90000000 -#define CS0_BASE_ADDR 0xA0000000 -#define CS1_BASE_ADDR 0xA8000000 -#define CS2_BASE_ADDR 0xB0000000 -#define CS3_BASE_ADDR 0xB2000000 -#define CS4_BASE_ADDR 0xB4000000 -#define CS5_BASE_ADDR 0xB6000000 - -/* - * IRQ Controller Register Definitions. - */ -#define AVIC_NIMASK 0x04 -#define AVIC_INTTYPEH 0x18 -#define AVIC_INTTYPEL 0x1C - -/* L210 */ -#define L2CC_BASE_ADDR 0x30000000 -#define L2_CACHE_LINE_SIZE 32 -#define L2_CACHE_CTL_REG 0x100 -#define L2_CACHE_AUX_CTL_REG 0x104 -#define L2_CACHE_SYNC_REG 0x730 -#define L2_CACHE_INV_LINE_REG 0x770 -#define L2_CACHE_INV_WAY_REG 0x77C -#define L2_CACHE_CLEAN_LINE_REG 0x7B0 -#define L2_CACHE_CLEAN_INV_LINE_REG 0x7F0 -#define L2_CACHE_DBG_CTL_REG 0xF40 - -#define CLKMODE_AUTO 0 -#define CLKMODE_CONSUMER 1 - -#define PLL_PD(x) (((x) & 0xf) << 26) -#define PLL_MFD(x) (((x) & 0x3ff) << 16) -#define PLL_MFI(x) (((x) & 0xf) << 10) -#define PLL_MFN(x) (((x) & 0x3ff) << 0) - -#define CSCR_U(x) (WEIM_CTRL_CS#x + 0) -#define CSCR_L(x) (WEIM_CTRL_CS#x + 4) -#define CSCR_A(x) (WEIM_CTRL_CS#x + 8) - -#define IIM_SREV 0x24 -#define ROMPATCH_REV 0x40 - -#define IPU_CONF IPU_CTRL_BASE_ADDR - -#define IPU_CONF_PXL_ENDIAN (1<<8) -#define IPU_CONF_DU_EN (1<<7) -#define IPU_CONF_DI_EN (1<<6) -#define IPU_CONF_ADC_EN (1<<5) -#define IPU_CONF_SDC_EN (1<<4) -#define IPU_CONF_PF_EN (1<<3) -#define IPU_CONF_ROT_EN (1<<2) -#define IPU_CONF_IC_EN (1<<1) -#define IPU_CONF_SCI_EN (1<<0) - -#define GPIO_PORT_NUM 3 -#define GPIO_NUM_PIN 32 - -#define CHIP_REV_1_0 0x10 -#define CHIP_REV_2_0 0x20 - -#define BOARD_REV_1_0 0x0 -#define BOARD_REV_2_0 0x1 - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> - -extern void imx_get_mac_from_fuse(unsigned char *mac); - -enum mxc_main_clocks { - CPU_CLK, - AHB_CLK, - IPG_CLK, - IPG_PER_CLK, - NFC_CLK, - USB_CLK, - HSP_CLK, -}; - -enum mxc_peri_clocks { - UART1_BAUD, - UART2_BAUD, - UART3_BAUD, - SSI1_BAUD, - SSI2_BAUD, - CSI_BAUD, - MSHC_CLK, - ESDHC1_CLK, - ESDHC2_CLK, - ESDHC3_CLK, - SPDIF_CLK, - SPI1_CLK, - SPI2_CLK, -}; - -/* Clock Control Module (CCM) registers */ -struct ccm_regs { - u32 ccmr; /* Control */ - u32 pdr0; /* Post divider 0 */ - u32 pdr1; /* Post divider 1 */ - u32 pdr2; /* Post divider 2 */ - u32 pdr3; /* Post divider 3 */ - u32 pdr4; /* Post divider 4 */ - u32 rcsr; /* CCM Status */ - u32 mpctl; /* Core PLL Control */ - u32 ppctl; /* Peripheral PLL Control */ - u32 acmr; /* Audio clock mux */ - u32 cosr; /* Clock out source */ - u32 cgr0; /* Clock Gating Control 0 */ - u32 cgr1; /* Clock Gating Control 1 */ - u32 cgr2; /* Clock Gating Control 2 */ - u32 cgr3; /* Clock Gating Control 3 */ - u32 reserved; - u32 dcvr0; /* DPTC Comparator 0 */ - u32 dcvr1; /* DPTC Comparator 0 */ - u32 dcvr2; /* DPTC Comparator 0 */ - u32 dcvr3; /* DPTC Comparator 0 */ - u32 ltr0; /* Load Tracking 0 */ - u32 ltr1; /* Load Tracking 1 */ - u32 ltr2; /* Load Tracking 2 */ - u32 ltr3; /* Load Tracking 3 */ - u32 ltbr0; /* Load Tracking Buffer 0 */ -}; - -/* IIM control registers */ -struct iim_regs { - u32 iim_stat; - u32 iim_statm; - u32 iim_err; - u32 iim_emask; - u32 iim_fctl; - u32 iim_ua; - u32 iim_la; - u32 iim_sdat; - u32 iim_prev; - u32 iim_srev; - u32 iim_prog_p; - u32 iim_scs0; - u32 iim_scs1; - u32 iim_scs2; - u32 iim_scs3; -}; - -/* General Purpose Timer (GPT) registers */ -struct gpt_regs { - u32 ctrl; /* control */ - u32 pre; /* prescaler */ - u32 stat; /* status */ - u32 intr; /* interrupt */ - u32 cmp[3]; /* output compare 1-3 */ - u32 capt[2]; /* input capture 1-2 */ - u32 counter; /* counter */ -}; - -/* CSPI registers */ -struct cspi_regs { - u32 rxdata; - u32 txdata; - u32 ctrl; - u32 intr; - u32 dma; - u32 stat; - u32 period; - u32 test; -}; - -/* Watchdog Timer (WDOG) registers */ -struct wdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ - u16 wicr; /* Interrupt Control */ - u16 wmcr; /* Misc Control */ -}; - -/* - * NFMS bit in RCSR register for pagesize of nandflash - */ -#define NFMS_BIT 8 -#define NFMS_NF_DWIDTH 14 -#define NFMS_NF_PG_SZ 8 - -#define CCM_RCSR_NF_16BIT_SEL (1 << 14) - -extern unsigned int get_board_rev(void); -extern int is_soc_rev(int rev); -extern int sdhc_init(void); - -#endif -#endif /* __ASM_ARCH_MX35_H */ diff --git a/arch/arm/include/asm/arch-mx35/iomux.h b/arch/arm/include/asm/arch-mx35/iomux.h deleted file mode 100644 index 52c15bc..0000000 --- a/arch/arm/include/asm/arch-mx35/iomux.h +++ /dev/null @@ -1,295 +0,0 @@ -/* - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __MACH_MX35_IOMUX_H__ -#define __MACH_MX35_IOMUX_H__ - -#include <asm/arch/imx-regs.h> - -/* - * various IOMUX functions - */ -typedef enum iomux_pin_config { - MUX_CONFIG_FUNC = 0, /* used as function */ - MUX_CONFIG_ALT1, /* used as alternate function 1 */ - MUX_CONFIG_ALT2, /* used as alternate function 2 */ - MUX_CONFIG_ALT3, /* used as alternate function 3 */ - MUX_CONFIG_ALT4, /* used as alternate function 4 */ - MUX_CONFIG_ALT5, /* used as alternate function 5 */ - MUX_CONFIG_ALT6, /* used as alternate function 6 */ - MUX_CONFIG_ALT7, /* used as alternate function 7 */ - MUX_CONFIG_SION = 0x1 << 4, /* used as LOOPBACK:MUX SION bit */ - MUX_CONFIG_GPIO = MUX_CONFIG_ALT5, /* used as GPIO */ -} iomux_pin_cfg_t; - -/* - * various IOMUX pad functions - */ -typedef enum iomux_pad_config { - PAD_CTL_DRV_3_3V = 0x0 << 13, - PAD_CTL_DRV_1_8V = 0x1 << 13, - PAD_CTL_HYS_CMOS = 0x0 << 8, - PAD_CTL_HYS_SCHMITZ = 0x1 << 8, - PAD_CTL_PKE_NONE = 0x0 << 7, - PAD_CTL_PKE_ENABLE = 0x1 << 7, - PAD_CTL_PUE_KEEPER = 0x0 << 6, - PAD_CTL_PUE_PUD = 0x1 << 6, - PAD_CTL_100K_PD = 0x0 << 4, - PAD_CTL_47K_PU = 0x1 << 4, - PAD_CTL_100K_PU = 0x2 << 4, - PAD_CTL_22K_PU = 0x3 << 4, - PAD_CTL_ODE_CMOS = 0x0 << 3, - PAD_CTL_ODE_OpenDrain = 0x1 << 3, - PAD_CTL_DRV_NORMAL = 0x0 << 1, - PAD_CTL_DRV_HIGH = 0x1 << 1, - PAD_CTL_DRV_MAX = 0x2 << 1, - PAD_CTL_SRE_SLOW = 0x0 << 0, - PAD_CTL_SRE_FAST = 0x1 << 0 -} iomux_pad_config_t; - -/* - * various IOMUX general purpose functions - */ -typedef enum iomux_gp_func { - MUX_SDCTL_CSD0_SEL = 0x1 << 0, - MUX_SDCTL_CSD1_SEL = 0x1 << 1, - MUX_TAMPER_DETECT_EN = 0x1 << 2, -} iomux_gp_func_t; - -/* - * various IOMUX input select register index - */ -typedef enum iomux_input_select { - MUX_IN_AMX_P5_RXCLK = 0, - MUX_IN_AMX_P5_RXFS, - MUX_IN_AMX_P6_DA, - MUX_IN_AMX_P6_DB, - MUX_IN_AMX_P6_RXCLK, - MUX_IN_AMX_P6_RXFS, - MUX_IN_AMX_P6_TXCLK, - MUX_IN_AMX_P6_TXFS, - MUX_IN_CAN1_CANRX, - MUX_IN_CAN2_CANRX, - MUX_IN_CCM_32K_MUXED, - MUX_IN_CCM_PMIC_RDY, - MUX_IN_CSPI1_SS2_B, - MUX_IN_CSPI1_SS3_B, - MUX_IN_CSPI2_CLK_IN, - MUX_IN_CSPI2_DATAREADY_B, - MUX_IN_CSPI2_MISO, - MUX_IN_CSPI2_MOSI, - MUX_IN_CSPI2_SS0_B, - MUX_IN_CSPI2_SS1_B, - MUX_IN_CSPI2_SS2_B, - MUX_IN_CSPI2_SS3_B, - MUX_IN_EMI_WEIM_DTACK_B, - MUX_IN_ESDHC1_DAT4_IN, - MUX_IN_ESDHC1_DAT5_IN, - MUX_IN_ESDHC1_DAT6_IN, - MUX_IN_ESDHC1_DAT7_IN, - MUX_IN_ESDHC3_CARD_CLK_IN, - MUX_IN_ESDHC3_CMD_IN, - MUX_IN_ESDHC3_DAT0, - MUX_IN_ESDHC3_DAT1, - MUX_IN_ESDHC3_DAT2, - MUX_IN_ESDHC3_DAT3, - MUX_IN_GPIO1_IN_0, - MUX_IN_GPIO1_IN_10, - MUX_IN_GPIO1_IN_11, - MUX_IN_GPIO1_IN_1, - MUX_IN_GPIO1_IN_20, - MUX_IN_GPIO1_IN_21, - MUX_IN_GPIO1_IN_22, - MUX_IN_GPIO1_IN_2, - MUX_IN_GPIO1_IN_3, - MUX_IN_GPIO1_IN_4, - MUX_IN_GPIO1_IN_5, - MUX_IN_GPIO1_IN_6, - MUX_IN_GPIO1_IN_7, - MUX_IN_GPIO1_IN_8, - MUX_IN_GPIO1_IN_9, - MUX_IN_GPIO2_IN_0, - MUX_IN_GPIO2_IN_10, - MUX_IN_GPIO2_IN_11, - MUX_IN_GPIO2_IN_12, - MUX_IN_GPIO2_IN_13, - MUX_IN_GPIO2_IN_14, - MUX_IN_GPIO2_IN_15, - MUX_IN_GPIO2_IN_16, - MUX_IN_GPIO2_IN_17, - MUX_IN_GPIO2_IN_18, - MUX_IN_GPIO2_IN_19, - MUX_IN_GPIO2_IN_20, - MUX_IN_GPIO2_IN_21, - MUX_IN_GPIO2_IN_22, - MUX_IN_GPIO2_IN_23, - MUX_IN_GPIO2_IN_24, - MUX_IN_GPIO2_IN_25, - MUX_IN_GPIO2_IN_26, - MUX_IN_GPIO2_IN_27, - MUX_IN_GPIO2_IN_28, - MUX_IN_GPIO2_IN_29, - MUX_IN_GPIO2_IN_2, - MUX_IN_GPIO2_IN_30, - MUX_IN_GPIO2_IN_31, - MUX_IN_GPIO2_IN_3, - MUX_IN_GPIO2_IN_4, - MUX_IN_GPIO2_IN_5, - MUX_IN_GPIO2_IN_6, - MUX_IN_GPIO2_IN_7, - MUX_IN_GPIO2_IN_8, - MUX_IN_GPIO2_IN_9, - MUX_IN_GPIO3_IN_0, - MUX_IN_GPIO3_IN_10, - MUX_IN_GPIO3_IN_11, - MUX_IN_GPIO3_IN_12, - MUX_IN_GPIO3_IN_13, - MUX_IN_GPIO3_IN_14, - MUX_IN_GPIO3_IN_15, - MUX_IN_GPIO3_IN_4, - MUX_IN_GPIO3_IN_5, - MUX_IN_GPIO3_IN_6, - MUX_IN_GPIO3_IN_7, - MUX_IN_GPIO3_IN_8, - MUX_IN_GPIO3_IN_9, - MUX_IN_I2C3_SCL_IN, - MUX_IN_I2C3_SDA_IN, - MUX_IN_IPU_DISPB_D0_VSYNC, - MUX_IN_IPU_DISPB_D12_VSYNC, - MUX_IN_IPU_DISPB_SD_D, - MUX_IN_IPU_SENSB_DATA_0, - MUX_IN_IPU_SENSB_DATA_1, - MUX_IN_IPU_SENSB_DATA_2, - MUX_IN_IPU_SENSB_DATA_3, - MUX_IN_IPU_SENSB_DATA_4, - MUX_IN_IPU_SENSB_DATA_5, - MUX_IN_IPU_SENSB_DATA_6, - MUX_IN_IPU_SENSB_DATA_7, - MUX_IN_KPP_COL_0, - MUX_IN_KPP_COL_1, - MUX_IN_KPP_COL_2, - MUX_IN_KPP_COL_3, - MUX_IN_KPP_COL_4, - MUX_IN_KPP_COL_5, - MUX_IN_KPP_COL_6, - MUX_IN_KPP_COL_7, - MUX_IN_KPP_ROW_0, - MUX_IN_KPP_ROW_1, - MUX_IN_KPP_ROW_2, - MUX_IN_KPP_ROW_3, - MUX_IN_KPP_ROW_4, - MUX_IN_KPP_ROW_5, - MUX_IN_KPP_ROW_6, - MUX_IN_KPP_ROW_7, - MUX_IN_OWIRE_BATTERY_LINE, - MUX_IN_SPDIF_HCKT_CLK2, - MUX_IN_SPDIF_SPDIF_IN1, - MUX_IN_UART3_UART_RTS_B, - MUX_IN_UART3_UART_RXD_MUX, - MUX_IN_USB_OTG_DATA_0, - MUX_IN_USB_OTG_DATA_1, - MUX_IN_USB_OTG_DATA_2, - MUX_IN_USB_OTG_DATA_3, - MUX_IN_USB_OTG_DATA_4, - MUX_IN_USB_OTG_DATA_5, - MUX_IN_USB_OTG_DATA_6, - MUX_IN_USB_OTG_DATA_7, - MUX_IN_USB_OTG_DIR, - MUX_IN_USB_OTG_NXT, - MUX_IN_USB_UH2_DATA_0, - MUX_IN_USB_UH2_DATA_1, - MUX_IN_USB_UH2_DATA_2, - MUX_IN_USB_UH2_DATA_3, - MUX_IN_USB_UH2_DATA_4, - MUX_IN_USB_UH2_DATA_5, - MUX_IN_USB_UH2_DATA_6, - MUX_IN_USB_UH2_DATA_7, - MUX_IN_USB_UH2_DIR, - MUX_IN_USB_UH2_NXT, - MUX_IN_USB_UH2_USB_OC, -} iomux_input_select_t; - -/* - * various IOMUX input functions - */ -typedef enum iomux_input_config { - INPUT_CTL_PATH0 = 0x0, - INPUT_CTL_PATH1, - INPUT_CTL_PATH2, - INPUT_CTL_PATH3, - INPUT_CTL_PATH4, - INPUT_CTL_PATH5, - INPUT_CTL_PATH6, - INPUT_CTL_PATH7, -} iomux_input_cfg_t; - -/* - * Request ownership for an IO pin. This function has to be the first one - * being called before that pin is used. The caller has to check the - * return value to make sure it returns 0. - * - * @param pin a name defined by iomux_pin_name_t - * @param cfg an input function as defined in iomux_pin_cfg_t - * - * @return 0 if successful; Non-zero otherwise - */ -void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); - -/* - * Release ownership for an IO pin - * - * @param pin a name defined by iomux_pin_name_t - * @param cfg an input function as defined in iomux_pin_cfg_t - */ -void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); - -/* - * This function enables/disables the general purpose function for a particular - * signal. - * - * @param gp one signal as defined in iomux_gp_func_t - * @param en 1 to enable; 0 to disable - */ -void mxc_iomux_set_gpr(iomux_gp_func_t gp, int en); - -/* - * This function configures the pad value for a IOMUX pin. - * - * @param pin a pin number as defined in iomux_pin_name_t - * @param config the ORed value of elements defined in - * iomux_pad_config_t - */ -void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); - -/* - * This function configures input path. - * - * @param input index of input select register as defined in - * iomux_input_select_t - * @param config the binary value of elements defined in - * iomux_input_cfg_t - */ -void mxc_iomux_set_input(iomux_input_select_t input, u32 config); -#endif diff --git a/arch/arm/include/asm/arch-mx35/mx35_pins.h b/arch/arm/include/asm/arch-mx35/mx35_pins.h deleted file mode 100644 index 14669ff..0000000 --- a/arch/arm/include/asm/arch-mx35/mx35_pins.h +++ /dev/null @@ -1,355 +0,0 @@ -/* - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MXC_MX35_PINS_H__ -#define __ASM_ARCH_MXC_MX35_PINS_H__ - -/*! - * @file arch-mxc/mx35_pins.h - * - * @brief MX35 I/O Pin List - * - * @ingroup GPIO_MX35 - */ - -#ifndef __ASSEMBLY__ - -/*! - * @name IOMUX/PAD Bit field definitions - */ - -/*! @{ */ - -/*! - * In order to identify pins more effectively, each mux-controlled pin's - * enumerated value is constructed in the following way: - * - * ------------------------------------------------------------------- - * 31-29 | 28 - 24 |23 - 21| 20 - 10| 9 - 0 - * ------------------------------------------------------------------- - * IO_P | IO_I | RSVD | PAD_I | MUX_I - * ------------------------------------------------------------------- - * - * Bit 0 to 7 contains MUX_I used to identify the register - * offset (base is IOMUX_module_base ) defined in the Section - * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The similar field - * definitions are used for the pad control register.the MX35_PIN_A0 is - * defined in the enumeration: ( 0x28 << MUX_I) |( 0x368 << PAD_I) - * So the absolute address is: IOMUX_module_base + 0x28. - * The pad control register offset is: 0x368. - */ - -/*! - * Starting bit position within each entry of \b iomux_pins to represent the - * MUX control register offset - */ -#define MUX_I 0 -/*! - * Starting bit position within each entry of \b iomux_pins to represent the - * PAD control register offset - */ -#define PAD_I 10 - -/*! - * Starting bit position within each entry of \b iomux_pins to represent the - * reserved filed - */ -#define RSVD_I 21 - -#define MUX_IO_P 29 -#define MUX_IO_I 24 -#define IOMUX_TO_GPIO(pin) ((((unsigned int)pin >> MUX_IO_P) * \ - GPIO_NUM_PIN) + ((pin >> MUX_IO_I) &\ - ((1 << (MUX_IO_P - MUX_IO_I)) - 1))) -#define IOMUX_TO_IRQ(pin) (MXC_GPIO_INT_BASE + IOMUX_TO_GPIO(pin)) -#define GPIO_TO_PORT(n) (n / GPIO_NUM_PIN) -#define GPIO_TO_INDEX(n) (n % GPIO_NUM_PIN) - -#define NON_GPIO_I 0x7 -#define PIN_TO_MUX_MASK ((1<<(PAD_I - MUX_I)) - 1) -#define PIN_TO_PAD_MASK ((1<<(RSVD_I - PAD_I)) - 1) -#define NON_MUX_I PIN_TO_MUX_MASK - -#define _MXC_BUILD_PIN(gp, gi, mi, pi) \ - (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ - ((mi) << MUX_I) | ((pi) << PAD_I)) - -#define _MXC_BUILD_GPIO_PIN(gp, gi, mi, pi) \ - _MXC_BUILD_PIN(gp, gi, mi, pi) - -#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ - _MXC_BUILD_PIN(NON_GPIO_I, 0, mi, pi) - -#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) -#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) - -/*! @} End IOMUX/PAD Bit field definitions */ - -/*! - * This enumeration is constructed based on the Section - * "sw_pad_ctl & sw_mux_ctl details" of the MX35 IC Spec. Each enumerated - * value is constructed based on the rules described above. - */ -typedef enum iomux_pins { - MX35_PIN_CAPTURE = _MXC_BUILD_GPIO_PIN(0, 4, 0x4, 0x328), - MX35_PIN_COMPARE = _MXC_BUILD_GPIO_PIN(0, 5, 0x8, 0x32C), - MX35_PIN_WATCHDOG_RST = _MXC_BUILD_GPIO_PIN(0, 6, 0xC, 0x330), - MX35_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 0x10, 0x334), - MX35_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 0x14, 0x338), - MX35_PIN_GPIO2_0 = _MXC_BUILD_GPIO_PIN(1, 0, 0x18, 0x33C), - MX35_PIN_GPIO3_0 = _MXC_BUILD_GPIO_PIN(2, 1, 0x1C, 0x340), - MX35_PIN_CLKO = _MXC_BUILD_GPIO_PIN(0, 8, 0x20, 0x34C), - - MX35_PIN_POWER_FAIL = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x360), - MX35_PIN_VSTBY = _MXC_BUILD_GPIO_PIN(0, 7, 0x24, 0x364), - MX35_PIN_A0 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x368), - MX35_PIN_A1 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x36C), - MX35_PIN_A2 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x370), - MX35_PIN_A3 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x374), - MX35_PIN_A4 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x378), - MX35_PIN_A5 = _MXC_BUILD_NON_GPIO_PIN(0x3C, 0x37C), - MX35_PIN_A6 = _MXC_BUILD_NON_GPIO_PIN(0x40, 0x380), - MX35_PIN_A7 = _MXC_BUILD_NON_GPIO_PIN(0x44, 0x384), - MX35_PIN_A8 = _MXC_BUILD_NON_GPIO_PIN(0x48, 0x388), - MX35_PIN_A9 = _MXC_BUILD_NON_GPIO_PIN(0x4C, 0x38C), - MX35_PIN_A10 = _MXC_BUILD_NON_GPIO_PIN(0x50, 0x390), - MX35_PIN_MA10 = _MXC_BUILD_NON_GPIO_PIN(0x54, 0x394), - MX35_PIN_A11 = _MXC_BUILD_NON_GPIO_PIN(0x58, 0x398), - MX35_PIN_A12 = _MXC_BUILD_NON_GPIO_PIN(0x5C, 0x39C), - MX35_PIN_A13 = _MXC_BUILD_NON_GPIO_PIN(0x60, 0x3A0), - MX35_PIN_A14 = _MXC_BUILD_NON_GPIO_PIN(0x64, 0x3A4), - MX35_PIN_A15 = _MXC_BUILD_NON_GPIO_PIN(0x68, 0x3A8), - MX35_PIN_A16 = _MXC_BUILD_NON_GPIO_PIN(0x6C, 0x3AC), - MX35_PIN_A17 = _MXC_BUILD_NON_GPIO_PIN(0x70, 0x3B0), - MX35_PIN_A18 = _MXC_BUILD_NON_GPIO_PIN(0x74, 0x3B4), - MX35_PIN_A19 = _MXC_BUILD_NON_GPIO_PIN(0x78, 0x3B8), - MX35_PIN_A20 = _MXC_BUILD_NON_GPIO_PIN(0x7C, 0x3BC), - MX35_PIN_A21 = _MXC_BUILD_NON_GPIO_PIN(0x80, 0x3C0), - MX35_PIN_A22 = _MXC_BUILD_NON_GPIO_PIN(0x84, 0x3C4), - MX35_PIN_A23 = _MXC_BUILD_NON_GPIO_PIN(0x88, 0x3C8), - MX35_PIN_A24 = _MXC_BUILD_NON_GPIO_PIN(0x8C, 0x3CC), - MX35_PIN_A25 = _MXC_BUILD_NON_GPIO_PIN(0x90, 0x3D0), - - MX35_PIN_EB0 = _MXC_BUILD_NON_GPIO_PIN(0x94, 0x46C), - MX35_PIN_EB1 = _MXC_BUILD_NON_GPIO_PIN(0x98, 0x470), - MX35_PIN_OE = _MXC_BUILD_NON_GPIO_PIN(0x9C, 0x474), - MX35_PIN_CS0 = _MXC_BUILD_NON_GPIO_PIN(0xA0, 0x478), - MX35_PIN_CS1 = _MXC_BUILD_NON_GPIO_PIN(0xA4, 0x47C), - MX35_PIN_CS2 = _MXC_BUILD_NON_GPIO_PIN(0xA8, 0x480), - MX35_PIN_CS3 = _MXC_BUILD_NON_GPIO_PIN(0xAC, 0x484), - MX35_PIN_CS4 = _MXC_BUILD_GPIO_PIN(0, 20, 0xB0, 0x488), - MX35_PIN_CS5 = _MXC_BUILD_GPIO_PIN(0, 21, 0xB4, 0x48C), - MX35_PIN_NFCE_B = _MXC_BUILD_GPIO_PIN(0, 22, 0xB8, 0x490), - - MX35_PIN_LBA = _MXC_BUILD_NON_GPIO_PIN(0xBC, 0x498), - MX35_PIN_BCLK = _MXC_BUILD_NON_GPIO_PIN(0xC0, 0x49C), - MX35_PIN_RW = _MXC_BUILD_NON_GPIO_PIN(0xC4, 0x4A0), - - MX35_PIN_NFWE_B = _MXC_BUILD_GPIO_PIN(0, 18, 0xC8, 0x4CC), - MX35_PIN_NFRE_B = _MXC_BUILD_GPIO_PIN(0, 19, 0xCC, 0x4D0), - MX35_PIN_NFALE = _MXC_BUILD_GPIO_PIN(0, 20, 0xD0, 0x4D4), - MX35_PIN_NFCLE = _MXC_BUILD_GPIO_PIN(0, 21, 0xD4, 0x4D8), - MX35_PIN_NFWP_B = _MXC_BUILD_GPIO_PIN(0, 22, 0xD8, 0x4DC), - MX35_PIN_NFRB = _MXC_BUILD_GPIO_PIN(0, 23, 0xDC, 0x4E0), - - MX35_PIN_D15 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4E4), - MX35_PIN_D14 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4E8), - MX35_PIN_D13 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4EC), - MX35_PIN_D12 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F0), - MX35_PIN_D11 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F4), - MX35_PIN_D10 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F8), - MX35_PIN_D9 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4FC), - MX35_PIN_D8 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x500), - MX35_PIN_D7 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x504), - MX35_PIN_D6 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x508), - MX35_PIN_D5 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x50C), - MX35_PIN_D4 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x510), - MX35_PIN_D3 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x514), - MX35_PIN_D2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x518), - MX35_PIN_D1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x51C), - MX35_PIN_D0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x520), - - MX35_PIN_CSI_D8 = _MXC_BUILD_GPIO_PIN(0, 20, 0xE0, 0x524), - MX35_PIN_CSI_D9 = _MXC_BUILD_GPIO_PIN(0, 21, 0xE4, 0x528), - MX35_PIN_CSI_D10 = _MXC_BUILD_GPIO_PIN(0, 22, 0xE8, 0x52C), - MX35_PIN_CSI_D11 = _MXC_BUILD_GPIO_PIN(0, 23, 0xEC, 0x530), - MX35_PIN_CSI_D12 = _MXC_BUILD_GPIO_PIN(0, 24, 0xF0, 0x534), - MX35_PIN_CSI_D13 = _MXC_BUILD_GPIO_PIN(0, 25, 0xF4, 0x538), - MX35_PIN_CSI_D14 = _MXC_BUILD_GPIO_PIN(0, 26, 0xF8, 0x53C), - MX35_PIN_CSI_D15 = _MXC_BUILD_GPIO_PIN(0, 27, 0xFC, 0x540), - MX35_PIN_CSI_MCLK = _MXC_BUILD_GPIO_PIN(0, 28, 0x100, 0x544), - MX35_PIN_CSI_VSYNC = _MXC_BUILD_GPIO_PIN(0, 29, 0x104, 0x548), - MX35_PIN_CSI_HSYNC = _MXC_BUILD_GPIO_PIN(0, 30, 0x108, 0x54C), - MX35_PIN_CSI_PIXCLK = _MXC_BUILD_GPIO_PIN(0, 31, 0x10C, 0x550), - - MX35_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(1, 24, 0x110, 0x554), - MX35_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(1, 25, 0x114, 0x558), - MX35_PIN_I2C2_CLK = _MXC_BUILD_GPIO_PIN(1, 26, 0x118, 0x55C), - MX35_PIN_I2C2_DAT = _MXC_BUILD_GPIO_PIN(1, 27, 0x11C, 0x560), - - MX35_PIN_STXD4 = _MXC_BUILD_GPIO_PIN(1, 28, 0x120, 0x564), - MX35_PIN_SRXD4 = _MXC_BUILD_GPIO_PIN(1, 29, 0x124, 0x568), - MX35_PIN_SCK4 = _MXC_BUILD_GPIO_PIN(1, 30, 0x128, 0x56C), - MX35_PIN_STXFS4 = _MXC_BUILD_GPIO_PIN(1, 31, 0x12C, 0x570), - MX35_PIN_STXD5 = _MXC_BUILD_GPIO_PIN(0, 0, 0x130, 0x574), - MX35_PIN_SRXD5 = _MXC_BUILD_GPIO_PIN(0, 1, 0x134, 0x578), - MX35_PIN_SCK5 = _MXC_BUILD_GPIO_PIN(0, 2, 0x138, 0x57C), - MX35_PIN_STXFS5 = _MXC_BUILD_GPIO_PIN(0, 3, 0x13C, 0x580), - - MX35_PIN_SCKR = _MXC_BUILD_GPIO_PIN(0, 4, 0x140, 0x584), - MX35_PIN_FSR = _MXC_BUILD_GPIO_PIN(0, 5, 0x144, 0x588), - MX35_PIN_HCKR = _MXC_BUILD_GPIO_PIN(0, 6, 0x148, 0x58C), - MX35_PIN_SCKT = _MXC_BUILD_GPIO_PIN(0, 7, 0x14C, 0x590), - MX35_PIN_FST = _MXC_BUILD_GPIO_PIN(0, 8, 0x150, 0x594), - MX35_PIN_HCKT = _MXC_BUILD_GPIO_PIN(0, 9, 0x154, 0x598), - MX35_PIN_TX5_RX0 = _MXC_BUILD_GPIO_PIN(0, 10, 0x158, 0x59C), - MX35_PIN_TX4_RX1 = _MXC_BUILD_GPIO_PIN(0, 11, 0x15C, 0x5A0), - MX35_PIN_TX3_RX2 = _MXC_BUILD_GPIO_PIN(0, 12, 0x160, 0x5A4), - MX35_PIN_TX2_RX3 = _MXC_BUILD_GPIO_PIN(0, 13, 0x164, 0x5A8), - MX35_PIN_TX1 = _MXC_BUILD_GPIO_PIN(0, 14, 0x168, 0x5AC), - MX35_PIN_TX0 = _MXC_BUILD_GPIO_PIN(0, 15, 0x16C, 0x5B0), - - MX35_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(0, 16, 0x170, 0x5B4), - MX35_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(0, 17, 0x174, 0x5B8), - MX35_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(0, 18, 0x178, 0x5BC), - MX35_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(0, 19, 0x17C, 0x5C0), - MX35_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(2, 4, 0x180, 0x5C4), - MX35_PIN_CSPI1_SPI_RDY = _MXC_BUILD_GPIO_PIN(2, 5, 0x184, 0x5C8), - - MX35_PIN_RXD1 = _MXC_BUILD_GPIO_PIN(2, 6, 0x188, 0x5CC), - MX35_PIN_TXD1 = _MXC_BUILD_GPIO_PIN(2, 7, 0x18C, 0x5D0), - MX35_PIN_RTS1 = _MXC_BUILD_GPIO_PIN(2, 8, 0x190, 0x5D4), - MX35_PIN_CTS1 = _MXC_BUILD_GPIO_PIN(2, 9, 0x194, 0x5D8), - MX35_PIN_RXD2 = _MXC_BUILD_GPIO_PIN(2, 10, 0x198, 0x5DC), - MX35_PIN_TXD2 = _MXC_BUILD_GPIO_PIN(1, 11, 0x19C, 0x5E0), - MX35_PIN_RTS2 = _MXC_BUILD_GPIO_PIN(1, 12, 0x1A0, 0x5E4), - MX35_PIN_CTS2 = _MXC_BUILD_GPIO_PIN(1, 13, 0x1A4, 0x5E8), - - MX35_PIN_USBOTG_PWR = _MXC_BUILD_GPIO_PIN(2, 14, 0x1A8, 0x60C), - MX35_PIN_USBOTG_OC = _MXC_BUILD_GPIO_PIN(2, 15, 0x1AC, 0x610), - - MX35_PIN_LD0 = _MXC_BUILD_GPIO_PIN(1, 0, 0x1B0, 0x614), - MX35_PIN_LD1 = _MXC_BUILD_GPIO_PIN(1, 1, 0x1B4, 0x618), - MX35_PIN_LD2 = _MXC_BUILD_GPIO_PIN(1, 2, 0x1B8, 0x61C), - MX35_PIN_LD3 = _MXC_BUILD_GPIO_PIN(1, 3, 0x1BC, 0x620), - MX35_PIN_LD4 = _MXC_BUILD_GPIO_PIN(1, 4, 0x1C0, 0x624), - MX35_PIN_LD5 = _MXC_BUILD_GPIO_PIN(1, 5, 0x1C4, 0x628), - MX35_PIN_LD6 = _MXC_BUILD_GPIO_PIN(1, 6, 0x1C8, 0x62C), - MX35_PIN_LD7 = _MXC_BUILD_GPIO_PIN(1, 7, 0x1CC, 0x630), - MX35_PIN_LD8 = _MXC_BUILD_GPIO_PIN(1, 8, 0x1D0, 0x634), - MX35_PIN_LD9 = _MXC_BUILD_GPIO_PIN(1, 9, 0x1D4, 0x638), - MX35_PIN_LD10 = _MXC_BUILD_GPIO_PIN(1, 10, 0x1D8, 0x63C), - MX35_PIN_LD11 = _MXC_BUILD_GPIO_PIN(1, 11, 0x1DC, 0x640), - MX35_PIN_LD12 = _MXC_BUILD_GPIO_PIN(1, 12, 0x1E0, 0x644), - MX35_PIN_LD13 = _MXC_BUILD_GPIO_PIN(1, 13, 0x1E4, 0x648), - MX35_PIN_LD14 = _MXC_BUILD_GPIO_PIN(1, 14, 0x1E8, 0x64C), - MX35_PIN_LD15 = _MXC_BUILD_GPIO_PIN(1, 15, 0x1EC, 0x650), - MX35_PIN_LD16 = _MXC_BUILD_GPIO_PIN(1, 16, 0x1F0, 0x654), - MX35_PIN_LD17 = _MXC_BUILD_GPIO_PIN(1, 17, 0x1F4, 0x658), - MX35_PIN_LD18 = _MXC_BUILD_GPIO_PIN(2, 24, 0x1F8, 0x65C), - MX35_PIN_LD19 = _MXC_BUILD_GPIO_PIN(2, 25, 0x1FC, 0x660), - MX35_PIN_LD20 = _MXC_BUILD_GPIO_PIN(2, 26, 0x200, 0x664), - MX35_PIN_LD21 = _MXC_BUILD_GPIO_PIN(2, 27, 0x204, 0x668), - MX35_PIN_LD22 = _MXC_BUILD_GPIO_PIN(2, 28, 0x208, 0x66C), - MX35_PIN_LD23 = _MXC_BUILD_GPIO_PIN(2, 29, 0x20C, 0x670), - - MX35_PIN_D3_HSYNC = _MXC_BUILD_GPIO_PIN(2, 30, 0x210, 0x674), - MX35_PIN_D3_FPSHIFT = _MXC_BUILD_GPIO_PIN(2, 31, 0x214, 0x678), - MX35_PIN_D3_DRDY = _MXC_BUILD_GPIO_PIN(0, 0, 0x218, 0x67C), - MX35_PIN_CONTRAST = _MXC_BUILD_GPIO_PIN(0, 1, 0x21C, 0x680), - MX35_PIN_D3_VSYNC = _MXC_BUILD_GPIO_PIN(0, 2, 0x220, 0x684), - MX35_PIN_D3_REV = _MXC_BUILD_GPIO_PIN(0, 3, 0x224, 0x688), - MX35_PIN_D3_CLS = _MXC_BUILD_GPIO_PIN(0, 4, 0x228, 0x68C), - MX35_PIN_D3_SPL = _MXC_BUILD_GPIO_PIN(0, 5, 0x22C, 0x690), - - MX35_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(0, 6, 0x230, 0x694), - MX35_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(0, 7, 0x234, 0x698), - MX35_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 8, 0x238, 0x69C), - MX35_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 9, 0x23C, 0x6A0), - MX35_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 10, 0x240, 0x6A4), - MX35_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 11, 0x244, 0x6A8), - MX35_PIN_SD2_CMD = _MXC_BUILD_GPIO_PIN(1, 0, 0x248, 0x6AC), - MX35_PIN_SD2_CLK = _MXC_BUILD_GPIO_PIN(1, 1, 0x24C, 0x6B0), - MX35_PIN_SD2_DATA0 = _MXC_BUILD_GPIO_PIN(1, 2, 0x250, 0x6B4), - MX35_PIN_SD2_DATA1 = _MXC_BUILD_GPIO_PIN(1, 3, 0x254, 0x6B8), - MX35_PIN_SD2_DATA2 = _MXC_BUILD_GPIO_PIN(1, 4, 0x258, 0x6BC), - MX35_PIN_SD2_DATA3 = _MXC_BUILD_GPIO_PIN(1, 5, 0x25C, 0x6C0), - - MX35_PIN_ATA_CS0 = _MXC_BUILD_GPIO_PIN(1, 6, 0x260, 0x6C4), - MX35_PIN_ATA_CS1 = _MXC_BUILD_GPIO_PIN(1, 7, 0x264, 0x6C8), - MX35_PIN_ATA_DIOR = _MXC_BUILD_GPIO_PIN(1, 8, 0x268, 0x6CC), - MX35_PIN_ATA_DIOW = _MXC_BUILD_GPIO_PIN(1, 9, 0x26C, 0x6D0), - MX35_PIN_ATA_DMACK = _MXC_BUILD_GPIO_PIN(1, 10, 0x270, 0x6D4), - MX35_PIN_ATA_RESET_B = _MXC_BUILD_GPIO_PIN(1, 11, 0x274, 0x6D8), - MX35_PIN_ATA_IORDY = _MXC_BUILD_GPIO_PIN(1, 12, 0x278, 0x6DC), - MX35_PIN_ATA_DATA0 = _MXC_BUILD_GPIO_PIN(1, 13, 0x27C, 0x6E0), - MX35_PIN_ATA_DATA1 = _MXC_BUILD_GPIO_PIN(1, 14, 0x280, 0x6E4), - MX35_PIN_ATA_DATA2 = _MXC_BUILD_GPIO_PIN(1, 15, 0x284, 0x6E8), - MX35_PIN_ATA_DATA3 = _MXC_BUILD_GPIO_PIN(1, 16, 0x288, 0x6EC), - MX35_PIN_ATA_DATA4 = _MXC_BUILD_GPIO_PIN(1, 17, 0x28C, 0x6F0), - MX35_PIN_ATA_DATA5 = _MXC_BUILD_GPIO_PIN(1, 18, 0x290, 0x6F4), - MX35_PIN_ATA_DATA6 = _MXC_BUILD_GPIO_PIN(1, 19, 0x294, 0x6F8), - MX35_PIN_ATA_DATA7 = _MXC_BUILD_GPIO_PIN(1, 20, 0x298, 0x6FC), - MX35_PIN_ATA_DATA8 = _MXC_BUILD_GPIO_PIN(1, 21, 0x29C, 0x700), - MX35_PIN_ATA_DATA9 = _MXC_BUILD_GPIO_PIN(1, 22, 0x2A0, 0x704), - MX35_PIN_ATA_DATA10 = _MXC_BUILD_GPIO_PIN(1, 23, 0x2A4, 0x708), - MX35_PIN_ATA_DATA11 = _MXC_BUILD_GPIO_PIN(1, 24, 0x2A8, 0x70C), - MX35_PIN_ATA_DATA12 = _MXC_BUILD_GPIO_PIN(1, 25, 0x2AC, 0x710), - MX35_PIN_ATA_DATA13 = _MXC_BUILD_GPIO_PIN(1, 26, 0x2B0, 0x714), - MX35_PIN_ATA_DATA14 = _MXC_BUILD_GPIO_PIN(1, 27, 0x2B4, 0x718), - MX35_PIN_ATA_DATA15 = _MXC_BUILD_GPIO_PIN(1, 28, 0x2B8, 0x71C), - MX35_PIN_ATA_INTRQ = _MXC_BUILD_GPIO_PIN(1, 29, 0x2BC, 0x720), - MX35_PIN_ATA_BUFF_EN = _MXC_BUILD_GPIO_PIN(1, 30, 0x2C0, 0x724), - MX35_PIN_ATA_DMARQ = _MXC_BUILD_GPIO_PIN(1, 31, 0x2C4, 0x728), - MX35_PIN_ATA_DA0 = _MXC_BUILD_GPIO_PIN(2, 0, 0x2C8, 0x72C), - MX35_PIN_ATA_DA1 = _MXC_BUILD_GPIO_PIN(2, 1, 0x2CC, 0x730), - MX35_PIN_ATA_DA2 = _MXC_BUILD_GPIO_PIN(2, 2, 0x2D0, 0x734), - - MX35_PIN_MLB_CLK = _MXC_BUILD_GPIO_PIN(2, 3, 0x2D4, 0x738), - MX35_PIN_MLB_DAT = _MXC_BUILD_GPIO_PIN(2, 4, 0x2D8, 0x73C), - MX35_PIN_MLB_SIG = _MXC_BUILD_GPIO_PIN(2, 5, 0x2DC, 0x740), - - MX35_PIN_FEC_TX_CLK = _MXC_BUILD_GPIO_PIN(2, 6, 0x2E0, 0x744), - MX35_PIN_FEC_RX_CLK = _MXC_BUILD_GPIO_PIN(2, 7, 0x2E4, 0x748), - MX35_PIN_FEC_RX_DV = _MXC_BUILD_GPIO_PIN(2, 8, 0x2E8, 0x74C), - MX35_PIN_FEC_COL = _MXC_BUILD_GPIO_PIN(2, 9, 0x2EC, 0x750), - MX35_PIN_FEC_RDATA0 = _MXC_BUILD_GPIO_PIN(2, 10, 0x2F0, 0x754), - MX35_PIN_FEC_TDATA0 = _MXC_BUILD_GPIO_PIN(2, 11, 0x2F4, 0x758), - MX35_PIN_FEC_TX_EN = _MXC_BUILD_GPIO_PIN(2, 12, 0x2F8, 0x75C), - MX35_PIN_FEC_MDC = _MXC_BUILD_GPIO_PIN(2, 13, 0x2FC, 0x760), - MX35_PIN_FEC_MDIO = _MXC_BUILD_GPIO_PIN(2, 14, 0x300, 0x764), - MX35_PIN_FEC_TX_ERR = _MXC_BUILD_GPIO_PIN(2, 15, 0x304, 0x768), - MX35_PIN_FEC_RX_ERR = _MXC_BUILD_GPIO_PIN(2, 16, 0x308, 0x76C), - MX35_PIN_FEC_CRS = _MXC_BUILD_GPIO_PIN(2, 17, 0x30C, 0x770), - MX35_PIN_FEC_RDATA1 = _MXC_BUILD_GPIO_PIN(2, 18, 0x310, 0x774), - MX35_PIN_FEC_TDATA1 = _MXC_BUILD_GPIO_PIN(2, 19, 0x314, 0x778), - MX35_PIN_FEC_RDATA2 = _MXC_BUILD_GPIO_PIN(2, 20, 0x318, 0x77C), - MX35_PIN_FEC_TDATA2 = _MXC_BUILD_GPIO_PIN(2, 21, 0x31C, 0x780), - MX35_PIN_FEC_RDATA3 = _MXC_BUILD_GPIO_PIN(2, 22, 0x320, 0x784), - MX35_PIN_FEC_TDATA3 = _MXC_BUILD_GPIO_PIN(2, 23, 0x324, 0x788), -} iomux_pin_name_t; - -#endif -#endif diff --git a/arch/arm/include/asm/arch-mx35/sys_proto.h b/arch/arm/include/asm/arch-mx35/sys_proto.h deleted file mode 100644 index 422eb52..0000000 --- a/arch/arm/include/asm/arch-mx35/sys_proto.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -u32 get_cpu_rev(void); -#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) -void sdelay(unsigned long); - -#endif diff --git a/arch/arm/include/asm/arch-mx5/asm-offsets.h b/arch/arm/include/asm/arch-mx5/asm-offsets.h deleted file mode 100644 index 793f69c..0000000 --- a/arch/arm/include/asm/arch-mx5/asm-offsets.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * needed for arch/arm/cpu/armv7/mx51/lowlevel_init.S - * - * These should be auto-generated - */ -/* CCM */ -#define CLKCTL_CCR 0x00 -#define CLKCTL_CCDR 0x04 -#define CLKCTL_CSR 0x08 -#define CLKCTL_CCSR 0x0C -#define CLKCTL_CACRR 0x10 -#define CLKCTL_CBCDR 0x14 -#define CLKCTL_CBCMR 0x18 -#define CLKCTL_CSCMR1 0x1C -#define CLKCTL_CSCMR2 0x20 -#define CLKCTL_CSCDR1 0x24 -#define CLKCTL_CS1CDR 0x28 -#define CLKCTL_CS2CDR 0x2C -#define CLKCTL_CDCDR 0x30 -#define CLKCTL_CHSCCDR 0x34 -#define CLKCTL_CSCDR2 0x38 -#define CLKCTL_CSCDR3 0x3C -#define CLKCTL_CSCDR4 0x40 -#define CLKCTL_CWDR 0x44 -#define CLKCTL_CDHIPR 0x48 -#define CLKCTL_CDCR 0x4C -#define CLKCTL_CTOR 0x50 -#define CLKCTL_CLPCR 0x54 -#define CLKCTL_CISR 0x58 -#define CLKCTL_CIMR 0x5C -#define CLKCTL_CCOSR 0x60 -#define CLKCTL_CGPR 0x64 -#define CLKCTL_CCGR0 0x68 -#define CLKCTL_CCGR1 0x6C -#define CLKCTL_CCGR2 0x70 -#define CLKCTL_CCGR3 0x74 -#define CLKCTL_CCGR4 0x78 -#define CLKCTL_CCGR5 0x7C -#define CLKCTL_CCGR6 0x80 -#if defined(CONFIG_MX53) -#define CLKCTL_CCGR7 0x84 -#define CLKCTL_CMEOR 0x88 -#elif defined(CONFIG_MX51) -#define CLKCTL_CMEOR 0x84 -#endif - -/* DPLL */ -#define PLL_DP_CTL 0x00 -#define PLL_DP_CONFIG 0x04 -#define PLL_DP_OP 0x08 -#define PLL_DP_MFD 0x0C -#define PLL_DP_MFN 0x10 -#define PLL_DP_HFS_OP 0x1C -#define PLL_DP_HFS_MFD 0x20 -#define PLL_DP_HFS_MFN 0x24 diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h deleted file mode 100644 index 1f8a537..0000000 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * (C) Copyright 2009 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H - -enum mxc_clock { - MXC_ARM_CLK = 0, - MXC_AHB_CLK, - MXC_IPG_CLK, - MXC_IPG_PERCLK, - MXC_UART_CLK, - MXC_CSPI_CLK, - MXC_FEC_CLK, -}; - -unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); - -u32 imx_get_uartclk(void); -u32 imx_get_fecclk(void); -unsigned int mxc_get_clock(enum mxc_clock clk); - -#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h deleted file mode 100644 index 4ed8eb3..0000000 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ /dev/null @@ -1,203 +0,0 @@ -/* - * (C) Copyright 2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ARCH_ARM_MACH_MX51_CRM_REGS_H__ -#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__ - -#define MXC_CCM_BASE CCM_BASE_ADDR - -/* DPLL register mapping structure */ -struct mxc_pll_reg { - u32 ctrl; - u32 config; - u32 op; - u32 mfd; - u32 mfn; - u32 mfn_minus; - u32 mfn_plus; - u32 hfs_op; - u32 hfs_mfd; - u32 hfs_mfn; - u32 mfn_togc; - u32 destat; -}; - -/* Register maping of CCM*/ -struct mxc_ccm_reg { - u32 ccr; /* 0x0000 */ - u32 ccdr; - u32 csr; - u32 ccsr; - u32 cacrr; /* 0x0010*/ - u32 cbcdr; - u32 cbcmr; - u32 cscmr1; - u32 cscmr2; /* 0x0020 */ - u32 cscdr1; - u32 cs1cdr; - u32 cs2cdr; - u32 cdcdr; /* 0x0030 */ - u32 chscdr; - u32 cscdr2; - u32 cscdr3; - u32 cscdr4; /* 0x0040 */ - u32 cwdr; - u32 cdhipr; - u32 cdcr; - u32 ctor; /* 0x0050 */ - u32 clpcr; - u32 cisr; - u32 cimr; - u32 ccosr; /* 0x0060 */ - u32 cgpr; - u32 CCGR0; - u32 CCGR1; - u32 CCGR2; /* 0x0070 */ - u32 CCGR3; - u32 CCGR4; - u32 CCGR5; - u32 CCGR6; /* 0x0080 */ - u32 cmeor; -}; - -/* Define the bits in register CACRR */ -#define MXC_CCM_CACRR_ARM_PODF_OFFSET 0 -#define MXC_CCM_CACRR_ARM_PODF_MASK 0x7 - -/* Define the bits in register CBCDR */ -#define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26) -#define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25) -#define MXC_CCM_CBCDR_EMI_PODF_OFFSET 22 -#define MXC_CCM_CBCDR_EMI_PODF_MASK (0x7 << 22) -#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET 19 -#define MXC_CCM_CBCDR_AXI_B_PODF_MASK (0x7 << 19) -#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET 16 -#define MXC_CCM_CBCDR_AXI_A_PODF_MASK (0x7 << 16) -#define MXC_CCM_CBCDR_NFC_PODF_OFFSET 13 -#define MXC_CCM_CBCDR_NFC_PODF_MASK (0x7 << 13) -#define MXC_CCM_CBCDR_AHB_PODF_OFFSET 10 -#define MXC_CCM_CBCDR_AHB_PODF_MASK (0x7 << 10) -#define MXC_CCM_CBCDR_IPG_PODF_OFFSET 8 -#define MXC_CCM_CBCDR_IPG_PODF_MASK (0x3 << 8) -#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET 6 -#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK (0x3 << 6) -#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET 3 -#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK (0x7 << 3) -#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET 0 -#define MXC_CCM_CBCDR_PERCLK_PODF_MASK 0x7 - -/* Define the bits in register CSCMR1 */ -#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET 30 -#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK (0x3 << 30) -#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET 28 -#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK (0x3 << 28) -#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET 26 -#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL (0x1 << 26) -#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET 24 -#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK (0x3 << 24) -#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET 22 -#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK (0x3 << 22) -#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET 20 -#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK (0x3 << 20) -#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL (0x1 << 19) -#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL (0x1 << 18) -#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET 16 -#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK (0x3 << 16) -#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET 14 -#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK (0x3 << 14) -#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET 12 -#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK (0x3 << 12) -#define MXC_CCM_CSCMR1_SSI3_CLK_SEL (0x1 << 11) -#define MXC_CCM_CSCMR1_VPU_RCLK_SEL (0x1 << 10) -#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET 8 -#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK (0x3 << 8) -#define MXC_CCM_CSCMR1_TVE_CLK_SEL (0x1 << 7) -#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL (0x1 << 6) -#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET 4 -#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK (0x3 << 4) -#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET 2 -#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK (0x3 << 2) -#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1) -#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL 0x1 - -/* Define the bits in register CSCDR2 */ -#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET 25 -#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25) -#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET 19 -#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK (0x3F << 19) -#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET 16 -#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK (0x7 << 16) -#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET 9 -#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK (0x3F << 9) -#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET 6 -#define MXC_CCM_CSCDR2_SLIMBUS_PRED_MASK (0x7 << 6) -#define MXC_CCM_CSCDR2_SLIMBUS_PODF_OFFSET 0 -#define MXC_CCM_CSCDR2_SLIMBUS_PODF_MASK 0x3F - -/* Define the bits in register CBCMR */ -#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET 14 -#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK (0x3 << 14) -#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET 12 -#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK (0x3 << 12) -#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET 10 -#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK (0x3 << 10) -#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET 8 -#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK (0x3 << 8) -#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET 6 -#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK (0x3 << 6) -#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET 4 -#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK (0x3 << 4) -#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL (0x1 << 1) -#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL (0x1 << 0) - -/* Define the bits in register CSCDR1 */ -#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET 22 -#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK (0x7 << 22) -#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET 19 -#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK (0x7 << 19) -#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET 16 -#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK (0x7 << 16) -#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET 14 -#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK (0x3 << 14) -#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET 11 -#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK (0x7 << 11) -#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET 8 -#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK (0x7 << 8) -#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET 6 -#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK (0x3 << 6) -#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET 3 -#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK (0x7 << 3) -#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET 0 -#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK 0x7 - -/* Define the bits in register CCDR */ -#define MXC_CCM_CCDR_IPU_HS_MASK (0x1 << 17) - -/* Define the bits in register CCGRx */ -#define MXC_CCM_CCGR_CG_MASK 0x3 - -#define MXC_CCM_CCGR5_CG5_OFFSET 10 - -/* Define the bits in register CLPCR */ -#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS (0x1 << 18) - -#endif /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h deleted file mode 100644 index a1849f8..0000000 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * (C) Copyright 2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MX5_IMX_REGS_H__ -#define __ASM_ARCH_MX5_IMX_REGS_H__ - -#if defined(CONFIG_MX51) -#define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ -#define IPU_CTRL_BASE_ADDR 0x40000000 -#define SPBA0_BASE_ADDR 0x70000000 -#define AIPS1_BASE_ADDR 0x73F00000 -#define AIPS2_BASE_ADDR 0x83F00000 -#define CSD0_BASE_ADDR 0x90000000 -#define CSD1_BASE_ADDR 0xA0000000 -#define NFC_BASE_ADDR_AXI 0xCFFF0000 -#elif defined(CONFIG_MX53) -#define IPU_CTRL_BASE_ADDR 0x18000000 -#define SPBA0_BASE_ADDR 0x50000000 -#define AIPS1_BASE_ADDR 0x53F00000 -#define AIPS2_BASE_ADDR 0x63F00000 -#define CSD0_BASE_ADDR 0x70000000 -#define CSD1_BASE_ADDR 0xB0000000 -#define NFC_BASE_ADDR_AXI 0xF7FF0000 -#define IRAM_BASE_ADDR 0xF8000000 -#else -#error "CPU_TYPE not defined" -#endif - -#define IRAM_SIZE 0x00020000 /* 128 KB */ - -/* - * SPBA global module enabled #0 - */ -#define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) -#define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) -#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) -#define CSPI1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) -#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) -#define MMC_SDHC3_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) -#define MMC_SDHC4_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) -#define SPDIF_BASE_ADDR (SPBA0_BASE_ADDR + 0x00028000) -#define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00030000) -#define SLIM_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00034000) -#define HSI2C_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00038000) -#define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) - -/* - * AIPS 1 - */ -#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) -#define GPIO1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) -#define GPIO2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) -#define GPIO3_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) -#define GPIO4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) -#define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) -#define WDOG1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) -#define WDOG2_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) -#define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) -#define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) -#define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) -#define EPIT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) -#define EPIT2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) -#define PWM1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) -#define PWM2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) -#define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) -#define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000C0000) -#define SRC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000) -#define CCM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000) -#define GPC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D8000) - -#if defined(CONFIG_MX53) -#define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000) -#define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000) -#define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000) -#endif -/* - * AIPS 2 - */ -#define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) -#define PLL2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) -#define PLL3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000) -#define AHBMAX_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) -#define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) -#define CSU_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000) -#define ARM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000) -#define OWIRE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) -#define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A8000) -#define CSPI2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) -#define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) -#define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B4000) -#define ROMCP_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B8000) -#define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000BC000) -#define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) -#define I2C2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) -#define I2C1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) -#define SSI1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) -#define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) -#define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) -#define ESDCTL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D9000) -#define WEIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DA000) -#define NFC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DB000) -#define EMI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DBF00) -#define MIPI_HSC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) -#define ATA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) -#define SIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E4000) -#define SSI3BASE_ADDR (AIPS2_BASE_ADDR + 0x000E8000) -#define FEC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) -#define TVE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F0000) -#define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) -#define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) - -/* - * Number of GPIO pins per port - */ -#define GPIO_NUM_PIN 32 - -#define IIM_SREV 0x24 -#define ROM_SI_REV 0x48 - -#define NFC_BUF_SIZE 0x1000 - -/* M4IF */ -#define M4IF_FBPM0 0x40 -#define M4IF_FIDBP 0x48 - -/* Assuming 24MHz input clock with doubler ON */ -/* MFI PDF */ -#define DP_OP_850 ((8 << 4) + ((1 - 1) << 0)) -#define DP_MFD_850 (48 - 1) -#define DP_MFN_850 41 - -#define DP_OP_800 ((8 << 4) + ((1 - 1) << 0)) -#define DP_MFD_800 (3 - 1) -#define DP_MFN_800 1 - -#define DP_OP_700 ((7 << 4) + ((1 - 1) << 0)) -#define DP_MFD_700 (24 - 1) -#define DP_MFN_700 7 - -#define DP_OP_665 ((6 << 4) + ((1 - 1) << 0)) -#define DP_MFD_665 (96 - 1) -#define DP_MFN_665 89 - -#define DP_OP_532 ((5 << 4) + ((1 - 1) << 0)) -#define DP_MFD_532 (24 - 1) -#define DP_MFN_532 13 - -#define DP_OP_400 ((8 << 4) + ((2 - 1) << 0)) -#define DP_MFD_400 (3 - 1) -#define DP_MFN_400 1 - -#define DP_OP_216 ((6 << 4) + ((3 - 1) << 0)) -#define DP_MFD_216 (4 - 1) -#define DP_MFN_216 3 - -#define CHIP_REV_1_0 0x10 -#define CHIP_REV_1_1 0x11 -#define CHIP_REV_2_0 0x20 -#define CHIP_REV_2_5 0x25 -#define CHIP_REV_3_0 0x30 - -#define BOARD_REV_1_0 0x0 -#define BOARD_REV_2_0 0x1 - -#define IMX_IIM_BASE (IIM_BASE_ADDR) - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> - -extern void imx_get_mac_from_fuse(unsigned char *mac); - -#define __REG(x) (*((volatile u32 *)(x))) -#define __REG16(x) (*((volatile u16 *)(x))) -#define __REG8(x) (*((volatile u8 *)(x))) - -struct clkctl { - u32 ccr; - u32 ccdr; - u32 csr; - u32 ccsr; - u32 cacrr; - u32 cbcdr; - u32 cbcmr; - u32 cscmr1; - u32 cscmr2; - u32 cscdr1; - u32 cs1cdr; - u32 cs2cdr; - u32 cdcdr; - u32 chsccdr; - u32 cscdr2; - u32 cscdr3; - u32 cscdr4; - u32 cwdr; - u32 cdhipr; - u32 cdcr; - u32 ctor; - u32 clpcr; - u32 cisr; - u32 cimr; - u32 ccosr; - u32 cgpr; - u32 ccgr0; - u32 ccgr1; - u32 ccgr2; - u32 ccgr3; - u32 ccgr4; - u32 ccgr5; - u32 ccgr6; - u32 cmeor; -}; - -/* WEIM registers */ -struct weim { - u32 csgcr1; - u32 csgcr2; - u32 csrcr1; - u32 csrcr2; - u32 cswcr1; - u32 cswcr2; -}; - -/* GPIO Registers */ -struct gpio_regs { - u32 gpio_dr; - u32 gpio_dir; - u32 gpio_psr; -}; - -/* System Reset Controller (SRC) */ -struct src { - u32 scr; - u32 sbmr; - u32 srsr; - u32 reserved1[2]; - u32 sisr; - u32 simr; -}; - -/* CSPI registers */ -struct cspi_regs { - u32 rxdata; - u32 txdata; - u32 ctrl; - u32 cfg; - u32 intr; - u32 dma; - u32 stat; - u32 period; -}; - -struct iim_regs { - u32 stat; - u32 statm; - u32 err; - u32 emask; - u32 fctl; - u32 ua; - u32 la; - u32 sdat; - u32 prev; - u32 srev; - u32 preg_p; - u32 scs0; - u32 scs1; - u32 scs2; - u32 scs3; - u32 res0[0x1f1]; - struct fuse_bank { - u32 fuse_regs[0x20]; - u32 fuse_rsvd[0xe0]; - } bank[4]; -}; - -struct fuse_bank1_regs { - u32 fuse0_8[9]; - u32 mac_addr[6]; - u32 fuse15_31[0x11]; -}; - -#endif /* __ASSEMBLER__*/ - -#endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx5/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h deleted file mode 100644 index 760371b..0000000 --- a/arch/arm/include/asm/arch-mx5/iomux.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __MACH_MX5_IOMUX_H__ -#define __MACH_MX5_IOMUX_H__ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/mx5x_pins.h> - -typedef unsigned int iomux_pin_name_t; - -/* various IOMUX output functions */ -typedef enum iomux_config { - IOMUX_CONFIG_ALT0, /*!< used as alternate function 0 */ - IOMUX_CONFIG_ALT1, /*!< used as alternate function 1 */ - IOMUX_CONFIG_ALT2, /*!< used as alternate function 2 */ - IOMUX_CONFIG_ALT3, /*!< used as alternate function 3 */ - IOMUX_CONFIG_ALT4, /*!< used as alternate function 4 */ - IOMUX_CONFIG_ALT5, /*!< used as alternate function 5 */ - IOMUX_CONFIG_ALT6, /*!< used as alternate function 6 */ - IOMUX_CONFIG_ALT7, /*!< used as alternate function 7 */ - IOMUX_CONFIG_GPIO, /*!< added to help user use GPIO mode */ - IOMUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */ -} iomux_pin_cfg_t; - -/* various IOMUX pad functions */ -typedef enum iomux_pad_config { - PAD_CTL_SRE_SLOW = 0x0 << 0, /* Slow slew rate */ - PAD_CTL_SRE_FAST = 0x1 << 0, /* Fast slew rate */ - PAD_CTL_DRV_LOW = 0x0 << 1, /* Low drive strength */ - PAD_CTL_DRV_MEDIUM = 0x1 << 1, /* Medium drive strength */ - PAD_CTL_DRV_HIGH = 0x2 << 1, /* High drive strength */ - PAD_CTL_DRV_MAX = 0x3 << 1, /* Max drive strength */ - PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, /* Opendrain disable */ - PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3,/* Opendrain enable */ - PAD_CTL_100K_PD = 0x0 << 4, /* 100Kohm pulldown */ - PAD_CTL_47K_PU = 0x1 << 4, /* 47Kohm pullup */ - PAD_CTL_100K_PU = 0x2 << 4, /* 100Kohm pullup */ - PAD_CTL_22K_PU = 0x3 << 4, /* 22Kohm pullup */ - PAD_CTL_PUE_KEEPER = 0x0 << 6, /* enable pulldown */ - PAD_CTL_PUE_PULL = 0x1 << 6, /* enable pullup */ - PAD_CTL_PKE_NONE = 0x0 << 7, /* Disable pullup/pulldown */ - PAD_CTL_PKE_ENABLE = 0x1 << 7, /* Enable pullup/pulldown */ - PAD_CTL_HYS_NONE = 0x0 << 8, /* Hysteresis disabled */ - PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */ - PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */ - PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */ - PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */ - PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */ -} iomux_pad_config_t; - -/* various IOMUX input functions */ -typedef enum iomux_input_config { - INPUT_CTL_PATH0 = 0x0, - INPUT_CTL_PATH1, - INPUT_CTL_PATH2, - INPUT_CTL_PATH3, - INPUT_CTL_PATH4, - INPUT_CTL_PATH5, - INPUT_CTL_PATH6, - INPUT_CTL_PATH7, -} iomux_input_config_t; - -void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); -void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); -void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); -unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin); -void mxc_iomux_set_input(iomux_input_select_t input, u32 config); - -#endif /* __MACH_MX5_IOMUX_H__ */ diff --git a/arch/arm/include/asm/arch-mx5/mx5x_pins.h b/arch/arm/include/asm/arch-mx5/mx5x_pins.h deleted file mode 100644 index 4e3a31b..0000000 --- a/arch/arm/include/asm/arch-mx5/mx5x_pins.h +++ /dev/null @@ -1,881 +0,0 @@ -/* - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MX5_MX5X_PINS_H__ -#define __ASM_ARCH_MX5_MX5X_PINS_H__ - -#ifndef __ASSEMBLY__ - -/* - * In order to identify pins more effectively, each mux-controlled pin's - * enumerated value is constructed in the following way: - * - * ------------------------------------------------------------------- - * 31-29 | 28 - 24 | 23 - 21 | 20 - 10| 9 - 0 - * ------------------------------------------------------------------- - * IO_P | IO_I | GPIO_I | PAD_I | MUX_I - * ------------------------------------------------------------------- - * - * Bit 0 to 9 contains MUX_I used to identify the register - * offset (0-based. base is IOMUX_module_base) defined in the Section - * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The - * similar field definitions are used for the pad control register. - * The IOMUX controller can be split in two parts. At the begeinning, - * there is the register definitions for the multiplexing each pin. - * Then there is a set of registers (PAD_I) to configure each pin - * (pullup, pulldown, etc). - * PAD_I defines the offset of the pad register for each pin. - * GPIO_I defines, if available, the number of gpio that can be - * connected to that pad - * IO_I defines the multiplexer mode required to set the pad in gpio mode - * IO_P defines the gpio structure (gpio1..gpio4) the pad belongs - * - * For example, the MX51_PIN_ETM_D0 is defined in the enumeration: - * ( (0x28 - MUX_I_START) << MUX_I)|( (0x250 - PAD_I_START) << PAD_I) - * It means the mux control register is at register offset 0x28. The pad control - * register offset is: 0x250 and also occupy the least significant bits - * within the register. - */ - -/*! - * Starting bit position within each entry of \b iomux_pins to represent the - * MUX control register offset - */ -#define MUX_I 0 -/*! - * Starting bit position within each entry of \b iomux_pins to represent the - * PAD control register offset - */ -#define PAD_I 10 -/*! - * Starting bit position within each entry of \b iomux_pins to represent which - * mux mode is for GPIO (0-based) - */ -#define GPIO_I 21 - -#define MUX_IO_P 29 -#define MUX_IO_I 24 -#define IOMUX_TO_GPIO(pin) ((((unsigned int)pin >> MUX_IO_P) * \ - GPIO_NUM_PIN) + ((pin >> MUX_IO_I) &\ - ((1 << (MUX_IO_P - MUX_IO_I)) - 1))) -#define IOMUX_TO_IRQ(pin) (MXC_GPIO_INT_BASE + IOMUX_TO_GPIO(pin)) -#define GPIO_TO_PORT(n) (n / GPIO_NUM_PIN) -#define GPIO_TO_INDEX(n) (n % GPIO_NUM_PIN) - -#define NON_GPIO_PORT 0x7 -#define PIN_TO_MUX_MASK ((1 << (PAD_I - MUX_I)) - 1) -#define PIN_TO_PAD_MASK ((1 << (GPIO_I - PAD_I)) - 1) -#define PIN_TO_ALT_GPIO_MASK ((1 << (MUX_IO_I - GPIO_I)) - 1) - -#define NON_MUX_I PIN_TO_MUX_MASK -#define NON_PAD_I PIN_TO_PAD_MASK - -#if defined(CONFIG_MX51) -#define MUX_I_START 0x001C -#define PAD_I_START 0x3F0 -#define INPUT_CTL_START 0x8C4 -#define MUX_I_END (PAD_I_START - 4) -#elif defined(CONFIG_MX53) -#define MUX_I_START 0x0020 -#define PAD_I_START 0x348 -#define INPUT_CTL_START 0x730 -#define MUX_I_END (PAD_I_START - 4) -#else -#error "CPU_TYPE not defined" -#endif - -#define _MXC_BUILD_PIN(gp, gi, ga, mi, pi) \ - (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ - ((mi) << MUX_I) | \ - ((pi - PAD_I_START) << PAD_I) | \ - ((ga) << GPIO_I)) - -#define _MXC_BUILD_GPIO_PIN(gp, gi, ga, mi, pi) \ - _MXC_BUILD_PIN(gp, gi, ga, mi, pi) - -#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ - _MXC_BUILD_PIN(NON_GPIO_PORT, 0, 0, mi, pi) - -#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) -#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) -#define PIN_TO_ALT_GPIO(pin) ((pin >> GPIO_I) & PIN_TO_ALT_GPIO_MASK) -#define PIN_TO_IOMUX_INDEX(pin) (PIN_TO_IOMUX_MUX(pin) >> 2) - -/* - * This enumeration is constructed based on the Section - * "sw_pad_ctl & sw_mux_ctl details" of the MX51 IC Spec. Each enumerated - * value is constructed based on the rules described above. - */ -enum { - MX51_PIN_EIM_DA0 = _MXC_BUILD_NON_GPIO_PIN(0x1C, 0x7A8), - MX51_PIN_EIM_DA1 = _MXC_BUILD_NON_GPIO_PIN(0x20, 0x7A8), - MX51_PIN_EIM_DA2 = _MXC_BUILD_NON_GPIO_PIN(0x24, 0x7A8), - MX51_PIN_EIM_DA3 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x7A8), - MX51_PIN_EIM_DA4 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x7AC), - MX51_PIN_EIM_DA5 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x7AC), - MX51_PIN_EIM_DA6 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x7AC), - MX51_PIN_EIM_DA7 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x7AC), - MX51_PIN_EIM_DA8 = _MXC_BUILD_NON_GPIO_PIN(0x3C, 0x7B0), - MX51_PIN_EIM_DA9 = _MXC_BUILD_NON_GPIO_PIN(0x40, 0x7B0), - MX51_PIN_EIM_DA10 = _MXC_BUILD_NON_GPIO_PIN(0x44, 0x7B0), - MX51_PIN_EIM_DA11 = _MXC_BUILD_NON_GPIO_PIN(0x48, 0x7B0), - MX51_PIN_EIM_DA12 = _MXC_BUILD_NON_GPIO_PIN(0x4C, 0x7BC), - MX51_PIN_EIM_DA13 = _MXC_BUILD_NON_GPIO_PIN(0x50, 0x7BC), - MX51_PIN_EIM_DA14 = _MXC_BUILD_NON_GPIO_PIN(0x54, 0x7BC), - MX51_PIN_EIM_DA15 = _MXC_BUILD_NON_GPIO_PIN(0x58, 0x7BC), - MX51_PIN_EIM_D16 = _MXC_BUILD_GPIO_PIN(1, 0, 1, 0x5C, 0x3F0), - MX51_PIN_EIM_D17 = _MXC_BUILD_GPIO_PIN(1, 1, 1, 0x60, 0x3F4), - MX51_PIN_EIM_D18 = _MXC_BUILD_GPIO_PIN(1, 2, 1, 0x64, 0x3F8), - MX51_PIN_EIM_D19 = _MXC_BUILD_GPIO_PIN(1, 3, 1, 0x68, 0x3FC), - MX51_PIN_EIM_D20 = _MXC_BUILD_GPIO_PIN(1, 4, 1, 0x6C, 0x400), - MX51_PIN_EIM_D21 = _MXC_BUILD_GPIO_PIN(1, 5, 1, 0x70, 0x404), - MX51_PIN_EIM_D22 = _MXC_BUILD_GPIO_PIN(1, 6, 1, 0x74, 0x408), - MX51_PIN_EIM_D23 = _MXC_BUILD_GPIO_PIN(1, 7, 1, 0x78, 0x40C), - MX51_PIN_EIM_D24 = _MXC_BUILD_GPIO_PIN(1, 8, 1, 0x7C, 0x410), - MX51_PIN_EIM_D25 = _MXC_BUILD_NON_GPIO_PIN(0x80, 0x414), - MX51_PIN_EIM_D26 = _MXC_BUILD_NON_GPIO_PIN(0x84, 0x418), - MX51_PIN_EIM_D27 = _MXC_BUILD_GPIO_PIN(1, 9, 1, 0x88, 0x41C), - MX51_PIN_EIM_D28 = _MXC_BUILD_NON_GPIO_PIN(0x8C, 0x420), - MX51_PIN_EIM_D29 = _MXC_BUILD_NON_GPIO_PIN(0x90, 0x424), - MX51_PIN_EIM_D30 = _MXC_BUILD_NON_GPIO_PIN(0x94, 0x428), - MX51_PIN_EIM_D31 = _MXC_BUILD_NON_GPIO_PIN(0x98, 0x42C), - MX51_PIN_EIM_A16 = _MXC_BUILD_GPIO_PIN(1, 10, 1, 0x9C, 0x430), - MX51_PIN_EIM_A17 = _MXC_BUILD_GPIO_PIN(1, 11, 1, 0xA0, 0x434), - MX51_PIN_EIM_A18 = _MXC_BUILD_GPIO_PIN(1, 12, 1, 0xA4, 0x438), - MX51_PIN_EIM_A19 = _MXC_BUILD_GPIO_PIN(1, 13, 1, 0xA8, 0x43C), - MX51_PIN_EIM_A20 = _MXC_BUILD_GPIO_PIN(1, 14, 1, 0xAC, 0x440), - MX51_PIN_EIM_A21 = _MXC_BUILD_GPIO_PIN(1, 15, 1, 0xB0, 0x444), - MX51_PIN_EIM_A22 = _MXC_BUILD_GPIO_PIN(1, 16, 1, 0xB4, 0x448), - MX51_PIN_EIM_A23 = _MXC_BUILD_GPIO_PIN(1, 17, 1, 0xB8, 0x44C), - MX51_PIN_EIM_A24 = _MXC_BUILD_GPIO_PIN(1, 18, 1, 0xBC, 0x450), - MX51_PIN_EIM_A25 = _MXC_BUILD_GPIO_PIN(1, 19, 1, 0xC0, 0x454), - MX51_PIN_EIM_A26 = _MXC_BUILD_GPIO_PIN(1, 20, 1, 0xC4, 0x458), - MX51_PIN_EIM_A27 = _MXC_BUILD_GPIO_PIN(1, 21, 1, 0xC8, 0x45C), - MX51_PIN_EIM_EB0 = _MXC_BUILD_NON_GPIO_PIN(0xCC, 0x460), - MX51_PIN_EIM_EB1 = _MXC_BUILD_NON_GPIO_PIN(0xD0, 0x464), - MX51_PIN_EIM_EB2 = _MXC_BUILD_GPIO_PIN(1, 22, 1, 0xD4, 0x468), - MX51_PIN_EIM_EB3 = _MXC_BUILD_GPIO_PIN(1, 23, 1, 0xD8, 0x46C), - MX51_PIN_EIM_OE = _MXC_BUILD_GPIO_PIN(1, 24, 1, 0xDC, 0x470), - MX51_PIN_EIM_CS0 = _MXC_BUILD_GPIO_PIN(1, 25, 1, 0xE0, 0x474), - MX51_PIN_EIM_CS1 = _MXC_BUILD_GPIO_PIN(1, 26, 1, 0xE4, 0x478), - MX51_PIN_EIM_CS2 = _MXC_BUILD_GPIO_PIN(1, 27, 1, 0xE8, 0x47C), - MX51_PIN_EIM_CS3 = _MXC_BUILD_GPIO_PIN(1, 28, 1, 0xEC, 0x480), - MX51_PIN_EIM_CS4 = _MXC_BUILD_GPIO_PIN(1, 29, 1, 0xF0, 0x484), - MX51_PIN_EIM_CS5 = _MXC_BUILD_GPIO_PIN(1, 30, 1, 0xF4, 0x488), - MX51_PIN_EIM_DTACK = _MXC_BUILD_GPIO_PIN(1, 31, 1, 0xF8, 0x48C), - MX51_PIN_EIM_LBA = _MXC_BUILD_GPIO_PIN(2, 1, 1, 0xFC, 0x494), - MX51_PIN_EIM_CRE = _MXC_BUILD_GPIO_PIN(2, 2, 1, 0x100, 0x4A0), - MX51_PIN_DRAM_CS1 = _MXC_BUILD_NON_GPIO_PIN(0x104, 0x4D0), - MX51_PIN_NANDF_WE_B = _MXC_BUILD_GPIO_PIN(2, 3, 3, 0x108, 0x4E4), - MX51_PIN_NANDF_RE_B = _MXC_BUILD_GPIO_PIN(2, 4, 3, 0x10C, 0x4E8), - MX51_PIN_NANDF_ALE = _MXC_BUILD_GPIO_PIN(2, 5, 3, 0x110, 0x4EC), - MX51_PIN_NANDF_CLE = _MXC_BUILD_GPIO_PIN(2, 6, 3, 0x114, 0x4F0), - MX51_PIN_NANDF_WP_B = _MXC_BUILD_GPIO_PIN(2, 7, 3, 0x118, 0x4F4), - MX51_PIN_NANDF_RB0 = _MXC_BUILD_GPIO_PIN(2, 8, 3, 0x11C, 0x4F8), - MX51_PIN_NANDF_RB1 = _MXC_BUILD_GPIO_PIN(2, 9, 3, 0x120, 0x4FC), - MX51_PIN_NANDF_RB2 = _MXC_BUILD_GPIO_PIN(2, 10, 3, 0x124, 0x500), - MX51_PIN_NANDF_RB3 = _MXC_BUILD_GPIO_PIN(2, 11, 3, 0x128, 0x504), - MX51_PIN_GPIO_NAND = _MXC_BUILD_GPIO_PIN(2, 12, 3, 0x12C, 0x514), - MX51_PIN_NANDF_RB4 = MX51_PIN_GPIO_NAND, - MX51_PIN_NANDF_RB5 = _MXC_BUILD_GPIO_PIN(2, 13, 3, 0x130, 0x5D8), - MX51_PIN_NANDF_RB6 = _MXC_BUILD_GPIO_PIN(2, 14, 3, 0x134, 0x5DC), - MX51_PIN_NANDF_RB7 = _MXC_BUILD_GPIO_PIN(2, 15, 3, 0x138, 0x5E0), - MX51_PIN_NANDF_CS0 = _MXC_BUILD_GPIO_PIN(2, 16, 3, 0x130, 0x518), - MX51_PIN_NANDF_CS1 = _MXC_BUILD_GPIO_PIN(2, 17, 3, 0x134, 0x51C), - MX51_PIN_NANDF_CS2 = _MXC_BUILD_GPIO_PIN(2, 18, 3, 0x138, 0x520), - MX51_PIN_NANDF_CS3 = _MXC_BUILD_GPIO_PIN(2, 19, 3, 0x13C, 0x524), - MX51_PIN_NANDF_CS4 = _MXC_BUILD_GPIO_PIN(2, 20, 3, 0x140, 0x528), - MX51_PIN_NANDF_CS5 = _MXC_BUILD_GPIO_PIN(2, 21, 3, 0x144, 0x52C), - MX51_PIN_NANDF_CS6 = _MXC_BUILD_GPIO_PIN(2, 22, 3, 0x148, 0x530), - MX51_PIN_NANDF_CS7 = _MXC_BUILD_GPIO_PIN(2, 23, 3, 0x14C, 0x534), - MX51_PIN_NANDF_RDY_INT = _MXC_BUILD_GPIO_PIN(2, 24, 3, 0x150, 0x538), - MX51_PIN_NANDF_D15 = _MXC_BUILD_GPIO_PIN(2, 25, 3, 0x154, 0x53C), - MX51_PIN_NANDF_D14 = _MXC_BUILD_GPIO_PIN(2, 26, 3, 0x158, 0x540), - MX51_PIN_NANDF_D13 = _MXC_BUILD_GPIO_PIN(2, 27, 3, 0x15C, 0x544), - MX51_PIN_NANDF_D12 = _MXC_BUILD_GPIO_PIN(2, 28, 3, 0x160, 0x548), - MX51_PIN_NANDF_D11 = _MXC_BUILD_GPIO_PIN(2, 29, 3, 0x164, 0x54C), - MX51_PIN_NANDF_D10 = _MXC_BUILD_GPIO_PIN(2, 30, 3, 0x168, 0x550), - MX51_PIN_NANDF_D9 = _MXC_BUILD_GPIO_PIN(2, 31, 3, 0x16C, 0x554), - MX51_PIN_NANDF_D8 = _MXC_BUILD_GPIO_PIN(3, 0, 3, 0x170, 0x558), - MX51_PIN_NANDF_D7 = _MXC_BUILD_GPIO_PIN(3, 1, 3, 0x174, 0x55C), - MX51_PIN_NANDF_D6 = _MXC_BUILD_GPIO_PIN(3, 2, 3, 0x178, 0x560), - MX51_PIN_NANDF_D5 = _MXC_BUILD_GPIO_PIN(3, 3, 3, 0x17C, 0x564), - MX51_PIN_NANDF_D4 = _MXC_BUILD_GPIO_PIN(3, 4, 3, 0x180, 0x568), - MX51_PIN_NANDF_D3 = _MXC_BUILD_GPIO_PIN(3, 5, 3, 0x184, 0x56C), - MX51_PIN_NANDF_D2 = _MXC_BUILD_GPIO_PIN(3, 6, 3, 0x188, 0x570), - MX51_PIN_NANDF_D1 = _MXC_BUILD_GPIO_PIN(3, 7, 3, 0x18C, 0x574), - MX51_PIN_NANDF_D0 = _MXC_BUILD_GPIO_PIN(3, 8, 3, 0x190, 0x578), - MX51_PIN_CSI1_D8 = _MXC_BUILD_GPIO_PIN(2, 12, 3, 0x194, 0x57C), - MX51_PIN_CSI1_D9 = _MXC_BUILD_GPIO_PIN(2, 13, 3, 0x198, 0x580), - MX51_PIN_CSI1_D10 = _MXC_BUILD_NON_GPIO_PIN(0x19C, 0x584), - MX51_PIN_CSI1_D11 = _MXC_BUILD_NON_GPIO_PIN(0x1A0, 0x588), - MX51_PIN_CSI1_D12 = _MXC_BUILD_NON_GPIO_PIN(0x1A4, 0x58C), - MX51_PIN_CSI1_D13 = _MXC_BUILD_NON_GPIO_PIN(0x1A8, 0x590), - MX51_PIN_CSI1_D14 = _MXC_BUILD_NON_GPIO_PIN(0x1AC, 0x594), - MX51_PIN_CSI1_D15 = _MXC_BUILD_NON_GPIO_PIN(0x1B0, 0x598), - MX51_PIN_CSI1_D16 = _MXC_BUILD_NON_GPIO_PIN(0x1B4, 0x59C), - MX51_PIN_CSI1_D17 = _MXC_BUILD_NON_GPIO_PIN(0x1B8, 0x5A0), - MX51_PIN_CSI1_D18 = _MXC_BUILD_NON_GPIO_PIN(0x1BC, 0x5A4), - MX51_PIN_CSI1_D19 = _MXC_BUILD_NON_GPIO_PIN(0x1C0, 0x5A8), - MX51_PIN_CSI1_VSYNC = _MXC_BUILD_NON_GPIO_PIN(0x1C4, 0x5AC), - MX51_PIN_CSI1_HSYNC = _MXC_BUILD_NON_GPIO_PIN(0x1C8, 0x5B0), - MX51_PIN_CSI1_PIXCLK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5B4), - MX51_PIN_CSI1_MCLK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5B8), - MX51_PIN_CSI1_PKE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x860), - MX51_PIN_CSI2_D12 = _MXC_BUILD_GPIO_PIN(3, 9, 3, 0x1CC, 0x5BC), - MX51_PIN_CSI2_D13 = _MXC_BUILD_GPIO_PIN(3, 10, 3, 0x1D0, 0x5C0), - MX51_PIN_CSI2_D14 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1D4, 0x5C4), - MX51_PIN_CSI2_D15 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1D8, 0x5C8), - MX51_PIN_CSI2_D16 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1DC, 0x5CC), - MX51_PIN_CSI2_D17 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1E0, 0x5D0), - MX51_PIN_CSI2_D18 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1E4, 0x5D4), - MX51_PIN_CSI2_D19 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1E8, 0x5D8), - MX51_PIN_CSI2_VSYNC = _MXC_BUILD_GPIO_PIN(3, 13, 3, 0x1EC, 0x5DC), - MX51_PIN_CSI2_HSYNC = _MXC_BUILD_GPIO_PIN(3, 14, 3, 0x1F0, 0x5E0), - MX51_PIN_CSI2_PIXCLK = _MXC_BUILD_GPIO_PIN(3, 15, 3, 0x1F4, 0x5E4), - MX51_PIN_CSI2_PKE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x81C), - MX51_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(3, 16, 3, 0x1F8, 0x5E8), - MX51_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(3, 17, 3, 0x1FC, 0x5EC), - MX51_PIN_AUD3_BB_TXD = _MXC_BUILD_GPIO_PIN(3, 18, 3, 0x200, 0x5F0), - MX51_PIN_AUD3_BB_RXD = _MXC_BUILD_GPIO_PIN(3, 19, 3, 0x204, 0x5F4), - MX51_PIN_AUD3_BB_CK = _MXC_BUILD_GPIO_PIN(3, 20, 3, 0x208, 0x5F8), - MX51_PIN_AUD3_BB_FS = _MXC_BUILD_GPIO_PIN(3, 21, 3, 0x20C, 0x5FC), - MX51_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(3, 22, 3, 0x210, 0x600), - MX51_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(3, 23, 3, 0x214, 0x604), - MX51_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(3, 24, 3, 0x218, 0x608), - MX51_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(3, 25, 3, 0x21C, 0x60C), - MX51_PIN_CSPI1_RDY = _MXC_BUILD_GPIO_PIN(3, 26, 3, 0x220, 0x610), - MX51_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(3, 27, 3, 0x224, 0x614), - MX51_PIN_UART1_RXD = _MXC_BUILD_GPIO_PIN(3, 28, 3, 0x228, 0x618), - MX51_PIN_UART1_TXD = _MXC_BUILD_GPIO_PIN(3, 29, 3, 0x22C, 0x61C), - MX51_PIN_UART1_RTS = _MXC_BUILD_GPIO_PIN(3, 30, 3, 0x230, 0x620), - MX51_PIN_UART1_CTS = _MXC_BUILD_GPIO_PIN(3, 31, 3, 0x234, 0x624), - MX51_PIN_UART2_RXD = _MXC_BUILD_GPIO_PIN(0, 20, 3, 0x238, 0x628), - MX51_PIN_UART2_TXD = _MXC_BUILD_GPIO_PIN(0, 21, 3, 0x23C, 0x62C), - MX51_PIN_UART3_RXD = _MXC_BUILD_GPIO_PIN(0, 22, 3, 0x240, 0x630), - MX51_PIN_UART3_TXD = _MXC_BUILD_GPIO_PIN(0, 23, 3, 0x244, 0x634), - MX51_PIN_OWIRE_LINE = _MXC_BUILD_GPIO_PIN(0, 24, 3, 0x248, 0x638), - MX51_PIN_KEY_ROW0 = _MXC_BUILD_NON_GPIO_PIN(0x24C, 0x63C), - MX51_PIN_KEY_ROW1 = _MXC_BUILD_NON_GPIO_PIN(0x250, 0x640), - MX51_PIN_KEY_ROW2 = _MXC_BUILD_NON_GPIO_PIN(0x254, 0x644), - MX51_PIN_KEY_ROW3 = _MXC_BUILD_NON_GPIO_PIN(0x258, 0x648), - MX51_PIN_KEY_COL0 = _MXC_BUILD_NON_GPIO_PIN(0x25C, 0x64C), - MX51_PIN_KEY_COL1 = _MXC_BUILD_NON_GPIO_PIN(0x260, 0x650), - MX51_PIN_KEY_COL2 = _MXC_BUILD_NON_GPIO_PIN(0x264, 0x654), - MX51_PIN_KEY_COL3 = _MXC_BUILD_NON_GPIO_PIN(0x268, 0x658), - MX51_PIN_KEY_COL4 = _MXC_BUILD_NON_GPIO_PIN(0x26C, 0x65C), - MX51_PIN_KEY_COL5 = _MXC_BUILD_NON_GPIO_PIN(0x270, 0x660), - MX51_PIN_USBH1_CLK = _MXC_BUILD_GPIO_PIN(0, 25, 2, 0x278, 0x678), - MX51_PIN_USBH1_DIR = _MXC_BUILD_GPIO_PIN(0, 26, 2, 0x27C, 0x67C), - MX51_PIN_USBH1_STP = _MXC_BUILD_GPIO_PIN(0, 27, 2, 0x280, 0x680), - MX51_PIN_USBH1_NXT = _MXC_BUILD_GPIO_PIN(0, 28, 2, 0x284, 0x684), - MX51_PIN_USBH1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 11, 2, 0x288, 0x688), - MX51_PIN_USBH1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 12, 2, 0x28C, 0x68C), - MX51_PIN_USBH1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 13, 2, 0x290, 0x690), - MX51_PIN_USBH1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 14, 2, 0x294, 0x694), - MX51_PIN_USBH1_DATA4 = _MXC_BUILD_GPIO_PIN(0, 15, 2, 0x298, 0x698), - MX51_PIN_USBH1_DATA5 = _MXC_BUILD_GPIO_PIN(0, 16, 2, 0x29C, 0x69C), - MX51_PIN_USBH1_DATA6 = _MXC_BUILD_GPIO_PIN(0, 17, 2, 0x2A0, 0x6A0), - MX51_PIN_USBH1_DATA7 = _MXC_BUILD_GPIO_PIN(0, 18, 2, 0x2A4, 0x6A4), - MX51_PIN_DI1_PIN11 = _MXC_BUILD_GPIO_PIN(2, 0, 4, 0x2A8, 0x6A8), - MX51_PIN_DI1_PIN12 = _MXC_BUILD_GPIO_PIN(2, 1, 4, 0x2AC, 0x6AC), - MX51_PIN_DI1_PIN13 = _MXC_BUILD_GPIO_PIN(2, 2, 4, 0x2B0, 0x6B0), - MX51_PIN_DI1_D0_CS = _MXC_BUILD_GPIO_PIN(2, 3, 4, 0x2B4, 0x6B4), - MX51_PIN_DI1_D1_CS = _MXC_BUILD_GPIO_PIN(2, 4, 4, 0x2B8, 0x6B8), - MX51_PIN_DISPB2_SER_DIN = _MXC_BUILD_GPIO_PIN(2, 5, 4, 0x2BC, 0x6BC), - MX51_PIN_DISPB2_SER_DIO = _MXC_BUILD_GPIO_PIN(2, 6, 4, 0x2C0, 0x6C0), - MX51_PIN_DISPB2_SER_CLK = _MXC_BUILD_GPIO_PIN(2, 7, 4, 0x2C4, 0x6C4), - MX51_PIN_DISPB2_SER_RS = _MXC_BUILD_GPIO_PIN(2, 8, 4, 0x2C8, 0x6C8), - MX51_PIN_DISP1_DAT0 = _MXC_BUILD_NON_GPIO_PIN(0x2CC, 0x6CC), - MX51_PIN_DISP1_DAT1 = _MXC_BUILD_NON_GPIO_PIN(0x2D0, 0x6D0), - MX51_PIN_DISP1_DAT2 = _MXC_BUILD_NON_GPIO_PIN(0x2D4, 0x6D4), - MX51_PIN_DISP1_DAT3 = _MXC_BUILD_NON_GPIO_PIN(0x2D8, 0x6D8), - MX51_PIN_DISP1_DAT4 = _MXC_BUILD_NON_GPIO_PIN(0x2DC, 0x6DC), - MX51_PIN_DISP1_DAT5 = _MXC_BUILD_NON_GPIO_PIN(0x2E0, 0x6E0), - MX51_PIN_DISP1_DAT6 = _MXC_BUILD_NON_GPIO_PIN(0x2E4, 0x6E4), - MX51_PIN_DISP1_DAT7 = _MXC_BUILD_NON_GPIO_PIN(0x2E8, 0x6E8), - MX51_PIN_DISP1_DAT8 = _MXC_BUILD_NON_GPIO_PIN(0x2EC, 0x6EC), - MX51_PIN_DISP1_DAT9 = _MXC_BUILD_NON_GPIO_PIN(0x2F0, 0x6F0), - MX51_PIN_DISP1_DAT10 = _MXC_BUILD_NON_GPIO_PIN(0x2F4, 0x6F4), - MX51_PIN_DISP1_DAT11 = _MXC_BUILD_NON_GPIO_PIN(0x2F8, 0x6F8), - MX51_PIN_DISP1_DAT12 = _MXC_BUILD_NON_GPIO_PIN(0x2FC, 0x6FC), - MX51_PIN_DISP1_DAT13 = _MXC_BUILD_NON_GPIO_PIN(0x300, 0x700), - MX51_PIN_DISP1_DAT14 = _MXC_BUILD_NON_GPIO_PIN(0x304, 0x704), - MX51_PIN_DISP1_DAT15 = _MXC_BUILD_NON_GPIO_PIN(0x308, 0x708), - MX51_PIN_DISP1_DAT16 = _MXC_BUILD_NON_GPIO_PIN(0x30C, 0x70C), - MX51_PIN_DISP1_DAT17 = _MXC_BUILD_NON_GPIO_PIN(0x310, 0x710), - MX51_PIN_DISP1_DAT18 = _MXC_BUILD_NON_GPIO_PIN(0x314, 0x714), - MX51_PIN_DISP1_DAT19 = _MXC_BUILD_NON_GPIO_PIN(0x318, 0x718), - MX51_PIN_DISP1_DAT20 = _MXC_BUILD_NON_GPIO_PIN(0x31C, 0x71C), - MX51_PIN_DISP1_DAT21 = _MXC_BUILD_NON_GPIO_PIN(0x320, 0x720), - MX51_PIN_DISP1_DAT22 = _MXC_BUILD_NON_GPIO_PIN(0x324, 0x724), - MX51_PIN_DISP1_DAT23 = _MXC_BUILD_NON_GPIO_PIN(0x328, 0x728), - MX51_PIN_DI1_PIN3 = _MXC_BUILD_NON_GPIO_PIN(0x32C, 0x72C), - MX51_PIN_DI1_PIN2 = _MXC_BUILD_NON_GPIO_PIN(0x330, 0x734), - MX51_PIN_DI_GP1 = _MXC_BUILD_NON_GPIO_PIN(0x334, 0x73C), - MX51_PIN_DI_GP2 = _MXC_BUILD_NON_GPIO_PIN(0x338, 0x740), - MX51_PIN_DI_GP3 = _MXC_BUILD_NON_GPIO_PIN(0x33C, 0x744), - MX51_PIN_DI2_PIN4 = _MXC_BUILD_NON_GPIO_PIN(0x340, 0x748), - MX51_PIN_DI2_PIN2 = _MXC_BUILD_NON_GPIO_PIN(0x344, 0x74C), - MX51_PIN_DI2_PIN3 = _MXC_BUILD_NON_GPIO_PIN(0x348, 0x750), - MX51_PIN_DI2_DISP_CLK = _MXC_BUILD_NON_GPIO_PIN(0x34C, 0x754), - MX51_PIN_DI_GP4 = _MXC_BUILD_NON_GPIO_PIN(0x350, 0x758), - MX51_PIN_DISP2_DAT0 = _MXC_BUILD_NON_GPIO_PIN(0x354, 0x75C), - MX51_PIN_DISP2_DAT1 = _MXC_BUILD_NON_GPIO_PIN(0x358, 0x760), - MX51_PIN_DISP2_DAT2 = _MXC_BUILD_NON_GPIO_PIN(0x35C, 0x764), - MX51_PIN_DISP2_DAT3 = _MXC_BUILD_NON_GPIO_PIN(0x360, 0x768), - MX51_PIN_DISP2_DAT4 = _MXC_BUILD_NON_GPIO_PIN(0x364, 0x76C), - MX51_PIN_DISP2_DAT5 = _MXC_BUILD_NON_GPIO_PIN(0x368, 0x770), - MX51_PIN_DISP2_DAT6 = _MXC_BUILD_GPIO_PIN(0, 19, 5, 0x36C, 0x774), - MX51_PIN_DISP2_DAT7 = _MXC_BUILD_GPIO_PIN(0, 29, 5, 0x370, 0x778), - MX51_PIN_DISP2_DAT8 = _MXC_BUILD_GPIO_PIN(0, 30, 5, 0x374, 0x77C), - MX51_PIN_DISP2_DAT9 = _MXC_BUILD_GPIO_PIN(0, 31, 5, 0x378, 0x780), - MX51_PIN_DISP2_DAT10 = _MXC_BUILD_NON_GPIO_PIN(0x37C, 0x784), - MX51_PIN_DISP2_DAT11 = _MXC_BUILD_NON_GPIO_PIN(0x380, 0x788), - MX51_PIN_DISP2_DAT12 = _MXC_BUILD_NON_GPIO_PIN(0x384, 0x78C), - MX51_PIN_DISP2_DAT13 = _MXC_BUILD_NON_GPIO_PIN(0x388, 0x790), - MX51_PIN_DISP2_DAT14 = _MXC_BUILD_NON_GPIO_PIN(0x38C, 0x794), - MX51_PIN_DISP2_DAT15 = _MXC_BUILD_NON_GPIO_PIN(0x390, 0x798), - MX51_PIN_SD1_CMD = _MXC_BUILD_NON_GPIO_PIN(0x394, 0x79C), - MX51_PIN_SD1_CLK = _MXC_BUILD_NON_GPIO_PIN(0x398, 0x7A0), - MX51_PIN_SD1_DATA0 = _MXC_BUILD_NON_GPIO_PIN(0x39C, 0x7A4), - MX51_PIN_SD1_DATA1 = _MXC_BUILD_NON_GPIO_PIN(0x3A0, 0x7A8), - MX51_PIN_SD1_DATA2 = _MXC_BUILD_NON_GPIO_PIN(0x3A4, 0x7AC), - MX51_PIN_SD1_DATA3 = _MXC_BUILD_NON_GPIO_PIN(0x3A8, 0x7B0), - MX51_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 1, 0x3AC, 0x7B4), - MX51_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 1, 0x3B0, 0x7B8), - MX51_PIN_SD2_CMD = _MXC_BUILD_NON_GPIO_PIN(0x3B4, 0x7BC), - MX51_PIN_SD2_CLK = _MXC_BUILD_NON_GPIO_PIN(0x3B8, 0x7C0), - MX51_PIN_SD2_DATA0 = _MXC_BUILD_NON_GPIO_PIN(0x3BC, 0x7C4), - MX51_PIN_SD2_DATA1 = _MXC_BUILD_NON_GPIO_PIN(0x3C0, 0x7C8), - MX51_PIN_SD2_DATA2 = _MXC_BUILD_NON_GPIO_PIN(0x3C4, 0x7CC), - MX51_PIN_SD2_DATA3 = _MXC_BUILD_NON_GPIO_PIN(0x3C8, 0x7D0), - MX51_PIN_GPIO1_2 = _MXC_BUILD_GPIO_PIN(0, 2, 0, 0x3CC, 0x7D4), - MX51_PIN_GPIO1_3 = _MXC_BUILD_GPIO_PIN(0, 3, 0, 0x3D0, 0x7D8), - MX51_PIN_PMIC_INT_REQ = _MXC_BUILD_NON_GPIO_PIN(0x3D4, 0x7FC), - MX51_PIN_GPIO1_4 = _MXC_BUILD_GPIO_PIN(0, 4, 0, 0x3D8, 0x804), - MX51_PIN_GPIO1_5 = _MXC_BUILD_GPIO_PIN(0, 5, 0, 0x3DC, 0x808), - MX51_PIN_GPIO1_6 = _MXC_BUILD_GPIO_PIN(0, 6, 0, 0x3E0, 0x80C), - MX51_PIN_GPIO1_7 = _MXC_BUILD_GPIO_PIN(0, 7, 0, 0x3E4, 0x810), - MX51_PIN_GPIO1_8 = _MXC_BUILD_GPIO_PIN(0, 8, 0, 0x3E8, 0x814), - MX51_PIN_GPIO1_9 = _MXC_BUILD_GPIO_PIN(0, 9, 0, 0x3EC, 0x818), - - /* The following are PADS used for drive strength */ - - MX51_PIN_CTL_GRP_DDRPKS = _MXC_BUILD_NON_GPIO_PIN(0, 0x820), - MX51_PIN_CTL_GRP_PKEDDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x838), - MX51_PIN_CTL_GRP_PKEADDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x890), - MX51_PIN_CTL_GRP_DDRAPKS = _MXC_BUILD_NON_GPIO_PIN(0, 0x87C), - MX51_PIN_CTL_GRP_DDRAPUS = _MXC_BUILD_NON_GPIO_PIN(0, 0x84C), - MX51_PIN_CTL_GRP_DDRPUS = _MXC_BUILD_NON_GPIO_PIN(0, 0x884), - MX51_PIN_CTL_GRP_HYSDDR0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x85C), - MX51_PIN_CTL_GRP_HYSDDR1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x864), - MX51_PIN_CTL_GRP_HYSDDR2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x86C), - MX51_PIN_CTL_GRP_HYSDDR3 = _MXC_BUILD_NON_GPIO_PIN(0, 0x874), - MX51_PIN_CTL_GRP_DDR_SR_B0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x878), - MX51_PIN_CTL_GRP_DDR_SR_B1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x880), - MX51_PIN_CTL_GRP_DDR_SR_B2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x88C), - MX51_PIN_CTL_GRP_DDR_SR_B4 = _MXC_BUILD_NON_GPIO_PIN(0, 0x89C), - MX51_PIN_CTL_GRP_DRAM_B0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8A4), - MX51_PIN_CTL_GRP_DRAM_B1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8AC), - MX51_PIN_CTL_GRP_DRAM_B2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8B8), - MX51_PIN_CTL_GRP_DRAM_B4 = _MXC_BUILD_NON_GPIO_PIN(0, 0x82C), - MX51_PIN_CTL_GRP_INMODE1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8A0), - MX51_PIN_CTL_GRP_DDR_SR_A0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8B0), - MX51_PIN_CTL_GRP_EMI_DS5 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8B4), - MX51_PIN_CTL_GRP_DDR_SR_A1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x8BC), - MX51_PIN_CTL_GRP_DDR_A0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x83C), - MX51_PIN_CTL_GRP_DDR_A1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x848), - MX51_PIN_CTL_GRP_DISP_PKE0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x868), - MX51_PIN_CTL_DRAM_RAS = _MXC_BUILD_NON_GPIO_PIN(0, 0x4A4), - MX51_PIN_CTL_DRAM_CAS = _MXC_BUILD_NON_GPIO_PIN(0, 0x4A8), - MX51_PIN_CTL_DRAM_SDWE = _MXC_BUILD_NON_GPIO_PIN(0, 0x4Ac), - MX51_PIN_CTL_DRAM_SDCKE0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4B0), - MX51_PIN_CTL_DRAM_SDCKE1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4B4), - MX51_PIN_CTL_DRAM_SDCLK = _MXC_BUILD_NON_GPIO_PIN(0, 0x4B8), - MX51_PIN_CTL_DRAM_SDQS0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4BC), - MX51_PIN_CTL_DRAM_SDQS1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4C0), - MX51_PIN_CTL_DRAM_SDQS2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4C4), - MX51_PIN_CTL_DRAM_SDQS3 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4C8), - MX51_PIN_CTL_DRAM_CS0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4CC), - MX51_PIN_CTL_DRAM_CS1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4D0), - MX51_PIN_CTL_DRAM_DQM0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4D4), - MX51_PIN_CTL_DRAM_DQM1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4D8), - MX51_PIN_CTL_DRAM_DQM2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4DC), - MX51_PIN_CTL_DRAM_DQM3 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4E0), -}; - -enum { - MX53_PIN_GPIO_19 = _MXC_BUILD_GPIO_PIN(3, 5, 1, 0x20, 0x348), - MX53_PIN_KEY_COL0 = _MXC_BUILD_GPIO_PIN(3, 6, 1, 0x24, 0x34C), - MX53_PIN_KEY_ROW0 = _MXC_BUILD_GPIO_PIN(3, 7, 1, 0x28, 0x350), - MX53_PIN_KEY_COL1 = _MXC_BUILD_GPIO_PIN(3, 8, 1, 0x2C, 0x354), - MX53_PIN_KEY_ROW1 = _MXC_BUILD_GPIO_PIN(3, 9, 1, 0x30, 0x358), - MX53_PIN_KEY_COL2 = _MXC_BUILD_GPIO_PIN(3, 10, 1, 0x34, 0x35C), - MX53_PIN_KEY_ROW2 = _MXC_BUILD_GPIO_PIN(3, 11, 1, 0x38, 0x360), - MX53_PIN_KEY_COL3 = _MXC_BUILD_GPIO_PIN(3, 12, 1, 0x3C, 0x364), - MX53_PIN_KEY_ROW3 = _MXC_BUILD_GPIO_PIN(3, 13, 1, 0x40, 0x368), - MX53_PIN_KEY_COL4 = _MXC_BUILD_GPIO_PIN(3, 14, 1, 0x44, 0x36C), - MX53_PIN_KEY_ROW4 = _MXC_BUILD_GPIO_PIN(3, 15, 1, 0x48, 0x370), - MX53_PIN_NVCC_KEYPAD = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x374), - MX53_PIN_DI0_DISP_CLK = _MXC_BUILD_GPIO_PIN(3, 16, 1, 0x4C, 0x378), - MX53_PIN_DI0_PIN15 = _MXC_BUILD_GPIO_PIN(3, 17, 1, 0x50, 0x37C), - MX53_PIN_DI0_PIN2 = _MXC_BUILD_GPIO_PIN(3, 18, 1, 0x54, 0x380), - MX53_PIN_DI0_PIN3 = _MXC_BUILD_GPIO_PIN(3, 19, 1, 0x58, 0x384), - MX53_PIN_DI0_PIN4 = _MXC_BUILD_GPIO_PIN(3, 20, 1, 0x5C, 0x388), - MX53_PIN_DISP0_DAT0 = _MXC_BUILD_GPIO_PIN(3, 21, 1, 0x60, 0x38C), - MX53_PIN_DISP0_DAT1 = _MXC_BUILD_GPIO_PIN(3, 22, 1, 0x64, 0x390), - MX53_PIN_DISP0_DAT2 = _MXC_BUILD_GPIO_PIN(3, 23, 1, 0x68, 0x394), - MX53_PIN_DISP0_DAT3 = _MXC_BUILD_GPIO_PIN(3, 24, 1, 0x6C, 0x398), - MX53_PIN_DISP0_DAT4 = _MXC_BUILD_GPIO_PIN(3, 25, 1, 0x70, 0x39C), - MX53_PIN_DISP0_DAT5 = _MXC_BUILD_GPIO_PIN(3, 26, 1, 0x74, 0x3A0), - MX53_PIN_DISP0_DAT6 = _MXC_BUILD_GPIO_PIN(3, 27, 1, 0x78, 0x3A4), - MX53_PIN_DISP0_DAT7 = _MXC_BUILD_GPIO_PIN(3, 28, 1, 0x7C, 0x3A8), - MX53_PIN_DISP0_DAT8 = _MXC_BUILD_GPIO_PIN(3, 29, 1, 0x80, 0x3AC), - MX53_PIN_DISP0_DAT9 = _MXC_BUILD_GPIO_PIN(3, 30, 1, 0x84, 0x3B0), - MX53_PIN_DISP0_DAT10 = _MXC_BUILD_GPIO_PIN(3, 31, 1, 0x88, 0x3B4), - MX53_PIN_DISP0_DAT11 = _MXC_BUILD_GPIO_PIN(4, 5, 1, 0x8C, 0x3B8), - MX53_PIN_DISP0_DAT12 = _MXC_BUILD_GPIO_PIN(4, 6, 1, 0x90, 0x3BC), - MX53_PIN_DISP0_DAT13 = _MXC_BUILD_GPIO_PIN(4, 7, 1, 0x94, 0x3C0), - MX53_PIN_DISP0_DAT14 = _MXC_BUILD_GPIO_PIN(4, 8, 1, 0x98, 0x3C4), - MX53_PIN_DISP0_DAT15 = _MXC_BUILD_GPIO_PIN(4, 9, 1, 0x9C, 0x3C8), - MX53_PIN_DISP0_DAT16 = _MXC_BUILD_GPIO_PIN(4, 10, 1, 0xA0, 0x3CC), - MX53_PIN_DISP0_DAT17 = _MXC_BUILD_GPIO_PIN(4, 11, 1, 0xA4, 0x3D0), - MX53_PIN_DISP0_DAT18 = _MXC_BUILD_GPIO_PIN(4, 12, 1, 0xA8, 0x3D4), - MX53_PIN_DISP0_DAT19 = _MXC_BUILD_GPIO_PIN(4, 13, 1, 0xAC, 0x3D8), - MX53_PIN_DISP0_DAT20 = _MXC_BUILD_GPIO_PIN(4, 14, 1, 0xB0, 0x3DC), - MX53_PIN_DISP0_DAT21 = _MXC_BUILD_GPIO_PIN(4, 15, 1, 0xB4, 0x3E0), - MX53_PIN_DISP0_DAT22 = _MXC_BUILD_GPIO_PIN(4, 16, 1, 0xB8, 0x3E4), - MX53_PIN_DISP0_DAT23 = _MXC_BUILD_GPIO_PIN(4, 17, 1, 0xBC, 0x3E8), - MX53_PIN_CSI0_PIXCLK = _MXC_BUILD_GPIO_PIN(4, 18, 1, 0xC0, 0x3EC), - MX53_PIN_CSI0_MCLK = _MXC_BUILD_GPIO_PIN(4, 19, 1, 0xC4, 0x3F0), - MX53_PIN_CSI0_DATA_EN = _MXC_BUILD_GPIO_PIN(4, 20, 1, 0xC8, 0x3F4), - MX53_PIN_CSI0_VSYNC = _MXC_BUILD_GPIO_PIN(4, 21, 1, 0xCC, 0x3F8), - MX53_PIN_CSI0_D4 = _MXC_BUILD_GPIO_PIN(4, 22, 1, 0xD0, 0x3FC), - MX53_PIN_CSI0_D5 = _MXC_BUILD_GPIO_PIN(4, 23, 1, 0xD4, 0x400), - MX53_PIN_CSI0_D6 = _MXC_BUILD_GPIO_PIN(4, 24, 1, 0xD8, 0x404), - MX53_PIN_CSI0_D7 = _MXC_BUILD_GPIO_PIN(4, 25, 1, 0xDC, 0x408), - MX53_PIN_CSI0_D8 = _MXC_BUILD_GPIO_PIN(4, 26, 1, 0xE0, 0x40C), - MX53_PIN_CSI0_D9 = _MXC_BUILD_GPIO_PIN(4, 27, 1, 0xE4, 0x410), - MX53_PIN_CSI0_D10 = _MXC_BUILD_GPIO_PIN(4, 28, 1, 0xE8, 0x414), - MX53_PIN_CSI0_D11 = _MXC_BUILD_GPIO_PIN(4, 29, 1, 0xEC, 0x418), - MX53_PIN_CSI0_D12 = _MXC_BUILD_GPIO_PIN(4, 30, 1, 0xF0, 0x41C), - MX53_PIN_CSI0_D13 = _MXC_BUILD_GPIO_PIN(4, 31, 1, 0xF4, 0x420), - MX53_PIN_CSI0_D14 = _MXC_BUILD_GPIO_PIN(5, 0, 1, 0xF8, 0x424), - MX53_PIN_CSI0_D15 = _MXC_BUILD_GPIO_PIN(5, 1, 1, 0xFC, 0x428), - MX53_PIN_CSI0_D16 = _MXC_BUILD_GPIO_PIN(5, 2, 1, 0x100, 0x42C), - MX53_PIN_CSI0_D17 = _MXC_BUILD_GPIO_PIN(5, 3, 1, 0x104, 0x430), - MX53_PIN_CSI0_D18 = _MXC_BUILD_GPIO_PIN(5, 4, 1, 0x108, 0x434), - MX53_PIN_CSI0_D19 = _MXC_BUILD_GPIO_PIN(5, 5, 1, 0x10C, 0x438), - MX53_PIN_NVCC_CSI0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x43C), - MX53_PIN_JTAG_TMS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x440), - MX53_PIN_JTAG_MOD = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x444), - MX53_PIN_JTAG_TRSTB = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x448), - MX53_PIN_JTAG_TDI = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x44C), - MX53_PIN_JTAG_TCK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x450), - MX53_PIN_JTAG_TDO = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x454), - MX53_PIN_EIM_A25 = _MXC_BUILD_GPIO_PIN(4, 2, 1, 0x110, 0x458), - MX53_PIN_EIM_EB2 = _MXC_BUILD_GPIO_PIN(1, 30, 1, 0x114, 0x45C), - MX53_PIN_EIM_D16 = _MXC_BUILD_GPIO_PIN(2, 16, 1, 0x118, 0x460), - MX53_PIN_EIM_D17 = _MXC_BUILD_GPIO_PIN(2, 17, 1, 0x11C, 0x464), - MX53_PIN_EIM_D18 = _MXC_BUILD_GPIO_PIN(2, 18, 1, 0x120, 0x468), - MX53_PIN_EIM_D19 = _MXC_BUILD_GPIO_PIN(2, 19, 1, 0x124, 0x46C), - MX53_PIN_EIM_D20 = _MXC_BUILD_GPIO_PIN(2, 20, 1, 0x128, 0x470), - MX53_PIN_EIM_D21 = _MXC_BUILD_GPIO_PIN(2, 21, 1, 0x12C, 0x474), - MX53_PIN_EIM_D22 = _MXC_BUILD_GPIO_PIN(2, 22, 1, 0x130, 0x478), - MX53_PIN_EIM_D23 = _MXC_BUILD_GPIO_PIN(2, 23, 1, 0x134, 0x47C), - MX53_PIN_EIM_EB3 = _MXC_BUILD_GPIO_PIN(1, 31, 1, 0x138, 0x480), - MX53_PIN_EIM_D24 = _MXC_BUILD_GPIO_PIN(2, 24, 1, 0x13C, 0x484), - MX53_PIN_EIM_D25 = _MXC_BUILD_GPIO_PIN(2, 25, 1, 0x140, 0x488), - MX53_PIN_EIM_D26 = _MXC_BUILD_GPIO_PIN(2, 26, 1, 0x144, 0x48C), - MX53_PIN_EIM_D27 = _MXC_BUILD_GPIO_PIN(2, 27, 1, 0x148, 0x490), - MX53_PIN_EIM_D28 = _MXC_BUILD_GPIO_PIN(2, 28, 1, 0x14C, 0x494), - MX53_PIN_EIM_D29 = _MXC_BUILD_GPIO_PIN(2, 29, 1, 0x150, 0x498), - MX53_PIN_EIM_D30 = _MXC_BUILD_GPIO_PIN(2, 30, 1, 0x154, 0x49C), - MX53_PIN_EIM_D31 = _MXC_BUILD_GPIO_PIN(2, 31, 1, 0x158, 0x4A0), - MX53_PIN_NVCC_EIM1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4A4), - MX53_PIN_EIM_A24 = _MXC_BUILD_GPIO_PIN(4, 4, 1, 0x15C, 0x4A8), - MX53_PIN_EIM_A23 = _MXC_BUILD_GPIO_PIN(5, 6, 1, 0x160, 0x4AC), - MX53_PIN_EIM_A22 = _MXC_BUILD_GPIO_PIN(1, 16, 1, 0x164, 0x4B0), - MX53_PIN_EIM_A21 = _MXC_BUILD_GPIO_PIN(1, 17, 1, 0x168, 0x4B4), - MX53_PIN_EIM_A20 = _MXC_BUILD_GPIO_PIN(1, 18, 1, 0x16C, 0x4B8), - MX53_PIN_EIM_A19 = _MXC_BUILD_GPIO_PIN(1, 19, 1, 0x170, 0x4BC), - MX53_PIN_EIM_A18 = _MXC_BUILD_GPIO_PIN(1, 20, 1, 0x174, 0x4C0), - MX53_PIN_EIM_A17 = _MXC_BUILD_GPIO_PIN(1, 21, 1, 0x178, 0x4C4), - MX53_PIN_EIM_A16 = _MXC_BUILD_GPIO_PIN(1, 22, 1, 0x17C, 0x4C8), - MX53_PIN_EIM_CS0 = _MXC_BUILD_GPIO_PIN(1, 23, 1, 0x180, 0x4CC), - MX53_PIN_EIM_CS1 = _MXC_BUILD_GPIO_PIN(1, 24, 1, 0x184, 0x4D0), - MX53_PIN_EIM_OE = _MXC_BUILD_GPIO_PIN(1, 25, 1, 0x188, 0x4D4), - MX53_PIN_EIM_RW = _MXC_BUILD_GPIO_PIN(1, 26, 1, 0x18C, 0x4D8), - MX53_PIN_EIM_LBA = _MXC_BUILD_GPIO_PIN(1, 27, 1, 0x190, 0x4DC), - MX53_PIN_NVCC_EIM4 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4E0), - MX53_PIN_EIM_EB0 = _MXC_BUILD_GPIO_PIN(1, 28, 1, 0x194, 0x4E4), - MX53_PIN_EIM_EB1 = _MXC_BUILD_GPIO_PIN(1, 29, 1, 0x198, 0x4E8), - MX53_PIN_EIM_DA0 = _MXC_BUILD_GPIO_PIN(2, 0, 1, 0x19C, 0x4EC), - MX53_PIN_EIM_DA1 = _MXC_BUILD_GPIO_PIN(2, 1, 1, 0x1A0, 0x4F0), - MX53_PIN_EIM_DA2 = _MXC_BUILD_GPIO_PIN(2, 2, 1, 0x1A4, 0x4F4), - MX53_PIN_EIM_DA3 = _MXC_BUILD_GPIO_PIN(2, 3, 1, 0x1A8, 0x4F8), - MX53_PIN_EIM_DA4 = _MXC_BUILD_GPIO_PIN(2, 4, 1, 0x1AC, 0x4FC), - MX53_PIN_EIM_DA5 = _MXC_BUILD_GPIO_PIN(2, 5, 1, 0x1B0, 0x500), - MX53_PIN_EIM_DA6 = _MXC_BUILD_GPIO_PIN(2, 6, 1, 0x1B4, 0x504), - MX53_PIN_EIM_DA7 = _MXC_BUILD_GPIO_PIN(2, 7, 1, 0x1B8, 0x508), - MX53_PIN_EIM_DA8 = _MXC_BUILD_GPIO_PIN(2, 8, 1, 0x1BC, 0x50C), - MX53_PIN_EIM_DA9 = _MXC_BUILD_GPIO_PIN(2, 9, 1, 0x1C0, 0x510), - MX53_PIN_EIM_DA10 = _MXC_BUILD_GPIO_PIN(2, 10, 1, 0x1C4, 0x514), - MX53_PIN_EIM_DA11 = _MXC_BUILD_GPIO_PIN(2, 11, 1, 0x1C8, 0x518), - MX53_PIN_EIM_DA12 = _MXC_BUILD_GPIO_PIN(2, 12, 1, 0x1CC, 0x51C), - MX53_PIN_EIM_DA13 = _MXC_BUILD_GPIO_PIN(2, 13, 1, 0x1D0, 0x520), - MX53_PIN_EIM_DA14 = _MXC_BUILD_GPIO_PIN(2, 14, 1, 0x1D4, 0x524), - MX53_PIN_EIM_DA15 = _MXC_BUILD_GPIO_PIN(2, 15, 1, 0x1D8, 0x528), - MX53_PIN_NANDF_WE_B = _MXC_BUILD_GPIO_PIN(5, 12, 1, 0x1DC, 0x52C), - MX53_PIN_NANDF_RE_B = _MXC_BUILD_GPIO_PIN(5, 13, 1, 0x1E0, 0x530), - MX53_PIN_EIM_WAIT = _MXC_BUILD_GPIO_PIN(4, 0, 1, 0x1E4, 0x534), - MX53_PIN_EIM_BCLK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x538), - MX53_PIN_NVCC_EIM7 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x53C), - MX53_PIN_LVDS1_TX3_P = _MXC_BUILD_GPIO_PIN(5, 22, 0, 0x1EC, NON_PAD_I), - MX53_PIN_LVDS1_TX2_P = _MXC_BUILD_GPIO_PIN(5, 24, 0, 0x1F0, NON_PAD_I), - MX53_PIN_LVDS1_CLK_P = _MXC_BUILD_GPIO_PIN(5, 26, 0, 0x1F4, NON_PAD_I), - MX53_PIN_LVDS1_TX1_P = _MXC_BUILD_GPIO_PIN(5, 28, 0, 0x1F8, NON_PAD_I), - MX53_PIN_LVDS1_TX0_P = _MXC_BUILD_GPIO_PIN(5, 30, 0, 0x1FC, NON_PAD_I), - MX53_PIN_LVDS0_TX3_P = _MXC_BUILD_GPIO_PIN(6, 22, 0, 0x200, NON_PAD_I), - MX53_PIN_LVDS0_CLK_P = _MXC_BUILD_GPIO_PIN(6, 24, 0, 0x204, NON_PAD_I), - MX53_PIN_LVDS0_TX2_P = _MXC_BUILD_GPIO_PIN(6, 26, 0, 0x208, NON_PAD_I), - MX53_PIN_LVDS0_TX1_P = _MXC_BUILD_GPIO_PIN(6, 28, 0, 0x20C, NON_PAD_I), - MX53_PIN_LVDS0_TX0_P = _MXC_BUILD_GPIO_PIN(6, 30, 0, 0x210, NON_PAD_I), - MX53_PIN_GPIO_10 = _MXC_BUILD_GPIO_PIN(3, 0, 0, 0x214, 0x540), - MX53_PIN_GPIO_11 = _MXC_BUILD_GPIO_PIN(3, 1, 0, 0x218, 0x544), - MX53_PIN_GPIO_12 = _MXC_BUILD_GPIO_PIN(3, 2, 0, 0x21C, 0x548), - MX53_PIN_GPIO_13 = _MXC_BUILD_GPIO_PIN(3, 3, 0, 0x220, 0x54C), - MX53_PIN_GPIO_14 = _MXC_BUILD_GPIO_PIN(3, 4, 0, 0x224, 0x550), - MX53_PIN_DRAM_DQM3 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x554), - MX53_PIN_DRAM_SDQS3 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x558), - MX53_PIN_DRAM_SDCKE1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x55C), - MX53_PIN_DRAM_DQM2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x560), - MX53_PIN_DRAM_SDODT1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x564), - MX53_PIN_DRAM_SDQS2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x568), - MX53_PIN_DRAM_RESET = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x56C), - MX53_PIN_DRAM_SDCLK1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x570), - MX53_PIN_DRAM_CAS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x574), - MX53_PIN_DRAM_SDCLK0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x578), - MX53_PIN_DRAM_SDQS0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x57C), - MX53_PIN_DRAM_SDODT0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x580), - MX53_PIN_DRAM_DQM0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x584), - MX53_PIN_DRAM_RAS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x588), - MX53_PIN_DRAM_SDCKE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x58C), - MX53_PIN_DRAM_SDQS1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x590), - MX53_PIN_DRAM_DQM1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x594), - MX53_PIN_PMIC_ON_REQ = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x598), - MX53_PIN_PMIC_STBY_REQ = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x59C), - MX53_PIN_NANDF_CLE = _MXC_BUILD_GPIO_PIN(5, 7, 1, 0x228, 0x5A0), - MX53_PIN_NANDF_ALE = _MXC_BUILD_GPIO_PIN(5, 8 , 1, 0x22C, 0x5A4), - MX53_PIN_NANDF_WP_B = _MXC_BUILD_GPIO_PIN(5, 9, 1, 0x230, 0x5A8), - MX53_PIN_NANDF_RB0 = _MXC_BUILD_GPIO_PIN(5, 10, 1, 0x234, 0x5AC), - MX53_PIN_NANDF_CS0 = _MXC_BUILD_GPIO_PIN(5, 11, 1, 0x238, 0x5B0), - MX53_PIN_NANDF_CS1 = _MXC_BUILD_GPIO_PIN(5, 14, 1, 0x23C, 0x5B4), - MX53_PIN_NANDF_CS2 = _MXC_BUILD_GPIO_PIN(5, 15, 1, 0x240, 0x5B8), - MX53_PIN_NANDF_CS3 = _MXC_BUILD_GPIO_PIN(5, 16, 1, 0x244, 0x5BC), - MX53_PIN_NVCC_NANDF = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5C0), - MX53_PIN_FEC_MDIO = _MXC_BUILD_GPIO_PIN(0, 22, 1, 0x248, 0x5C4), - MX53_PIN_FEC_REF_CLK = _MXC_BUILD_GPIO_PIN(0, 23, 1, 0x24C, 0x5C8), - MX53_PIN_FEC_RX_ER = _MXC_BUILD_GPIO_PIN(0, 24, 1, 0x250, 0x5CC), - MX53_PIN_FEC_CRS_DV = _MXC_BUILD_GPIO_PIN(0, 25, 1, 0x254, 0x5D0), - MX53_PIN_FEC_RXD1 = _MXC_BUILD_GPIO_PIN(0, 26, 1, 0x258, 0x5D4), - MX53_PIN_FEC_RXD0 = _MXC_BUILD_GPIO_PIN(0, 27, 1, 0x25C, 0x5D8), - MX53_PIN_FEC_TX_EN = _MXC_BUILD_GPIO_PIN(0, 28, 1, 0x260, 0x5DC), - MX53_PIN_FEC_TXD1 = _MXC_BUILD_GPIO_PIN(0, 29, 1, 0x264, 0x5E0), - MX53_PIN_FEC_TXD0 = _MXC_BUILD_GPIO_PIN(0, 30, 1, 0x268, 0x5E4), - MX53_PIN_FEC_MDC = _MXC_BUILD_GPIO_PIN(0, 31, 1, 0x26C, 0x5E8), - MX53_PIN_NVCC_FEC = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5EC), - MX53_PIN_ATA_DIOW = _MXC_BUILD_GPIO_PIN(5, 17, 1, 0x270, 0x5F0), - MX53_PIN_ATA_DMACK = _MXC_BUILD_GPIO_PIN(5, 18, 1, 0x274, 0x5F4), - MX53_PIN_ATA_DMARQ = _MXC_BUILD_GPIO_PIN(6, 0, 1, 0x278, 0x5F8), - MX53_PIN_ATA_BUFFER_EN = _MXC_BUILD_GPIO_PIN(6, 1, 1, 0x27C, 0x5FC), - MX53_PIN_ATA_INTRQ = _MXC_BUILD_GPIO_PIN(6, 2, 1, 0x280, 0x600), - MX53_PIN_ATA_DIOR = _MXC_BUILD_GPIO_PIN(6, 3, 1, 0x284, 0x604), - MX53_PIN_ATA_RESET_B = _MXC_BUILD_GPIO_PIN(6, 4, 1, 0x288, 0x608), - MX53_PIN_ATA_IORDY = _MXC_BUILD_GPIO_PIN(6, 5, 1, 0x28C, 0x60C), - MX53_PIN_ATA_DA_0 = _MXC_BUILD_GPIO_PIN(6, 6, 1, 0x290, 0x610), - MX53_PIN_ATA_DA_1 = _MXC_BUILD_GPIO_PIN(6, 7, 1, 0x294, 0x614), - MX53_PIN_ATA_DA_2 = _MXC_BUILD_GPIO_PIN(6, 8, 1, 0x298, 0x618), - MX53_PIN_ATA_CS_0 = _MXC_BUILD_GPIO_PIN(6, 9, 1, 0x29C, 0x61C), - MX53_PIN_ATA_CS_1 = _MXC_BUILD_GPIO_PIN(6, 10, 1, 0x2A0, 0x620), - MX53_PIN_NVCC_ATA2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x624), - MX53_PIN_ATA_DATA0 = _MXC_BUILD_GPIO_PIN(1, 0, 1, 0x2A4, 0x628), - MX53_PIN_ATA_DATA1 = _MXC_BUILD_GPIO_PIN(1, 1, 1, 0x2A8, 0x62C), - MX53_PIN_ATA_DATA2 = _MXC_BUILD_GPIO_PIN(1, 2, 1, 0x2AC, 0x630), - MX53_PIN_ATA_DATA3 = _MXC_BUILD_GPIO_PIN(1, 3, 1, 0x2B0, 0x634), - MX53_PIN_ATA_DATA4 = _MXC_BUILD_GPIO_PIN(1, 4, 1, 0x2B4, 0x638), - MX53_PIN_ATA_DATA5 = _MXC_BUILD_GPIO_PIN(1, 5, 1, 0x2B8, 0x63C), - MX53_PIN_ATA_DATA6 = _MXC_BUILD_GPIO_PIN(1, 6, 1, 0x2BC, 0x640), - MX53_PIN_ATA_DATA7 = _MXC_BUILD_GPIO_PIN(1, 7, 1, 0x2C0, 0x644), - MX53_PIN_ATA_DATA8 = _MXC_BUILD_GPIO_PIN(1, 8, 1, 0x2C4, 0x648), - MX53_PIN_ATA_DATA9 = _MXC_BUILD_GPIO_PIN(1, 9, 1, 0x2C8, 0x64C), - MX53_PIN_ATA_DATA10 = _MXC_BUILD_GPIO_PIN(1, 10, 1, 0x2CC, 0x650), - MX53_PIN_ATA_DATA11 = _MXC_BUILD_GPIO_PIN(1, 11, 1, 0x2D0, 0x654), - MX53_PIN_ATA_DATA12 = _MXC_BUILD_GPIO_PIN(1, 12, 1, 0x2D4, 0x658), - MX53_PIN_ATA_DATA13 = _MXC_BUILD_GPIO_PIN(1, 13, 1, 0x2D8, 0x65C), - MX53_PIN_ATA_DATA14 = _MXC_BUILD_GPIO_PIN(1, 14, 1, 0x2DC, 0x660), - MX53_PIN_ATA_DATA15 = _MXC_BUILD_GPIO_PIN(1, 15, 1, 0x2E0, 0x664), - MX53_PIN_NVCC_ATA0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x668), - MX53_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 16, 1, 0x2E4, 0x66C), - MX53_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 17, 1, 0x2E8, 0x670), - MX53_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(0, 18, 1, 0x2EC, 0x674), - MX53_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 19, 1, 0x2F0, 0x678), - MX53_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(0, 20, 1, 0x2F4, 0x67C), - MX53_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 21, 1, 0x2F8, 0x680), - MX53_PIN_NVCC_SD1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x684), - MX53_PIN_SD2_CLK = _MXC_BUILD_GPIO_PIN(0, 10, 1, 0x2FC, 0x688), - MX53_PIN_SD2_CMD = _MXC_BUILD_GPIO_PIN(0, 11, 1, 0x300, 0x68C), - MX53_PIN_SD2_DATA3 = _MXC_BUILD_GPIO_PIN(0, 12, 1, 0x304, 0x690), - MX53_PIN_SD2_DATA2 = _MXC_BUILD_GPIO_PIN(0, 13, 1, 0x308, 0x694), - MX53_PIN_SD2_DATA1 = _MXC_BUILD_GPIO_PIN(0, 14, 1, 0x30C, 0x698), - MX53_PIN_SD2_DATA0 = _MXC_BUILD_GPIO_PIN(0, 15, 1, 0x310, 0x69C), - MX53_PIN_NVCC_SD2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6A0), - MX53_PIN_GPIO_0 = _MXC_BUILD_GPIO_PIN(0, 0, 1, 0x314, 0x6A4), - MX53_PIN_GPIO_1 = _MXC_BUILD_GPIO_PIN(0, 1, 1, 0x318, 0x6A8), - MX53_PIN_GPIO_9 = _MXC_BUILD_GPIO_PIN(0, 9, 1, 0x31C, 0x6AC), - MX53_PIN_GPIO_3 = _MXC_BUILD_GPIO_PIN(0, 3, 1, 0x320, 0x6B0), - MX53_PIN_GPIO_6 = _MXC_BUILD_GPIO_PIN(0, 6, 1, 0x324, 0x6B4), - MX53_PIN_GPIO_2 = _MXC_BUILD_GPIO_PIN(0, 2, 1, 0x328, 0x6B8), - MX53_PIN_GPIO_4 = _MXC_BUILD_GPIO_PIN(0, 4, 1, 0x32C, 0x6BC), - MX53_PIN_GPIO_5 = _MXC_BUILD_GPIO_PIN(0, 5, 1, 0x330, 0x6C0), - MX53_PIN_GPIO_7 = _MXC_BUILD_GPIO_PIN(0, 7, 1, 0x334, 0x6C4), - MX53_PIN_GPIO_8 = _MXC_BUILD_GPIO_PIN(0, 8, 1, 0x338, 0x6C8), - MX53_PIN_GPIO_16 = _MXC_BUILD_GPIO_PIN(6, 11, 1, 0x33C, 0x6CC), - MX53_PIN_GPIO_17 = _MXC_BUILD_GPIO_PIN(6, 12, 1, 0x340, 0x6D0), - MX53_PIN_GPIO_18 = _MXC_BUILD_GPIO_PIN(6, 13, 1, 0x344, 0x6D4), - MX53_PIN_NVCC_GPIO = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6D8), - MX53_PIN_POR_B = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6DC), - MX53_PIN_BOOT_MODE1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6E0), - MX53_PIN_RESET_IN_B = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6E4), - MX53_PIN_BOOT_MODE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6E8), - MX53_PIN_TEST_MODE = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6EC), - MX53_PIN_GRP_ADDDS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6F0), - MX53_PIN_GRP_DDRMODE_CTL = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6F4), - MX53_PIN_GRP_DDRPKE = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x6FC), - MX53_PIN_GRP_DDRPK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x708), - MX53_PIN_GRP_TERM_CTL3 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x70C), - MX53_PIN_GRP_DDRHYS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x710), - MX53_PIN_GRP_DDRMODE = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x714), - MX53_PIN_GRP_B0DS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x718), - MX53_PIN_GRP_B1DS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x71C), - MX53_PIN_GRP_CTLDS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x720), - MX53_PIN_GRP_DDR_TYPE = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x724), - MX53_PIN_GRP_B2DS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x728), - MX53_PIN_GRP_B3DS = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x72C), -}; -/* various IOMUX input select register index */ -typedef enum iomux_input_select { - MX51_AUDMUX_P4_INPUT_DA_AMX_SELECT_I = 0, - MX51_AUDMUX_P4_INPUT_DB_AMX_SELECT_I, - MX51_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT, - MX51_AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT, - MX51_AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT, - MX51_AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT, - MX51_AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT, - MX51_AUDMUX_P5_INPUT_RXFS_AMX_SELECT, - MX51_AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT, - MX51_AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_DA_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_DB_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_RXCLK_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_RXFS_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_TXCLK_AMX_SELECT_INPUT, - MX51_AUDMUX_P6_INPUT_TXFS_AMX_SELECT_INPUT, - MX51_CCM_IPP_DI_CLK_SELECT_INPUT, - /* TO2 */ - MX51_CCM_IPP_DI1_CLK_SELECT_INPUT, - MX51_CCM_PLL1_BYPASS_CLK_SELECT_INPUT, - MX51_CCM_PLL2_BYPASS_CLK_SELECT_INPUT, - MX51_CSPI_IPP_CSPI_CLK_IN_SELECT_INPUT, - MX51_CSPI_IPP_IND_MISO_SELECT_INPUT, - MX51_CSPI_IPP_IND_MOSI_SELECT_INPUT, - MX51_CSPI_IPP_IND_SS_B_1_SELECT_INPUT, - MX51_CSPI_IPP_IND_SS_B_2_SELECT_INPUT, - MX51_CSPI_IPP_IND_SS_B_3_SELECT_INPUT, - MX51_DPLLIP1_L1T_TOG_EN_SELECT_INPUT, - /* TO2 */ - MX51_ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT, - MX51_ECSPI2_IPP_IND_SS_B_3_SELECT_INPUT, - MX51_EMI_IPP_IND_RDY_INT_SELECT_INPUT, - MX51_ESDHC3_IPP_DAT0_IN_SELECT_INPUT, - MX51_ESDHC3_IPP_DAT1_IN_SELECT_INPUT, - MX51_ESDHC3_IPP_DAT2_IN_SELECT_INPUT, - MX51_ESDHC3_IPP_DAT3_IN_SELECT_INPUT, - MX51_FEC_FEC_COL_SELECT_INPUT, - MX51_FEC_FEC_CRS_SELECT_INPUT, - MX51_FEC_FEC_MDI_SELECT_INPUT, - MX51_FEC_FEC_RDATA_0_SELECT_INPUT, - MX51_FEC_FEC_RDATA_1_SELECT_INPUT, - MX51_FEC_FEC_RDATA_2_SELECT_INPUT, - MX51_FEC_FEC_RDATA_3_SELECT_INPUT, - MX51_FEC_FEC_RX_CLK_SELECT_INPUT, - MX51_FEC_FEC_RX_DV_SELECT_INPUT, - MX51_FEC_FEC_RX_ER_SELECT_INPUT, - MX51_FEC_FEC_TX_CLK_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_1_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_2_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_4_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_5_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_6_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_7_SELECT_INPUT, - MX51_GPIO3_IPP_IND_G_IN_8_SELECT_INPUT, - /* TO2 */ - MX51_GPIO3_IPP_IND_G_IN_12_SELECT_INPUT, - MX51_HSC_MIPI_MIX_IPP_IND_SENS1_DATA_EN_SELECT_INPUT, - MX51_HSC_MIPI_MIX_IPP_IND_SENS2_DATA_EN_SELECT_INPUT, - /* TO2 */ - MX51_HSC_MIPI_MIX_PAR_VSYNC_SELECT_INPUT, - /* TO2 */ - MX51_HSC_MIPI_MIX_PAR_DI_WAIT_SELECT_INPUT, - MX51_HSC_MIPI_MIX_PAR_SISG_TRIG_SELECT_INPUT, - MX51_I2C1_IPP_SCL_IN_SELECT_INPUT, - MX51_I2C1_IPP_SDA_IN_SELECT_INPUT, - MX51_I2C2_IPP_SCL_IN_SELECT_INPUT, - MX51_I2C2_IPP_SDA_IN_SELECT_INPUT, - MX51_IPU_IPP_DI_0_IND_DISPB_SD_D_SELECT_INPUT, - MX51_IPU_IPP_DI_1_IND_DISPB_SD_D_SELECT_INPUT, - MX51_KPP_IPP_IND_COL_6_SELECT_INPUT, - MX51_KPP_IPP_IND_COL_7_SELECT_INPUT, - MX51_KPP_IPP_IND_ROW_4_SELECT_INPUT, - MX51_KPP_IPP_IND_ROW_5_SELECT_INPUT, - MX51_KPP_IPP_IND_ROW_6_SELECT_INPUT, - MX51_KPP_IPP_IND_ROW_7_SELECT_INPUT, - MX51_UART1_IPP_UART_RTS_B_SELECT_INPUT, - MX51_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, - MX51_UART2_IPP_UART_RTS_B_SELECT_INPUT, - MX51_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, - MX51_UART3_IPP_UART_RTS_B_SELECT_INPUT, - MX51_UART3_IPP_UART_RXD_MUX_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_CLK_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_0_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_1_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_2_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_3_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_4_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_5_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_6_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DATA_7_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_DIR_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_NXT_SELECT_INPUT, - MX51_USBOH3_IPP_IND_UH3_STP_SELECT_INPUT, - MX51PUT_NUM_MUX, - /* MX53 */ - MX53_AUDMUX_P4_INPUT_DA_AMX_SELECT_I = 0, - MX53_AUDMUX_P4_INPUT_DB_AMX_SELECT_I, - MX53_AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT, - MX53_AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT, - MX53_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT, - MX53_AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT, - MX53_AUDMUX_P5_INPUT_DA_AMX_SELECT_I, - MX53_AUDMUX_P5_INPUT_DB_AMX_SELECT_I, - MX53_AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT, - MX53_AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT, - MX53_AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT, - MX53_AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT, - MX53_CAN1_IPP_IND_CANRX_SELECT_INPUT, - MX53_CAN2_IPP_IND_CANRX_SELECT_INPUT, - MX53_CCM_IPP_ASRC_EXT_SELECT_INPUT, - MX53_CCM_IPP_DI1_CLK_SELECT_INPUT, - MX53_CCM_PLL1_BYPASS_CLK_SELECT_INPUT, - MX53_CCM_PLL2_BYPASS_CLK_SELECT_INPUT, - MX53_CCM_PLL3_BYPASS_CLK_SELECT_INPUT, - MX53_CCM_PLL4_BYPASS_CLK_SELECT_INPUT, - MX53_CSPI_IPP_CSPI_CLK_IN_SELECT_INPUT, - MX53_CSPI_IPP_IND_MISO_SELECT_INPUT, - MX53_CSPI_IPP_IND_MOSI_SELECT_INPUT, - MX53_CSPI_IPP_IND_SS_B_1_SELECT_INPUT, - MX53_CSPI_IPP_IND_SS_B_2_SELECT_INPUT, - MX53_CSPI_IPP_IND_SS_B_3_SELECT_INPUT, - MX53_CSPI_IPP_IND_SS_B_4_SELECT_INPUT, - MX53_ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_MISO_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_MOSI_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT, - MX53_ECSPI1_IPP_IND_SS_B_4_SELECT_INPUT, - MX53_ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT, - MX53_ECSPI2_IPP_IND_MISO_SELECT_INPUT, - MX53_ECSPI2_IPP_IND_MOSI_SELECT_INPUT, - MX53_ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT, - MX53_ECSPI2_IPP_IND_SS_B_2_SELECT_INPUT, - MX53_ESAI1_IPP_IND_FSR_SELECT_INPUT, - MX53_ESAI1_IPP_IND_FST_SELECT_INPUT, - MX53_ESAI1_IPP_IND_HCKR_SELECT_INPUT, - MX53_ESAI1_IPP_IND_HCKT_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SCKR_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SCKT_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO0_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO1_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT, - MX53_ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT, - MX53_ESDHC1_IPP_WP_ON_SELECT_INPUT, - MX53_FEC_FEC_COL_SELECT_INPUT, - MX53_FEC_FEC_MDI_SELECT_INPUT, - MX53_FEC_FEC_RX_CLK_SELECT_INPUT, - MX53_FIRI_IPP_IND_RXD_SELECT_INPUT, - MX53_GPC_PMIC_RDY_SELECT_INPUT, - MX53_I2C1_IPP_SCL_IN_SELECT_INPUT, - MX53_I2C1_IPP_SDA_IN_SELECT_INPUT, - MX53_I2C2_IPP_SCL_IN_SELECT_INPUT, - MX53_I2C2_IPP_SDA_IN_SELECT_INPUT, - MX53_I2C3_IPP_SCL_IN_SELECT_INPUT, - MX53_I2C3_IPP_SDA_IN_SELECT_INPUT, - MX53_IPU_IPP_DI_0_IND_DISPB_SD_D_SELECT_INPUT, - MX53_IPU_IPP_DI_1_IND_DISPB_SD_D_SELECT_INPUT, - MX53_IPU_IPP_IND_SENS1_DATA_EN_SELECT_INPUT, - MX53_IPU_IPP_IND_SENS1_HSYNC_SELECT_INPUT, - MX53_IPU_IPP_IND_SENS1_VSYNC_SELECT_INPUT, - MX53_KPP_IPP_IND_COL_5_SELECT_INPUT, - MX53_KPP_IPP_IND_COL_6_SELECT_INPUT, - MX53_KPP_IPP_IND_COL_7_SELECT_INPUT, - MX53_KPP_IPP_IND_ROW_5_SELECT_INPUT, - MX53_KPP_IPP_IND_ROW_6_SELECT_INPUT, - MX53_KPP_IPP_IND_ROW_7_SELECT_INPUT, - MX53_MLB_MLBCLK_IN_SELECT_INPUT, - MX53_MLB_MLBDAT_IN_SELECT_INPUT, - MX53_MLB_MLBSIG_IN_SELECT_INPUT, - MX53_OWIRE_BATTERY_LINE_IN_SELECT_INPUT, - MX53_SDMA_EVENTS_14_SELECT_INPUT, - MX53_SDMA_EVENTS_15_SELECT_INPUT, - MX53_SPDIF_SPDIF_IN1_SELECT_INPUT, - MX53_UART1_IPP_UART_RTS_B_SELECT_INPUT, - MX53_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, - MX53_UART2_IPP_UART_RTS_B_SELECT_INPUT, - MX53_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, - MX53_UART3_IPP_UART_RTS_B_SELECT_INPUT, - MX53_UART3_IPP_UART_RXD_MUX_SELECT_INPUT, - MX53_UART4_IPP_UART_RTS_B_SELECT_INPUT, - MX53_UART4_IPP_UART_RXD_MUX_SELECT_INPUT, - MX53_UART5_IPP_UART_RTS_B_SELECT_INPUT, - MX53_UART5_IPP_UART_RXD_MUX_SELECT_INPUT, - MX53_USBOH3_IPP_IND_OTG_OC_SELECT_INPUT, - MX53_USBOH3_IPP_IND_UH1_OC_SELECT_INPUT, - MX53_USBOH3_IPP_IND_UH2_OC_SELECT_INPUT, -} iomux_input_select_t; - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_MX5_MX5X_PINS_H__ */ diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h deleted file mode 100644 index f687503..0000000 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * (C) Copyright 2009 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -u32 get_cpu_rev(void); -#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) -void sdelay(unsigned long); - -#endif diff --git a/arch/arm/include/asm/arch-nomadik/gpio.h b/arch/arm/include/asm/arch-nomadik/gpio.h deleted file mode 100644 index 1d3c9ce..0000000 --- a/arch/arm/include/asm/arch-nomadik/gpio.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * (C) Copyright 2009 Alessandro Rubini - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __NMK_GPIO_H__ -#define __NMK_GPIO_H__ - -/* - * These functions are called from the soft-i2c driver, but - * are also used by board files to set output bits. - */ - -enum nmk_af { /* alternate function settings */ - GPIO_GPIO = 0, - GPIO_ALT_A, - GPIO_ALT_B, - GPIO_ALT_C -}; - -extern void nmk_gpio_af(int gpio, int alternate_function); -extern void nmk_gpio_dir(int gpio, int dir); -extern void nmk_gpio_set(int gpio, int val); -extern int nmk_gpio_get(int gpio); - -#endif /* __NMK_GPIO_H__ */ diff --git a/arch/arm/include/asm/arch-nomadik/mtu.h b/arch/arm/include/asm/arch-nomadik/mtu.h deleted file mode 100644 index a87be9e..0000000 --- a/arch/arm/include/asm/arch-nomadik/mtu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * (C) Copyright 2009 Alessandro Rubini - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MTU_H -#define __ASM_ARCH_MTU_H - -/* - * The MTU device hosts four different counters, with 4 set of - * registers. These are register names. - */ - -#define MTU_IMSC 0x00 /* Interrupt mask set/clear */ -#define MTU_RIS 0x04 /* Raw interrupt status */ -#define MTU_MIS 0x08 /* Masked interrupt status */ -#define MTU_ICR 0x0C /* Interrupt clear register */ - -/* per-timer registers take 0..3 as argument */ -#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ -#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ -#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ -#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ - -/* bits for the control register */ -#define MTU_CRn_ENA 0x80 -#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ -#define MTU_CRn_PRESCALE_MASK 0x0c -#define MTU_CRn_PRESCALE_1 0x00 -#define MTU_CRn_PRESCALE_16 0x04 -#define MTU_CRn_PRESCALE_256 0x08 -#define MTU_CRn_32BITS 0x02 -#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ - -/* Other registers are usual amba/primecell registers, currently not used */ -#define MTU_ITCR 0xff0 -#define MTU_ITOP 0xff4 - -#define MTU_PERIPH_ID0 0xfe0 -#define MTU_PERIPH_ID1 0xfe4 -#define MTU_PERIPH_ID2 0xfe8 -#define MTU_PERIPH_ID3 0xfeC - -#define MTU_PCELL0 0xff0 -#define MTU_PCELL1 0xff4 -#define MTU_PCELL2 0xff8 -#define MTU_PCELL3 0xffC - -#endif /* __ASM_ARCH_MTU_H */ diff --git a/arch/arm/include/asm/arch-omap24xx/bits.h b/arch/arm/include/asm/arch-omap24xx/bits.h deleted file mode 100644 index 8522335..0000000 --- a/arch/arm/include/asm/arch-omap24xx/bits.h +++ /dev/null @@ -1,48 +0,0 @@ -/* bits.h - * Copyright (c) 2004 Texas Instruments - * - * This package is free software; you can redistribute it and/or - * modify it under the terms of the license found in the file - * named COPYING that should have accompanied this file. - * - * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ -#ifndef __bits_h -#define __bits_h 1 - -#define BIT0 (1<<0) -#define BIT1 (1<<1) -#define BIT2 (1<<2) -#define BIT3 (1<<3) -#define BIT4 (1<<4) -#define BIT5 (1<<5) -#define BIT6 (1<<6) -#define BIT7 (1<<7) -#define BIT8 (1<<8) -#define BIT9 (1<<9) -#define BIT10 (1<<10) -#define BIT11 (1<<11) -#define BIT12 (1<<12) -#define BIT13 (1<<13) -#define BIT14 (1<<14) -#define BIT15 (1<<15) -#define BIT16 (1<<16) -#define BIT17 (1<<17) -#define BIT18 (1<<18) -#define BIT19 (1<<19) -#define BIT20 (1<<20) -#define BIT21 (1<<21) -#define BIT22 (1<<22) -#define BIT23 (1<<23) -#define BIT24 (1<<24) -#define BIT25 (1<<25) -#define BIT26 (1<<26) -#define BIT27 (1<<27) -#define BIT28 (1<<28) -#define BIT29 (1<<29) -#define BIT30 (1<<30) -#define BIT31 (1<<31) - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/clocks.h b/arch/arm/include/asm/arch-omap24xx/clocks.h deleted file mode 100644 index 2e92569..0000000 --- a/arch/arm/include/asm/arch-omap24xx/clocks.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP24XX_CLOCKS_H_ -#define _OMAP24XX_CLOCKS_H_ - -#define COMMIT_DIVIDERS 0x1 - -#define MODE_BYPASS_FAST 0x2 -#define APLL_LOCK 0xc -#ifdef CONFIG_APTIX -#define DPLL_LOCK 0x1 /* stay in bypass mode */ -#else -#define DPLL_LOCK 0x3 /* DPLL lock */ -#endif - -/****************************************************************************; -; PRCM Scheme II -; -; Enable clocks and DPLL for: -; DPLL=300, DPLLout=600 M=1,N=50 CM_CLKSEL1_PLL[21:8] 12/2*50 -; Core=600 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0] -; MPUF=300 (mpu domain) 2 CM_CLKSEL_MPU[4:0] -; DSPF=200 (dsp domain) 3 CM_CLKSEL_DSP[4:0] -; DSPI=100 6 CM_CLKSEL_DSP[6:5] -; DSP_S bypass CM_CLKSEL_DSP[7] -; IVAF=200 (dsp domain) 3 CM_CLKSEL_DSP[12:8] -; IVAF=100 auto -; IVAI auto -; IVA_MPU auto -; IVA_S bypass CM_CLKSEL_DSP[13] -; GFXF=50 (gfx domain) 12 CM_CLKSEL_FGX[2:0] -; SSI_SSRF=200 3 CM_CLKSEL1_CORE[24:20] -; SSI_SSTF=100 auto -; L3=100Mhz (sdram) 6 CM_CLKSEL1_CORE[4:0] -; L4=100Mhz 6 -; C_L4_USB=50 12 CM_CLKSEL1_CORE[6:5] -***************************************************************************/ -#define II_DPLL_OUT_X2 0x2 /* x2 core out */ -#define II_MPU_DIV 0x2 /* mpu = core/2 */ -#define II_DSP_DIV 0x343 /* dsp & iva divider */ -#define II_GFX_DIV 0x2 -#define II_BUS_DIV 0x04601026 -#define II_DPLL_300 0x01832100 - -/****************************************************************************; -; PRCM Scheme III -; -; Enable clocks and DPLL for: -; DPLL=266, DPLLout=532 M=5+1,N=133 CM_CLKSEL1_PLL[21:8] 12/6*133=266 -; Core=532 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0] -; MPUF=266 (mpu domain) /2 CM_CLKSEL_MPU[4:0] -; DSPF=177.3 (dsp domain) /3 CM_CLKSEL_DSP[4:0] -; DSPI=88.67 /6 CM_CLKSEL_DSP[6:5] -; DSP_S ACTIVATED CM_CLKSEL_DSP[7] -; IVAF=88.67 (dsp domain) /3 CM_CLKSEL_DSP[12:8] -; IVAF=88.67 auto -; IVAI auto -; IVA_MPU auto -; IVA_S ACTIVATED CM_CLKSEL_DSP[13] -; GFXF=66.5 (gfx domain) /8 CM_CLKSEL_FGX[2:0]: -; SSI_SSRF=177.3 /3 CM_CLKSEL1_CORE[24:20] -; SSI_SSTF=88.67 auto -; L3=133Mhz (sdram) /4 CM_CLKSEL1_CORE[4:0] -; L4=66.5Mhz /8 -; C_L4_USB=33.25 /16 CM_CLKSEL1_CORE[6:5] -***************************************************************************/ -#define III_DPLL_OUT_X2 0x2 /* x2 core out */ -#define III_MPU_DIV 0x2 /* mpu = core/2 */ -#define III_DSP_DIV 0x23C3 /* dsp & iva divider sych enabled*/ -#define III_GFX_DIV 0x2 -#define III_BUS_DIV 0x08301044 -#define III_DPLL_266 0x01885500 - -/* set defaults for boot up */ -#ifdef PRCM_CONFIG_II -# define DPLL_OUT II_DPLL_OUT_X2 -# define MPU_DIV II_MPU_DIV -# define DSP_DIV II_DSP_DIV -# define GFX_DIV II_GFX_DIV -# define BUS_DIV II_BUS_DIV -# define DPLL_VAL II_DPLL_300 -#elif PRCM_CONFIG_III -# define DPLL_OUT III_DPLL_OUT_X2 -# define MPU_DIV III_MPU_DIV -# define DSP_DIV III_DSP_DIV -# define GFX_DIV III_GFX_DIV -# define BUS_DIV III_BUS_DIV -# define DPLL_VAL III_DPLL_266 -#endif - -/* lock delay time out */ -#define LDELAY 12000000 - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/i2c.h b/arch/arm/include/asm/arch-omap24xx/i2c.h deleted file mode 100644 index 6f64519..0000000 --- a/arch/arm/include/asm/arch-omap24xx/i2c.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP24XX_I2C_H_ -#define _OMAP24XX_I2C_H_ - -#define I2C_BASE1 0x48070000 -#define I2C_BASE2 0x48072000 /* nothing hooked up on h4 */ - -#define I2C_DEFAULT_BASE I2C_BASE1 - -struct i2c { - unsigned short rev; /* 0x00 */ - unsigned short res1; - unsigned short ie; /* 0x04 */ - unsigned short res2; - unsigned short stat; /* 0x08 */ - unsigned short res3; - unsigned short iv; /* 0x0C */ - unsigned short res4; - unsigned short syss; /* 0x10 */ - unsigned short res4p1; - unsigned short buf; /* 0x14 */ - unsigned short res5; - unsigned short cnt; /* 0x18 */ - unsigned short res6; - unsigned short data; /* 0x1C */ - unsigned short res7; - unsigned short sysc; /* 0x20 */ - unsigned short res8; - unsigned short con; /* 0x24 */ - unsigned short res9; - unsigned short oa; /* 0x28 */ - unsigned short res10; - unsigned short sa; /* 0x2C */ - unsigned short res11; - unsigned short psc; /* 0x30 */ - unsigned short res12; - unsigned short scll; /* 0x34 */ - unsigned short res13; - unsigned short sclh; /* 0x38 */ - unsigned short res14; - unsigned short systest; /* 0x3c */ - unsigned short res15; -}; - -#define I2C_BUS_MAX 2 - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/mem.h b/arch/arm/include/asm/arch-omap24xx/mem.h deleted file mode 100644 index 42e8ab2..0000000 --- a/arch/arm/include/asm/arch-omap24xx/mem.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _OMAP24XX_MEM_H_ -#define _OMAP24XX_MEM_H_ - -#define SDRC_CS0_OSET 0x0 -#define SDRC_CS1_OSET 0x30 /* mirror CS1 regs appear offset 0x30 from CS0 */ - -#ifndef __ASSEMBLY__ -/* struct's for holding data tables for current boards, they are getting used - early in init when NO global access are there */ -struct sdrc_data_s { - u32 sdrc_sharing; - u32 sdrc_mdcfg_0_ddr; - u32 sdrc_mdcfg_0_sdr; - u32 sdrc_actim_ctrla_0; - u32 sdrc_actim_ctrlb_0; - u32 sdrc_rfr_ctrl; - u32 sdrc_mr_0_ddr; - u32 sdrc_mr_0_sdr; - u32 sdrc_dllab_ctrl; -} /*__attribute__ ((packed))*/; -typedef struct sdrc_data_s sdrc_data_t; - -typedef enum { - STACKED = 0, - IP_DDR = 1, - COMBO_DDR = 2, - IP_SDR = 3, -} mem_t; - -#endif - -/* Slower full frequency range default timings for x32 operation*/ -#define H4_2420_SDRC_SHARING 0x00000100 -#define H4_2420_SDRC_MDCFG_0_SDR 0x00D04010 /* discrete sdr module */ -#define H4_2420_SDRC_MR_0_SDR 0x00000031 -#define H4_2420_SDRC_MDCFG_0_DDR 0x01702011 /* descrite ddr module */ -#define H4_2420_COMBO_MDCFG_0_DDR 0x00801011 /* combo module */ -#define H4_2420_SDRC_MR_0_DDR 0x00000032 - -#define H4_2422_SDRC_SHARING 0x00004b00 -#define H4_2422_SDRC_MDCFG_0_DDR 0x00801011 /* stacked ddr on 2422 */ -#define H4_2422_SDRC_MR_0_DDR 0x00000032 - -/* ES1 work around timings */ -#define H4_242x_SDRC_ACTIM_CTRLA_0_ES1 0x9bead909 /* 165Mhz for use with 100/133 */ -#define H4_242x_SDRC_ACTIM_CTRLB_0_ES1 0x00000020 -#define H4_242x_SDRC_RFR_CTRL_ES1 0x00002401 /* use over refresh for ES1 */ - -/* optimized timings good for current shipping parts */ -#define H4_242X_SDRC_ACTIM_CTRLA_0_100MHz 0x5A59B485 -#define H4_242X_SDRC_ACTIM_CTRLB_0_100MHz 0x0000000e -#define H4_242X_SDRC_ACTIM_CTRLA_0_133MHz 0x8BA6E6C8 /* temp warn 0 settings */ -#define H4_242X_SDRC_ACTIM_CTRLB_0_133MHz 0x00000010 /* temp warn 0 settings */ -#define H4_242X_SDRC_RFR_CTRL_100MHz 0x0002da01 -#define H4_242X_SDRC_RFR_CTRL_133MHz 0x0003de01 -#define H4_242x_SDRC_DLLAB_CTRL_100MHz 0x0000980E /* 72deg, allow DPLLout*1 to work (combo)*/ -#define H4_242x_SDRC_DLLAB_CTRL_133MHz 0x0000690E /* 72deg, for ES2 */ - -#ifdef PRCM_CONFIG_II -# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz -# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz -# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz -# define H4_2420_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz -# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz -# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz -# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz -# define H4_2422_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz -#elif PRCM_CONFIG_III -# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_133MHz -# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_133MHz -# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_133MHz -# define H4_2420_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_133MHz -# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz -# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz -# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz -# define H4_2422_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz -#endif - - -/* GPMC settings */ -#ifdef PRCM_CONFIG_II /* L3 at 100MHz */ -# ifdef CONFIG_SYS_NAND_BOOT -# define H4_24XX_GPMC_CONFIG1_0 0x0 -# define H4_24XX_GPMC_CONFIG2_0 0x00141400 -# define H4_24XX_GPMC_CONFIG3_0 0x00141400 -# define H4_24XX_GPMC_CONFIG4_0 0x0F010F01 -# define H4_24XX_GPMC_CONFIG5_0 0x010C1414 -# define H4_24XX_GPMC_CONFIG6_0 0x00000A80 -# else /* else NOR */ -# define H4_24XX_GPMC_CONFIG1_0 0x3 -# define H4_24XX_GPMC_CONFIG2_0 0x000f0f01 -# define H4_24XX_GPMC_CONFIG3_0 0x00050502 -# define H4_24XX_GPMC_CONFIG4_0 0x0C060C06 -# define H4_24XX_GPMC_CONFIG5_0 0x01131F1F -# endif /* endif CONFIG_SYS_NAND_BOOT */ -# define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24)) -# define H4_24XX_GPMC_CONFIG1_1 0x00011000 -# define H4_24XX_GPMC_CONFIG2_1 0x001F1F00 -# define H4_24XX_GPMC_CONFIG3_1 0x00080802 -# define H4_24XX_GPMC_CONFIG4_1 0x1C091C09 -# define H4_24XX_GPMC_CONFIG5_1 0x031A1F1F -# define H4_24XX_GPMC_CONFIG6_1 0x000003C2 -# define H4_24XX_GPMC_CONFIG7_1 (0x00000F40|(H4_CS1_BASE >> 24)) -#endif /* endif PRCM_CONFIG_II */ - -#ifdef PRCM_CONFIG_III /* L3 at 133MHz */ -# ifdef CONFIG_SYS_NAND_BOOT -# define H4_24XX_GPMC_CONFIG1_0 0x0 -# define H4_24XX_GPMC_CONFIG2_0 0x00141400 -# define H4_24XX_GPMC_CONFIG3_0 0x00141400 -# define H4_24XX_GPMC_CONFIG4_0 0x0F010F01 -# define H4_24XX_GPMC_CONFIG5_0 0x010C1414 -# define H4_24XX_GPMC_CONFIG6_0 0x00000A80 -# else /* NOR boot */ -# define H4_24XX_GPMC_CONFIG1_0 0x3 -# define H4_24XX_GPMC_CONFIG2_0 0x00151501 -# define H4_24XX_GPMC_CONFIG3_0 0x00060602 -# define H4_24XX_GPMC_CONFIG4_0 0x10081008 -# define H4_24XX_GPMC_CONFIG5_0 0x01131F1F -# define H4_24XX_GPMC_CONFIG6_0 0x000004c4 -# endif /* endif CONFIG_SYS_NAND_BOOT */ -# define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24)) -# define H4_24XX_GPMC_CONFIG1_1 0x00011000 -# define H4_24XX_GPMC_CONFIG2_1 0x001f1f01 -# define H4_24XX_GPMC_CONFIG3_1 0x00080803 -# define H4_24XX_GPMC_CONFIG4_1 0x1C091C09 -# define H4_24XX_GPMC_CONFIG5_1 0x041f1F1F -# define H4_24XX_GPMC_CONFIG6_1 0x000004C4 -# define H4_24XX_GPMC_CONFIG7_1 (0x00000F40|(H4_CS1_BASE >> 24)) -#endif /* endif CONFIG_SYS_PRCM_III */ - -#endif /* endif _OMAP24XX_MEM_H_ */ diff --git a/arch/arm/include/asm/arch-omap24xx/mux.h b/arch/arm/include/asm/arch-omap24xx/mux.h deleted file mode 100644 index 4fdb9c6..0000000 --- a/arch/arm/include/asm/arch-omap24xx/mux.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP2420_MUX_H_ -#define _OMAP2420_MUX_H_ - -#ifndef __ASSEMBLY__ -typedef unsigned char uint8; -typedef unsigned int uint32; - -void muxSetupSDRC(void); -void muxSetupGPMC(void); -void muxSetupUsb0(void); -void muxSetupUsbHost(void); -void muxSetupUart3(void); -void muxSetupI2C1(void); -void muxSetupUART1(void); -void muxSetupLCD(void); -void muxSetupCamera(void); -void muxSetupMMCSD(void) ; -void muxSetupTouchScreen(void) ; -void muxSetupHDQ(void); -#endif - -#define USB_OTG_CTRL ((volatile uint32 *)0x4805E30C) - -/* Pin Muxing registers used for HDQ (Smart battery) */ -#define CONTROL_PADCONF_HDQ_SIO ((volatile unsigned char *)0x48000115) - -/* Pin Muxing registers used for GPMC */ -#define CONTROL_PADCONF_GPMC_D2_BYTE0 ((volatile unsigned char *)0x48000088) -#define CONTROL_PADCONF_GPMC_D2_BYTE1 ((volatile unsigned char *)0x48000089) -#define CONTROL_PADCONF_GPMC_D2_BYTE2 ((volatile unsigned char *)0x4800008A) -#define CONTROL_PADCONF_GPMC_D2_BYTE3 ((volatile unsigned char *)0x4800008B) - -#define CONTROL_PADCONF_GPMC_NCS0_BYTE0 ((volatile unsigned char *)0x4800008C) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE1 ((volatile unsigned char *)0x4800008D) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE2 ((volatile unsigned char *)0x4800008E) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE3 ((volatile unsigned char *)0x4800008F) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE4 (0x48000090) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE5 (0x48000091) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE6 (0x48000092) -#define CONTROL_PADCONF_GPMC_NCS0_BYTE7 (0x48000093) - -/* Pin Muxing registers used for SDRC */ -#define CONTROL_PADCONF_SDRC_NCS0_BYTE0 ((volatile unsigned char *)0x480000A0) -#define CONTROL_PADCONF_SDRC_NCS0_BYTE1 ((volatile unsigned char *)0x480000A1) -#define CONTROL_PADCONF_SDRC_NCS0_BYTE2 ((volatile unsigned char *)0x480000A2) -#define CONTROL_PADCONF_SDRC_NCS0_BYTE3 ((volatile unsigned char *)0x480000A3) - -#define CONTROL_PADCONF_SDRC_A14_BYTE0 ((volatile unsigned char *)0x48000030) -#define CONTROL_PADCONF_SDRC_A14_BYTE1 ((volatile unsigned char *)0x48000031) -#define CONTROL_PADCONF_SDRC_A14_BYTE2 ((volatile unsigned char *)0x48000032) -#define CONTROL_PADCONF_SDRC_A14_BYTE3 ((volatile unsigned char *)0x48000033) - -/* Pin Muxing registers used for Touch Screen (SPI) */ -#define CONTROL_PADCONF_SPI1_CLK ((volatile unsigned char *)0x480000FF) -#define CONTROL_PADCONF_SPI1_SIMO ((volatile unsigned char *)0x48000100) -#define CONTROL_PADCONF_SPI1_SOMI ((volatile unsigned char *)0x48000101) -#define CONTROL_PADCONF_SPI1_NCS0 ((volatile unsigned char *)0x48000102) -#define CONTROL_PADCONF_SPI1_NCS1 (0x48000103) - -#define CONTROL_PADCONF_MCBSP1_FSR ((volatile unsigned char *)0x4800010B) - -/* Pin Muxing registers used for MMCSD */ -#define CONTROL_PADCONF_MMC_CLKI ((volatile unsigned char *)0x480000FE) -#define CONTROL_PADCONF_MMC_CLKO ((volatile unsigned char *)0x480000F3) -#define CONTROL_PADCONF_MMC_CMD ((volatile unsigned char *)0x480000F4) -#define CONTROL_PADCONF_MMC_DAT0 ((volatile unsigned char *)0x480000F5) -#define CONTROL_PADCONF_MMC_DAT1 ((volatile unsigned char *)0x480000F6) -#define CONTROL_PADCONF_MMC_DAT2 ((volatile unsigned char *)0x480000F7) -#define CONTROL_PADCONF_MMC_DAT3 ((volatile unsigned char *)0x480000F8) -#define CONTROL_PADCONF_MMC_DAT_DIR0 ((volatile unsigned char *)0x480000F9) -#define CONTROL_PADCONF_MMC_DAT_DIR1 ((volatile unsigned char *)0x480000FA) -#define CONTROL_PADCONF_MMC_DAT_DIR2 ((volatile unsigned char *)0x480000FB) -#define CONTROL_PADCONF_MMC_DAT_DIR3 ((volatile unsigned char *)0x480000FC) -#define CONTROL_PADCONF_MMC_CMD_DIR ((volatile unsigned char *)0x480000FD) - -#define CONTROL_PADCONF_SDRC_A14 ((volatile unsigned char *)0x48000030) -#define CONTROL_PADCONF_SDRC_A13 ((volatile unsigned char *)0x48000031) - -/* Pin Muxing registers used for CAMERA */ -#define CONTROL_PADCONF_SYS_NRESWARM ((volatile unsigned char *)0x4800012B) - -#define CONTROL_PADCONF_CAM_XCLK ((volatile unsigned char *)0x480000DC) -#define CONTROL_PADCONF_CAM_LCLK ((volatile unsigned char *)0x480000DB) -#define CONTROL_PADCONF_CAM_VS ((volatile unsigned char *)0x480000DA) -#define CONTROL_PADCONF_CAM_HS ((volatile unsigned char *)0x480000D9) -#define CONTROL_PADCONF_CAM_D0 ((volatile unsigned char *)0x480000D8) -#define CONTROL_PADCONF_CAM_D1 ((volatile unsigned char *)0x480000D7) -#define CONTROL_PADCONF_CAM_D2 ((volatile unsigned char *)0x480000D6) -#define CONTROL_PADCONF_CAM_D3 ((volatile unsigned char *)0x480000D5) -#define CONTROL_PADCONF_CAM_D4 ((volatile unsigned char *)0x480000D4) -#define CONTROL_PADCONF_CAM_D5 ((volatile unsigned char *)0x480000D3) -#define CONTROL_PADCONF_CAM_D6 ((volatile unsigned char *)0x480000D2) -#define CONTROL_PADCONF_CAM_D7 ((volatile unsigned char *)0x480000D1) -#define CONTROL_PADCONF_CAM_D8 ((volatile unsigned char *)0x480000D0) -#define CONTROL_PADCONF_CAM_D9 ((volatile unsigned char *)0x480000CF) - -/* Pin Muxing registers used for LCD */ -#define CONTROL_PADCONF_DSS_D0 ((volatile unsigned char *)0x480000B3) -#define CONTROL_PADCONF_DSS_D1 ((volatile unsigned char *)0x480000B4) -#define CONTROL_PADCONF_DSS_D2 ((volatile unsigned char *)0x480000B5) -#define CONTROL_PADCONF_DSS_D3 ((volatile unsigned char *)0x480000B6) -#define CONTROL_PADCONF_DSS_D4 ((volatile unsigned char *)0x480000B7) -#define CONTROL_PADCONF_DSS_D5 ((volatile unsigned char *)0x480000B8) -#define CONTROL_PADCONF_DSS_D6 ((volatile unsigned char *)0x480000B9) -#define CONTROL_PADCONF_DSS_D7 ((volatile unsigned char *)0x480000BA) -#define CONTROL_PADCONF_DSS_D8 ((volatile unsigned char *)0x480000BB) -#define CONTROL_PADCONF_DSS_D9 ((volatile unsigned char *)0x480000BC) -#define CONTROL_PADCONF_DSS_D10 ((volatile unsigned char *)0x480000BD) -#define CONTROL_PADCONF_DSS_D11 ((volatile unsigned char *)0x480000BE) -#define CONTROL_PADCONF_DSS_D12 ((volatile unsigned char *)0x480000BF) -#define CONTROL_PADCONF_DSS_D13 ((volatile unsigned char *)0x480000C0) -#define CONTROL_PADCONF_DSS_D14 ((volatile unsigned char *)0x480000C1) -#define CONTROL_PADCONF_DSS_D15 ((volatile unsigned char *)0x480000C2) -#define CONTROL_PADCONF_DSS_D16 ((volatile unsigned char *)0x480000C3) -#define CONTROL_PADCONF_DSS_D17 ((volatile unsigned char *)0x480000C4) -#define CONTROL_PADCONF_DSS_PCLK ((volatile unsigned char *)0x480000CB) -#define CONTROL_PADCONF_DSS_VSYNC ((volatile unsigned char *)0x480000CC) -#define CONTROL_PADCONF_DSS_HSYNC ((volatile unsigned char *)0x480000CD) -#define CONTROL_PADCONF_DSS_ACBIAS ((volatile unsigned char *)0x480000CE) - -/* Pin Muxing registers used for UART1 */ -#define CONTROL_PADCONF_UART1_CTS ((volatile unsigned char *)0x480000C5) -#define CONTROL_PADCONF_UART1_RTS ((volatile unsigned char *)0x480000C6) -#define CONTROL_PADCONF_UART1_TX ((volatile unsigned char *)0x480000C7) -#define CONTROL_PADCONF_UART1_RX ((volatile unsigned char *)0x480000C8) - -/* Pin Muxing registers used for I2C1 */ -#define CONTROL_PADCONF_I2C1_SCL ((volatile unsigned char *)0x48000111) -#define CONTROL_PADCONF_I2C1_SDA ((volatile unsigned char *)0x48000112) - -/* Pin Muxing registres used for USB0. */ -#define CONTROL_PADCONF_USB0_PUEN ((volatile uint8 *)0x4800011D) -#define CONTROL_PADCONF_USB0_VP ((volatile uint8 *)0x4800011E) -#define CONTROL_PADCONF_USB0_VM ((volatile uint8 *)0x4800011F) -#define CONTROL_PADCONF_USB0_RCV ((volatile uint8 *)0x48000120) -#define CONTROL_PADCONF_USB0_TXEN ((volatile uint8 *)0x48000121) -#define CONTROL_PADCONF_USB0_SE0 ((volatile uint8 *)0x48000122) -#define CONTROL_PADCONF_USB0_DAT ((volatile uint8 *)0x48000123) - -/* Pin Muxing registres used for USB1. */ -#define CONTROL_PADCONF_USB1_RCV (0x480000EB) -#define CONTROL_PADCONF_USB1_TXEN (0x480000EC) - -/* Pin Muxing registers used for UART3/IRDA */ -#define CONTROL_PADCONF_UART3_TX_IRTX ((volatile uint8 *)0x48000118) -#define CONTROL_PADCONF_UART3_RX_IRRX ((volatile uint8 *)0x48000119) - -/* Pin Muxing registers used for GPIO */ -#define CONTROL_PADCONF_GPIO69 (0x480000ED) -#define CONTROL_PADCONF_GPIO70 (0x480000EE) -#define CONTROL_PADCONF_GPIO102 (0x48000116) -#define CONTROL_PADCONF_GPIO103 (0x48000117) -#define CONTROL_PADCONF_GPIO104 (0x48000118) -#define CONTROL_PADCONF_GPIO105 (0x48000119) - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/omap2420.h b/arch/arm/include/asm/arch-omap24xx/omap2420.h deleted file mode 100644 index 6032419..0000000 --- a/arch/arm/include/asm/arch-omap24xx/omap2420.h +++ /dev/null @@ -1,246 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _OMAP2420_SYS_H_ -#define _OMAP2420_SYS_H_ - -#include <asm/sizes.h> - -/* - * 2420 specific Section - */ - -/* L3 Firewall */ -#define A_REQINFOPERM0 0x68005048 -#define A_READPERM0 0x68005050 -#define A_WRITEPERM0 0x68005058 -/* #define GP_DEVICE (BIT8|BIT9) FIXME -- commented out to make compile -- FIXME */ - -/* L3 Firewall */ -#define A_REQINFOPERM0 0x68005048 -#define A_READPERM0 0x68005050 -#define A_WRITEPERM0 0x68005058 - -/* CONTROL */ -#define OMAP2420_CTRL_BASE (0x48000000) -#define CONTROL_STATUS (OMAP2420_CTRL_BASE + 0x2F8) - -/* device type */ -#define TST_DEVICE 0x0 -#define EMU_DEVICE 0x1 -#define HS_DEVICE 0x2 -#define GP_DEVICE 0x3 - -/* TAP information */ -#define OMAP2420_TAP_BASE (0x48014000) -#define TAP_IDCODE_REG (OMAP2420_TAP_BASE+0x204) -#define PRODUCTION_ID (OMAP2420_TAP_BASE+0x208) - -/* GPMC */ -#define OMAP2420_GPMC_BASE (0x6800A000) -#define GPMC_SYSCONFIG (OMAP2420_GPMC_BASE+0x10) -#define GPMC_IRQENABLE (OMAP2420_GPMC_BASE+0x1C) -#define GPMC_TIMEOUT_CONTROL (OMAP2420_GPMC_BASE+0x40) -#define GPMC_CONFIG (OMAP2420_GPMC_BASE+0x50) -#define GPMC_CONFIG1_0 (OMAP2420_GPMC_BASE+0x60) -#define GPMC_CONFIG2_0 (OMAP2420_GPMC_BASE+0x64) -#define GPMC_CONFIG3_0 (OMAP2420_GPMC_BASE+0x68) -#define GPMC_CONFIG4_0 (OMAP2420_GPMC_BASE+0x6C) -#define GPMC_CONFIG5_0 (OMAP2420_GPMC_BASE+0x70) -#define GPMC_CONFIG6_0 (OMAP2420_GPMC_BASE+0x74) -#define GPMC_CONFIG7_0 (OMAP2420_GPMC_BASE+0x78) -#define GPMC_CONFIG1_1 (OMAP2420_GPMC_BASE+0x90) -#define GPMC_CONFIG2_1 (OMAP2420_GPMC_BASE+0x94) -#define GPMC_CONFIG3_1 (OMAP2420_GPMC_BASE+0x98) -#define GPMC_CONFIG4_1 (OMAP2420_GPMC_BASE+0x9C) -#define GPMC_CONFIG5_1 (OMAP2420_GPMC_BASE+0xA0) -#define GPMC_CONFIG6_1 (OMAP2420_GPMC_BASE+0xA4) -#define GPMC_CONFIG7_1 (OMAP2420_GPMC_BASE+0xA8) -#define GPMC_CONFIG1_2 (OMAP2420_GPMC_BASE+0xC0) -#define GPMC_CONFIG2_2 (OMAP2420_GPMC_BASE+0xC4) -#define GPMC_CONFIG3_2 (OMAP2420_GPMC_BASE+0xC8) -#define GPMC_CONFIG4_2 (OMAP2420_GPMC_BASE+0xCC) -#define GPMC_CONFIG5_2 (OMAP2420_GPMC_BASE+0xD0) -#define GPMC_CONFIG6_2 (OMAP2420_GPMC_BASE+0xD4) -#define GPMC_CONFIG7_2 (OMAP2420_GPMC_BASE+0xD8) -#define GPMC_CONFIG1_3 (OMAP2420_GPMC_BASE+0xF0) -#define GPMC_CONFIG2_3 (OMAP2420_GPMC_BASE+0xF4) -#define GPMC_CONFIG3_3 (OMAP2420_GPMC_BASE+0xF8) -#define GPMC_CONFIG4_3 (OMAP2420_GPMC_BASE+0xFC) -#define GPMC_CONFIG5_3 (OMAP2420_GPMC_BASE+0x100) -#define GPMC_CONFIG6_3 (OMAP2420_GPMC_BASE+0x104) -#define GPMC_CONFIG7_3 (OMAP2420_GPMC_BASE+0x108) - -/* SMS */ -#define OMAP2420_SMS_BASE 0x68008000 -#define SMS_SYSCONFIG (OMAP2420_SMS_BASE+0x10) -#define SMS_CLASS_ARB0 (OMAP2420_SMS_BASE+0xD0) -# define BURSTCOMPLETE_GROUP7 BIT31 - -/* SDRC */ -#define OMAP2420_SDRC_BASE 0x68009000 -#define SDRC_SYSCONFIG (OMAP2420_SDRC_BASE+0x10) -#define SDRC_STATUS (OMAP2420_SDRC_BASE+0x14) -#define SDRC_CS_CFG (OMAP2420_SDRC_BASE+0x40) -#define SDRC_SHARING (OMAP2420_SDRC_BASE+0x44) -#define SDRC_DLLA_CTRL (OMAP2420_SDRC_BASE+0x60) -#define SDRC_DLLB_CTRL (OMAP2420_SDRC_BASE+0x68) -#define SDRC_POWER (OMAP2420_SDRC_BASE+0x70) -#define SDRC_MCFG_0 (OMAP2420_SDRC_BASE+0x80) -#define SDRC_MR_0 (OMAP2420_SDRC_BASE+0x84) -#define SDRC_ACTIM_CTRLA_0 (OMAP2420_SDRC_BASE+0x9C) -#define SDRC_ACTIM_CTRLB_0 (OMAP2420_SDRC_BASE+0xA0) -#define SDRC_ACTIM_CTRLA_1 (OMAP2420_SDRC_BASE+0xC4) -#define SDRC_ACTIM_CTRLB_1 (OMAP2420_SDRC_BASE+0xC8) -#define SDRC_RFR_CTRL (OMAP2420_SDRC_BASE+0xA4) -#define SDRC_MANUAL_0 (OMAP2420_SDRC_BASE+0xA8) -#define OMAP2420_SDRC_CS0 0x80000000 -#define OMAP2420_SDRC_CS1 0xA0000000 -#define CMD_NOP 0x0 -#define CMD_PRECHARGE 0x1 -#define CMD_AUTOREFRESH 0x2 -#define CMD_ENTR_PWRDOWN 0x3 -#define CMD_EXIT_PWRDOWN 0x4 -#define CMD_ENTR_SRFRSH 0x5 -#define CMD_CKE_HIGH 0x6 -#define CMD_CKE_LOW 0x7 -#define SOFTRESET BIT1 -#define SMART_IDLE (0x2 << 3) -#define REF_ON_IDLE (0x1 << 6) - - -/* UART */ -#define OMAP2420_UART1 0x4806A000 -#define OMAP2420_UART2 0x4806C000 -#define OMAP2420_UART3 0x4806E000 - -/* General Purpose Timers */ -#define OMAP2420_GPT1 0x48028000 -#define OMAP2420_GPT2 0x4802A000 -#define OMAP2420_GPT3 0x48078000 -#define OMAP2420_GPT4 0x4807A000 -#define OMAP2420_GPT5 0x4807C000 -#define OMAP2420_GPT6 0x4807E000 -#define OMAP2420_GPT7 0x48080000 -#define OMAP2420_GPT8 0x48082000 -#define OMAP2420_GPT9 0x48084000 -#define OMAP2420_GPT10 0x48086000 -#define OMAP2420_GPT11 0x48088000 -#define OMAP2420_GPT12 0x4808A000 - -/* timer regs offsets (32 bit regs) */ -#define TIDR 0x0 /* r */ -#define TIOCP_CFG 0x10 /* rw */ -#define TISTAT 0x14 /* r */ -#define TISR 0x18 /* rw */ -#define TIER 0x1C /* rw */ -#define TWER 0x20 /* rw */ -#define TCLR 0x24 /* rw */ -#define TCRR 0x28 /* rw */ -#define TLDR 0x2C /* rw */ -#define TTGR 0x30 /* rw */ -#define TWPS 0x34 /* r */ -#define TMAR 0x38 /* rw */ -#define TCAR1 0x3c /* r */ -#define TSICR 0x40 /* rw */ -#define TCAR2 0x44 /* r */ - -/* WatchDog Timers (1 secure, 3 GP) */ -#define WD1_BASE 0x48020000 -#define WD2_BASE 0x48022000 -#define WD3_BASE 0x48024000 -#define WD4_BASE 0x48026000 -#define WWPS 0x34 /* r */ -#define WSPR 0x48 /* rw */ -#define WD_UNLOCK1 0xAAAA -#define WD_UNLOCK2 0x5555 - -/* PRCM */ -#define OMAP2420_CM_BASE 0x48008000 -#define PRCM_CLKCFG_CTRL (OMAP2420_CM_BASE+0x080) -#define CM_CLKSEL_MPU (OMAP2420_CM_BASE+0x140) -#define CM_FCLKEN1_CORE (OMAP2420_CM_BASE+0x200) -#define CM_FCLKEN2_CORE (OMAP2420_CM_BASE+0x204) -#define CM_ICLKEN1_CORE (OMAP2420_CM_BASE+0x210) -#define CM_ICLKEN2_CORE (OMAP2420_CM_BASE+0x214) -#define CM_CLKSEL1_CORE (OMAP2420_CM_BASE+0x240) -#define CM_CLKSEL_WKUP (OMAP2420_CM_BASE+0x440) -#define CM_CLKSEL2_CORE (OMAP2420_CM_BASE+0x244) -#define CM_CLKSEL_GFX (OMAP2420_CM_BASE+0x340) -#define PM_RSTCTRL_WKUP (OMAP2420_CM_BASE+0x450) -#define CM_CLKEN_PLL (OMAP2420_CM_BASE+0x500) -#define CM_IDLEST_CKGEN (OMAP2420_CM_BASE+0x520) -#define CM_CLKSEL1_PLL (OMAP2420_CM_BASE+0x540) -#define CM_CLKSEL2_PLL (OMAP2420_CM_BASE+0x544) -#define CM_CLKSEL_DSP (OMAP2420_CM_BASE+0x840) - -/* - * H4 specific Section - */ - -/* - * The 2420's chip selects are programmable. The mask ROM - * does configure CS0 to 0x08000000 before dispatch. So, if - * you want your code to live below that address, you have to - * be prepared to jump though hoops, to reset the base address. - */ -#if defined(CONFIG_OMAP2420H4) -/* GPMC */ -#ifdef CONFIG_VIRTIO_A /* Pre version B */ -# define H4_CS0_BASE 0x08000000 /* flash (64 Meg aligned) */ -# define H4_CS1_BASE 0x04000000 /* debug board */ -# define H4_CS2_BASE 0x0A000000 /* wifi board */ -#else -# define H4_CS0_BASE 0x04000000 /* flash (64 Meg aligned) */ -# define H4_CS1_BASE 0x08000000 /* debug board */ -# define H4_CS2_BASE 0x0A000000 /* wifi board */ -#endif - -/* base address for indirect vectors (internal boot mode) */ -#define SRAM_OFFSET0 0x40000000 -#define SRAM_OFFSET1 0x00200000 -#define SRAM_OFFSET2 0x0000F800 -#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2) - -/* FPGA on Debug board.*/ -#define ETH_CONTROL_REG (H4_CS1_BASE+0x30b) -#define LAN_RESET_REGISTER (H4_CS1_BASE+0x1c) -#endif /* endif CONFIG_2420H4 */ - -#if defined(CONFIG_APOLLON) -#define APOLLON_CS0_BASE 0x00000000 /* OneNAND */ -#define APOLLON_CS1_BASE 0x08000000 /* ethernet */ -#define APOLLON_CS2_BASE 0x10000000 /* OneNAND */ -#define APOLLON_CS3_BASE 0x18000000 /* NOR */ - -#define ETH_CONTROL_REG (APOLLON_CS1_BASE + 0x30b) -#define LAN_RESET_REGISTER (APOLLON_CS1_BASE + 0x1c) -#endif /* endif CONFIG_APOLLON */ - -/* Common */ -#define LOW_LEVEL_SRAM_STACK 0x4020FFFC - -#define PERIFERAL_PORT_BASE 0x480FE003 - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/sys_info.h b/arch/arm/include/asm/arch-omap24xx/sys_info.h deleted file mode 100644 index 53c231a..0000000 --- a/arch/arm/include/asm/arch-omap24xx/sys_info.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _OMAP24XX_SYS_INFO_H_ -#define _OMAP24XX_SYS_INFO_H_ - -typedef struct h4_system_data { - /* base board info */ - u32 base_b_rev; /* rev from base board i2c */ - /* cpu board info */ - u32 cpu_b_rev; /* rev from cpu board i2c */ - u32 cpu_b_mux; /* mux type on daughter board */ - u32 cpu_b_ddr_type; /* mem type */ - u32 cpu_b_ddr_speed; /* ddr speed rating */ - u32 cpu_b_switches; /* boot ctrl switch settings */ - /* cpu info */ - u32 cpu_type; /* type of cpu; 2420, 2422, 2430,...*/ - u32 cpu_rev; /* rev of given cpu; ES1, ES2,...*/ -} h4_sys_data; - -#define XDR_POP 5 /* package on package part */ -#define SDR_DISCRETE 4 /* 128M memory SDR module*/ -#define DDR_STACKED 3 /* stacked part on 2422 */ -#define DDR_COMBO 2 /* combo part on cpu daughter card (menalaeus) */ -#define DDR_DISCRETE 1 /* 2x16 parts on daughter card */ - -#define DDR_100 100 /* type found on most mem d-boards */ -#define DDR_111 111 /* some combo parts */ -#define DDR_133 133 /* most combo, some mem d-boards */ -#define DDR_165 165 /* future parts */ - -#define CPU_2420 0x2420 -#define CPU_2422 0x2422 /* 2420 + 64M stacked */ -#define CPU_2423 0x2423 /* 2420 + 96M stacked */ - -#define CPU_2422_ES1 1 -#define CPU_2422_ES2 2 -#define CPU_2420_ES1 1 -#define CPU_2420_ES2 2 -#define CPU_2420_2422_ES1 1 - -#define CPU_2420_CHIPID 0x0B5D9000 -#define CPU_24XX_ID_MASK 0x0FFFF000 -#define CPU_242X_REV_MASK 0xF0000000 -#define CPU_242X_PID_MASK 0x000F0000 - -#define BOARD_H4_MENELAUS 1 -#define BOARD_H4_SDP 2 - -#define GPMC_MUXED 1 -#define GPMC_NONMUXED 0 - -#define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */ -#define TYPE_NOR 0x000 - -#define WIDTH_8BIT 0x0000 -#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */ - -#define I2C_MENELAUS 0x72 /* i2c id for companion chip */ - -#endif diff --git a/arch/arm/include/asm/arch-omap24xx/sys_proto.h b/arch/arm/include/asm/arch-omap24xx/sys_proto.h deleted file mode 100644 index 9d8e5b2..0000000 --- a/arch/arm/include/asm/arch-omap24xx/sys_proto.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP24XX_SYS_PROTO_H_ -#define _OMAP24XX_SYS_PROTO_H_ - -void prcm_init(void); -void memif_init(void); -void sdrc_init(void); -void do_sdrc_init(u32,u32); -void gpmc_init(void); - -void ether_init(void); -void watchdog_init(void); -void set_muxconf_regs(void); -void peripheral_enable(void); - -u32 get_cpu_type(void); -u32 get_cpu_rev(void); -u32 get_mem_type(void); -u32 get_sysboot_value(void); -u32 get_gpmc0_base(void); -u32 is_gpmc_muxed(void); -u32 get_gpmc0_type(void); -u32 get_gpmc0_width(void); -u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound); -u32 get_board_type(void); -void display_board_info(u32); -void update_mux(u32,u32); -u32 get_sdr_cs_size(u32 offset); - -u32 running_in_sdram(void); -u32 running_in_sram(void); -u32 running_in_flash(void); -u32 running_from_internal_boot(void); -u32 get_device_type(void); -#endif diff --git a/arch/arm/include/asm/arch-omap3/am35x_def.h b/arch/arm/include/asm/arch-omap3/am35x_def.h deleted file mode 100644 index 81942a8..0000000 --- a/arch/arm/include/asm/arch-omap3/am35x_def.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * am35x_def.h - TI's AM35x specific definitions. - * - * Based on arch/arm/include/asm/arch-omap3/cpu.h - * - * Author: Ajay Kumar Gupta <ajay.gupta@ti.com> - * - * Copyright (c) 2010 Texas Instruments Incorporated - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _AM35X_DEF_H_ -#define _AM35X_DEF_H_ - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> -#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ - -/* General register mappings of system control module */ -#define AM35X_SCM_GEN_BASE 0x48002270 -struct am35x_scm_general { - u32 res1[0xC4]; /* 0x000 - 0x30C */ - u32 devconf2; /* 0x310 */ - u32 devconf3; /* 0x314 */ - u32 res2[0x2]; /* 0x318 - 0x31C */ - u32 cba_priority; /* 0x320 */ - u32 lvl_intr_clr; /* 0x324 */ - u32 ip_sw_reset; /* 0x328 */ - u32 ipss_clk_ctrl; /* 0x32C */ -}; -#define am35x_scm_general_regs ((struct am35x_scm_general *)AM35X_SCM_GEN_BASE) - -#endif /*__ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#endif /* _AM35X_DEF_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/clocks.h b/arch/arm/include/asm/arch-omap3/clocks.h deleted file mode 100644 index 40f80ba..0000000 --- a/arch/arm/include/asm/arch-omap3/clocks.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _CLOCKS_H_ -#define _CLOCKS_H_ - -#define LDELAY 12000000 - -#define S12M 12000000 -#define S13M 13000000 -#define S19_2M 19200000 -#define S24M 24000000 -#define S26M 26000000 -#define S38_4M 38400000 - -#define FCK_IVA2_ON 0x00000001 -#define FCK_CORE1_ON 0x03fffe29 -#define ICK_CORE1_ON 0x3ffffffb -#define ICK_CORE2_ON 0x0000001f -#define FCK_WKUP_ON 0x000000e9 -#define ICK_WKUP_ON 0x0000003f -#define FCK_DSS_ON 0x00000005 -#define ICK_DSS_ON 0x00000001 -#define FCK_CAM_ON 0x00000001 -#define ICK_CAM_ON 0x00000001 -#define FCK_PER_ON 0x0003ffff -#define ICK_PER_ON 0x0003ffff - -/* Used to index into DPLL parameter tables */ -typedef struct { - unsigned int m; - unsigned int n; - unsigned int fsel; - unsigned int m2; -} dpll_param; - -struct dpll_per_36x_param { - unsigned int sys_clk; - unsigned int m; - unsigned int n; - unsigned int m2; - unsigned int m3; - unsigned int m4; - unsigned int m5; - unsigned int m6; - unsigned int m2div; -}; - -/* Following functions are exported from lowlevel_init.S */ -extern dpll_param *get_mpu_dpll_param(void); -extern dpll_param *get_iva_dpll_param(void); -extern dpll_param *get_core_dpll_param(void); -extern dpll_param *get_per_dpll_param(void); - -extern dpll_param *get_36x_mpu_dpll_param(void); -extern dpll_param *get_36x_iva_dpll_param(void); -extern dpll_param *get_36x_core_dpll_param(void); -extern dpll_param *get_36x_per_dpll_param(void); - -extern void *_end_vect, *_start; - -#endif diff --git a/arch/arm/include/asm/arch-omap3/clocks_omap3.h b/arch/arm/include/asm/arch-omap3/clocks_omap3.h deleted file mode 100644 index 30ef690..0000000 --- a/arch/arm/include/asm/arch-omap3/clocks_omap3.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _CLOCKS_OMAP3_H_ -#define _CLOCKS_OMAP3_H_ - -#define PLL_STOP 1 /* PER & IVA */ -#define PLL_LOW_POWER_BYPASS 5 /* MPU, IVA & CORE */ -#define PLL_FAST_RELOCK_BYPASS 6 /* CORE */ -#define PLL_LOCK 7 /* MPU, IVA, CORE & PER */ - -/* - * The following configurations are OPP and SysClk value independant - * and hence are defined here. All the other DPLL related values are - * tabulated in lowlevel_init.S. - */ - -/* CORE DPLL */ -#define CORE_M3X2 2 /* 332MHz : CM_CLKSEL1_EMU */ -#define CORE_SSI_DIV 3 /* 221MHz : CM_CLKSEL_CORE */ -#define CORE_FUSB_DIV 2 /* 41.5MHz: */ -#define CORE_L4_DIV 2 /* 83MHz : L4 */ -#define CORE_L3_DIV 2 /* 166MHz : L3 {DDR} */ -#define GFX_DIV 2 /* 83MHz : CM_CLKSEL_GFX */ -#define WKUP_RSM 2 /* 41.5MHz: CM_CLKSEL_WKUP */ - -/* PER DPLL */ -#define PER_M6X2 3 /* 288MHz: CM_CLKSEL1_EMU */ -#define PER_M5X2 4 /* 216MHz: CM_CLKSEL_CAM */ -#define PER_M4X2 2 /* 432MHz: CM_CLKSEL_DSS-dss1 */ -#define PER_M3X2 16 /* 54MHz : CM_CLKSEL_DSS-tv */ - -#define CLSEL1_EMU_VAL ((CORE_M3X2 << 16) | (PER_M6X2 << 24) | (0x0A50)) - -/* MPU DPLL */ - -#define MPU_M_12_ES1 0x0FE -#define MPU_N_12_ES1 0x07 -#define MPU_FSEL_12_ES1 0x05 -#define MPU_M2_12_ES1 0x01 - -#define MPU_M_12_ES2 0x0FA -#define MPU_N_12_ES2 0x05 -#define MPU_FSEL_12_ES2 0x07 -#define MPU_M2_ES2 0x01 - -#define MPU_M_12 0x085 -#define MPU_N_12 0x05 -#define MPU_FSEL_12 0x07 -#define MPU_M2_12 0x01 - -#define MPU_M_13_ES1 0x17D -#define MPU_N_13_ES1 0x0C -#define MPU_FSEL_13_ES1 0x03 -#define MPU_M2_13_ES1 0x01 - -#define MPU_M_13_ES2 0x1F4 -#define MPU_N_13_ES2 0x0C -#define MPU_FSEL_13_ES2 0x03 -#define MPU_M2_13_ES2 0x01 - -#define MPU_M_13 0x10A -#define MPU_N_13 0x0C -#define MPU_FSEL_13 0x03 -#define MPU_M2_13 0x01 - -#define MPU_M_19P2_ES1 0x179 -#define MPU_N_19P2_ES1 0x12 -#define MPU_FSEL_19P2_ES1 0x04 -#define MPU_M2_19P2_ES1 0x01 - -#define MPU_M_19P2_ES2 0x271 -#define MPU_N_19P2_ES2 0x17 -#define MPU_FSEL_19P2_ES2 0x03 -#define MPU_M2_19P2_ES2 0x01 - -#define MPU_M_19P2 0x14C -#define MPU_N_19P2 0x17 -#define MPU_FSEL_19P2 0x03 -#define MPU_M2_19P2 0x01 - -#define MPU_M_26_ES1 0x17D -#define MPU_N_26_ES1 0x19 -#define MPU_FSEL_26_ES1 0x03 -#define MPU_M2_26_ES1 0x01 - -#define MPU_M_26_ES2 0x0FA -#define MPU_N_26_ES2 0x0C -#define MPU_FSEL_26_ES2 0x07 -#define MPU_M2_26_ES2 0x01 - -#define MPU_M_26 0x085 -#define MPU_N_26 0x0C -#define MPU_FSEL_26 0x07 -#define MPU_M2_26 0x01 - -#define MPU_M_38P4_ES1 0x1FA -#define MPU_N_38P4_ES1 0x32 -#define MPU_FSEL_38P4_ES1 0x03 -#define MPU_M2_38P4_ES1 0x01 - -#define MPU_M_38P4_ES2 0x271 -#define MPU_N_38P4_ES2 0x2F -#define MPU_FSEL_38P4_ES2 0x03 -#define MPU_M2_38P4_ES2 0x01 - -#define MPU_M_38P4 0x14C -#define MPU_N_38P4 0x2F -#define MPU_FSEL_38P4 0x03 -#define MPU_M2_38P4 0x01 - -/* IVA DPLL */ - -#define IVA_M_12_ES1 0x07D -#define IVA_N_12_ES1 0x05 -#define IVA_FSEL_12_ES1 0x07 -#define IVA_M2_12_ES1 0x01 - -#define IVA_M_12_ES2 0x0B4 -#define IVA_N_12_ES2 0x05 -#define IVA_FSEL_12_ES2 0x07 -#define IVA_M2_12_ES2 0x01 - -#define IVA_M_12 0x085 -#define IVA_N_12 0x05 -#define IVA_FSEL_12 0x07 -#define IVA_M2_12 0x01 - -#define IVA_M_13_ES1 0x0FA -#define IVA_N_13_ES1 0x0C -#define IVA_FSEL_13_ES1 0x03 -#define IVA_M2_13_ES1 0x01 - -#define IVA_M_13_ES2 0x168 -#define IVA_N_13_ES2 0x0C -#define IVA_FSEL_13_ES2 0x03 -#define IVA_M2_13_ES2 0x01 - -#define IVA_M_13 0x10A -#define IVA_N_13 0x0C -#define IVA_FSEL_13 0x03 -#define IVA_M2_13 0x01 - -#define IVA_M_19P2_ES1 0x082 -#define IVA_N_19P2_ES1 0x09 -#define IVA_FSEL_19P2_ES1 0x07 -#define IVA_M2_19P2_ES1 0x01 - -#define IVA_M_19P2_ES2 0x0E1 -#define IVA_N_19P2_ES2 0x0B -#define IVA_FSEL_19P2_ES2 0x06 -#define IVA_M2_19P2_ES2 0x01 - -#define IVA_M_19P2 0x14C -#define IVA_N_19P2 0x17 -#define IVA_FSEL_19P2 0x03 -#define IVA_M2_19P2 0x01 - -#define IVA_M_26_ES1 0x07D -#define IVA_N_26_ES1 0x0C -#define IVA_FSEL_26_ES1 0x07 -#define IVA_M2_26_ES1 0x01 - -#define IVA_M_26_ES2 0x0B4 -#define IVA_N_26_ES2 0x0C -#define IVA_FSEL_26_ES2 0x07 -#define IVA_M2_26_ES2 0x01 - -#define IVA_M_26 0x085 -#define IVA_N_26 0x0C -#define IVA_FSEL_26 0x07 -#define IVA_M2_26 0x01 - -#define IVA_M_38P4_ES1 0x13F -#define IVA_N_38P4_ES1 0x30 -#define IVA_FSEL_38P4_ES1 0x03 -#define IVA_M2_38P4_ES1 0x01 - -#define IVA_M_38P4_ES2 0x0E1 -#define IVA_N_38P4_ES2 0x17 -#define IVA_FSEL_38P4_ES2 0x06 -#define IVA_M2_38P4_ES2 0x01 - -#define IVA_M_38P4 0x14C -#define IVA_N_38P4 0x2F -#define IVA_FSEL_38P4 0x03 -#define IVA_M2_38P4 0x01 - -/* CORE DPLL */ - -#define CORE_M_12 0xA6 -#define CORE_N_12 0x05 -#define CORE_FSEL_12 0x07 -#define CORE_M2_12 0x01 /* M3 of 2 */ - -#define CORE_M_12_ES1 0x19F -#define CORE_N_12_ES1 0x0E -#define CORE_FSL_12_ES1 0x03 -#define CORE_M2_12_ES1 0x1 /* M3 of 2 */ - -#define CORE_M_13 0x14C -#define CORE_N_13 0x0C -#define CORE_FSEL_13 0x03 -#define CORE_M2_13 0x01 /* M3 of 2 */ - -#define CORE_M_13_ES1 0x1B2 -#define CORE_N_13_ES1 0x10 -#define CORE_FSL_13_ES1 0x03 -#define CORE_M2_13_ES1 0x01 /* M3 of 2 */ - -#define CORE_M_19P2 0x19F -#define CORE_N_19P2 0x17 -#define CORE_FSEL_19P2 0x03 -#define CORE_M2_19P2 0x01 /* M3 of 2 */ - -#define CORE_M_19P2_ES1 0x19F -#define CORE_N_19P2_ES1 0x17 -#define CORE_FSL_19P2_ES1 0x03 -#define CORE_M2_19P2_ES1 0x01 /* M3 of 2 */ - -#define CORE_M_26 0xA6 -#define CORE_N_26 0x0C -#define CORE_FSEL_26 0x07 -#define CORE_M2_26 0x01 /* M3 of 2 */ - -#define CORE_M_26_ES1 0x1B2 -#define CORE_N_26_ES1 0x21 -#define CORE_FSL_26_ES1 0x03 -#define CORE_M2_26_ES1 0x01 /* M3 of 2 */ - -#define CORE_M_38P4 0x19F -#define CORE_N_38P4 0x2F -#define CORE_FSEL_38P4 0x03 -#define CORE_M2_38P4 0x01 /* M3 of 2 */ - -#define CORE_M_38P4_ES1 0x19F -#define CORE_N_38P4_ES1 0x2F -#define CORE_FSL_38P4_ES1 0x03 -#define CORE_M2_38P4_ES1 0x01 /* M3 of 2 */ - -/* PER DPLL */ - -#define PER_M_12 0xD8 -#define PER_N_12 0x05 -#define PER_FSEL_12 0x07 -#define PER_M2_12 0x09 - -#define PER_M_13 0x1B0 -#define PER_N_13 0x0C -#define PER_FSEL_13 0x03 -#define PER_M2_13 0x09 - -#define PER_M_19P2 0xE1 -#define PER_N_19P2 0x09 -#define PER_FSEL_19P2 0x07 -#define PER_M2_19P2 0x09 - -#define PER_M_26 0xD8 -#define PER_N_26 0x0C -#define PER_FSEL_26 0x07 -#define PER_M2_26 0x09 - -#define PER_M_38P4 0xE1 -#define PER_N_38P4 0x13 -#define PER_FSEL_38P4 0x07 -#define PER_M2_38P4 0x09 - -/* 36XX PER DPLL */ - -#define PER_36XX_M_12 0x1B0 -#define PER_36XX_N_12 0x05 -#define PER_36XX_FSEL_12 0x07 -#define PER_36XX_M2_12 0x09 - -#define PER_36XX_M_13 0x360 -#define PER_36XX_N_13 0x0C -#define PER_36XX_FSEL_13 0x03 -#define PER_36XX_M2_13 0x09 - -#define PER_36XX_M_19P2 0x1C2 -#define PER_36XX_N_19P2 0x09 -#define PER_36XX_FSEL_19P2 0x07 -#define PER_36XX_M2_19P2 0x09 - -#define PER_36XX_M_26 0x1B0 -#define PER_36XX_N_26 0x0C -#define PER_36XX_FSEL_26 0x07 -#define PER_36XX_M2_26 0x09 - -#define PER_36XX_M_38P4 0x1C2 -#define PER_36XX_N_38P4 0x13 -#define PER_36XX_FSEL_38P4 0x07 -#define PER_36XX_M2_38P4 0x09 - -#endif /* endif _CLOCKS_OMAP3_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h deleted file mode 100644 index 962d6d4..0000000 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ /dev/null @@ -1,490 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _CPU_H -#define _CPU_H - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> -#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ - -/* Register offsets of common modules */ -/* Control */ -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct ctrl { - u8 res1[0xC0]; - u16 gpmc_nadv_ale; /* 0xC0 */ - u16 gpmc_noe; /* 0xC2 */ - u16 gpmc_nwe; /* 0xC4 */ - u8 res2[0x22A]; - u32 status; /* 0x2F0 */ - u32 gpstatus; /* 0x2F4 */ - u8 res3[0x08]; - u32 rpubkey_0; /* 0x300 */ - u32 rpubkey_1; /* 0x304 */ - u32 rpubkey_2; /* 0x308 */ - u32 rpubkey_3; /* 0x30C */ - u32 rpubkey_4; /* 0x310 */ - u8 res4[0x04]; - u32 randkey_0; /* 0x318 */ - u32 randkey_1; /* 0x31C */ - u32 randkey_2; /* 0x320 */ - u32 randkey_3; /* 0x324 */ - u8 res5[0x124]; - u32 ctrl_omap_stat; /* 0x44C */ -}; -#else /* __ASSEMBLY__ */ -#define CONTROL_STATUS 0x2F0 -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct ctrl_id { - u8 res1[0x4]; - u32 idcode; /* 0x04 */ - u32 prod_id; /* 0x08 */ - u32 sku_id; /* 0x0c */ - u8 res2[0x08]; - u32 die_id_0; /* 0x18 */ - u32 die_id_1; /* 0x1C */ - u32 die_id_2; /* 0x20 */ - u32 die_id_3; /* 0x24 */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -/* device type */ -#define DEVICE_MASK (0x7 << 8) -#define SYSBOOT_MASK 0x1F -#define TST_DEVICE 0x0 -#define EMU_DEVICE 0x1 -#define HS_DEVICE 0x2 -#define GP_DEVICE 0x3 - -/* device speed */ -#define SKUID_CLK_MASK 0xf -#define SKUID_CLK_600MHZ 0x0 -#define SKUID_CLK_720MHZ 0x8 - -#define GPMC_BASE (OMAP34XX_GPMC_BASE) -#define GPMC_CONFIG_CS0 0x60 -#define GPMC_CONFIG_CS0_BASE (GPMC_BASE + GPMC_CONFIG_CS0) - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct gpmc_cs { - u32 config1; /* 0x00 */ - u32 config2; /* 0x04 */ - u32 config3; /* 0x08 */ - u32 config4; /* 0x0C */ - u32 config5; /* 0x10 */ - u32 config6; /* 0x14 */ - u32 config7; /* 0x18 */ - u32 nand_cmd; /* 0x1C */ - u32 nand_adr; /* 0x20 */ - u32 nand_dat; /* 0x24 */ - u8 res[8]; /* blow up to 0x30 byte */ -}; - -struct gpmc { - u8 res1[0x10]; - u32 sysconfig; /* 0x10 */ - u8 res2[0x4]; - u32 irqstatus; /* 0x18 */ - u32 irqenable; /* 0x1C */ - u8 res3[0x20]; - u32 timeout_control; /* 0x40 */ - u8 res4[0xC]; - u32 config; /* 0x50 */ - u32 status; /* 0x54 */ - u8 res5[0x8]; /* 0x58 */ - struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ - u8 res6[0x14]; /* 0x1E0 */ - u32 ecc_config; /* 0x1F4 */ - u32 ecc_control; /* 0x1F8 */ - u32 ecc_size_config; /* 0x1FC */ - u32 ecc1_result; /* 0x200 */ - u32 ecc2_result; /* 0x204 */ - u32 ecc3_result; /* 0x208 */ - u32 ecc4_result; /* 0x20C */ - u32 ecc5_result; /* 0x210 */ - u32 ecc6_result; /* 0x214 */ - u32 ecc7_result; /* 0x218 */ - u32 ecc8_result; /* 0x21C */ - u32 ecc9_result; /* 0x220 */ -}; - -/* Used for board specific gpmc initialization */ -extern struct gpmc *gpmc_cfg; - -#else /* __ASSEMBLY__ */ -#define GPMC_CONFIG1 0x00 -#define GPMC_CONFIG2 0x04 -#define GPMC_CONFIG3 0x08 -#define GPMC_CONFIG4 0x0C -#define GPMC_CONFIG5 0x10 -#define GPMC_CONFIG6 0x14 -#define GPMC_CONFIG7 0x18 -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -/* GPMC Mapping */ -#define FLASH_BASE 0x10000000 /* NOR flash, */ - /* aligned to 256 Meg */ -#define FLASH_BASE_SDPV1 0x04000000 /* NOR flash, */ - /* aligned to 64 Meg */ -#define FLASH_BASE_SDPV2 0x10000000 /* NOR flash, */ - /* aligned to 256 Meg */ -#define DEBUG_BASE 0x08000000 /* debug board */ -#define NAND_BASE 0x30000000 /* NAND addr */ - /* (actual size small port) */ -#define PISMO2_BASE 0x18000000 /* PISMO2 CS1/2 */ -#define ONENAND_MAP 0x20000000 /* OneNand addr */ - /* (actual size small port) */ -/* SMS */ -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct sms { - u8 res1[0x10]; - u32 sysconfig; /* 0x10 */ - u8 res2[0x34]; - u32 rg_att0; /* 0x48 */ - u8 res3[0x84]; - u32 class_arb0; /* 0xD0 */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define BURSTCOMPLETE_GROUP7 (0x1 << 31) - -/* SDRC */ -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct sdrc_cs { - u32 mcfg; /* 0x80 || 0xB0 */ - u32 mr; /* 0x84 || 0xB4 */ - u8 res1[0x4]; - u32 emr2; /* 0x8C || 0xBC */ - u8 res2[0x14]; - u32 rfr_ctrl; /* 0x84 || 0xD4 */ - u32 manual; /* 0xA8 || 0xD8 */ - u8 res3[0x4]; -}; - -struct sdrc_actim { - u32 ctrla; /* 0x9C || 0xC4 */ - u32 ctrlb; /* 0xA0 || 0xC8 */ -}; - -struct sdrc { - u8 res1[0x10]; - u32 sysconfig; /* 0x10 */ - u32 status; /* 0x14 */ - u8 res2[0x28]; - u32 cs_cfg; /* 0x40 */ - u32 sharing; /* 0x44 */ - u8 res3[0x18]; - u32 dlla_ctrl; /* 0x60 */ - u32 dlla_status; /* 0x64 */ - u32 dllb_ctrl; /* 0x68 */ - u32 dllb_status; /* 0x6C */ - u32 power; /* 0x70 */ - u8 res4[0xC]; - struct sdrc_cs cs[2]; /* 0x80 || 0xB0 */ -}; - -/* EMIF4 */ -typedef struct emif4 { - unsigned int sdram_sts; - unsigned int sdram_config; - unsigned int res1; - unsigned int sdram_refresh_ctrl; - unsigned int sdram_refresh_ctrl_shdw; - unsigned int sdram_time1; - unsigned int sdram_time1_shdw; - unsigned int sdram_time2; - unsigned int sdram_time2_shdw; - unsigned int sdram_time3; - unsigned int sdram_time3_shdw; - unsigned char res2[8]; - unsigned int sdram_pwr_mgmt; - unsigned int sdram_pwr_mgmt_shdw; - unsigned char res3[32]; - unsigned int sdram_iodft_tlgc; - unsigned char res4[128]; - unsigned int ddr_phyctrl1; - unsigned int ddr_phyctrl1_shdw; - unsigned int ddr_phyctrl2; -} emif4_t; - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define DLLPHASE_90 (0x1 << 1) -#define LOADDLL (0x1 << 2) -#define ENADLL (0x1 << 3) -#define DLL_DELAY_MASK 0xFF00 -#define DLL_NO_FILTER_MASK ((0x1 << 9) | (0x1 << 8)) - -#define PAGEPOLICY_HIGH (0x1 << 0) -#define SRFRONRESET (0x1 << 7) -#define PWDNEN (0x1 << 2) -#define WAKEUPPROC (0x1 << 26) - -#define DDR_SDRAM (0x1 << 0) -#define DEEPPD (0x1 << 3) -#define B32NOT16 (0x1 << 4) -#define BANKALLOCATION (0x2 << 6) -#define RAMSIZE_128 (0x40 << 8) /* RAM size in 2MB chunks */ -#define ADDRMUXLEGACY (0x1 << 19) -#define CASWIDTH_10BITS (0x5 << 20) -#define RASWIDTH_13BITS (0x2 << 24) -#define BURSTLENGTH4 (0x2 << 0) -#define CASL3 (0x3 << 4) -#define SDRC_ACTIM_CTRL0_BASE (OMAP34XX_SDRC_BASE + 0x9C) -#define SDRC_ACTIM_CTRL1_BASE (OMAP34XX_SDRC_BASE + 0xC4) -#define ARE_ARCV_1 (0x1 << 0) -#define ARCV (0x4e2 << 8) /* Autorefresh count */ -#define OMAP34XX_SDRC_CS0 0x80000000 -#define OMAP34XX_SDRC_CS1 0xA0000000 -#define CMD_NOP 0x0 -#define CMD_PRECHARGE 0x1 -#define CMD_AUTOREFRESH 0x2 -#define CMD_ENTR_PWRDOWN 0x3 -#define CMD_EXIT_PWRDOWN 0x4 -#define CMD_ENTR_SRFRSH 0x5 -#define CMD_CKE_HIGH 0x6 -#define CMD_CKE_LOW 0x7 -#define SOFTRESET (0x1 << 1) -#define SMART_IDLE (0x2 << 3) -#define REF_ON_IDLE (0x1 << 6) - -/* timer regs offsets (32 bit regs) */ - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct gptimer { - u32 tidr; /* 0x00 r */ - u8 res[0xc]; - u32 tiocp_cfg; /* 0x10 rw */ - u32 tistat; /* 0x14 r */ - u32 tisr; /* 0x18 rw */ - u32 tier; /* 0x1c rw */ - u32 twer; /* 0x20 rw */ - u32 tclr; /* 0x24 rw */ - u32 tcrr; /* 0x28 rw */ - u32 tldr; /* 0x2c rw */ - u32 ttgr; /* 0x30 rw */ - u32 twpc; /* 0x34 r*/ - u32 tmar; /* 0x38 rw*/ - u32 tcar1; /* 0x3c r */ - u32 tcicr; /* 0x40 rw */ - u32 tcar2; /* 0x44 r */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -/* enable sys_clk NO-prescale /1 */ -#define GPT_EN ((0x0 << 2) | (0x1 << 1) | (0x1 << 0)) - -/* Watchdog */ -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct watchdog { - u8 res1[0x34]; - u32 wwps; /* 0x34 r */ - u8 res2[0x10]; - u32 wspr; /* 0x48 rw */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define WD_UNLOCK1 0xAAAA -#define WD_UNLOCK2 0x5555 - -/* PRCM */ -#define PRCM_BASE 0x48004000 - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct prcm { - u32 fclken_iva2; /* 0x00 */ - u32 clken_pll_iva2; /* 0x04 */ - u8 res1[0x1c]; - u32 idlest_pll_iva2; /* 0x24 */ - u8 res2[0x18]; - u32 clksel1_pll_iva2 ; /* 0x40 */ - u32 clksel2_pll_iva2; /* 0x44 */ - u8 res3[0x8bc]; - u32 clken_pll_mpu; /* 0x904 */ - u8 res4[0x1c]; - u32 idlest_pll_mpu; /* 0x924 */ - u8 res5[0x18]; - u32 clksel1_pll_mpu; /* 0x940 */ - u32 clksel2_pll_mpu; /* 0x944 */ - u8 res6[0xb8]; - u32 fclken1_core; /* 0xa00 */ - u8 res7[0xc]; - u32 iclken1_core; /* 0xa10 */ - u32 iclken2_core; /* 0xa14 */ - u8 res8[0x28]; - u32 clksel_core; /* 0xa40 */ - u8 res9[0xbc]; - u32 fclken_gfx; /* 0xb00 */ - u8 res10[0xc]; - u32 iclken_gfx; /* 0xb10 */ - u8 res11[0x2c]; - u32 clksel_gfx; /* 0xb40 */ - u8 res12[0xbc]; - u32 fclken_wkup; /* 0xc00 */ - u8 res13[0xc]; - u32 iclken_wkup; /* 0xc10 */ - u8 res14[0xc]; - u32 idlest_wkup; /* 0xc20 */ - u8 res15[0x1c]; - u32 clksel_wkup; /* 0xc40 */ - u8 res16[0xbc]; - u32 clken_pll; /* 0xd00 */ - u8 res17[0x1c]; - u32 idlest_ckgen; /* 0xd20 */ - u8 res18[0x1c]; - u32 clksel1_pll; /* 0xd40 */ - u32 clksel2_pll; /* 0xd44 */ - u32 clksel3_pll; /* 0xd48 */ - u8 res19[0xb4]; - u32 fclken_dss; /* 0xe00 */ - u8 res20[0xc]; - u32 iclken_dss; /* 0xe10 */ - u8 res21[0x2c]; - u32 clksel_dss; /* 0xe40 */ - u8 res22[0xbc]; - u32 fclken_cam; /* 0xf00 */ - u8 res23[0xc]; - u32 iclken_cam; /* 0xf10 */ - u8 res24[0x2c]; - u32 clksel_cam; /* 0xf40 */ - u8 res25[0xbc]; - u32 fclken_per; /* 0x1000 */ - u8 res26[0xc]; - u32 iclken_per; /* 0x1010 */ - u8 res27[0x2c]; - u32 clksel_per; /* 0x1040 */ - u8 res28[0xfc]; - u32 clksel1_emu; /* 0x1140 */ -}; -#else /* __ASSEMBLY__ */ -#define CM_CLKSEL_CORE 0x48004a40 -#define CM_CLKSEL_GFX 0x48004b40 -#define CM_CLKSEL_WKUP 0x48004c40 -#define CM_CLKEN_PLL 0x48004d00 -#define CM_CLKSEL1_PLL 0x48004d40 -#define CM_CLKSEL1_EMU 0x48005140 -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define PRM_BASE 0x48306000 - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct prm { - u8 res1[0xd40]; - u32 clksel; /* 0xd40 */ - u8 res2[0x50c]; - u32 rstctrl; /* 0x1250 */ - u8 res3[0x1c]; - u32 clksrc_ctrl; /* 0x1270 */ -}; -#else /* __ASSEMBLY__ */ -#define PRM_RSTCTRL 0x48307250 -#define PRM_RSTCTRL_RESET 0x04 -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define SYSCLKDIV_1 (0x1 << 6) -#define SYSCLKDIV_2 (0x1 << 7) - -#define CLKSEL_GPT1 (0x1 << 0) - -#define EN_GPT1 (0x1 << 0) -#define EN_32KSYNC (0x1 << 2) - -#define ST_WDT2 (0x1 << 5) - -#define ST_MPU_CLK (0x1 << 0) - -#define ST_CORE_CLK (0x1 << 0) - -#define ST_PERIPH_CLK (0x1 << 1) - -#define ST_IVA2_CLK (0x1 << 0) - -#define RESETDONE (0x1 << 0) - -#define TCLR_ST (0x1 << 0) -#define TCLR_AR (0x1 << 1) -#define TCLR_PRE (0x1 << 5) - -/* SMX-APE */ -#define PM_RT_APE_BASE_ADDR_ARM (SMX_APE_BASE + 0x10000) -#define PM_GPMC_BASE_ADDR_ARM (SMX_APE_BASE + 0x12400) -#define PM_OCM_RAM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12800) -#define PM_IVA2_BASE_ADDR_ARM (SMX_APE_BASE + 0x14000) - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct pm { - u8 res1[0x48]; - u32 req_info_permission_0; /* 0x48 */ - u8 res2[0x4]; - u32 read_permission_0; /* 0x50 */ - u8 res3[0x4]; - u32 wirte_permission_0; /* 0x58 */ - u8 res4[0x4]; - u32 addr_match_1; /* 0x58 */ - u8 res5[0x4]; - u32 req_info_permission_1; /* 0x68 */ - u8 res6[0x14]; - u32 addr_match_2; /* 0x80 */ -}; -#endif /*__ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -/* Permission values for registers -Full fledged permissions to all */ -#define UNLOCK_1 0xFFFFFFFF -#define UNLOCK_2 0x00000000 -#define UNLOCK_3 0x0000FFFF - -#define NOT_EARLY 0 - -/* I2C base */ -#define I2C_BASE1 (OMAP34XX_CORE_L4_IO_BASE + 0x70000) -#define I2C_BASE2 (OMAP34XX_CORE_L4_IO_BASE + 0x72000) -#define I2C_BASE3 (OMAP34XX_CORE_L4_IO_BASE + 0x60000) - -/* MUSB base */ -#define MUSB_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000) - -#endif /* _CPU_H */ diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h deleted file mode 100644 index e5e3b0d..0000000 --- a/arch/arm/include/asm/arch-omap3/dss.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * (C) Copyright 2010 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * Referred to Linux DSS driver files for OMAP3 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation's version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef DSS_H -#define DSS_H - -/* - * DSS Base Registers - */ -#define OMAP3_DSS_BASE 0x48050040 -#define OMAP3_DISPC_BASE 0x48050440 -#define OMAP3_VENC_BASE 0x48050C00 - -/* DSS Registers */ -struct dss_regs { - u32 control; /* 0x40 */ - u32 sdi_control; /* 0x44 */ - u32 pll_control; /* 0x48 */ -}; - -/* DISPC Registers */ -struct dispc_regs { - u32 control; /* 0x40 */ - u32 config; /* 0x44 */ - u32 reserve_2; /* 0x48 */ - u32 default_color0; /* 0x4C */ - u32 default_color1; /* 0x50 */ - u32 trans_color0; /* 0x54 */ - u32 trans_color1; /* 0x58 */ - u32 line_status; /* 0x5C */ - u32 line_number; /* 0x60 */ - u32 timing_h; /* 0x64 */ - u32 timing_v; /* 0x68 */ - u32 pol_freq; /* 0x6C */ - u32 divisor; /* 0x70 */ - u32 global_alpha; /* 0x74 */ - u32 size_dig; /* 0x78 */ - u32 size_lcd; /* 0x7C */ -}; - -/* VENC Registers */ -struct venc_regs { - u32 rev_id; /* 0x00 */ - u32 status; /* 0x04 */ - u32 f_control; /* 0x08 */ - u32 reserve_1; /* 0x0C */ - u32 vidout_ctrl; /* 0x10 */ - u32 sync_ctrl; /* 0x14 */ - u32 reserve_2; /* 0x18 */ - u32 llen; /* 0x1C */ - u32 flens; /* 0x20 */ - u32 hfltr_ctrl; /* 0x24 */ - u32 cc_carr_wss_carr; /* 0x28 */ - u32 c_phase; /* 0x2C */ - u32 gain_u; /* 0x30 */ - u32 gain_v; /* 0x34 */ - u32 gain_y; /* 0x38 */ - u32 black_level; /* 0x3C */ - u32 blank_level; /* 0x40 */ - u32 x_color; /* 0x44 */ - u32 m_control; /* 0x48 */ - u32 bstamp_wss_data; /* 0x4C */ - u32 s_carr; /* 0x50 */ - u32 line21; /* 0x54 */ - u32 ln_sel; /* 0x58 */ - u32 l21__wc_ctl; /* 0x5C */ - u32 htrigger_vtrigger; /* 0x60 */ - u32 savid__eavid; /* 0x64 */ - u32 flen__fal; /* 0x68 */ - u32 lal__phase_reset; /* 0x6C */ - u32 hs_int_start_stop_x; /* 0x70 */ - u32 hs_ext_start_stop_x; /* 0x74 */ - u32 vs_int_start_x; /* 0x78 */ - u32 vs_int_stop_x__vs_int_start_y; /* 0x7C */ - u32 vs_int_stop_y__vs_ext_start_x; /* 0x80 */ - u32 vs_ext_stop_x__vs_ext_start_y; /* 0x84 */ - u32 vs_ext_stop_y; /* 0x88 */ - u32 reserve_3; /* 0x8C */ - u32 avid_start_stop_x; /* 0x90 */ - u32 avid_start_stop_y; /* 0x94 */ - u32 reserve_4; /* 0x98 */ - u32 reserve_5; /* 0x9C */ - u32 fid_int_start_x__fid_int_start_y; /* 0xA0 */ - u32 fid_int_offset_y__fid_ext_start_x; /* 0xA4 */ - u32 fid_ext_start_y__fid_ext_offset_y; /* 0xA8 */ - u32 reserve_6; /* 0xAC */ - u32 tvdetgp_int_start_stop_x; /* 0xB0 */ - u32 tvdetgp_int_start_stop_y; /* 0xB4 */ - u32 gen_ctrl; /* 0xB8 */ - u32 reserve_7; /* 0xBC */ - u32 reserve_8; /* 0xC0 */ - u32 output_control; /* 0xC4 */ - u32 dac_b__dac_c; /* 0xC8 */ - u32 height_width; /* 0xCC */ -}; - -/* Few Register Offsets */ -#define FRAME_MODE_SHIFT 1 -#define TFTSTN_SHIFT 3 -#define DATALINES_SHIFT 8 - -/* Enabling Display controller */ -#define LCD_ENABLE 1 -#define DIG_ENABLE (1 << 1) -#define GO_LCD (1 << 5) -#define GO_DIG (1 << 6) -#define GP_OUT0 (1 << 15) -#define GP_OUT1 (1 << 16) - -#define DISPC_ENABLE (LCD_ENABLE | \ - DIG_ENABLE | \ - GO_LCD | \ - GO_DIG | \ - GP_OUT0| \ - GP_OUT1) - -/* Configure VENC DSS Params */ -#define VENC_CLK_ENABLE (1 << 3) -#define DAC_DEMEN (1 << 4) -#define DAC_POWERDN (1 << 5) -#define VENC_OUT_SEL (1 << 6) -#define DIG_LPP_SHIFT 16 -#define VENC_DSS_CONFIG (VENC_CLK_ENABLE | \ - DAC_DEMEN | \ - DAC_POWERDN | \ - VENC_OUT_SEL) -/* - * Panel Configuration - */ -struct panel_config { - u32 timing_h; - u32 timing_v; - u32 pol_freq; - u32 divisor; - u32 lcd_size; - u32 panel_type; - u32 data_lines; - u32 load_mode; - u32 panel_color; -}; - -/* - * Generic DSS Functions - */ -void omap3_dss_venc_config(const struct venc_regs *venc_cfg, - u32 height, u32 width); -void omap3_dss_panel_config(const struct panel_config *panel_cfg); -void omap3_dss_enable(void); - -#endif /* DSS_H */ diff --git a/arch/arm/include/asm/arch-omap3/emif4.h b/arch/arm/include/asm/arch-omap3/emif4.h deleted file mode 100644 index 579da0c..0000000 --- a/arch/arm/include/asm/arch-omap3/emif4.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Auther: - * Vaibhav Hiremath <hvaibhav@ti.com> - * - * Copyright (C) 2010 - * Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _EMIF_H_ -#define _EMIF_H_ - -/* - * Configuration values - */ -#define EMIF4_TIM1_T_RP (0x3 << 25) -#define EMIF4_TIM1_T_RCD (0x3 << 21) -#define EMIF4_TIM1_T_WR (0x3 << 17) -#define EMIF4_TIM1_T_RAS (0x8 << 12) -#define EMIF4_TIM1_T_RC (0xA << 6) -#define EMIF4_TIM1_T_RRD (0x2 << 3) -#define EMIF4_TIM1_T_WTR (0x2) - -#define EMIF4_TIM2_T_XP (0x2 << 28) -#define EMIF4_TIM2_T_ODT (0x0 << 25) -#define EMIF4_TIM2_T_XSNR (0x1C << 16) -#define EMIF4_TIM2_T_XSRD (0xC8 << 6) -#define EMIF4_TIM2_T_RTP (0x1 << 3) -#define EMIF4_TIM2_T_CKE (0x2) - -#define EMIF4_TIM3_T_RFC (0x25 << 4) -#define EMIF4_TIM3_T_RAS_MAX (0x7) - -#define EMIF4_PWR_IDLE_MODE (0x2 << 30) -#define EMIF4_PWR_DPD_DIS (0x0 << 10) -#define EMIF4_PWR_DPD_EN (0x1 << 10) -#define EMIF4_PWR_LP_MODE (0x0 << 8) -#define EMIF4_PWR_PM_TIM (0x0) - -#define EMIF4_INITREF_DIS (0x0 << 31) -#define EMIF4_REFRESH_RATE (0x50F) - -#define EMIF4_CFG_SDRAM_TYP (0x2 << 29) -#define EMIF4_CFG_IBANK_POS (0x0 << 27) -#define EMIF4_CFG_DDR_TERM (0x0 << 24) -#define EMIF4_CFG_DDR2_DDQS (0x1 << 23) -#define EMIF4_CFG_DDR_DIS_DLL (0x0 << 20) -#define EMIF4_CFG_SDR_DRV (0x0 << 18) -#define EMIF4_CFG_NARROW_MD (0x0 << 14) -#define EMIF4_CFG_CL (0x5 << 10) -#define EMIF4_CFG_ROWSIZE (0x0 << 7) -#define EMIF4_CFG_IBANK (0x3 << 4) -#define EMIF4_CFG_EBANK (0x0 << 3) -#define EMIF4_CFG_PGSIZE (0x2) - -/* - * EMIF4 PHY Control 1 register configuration - */ -#define EMIF4_DDR1_EXT_STRB_EN (0x1 << 7) -#define EMIF4_DDR1_EXT_STRB_DIS (0x0 << 7) -#define EMIF4_DDR1_PWRDN_DIS (0x0 << 6) -#define EMIF4_DDR1_PWRDN_EN (0x1 << 6) -#define EMIF4_DDR1_READ_LAT (0x6 << 0) - -#endif /* endif _EMIF_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/gpio.h b/arch/arm/include/asm/arch-omap3/gpio.h deleted file mode 100644 index 30f633c..0000000 --- a/arch/arm/include/asm/arch-omap3/gpio.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * This work is derived from the linux 2.6.27 kernel source - * To fetch, use the kernel repository - * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git - * Use the v2.6.27 tag. - * - * Below is the original's header including its copyright - * - * linux/arch/arm/plat-omap/gpio.c - * - * Support functions for OMAP GPIO - * - * Copyright (C) 2003-2005 Nokia Corporation - * Written by Juha Yrjölä <juha.yrjola@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _GPIO_H -#define _GPIO_H - -#define OMAP24XX_GPIO_REVISION 0x0000 -#define OMAP24XX_GPIO_SYSCONFIG 0x0010 -#define OMAP24XX_GPIO_SYSSTATUS 0x0014 -#define OMAP24XX_GPIO_IRQSTATUS1 0x0018 -#define OMAP24XX_GPIO_IRQSTATUS2 0x0028 -#define OMAP24XX_GPIO_IRQENABLE2 0x002c -#define OMAP24XX_GPIO_IRQENABLE1 0x001c -#define OMAP24XX_GPIO_WAKE_EN 0x0020 -#define OMAP24XX_GPIO_CTRL 0x0030 -#define OMAP24XX_GPIO_OE 0x0034 -#define OMAP24XX_GPIO_DATAIN 0x0038 -#define OMAP24XX_GPIO_DATAOUT 0x003c -#define OMAP24XX_GPIO_LEVELDETECT0 0x0040 -#define OMAP24XX_GPIO_LEVELDETECT1 0x0044 -#define OMAP24XX_GPIO_RISINGDETECT 0x0048 -#define OMAP24XX_GPIO_FALLINGDETECT 0x004c -#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 -#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 -#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 -#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 -#define OMAP24XX_GPIO_CLEARWKUENA 0x0080 -#define OMAP24XX_GPIO_SETWKUENA 0x0084 -#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 -#define OMAP24XX_GPIO_SETDATAOUT 0x0094 - -struct gpio_bank { - void *base; - int method; -}; - -#define METHOD_GPIO_24XX 4 - -/* This is the interface */ - -/* Request a gpio before using it */ -int omap_request_gpio(int gpio); -/* Reset and free a gpio after using it */ -void omap_free_gpio(int gpio); -/* Sets the gpio as input or output */ -void omap_set_gpio_direction(int gpio, int is_input); -/* Set or clear a gpio output */ -void omap_set_gpio_dataout(int gpio, int enable); -/* Get the value of a gpio input */ -int omap_get_gpio_datain(int gpio); - -#endif /* _GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h deleted file mode 100644 index d2e7488..0000000 --- a/arch/arm/include/asm/arch-omap3/i2c.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * (C) Copyright 2004-2008 - * Texas Instruments, <www.ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP3_I2C_H_ -#define _OMAP3_I2C_H_ - -#define I2C_BUS_MAX 3 -#define I2C_DEFAULT_BASE I2C_BASE1 - -struct i2c { - unsigned short rev; /* 0x00 */ - unsigned short res1; - unsigned short ie; /* 0x04 */ - unsigned short res2; - unsigned short stat; /* 0x08 */ - unsigned short res3; - unsigned short iv; /* 0x0C */ - unsigned short res4; - unsigned short syss; /* 0x10 */ - unsigned short res4a; - unsigned short buf; /* 0x14 */ - unsigned short res5; - unsigned short cnt; /* 0x18 */ - unsigned short res6; - unsigned short data; /* 0x1C */ - unsigned short res7; - unsigned short sysc; /* 0x20 */ - unsigned short res8; - unsigned short con; /* 0x24 */ - unsigned short res9; - unsigned short oa; /* 0x28 */ - unsigned short res10; - unsigned short sa; /* 0x2C */ - unsigned short res11; - unsigned short psc; /* 0x30 */ - unsigned short res12; - unsigned short scll; /* 0x34 */ - unsigned short res13; - unsigned short sclh; /* 0x38 */ - unsigned short res14; - unsigned short systest; /* 0x3c */ - unsigned short res15; -}; - -#endif /* _OMAP3_I2C_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h deleted file mode 100644 index f165949..0000000 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ /dev/null @@ -1,329 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _MEM_H_ -#define _MEM_H_ - -#define CS0 0x0 -#define CS1 0x1 /* mirror CS1 regs appear offset 0x30 from CS0 */ - -#ifndef __ASSEMBLY__ -enum { - STACKED = 0, - IP_DDR = 1, - COMBO_DDR = 2, - IP_SDR = 3, -}; -#endif /* __ASSEMBLY__ */ - -#define EARLY_INIT 1 - -/* Slower full frequency range default timings for x32 operation*/ -#define SDRC_SHARING 0x00000100 -#define SDRC_MR_0_SDR 0x00000031 - -#define DLL_OFFSET 0 -#define DLL_WRITEDDRCLKX2DIS 1 -#define DLL_ENADLL 1 -#define DLL_LOCKDLL 0 -#define DLL_DLLPHASE_72 0 -#define DLL_DLLPHASE_90 1 - -/* rkw - need to find of 90/72 degree recommendation for speed like before */ -#define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \ - (DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1)) - -/* Infineon part of 3430SDP (165MHz optimized) 6.06ns - * ACTIMA - * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6 - * TDPL (Twr) = 15/6 = 2.5 -> 3 - * TRRD = 12/6 = 2 - * TRCD = 18/6 = 3 - * TRP = 18/6 = 3 - * TRAS = 42/6 = 7 - * TRC = 60/6 = 10 - * TRFC = 72/6 = 12 - * ACTIMB - * TCKE = 2 - * XSR = 120/6 = 20 - */ -#define INFINEON_TDAL_165 6 -#define INFINEON_TDPL_165 3 -#define INFINEON_TRRD_165 2 -#define INFINEON_TRCD_165 3 -#define INFINEON_TRP_165 3 -#define INFINEON_TRAS_165 7 -#define INFINEON_TRC_165 10 -#define INFINEON_TRFC_165 12 -#define INFINEON_V_ACTIMA_165 ((INFINEON_TRFC_165 << 27) | \ - (INFINEON_TRC_165 << 22) | (INFINEON_TRAS_165 << 18) | \ - (INFINEON_TRP_165 << 15) | (INFINEON_TRCD_165 << 12) | \ - (INFINEON_TRRD_165 << 9) | (INFINEON_TDPL_165 << 6) | \ - (INFINEON_TDAL_165)) - -#define INFINEON_TWTR_165 1 -#define INFINEON_TCKE_165 2 -#define INFINEON_TXP_165 2 -#define INFINEON_XSR_165 20 -#define INFINEON_V_ACTIMB_165 ((INFINEON_TCKE_165 << 12) | \ - (INFINEON_XSR_165 << 0) | (INFINEON_TXP_165 << 8) | \ - (INFINEON_TWTR_165 << 16)) - -/* Micron part of 3430 EVM (165MHz optimized) 6.06ns - * ACTIMA - * TDAL = Twr/Tck + Trp/tck= 15/6 + 18 /6 = 2.5 + 3 = 5.5 -> 6 - * TDPL (Twr) = 15/6 = 2.5 -> 3 - * TRRD = 12/6 = 2 - * TRCD = 18/6 = 3 - * TRP = 18/6 = 3 - * TRAS = 42/6 = 7 - * TRC = 60/6 = 10 - * TRFC = 125/6 = 21 - * ACTIMB - * TWTR = 1 - * TCKE = 1 - * TXSR = 138/6 = 23 - * TXP = 25/6 = 4.1 ~5 - */ -#define MICRON_TDAL_165 6 -#define MICRON_TDPL_165 3 -#define MICRON_TRRD_165 2 -#define MICRON_TRCD_165 3 -#define MICRON_TRP_165 3 -#define MICRON_TRAS_165 7 -#define MICRON_TRC_165 10 -#define MICRON_TRFC_165 21 -#define MICRON_V_ACTIMA_165 ((MICRON_TRFC_165 << 27) | \ - (MICRON_TRC_165 << 22) | (MICRON_TRAS_165 << 18) | \ - (MICRON_TRP_165 << 15) | (MICRON_TRCD_165 << 12) | \ - (MICRON_TRRD_165 << 9) | (MICRON_TDPL_165 << 6) | \ - (MICRON_TDAL_165)) - -#define MICRON_TWTR_165 1 -#define MICRON_TCKE_165 1 -#define MICRON_XSR_165 23 -#define MICRON_TXP_165 5 -#define MICRON_V_ACTIMB_165 ((MICRON_TCKE_165 << 12) | \ - (MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \ - (MICRON_TWTR_165 << 16)) - -/* - * NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns - * ACTIMA - * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6 - * TDPL (Twr) = 15/6 = 2.5 -> 3 - * TRRD = 12/6 = 2 - * TRCD = 22.5/6 = 3.75 -> 4 - * TRP = 18/6 = 3 - * TRAS = 42/6 = 7 - * TRC = 60/6 = 10 - * TRFC = 140/6 = 23.3 -> 24 - * ACTIMB - * TWTR = 2 - * TCKE = 2 - * TXSR = 200/6 = 33.3 -> 34 - * TXP = 1.0 + 1.1 = 2.1 -> 3 - */ -#define NUMONYX_TDAL_165 6 -#define NUMONYX_TDPL_165 3 -#define NUMONYX_TRRD_165 2 -#define NUMONYX_TRCD_165 4 -#define NUMONYX_TRP_165 3 -#define NUMONYX_TRAS_165 7 -#define NUMONYX_TRC_165 10 -#define NUMONYX_TRFC_165 24 -#define NUMONYX_V_ACTIMA_165 ((NUMONYX_TRFC_165 << 27) | \ - (NUMONYX_TRC_165 << 22) | (NUMONYX_TRAS_165 << 18) | \ - (NUMONYX_TRP_165 << 15) | (NUMONYX_TRCD_165 << 12) | \ - (NUMONYX_TRRD_165 << 9) | (NUMONYX_TDPL_165 << 6) | \ - (NUMONYX_TDAL_165)) - -#define NUMONYX_TWTR_165 2 -#define NUMONYX_TCKE_165 2 -#define NUMONYX_TXP_165 3 -#define NUMONYX_XSR_165 34 -#define NUMONYX_V_ACTIMB_165 ((NUMONYX_TCKE_165 << 12) | \ - (NUMONYX_XSR_165 << 0) | (NUMONYX_TXP_165 << 8) | \ - (NUMONYX_TWTR_165 << 16)) - -#ifdef CONFIG_OMAP3_INFINEON_DDR -#define V_ACTIMA_165 INFINEON_V_ACTIMA_165 -#define V_ACTIMB_165 INFINEON_V_ACTIMB_165 -#endif -#ifdef CONFIG_OMAP3_MICRON_DDR -#define V_ACTIMA_165 MICRON_V_ACTIMA_165 -#define V_ACTIMB_165 MICRON_V_ACTIMB_165 -#endif -#ifdef CONFIG_OMAP3_NUMONYX_DDR -#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165 -#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165 -#endif - -#if !defined(V_ACTIMA_165) || !defined(V_ACTIMB_165) -#error "Please choose the right DDR type in config header" -#endif - -/* - * GPMC settings - - * Definitions is as per the following format - * #define <PART>_GPMC_CONFIG<x> <value> - * Where: - * PART is the part name e.g. STNOR - Intel Strata Flash - * x is GPMC config registers from 1 to 6 (there will be 6 macros) - * Value is corresponding value - * - * For every valid PRCM configuration there should be only one definition of - * the same. if values are independent of the board, this definition will be - * present in this file if values are dependent on the board, then this should - * go into corresponding mem-boardName.h file - * - * Currently valid part Names are (PART): - * STNOR - Intel Strata Flash - * SMNAND - Samsung NAND - * MPDB - H4 MPDB board - * SBNOR - Sibley NOR - * MNAND - Micron Large page x16 NAND - * ONNAND - Samsung One NAND - * - * include/configs/file.h contains the defn - for all CS we are interested - * #define OMAP34XX_GPMC_CSx PART - * #define OMAP34XX_GPMC_CSx_SIZE Size - * #define OMAP34XX_GPMC_CSx_MAP Map - * Where: - * x - CS number - * PART - Part Name as defined above - * SIZE - how big is the mapping to be - * GPMC_SIZE_128M - 0x8 - * GPMC_SIZE_64M - 0xC - * GPMC_SIZE_32M - 0xE - * GPMC_SIZE_16M - 0xF - * MAP - Map this CS to which address(GPMC address space)- Absolute address - * >>24 before being used. - */ -#define GPMC_SIZE_128M 0x8 -#define GPMC_SIZE_64M 0xC -#define GPMC_SIZE_32M 0xE -#define GPMC_SIZE_16M 0xF - -#define SMNAND_GPMC_CONFIG1 0x00000800 -#define SMNAND_GPMC_CONFIG2 0x00141400 -#define SMNAND_GPMC_CONFIG3 0x00141400 -#define SMNAND_GPMC_CONFIG4 0x0F010F01 -#define SMNAND_GPMC_CONFIG5 0x010C1414 -#define SMNAND_GPMC_CONFIG6 0x1F0F0A80 -#define SMNAND_GPMC_CONFIG7 0x00000C44 - -#define M_NAND_GPMC_CONFIG1 0x00001800 -#define M_NAND_GPMC_CONFIG2 0x00141400 -#define M_NAND_GPMC_CONFIG3 0x00141400 -#define M_NAND_GPMC_CONFIG4 0x0F010F01 -#define M_NAND_GPMC_CONFIG5 0x010C1414 -#define M_NAND_GPMC_CONFIG6 0x1f0f0A80 -#define M_NAND_GPMC_CONFIG7 0x00000C44 - -#define STNOR_GPMC_CONFIG1 0x3 -#define STNOR_GPMC_CONFIG2 0x00151501 -#define STNOR_GPMC_CONFIG3 0x00060602 -#define STNOR_GPMC_CONFIG4 0x11091109 -#define STNOR_GPMC_CONFIG5 0x01141F1F -#define STNOR_GPMC_CONFIG6 0x000004c4 - -#define SIBNOR_GPMC_CONFIG1 0x1200 -#define SIBNOR_GPMC_CONFIG2 0x001f1f00 -#define SIBNOR_GPMC_CONFIG3 0x00080802 -#define SIBNOR_GPMC_CONFIG4 0x1C091C09 -#define SIBNOR_GPMC_CONFIG5 0x01131F1F -#define SIBNOR_GPMC_CONFIG6 0x1F0F03C2 - -#define SDPV2_MPDB_GPMC_CONFIG1 0x00611200 -#define SDPV2_MPDB_GPMC_CONFIG2 0x001F1F01 -#define SDPV2_MPDB_GPMC_CONFIG3 0x00080803 -#define SDPV2_MPDB_GPMC_CONFIG4 0x1D091D09 -#define SDPV2_MPDB_GPMC_CONFIG5 0x041D1F1F -#define SDPV2_MPDB_GPMC_CONFIG6 0x1D0904C4 - -#define MPDB_GPMC_CONFIG1 0x00011000 -#define MPDB_GPMC_CONFIG2 0x001f1f01 -#define MPDB_GPMC_CONFIG3 0x00080803 -#define MPDB_GPMC_CONFIG4 0x1c0b1c0a -#define MPDB_GPMC_CONFIG5 0x041f1F1F -#define MPDB_GPMC_CONFIG6 0x1F0F04C4 - -#define P2_GPMC_CONFIG1 0x0 -#define P2_GPMC_CONFIG2 0x0 -#define P2_GPMC_CONFIG3 0x0 -#define P2_GPMC_CONFIG4 0x0 -#define P2_GPMC_CONFIG5 0x0 -#define P2_GPMC_CONFIG6 0x0 - -#define ONENAND_GPMC_CONFIG1 0x00001200 -#define ONENAND_GPMC_CONFIG2 0x000F0F01 -#define ONENAND_GPMC_CONFIG3 0x00030301 -#define ONENAND_GPMC_CONFIG4 0x0F040F04 -#define ONENAND_GPMC_CONFIG5 0x010F1010 -#define ONENAND_GPMC_CONFIG6 0x1F060000 - -#define NET_GPMC_CONFIG1 0x00001000 -#define NET_GPMC_CONFIG2 0x001e1e01 -#define NET_GPMC_CONFIG3 0x00080300 -#define NET_GPMC_CONFIG4 0x1c091c09 -#define NET_GPMC_CONFIG5 0x04181f1f -#define NET_GPMC_CONFIG6 0x00000FCF -#define NET_GPMC_CONFIG7 0x00000f6c - -/* max number of GPMC Chip Selects */ -#define GPMC_MAX_CS 8 -/* max number of GPMC regs */ -#define GPMC_MAX_REG 7 - -#define PISMO1_NOR 1 -#define PISMO1_NAND 2 -#define PISMO2_CS0 3 -#define PISMO2_CS1 4 -#define PISMO1_ONENAND 5 -#define DBG_MPDB 6 -#define PISMO2_NAND_CS0 7 -#define PISMO2_NAND_CS1 8 - -/* make it readable for the gpmc_init */ -#define PISMO1_NOR_BASE FLASH_BASE -#define PISMO1_NAND_BASE NAND_BASE -#define PISMO2_CS0_BASE PISMO2_MAP1 -#define PISMO1_ONEN_BASE ONENAND_MAP -#define DBG_MPDB_BASE DEBUG_BASE - -#ifndef __ASSEMBLY__ - -/* Function prototypes */ -void mem_init(void); - -u32 is_mem_sdr(void); -u32 mem_ok(u32 cs); - -u32 get_sdr_cs_size(u32); -u32 get_sdr_cs_offset(u32); - -#endif /* __ASSEMBLY__ */ - -#endif /* endif _MEM_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h deleted file mode 100644 index ba1c2ff..0000000 --- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h +++ /dev/null @@ -1,203 +0,0 @@ -/* - * (C) Copyright 2008 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation's version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef MMC_HOST_DEF_H -#define MMC_HOST_DEF_H - -/* T2 Register definitions */ -#define T2_BASE 0x48002000 - -typedef struct t2 { - unsigned char res1[0x274]; /* 0x000 */ - unsigned int devconf0; /* 0x274 */ - unsigned char res2[0x060]; /* 0x278 */ - unsigned int devconf1; /* 0x2D8 */ - unsigned char res3[0x244]; /* 0x2DC */ - unsigned int pbias_lite; /* 0x520 */ -} t2_t; - -#define MMCSDIO1ADPCLKISEL (1 << 24) -#define MMCSDIO2ADPCLKISEL (1 << 6) - -#define EN_MMC1 (1 << 24) -#define EN_MMC2 (1 << 25) -#define EN_MMC3 (1 << 30) - -#define PBIASLITEPWRDNZ0 (1 << 1) -#define PBIASSPEEDCTRL0 (1 << 2) -#define PBIASLITEPWRDNZ1 (1 << 9) - -/* - * OMAP HSMMC register definitions - */ -#define OMAP_HSMMC1_BASE 0x4809C000 -#define OMAP_HSMMC2_BASE 0x480B4000 -#define OMAP_HSMMC3_BASE 0x480AD000 - -typedef struct hsmmc { - unsigned char res1[0x10]; - unsigned int sysconfig; /* 0x10 */ - unsigned int sysstatus; /* 0x14 */ - unsigned char res2[0x14]; - unsigned int con; /* 0x2C */ - unsigned char res3[0xD4]; - unsigned int blk; /* 0x104 */ - unsigned int arg; /* 0x108 */ - unsigned int cmd; /* 0x10C */ - unsigned int rsp10; /* 0x110 */ - unsigned int rsp32; /* 0x114 */ - unsigned int rsp54; /* 0x118 */ - unsigned int rsp76; /* 0x11C */ - unsigned int data; /* 0x120 */ - unsigned int pstate; /* 0x124 */ - unsigned int hctl; /* 0x128 */ - unsigned int sysctl; /* 0x12C */ - unsigned int stat; /* 0x130 */ - unsigned int ie; /* 0x134 */ - unsigned char res4[0x8]; - unsigned int capa; /* 0x140 */ -} hsmmc_t; - -/* - * OMAP HS MMC Bit definitions - */ -#define MMC_SOFTRESET (0x1 << 1) -#define RESETDONE (0x1 << 0) -#define NOOPENDRAIN (0x0 << 0) -#define OPENDRAIN (0x1 << 0) -#define OD (0x1 << 0) -#define INIT_NOINIT (0x0 << 1) -#define INIT_INITSTREAM (0x1 << 1) -#define HR_NOHOSTRESP (0x0 << 2) -#define STR_BLOCK (0x0 << 3) -#define MODE_FUNC (0x0 << 4) -#define DW8_1_4BITMODE (0x0 << 5) -#define MIT_CTO (0x0 << 6) -#define CDP_ACTIVEHIGH (0x0 << 7) -#define WPP_ACTIVEHIGH (0x0 << 8) -#define RESERVED_MASK (0x3 << 9) -#define CTPL_MMC_SD (0x0 << 11) -#define BLEN_512BYTESLEN (0x200 << 0) -#define NBLK_STPCNT (0x0 << 16) -#define DE_DISABLE (0x0 << 0) -#define BCE_DISABLE (0x0 << 1) -#define BCE_ENABLE (0x1 << 1) -#define ACEN_DISABLE (0x0 << 2) -#define DDIR_OFFSET (4) -#define DDIR_MASK (0x1 << 4) -#define DDIR_WRITE (0x0 << 4) -#define DDIR_READ (0x1 << 4) -#define MSBS_SGLEBLK (0x0 << 5) -#define MSBS_MULTIBLK (0x1 << 5) -#define RSP_TYPE_OFFSET (16) -#define RSP_TYPE_MASK (0x3 << 16) -#define RSP_TYPE_NORSP (0x0 << 16) -#define RSP_TYPE_LGHT136 (0x1 << 16) -#define RSP_TYPE_LGHT48 (0x2 << 16) -#define RSP_TYPE_LGHT48B (0x3 << 16) -#define CCCE_NOCHECK (0x0 << 19) -#define CCCE_CHECK (0x1 << 19) -#define CICE_NOCHECK (0x0 << 20) -#define CICE_CHECK (0x1 << 20) -#define DP_OFFSET (21) -#define DP_MASK (0x1 << 21) -#define DP_NO_DATA (0x0 << 21) -#define DP_DATA (0x1 << 21) -#define CMD_TYPE_NORMAL (0x0 << 22) -#define INDEX_OFFSET (24) -#define INDEX_MASK (0x3f << 24) -#define INDEX(i) (i << 24) -#define DATI_MASK (0x1 << 1) -#define DATI_CMDDIS (0x1 << 1) -#define DTW_1_BITMODE (0x0 << 1) -#define DTW_4_BITMODE (0x1 << 1) -#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ -#define SDBP_PWROFF (0x0 << 8) -#define SDBP_PWRON (0x1 << 8) -#define SDVS_1V8 (0x5 << 9) -#define SDVS_3V0 (0x6 << 9) -#define ICE_MASK (0x1 << 0) -#define ICE_STOP (0x0 << 0) -#define ICS_MASK (0x1 << 1) -#define ICS_NOTREADY (0x0 << 1) -#define ICE_OSCILLATE (0x1 << 0) -#define CEN_MASK (0x1 << 2) -#define CEN_DISABLE (0x0 << 2) -#define CEN_ENABLE (0x1 << 2) -#define CLKD_OFFSET (6) -#define CLKD_MASK (0x3FF << 6) -#define DTO_MASK (0xF << 16) -#define DTO_15THDTO (0xE << 16) -#define SOFTRESETALL (0x1 << 24) -#define CC_MASK (0x1 << 0) -#define TC_MASK (0x1 << 1) -#define BWR_MASK (0x1 << 4) -#define BRR_MASK (0x1 << 5) -#define ERRI_MASK (0x1 << 15) -#define IE_CC (0x01 << 0) -#define IE_TC (0x01 << 1) -#define IE_BWR (0x01 << 4) -#define IE_BRR (0x01 << 5) -#define IE_CTO (0x01 << 16) -#define IE_CCRC (0x01 << 17) -#define IE_CEB (0x01 << 18) -#define IE_CIE (0x01 << 19) -#define IE_DTO (0x01 << 20) -#define IE_DCRC (0x01 << 21) -#define IE_DEB (0x01 << 22) -#define IE_CERR (0x01 << 28) -#define IE_BADA (0x01 << 29) - -#define VS30_3V0SUP (1 << 25) -#define VS18_1V8SUP (1 << 26) - -/* Driver definitions */ -#define MMCSD_SECTOR_SIZE 512 -#define MMC_CARD 0 -#define SD_CARD 1 -#define BYTE_MODE 0 -#define SECTOR_MODE 1 -#define CLK_INITSEQ 0 -#define CLK_400KHZ 1 -#define CLK_MISC 2 - -typedef struct { - unsigned int card_type; - unsigned int version; - unsigned int mode; - unsigned int size; - unsigned int RCA; -} mmc_card_data; -#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) -#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) - -/* Clock Configurations and Macros */ -#define MMC_CLOCK_REFERENCE 96 /* MHz */ - -#define mmc_reg_out(addr, mask, val)\ - writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) - -int omap_mmc_init(int dev_index); - -#endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap3/mux.h b/arch/arm/include/asm/arch-omap3/mux.h deleted file mode 100644 index 0c01c73..0000000 --- a/arch/arm/include/asm/arch-omap3/mux.h +++ /dev/null @@ -1,412 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <x0khasim@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _MUX_H_ -#define _MUX_H_ - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - */ - -#define IEN (1 << 8) - -#define IDIS (0 << 8) -#define PTU (1 << 4) -#define PTD (0 << 4) -#define EN (1 << 3) -#define DIS (0 << 3) - -#define M0 0 -#define M1 1 -#define M2 2 -#define M3 3 -#define M4 4 -#define M5 5 -#define M6 6 -#define M7 7 - -/* - * To get the actual address the offset has to added - * with OMAP34XX_CTRL_BASE to get the actual address - */ - -/*SDRC*/ -#define CONTROL_PADCONF_SDRC_D0 0x0030 -#define CONTROL_PADCONF_SDRC_D1 0x0032 -#define CONTROL_PADCONF_SDRC_D2 0x0034 -#define CONTROL_PADCONF_SDRC_D3 0x0036 -#define CONTROL_PADCONF_SDRC_D4 0x0038 -#define CONTROL_PADCONF_SDRC_D5 0x003A -#define CONTROL_PADCONF_SDRC_D6 0x003C -#define CONTROL_PADCONF_SDRC_D7 0x003E -#define CONTROL_PADCONF_SDRC_D8 0x0040 -#define CONTROL_PADCONF_SDRC_D9 0x0042 -#define CONTROL_PADCONF_SDRC_D10 0x0044 -#define CONTROL_PADCONF_SDRC_D11 0x0046 -#define CONTROL_PADCONF_SDRC_D12 0x0048 -#define CONTROL_PADCONF_SDRC_D13 0x004A -#define CONTROL_PADCONF_SDRC_D14 0x004C -#define CONTROL_PADCONF_SDRC_D15 0x004E -#define CONTROL_PADCONF_SDRC_D16 0x0050 -#define CONTROL_PADCONF_SDRC_D17 0x0052 -#define CONTROL_PADCONF_SDRC_D18 0x0054 -#define CONTROL_PADCONF_SDRC_D19 0x0056 -#define CONTROL_PADCONF_SDRC_D20 0x0058 -#define CONTROL_PADCONF_SDRC_D21 0x005A -#define CONTROL_PADCONF_SDRC_D22 0x005C -#define CONTROL_PADCONF_SDRC_D23 0x005E -#define CONTROL_PADCONF_SDRC_D24 0x0060 -#define CONTROL_PADCONF_SDRC_D25 0x0062 -#define CONTROL_PADCONF_SDRC_D26 0x0064 -#define CONTROL_PADCONF_SDRC_D27 0x0066 -#define CONTROL_PADCONF_SDRC_D28 0x0068 -#define CONTROL_PADCONF_SDRC_D29 0x006A -#define CONTROL_PADCONF_SDRC_D30 0x006C -#define CONTROL_PADCONF_SDRC_D31 0x006E -#define CONTROL_PADCONF_SDRC_CLK 0x0070 -#define CONTROL_PADCONF_SDRC_DQS0 0x0072 -#define CONTROL_PADCONF_SDRC_DQS1 0x0074 -#define CONTROL_PADCONF_SDRC_DQS2 0x0076 -#define CONTROL_PADCONF_SDRC_DQS3 0x0078 -/*GPMC*/ -#define CONTROL_PADCONF_GPMC_A1 0x007A -#define CONTROL_PADCONF_GPMC_A2 0x007C -#define CONTROL_PADCONF_GPMC_A3 0x007E -#define CONTROL_PADCONF_GPMC_A4 0x0080 -#define CONTROL_PADCONF_GPMC_A5 0x0082 -#define CONTROL_PADCONF_GPMC_A6 0x0084 -#define CONTROL_PADCONF_GPMC_A7 0x0086 -#define CONTROL_PADCONF_GPMC_A8 0x0088 -#define CONTROL_PADCONF_GPMC_A9 0x008A -#define CONTROL_PADCONF_GPMC_A10 0x008C -#define CONTROL_PADCONF_GPMC_D0 0x008E -#define CONTROL_PADCONF_GPMC_D1 0x0090 -#define CONTROL_PADCONF_GPMC_D2 0x0092 -#define CONTROL_PADCONF_GPMC_D3 0x0094 -#define CONTROL_PADCONF_GPMC_D4 0x0096 -#define CONTROL_PADCONF_GPMC_D5 0x0098 -#define CONTROL_PADCONF_GPMC_D6 0x009A -#define CONTROL_PADCONF_GPMC_D7 0x009C -#define CONTROL_PADCONF_GPMC_D8 0x009E -#define CONTROL_PADCONF_GPMC_D9 0x00A0 -#define CONTROL_PADCONF_GPMC_D10 0x00A2 -#define CONTROL_PADCONF_GPMC_D11 0x00A4 -#define CONTROL_PADCONF_GPMC_D12 0x00A6 -#define CONTROL_PADCONF_GPMC_D13 0x00A8 -#define CONTROL_PADCONF_GPMC_D14 0x00AA -#define CONTROL_PADCONF_GPMC_D15 0x00AC -#define CONTROL_PADCONF_GPMC_NCS0 0x00AE -#define CONTROL_PADCONF_GPMC_NCS1 0x00B0 -#define CONTROL_PADCONF_GPMC_NCS2 0x00B2 -#define CONTROL_PADCONF_GPMC_NCS3 0x00B4 -#define CONTROL_PADCONF_GPMC_NCS4 0x00B6 -#define CONTROL_PADCONF_GPMC_NCS5 0x00B8 -#define CONTROL_PADCONF_GPMC_NCS6 0x00BA -#define CONTROL_PADCONF_GPMC_NCS7 0x00BC -#define CONTROL_PADCONF_GPMC_CLK 0x00BE -#define CONTROL_PADCONF_GPMC_NADV_ALE 0x00C0 -#define CONTROL_PADCONF_GPMC_NOE 0x00C2 -#define CONTROL_PADCONF_GPMC_NWE 0x00C4 -#define CONTROL_PADCONF_GPMC_NBE0_CLE 0x00C6 -#define CONTROL_PADCONF_GPMC_NBE1 0x00C8 -#define CONTROL_PADCONF_GPMC_NWP 0x00CA -#define CONTROL_PADCONF_GPMC_WAIT0 0x00CC -#define CONTROL_PADCONF_GPMC_WAIT1 0x00CE -#define CONTROL_PADCONF_GPMC_WAIT2 0x00D0 -#define CONTROL_PADCONF_GPMC_WAIT3 0x00D2 -/*DSS*/ -#define CONTROL_PADCONF_DSS_PCLK 0x00D4 -#define CONTROL_PADCONF_DSS_HSYNC 0x00D6 -#define CONTROL_PADCONF_DSS_VSYNC 0x00D8 -#define CONTROL_PADCONF_DSS_ACBIAS 0x00DA -#define CONTROL_PADCONF_DSS_DATA0 0x00DC -#define CONTROL_PADCONF_DSS_DATA1 0x00DE -#define CONTROL_PADCONF_DSS_DATA2 0x00E0 -#define CONTROL_PADCONF_DSS_DATA3 0x00E2 -#define CONTROL_PADCONF_DSS_DATA4 0x00E4 -#define CONTROL_PADCONF_DSS_DATA5 0x00E6 -#define CONTROL_PADCONF_DSS_DATA6 0x00E8 -#define CONTROL_PADCONF_DSS_DATA7 0x00EA -#define CONTROL_PADCONF_DSS_DATA8 0x00EC -#define CONTROL_PADCONF_DSS_DATA9 0x00EE -#define CONTROL_PADCONF_DSS_DATA10 0x00F0 -#define CONTROL_PADCONF_DSS_DATA11 0x00F2 -#define CONTROL_PADCONF_DSS_DATA12 0x00F4 -#define CONTROL_PADCONF_DSS_DATA13 0x00F6 -#define CONTROL_PADCONF_DSS_DATA14 0x00F8 -#define CONTROL_PADCONF_DSS_DATA15 0x00FA -#define CONTROL_PADCONF_DSS_DATA16 0x00FC -#define CONTROL_PADCONF_DSS_DATA17 0x00FE -#define CONTROL_PADCONF_DSS_DATA18 0x0100 -#define CONTROL_PADCONF_DSS_DATA19 0x0102 -#define CONTROL_PADCONF_DSS_DATA20 0x0104 -#define CONTROL_PADCONF_DSS_DATA21 0x0106 -#define CONTROL_PADCONF_DSS_DATA22 0x0108 -#define CONTROL_PADCONF_DSS_DATA23 0x010A -/*CAMERA*/ -#define CONTROL_PADCONF_CAM_HS 0x010C -#define CONTROL_PADCONF_CAM_VS 0x010E -#define CONTROL_PADCONF_CAM_XCLKA 0x0110 -#define CONTROL_PADCONF_CAM_PCLK 0x0112 -#define CONTROL_PADCONF_CAM_FLD 0x0114 -#define CONTROL_PADCONF_CAM_D0 0x0116 -#define CONTROL_PADCONF_CAM_D1 0x0118 -#define CONTROL_PADCONF_CAM_D2 0x011A -#define CONTROL_PADCONF_CAM_D3 0x011C -#define CONTROL_PADCONF_CAM_D4 0x011E -#define CONTROL_PADCONF_CAM_D5 0x0120 -#define CONTROL_PADCONF_CAM_D6 0x0122 -#define CONTROL_PADCONF_CAM_D7 0x0124 -#define CONTROL_PADCONF_CAM_D8 0x0126 -#define CONTROL_PADCONF_CAM_D9 0x0128 -#define CONTROL_PADCONF_CAM_D10 0x012A -#define CONTROL_PADCONF_CAM_D11 0x012C -#define CONTROL_PADCONF_CAM_XCLKB 0x012E -#define CONTROL_PADCONF_CAM_WEN 0x0130 -#define CONTROL_PADCONF_CAM_STROBE 0x0132 -#define CONTROL_PADCONF_CSI2_DX0 0x0134 -#define CONTROL_PADCONF_CSI2_DY0 0x0136 -#define CONTROL_PADCONF_CSI2_DX1 0x0138 -#define CONTROL_PADCONF_CSI2_DY1 0x013A -/*Audio Interface */ -#define CONTROL_PADCONF_MCBSP2_FSX 0x013C -#define CONTROL_PADCONF_MCBSP2_CLKX 0x013E -#define CONTROL_PADCONF_MCBSP2_DR 0x0140 -#define CONTROL_PADCONF_MCBSP2_DX 0x0142 -#define CONTROL_PADCONF_MMC1_CLK 0x0144 -#define CONTROL_PADCONF_MMC1_CMD 0x0146 -#define CONTROL_PADCONF_MMC1_DAT0 0x0148 -#define CONTROL_PADCONF_MMC1_DAT1 0x014A -#define CONTROL_PADCONF_MMC1_DAT2 0x014C -#define CONTROL_PADCONF_MMC1_DAT3 0x014E -#define CONTROL_PADCONF_MMC1_DAT4 0x0150 -#define CONTROL_PADCONF_MMC1_DAT5 0x0152 -#define CONTROL_PADCONF_MMC1_DAT6 0x0154 -#define CONTROL_PADCONF_MMC1_DAT7 0x0156 -/*Wireless LAN */ -#define CONTROL_PADCONF_MMC2_CLK 0x0158 -#define CONTROL_PADCONF_MMC2_CMD 0x015A -#define CONTROL_PADCONF_MMC2_DAT0 0x015C -#define CONTROL_PADCONF_MMC2_DAT1 0x015E -#define CONTROL_PADCONF_MMC2_DAT2 0x0160 -#define CONTROL_PADCONF_MMC2_DAT3 0x0162 -#define CONTROL_PADCONF_MMC2_DAT4 0x0164 -#define CONTROL_PADCONF_MMC2_DAT5 0x0166 -#define CONTROL_PADCONF_MMC2_DAT6 0x0168 -#define CONTROL_PADCONF_MMC2_DAT7 0x016A -/*Bluetooth*/ -#define CONTROL_PADCONF_MCBSP3_DX 0x016C -#define CONTROL_PADCONF_MCBSP3_DR 0x016E -#define CONTROL_PADCONF_MCBSP3_CLKX 0x0170 -#define CONTROL_PADCONF_MCBSP3_FSX 0x0172 -#define CONTROL_PADCONF_UART2_CTS 0x0174 -#define CONTROL_PADCONF_UART2_RTS 0x0176 -#define CONTROL_PADCONF_UART2_TX 0x0178 -#define CONTROL_PADCONF_UART2_RX 0x017A -/*Modem Interface */ -#define CONTROL_PADCONF_UART1_TX 0x017C -#define CONTROL_PADCONF_UART1_RTS 0x017E -#define CONTROL_PADCONF_UART1_CTS 0x0180 -#define CONTROL_PADCONF_UART1_RX 0x0182 -#define CONTROL_PADCONF_MCBSP4_CLKX 0x0184 -#define CONTROL_PADCONF_MCBSP4_DR 0x0186 -#define CONTROL_PADCONF_MCBSP4_DX 0x0188 -#define CONTROL_PADCONF_MCBSP4_FSX 0x018A -#define CONTROL_PADCONF_MCBSP1_CLKR 0x018C -#define CONTROL_PADCONF_MCBSP1_FSR 0x018E -#define CONTROL_PADCONF_MCBSP1_DX 0x0190 -#define CONTROL_PADCONF_MCBSP1_DR 0x0192 -#define CONTROL_PADCONF_MCBSP_CLKS 0x0194 -#define CONTROL_PADCONF_MCBSP1_FSX 0x0196 -#define CONTROL_PADCONF_MCBSP1_CLKX 0x0198 -/*Serial Interface*/ -#define CONTROL_PADCONF_UART3_CTS_RCTX 0x019A -#define CONTROL_PADCONF_UART3_RTS_SD 0x019C -#define CONTROL_PADCONF_UART3_RX_IRRX 0x019E -#define CONTROL_PADCONF_UART3_TX_IRTX 0x01A0 -#define CONTROL_PADCONF_HSUSB0_CLK 0x01A2 -#define CONTROL_PADCONF_HSUSB0_STP 0x01A4 -#define CONTROL_PADCONF_HSUSB0_DIR 0x01A6 -#define CONTROL_PADCONF_HSUSB0_NXT 0x01A8 -#define CONTROL_PADCONF_HSUSB0_DATA0 0x01AA -#define CONTROL_PADCONF_HSUSB0_DATA1 0x01AC -#define CONTROL_PADCONF_HSUSB0_DATA2 0x01AE -#define CONTROL_PADCONF_HSUSB0_DATA3 0x01B0 -#define CONTROL_PADCONF_HSUSB0_DATA4 0x01B2 -#define CONTROL_PADCONF_HSUSB0_DATA5 0x01B4 -#define CONTROL_PADCONF_HSUSB0_DATA6 0x01B6 -#define CONTROL_PADCONF_HSUSB0_DATA7 0x01B8 -#define CONTROL_PADCONF_I2C1_SCL 0x01BA -#define CONTROL_PADCONF_I2C1_SDA 0x01BC -#define CONTROL_PADCONF_I2C2_SCL 0x01BE -#define CONTROL_PADCONF_I2C2_SDA 0x01C0 -#define CONTROL_PADCONF_I2C3_SCL 0x01C2 -#define CONTROL_PADCONF_I2C3_SDA 0x01C4 -#define CONTROL_PADCONF_I2C4_SCL 0x0A00 -#define CONTROL_PADCONF_I2C4_SDA 0x0A02 -#define CONTROL_PADCONF_HDQ_SIO 0x01C6 -#define CONTROL_PADCONF_MCSPI1_CLK 0x01C8 -#define CONTROL_PADCONF_MCSPI1_SIMO 0x01CA -#define CONTROL_PADCONF_MCSPI1_SOMI 0x01CC -#define CONTROL_PADCONF_MCSPI1_CS0 0x01CE -#define CONTROL_PADCONF_MCSPI1_CS1 0x01D0 -#define CONTROL_PADCONF_MCSPI1_CS2 0x01D2 -#define CONTROL_PADCONF_MCSPI1_CS3 0x01D4 -#define CONTROL_PADCONF_MCSPI2_CLK 0x01D6 -#define CONTROL_PADCONF_MCSPI2_SIMO 0x01D8 -#define CONTROL_PADCONF_MCSPI2_SOMI 0x01DA -#define CONTROL_PADCONF_MCSPI2_CS0 0x01DC -#define CONTROL_PADCONF_MCSPI2_CS1 0x01DE -/*Control and debug */ -#define CONTROL_PADCONF_SYS_32K 0x0A04 -#define CONTROL_PADCONF_SYS_CLKREQ 0x0A06 -#define CONTROL_PADCONF_SYS_NIRQ 0x01E0 -#define CONTROL_PADCONF_SYS_BOOT0 0x0A0A -#define CONTROL_PADCONF_SYS_BOOT1 0x0A0C -#define CONTROL_PADCONF_SYS_BOOT2 0x0A0E -#define CONTROL_PADCONF_SYS_BOOT3 0x0A10 -#define CONTROL_PADCONF_SYS_BOOT4 0x0A12 -#define CONTROL_PADCONF_SYS_BOOT5 0x0A14 -#define CONTROL_PADCONF_SYS_BOOT6 0x0A16 -#define CONTROL_PADCONF_SYS_OFF_MODE 0x0A18 -#define CONTROL_PADCONF_SYS_CLKOUT1 0x0A1A -#define CONTROL_PADCONF_SYS_CLKOUT2 0x01E2 -#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C -#define CONTROL_PADCONF_JTAG_TCK 0x0A1E -#define CONTROL_PADCONF_JTAG_TMS 0x0A20 -#define CONTROL_PADCONF_JTAG_TDI 0x0A22 -#define CONTROL_PADCONF_JTAG_EMU0 0x0A24 -#define CONTROL_PADCONF_JTAG_EMU1 0x0A26 -#define CONTROL_PADCONF_ETK_CLK 0x0A28 -#define CONTROL_PADCONF_ETK_CTL 0x0A2A -#define CONTROL_PADCONF_ETK_D0 0x0A2C -#define CONTROL_PADCONF_ETK_D1 0x0A2E -#define CONTROL_PADCONF_ETK_D2 0x0A30 -#define CONTROL_PADCONF_ETK_D3 0x0A32 -#define CONTROL_PADCONF_ETK_D4 0x0A34 -#define CONTROL_PADCONF_ETK_D5 0x0A36 -#define CONTROL_PADCONF_ETK_D6 0x0A38 -#define CONTROL_PADCONF_ETK_D7 0x0A3A -#define CONTROL_PADCONF_ETK_D8 0x0A3C -#define CONTROL_PADCONF_ETK_D9 0x0A3E -#define CONTROL_PADCONF_ETK_D10 0x0A40 -#define CONTROL_PADCONF_ETK_D11 0x0A42 -#define CONTROL_PADCONF_ETK_D12 0x0A44 -#define CONTROL_PADCONF_ETK_D13 0x0A46 -#define CONTROL_PADCONF_ETK_D14 0x0A48 -#define CONTROL_PADCONF_ETK_D15 0x0A4A -#define CONTROL_PADCONF_ETK_CLK_ES2 0x05D8 -#define CONTROL_PADCONF_ETK_CTL_ES2 0x05DA -#define CONTROL_PADCONF_ETK_D0_ES2 0x05DC -#define CONTROL_PADCONF_ETK_D1_ES2 0x05DE -#define CONTROL_PADCONF_ETK_D2_ES2 0x05E0 -#define CONTROL_PADCONF_ETK_D3_ES2 0x05E2 -#define CONTROL_PADCONF_ETK_D4_ES2 0x05E4 -#define CONTROL_PADCONF_ETK_D5_ES2 0x05E6 -#define CONTROL_PADCONF_ETK_D6_ES2 0x05E8 -#define CONTROL_PADCONF_ETK_D7_ES2 0x05EA -#define CONTROL_PADCONF_ETK_D8_ES2 0x05EC -#define CONTROL_PADCONF_ETK_D9_ES2 0x05EE -#define CONTROL_PADCONF_ETK_D10_ES2 0x05F0 -#define CONTROL_PADCONF_ETK_D11_ES2 0x05F2 -#define CONTROL_PADCONF_ETK_D12_ES2 0x05F4 -#define CONTROL_PADCONF_ETK_D13_ES2 0x05F6 -#define CONTROL_PADCONF_ETK_D14_ES2 0x05F8 -#define CONTROL_PADCONF_ETK_D15_ES2 0x05FA -/*Die to Die */ -#define CONTROL_PADCONF_D2D_MCAD0 0x01E4 -#define CONTROL_PADCONF_D2D_MCAD1 0x01E6 -#define CONTROL_PADCONF_D2D_MCAD2 0x01E8 -#define CONTROL_PADCONF_D2D_MCAD3 0x01EA -#define CONTROL_PADCONF_D2D_MCAD4 0x01EC -#define CONTROL_PADCONF_D2D_MCAD5 0x01EE -#define CONTROL_PADCONF_D2D_MCAD6 0x01F0 -#define CONTROL_PADCONF_D2D_MCAD7 0x01F2 -#define CONTROL_PADCONF_D2D_MCAD8 0x01F4 -#define CONTROL_PADCONF_D2D_MCAD9 0x01F6 -#define CONTROL_PADCONF_D2D_MCAD10 0x01F8 -#define CONTROL_PADCONF_D2D_MCAD11 0x01FA -#define CONTROL_PADCONF_D2D_MCAD12 0x01FC -#define CONTROL_PADCONF_D2D_MCAD13 0x01FE -#define CONTROL_PADCONF_D2D_MCAD14 0x0200 -#define CONTROL_PADCONF_D2D_MCAD15 0x0202 -#define CONTROL_PADCONF_D2D_MCAD16 0x0204 -#define CONTROL_PADCONF_D2D_MCAD17 0x0206 -#define CONTROL_PADCONF_D2D_MCAD18 0x0208 -#define CONTROL_PADCONF_D2D_MCAD19 0x020A -#define CONTROL_PADCONF_D2D_MCAD20 0x020C -#define CONTROL_PADCONF_D2D_MCAD21 0x020E -#define CONTROL_PADCONF_D2D_MCAD22 0x0210 -#define CONTROL_PADCONF_D2D_MCAD23 0x0212 -#define CONTROL_PADCONF_D2D_MCAD24 0x0214 -#define CONTROL_PADCONF_D2D_MCAD25 0x0216 -#define CONTROL_PADCONF_D2D_MCAD26 0x0218 -#define CONTROL_PADCONF_D2D_MCAD27 0x021A -#define CONTROL_PADCONF_D2D_MCAD28 0x021C -#define CONTROL_PADCONF_D2D_MCAD29 0x021E -#define CONTROL_PADCONF_D2D_MCAD30 0x0220 -#define CONTROL_PADCONF_D2D_MCAD31 0x0222 -#define CONTROL_PADCONF_D2D_MCAD32 0x0224 -#define CONTROL_PADCONF_D2D_MCAD33 0x0226 -#define CONTROL_PADCONF_D2D_MCAD34 0x0228 -#define CONTROL_PADCONF_D2D_MCAD35 0x022A -#define CONTROL_PADCONF_D2D_MCAD36 0x022C -#define CONTROL_PADCONF_D2D_CLK26MI 0x022E -#define CONTROL_PADCONF_D2D_NRESPWRON 0x0230 -#define CONTROL_PADCONF_D2D_NRESWARM 0x0232 -#define CONTROL_PADCONF_D2D_ARM9NIRQ 0x0234 -#define CONTROL_PADCONF_D2D_UMA2P6FIQ 0x0236 -#define CONTROL_PADCONF_D2D_SPINT 0x0238 -#define CONTROL_PADCONF_D2D_FRINT 0x023A -#define CONTROL_PADCONF_D2D_DMAREQ0 0x023C -#define CONTROL_PADCONF_D2D_DMAREQ1 0x023E -#define CONTROL_PADCONF_D2D_DMAREQ2 0x0240 -#define CONTROL_PADCONF_D2D_DMAREQ3 0x0242 -#define CONTROL_PADCONF_D2D_N3GTRST 0x0244 -#define CONTROL_PADCONF_D2D_N3GTDI 0x0246 -#define CONTROL_PADCONF_D2D_N3GTDO 0x0248 -#define CONTROL_PADCONF_D2D_N3GTMS 0x024A -#define CONTROL_PADCONF_D2D_N3GTCK 0x024C -#define CONTROL_PADCONF_D2D_N3GRTCK 0x024E -#define CONTROL_PADCONF_D2D_MSTDBY 0x0250 -#define CONTROL_PADCONF_D2D_SWAKEUP 0x0A4C -#define CONTROL_PADCONF_D2D_IDLEREQ 0x0252 -#define CONTROL_PADCONF_D2D_IDLEACK 0x0254 -#define CONTROL_PADCONF_D2D_MWRITE 0x0256 -#define CONTROL_PADCONF_D2D_SWRITE 0x0258 -#define CONTROL_PADCONF_D2D_MREAD 0x025A -#define CONTROL_PADCONF_D2D_SREAD 0x025C -#define CONTROL_PADCONF_D2D_MBUSFLAG 0x025E -#define CONTROL_PADCONF_D2D_SBUSFLAG 0x0260 -#define CONTROL_PADCONF_SDRC_CKE0 0x0262 -#define CONTROL_PADCONF_SDRC_CKE1 0x0264 - -#define MUX_VAL(OFFSET,VALUE)\ - writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET)); - -#define CP(x) (CONTROL_PADCONF_##x) - -#endif diff --git a/arch/arm/include/asm/arch-omap3/omap3.h b/arch/arm/include/asm/arch-omap3/omap3.h deleted file mode 100644 index 3957c79..0000000 --- a/arch/arm/include/asm/arch-omap3/omap3.h +++ /dev/null @@ -1,216 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <x0khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _OMAP3_H_ -#define _OMAP3_H_ - -/* Stuff on L3 Interconnect */ -#define SMX_APE_BASE 0x68000000 - -/* GPMC */ -#define OMAP34XX_GPMC_BASE 0x6E000000 - -/* SMS */ -#define OMAP34XX_SMS_BASE 0x6C000000 - -/* SDRC */ -#define OMAP34XX_SDRC_BASE 0x6D000000 - -/* - * L4 Peripherals - L4 Wakeup and L4 Core now - */ -#define OMAP34XX_CORE_L4_IO_BASE 0x48000000 -#define OMAP34XX_WAKEUP_L4_IO_BASE 0x48300000 -#define OMAP34XX_ID_L4_IO_BASE 0x4830A200 -#define OMAP34XX_L4_PER 0x49000000 -#define OMAP34XX_L4_IO_BASE OMAP34XX_CORE_L4_IO_BASE - -/* CONTROL */ -#define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE + 0x2000) - -/* UART */ -#define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE + 0x6a000) -#define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE + 0x6c000) -#define OMAP34XX_UART3 (OMAP34XX_L4_PER + 0x20000) - -/* General Purpose Timers */ -#define OMAP34XX_GPT1 0x48318000 -#define OMAP34XX_GPT2 0x49032000 -#define OMAP34XX_GPT3 0x49034000 -#define OMAP34XX_GPT4 0x49036000 -#define OMAP34XX_GPT5 0x49038000 -#define OMAP34XX_GPT6 0x4903A000 -#define OMAP34XX_GPT7 0x4903C000 -#define OMAP34XX_GPT8 0x4903E000 -#define OMAP34XX_GPT9 0x49040000 -#define OMAP34XX_GPT10 0x48086000 -#define OMAP34XX_GPT11 0x48088000 -#define OMAP34XX_GPT12 0x48304000 - -/* WatchDog Timers (1 secure, 3 GP) */ -#define WD1_BASE 0x4830C000 -#define WD2_BASE 0x48314000 -#define WD3_BASE 0x49030000 - -/* 32KTIMER */ -#define SYNC_32KTIMER_BASE 0x48320000 - -#ifndef __ASSEMBLY__ - -struct s32ktimer { - unsigned char res[0x10]; - unsigned int s32k_cr; /* 0x10 */ -}; - -#endif /* __ASSEMBLY__ */ - -/* OMAP3 GPIO registers */ -#define OMAP34XX_GPIO1_BASE 0x48310000 -#define OMAP34XX_GPIO2_BASE 0x49050000 -#define OMAP34XX_GPIO3_BASE 0x49052000 -#define OMAP34XX_GPIO4_BASE 0x49054000 -#define OMAP34XX_GPIO5_BASE 0x49056000 -#define OMAP34XX_GPIO6_BASE 0x49058000 - -#ifndef __ASSEMBLY__ -struct gpio { - unsigned char res1[0x34]; - unsigned int oe; /* 0x34 */ - unsigned int datain; /* 0x38 */ - unsigned char res2[0x54]; - unsigned int cleardataout; /* 0x90 */ - unsigned int setdataout; /* 0x94 */ -}; -#endif /* __ASSEMBLY__ */ - -#define GPIO0 (0x1 << 0) -#define GPIO1 (0x1 << 1) -#define GPIO2 (0x1 << 2) -#define GPIO3 (0x1 << 3) -#define GPIO4 (0x1 << 4) -#define GPIO5 (0x1 << 5) -#define GPIO6 (0x1 << 6) -#define GPIO7 (0x1 << 7) -#define GPIO8 (0x1 << 8) -#define GPIO9 (0x1 << 9) -#define GPIO10 (0x1 << 10) -#define GPIO11 (0x1 << 11) -#define GPIO12 (0x1 << 12) -#define GPIO13 (0x1 << 13) -#define GPIO14 (0x1 << 14) -#define GPIO15 (0x1 << 15) -#define GPIO16 (0x1 << 16) -#define GPIO17 (0x1 << 17) -#define GPIO18 (0x1 << 18) -#define GPIO19 (0x1 << 19) -#define GPIO20 (0x1 << 20) -#define GPIO21 (0x1 << 21) -#define GPIO22 (0x1 << 22) -#define GPIO23 (0x1 << 23) -#define GPIO24 (0x1 << 24) -#define GPIO25 (0x1 << 25) -#define GPIO26 (0x1 << 26) -#define GPIO27 (0x1 << 27) -#define GPIO28 (0x1 << 28) -#define GPIO29 (0x1 << 29) -#define GPIO30 (0x1 << 30) -#define GPIO31 (0x1 << 31) - -/* base address for indirect vectors (internal boot mode) */ -#define SRAM_OFFSET0 0x40000000 -#define SRAM_OFFSET1 0x00200000 -#define SRAM_OFFSET2 0x0000F800 -#define SRAM_VECT_CODE (SRAM_OFFSET0 | SRAM_OFFSET1 | \ - SRAM_OFFSET2) - -#define LOW_LEVEL_SRAM_STACK 0x4020FFFC - -#define DEBUG_LED1 149 /* gpio */ -#define DEBUG_LED2 150 /* gpio */ - -#define XDR_POP 5 /* package on package part */ -#define SDR_DISCRETE 4 /* 128M memory SDR module */ -#define DDR_STACKED 3 /* stacked part on 2422 */ -#define DDR_COMBO 2 /* combo part on cpu daughter card */ -#define DDR_DISCRETE 1 /* 2x16 parts on daughter card */ - -#define DDR_100 100 /* type found on most mem d-boards */ -#define DDR_111 111 /* some combo parts */ -#define DDR_133 133 /* most combo, some mem d-boards */ -#define DDR_165 165 /* future parts */ - -#define CPU_3430 0x3430 - -/* - * 343x real hardware: - * ES1 = rev 0 - * - * ES2 onwards, the value maps to contents of IDCODE register [31:28]. - * - * Note : CPU_3XX_ES20 is used in cache.S. Please review before changing. - */ -#define CPU_3XX_ES10 0 -#define CPU_3XX_ES20 1 -#define CPU_3XX_ES21 2 -#define CPU_3XX_ES30 3 -#define CPU_3XX_ES31 4 -#define CPU_3XX_ES312 7 -#define CPU_3XX_MAX_REV 8 - -#define CPU_3XX_ID_SHIFT 28 - -#define WIDTH_8BIT 0x0000 -#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */ - -/* - * Hawkeye values - */ -#define HAWKEYE_OMAP34XX 0xb7ae -#define HAWKEYE_AM35XX 0xb868 -#define HAWKEYE_OMAP36XX 0xb891 - -#define HAWKEYE_SHIFT 12 - -/* - * Define CPU families - */ -#define CPU_OMAP34XX 0x3400 /* OMAP34xx/OMAP35 devices */ -#define CPU_AM35XX 0x3500 /* AM35xx devices */ -#define CPU_OMAP36XX 0x3600 /* OMAP36xx devices */ - -/* - * Control status register values corresponding to cpu variants - */ -#define OMAP3503 0x5c00 -#define OMAP3515 0x1c00 -#define OMAP3525 0x4c00 -#define OMAP3530 0x0c00 - -#define AM3505 0x5c00 -#define AM3517 0x1c00 - -#define OMAP3730 0x0c00 - -#endif diff --git a/arch/arm/include/asm/arch-omap3/omap_gpmc.h b/arch/arm/include/asm/arch-omap3/omap_gpmc.h deleted file mode 100644 index bd22bce..0000000 --- a/arch/arm/include/asm/arch-omap3/omap_gpmc.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> - * Rohit Choraria <rohitkc@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_OMAP_GPMC_H -#define __ASM_ARCH_OMAP_GPMC_H - -#define GPMC_BUF_EMPTY 0 -#define GPMC_BUF_FULL 1 - -#define ECCCLEAR (0x1 << 8) -#define ECCRESULTREG1 (0x1 << 0) -#define ECCSIZE512BYTE 0xFF -#define ECCSIZE1 (ECCSIZE512BYTE << 22) -#define ECCSIZE0 (ECCSIZE512BYTE << 12) -#define ECCSIZE0SEL (0x000 << 0) - -/* Generic ECC Layouts */ -/* Large Page x8 NAND device Layout */ -#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT -#define GPMC_NAND_HW_ECC_LAYOUT {\ - .eccbytes = 12,\ - .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\ - 9, 10, 11, 12},\ - .oobfree = {\ - {.offset = 13,\ - .length = 51 } } \ -} -#endif - -/* Large Page x16 NAND device Layout */ -#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT -#define GPMC_NAND_HW_ECC_LAYOUT {\ - .eccbytes = 12,\ - .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13},\ - .oobfree = {\ - {.offset = 14,\ - .length = 50 } } \ -} -#endif - -/* Small Page x8 NAND device Layout */ -#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT -#define GPMC_NAND_HW_ECC_LAYOUT {\ - .eccbytes = 3,\ - .eccpos = {1, 2, 3},\ - .oobfree = {\ - {.offset = 4,\ - .length = 12 } } \ -} -#endif - -/* Small Page x16 NAND device Layout */ -#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT -#define GPMC_NAND_HW_ECC_LAYOUT {\ - .eccbytes = 3,\ - .eccpos = {2, 3, 4},\ - .oobfree = {\ - {.offset = 5,\ - .length = 11 } } \ -} -#endif - -#endif /* __ASM_ARCH_OMAP_GPMC_H */ diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h deleted file mode 100644 index 4a28ba1..0000000 --- a/arch/arm/include/asm/arch-omap3/sys_proto.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2004-2008 - * Texas Instruments, <www.ti.com> - * Richard Woodruff <r-woodruff2@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -typedef struct { - u32 mtype; - char *board_string; - char *nand_string; -} omap3_sysinfo; - -void prcm_init(void); -void per_clocks_enable(void); - -void memif_init(void); -void sdrc_init(void); -void do_sdrc_init(u32, u32); -void emif4_init(void); -void gpmc_init(void); -void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, - u32 size); - -void watchdog_init(void); -void set_muxconf_regs(void); - -u32 get_cpu_family(void); -u32 get_cpu_rev(void); -u32 get_sku_id(void); -u32 get_mem_type(void); -u32 get_sysboot_value(void); -u32 is_gpmc_muxed(void); -u32 get_gpmc0_type(void); -u32 get_gpmc0_width(void); -u32 is_running_in_sdram(void); -u32 is_running_in_sram(void); -u32 is_running_in_flash(void); -u32 get_device_type(void); -void l2cache_enable(void); -void secureworld_exit(void); -void setup_auxcr(void); -void try_unlock_memory(void); -u32 get_boot_type(void); -void invalidate_dcache(u32); -void sr32(void *, u32, u32, u32); -u32 wait_on_value(u32, u32, void *, u32); -void sdelay(unsigned long); -void make_cs1_contiguous(void); -void omap_nand_switch_ecc(int); -void power_init_r(void); -void dieid_num_r(void); - -#endif diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h deleted file mode 100644 index 7d5748a..0000000 --- a/arch/arm/include/asm/arch-omap4/cpu.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * (C) Copyright 2006-2010 - * Texas Instruments, <www.ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _CPU_H -#define _CPU_H - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> -#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ - -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct gpmc_cs { - u32 config1; /* 0x00 */ - u32 config2; /* 0x04 */ - u32 config3; /* 0x08 */ - u32 config4; /* 0x0C */ - u32 config5; /* 0x10 */ - u32 config6; /* 0x14 */ - u32 config7; /* 0x18 */ - u32 nand_cmd; /* 0x1C */ - u32 nand_adr; /* 0x20 */ - u32 nand_dat; /* 0x24 */ - u8 res[8]; /* blow up to 0x30 byte */ -}; - -struct gpmc { - u8 res1[0x10]; - u32 sysconfig; /* 0x10 */ - u8 res2[0x4]; - u32 irqstatus; /* 0x18 */ - u32 irqenable; /* 0x1C */ - u8 res3[0x20]; - u32 timeout_control; /* 0x40 */ - u8 res4[0xC]; - u32 config; /* 0x50 */ - u32 status; /* 0x54 */ - u8 res5[0x8]; /* 0x58 */ - struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ - u8 res6[0x14]; /* 0x1E0 */ - u32 ecc_config; /* 0x1F4 */ - u32 ecc_control; /* 0x1F8 */ - u32 ecc_size_config; /* 0x1FC */ - u32 ecc1_result; /* 0x200 */ - u32 ecc2_result; /* 0x204 */ - u32 ecc3_result; /* 0x208 */ - u32 ecc4_result; /* 0x20C */ - u32 ecc5_result; /* 0x210 */ - u32 ecc6_result; /* 0x214 */ - u32 ecc7_result; /* 0x218 */ - u32 ecc8_result; /* 0x21C */ - u32 ecc9_result; /* 0x220 */ -}; - -/* Used for board specific gpmc initialization */ -extern struct gpmc *gpmc_cfg; - -struct gptimer { - u32 tidr; /* 0x00 r */ - u8 res[0xc]; - u32 tiocp_cfg; /* 0x10 rw */ - u32 tistat; /* 0x14 r */ - u32 tisr; /* 0x18 rw */ - u32 tier; /* 0x1c rw */ - u32 twer; /* 0x20 rw */ - u32 tclr; /* 0x24 rw */ - u32 tcrr; /* 0x28 rw */ - u32 tldr; /* 0x2c rw */ - u32 ttgr; /* 0x30 rw */ - u32 twpc; /* 0x34 r */ - u32 tmar; /* 0x38 rw */ - u32 tcar1; /* 0x3c r */ - u32 tcicr; /* 0x40 rw */ - u32 tcar2; /* 0x44 r */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -/* enable sys_clk NO-prescale /1 */ -#define GPT_EN ((0x0 << 2) | (0x1 << 1) | (0x1 << 0)) - -/* Watchdog */ -#ifndef __KERNEL_STRICT_NAMES -#ifndef __ASSEMBLY__ -struct watchdog { - u8 res1[0x34]; - u32 wwps; /* 0x34 r */ - u8 res2[0x10]; - u32 wspr; /* 0x48 rw */ -}; -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL_STRICT_NAMES */ - -#define WD_UNLOCK1 0xAAAA -#define WD_UNLOCK2 0x5555 - -#define SYSCLKDIV_1 (0x1 << 6) -#define SYSCLKDIV_2 (0x1 << 7) - -#define CLKSEL_GPT1 (0x1 << 0) - -#define EN_GPT1 (0x1 << 0) -#define EN_32KSYNC (0x1 << 2) - -#define ST_WDT2 (0x1 << 5) - -#define RESETDONE (0x1 << 0) - -#define TCLR_ST (0x1 << 0) -#define TCLR_AR (0x1 << 1) -#define TCLR_PRE (0x1 << 5) - -/* GPMC BASE */ -#define GPMC_BASE (OMAP44XX_GPMC_BASE) - -/* I2C base */ -#define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000) -#define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000) -#define I2C_BASE3 (OMAP44XX_L4_PER_BASE + 0x60000) - -/* MUSB base */ -#define MUSB_BASE (OMAP44XX_L4_CORE_BASE + 0xAB000) - -#endif /* _CPU_H */ diff --git a/arch/arm/include/asm/arch-omap4/i2c.h b/arch/arm/include/asm/arch-omap4/i2c.h deleted file mode 100644 index a91b4c2..0000000 --- a/arch/arm/include/asm/arch-omap4/i2c.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * (C) Copyright 2004-2010 - * Texas Instruments, <www.ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _OMAP4_I2C_H_ -#define _OMAP4_I2C_H_ - -#define I2C_BUS_MAX 3 -#define I2C_DEFAULT_BASE I2C_BASE1 - -struct i2c { - unsigned short revnb_lo; /* 0x00 */ - unsigned short res1; - unsigned short revnb_hi; /* 0x04 */ - unsigned short res2[13]; - unsigned short sysc; /* 0x20 */ - unsigned short res3; - unsigned short irqstatus_raw; /* 0x24 */ - unsigned short res4; - unsigned short stat; /* 0x28 */ - unsigned short res5; - unsigned short ie; /* 0x2C */ - unsigned short res6; - unsigned short irqenable_clr; /* 0x30 */ - unsigned short res7; - unsigned short iv; /* 0x34 */ - unsigned short res8[45]; - unsigned short syss; /* 0x90 */ - unsigned short res9; - unsigned short buf; /* 0x94 */ - unsigned short res10; - unsigned short cnt; /* 0x98 */ - unsigned short res11; - unsigned short data; /* 0x9C */ - unsigned short res13; - unsigned short res14; /* 0xA0 */ - unsigned short res15; - unsigned short con; /* 0xA4 */ - unsigned short res16; - unsigned short oa; /* 0xA8 */ - unsigned short res17; - unsigned short sa; /* 0xAC */ - unsigned short res18; - unsigned short psc; /* 0xB0 */ - unsigned short res19; - unsigned short scll; /* 0xB4 */ - unsigned short res20; - unsigned short sclh; /* 0xB8 */ - unsigned short res21; - unsigned short systest; /* 0xBC */ - unsigned short res22; - unsigned short bufstat; /* 0xC0 */ - unsigned short res23; -}; - -#endif /* _OMAP4_I2C_H_ */ diff --git a/arch/arm/include/asm/arch-omap4/mmc_host_def.h b/arch/arm/include/asm/arch-omap4/mmc_host_def.h deleted file mode 100644 index 733d8ed..0000000 --- a/arch/arm/include/asm/arch-omap4/mmc_host_def.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * (C) Copyright 2010 - * Texas Instruments, <www.ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation's version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef MMC_HOST_DEF_H -#define MMC_HOST_DEF_H - -/* - * OMAP HSMMC register definitions - */ - -#define OMAP_HSMMC1_BASE 0x4809C100 -#define OMAP_HSMMC2_BASE 0x480B4100 -#define OMAP_HSMMC3_BASE 0x480AD100 - -typedef struct hsmmc { - unsigned char res1[0x10]; - unsigned int sysconfig; /* 0x10 */ - unsigned int sysstatus; /* 0x14 */ - unsigned char res2[0x14]; - unsigned int con; /* 0x2C */ - unsigned char res3[0xD4]; - unsigned int blk; /* 0x104 */ - unsigned int arg; /* 0x108 */ - unsigned int cmd; /* 0x10C */ - unsigned int rsp10; /* 0x110 */ - unsigned int rsp32; /* 0x114 */ - unsigned int rsp54; /* 0x118 */ - unsigned int rsp76; /* 0x11C */ - unsigned int data; /* 0x120 */ - unsigned int pstate; /* 0x124 */ - unsigned int hctl; /* 0x128 */ - unsigned int sysctl; /* 0x12C */ - unsigned int stat; /* 0x130 */ - unsigned int ie; /* 0x134 */ - unsigned char res4[0x8]; - unsigned int capa; /* 0x140 */ -} hsmmc_t; - -/* - * OMAP HS MMC Bit definitions - */ -#define MMC_SOFTRESET (0x1 << 1) -#define RESETDONE (0x1 << 0) -#define NOOPENDRAIN (0x0 << 0) -#define OPENDRAIN (0x1 << 0) -#define OD (0x1 << 0) -#define INIT_NOINIT (0x0 << 1) -#define INIT_INITSTREAM (0x1 << 1) -#define HR_NOHOSTRESP (0x0 << 2) -#define STR_BLOCK (0x0 << 3) -#define MODE_FUNC (0x0 << 4) -#define DW8_1_4BITMODE (0x0 << 5) -#define MIT_CTO (0x0 << 6) -#define CDP_ACTIVEHIGH (0x0 << 7) -#define WPP_ACTIVEHIGH (0x0 << 8) -#define RESERVED_MASK (0x3 << 9) -#define CTPL_MMC_SD (0x0 << 11) -#define BLEN_512BYTESLEN (0x200 << 0) -#define NBLK_STPCNT (0x0 << 16) -#define DE_DISABLE (0x0 << 0) -#define BCE_DISABLE (0x0 << 1) -#define BCE_ENABLE (0x1 << 1) -#define ACEN_DISABLE (0x0 << 2) -#define DDIR_OFFSET (4) -#define DDIR_MASK (0x1 << 4) -#define DDIR_WRITE (0x0 << 4) -#define DDIR_READ (0x1 << 4) -#define MSBS_SGLEBLK (0x0 << 5) -#define MSBS_MULTIBLK (0x1 << 5) -#define RSP_TYPE_OFFSET (16) -#define RSP_TYPE_MASK (0x3 << 16) -#define RSP_TYPE_NORSP (0x0 << 16) -#define RSP_TYPE_LGHT136 (0x1 << 16) -#define RSP_TYPE_LGHT48 (0x2 << 16) -#define RSP_TYPE_LGHT48B (0x3 << 16) -#define CCCE_NOCHECK (0x0 << 19) -#define CCCE_CHECK (0x1 << 19) -#define CICE_NOCHECK (0x0 << 20) -#define CICE_CHECK (0x1 << 20) -#define DP_OFFSET (21) -#define DP_MASK (0x1 << 21) -#define DP_NO_DATA (0x0 << 21) -#define DP_DATA (0x1 << 21) -#define CMD_TYPE_NORMAL (0x0 << 22) -#define INDEX_OFFSET (24) -#define INDEX_MASK (0x3f << 24) -#define INDEX(i) (i << 24) -#define DATI_MASK (0x1 << 1) -#define DATI_CMDDIS (0x1 << 1) -#define DTW_1_BITMODE (0x0 << 1) -#define DTW_4_BITMODE (0x1 << 1) -#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ -#define SDBP_PWROFF (0x0 << 8) -#define SDBP_PWRON (0x1 << 8) -#define SDVS_1V8 (0x5 << 9) -#define SDVS_3V0 (0x6 << 9) -#define ICE_MASK (0x1 << 0) -#define ICE_STOP (0x0 << 0) -#define ICS_MASK (0x1 << 1) -#define ICS_NOTREADY (0x0 << 1) -#define ICE_OSCILLATE (0x1 << 0) -#define CEN_MASK (0x1 << 2) -#define CEN_DISABLE (0x0 << 2) -#define CEN_ENABLE (0x1 << 2) -#define CLKD_OFFSET (6) -#define CLKD_MASK (0x3FF << 6) -#define DTO_MASK (0xF << 16) -#define DTO_15THDTO (0xE << 16) -#define SOFTRESETALL (0x1 << 24) -#define CC_MASK (0x1 << 0) -#define TC_MASK (0x1 << 1) -#define BWR_MASK (0x1 << 4) -#define BRR_MASK (0x1 << 5) -#define ERRI_MASK (0x1 << 15) -#define IE_CC (0x01 << 0) -#define IE_TC (0x01 << 1) -#define IE_BWR (0x01 << 4) -#define IE_BRR (0x01 << 5) -#define IE_CTO (0x01 << 16) -#define IE_CCRC (0x01 << 17) -#define IE_CEB (0x01 << 18) -#define IE_CIE (0x01 << 19) -#define IE_DTO (0x01 << 20) -#define IE_DCRC (0x01 << 21) -#define IE_DEB (0x01 << 22) -#define IE_CERR (0x01 << 28) -#define IE_BADA (0x01 << 29) - -#define VS30_3V0SUP (1 << 25) -#define VS18_1V8SUP (1 << 26) - -/* Driver definitions */ -#define MMCSD_SECTOR_SIZE 512 -#define MMC_CARD 0 -#define SD_CARD 1 -#define BYTE_MODE 0 -#define SECTOR_MODE 1 -#define CLK_INITSEQ 0 -#define CLK_400KHZ 1 -#define CLK_MISC 2 - -typedef struct { - unsigned int card_type; - unsigned int version; - unsigned int mode; - unsigned int size; - unsigned int RCA; -} mmc_card_data; -#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) -#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) - -/* Clock Configurations and Macros */ -#define MMC_CLOCK_REFERENCE 96 /* MHz */ - -#define mmc_reg_out(addr, mask, val)\ - writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) - -int omap_mmc_init(int dev_index); - -#endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap4/mux_omap4.h b/arch/arm/include/asm/arch-omap4/mux_omap4.h deleted file mode 100644 index 019574b..0000000 --- a/arch/arm/include/asm/arch-omap4/mux_omap4.h +++ /dev/null @@ -1,344 +0,0 @@ -/* - * (C) Copyright 2004-2009 - * Texas Instruments Incorporated - * Richard Woodruff <r-woodruff2@ti.com> - * Aneesh V <aneesh@ti.com> - * Balaji Krishnamoorthy <balajitk@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _MUX_OMAP4_H_ -#define _MUX_OMAP4_H_ - -#include <asm/types.h> - -struct pad_conf_entry { - - u16 offset; - - u16 val; - -} __attribute__ ((packed)); - -#ifdef CONFIG_OFF_PADCONF -#define OFF_PD (1 << 12) -#define OFF_PU (3 << 12) -#define OFF_OUT_PTD (0 << 10) -#define OFF_OUT_PTU (2 << 10) -#define OFF_IN (1 << 10) -#define OFF_OUT (0 << 10) -#define OFF_EN (1 << 9) -#else -#define OFF_PD (0 << 12) -#define OFF_PU (0 << 12) -#define OFF_OUT_PTD (0 << 10) -#define OFF_OUT_PTU (0 << 10) -#define OFF_IN (0 << 10) -#define OFF_OUT (0 << 10) -#define OFF_EN (0 << 9) -#endif - -#define IEN (1 << 8) -#define IDIS (0 << 8) -#define PTU (3 << 3) -#define PTD (1 << 3) -#define EN (1 << 3) -#define DIS (0 << 3) - -#define M0 0 -#define M1 1 -#define M2 2 -#define M3 3 -#define M4 4 -#define M5 5 -#define M6 6 -#define M7 7 - -#define SAFE_MODE M7 - -#ifdef CONFIG_OFF_PADCONF -#define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN) -#define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN) -#define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN) -#define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN) -#else -#define OFF_IN_PD 0 -#define OFF_IN_PU 0 -#define OFF_OUT_PD 0 -#define OFF_OUT_PU 0 -#endif - -#define CORE_REVISION 0x0000 -#define CORE_HWINFO 0x0004 -#define CORE_SYSCONFIG 0x0010 -#define GPMC_AD0 0x0040 -#define GPMC_AD1 0x0042 -#define GPMC_AD2 0x0044 -#define GPMC_AD3 0x0046 -#define GPMC_AD4 0x0048 -#define GPMC_AD5 0x004A -#define GPMC_AD6 0x004C -#define GPMC_AD7 0x004E -#define GPMC_AD8 0x0050 -#define GPMC_AD9 0x0052 -#define GPMC_AD10 0x0054 -#define GPMC_AD11 0x0056 -#define GPMC_AD12 0x0058 -#define GPMC_AD13 0x005A -#define GPMC_AD14 0x005C -#define GPMC_AD15 0x005E -#define GPMC_A16 0x0060 -#define GPMC_A17 0x0062 -#define GPMC_A18 0x0064 -#define GPMC_A19 0x0066 -#define GPMC_A20 0x0068 -#define GPMC_A21 0x006A -#define GPMC_A22 0x006C -#define GPMC_A23 0x006E -#define GPMC_A24 0x0070 -#define GPMC_A25 0x0072 -#define GPMC_NCS0 0x0074 -#define GPMC_NCS1 0x0076 -#define GPMC_NCS2 0x0078 -#define GPMC_NCS3 0x007A -#define GPMC_NWP 0x007C -#define GPMC_CLK 0x007E -#define GPMC_NADV_ALE 0x0080 -#define GPMC_NOE 0x0082 -#define GPMC_NWE 0x0084 -#define GPMC_NBE0_CLE 0x0086 -#define GPMC_NBE1 0x0088 -#define GPMC_WAIT0 0x008A -#define GPMC_WAIT1 0x008C -#define C2C_DATA11 0x008E -#define C2C_DATA12 0x0090 -#define C2C_DATA13 0x0092 -#define C2C_DATA14 0x0094 -#define C2C_DATA15 0x0096 -#define HDMI_HPD 0x0098 -#define HDMI_CEC 0x009A -#define HDMI_DDC_SCL 0x009C -#define HDMI_DDC_SDA 0x009E -#define CSI21_DX0 0x00A0 -#define CSI21_DY0 0x00A2 -#define CSI21_DX1 0x00A4 -#define CSI21_DY1 0x00A6 -#define CSI21_DX2 0x00A8 -#define CSI21_DY2 0x00AA -#define CSI21_DX3 0x00AC -#define CSI21_DY3 0x00AE -#define CSI21_DX4 0x00B0 -#define CSI21_DY4 0x00B2 -#define CSI22_DX0 0x00B4 -#define CSI22_DY0 0x00B6 -#define CSI22_DX1 0x00B8 -#define CSI22_DY1 0x00BA -#define CAM_SHUTTER 0x00BC -#define CAM_STROBE 0x00BE -#define CAM_GLOBALRESET 0x00C0 -#define USBB1_ULPITLL_CLK 0x00C2 -#define USBB1_ULPITLL_STP 0x00C4 -#define USBB1_ULPITLL_DIR 0x00C6 -#define USBB1_ULPITLL_NXT 0x00C8 -#define USBB1_ULPITLL_DAT0 0x00CA -#define USBB1_ULPITLL_DAT1 0x00CC -#define USBB1_ULPITLL_DAT2 0x00CE -#define USBB1_ULPITLL_DAT3 0x00D0 -#define USBB1_ULPITLL_DAT4 0x00D2 -#define USBB1_ULPITLL_DAT5 0x00D4 -#define USBB1_ULPITLL_DAT6 0x00D6 -#define USBB1_ULPITLL_DAT7 0x00D8 -#define USBB1_HSIC_DATA 0x00DA -#define USBB1_HSIC_STROBE 0x00DC -#define USBC1_ICUSB_DP 0x00DE -#define USBC1_ICUSB_DM 0x00E0 -#define SDMMC1_CLK 0x00E2 -#define SDMMC1_CMD 0x00E4 -#define SDMMC1_DAT0 0x00E6 -#define SDMMC1_DAT1 0x00E8 -#define SDMMC1_DAT2 0x00EA -#define SDMMC1_DAT3 0x00EC -#define SDMMC1_DAT4 0x00EE -#define SDMMC1_DAT5 0x00F0 -#define SDMMC1_DAT6 0x00F2 -#define SDMMC1_DAT7 0x00F4 -#define ABE_MCBSP2_CLKX 0x00F6 -#define ABE_MCBSP2_DR 0x00F8 -#define ABE_MCBSP2_DX 0x00FA -#define ABE_MCBSP2_FSX 0x00FC -#define ABE_MCBSP1_CLKX 0x00FE -#define ABE_MCBSP1_DR 0x0100 -#define ABE_MCBSP1_DX 0x0102 -#define ABE_MCBSP1_FSX 0x0104 -#define ABE_PDM_UL_DATA 0x0106 -#define ABE_PDM_DL_DATA 0x0108 -#define ABE_PDM_FRAME 0x010A -#define ABE_PDM_LB_CLK 0x010C -#define ABE_CLKS 0x010E -#define ABE_DMIC_CLK1 0x0110 -#define ABE_DMIC_DIN1 0x0112 -#define ABE_DMIC_DIN2 0x0114 -#define ABE_DMIC_DIN3 0x0116 -#define UART2_CTS 0x0118 -#define UART2_RTS 0x011A -#define UART2_RX 0x011C -#define UART2_TX 0x011E -#define HDQ_SIO 0x0120 -#define I2C1_SCL 0x0122 -#define I2C1_SDA 0x0124 -#define I2C2_SCL 0x0126 -#define I2C2_SDA 0x0128 -#define I2C3_SCL 0x012A -#define I2C3_SDA 0x012C -#define I2C4_SCL 0x012E -#define I2C4_SDA 0x0130 -#define MCSPI1_CLK 0x0132 -#define MCSPI1_SOMI 0x0134 -#define MCSPI1_SIMO 0x0136 -#define MCSPI1_CS0 0x0138 -#define MCSPI1_CS1 0x013A -#define MCSPI1_CS2 0x013C -#define MCSPI1_CS3 0x013E -#define UART3_CTS_RCTX 0x0140 -#define UART3_RTS_SD 0x0142 -#define UART3_RX_IRRX 0x0144 -#define UART3_TX_IRTX 0x0146 -#define SDMMC5_CLK 0x0148 -#define SDMMC5_CMD 0x014A -#define SDMMC5_DAT0 0x014C -#define SDMMC5_DAT1 0x014E -#define SDMMC5_DAT2 0x0150 -#define SDMMC5_DAT3 0x0152 -#define MCSPI4_CLK 0x0154 -#define MCSPI4_SIMO 0x0156 -#define MCSPI4_SOMI 0x0158 -#define MCSPI4_CS0 0x015A -#define UART4_RX 0x015C -#define UART4_TX 0x015E -#define USBB2_ULPITLL_CLK 0x0160 -#define USBB2_ULPITLL_STP 0x0162 -#define USBB2_ULPITLL_DIR 0x0164 -#define USBB2_ULPITLL_NXT 0x0166 -#define USBB2_ULPITLL_DAT0 0x0168 -#define USBB2_ULPITLL_DAT1 0x016A -#define USBB2_ULPITLL_DAT2 0x016C -#define USBB2_ULPITLL_DAT3 0x016E -#define USBB2_ULPITLL_DAT4 0x0170 -#define USBB2_ULPITLL_DAT5 0x0172 -#define USBB2_ULPITLL_DAT6 0x0174 -#define USBB2_ULPITLL_DAT7 0x0176 -#define USBB2_HSIC_DATA 0x0178 -#define USBB2_HSIC_STROBE 0x017A -#define UNIPRO_TX0 0x017C -#define UNIPRO_TY0 0x017E -#define UNIPRO_TX1 0x0180 -#define UNIPRO_TY1 0x0182 -#define UNIPRO_TX2 0x0184 -#define UNIPRO_TY2 0x0186 -#define UNIPRO_RX0 0x0188 -#define UNIPRO_RY0 0x018A -#define UNIPRO_RX1 0x018C -#define UNIPRO_RY1 0x018E -#define UNIPRO_RX2 0x0190 -#define UNIPRO_RY2 0x0192 -#define USBA0_OTG_CE 0x0194 -#define USBA0_OTG_DP 0x0196 -#define USBA0_OTG_DM 0x0198 -#define FREF_CLK1_OUT 0x019A -#define FREF_CLK2_OUT 0x019C -#define SYS_NIRQ1 0x019E -#define SYS_NIRQ2 0x01A0 -#define SYS_BOOT0 0x01A2 -#define SYS_BOOT1 0x01A4 -#define SYS_BOOT2 0x01A6 -#define SYS_BOOT3 0x01A8 -#define SYS_BOOT4 0x01AA -#define SYS_BOOT5 0x01AC -#define DPM_EMU0 0x01AE -#define DPM_EMU1 0x01B0 -#define DPM_EMU2 0x01B2 -#define DPM_EMU3 0x01B4 -#define DPM_EMU4 0x01B6 -#define DPM_EMU5 0x01B8 -#define DPM_EMU6 0x01BA -#define DPM_EMU7 0x01BC -#define DPM_EMU8 0x01BE -#define DPM_EMU9 0x01C0 -#define DPM_EMU10 0x01C2 -#define DPM_EMU11 0x01C4 -#define DPM_EMU12 0x01C6 -#define DPM_EMU13 0x01C8 -#define DPM_EMU14 0x01CA -#define DPM_EMU15 0x01CC -#define DPM_EMU16 0x01CE -#define DPM_EMU17 0x01D0 -#define DPM_EMU18 0x01D2 -#define DPM_EMU19 0x01D4 -#define WAKEUPEVENT_0 0x01D8 -#define WAKEUPEVENT_1 0x01DC -#define WAKEUPEVENT_2 0x01E0 -#define WAKEUPEVENT_3 0x01E4 -#define WAKEUPEVENT_4 0x01E8 -#define WAKEUPEVENT_5 0x01EC -#define WAKEUPEVENT_6 0x01F0 - -#define WKUP_REVISION 0x0000 -#define WKUP_HWINFO 0x0004 -#define WKUP_SYSCONFIG 0x0010 -#define PAD0_SIM_IO 0x0040 -#define PAD1_SIM_CLK 0x0042 -#define PAD0_SIM_RESET 0x0044 -#define PAD1_SIM_CD 0x0046 -#define PAD0_SIM_PWRCTRL 0x0048 -#define PAD1_SR_SCL 0x004A -#define PAD0_SR_SDA 0x004C -#define PAD1_FREF_XTAL_IN 0x004E -#define PAD0_FREF_SLICER_IN 0x0050 -#define PAD1_FREF_CLK_IOREQ 0x0052 -#define PAD0_FREF_CLK0_OUT 0x0054 -#define PAD1_FREF_CLK3_REQ 0x0056 -#define PAD0_FREF_CLK3_OUT 0x0058 -#define PAD1_FREF_CLK4_REQ 0x005A -#define PAD0_FREF_CLK4_OUT 0x005C -#define PAD1_SYS_32K 0x005E -#define PAD0_SYS_NRESPWRON 0x0060 -#define PAD1_SYS_NRESWARM 0x0062 -#define PAD0_SYS_PWR_REQ 0x0064 -#define PAD1_SYS_PWRON_RESET 0x0066 -#define PAD0_SYS_BOOT6 0x0068 -#define PAD1_SYS_BOOT7 0x006A -#define PAD0_JTAG_NTRST 0x006C -#define PAD1_JTAG_TCK 0x006D -#define PAD0_JTAG_RTCK 0x0070 -#define PAD1_JTAG_TMS_TMSC 0x0072 -#define PAD0_JTAG_TDI 0x0074 -#define PAD1_JTAG_TDO 0x0076 -#define PADCONF_WAKEUPEVENT_0 0x007C -#define CONTROL_SMART1NOPMIO_PADCONF_0 0x05A0 -#define CONTROL_SMART1NOPMIO_PADCONF_1 0x05A4 -#define PADCONF_MODE 0x05A8 -#define CONTROL_XTAL_OSCILLATOR 0x05AC -#define CONTROL_CONTROL_I2C_2 0x0604 -#define CONTROL_CONTROL_JTAG 0x0608 -#define CONTROL_CONTROL_SYS 0x060C -#define CONTROL_SPARE_RW 0x0614 -#define CONTROL_SPARE_R 0x0618 -#define CONTROL_SPARE_R_C0 0x061C - -#endif /* _MUX_OMAP4_H_ */ diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h deleted file mode 100644 index a30bb33..0000000 --- a/arch/arm/include/asm/arch-omap4/omap4.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * (C) Copyright 2010 - * Texas Instruments, <www.ti.com> - * - * Authors: - * Aneesh V <aneesh@ti.com> - * - * Derived from OMAP3 work by - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <x0khasim@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _OMAP4_H_ -#define _OMAP4_H_ - -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <asm/types.h> -#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ - -/* - * L4 Peripherals - L4 Wakeup and L4 Core now - */ -#define OMAP44XX_L4_CORE_BASE 0x4A000000 -#define OMAP44XX_L4_WKUP_BASE 0x4A300000 -#define OMAP44XX_L4_PER_BASE 0x48000000 - -#define OMAP44XX_DRAM_ADDR_SPACE_START 0x80000000 -#define OMAP44XX_DRAM_ADDR_SPACE_END 0xD0000000 - - -/* CONTROL */ -#define CTRL_BASE (OMAP44XX_L4_CORE_BASE + 0x2000) -#define CONTROL_PADCONF_CORE (OMAP44XX_L4_CORE_BASE + 0x100000) -#define CONTROL_PADCONF_WKUP (OMAP44XX_L4_CORE_BASE + 0x31E000) - -/* UART */ -#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000) -#define UART2_BASE (OMAP44XX_L4_PER_BASE + 0x6c000) -#define UART3_BASE (OMAP44XX_L4_PER_BASE + 0x20000) - -/* General Purpose Timers */ -#define GPT1_BASE (OMAP44XX_L4_WKUP_BASE + 0x18000) -#define GPT2_BASE (OMAP44XX_L4_PER_BASE + 0x32000) -#define GPT3_BASE (OMAP44XX_L4_PER_BASE + 0x34000) - -/* Watchdog Timer2 - MPU watchdog */ -#define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000) - -/* 32KTIMER */ -#define SYNC_32KTIMER_BASE (OMAP44XX_L4_WKUP_BASE + 0x4000) - -/* GPMC */ -#define OMAP44XX_GPMC_BASE 0x50000000 - -/* DMM */ -#define OMAP44XX_DMM_BASE 0x4E000000 -#define DMM_LISA_MAP_BASE (OMAP44XX_DMM_BASE + 0x40) -#define DMM_LISA_MAP_SYS_SIZE_MASK (7 << 20) -#define DMM_LISA_MAP_SYS_SIZE_SHIFT 20 -#define DMM_LISA_MAP_SYS_ADDR_MASK (0xFF << 24) -/* - * Hardware Register Details - */ - -/* Watchdog Timer */ -#define WD_UNLOCK1 0xAAAA -#define WD_UNLOCK2 0x5555 - -/* GP Timer */ -#define TCLR_ST (0x1 << 0) -#define TCLR_AR (0x1 << 1) -#define TCLR_PRE (0x1 << 5) - -/* - * PRCM - */ - -/* PRM */ -#define PRM_BASE 0x4A306000 -#define PRM_DEVICE_BASE (PRM_BASE + 0x1B00) - -#define PRM_RSTCTRL PRM_DEVICE_BASE -#define PRM_RSTCTRL_RESET 0x01 - -#ifndef __ASSEMBLY__ - -struct s32ktimer { - unsigned char res[0x10]; - unsigned int s32k_cr; /* 0x10 */ -}; - -#endif /* __ASSEMBLY__ */ - -/* - * Non-secure SRAM Addresses - * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE - * at 0x40304000(EMU base) so that our code works for both EMU and GP - */ -#define NON_SECURE_SRAM_START 0x40304000 -#define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */ -/* base address for indirect vectors (internal boot mode) */ -#define SRAM_ROM_VECT_BASE 0x4030D000 -/* Temporary SRAM stack used while low level init is done */ -#define LOW_LEVEL_SRAM_STACK NON_SECURE_SRAM_END - -/* - * OMAP4 real hardware: - * TODO: Change this to the IDCODE in the hw regsiter - */ -#define CPU_OMAP4430_ES10 1 -#define CPU_OMAP4430_ES20 2 - -#endif diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h deleted file mode 100644 index 4813e9e..0000000 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * (C) Copyright 2010 - * Texas Instruments, <www.ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -#include <asm/arch/omap4.h> -#include <asm/io.h> - -struct omap_sysinfo { - char *board_string; -}; - -void gpmc_init(void); -void watchdog_init(void); -u32 get_device_type(void); -void invalidate_dcache(u32); -void set_muxconf_regs(void); -void sr32(void *, u32, u32, u32); -u32 wait_on_value(u32, u32, void *, u32); -void sdelay(unsigned long); - -extern const struct omap_sysinfo sysinfo; - -#endif diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h b/arch/arm/include/asm/arch-orion5x/cpu.h deleted file mode 100644 index c84efaf..0000000 --- a/arch/arm/include/asm/arch-orion5x/cpu.h +++ /dev/null @@ -1,260 +0,0 @@ -/* - * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr> - * - * Based on original Kirorion5x_ood support which is - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ORION5X_CPU_H -#define _ORION5X_CPU_H - -#include <asm/system.h> - -#ifndef __ASSEMBLY__ - -#define ORION5X_CPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target << 4) \ - | (attr << 8) | (orion5x_winctrl_calcsize(size) << 16)) - -#define ORION5XGBE_PORT_SERIAL_CONTROL1_REG(_x) \ - ((_x ? ORION5X_EGIGA0_BASE : ORION5X_EGIGA1_BASE) + 0x44c) - -enum memory_bank { - BANK0, - BANK1, - BANK2, - BANK3 -}; - -enum orion5x_cpu_winen { - ORION5X_WIN_DISABLE, - ORION5X_WIN_ENABLE -}; - -enum orion5x_cpu_target { - ORION5X_TARGET_DRAM = 0, - ORION5X_TARGET_DEVICE = 1, - ORION5X_TARGET_PCI = 3, - ORION5X_TARGET_PCIE = 4, - ORION5X_TARGET_SASRAM = 9 -}; - -enum orion5x_cpu_attrib { - ORION5X_ATTR_DRAM_CS0 = 0x0e, - ORION5X_ATTR_DRAM_CS1 = 0x0d, - ORION5X_ATTR_DRAM_CS2 = 0x0b, - ORION5X_ATTR_DRAM_CS3 = 0x07, - ORION5X_ATTR_PCI_MEM = 0x59, - ORION5X_ATTR_PCI_IO = 0x51, - ORION5X_ATTR_PCIE_MEM = 0x59, - ORION5X_ATTR_PCIE_IO = 0x51, - ORION5X_ATTR_SASRAM = 0x00, - ORION5X_ATTR_DEV_CS0 = 0x1e, - ORION5X_ATTR_DEV_CS1 = 0x1d, - ORION5X_ATTR_DEV_CS2 = 0x1b, - ORION5X_ATTR_BOOTROM = 0x0f -}; - -/* - * Device Address MAP BAR values - * - * All addresses and sizes not defined by board code - * will be given default values here. - */ - -#if !defined (ORION5X_ADR_PCIE_MEM) -#define ORION5X_ADR_PCIE_MEM 0x90000000 -#endif - -#if !defined (ORION5X_ADR_PCIE_MEM_REMAP_LO) -#define ORION5X_ADR_PCIE_MEM_REMAP_LO 0x90000000 -#endif - -#if !defined (ORION5X_ADR_PCIE_MEM_REMAP_HI) -#define ORION5X_ADR_PCIE_MEM_REMAP_HI 0 -#endif - -#if !defined (ORION5X_SZ_PCIE_MEM) -#define ORION5X_SZ_PCIE_MEM (128*1024*1024) -#endif - -#if !defined (ORION5X_ADR_PCIE_IO) -#define ORION5X_ADR_PCIE_IO 0xf0000000 -#endif - -#if !defined (ORION5X_ADR_PCIE_IO_REMAP_LO) -#define ORION5X_ADR_PCIE_IO_REMAP_LO 0x90000000 -#endif - -#if !defined (ORION5X_ADR_PCIE_IO_REMAP_HI) -#define ORION5X_ADR_PCIE_IO_REMAP_HI 0 -#endif - -#if !defined (ORION5X_SZ_PCIE_IO) -#define ORION5X_SZ_PCIE_IO (64*1024) -#endif - -#if !defined (ORION5X_ADR_PCI_MEM) -#define ORION5X_ADR_PCI_MEM 0x98000000 -#endif - -#if !defined (ORION5X_SZ_PCI_MEM) -#define ORION5X_SZ_PCI_MEM (128*1024*1024) -#endif - -#if !defined (ORION5X_ADR_PCI_IO) -#define ORION5X_ADR_PCI_IO 0xf0100000 -#endif - -#if !defined (ORION5X_SZ_PCI_IO) -#define ORION5X_SZ_PCI_IO (64*1024) -#endif - -#if !defined (ORION5X_ADR_DEV_CS0) -#define ORION5X_ADR_DEV_CS0 0xfa000000 -#endif - -#if !defined (ORION5X_SZ_DEV_CS0) -#define ORION5X_SZ_DEV_CS0 (2*1024*1024) -#endif - -#if !defined (ORION5X_ADR_DEV_CS1) -#define ORION5X_ADR_DEV_CS1 0xf8000000 -#endif - -#if !defined (ORION5X_SZ_DEV_CS1) -#define ORION5X_SZ_DEV_CS1 (32*1024*1024) -#endif - -#if !defined (ORION5X_ADR_DEV_CS2) -#define ORION5X_ADR_DEV_CS2 0xfa800000 -#endif - -#if !defined (ORION5X_SZ_DEV_CS2) -#define ORION5X_SZ_DEV_CS2 (1*1024*1024) -#endif - -#if !defined (ORION5X_ADR_BOOTROM) -#define ORION5X_ADR_BOOTROM 0xFFF80000 -#endif - -#if !defined (ORION5X_SZ_BOOTROM) -#define ORION5X_SZ_BOOTROM (512*1024) -#endif - -/* - * PCIE registers are used for SoC device ID and revision - */ -#define PCIE_DEV_ID_OFF (ORION5X_REG_PCIE_BASE + 0x0000) -#define PCIE_DEV_REV_OFF (ORION5X_REG_PCIE_BASE + 0x0008) - -/* - * The following definitions are intended for identifying - * the real device and revision on which u-boot is running - * even if it was compiled only for a specific one. Thus, - * these constants must not be considered chip-specific. - */ - -/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ -#define MV88F5181_DEV_ID 0x5181 -#define MV88F5181_REV_B1 3 -#define MV88F5181L_REV_A0 8 -#define MV88F5181L_REV_A1 9 -/* Orion-NAS (88F5182) */ -#define MV88F5182_DEV_ID 0x5182 -#define MV88F5182_REV_A2 2 -/* Orion-2 (88F5281) */ -#define MV88F5281_DEV_ID 0x5281 -#define MV88F5281_REV_D0 4 -#define MV88F5281_REV_D1 5 -#define MV88F5281_REV_D2 6 -/* Orion-1-90 (88F6183) */ -#define MV88F6183_DEV_ID 0x6183 -#define MV88F6183_REV_B0 3 - -/* - * read feroceon core extra feature register - * using co-proc instruction - */ -static inline unsigned int readfr_extra_feature_reg(void) -{ - unsigned int val; - asm volatile ("mrc p15, 1, %0, c15, c1, 0 @ readfr exfr" : "=r" - (val) : : "cc"); - return val; -} - -/* - * write feroceon core extra feature register - * using co-proc instruction - */ -static inline void writefr_extra_feature_reg(unsigned int val) -{ - asm volatile ("mcr p15, 1, %0, c15, c1, 0 @ writefr exfr" : : "r" - (val) : "cc"); - isb(); -} - -/* - * AHB to Mbus Bridge Registers - * Source: 88F5182 User Manual, Appendix A, section A.4 - * Note: only windows 0 and 1 have remap capability. - */ -struct orion5x_win_registers { - u32 ctrl; - u32 base; - u32 remap_lo; - u32 remap_hi; -}; - -/* - * CPU control and status Registers - * Source: 88F5182 User Manual, Appendix A, section A.4 - */ -struct orion5x_cpu_registers { - u32 config; /*0x20100 */ - u32 ctrl_stat; /*0x20104 */ - u32 rstoutn_mask; /* 0x20108 */ - u32 sys_soft_rst; /* 0x2010C */ - u32 ahb_mbus_cause_irq; /* 0x20110 */ - u32 ahb_mbus_mask_irq; /* 0x20114 */ -}; - -/* - * DDR SDRAM Controller Address Decode Registers - * Source: 88F5182 User Manual, Appendix A, section A.5.1 - */ -struct orion5x_ddr_addr_decode_registers { - u32 base; - u32 size; -}; - -/* - * functions - */ -void reset_cpu(unsigned long ignored); -u32 orion5x_device_id(void); -u32 orion5x_device_rev(void); -unsigned int orion5x_winctrl_calcsize(unsigned int sizeval); -void timer_init_r(void); -#endif /* __ASSEMBLY__ */ -#endif /* _ORION5X_CPU_H */ diff --git a/arch/arm/include/asm/arch-orion5x/mv88f5182.h b/arch/arm/include/asm/arch-orion5x/mv88f5182.h deleted file mode 100644 index 86ba08d..0000000 --- a/arch/arm/include/asm/arch-orion5x/mv88f5182.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr> - * - * Based on original Kirkwood 88F6182 support which is - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Header file for Feroceon CPU core 88F5182 SOC. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _CONFIG_88F5182_H -#define _CONFIG_88F5182_H - -/* SOC specific definitions */ -#define F88F5182_REGS_PHYS_BASE 0xf1000000 -#define ORION5X_REGS_PHY_BASE F88F5182_REGS_PHYS_BASE - -/* TCLK Core Clock defination */ -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */ - -#endif /* _CONFIG_88F5182_H */ diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h deleted file mode 100644 index e3d3f76..0000000 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr> - * - * Based on original Kirkwood support which is - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * Header file for Marvell's Orion SoC with Feroceon CPU core. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ASM_ARCH_ORION5X_H -#define _ASM_ARCH_ORION5X_H - -#ifndef __ASSEMBLY__ -#include <asm/types.h> -#include <asm/io.h> -#endif /* __ASSEMBLY__ */ - -#if defined(CONFIG_FEROCEON) -#include <asm/arch/cpu.h> - -/* SOC specific definations */ -#define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x) - -/* Documented registers */ -#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000)) -#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000)) -#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100)) -#define ORION5X_MPP_BASE (ORION5X_REGISTER(0x10000)) -#define ORION5X_GPIO_BASE (ORION5X_REGISTER(0x10100)) -#define ORION5X_CPU_WIN_BASE (ORION5X_REGISTER(0x20000)) -#define ORION5X_CPU_REG_BASE (ORION5X_REGISTER(0x20100)) -#define ORION5X_TIMER_BASE (ORION5X_REGISTER(0x20300)) -#define ORION5X_REG_PCI_BASE (ORION5X_REGISTER(0x30000)) -#define ORION5X_REG_PCIE_BASE (ORION5X_REGISTER(0x40000)) -#define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000)) -#define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000)) -#define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000)) -#define ORION5X_SATA_BASE (ORION5X_REGISTER(0x80000)) -#define ORION5X_SATA_PORT0_OFFSET 0x2000 -#define ORION5X_SATA_PORT1_OFFSET 0x4000 - -/* Orion5x GbE controller has a single port */ -#define MAX_MVGBE_DEVS 1 -#define MVGBE0_BASE ORION5X_EGIGA_BASE - -#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024) - -/* include here SoC variants. 5181, 5281, 6183 should go here when - adding support for them, and this comment should then be updated. */ -#if defined(CONFIG_88F5182) -#include <asm/arch/mv88f5182.h> -#else -#error "SOC Name not defined" -#endif -#endif /* CONFIG_FEROCEON */ -#endif /* _ASM_ARCH_ORION5X_H */ diff --git a/arch/arm/include/asm/arch-pantheon/config.h b/arch/arm/include/asm/arch-pantheon/config.h deleted file mode 100644 index 710b386..0000000 --- a/arch/arm/include/asm/arch-pantheon/config.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _PANTHEON_CONFIG_H -#define _PANTHEON_CONFIG_H - -#define CONFIG_ARM926EJS 1 /* Basic Architecture */ - -#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ -#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ -#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ -#define MV_MFPR_BASE PANTHEON_MFPR_BASE -#define MV_UART_CONSOLE_BASE PANTHEON_UART1_BASE -#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register - represents UART Unit Enable */ - -#endif /* _PANTHEON_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-pantheon/cpu.h b/arch/arm/include/asm/arch-pantheon/cpu.h deleted file mode 100644 index 30f4393..0000000 --- a/arch/arm/include/asm/arch-pantheon/cpu.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _PANTHEON_CPU_H -#define _PANTHEON_CPU_H - -#include <asm/io.h> -#include <asm/system.h> - -/* - * Main Power Management (MPMU) Registers - * Refer Register Datasheet 9.1 - */ -struct panthmpmu_registers { - u8 pad0[0x0024]; - u32 ccgr; /*0x0024*/ - u8 pad1[0x0200 - 0x024 - 4]; - u32 wdtpcr; /*0x0200*/ - u8 pad2[0x1020 - 0x200 - 4]; - u32 aprr; /*0x1020*/ - u32 acgr; /*0x1024*/ -}; - -/* - * APB Clock Reset/Control Registers - * Refer Register Datasheet 6.14 - */ -struct panthapb_registers { - u32 uart0; /*0x000*/ - u32 uart1; /*0x004*/ - u32 gpio; /*0x008*/ - u8 pad0[0x034 - 0x08 - 4]; - u32 timers; /*0x034*/ -}; - -/* - * CPU Interface Registers - * Refer Register Datasheet 4.3 - */ -struct panthcpu_registers { - u32 chip_id; /* Chip Id Reg */ - u32 pad; - u32 cpu_conf; /* CPU Conf Reg */ - u32 pad1; - u32 cpu_sram_spd; /* CPU SRAM Speed Reg */ - u32 pad2; - u32 cpu_l2c_spd; /* CPU L2cache Speed Conf */ - u32 mcb_conf; /* MCB Conf Reg */ - u32 sys_boot_ctl; /* Sytem Boot Control */ -}; - -/* - * Functions - */ -u32 panth_sdram_base(int); -u32 panth_sdram_size(int); - -#endif /* _PANTHEON_CPU_H */ diff --git a/arch/arm/include/asm/arch-pantheon/mfp.h b/arch/arm/include/asm/arch-pantheon/mfp.h deleted file mode 100644 index fb291cf..0000000 --- a/arch/arm/include/asm/arch-pantheon/mfp.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Based on arch/arm/include/asm/arch-armada100/mfp.h - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef __PANTHEON_MFP_H -#define __PANTHEON_MFP_H - -/* - * Frequently used MFP Configuration macros for all PANTHEON family of SoCs - * - * offset, pull,pF, drv,dF, edge,eF ,afn,aF - */ -/* UART2 */ -#define MFP47_UART2_RXD MFP_REG(0x198) | MFP_AF6 | MFP_DRIVE_MEDIUM -#define MFP48_UART2_TXD MFP_REG(0x19c) | MFP_AF6 | MFP_DRIVE_MEDIUM - -/* More macros can be defined here... */ - -#define MFP_PIN_MAX 117 -#endif diff --git a/arch/arm/include/asm/arch-pantheon/pantheon.h b/arch/arm/include/asm/arch-pantheon/pantheon.h deleted file mode 100644 index e4ed087..0000000 --- a/arch/arm/include/asm/arch-pantheon/pantheon.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _PANTHEON_H -#define _PANTHEON_H - -#ifndef __ASSEMBLY__ -#include <asm/types.h> -#include <asm/io.h> -#endif /* __ASSEMBLY__ */ - -#include <asm/arch/cpu.h> - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1<<1) /* Functional Clock Enable */ -#define APBC_RST (1<<2) /* Reset Generation */ -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -/* Register Base Addresses */ -#define PANTHEON_DRAM_BASE 0xB0000000 -#define PANTHEON_TIMER_BASE 0xD4014000 -#define PANTHEON_WD_TIMER_BASE 0xD4080000 -#define PANTHEON_APBC_BASE 0xD4015000 -#define PANTHEON_UART1_BASE 0xD4017000 -#define PANTHEON_UART2_BASE 0xD4018000 -#define PANTHEON_GPIO_BASE 0xD4019000 -#define PANTHEON_MFPR_BASE 0xD401E000 -#define PANTHEON_MPMU_BASE 0xD4050000 -#define PANTHEON_CPU_BASE 0xD4282C00 - -#endif /* _PANTHEON_H */ diff --git a/arch/arm/include/asm/arch-pxa/bitfield.h b/arch/arm/include/asm/arch-pxa/bitfield.h deleted file mode 100644 index 104a21c..0000000 --- a/arch/arm/include/asm/arch-pxa/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/arch-pxa/hardware.h b/arch/arm/include/asm/arch-pxa/hardware.h deleted file mode 100644 index 44b800f..0000000 --- a/arch/arm/include/asm/arch-pxa/hardware.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/hardware.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: This file was taken from linux-2.4.19-rmk4-pxa1 - * - * - 2003/01/20 implementation specifics activated - * Robert Schwebel <r.schwebel@pengutronix.de> - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <linux/config.h> -#include <asm/mach-types.h> - -/* - * Define CONFIG_CPU_MONAHANS in case some CPU of the PXA3xx family is selected. - * PXA300/310/320 all have distinct register mappings in some cases, that's why - * the exact CPU has to be selected. CONFIG_CPU_MONAHANS is a helper for common - * drivers and compatibility glue with old source then. - */ -#ifndef CONFIG_CPU_MONAHANS -#if defined(CONFIG_CPU_PXA300) || \ - defined(CONFIG_CPU_PXA310) || \ - defined(CONFIG_CPU_PXA320) -#define CONFIG_CPU_MONAHANS -#endif -#endif - -/* - * These are statically mapped PCMCIA IO space for designs using it as a - * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. - * The actual PCMCIA code is mapping required IO region at run time. - */ -#define PCMCIA_IO_0_BASE 0xf6000000 -#define PCMCIA_IO_1_BASE 0xf7000000 - - -/* - * We requires absolute addresses. - */ -#define PCIO_BASE 0 - -/* - * Workarounds for at least 2 errata so far require this. - * The mapping is set in mach-pxa/generic.c. - */ -#define UNCACHED_PHYS_0 0xff000000 -#define UNCACHED_ADDR UNCACHED_PHYS_0 - -/* - * Intel PXA internal I/O mappings: - * - * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff - * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff - * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff - */ - -#include "pxa-regs.h" - -#ifndef __ASSEMBLY__ - -/* - * GPIO edge detection for IRQs: - * IRQs are generated on Falling-Edge, Rising-Edge, or both. - * This must be called *before* the corresponding IRQ is registered. - * Use this instead of directly setting GRER/GFER. - */ -#define GPIO_FALLING_EDGE 1 -#define GPIO_RISING_EDGE 2 -#define GPIO_BOTH_EDGES 3 -extern void set_GPIO_IRQ_edge( int gpio_nr, int edge_mask ); - -/* - * Handy routine to set GPIO alternate functions - */ -extern void set_GPIO_mode( int gpio_mode ); - -/* - * return current lclk frequency in units of 10kHz - */ -extern unsigned int get_lclk_frequency_10khz(void); - -#endif - - -/* - * Implementation specifics - */ - -#ifdef CONFIG_ARCH_LUBBOCK -#include "lubbock.h" -#endif - -#ifdef CONFIG_ARCH_PXA_IDP -#include "idp.h" -#endif - -#ifdef CONFIG_ARCH_PXA_CERF -#include "cerf.h" -#endif - -#ifdef CONFIG_ARCH_CSB226 -#include "csb226.h" -#endif - -#ifdef CONFIG_ARCH_INNOKOM -#include "innokom.h" -#endif - -#ifdef CONFIG_ARCH_PLEB -#include "pleb.h" -#endif - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h deleted file mode 100644 index 65a387f..0000000 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ /dev/null @@ -1,2800 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * - 2003/01/20: Robert Schwebel <r.schwebel@pengutronix.de - * Original file taken from linux-2.4.19-rmk4-pxa1. Added some definitions. - * Added include for hardware.h (for __REG definition) - */ -#ifndef _PXA_REGS_H_ -#define _PXA_REGS_H_ - -#include "bitfield.h" -#include "hardware.h" - -/* FIXME hack so that SA-1111.h will work [cb] */ - -#ifndef __ASSEMBLY__ -typedef unsigned short Word16 ; -typedef unsigned int Word32 ; -typedef Word32 Word ; -typedef Word Quad [4] ; -typedef void *Address ; -typedef void (*ExcpHndlr) (void) ; -#endif - -/* - * PXA Chip selects - */ -#ifdef CONFIG_CPU_MONAHANS -#define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */ -#define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */ -#define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */ -#define PXA_CS2_PHYS 0x10000000 /* (64MB) */ -#define PXA_CS3_PHYS 0x14000000 /* (64MB) */ -#define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */ -#else -#define PXA_CS0_PHYS 0x00000000 -#define PXA_CS1_PHYS 0x04000000 -#define PXA_CS2_PHYS 0x08000000 -#define PXA_CS3_PHYS 0x0C000000 -#define PXA_CS4_PHYS 0x10000000 -#define PXA_CS5_PHYS 0x14000000 -#endif /* CONFIG_CPU_MONAHANS */ - -/* - * Personal Computer Memory Card International Association (PCMCIA) sockets - */ -#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ -#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ -#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ -#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ -#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ - -#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */ -#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ -#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ -#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ -#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ -#endif - -#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ -#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ -#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ -#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ - -#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) -#define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ -#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) -#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) - -#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ -#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ -#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ -#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ - -#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */ -#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ -#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ -#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ -#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ -#endif - -/* - * DMA Controller - */ -#define DCSR0 0x40000000 /* DMA Control / Status Register for Channel 0 */ -#define DCSR1 0x40000004 /* DMA Control / Status Register for Channel 1 */ -#define DCSR2 0x40000008 /* DMA Control / Status Register for Channel 2 */ -#define DCSR3 0x4000000c /* DMA Control / Status Register for Channel 3 */ -#define DCSR4 0x40000010 /* DMA Control / Status Register for Channel 4 */ -#define DCSR5 0x40000014 /* DMA Control / Status Register for Channel 5 */ -#define DCSR6 0x40000018 /* DMA Control / Status Register for Channel 6 */ -#define DCSR7 0x4000001c /* DMA Control / Status Register for Channel 7 */ -#define DCSR8 0x40000020 /* DMA Control / Status Register for Channel 8 */ -#define DCSR9 0x40000024 /* DMA Control / Status Register for Channel 9 */ -#define DCSR10 0x40000028 /* DMA Control / Status Register for Channel 10 */ -#define DCSR11 0x4000002c /* DMA Control / Status Register for Channel 11 */ -#define DCSR12 0x40000030 /* DMA Control / Status Register for Channel 12 */ -#define DCSR13 0x40000034 /* DMA Control / Status Register for Channel 13 */ -#define DCSR14 0x40000038 /* DMA Control / Status Register for Channel 14 */ -#define DCSR15 0x4000003c /* DMA Control / Status Register for Channel 15 */ -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define DCSR16 0x40000040 /* DMA Control / Status Register for Channel 16 */ -#define DCSR17 0x40000044 /* DMA Control / Status Register for Channel 17 */ -#define DCSR18 0x40000048 /* DMA Control / Status Register for Channel 18 */ -#define DCSR19 0x4000004c /* DMA Control / Status Register for Channel 19 */ -#define DCSR20 0x40000050 /* DMA Control / Status Register for Channel 20 */ -#define DCSR21 0x40000054 /* DMA Control / Status Register for Channel 21 */ -#define DCSR22 0x40000058 /* DMA Control / Status Register for Channel 22 */ -#define DCSR23 0x4000005c /* DMA Control / Status Register for Channel 23 */ -#define DCSR24 0x40000060 /* DMA Control / Status Register for Channel 24 */ -#define DCSR25 0x40000064 /* DMA Control / Status Register for Channel 25 */ -#define DCSR26 0x40000068 /* DMA Control / Status Register for Channel 26 */ -#define DCSR27 0x4000006c /* DMA Control / Status Register for Channel 27 */ -#define DCSR28 0x40000070 /* DMA Control / Status Register for Channel 28 */ -#define DCSR29 0x40000074 /* DMA Control / Status Register for Channel 29 */ -#define DCSR30 0x40000078 /* DMA Control / Status Register for Channel 30 */ -#define DCSR31 0x4000007c /* DMA Control / Status Register for Channel 31 */ -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -#define DCSR(x) (0x40000000 | ((x) << 2)) - -#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ -#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ - -#if defined(CONFIG_PXA27X) || defined (CONFIG_CPU_MONAHANS) -#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ -#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ -#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_ENRINTR (1 << 9) /* The end of Receive */ -#endif - -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ - -#define DINT 0x400000f0 /* DMA Interrupt Register */ - -#define DRCMR0 0x40000100 /* Request to Channel Map Register for DREQ 0 */ -#define DRCMR1 0x40000104 /* Request to Channel Map Register for DREQ 1 */ -#define DRCMR2 0x40000108 /* Request to Channel Map Register for I2S receive Request */ -#define DRCMR3 0x4000010c /* Request to Channel Map Register for I2S transmit Request */ -#define DRCMR4 0x40000110 /* Request to Channel Map Register for BTUART receive Request */ -#define DRCMR5 0x40000114 /* Request to Channel Map Register for BTUART transmit Request. */ -#define DRCMR6 0x40000118 /* Request to Channel Map Register for FFUART receive Request */ -#define DRCMR7 0x4000011c /* Request to Channel Map Register for FFUART transmit Request */ -#define DRCMR8 0x40000120 /* Request to Channel Map Register for AC97 microphone Request */ -#define DRCMR9 0x40000124 /* Request to Channel Map Register for AC97 modem receive Request */ -#define DRCMR10 0x40000128 /* Request to Channel Map Register for AC97 modem transmit Request */ -#define DRCMR11 0x4000012c /* Request to Channel Map Register for AC97 audio receive Request */ -#define DRCMR12 0x40000130 /* Request to Channel Map Register for AC97 audio transmit Request */ -#define DRCMR13 0x40000134 /* Request to Channel Map Register for SSP receive Request */ -#define DRCMR14 0x40000138 /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 0x4000013c /* Reserved */ -#define DRCMR16 0x40000140 /* Reserved */ -#define DRCMR17 0x40000144 /* Request to Channel Map Register for ICP receive Request */ -#define DRCMR18 0x40000148 /* Request to Channel Map Register for ICP transmit Request */ -#define DRCMR19 0x4000014c /* Request to Channel Map Register for STUART receive Request */ -#define DRCMR20 0x40000150 /* Request to Channel Map Register for STUART transmit Request */ -#define DRCMR21 0x40000154 /* Request to Channel Map Register for MMC receive Request */ -#define DRCMR22 0x40000158 /* Request to Channel Map Register for MMC transmit Request */ -#define DRCMR23 0x4000015c /* Reserved */ -#define DRCMR24 0x40000160 /* Reserved */ -#define DRCMR25 0x40000164 /* Request to Channel Map Register for USB endpoint 1 Request */ -#define DRCMR26 0x40000168 /* Request to Channel Map Register for USB endpoint 2 Request */ -#define DRCMR27 0x4000016C /* Request to Channel Map Register for USB endpoint 3 Request */ -#define DRCMR28 0x40000170 /* Request to Channel Map Register for USB endpoint 4 Request */ -#define DRCMR29 0x40000174 /* Reserved */ -#define DRCMR30 0x40000178 /* Request to Channel Map Register for USB endpoint 6 Request */ -#define DRCMR31 0x4000017C /* Request to Channel Map Register for USB endpoint 7 Request */ -#define DRCMR32 0x40000180 /* Request to Channel Map Register for USB endpoint 8 Request */ -#define DRCMR33 0x40000184 /* Request to Channel Map Register for USB endpoint 9 Request */ -#define DRCMR34 0x40000188 /* Reserved */ -#define DRCMR35 0x4000018C /* Request to Channel Map Register for USB endpoint 11 Request */ -#define DRCMR36 0x40000190 /* Request to Channel Map Register for USB endpoint 12 Request */ -#define DRCMR37 0x40000194 /* Request to Channel Map Register for USB endpoint 13 Request */ -#define DRCMR38 0x40000198 /* Request to Channel Map Register for USB endpoint 14 Request */ -#define DRCMR39 0x4000019C /* Reserved */ - -#define DRCMR68 0x40001110 /* Request to Channel Map Register for Camera FIFO 0 Request */ -#define DRCMR69 0x40001114 /* Request to Channel Map Register for Camera FIFO 1 Request */ -#define DRCMR70 0x40001118 /* Request to Channel Map Register for Camera FIFO 2 Request */ - -#define DRCMRRXSADR DRCMR2 -#define DRCMRTXSADR DRCMR3 -#define DRCMRRXBTRBR DRCMR4 -#define DRCMRTXBTTHR DRCMR5 -#define DRCMRRXFFRBR DRCMR6 -#define DRCMRTXFFTHR DRCMR7 -#define DRCMRRXMCDR DRCMR8 -#define DRCMRRXMODR DRCMR9 -#define DRCMRTXMODR DRCMR10 -#define DRCMRRXPCDR DRCMR11 -#define DRCMRTXPCDR DRCMR12 -#define DRCMRRXSSDR DRCMR13 -#define DRCMRTXSSDR DRCMR14 -#define DRCMRRXICDR DRCMR17 -#define DRCMRTXICDR DRCMR18 -#define DRCMRRXSTRBR DRCMR19 -#define DRCMRTXSTTHR DRCMR20 -#define DRCMRRXMMC DRCMR21 -#define DRCMRTXMMC DRCMR22 - -#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ -#define DRCMR_CHLNUM 0x0f /* mask for Channel Number (read / write) */ - -#define DDADR0 0x40000200 /* DMA Descriptor Address Register Channel 0 */ -#define DSADR0 0x40000204 /* DMA Source Address Register Channel 0 */ -#define DTADR0 0x40000208 /* DMA Target Address Register Channel 0 */ -#define DCMD0 0x4000020c /* DMA Command Address Register Channel 0 */ -#define DDADR1 0x40000210 /* DMA Descriptor Address Register Channel 1 */ -#define DSADR1 0x40000214 /* DMA Source Address Register Channel 1 */ -#define DTADR1 0x40000218 /* DMA Target Address Register Channel 1 */ -#define DCMD1 0x4000021c /* DMA Command Address Register Channel 1 */ -#define DDADR2 0x40000220 /* DMA Descriptor Address Register Channel 2 */ -#define DSADR2 0x40000224 /* DMA Source Address Register Channel 2 */ -#define DTADR2 0x40000228 /* DMA Target Address Register Channel 2 */ -#define DCMD2 0x4000022c /* DMA Command Address Register Channel 2 */ -#define DDADR3 0x40000230 /* DMA Descriptor Address Register Channel 3 */ -#define DSADR3 0x40000234 /* DMA Source Address Register Channel 3 */ -#define DTADR3 0x40000238 /* DMA Target Address Register Channel 3 */ -#define DCMD3 0x4000023c /* DMA Command Address Register Channel 3 */ -#define DDADR4 0x40000240 /* DMA Descriptor Address Register Channel 4 */ -#define DSADR4 0x40000244 /* DMA Source Address Register Channel 4 */ -#define DTADR4 0x40000248 /* DMA Target Address Register Channel 4 */ -#define DCMD4 0x4000024c /* DMA Command Address Register Channel 4 */ -#define DDADR5 0x40000250 /* DMA Descriptor Address Register Channel 5 */ -#define DSADR5 0x40000254 /* DMA Source Address Register Channel 5 */ -#define DTADR5 0x40000258 /* DMA Target Address Register Channel 5 */ -#define DCMD5 0x4000025c /* DMA Command Address Register Channel 5 */ -#define DDADR6 0x40000260 /* DMA Descriptor Address Register Channel 6 */ -#define DSADR6 0x40000264 /* DMA Source Address Register Channel 6 */ -#define DTADR6 0x40000268 /* DMA Target Address Register Channel 6 */ -#define DCMD6 0x4000026c /* DMA Command Address Register Channel 6 */ -#define DDADR7 0x40000270 /* DMA Descriptor Address Register Channel 7 */ -#define DSADR7 0x40000274 /* DMA Source Address Register Channel 7 */ -#define DTADR7 0x40000278 /* DMA Target Address Register Channel 7 */ -#define DCMD7 0x4000027c /* DMA Command Address Register Channel 7 */ -#define DDADR8 0x40000280 /* DMA Descriptor Address Register Channel 8 */ -#define DSADR8 0x40000284 /* DMA Source Address Register Channel 8 */ -#define DTADR8 0x40000288 /* DMA Target Address Register Channel 8 */ -#define DCMD8 0x4000028c /* DMA Command Address Register Channel 8 */ -#define DDADR9 0x40000290 /* DMA Descriptor Address Register Channel 9 */ -#define DSADR9 0x40000294 /* DMA Source Address Register Channel 9 */ -#define DTADR9 0x40000298 /* DMA Target Address Register Channel 9 */ -#define DCMD9 0x4000029c /* DMA Command Address Register Channel 9 */ -#define DDADR10 0x400002a0 /* DMA Descriptor Address Register Channel 10 */ -#define DSADR10 0x400002a4 /* DMA Source Address Register Channel 10 */ -#define DTADR10 0x400002a8 /* DMA Target Address Register Channel 10 */ -#define DCMD10 0x400002ac /* DMA Command Address Register Channel 10 */ -#define DDADR11 0x400002b0 /* DMA Descriptor Address Register Channel 11 */ -#define DSADR11 0x400002b4 /* DMA Source Address Register Channel 11 */ -#define DTADR11 0x400002b8 /* DMA Target Address Register Channel 11 */ -#define DCMD11 0x400002bc /* DMA Command Address Register Channel 11 */ -#define DDADR12 0x400002c0 /* DMA Descriptor Address Register Channel 12 */ -#define DSADR12 0x400002c4 /* DMA Source Address Register Channel 12 */ -#define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ -#define DCMD12 0x400002cc /* DMA Command Address Register Channel 12 */ -#define DDADR13 0x400002d0 /* DMA Descriptor Address Register Channel 13 */ -#define DSADR13 0x400002d4 /* DMA Source Address Register Channel 13 */ -#define DTADR13 0x400002d8 /* DMA Target Address Register Channel 13 */ -#define DCMD13 0x400002dc /* DMA Command Address Register Channel 13 */ -#define DDADR14 0x400002e0 /* DMA Descriptor Address Register Channel 14 */ -#define DSADR14 0x400002e4 /* DMA Source Address Register Channel 14 */ -#define DTADR14 0x400002e8 /* DMA Target Address Register Channel 14 */ -#define DCMD14 0x400002ec /* DMA Command Address Register Channel 14 */ -#define DDADR15 0x400002f0 /* DMA Descriptor Address Register Channel 15 */ -#define DSADR15 0x400002f4 /* DMA Source Address Register Channel 15 */ -#define DTADR15 0x400002f8 /* DMA Target Address Register Channel 15 */ -#define DCMD15 0x400002fc /* DMA Command Address Register Channel 15 */ - -#define DDADR(x) (0x40000200 | ((x) << 4)) -#define DSADR(x) (0x40000204 | ((x) << 4)) -#define DTADR(x) (0x40000208 | ((x) << 4)) -#define DCMD(x) (0x4000020c | ((x) << 4)) - -#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ -#define DDADR_STOP (1 << 0) /* Stop (read / write) */ - -#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ -#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ -#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ -#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ -#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ -#define DCMD_BURST8 (1 << 16) /* 8 byte burst */ -#define DCMD_BURST16 (2 << 16) /* 16 byte burst */ -#define DCMD_BURST32 (3 << 16) /* 32 byte burst */ -#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ -#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ -#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - -/* default combinations */ -#define DCMD_RXPCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4) -#define DCMD_RXMCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4) -#define DCMD_TXPCDR (DCMD_INCSRCADDR|DCMD_FLOWTRG|DCMD_BURST32|DCMD_WIDTH4) - -/******************************************************************************/ -/* - * UARTs - */ -/* Full Function UART (FFUART) */ -#define FFUART FFRBR -#define FFRBR 0x40100000 /* Receive Buffer Register (read only) */ -#define FFTHR 0x40100000 /* Transmit Holding Register (write only) */ -#define FFIER 0x40100004 /* Interrupt Enable Register (read/write) */ -#define FFIIR 0x40100008 /* Interrupt ID Register (read only) */ -#define FFFCR 0x40100008 /* FIFO Control Register (write only) */ -#define FFLCR 0x4010000C /* Line Control Register (read/write) */ -#define FFMCR 0x40100010 /* Modem Control Register (read/write) */ -#define FFLSR 0x40100014 /* Line Status Register (read only) */ -#define FFMSR 0x40100018 /* Modem Status Register (read only) */ -#define FFSPR 0x4010001C /* Scratch Pad Register (read/write) */ -#define FFISR 0x40100020 /* Infrared Selection Register (read/write) */ -#define FFDLL 0x40100000 /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define FFDLH 0x40100004 /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Bluetooth UART (BTUART) */ -#define BTUART BTRBR -#define BTRBR 0x40200000 /* Receive Buffer Register (read only) */ -#define BTTHR 0x40200000 /* Transmit Holding Register (write only) */ -#define BTIER 0x40200004 /* Interrupt Enable Register (read/write) */ -#define BTIIR 0x40200008 /* Interrupt ID Register (read only) */ -#define BTFCR 0x40200008 /* FIFO Control Register (write only) */ -#define BTLCR 0x4020000C /* Line Control Register (read/write) */ -#define BTMCR 0x40200010 /* Modem Control Register (read/write) */ -#define BTLSR 0x40200014 /* Line Status Register (read only) */ -#define BTMSR 0x40200018 /* Modem Status Register (read only) */ -#define BTSPR 0x4020001C /* Scratch Pad Register (read/write) */ -#define BTISR 0x40200020 /* Infrared Selection Register (read/write) */ -#define BTDLL 0x40200000 /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define BTDLH 0x40200004 /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Standard UART (STUART) */ -#define STUART STRBR -#define STRBR 0x40700000 /* Receive Buffer Register (read only) */ -#define STTHR 0x40700000 /* Transmit Holding Register (write only) */ -#define STIER 0x40700004 /* Interrupt Enable Register (read/write) */ -#define STIIR 0x40700008 /* Interrupt ID Register (read only) */ -#define STFCR 0x40700008 /* FIFO Control Register (write only) */ -#define STLCR 0x4070000C /* Line Control Register (read/write) */ -#define STMCR 0x40700010 /* Modem Control Register (read/write) */ -#define STLSR 0x40700014 /* Line Status Register (read only) */ -#define STMSR 0x40700018 /* Reserved */ -#define STSPR 0x4070001C /* Scratch Pad Register (read/write) */ -#define STISR 0x40700020 /* Infrared Selection Register (read/write) */ -#define STDLL 0x40700000 /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define STDLH 0x40700004 /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -#define IER_DMAE (1 << 7) /* DMA Requests Enable */ -#define IER_UUE (1 << 6) /* UART Unit Enable */ -#define IER_NRZE (1 << 5) /* NRZ coding Enable */ -#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */ -#define IER_MIE (1 << 3) /* Modem Interrupt Enable */ -#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */ -#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */ -#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */ - -#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */ -#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */ -#define IIR_TOD (1 << 3) /* Time Out Detected */ -#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */ -#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */ -#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */ - -#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */ -#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */ -#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */ -#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */ -#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */ -#define FCR_ITL_1 (0) -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */ -#define LCR_SB (1 << 6) /* Set Break */ -#define LCR_STKYP (1 << 5) /* Sticky Parity */ -#define LCR_EPS (1 << 4) /* Even Parity Select */ -#define LCR_PEN (1 << 3) /* Parity Enable */ -#define LCR_STB (1 << 2) /* Stop Bit */ -#define LCR_WLS1 (1 << 1) /* Word Length Select */ -#define LCR_WLS0 (1 << 0) /* Word Length Select */ - -#define LSR_FIFOE (1 << 7) /* FIFO Error Status */ -#define LSR_TEMT (1 << 6) /* Transmitter Empty */ -#define LSR_TDRQ (1 << 5) /* Transmit Data Request */ -#define LSR_BI (1 << 4) /* Break Interrupt */ -#define LSR_FE (1 << 3) /* Framing Error */ -#define LSR_PE (1 << 2) /* Parity Error */ -#define LSR_OE (1 << 1) /* Overrun Error */ -#define LSR_DR (1 << 0) /* Data Ready */ - -#define MCR_LOOP (1 << 4) /* */ -#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */ -#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */ -#define MCR_RTS (1 << 1) /* Request to Send */ -#define MCR_DTR (1 << 0) /* Data Terminal Ready */ - -#define MSR_DCD (1 << 7) /* Data Carrier Detect */ -#define MSR_RI (1 << 6) /* Ring Indicator */ -#define MSR_DSR (1 << 5) /* Data Set Ready */ -#define MSR_CTS (1 << 4) /* Clear To Send */ -#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */ -#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */ -#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */ -#define MSR_DCTS (1 << 0) /* Delta Clear To Send */ - -/******************************************************************************/ -/* - * IrSR (Infrared Selection Register) - */ -#define IrSR_OFFSET 0x20 - -#define IrSR_RXPL_NEG_IS_ZERO (1<<4) -#define IrSR_RXPL_POS_IS_ZERO 0x0 -#define IrSR_TXPL_NEG_IS_ZERO (1<<3) -#define IrSR_TXPL_POS_IS_ZERO 0x0 -#define IrSR_XMODE_PULSE_1_6 (1<<2) -#define IrSR_XMODE_PULSE_3_16 0x0 -#define IrSR_RCVEIR_IR_MODE (1<<1) -#define IrSR_RCVEIR_UART_MODE 0x0 -#define IrSR_XMITIR_IR_MODE (1<<0) -#define IrSR_XMITIR_UART_MODE 0x0 - -#define IrSR_IR_RECEIVE_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_IR_MODE | \ - IrSR_XMITIR_UART_MODE) - -#define IrSR_IR_TRANSMIT_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_UART_MODE | \ - IrSR_XMITIR_IR_MODE) - -/* - * I2C registers - */ -#define IBMR 0x40301680 /* I2C Bus Monitor Register - IBMR */ -#define IDBR 0x40301688 /* I2C Data Buffer Register - IDBR */ -#define ICR 0x40301690 /* I2C Control Register - ICR */ -#define ISR 0x40301698 /* I2C Status Register - ISR */ -#define ISAR 0x403016A0 /* I2C Slave Address Register - ISAR */ - -#ifdef CONFIG_CPU_MONAHANS -#define PWRIBMR 0x40f500C0 /* Power I2C Bus Monitor Register-IBMR */ -#define PWRIDBR 0x40f500C4 /* Power I2C Data Buffer Register-IDBR */ -#define PWRICR 0x40f500C8 /* Power I2C Control Register - ICR */ -#define PWRISR 0x40f500CC /* Power I2C Status Register - ISR */ -#define PWRISAR 0x40f500D0 /* Power I2C Slave Address Register-ISAR */ -#else -#define PWRIBMR 0x40f00180 /* Power I2C Bus Monitor Register-IBMR */ -#define PWRIDBR 0x40f00188 /* Power I2C Data Buffer Register-IDBR */ -#define PWRICR 0x40f00190 /* Power I2C Control Register - ICR */ -#define PWRISR 0x40f00198 /* Power I2C Status Register - ISR */ -#define PWRISAR 0x40f001A0 /* Power I2C Slave Address Register-ISAR */ -#endif - -/* ----- Control register bits ---------------------------------------- */ - -#define ICR_START 0x1 /* start bit */ -#define ICR_STOP 0x2 /* stop bit */ -#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */ -#define ICR_TB 0x8 /* transfer byte bit */ -#define ICR_MA 0x10 /* master abort */ -#define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */ -#define ICR_IUE 0x40 /* unit enable */ -#define ICR_GCD 0x80 /* general call disable */ -#define ICR_ITEIE 0x100 /* enable tx interrupts */ -#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */ -#define ICR_BEIE 0x400 /* enable bus error ints */ -#define ICR_SSDIE 0x800 /* slave STOP detected int enable */ -#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */ -#define ICR_SADIE 0x2000 /* slave address detected int enable */ -#define ICR_UR 0x4000 /* unit reset */ -#define ICR_FM 0x8000 /* Fast Mode */ - -/* ----- Status register bits ----------------------------------------- */ - -#define ISR_RWM 0x1 /* read/write mode */ -#define ISR_ACKNAK 0x2 /* ack/nak status */ -#define ISR_UB 0x4 /* unit busy */ -#define ISR_IBB 0x8 /* bus busy */ -#define ISR_SSD 0x10 /* slave stop detected */ -#define ISR_ALD 0x20 /* arbitration loss detected */ -#define ISR_ITE 0x40 /* tx buffer empty */ -#define ISR_IRF 0x80 /* rx buffer full */ -#define ISR_GCAD 0x100 /* general call address detected */ -#define ISR_SAD 0x200 /* slave address detected */ -#define ISR_BED 0x400 /* bus error no ACK/NAK */ - -/* - * Serial Audio Controller - */ -/* FIXME the audio defines collide w/ the SA1111 defines. I don't like these - * short defines because there is too much chance of namespace collision - */ -#define SACR0 0x40400000 /* Global Control Register */ -#define SACR1 0x40400004 /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 0x4040000C /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR 0x40400014 /* Serial Audio Interrupt Mask Register */ -#define SAICR 0x40400018 /* Serial Audio Interrupt Clear Register */ -#define SADIV 0x40400060 /* Audio Clock Divider Register. */ -#define SADR 0x40400080 /* Serial Audio Data Register (TX and RX FIFO access Register). */ - -/* - * AC97 Controller registers - */ -#define POCR 0x40500000 /* PCM Out Control Register */ -#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define PICR 0x40500004 /* PCM In Control Register */ -#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define MCCR 0x40500008 /* Mic In Control Register */ -#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define GCR 0x4050000C /* Global Control Register */ -#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ -#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ -#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */ -#define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */ -#define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */ -#define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */ -#define GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */ -#define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */ -#define GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */ -#define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */ - -#define POSR 0x40500010 /* PCM Out Status Register */ -#define POSR_FIFOE (1 << 4) /* FIFO error */ - -#define PISR 0x40500014 /* PCM In Status Register */ -#define PISR_FIFOE (1 << 4) /* FIFO error */ - -#define MCSR 0x40500018 /* Mic In Status Register */ -#define MCSR_FIFOE (1 << 4) /* FIFO error */ - -#define GSR 0x4050001C /* Global Status Register */ -#define GSR_CDONE (1 << 19) /* Command Done */ -#define GSR_SDONE (1 << 18) /* Status Done */ -#define GSR_RDCS (1 << 15) /* Read Completion Status */ -#define GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */ -#define GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */ -#define GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */ -#define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */ -#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */ -#define GSR_SCR (1 << 9) /* Secondary Codec Ready */ -#define GSR_PCR (1 << 8) /* Primary Codec Ready */ -#define GSR_MINT (1 << 7) /* Mic In Interrupt */ -#define GSR_POINT (1 << 6) /* PCM Out Interrupt */ -#define GSR_PIINT (1 << 5) /* PCM In Interrupt */ -#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */ -#define GSR_MIINT (1 << 1) /* Modem In Interrupt */ -#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */ - -#define CAR 0x40500020 /* CODEC Access Register */ -#define CAR_CAIP (1 << 0) /* Codec Access In Progress */ - -#define PCDR 0x40500040 /* PCM FIFO Data Register */ -#define MCDR 0x40500060 /* Mic-in FIFO Data Register */ - -#define MOCR 0x40500100 /* Modem Out Control Register */ -#define MOCR_FEIE (1 << 3) /* FIFO Error */ - -#define MICR 0x40500108 /* Modem In Control Register */ -#define MICR_FEIE (1 << 3) /* FIFO Error */ - -#define MOSR 0x40500110 /* Modem Out Status Register */ -#define MOSR_FIFOE (1 << 4) /* FIFO error */ - -#define MISR 0x40500118 /* Modem In Status Register */ -#define MISR_FIFOE (1 << 4) /* FIFO error */ - -#define MODR 0x40500140 /* Modem FIFO Data Register */ - -#define PAC_REG_BASE 0x40500200 /* Primary Audio Codec */ -#define SAC_REG_BASE 0x40500300 /* Secondary Audio Codec */ -#define PMC_REG_BASE 0x40500400 /* Primary Modem Codec */ -#define SMC_REG_BASE 0x40500500 /* Secondary Modem Codec */ - - -/* - * USB Device Controller - */ -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) - -#define UDCCR 0x40600000 /* UDC Control Register */ -#define UDCCR_UDE (1 << 0) /* UDC enable */ -#define UDCCR_UDA (1 << 1) /* UDC active */ -#define UDCCR_RSM (1 << 2) /* Device resume */ -#define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */ -#define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active Configuration */ -#define UDCCR_RESIR (1 << 29) /* Resume interrupt request */ -#define UDCCR_SUSIR (1 << 28) /* Suspend interrupt request */ -#define UDCCR_SM (1 << 28) /* Suspend interrupt mask */ -#define UDCCR_RSTIR (1 << 27) /* Reset interrupt request */ -#define UDCCR_REM (1 << 27) /* Reset interrupt mask */ -#define UDCCR_RM (1 << 29) /* resume interrupt mask */ -#define UDCCR_SRM (UDCCR_SM|UDCCR_RM) -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocol Port Support */ -#define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol Support */ -#define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol Enable */ -#define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ -#define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ -#define UDCCR_ACN_S 11 -#define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ -#define UDCCR_AIN_S 8 -#define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface Setting Number */ -#define UDCCR_AAISN_S 5 - -#define UDCCS0 0x40600100 /* UDC Endpoint 0 Control/Status Register */ -#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ -#define UDCCS0_IPR (1 << 1) /* IN packet ready */ -#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS0_DRWF (1 << 16) /* Device remote wakeup feature */ -#define UDCCS0_SST (1 << 4) /* Sent stall */ -#define UDCCS0_FST (1 << 5) /* Force stall */ -#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ -#define UDCCS0_SA (1 << 7) /* Setup active */ - -/* Bulk IN - Endpoint 1,6,11 */ -#define UDCCS1 0x40600104 /* UDC Endpoint 1 (IN) Control/Status Register */ -#define UDCCS6 0x40600028 /* UDC Endpoint 6 (IN) Control/Status Register */ -#define UDCCS11 0x4060003C /* UDC Endpoint 11 (IN) Control/Status Register */ - -#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_BI_FTF (1 << 8) /* Flush Tx FIFO */ -#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_BI_SST (1 << 4) /* Sent stall */ -#define UDCCS_BI_FST (1 << 5) /* Force stall */ -#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ - -/* Bulk OUT - Endpoint 2,7,12 */ -#define UDCCS2 0x40600108 /* UDC Endpoint 2 (OUT) Control/Status Register */ -#define UDCCS7 0x4060002C /* UDC Endpoint 7 (OUT) Control/Status Register */ -#define UDCCS12 0x40600040 /* UDC Endpoint 12 (OUT) Control/Status Register */ - -#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_BO_DME (1 << 3) /* DMA enable */ -#define UDCCS_BO_SST (1 << 4) /* Sent stall */ -#define UDCCS_BO_FST (1 << 5) /* Force stall */ -#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ - -/* Isochronous IN - Endpoint 3,8,13 */ -#define UDCCS3 0x4060001C /* UDC Endpoint 3 (IN) Control/Status Register */ -#define UDCCS8 0x40600030 /* UDC Endpoint 8 (IN) Control/Status Register */ -#define UDCCS13 0x40600044 /* UDC Endpoint 13 (IN) Control/Status Register */ - -#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ - -/* Isochronous OUT - Endpoint 4,9,14 */ -#define UDCCS4 0x40600020 /* UDC Endpoint 4 (OUT) Control/Status Register */ -#define UDCCS9 0x40600034 /* UDC Endpoint 9 (OUT) Control/Status Register */ -#define UDCCS14 0x40600048 /* UDC Endpoint 14 (OUT) Control/Status Register */ - -#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ -#define UDCCS_IO_DME (1 << 3) /* DMA enable */ -#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ - -/* Interrupt IN - Endpoint 5,10,15 */ -#define UDCCS5 0x40600024 /* UDC Endpoint 5 (Interrupt) Control/Status Register */ -#define UDCCS10 0x40600038 /* UDC Endpoint 10 (Interrupt) Control/Status Register */ -#define UDCCS15 0x4060004C /* UDC Endpoint 15 (Interrupt) Control/Status Register */ - -#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_INT_SST (1 << 4) /* Sent stall */ -#define UDCCS_INT_FST (1 << 5) /* Force stall */ -#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ - -#define UFNRH 0x40600060 /* UDC Frame Number Register High */ -#define UFNRL 0x40600014 /* UDC Frame Number Register Low */ -#define UBCR2 0x40600208 /* UDC Byte Count Reg 2 */ -#define UBCR4 0x4060006c /* UDC Byte Count Reg 4 */ -#define UBCR7 0x40600070 /* UDC Byte Count Reg 7 */ -#define UBCR9 0x40600074 /* UDC Byte Count Reg 9 */ -#define UBCR12 0x40600078 /* UDC Byte Count Reg 12 */ -#define UBCR14 0x4060007c /* UDC Byte Count Reg 14 */ -#define UDDR0 0x40600300 /* UDC Endpoint 0 Data Register */ -#define UDDR1 0x40600304 /* UDC Endpoint 1 Data Register */ -#define UDDR2 0x40600308 /* UDC Endpoint 2 Data Register */ -#define UDDR3 0x40600200 /* UDC Endpoint 3 Data Register */ -#define UDDR4 0x40600400 /* UDC Endpoint 4 Data Register */ -#define UDDR5 0x406000A0 /* UDC Endpoint 5 Data Register */ -#define UDDR6 0x40600600 /* UDC Endpoint 6 Data Register */ -#define UDDR7 0x40600680 /* UDC Endpoint 7 Data Register */ -#define UDDR8 0x40600700 /* UDC Endpoint 8 Data Register */ -#define UDDR9 0x40600900 /* UDC Endpoint 9 Data Register */ -#define UDDR10 0x406000C0 /* UDC Endpoint 10 Data Register */ -#define UDDR11 0x40600B00 /* UDC Endpoint 11 Data Register */ -#define UDDR12 0x40600B80 /* UDC Endpoint 12 Data Register */ -#define UDDR13 0x40600C00 /* UDC Endpoint 13 Data Register */ -#define UDDR14 0x40600E00 /* UDC Endpoint 14 Data Register */ -#define UDDR15 0x406000E0 /* UDC Endpoint 15 Data Register */ - -#define UICR0 0x40600004 /* UDC Interrupt Control Register 0 */ - -#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ -#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ -#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ -#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ -#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ -#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ -#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ -#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ - -#define UICR1 0x40600008 /* UDC Interrupt Control Register 1 */ - -#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ -#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ -#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ -#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ -#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ -#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ -#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ -#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ - -#define USIR0 0x4060000C /* UDC Status Interrupt Register 0 */ - -#define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */ -#define USIR0_IR1 (1 << 2) /* Interrup request ep 1 */ -#define USIR0_IR2 (1 << 4) /* Interrup request ep 2 */ -#define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */ -#define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */ -#define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */ -#define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */ -#define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */ - -#define USIR1 0x40600010 /* UDC Status Interrupt Register 1 */ - -#define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */ -#define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */ -#define USIR1_IR10 (1 << 2) /* Interrup request ep 10 */ -#define USIR1_IR11 (1 << 3) /* Interrup request ep 11 */ -#define USIR1_IR12 (1 << 4) /* Interrup request ep 12 */ -#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */ -#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */ -#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */ - - -#define UDCICR0 0x40600004 /* UDC Interrupt Control Register0 */ -#define UDCICR1 0x40600008 /* UDC Interrupt Control Register1 */ -#define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ -#define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ - -#define UDCICR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ -#define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ -#define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ -#define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ - -#define UDCISR0 0x4060000C /* UDC Interrupt Status Register 0 */ -#define UDCISR1 0x40600010 /* UDC Interrupt Status Register 1 */ -#define UDCISR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCISR1_IRCC (1 << 31) /* IntEn - Configuration Change */ -#define UDCISR1_IRSOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCISR1_IRRU (1 << 29) /* IntEn - Resume */ -#define UDCISR1_IRSU (1 << 28) /* IntEn - Suspend */ -#define UDCISR1_IRRS (1 << 27) /* IntEn - Reset */ - - -#define UDCFNR 0x40600014 /* UDC Frame Number Register */ -#define UDCOTGICR 0x40600018 /* UDC On-The-Go interrupt control */ -#define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ -#define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge Interrupt Enable */ -#define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge Interrupt Enable */ -#define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge Interrupt Enable */ -#define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising Edge Interrupt Enable */ -#define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge Interrupt Enable */ - -#define UDCCSN(x) __REG2(0x40600100, (x) << 2) -#define UDCCSR0 0x40600100 /* UDC Control/Status register - Endpoint 0 */ - -#define UDCCSR0_SA (1 << 7) /* Setup Active */ -#define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ -#define UDCCSR0_FST (1 << 5) /* Force Stall */ -#define UDCCSR0_SST (1 << 4) /* Sent Stall */ -#define UDCCSR0_DME (1 << 3) /* DMA Enable */ -#define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ -#define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ -#define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ - -#define UDCCSRA 0x40600104 /* UDC Control/Status register - Endpoint A */ -#define UDCCSRB 0x40600108 /* UDC Control/Status register - Endpoint B */ -#define UDCCSRC 0x4060010C /* UDC Control/Status register - Endpoint C */ -#define UDCCSRD 0x40600110 /* UDC Control/Status register - Endpoint D */ -#define UDCCSRE 0x40600114 /* UDC Control/Status register - Endpoint E */ -#define UDCCSRF 0x40600118 /* UDC Control/Status register - Endpoint F */ -#define UDCCSRG 0x4060011C /* UDC Control/Status register - Endpoint G */ -#define UDCCSRH 0x40600120 /* UDC Control/Status register - Endpoint H */ -#define UDCCSRI 0x40600124 /* UDC Control/Status register - Endpoint I */ -#define UDCCSRJ 0x40600128 /* UDC Control/Status register - Endpoint J */ -#define UDCCSRK 0x4060012C /* UDC Control/Status register - Endpoint K */ -#define UDCCSRL 0x40600130 /* UDC Control/Status register - Endpoint L */ -#define UDCCSRM 0x40600134 /* UDC Control/Status register - Endpoint M */ -#define UDCCSRN 0x40600138 /* UDC Control/Status register - Endpoint N */ -#define UDCCSRP 0x4060013C /* UDC Control/Status register - Endpoint P */ -#define UDCCSRQ 0x40600140 /* UDC Control/Status register - Endpoint Q */ -#define UDCCSRR 0x40600144 /* UDC Control/Status register - Endpoint R */ -#define UDCCSRS 0x40600148 /* UDC Control/Status register - Endpoint S */ -#define UDCCSRT 0x4060014C /* UDC Control/Status register - Endpoint T */ -#define UDCCSRU 0x40600150 /* UDC Control/Status register - Endpoint U */ -#define UDCCSRV 0x40600154 /* UDC Control/Status register - Endpoint V */ -#define UDCCSRW 0x40600158 /* UDC Control/Status register - Endpoint W */ -#define UDCCSRX 0x4060015C /* UDC Control/Status register - Endpoint X */ - -#define UDCCSR_DPE (1 << 9) /* Data Packet Error */ -#define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ -#define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ -#define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ -#define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ -#define UDCCSR_FST (1 << 5) /* Force STALL */ -#define UDCCSR_SST (1 << 4) /* Sent STALL */ -#define UDCCSR_DME (1 << 3) /* DMA Enable */ -#define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ -#define UDCCSR_PC (1 << 1) /* Packet Complete */ -#define UDCCSR_FS (1 << 0) /* FIFO needs service */ - -#define UDCBCN(x) __REG2(0x40600200, (x)<<2) -#define UDCBCR0 0x40600200 /* Byte Count Register - EP0 */ -#define UDCBCRA 0x40600204 /* Byte Count Register - EPA */ -#define UDCBCRB 0x40600208 /* Byte Count Register - EPB */ -#define UDCBCRC 0x4060020C /* Byte Count Register - EPC */ -#define UDCBCRD 0x40600210 /* Byte Count Register - EPD */ -#define UDCBCRE 0x40600214 /* Byte Count Register - EPE */ -#define UDCBCRF 0x40600218 /* Byte Count Register - EPF */ -#define UDCBCRG 0x4060021C /* Byte Count Register - EPG */ -#define UDCBCRH 0x40600220 /* Byte Count Register - EPH */ -#define UDCBCRI 0x40600224 /* Byte Count Register - EPI */ -#define UDCBCRJ 0x40600228 /* Byte Count Register - EPJ */ -#define UDCBCRK 0x4060022C /* Byte Count Register - EPK */ -#define UDCBCRL 0x40600230 /* Byte Count Register - EPL */ -#define UDCBCRM 0x40600234 /* Byte Count Register - EPM */ -#define UDCBCRN 0x40600238 /* Byte Count Register - EPN */ -#define UDCBCRP 0x4060023C /* Byte Count Register - EPP */ -#define UDCBCRQ 0x40600240 /* Byte Count Register - EPQ */ -#define UDCBCRR 0x40600244 /* Byte Count Register - EPR */ -#define UDCBCRS 0x40600248 /* Byte Count Register - EPS */ -#define UDCBCRT 0x4060024C /* Byte Count Register - EPT */ -#define UDCBCRU 0x40600250 /* Byte Count Register - EPU */ -#define UDCBCRV 0x40600254 /* Byte Count Register - EPV */ -#define UDCBCRW 0x40600258 /* Byte Count Register - EPW */ -#define UDCBCRX 0x4060025C /* Byte Count Register - EPX */ - -#define UDCDN(x) __REG2(0x40600300, (x)<<2) -#define UDCDR0 0x40600300 /* Data Register - EP0 */ -#define UDCDRA 0x40600304 /* Data Register - EPA */ -#define UDCDRB 0x40600308 /* Data Register - EPB */ -#define UDCDRC 0x4060030C /* Data Register - EPC */ -#define UDCDRD 0x40600310 /* Data Register - EPD */ -#define UDCDRE 0x40600314 /* Data Register - EPE */ -#define UDCDRF 0x40600318 /* Data Register - EPF */ -#define UDCDRG 0x4060031C /* Data Register - EPG */ -#define UDCDRH 0x40600320 /* Data Register - EPH */ -#define UDCDRI 0x40600324 /* Data Register - EPI */ -#define UDCDRJ 0x40600328 /* Data Register - EPJ */ -#define UDCDRK 0x4060032C /* Data Register - EPK */ -#define UDCDRL 0x40600330 /* Data Register - EPL */ -#define UDCDRM 0x40600334 /* Data Register - EPM */ -#define UDCDRN 0x40600338 /* Data Register - EPN */ -#define UDCDRP 0x4060033C /* Data Register - EPP */ -#define UDCDRQ 0x40600340 /* Data Register - EPQ */ -#define UDCDRR 0x40600344 /* Data Register - EPR */ -#define UDCDRS 0x40600348 /* Data Register - EPS */ -#define UDCDRT 0x4060034C /* Data Register - EPT */ -#define UDCDRU 0x40600350 /* Data Register - EPU */ -#define UDCDRV 0x40600354 /* Data Register - EPV */ -#define UDCDRW 0x40600358 /* Data Register - EPW */ -#define UDCDRX 0x4060035C /* Data Register - EPX */ - -#define UDCCN(x) __REG2(0x40600400, (x)<<2) -#define UDCCRA 0x40600404 /* Configuration register EPA */ -#define UDCCRB 0x40600408 /* Configuration register EPB */ -#define UDCCRC 0x4060040C /* Configuration register EPC */ -#define UDCCRD 0x40600410 /* Configuration register EPD */ -#define UDCCRE 0x40600414 /* Configuration register EPE */ -#define UDCCRF 0x40600418 /* Configuration register EPF */ -#define UDCCRG 0x4060041C /* Configuration register EPG */ -#define UDCCRH 0x40600420 /* Configuration register EPH */ -#define UDCCRI 0x40600424 /* Configuration register EPI */ -#define UDCCRJ 0x40600428 /* Configuration register EPJ */ -#define UDCCRK 0x4060042C /* Configuration register EPK */ -#define UDCCRL 0x40600430 /* Configuration register EPL */ -#define UDCCRM 0x40600434 /* Configuration register EPM */ -#define UDCCRN 0x40600438 /* Configuration register EPN */ -#define UDCCRP 0x4060043C /* Configuration register EPP */ -#define UDCCRQ 0x40600440 /* Configuration register EPQ */ -#define UDCCRR 0x40600444 /* Configuration register EPR */ -#define UDCCRS 0x40600448 /* Configuration register EPS */ -#define UDCCRT 0x4060044C /* Configuration register EPT */ -#define UDCCRU 0x40600450 /* Configuration register EPU */ -#define UDCCRV 0x40600454 /* Configuration register EPV */ -#define UDCCRW 0x40600458 /* Configuration register EPW */ -#define UDCCRX 0x4060045C /* Configuration register EPX */ - -#define UDCCONR_CN (0x03 << 25) /* Configuration Number */ -#define UDCCONR_CN_S (25) -#define UDCCONR_IN (0x07 << 22) /* Interface Number */ -#define UDCCONR_IN_S (22) -#define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ -#define UDCCONR_AISN_S (19) -#define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ -#define UDCCONR_EN_S (15) -#define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ -#define UDCCONR_ET_S (13) -#define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ -#define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ -#define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ -#define UDCCONR_ET_NU (0x00 << 13) /* Not used */ -#define UDCCONR_ED (1 << 12) /* Endpoint Direction */ -#define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ -#define UDCCONR_MPS_S (2) -#define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ -#define UDCCONR_EE (1 << 0) /* Endpoint Enable */ - - -#define UDC_INT_FIFOERROR (0x2) -#define UDC_INT_PACKETCMP (0x1) -#define UDC_FNR_MASK (0x7ff) -#define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) -#define UDC_BCR_MASK (0x3ff) - -#endif /* CONFIG_PXA27X */ - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) - -/******************************************************************************/ -/* - * USB Host Controller - */ -#define OHCI_REGS_BASE 0x4C000000 /* required for ohci driver */ -#define UHCREV 0x4C000000 -#define UHCHCON 0x4C000004 -#define UHCCOMS 0x4C000008 -#define UHCINTS 0x4C00000C -#define UHCINTE 0x4C000010 -#define UHCINTD 0x4C000014 -#define UHCHCCA 0x4C000018 -#define UHCPCED 0x4C00001C -#define UHCCHED 0x4C000020 -#define UHCCCED 0x4C000024 -#define UHCBHED 0x4C000028 -#define UHCBCED 0x4C00002C -#define UHCDHEAD 0x4C000030 -#define UHCFMI 0x4C000034 -#define UHCFMR 0x4C000038 -#define UHCFMN 0x4C00003C -#define UHCPERS 0x4C000040 -#define UHCLST 0x4C000044 -#define UHCRHDA 0x4C000048 -#define UHCRHDB 0x4C00004C -#define UHCRHS 0x4C000050 -#define UHCRHPS1 0x4C000054 -#define UHCRHPS2 0x4C000058 -#define UHCRHPS3 0x4C00005C -#define UHCSTAT 0x4C000060 -#define UHCHR 0x4C000064 -#define UHCHIE 0x4C000068 -#define UHCHIT 0x4C00006C - -#define UHCHR_FSBIR (1<<0) -#define UHCHR_FHR (1<<1) -#define UHCHR_CGR (1<<2) -#define UHCHR_SSDC (1<<3) -#define UHCHR_UIT (1<<4) -#define UHCHR_SSE (1<<5) -#define UHCHR_PSPL (1<<6) -#define UHCHR_PCPL (1<<7) -#define UHCHR_SSEP0 (1<<9) -#define UHCHR_SSEP1 (1<<10) -#define UHCHR_SSEP2 (1<<11) - -#define UHCHIE_UPRIE (1<<13) -#define UHCHIE_UPS2IE (1<<12) -#define UHCHIE_UPS1IE (1<<11) -#define UHCHIE_TAIE (1<<10) -#define UHCHIE_HBAIE (1<<8) -#define UHCHIE_RWIE (1<<7) - -#define UP2OCR 0x40600020 - -#define UP2OCR_HXOE (1<<17) -#define UP2OCR_HXS (1<<16) -#define UP2OCR_IDON (1<<10) -#define UP2OCR_EXSUS (1<<9) -#define UP2OCR_EXSP (1<<8) -#define UP2OCR_DMSTATE (1<<7) -#define UP2OCR_VPM (1<<6) -#define UP2OCR_DPSTATE (1<<5) -#define UP2OCR_DPPUE (1<<4) -#define UP2OCR_DMPDE (1<<3) -#define UP2OCR_DPPDE (1<<2) -#define UP2OCR_CPVPE (1<<1) -#define UP2OCR_CPVEN (1<<0) - -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * Fast Infrared Communication Port - */ -#define ICCR0 0x40800000 /* ICP Control Register 0 */ -#define ICCR1 0x40800004 /* ICP Control Register 1 */ -#define ICCR2 0x40800008 /* ICP Control Register 2 */ -#define ICDR 0x4080000c /* ICP Data Register */ -#define ICSR0 0x40800014 /* ICP Status Register 0 */ -#define ICSR1 0x40800018 /* ICP Status Register 1 */ - -/* - * Real Time Clock - */ -#define RCNR 0x40900000 /* RTC Count Register */ -#define RTAR 0x40900004 /* RTC Alarm Register */ -#define RTSR 0x40900008 /* RTC Status Register */ -#define RTTR 0x4090000C /* RTC Timer Trim Register */ -#define RDAR1 0x40900018 /* Wristwatch Day Alarm Reg 1 */ -#define RDAR2 0x40900020 /* Wristwatch Day Alarm Reg 2 */ -#define RYAR1 0x4090001C /* Wristwatch Year Alarm Reg 1 */ -#define RYAR2 0x40900024 /* Wristwatch Year Alarm Reg 2 */ -#define SWAR1 0x4090002C /* Stopwatch Alarm Register 1 */ -#define SWAR2 0x40900030 /* Stopwatch Alarm Register 2 */ -#define PIAR 0x40900038 /* Periodic Interrupt Alarm Register */ -#define RDCR 0x40900010 /* RTC Day Count Register. */ -#define RYCR 0x40900014 /* RTC Year Count Register. */ -#define SWCR 0x40900028 /* Stopwatch Count Register */ -#define RTCPICR 0x40900034 /* Periodic Interrupt Counter Register */ - -#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */ -#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */ -#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ -#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ -#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ -#define RTSR_AL (1 << 0) /* RTC alarm detected */ - -/******************************************************************************/ -/* - * OS Timer & Match Registers - */ -#define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ -#define OSMR1 0x40A00004 /* OS Timer Match Register 1 */ -#define OSMR2 0x40A00008 /* OS Timer Match Register 2 */ -#define OSMR3 0x40A0000C /* OS Timer Match Register 3 */ -#define OSCR 0x40A00010 /* OS Timer Counter Register */ -#define OSSR 0x40A00014 /* OS Timer Status Register */ -#define OWER 0x40A00018 /* OS Timer Watchdog Enable Register */ -#define OIER 0x40A0001C /* OS Timer Interrupt Enable Register */ - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ -#define OSCR5 0x40A00044 /* OS Timer Counter Register 5 */ -#define OSCR6 0x40A00048 /* OS Timer Counter Register 6 */ -#define OSCR7 0x40A0004C /* OS Timer Counter Register 7 */ -#define OSCR8 0x40A00050 /* OS Timer Counter Register 8 */ -#define OSCR9 0x40A00054 /* OS Timer Counter Register 9 */ -#define OSCR10 0x40A00058 /* OS Timer Counter Register 10 */ -#define OSCR11 0x40A0005C /* OS Timer Counter Register 11 */ - -#define OSMR4 0x40A00080 /* OS Timer Match Register 4 */ -#define OSMR5 0x40A00084 /* OS Timer Match Register 5 */ -#define OSMR6 0x40A00088 /* OS Timer Match Register 6 */ -#define OSMR7 0x40A0008C /* OS Timer Match Register 7 */ -#define OSMR8 0x40A00090 /* OS Timer Match Register 8 */ -#define OSMR9 0x40A00094 /* OS Timer Match Register 9 */ -#define OSMR10 0x40A00098 /* OS Timer Match Register 10 */ -#define OSMR11 0x40A0009C /* OS Timer Match Register 11 */ - -#define OMCR4 0x40A000C0 /* OS Match Control Register 4 */ -#define OMCR5 0x40A000C4 /* OS Match Control Register 5 */ -#define OMCR6 0x40A000C8 /* OS Match Control Register 6 */ -#define OMCR7 0x40A000CC /* OS Match Control Register 7 */ -#define OMCR8 0x40A000D0 /* OS Match Control Register 8 */ -#define OMCR9 0x40A000D4 /* OS Match Control Register 9 */ -#define OMCR10 0x40A000D8 /* OS Match Control Register 10 */ -#define OMCR11 0x40A000DC /* OS Match Control Register 11 */ - -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -#define OSSR_M4 (1 << 4) /* Match status channel 4 */ -#define OSSR_M3 (1 << 3) /* Match status channel 3 */ -#define OSSR_M2 (1 << 2) /* Match status channel 2 */ -#define OSSR_M1 (1 << 1) /* Match status channel 1 */ -#define OSSR_M0 (1 << 0) /* Match status channel 0 */ - -#define OWER_WME (1 << 0) /* Watchdog Match Enable */ - -#define OIER_E4 (1 << 4) /* Interrupt enable channel 4 */ -#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ -#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ -#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ -#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ - -#define OSCR_CLK_FREQ 3250 - -/******************************************************************************/ -/* - * Core Clock - */ - -#if defined(CONFIG_CPU_MONAHANS) -#define ACCR 0x41340000 /* Application Subsystem Clock Configuration Register */ -#define ACSR 0x41340004 /* Application Subsystem Clock Status Register */ -#define AICSR 0x41340008 /* Application Subsystem Interrupt Control/Status Register */ -#define CKENA 0x4134000C /* A Clock Enable Register */ -#define CKENB 0x41340010 /* B Clock Enable Register */ -#define AC97_DIV 0x41340014 /* AC97 clock divisor value register */ - -#define ACCR_SMC_MASK 0x03800000 /* Static Memory Controller Frequency Select */ -#define ACCR_SRAM_MASK 0x000c0000 /* SRAM Controller Frequency Select */ -#define ACCR_FC_MASK 0x00030000 /* Frequency Change Frequency Select */ -#define ACCR_HSIO_MASK 0x0000c000 /* High Speed IO Frequency Select */ -#define ACCR_DDR_MASK 0x00003000 /* DDR Memory Controller Frequency Select */ -#define ACCR_XN_MASK 0x00000700 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ -#define ACCR_XL_MASK 0x0000001f /* Crystal Frequency to Memory Frequency Multiplier */ -#define ACCR_XPDIS (1 << 31) -#define ACCR_SPDIS (1 << 30) -#define ACCR_13MEND1 (1 << 27) -#define ACCR_D0CS (1 << 26) -#define ACCR_13MEND2 (1 << 21) -#define ACCR_PCCE (1 << 11) - -#define CKENA_30_MSL0 (1 << 30) /* MSL0 Interface Unit Clock Enable */ -#define CKENA_29_SSP4 (1 << 29) /* SSP3 Unit Clock Enable */ -#define CKENA_28_SSP3 (1 << 28) /* SSP2 Unit Clock Enable */ -#define CKENA_27_SSP2 (1 << 27) /* SSP1 Unit Clock Enable */ -#define CKENA_26_SSP1 (1 << 26) /* SSP0 Unit Clock Enable */ -#define CKENA_25_TSI (1 << 25) /* TSI Clock Enable */ -#define CKENA_24_AC97 (1 << 24) /* AC97 Unit Clock Enable */ -#define CKENA_23_STUART (1 << 23) /* STUART Unit Clock Enable */ -#define CKENA_22_FFUART (1 << 22) /* FFUART Unit Clock Enable */ -#define CKENA_21_BTUART (1 << 21) /* BTUART Unit Clock Enable */ -#define CKENA_20_UDC (1 << 20) /* UDC Clock Enable */ -#define CKENA_19_TPM (1 << 19) /* TPM Unit Clock Enable */ -#define CKENA_18_USIM1 (1 << 18) /* USIM1 Unit Clock Enable */ -#define CKENA_17_USIM0 (1 << 17) /* USIM0 Unit Clock Enable */ -#define CKENA_15_CIR (1 << 15) /* Consumer IR Clock Enable */ -#define CKENA_14_KEY (1 << 14) /* Keypad Controller Clock Enable */ -#define CKENA_13_MMC1 (1 << 13) /* MMC1 Clock Enable */ -#define CKENA_12_MMC0 (1 << 12) /* MMC0 Clock Enable */ -#define CKENA_11_FLASH (1 << 11) /* Boot ROM Clock Enable */ -#define CKENA_10_SRAM (1 << 10) /* SRAM Controller Clock Enable */ -#define CKENA_9_SMC (1 << 9) /* Static Memory Controller */ -#define CKENA_8_DMC (1 << 8) /* Dynamic Memory Controller */ -#define CKENA_7_GRAPHICS (1 << 7) /* 2D Graphics Clock Enable */ -#define CKENA_6_USBCLI (1 << 6) /* USB Client Unit Clock Enable */ -#define CKENA_4_NAND (1 << 4) /* NAND Flash Controller Clock Enable */ -#define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */ -#define CKENA_2_USBHOST (1 << 2) /* USB Host Unit Clock Enable */ -#define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */ - -#define CKENB_9_SYSBUS2 (1 << 9) /* System bus 2 */ -#define CKENB_8_1WIRE (1 << 8) /* One Wire Interface Unit Clock Enable */ -#define CKENB_7_GPIO (1 << 7) /* GPIO Clock Enable */ -#define CKENB_6_IRQ (1 << 6) /* Interrupt Controller Clock Enable */ -#define CKENB_4_I2C (1 << 4) /* I2C Unit Clock Enable */ -#define CKENB_1_PWM1 (1 << 1) /* PWM2 & PWM3 Clock Enable */ -#define CKENB_0_PWM0 (1 << 0) /* PWM0 & PWM1 Clock Enable */ - -#else /* if defined CONFIG_CPU_MONAHANS */ - -#define CCCR 0x41300000 /* Core Clock Configuration Register */ -#define CKEN 0x41300004 /* Clock Enable Register */ -#define OSCC 0x41300008 /* Oscillator Configuration Register */ -#define CCSR 0x4130000C /* Core Clock Status Register */ - -#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ -#define CKEN22_MEMC (1 << 22) /* Memory Controler */ -#define CKEN21_MSHC (1 << 21) /* Memery Stick Host Controller */ -#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */ -#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */ -#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ -#define CKEN17_MSL (1 << 17) /* MSL Interface Unit Clock Enable */ -#define CKEN15_PWR_I2C (1 << 15) /* PWR_I2C Unit Clock Enable */ -#define CKEN9_OST (1 << 9) /* OS Timer Unit Clock Enable */ -#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ - -#define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ -#if !defined(CONFIG_PXA27X) -#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ -#endif -#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ - -#define CKEN24_CAMERA (1 << 24) /* Camera Interface Clock Enable */ -#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ -#define CKEN22_MEMC (1 << 22) /* Memory Controller Clock Enable */ -#define CKEN21_MEMSTK (1 << 21) /* Memory Stick Host Controller */ -#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */ -#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */ -#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ -#define CKEN17_MSL (1 << 17) /* MSL Unit Clock Enable */ -#define CKEN16_LCD (1 << 16) /* LCD Unit Clock Enable */ -#define CKEN15_PWRI2C (1 << 15) /* PWR I2C Unit Clock Enable */ -#define CKEN14_I2C (1 << 14) /* I2C Unit Clock Enable */ -#define CKEN13_FICP (1 << 13) /* FICP Unit Clock Enable */ -#define CKEN12_MMC (1 << 12) /* MMC Unit Clock Enable */ -#define CKEN11_USB (1 << 11) /* USB Unit Clock Enable */ -#if defined(CONFIG_PXA27X) -#define CKEN10_USBHOST (1 << 10) /* USB Host Unit Clock Enable */ -#define CKEN24_CAMERA (1 << 24) /* Camera Unit Clock Enable */ -#endif -#define CKEN8_I2S (1 << 8) /* I2S Unit Clock Enable */ -#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ -#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ -#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ -#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ -#define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */ -#define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */ -#define CKEN0_PWM0 (1 << 0) /* PWM0 Clock Enable */ - -#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ -#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ - -#if !defined(CONFIG_PXA27X) -#define CCCR_L09 (0x1F) -#define CCCR_L27 (0x1) -#define CCCR_L32 (0x2) -#define CCCR_L36 (0x3) -#define CCCR_L40 (0x4) -#define CCCR_L45 (0x5) - -#define CCCR_M1 (0x1 << 5) -#define CCCR_M2 (0x2 << 5) -#define CCCR_M4 (0x3 << 5) - -#define CCCR_N10 (0x2 << 7) -#define CCCR_N15 (0x3 << 7) -#define CCCR_N20 (0x4 << 7) -#define CCCR_N25 (0x5 << 7) -#define CCCR_N30 (0x6 << 7) -#endif - -#endif /* CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * Pulse Width Modulator - */ -#define PWM_CTRL0 0x40B00000 /* PWM 0 Control Register */ -#define PWM_PWDUTY0 0x40B00004 /* PWM 0 Duty Cycle Register */ -#define PWM_PERVAL0 0x40B00008 /* PWM 0 Period Control Register */ - -#define PWM_CTRL1 0x40C00000 /* PWM 1 Control Register */ -#define PWM_PWDUTY1 0x40C00004 /* PWM 1 Duty Cycle Register */ -#define PWM_PERVAL1 0x40C00008 /* PWM 1 Period Control Register */ - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define PWM_CTRL2 0x40B00010 /* PWM 2 Control Register */ -#define PWM_PWDUTY2 0x40B00014 /* PWM 2 Duty Cycle Register */ -#define PWM_PERVAL2 0x40B00018 /* PWM 2 Period Control Register */ - -#define PWM_CTRL3 0x40C00010 /* PWM 3 Control Register */ -#define PWM_PWDUTY3 0x40C00014 /* PWM 3 Duty Cycle Register */ -#define PWM_PERVAL3 0x40C00018 /* PWM 3 Period Control Register */ -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -/* - * Interrupt Controller - */ -#define ICIP 0x40D00000 /* Interrupt Controller IRQ Pending Register */ -#define ICMR 0x40D00004 /* Interrupt Controller Mask Register */ -#define ICLR 0x40D00008 /* Interrupt Controller Level Register */ -#define ICFP 0x40D0000C /* Interrupt Controller FIQ Pending Register */ -#define ICPR 0x40D00010 /* Interrupt Controller Pending Register */ -#define ICCR 0x40D00014 /* Interrupt Controller Control Register */ - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define ICHP 0x40D00018 /* Interrupt Controller Highest Priority Register */ -#define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 0x40D000A0 /* Interrupt Controller Mask Register 2 */ -#define ICLR2 0x40D000A4 /* Interrupt Controller Level Register 2 */ -#define ICFP2 0x40D000A8 /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 0x40D000AC /* Interrupt Controller Pending Register 2 */ -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * General Purpose I/O - */ -#define GPLR0 0x40E00000 /* GPIO Pin-Level Register GPIO<31:0> */ -#define GPLR1 0x40E00004 /* GPIO Pin-Level Register GPIO<63:32> */ -#define GPLR2 0x40E00008 /* GPIO Pin-Level Register GPIO<80:64> */ - -#define GPDR0 0x40E0000C /* GPIO Pin Direction Register GPIO<31:0> */ -#define GPDR1 0x40E00010 /* GPIO Pin Direction Register GPIO<63:32> */ -#define GPDR2 0x40E00014 /* GPIO Pin Direction Register GPIO<80:64> */ - -#define GPSR0 0x40E00018 /* GPIO Pin Output Set Register GPIO<31:0> */ -#define GPSR1 0x40E0001C /* GPIO Pin Output Set Register GPIO<63:32> */ -#define GPSR2 0x40E00020 /* GPIO Pin Output Set Register GPIO<80:64> */ - -#define GPCR0 0x40E00024 /* GPIO Pin Output Clear Register GPIO<31:0> */ -#define GPCR1 0x40E00028 /* GPIO Pin Output Clear Register GPIO <63:32> */ -#define GPCR2 0x40E0002C /* GPIO Pin Output Clear Register GPIO <80:64> */ - -#define GRER0 0x40E00030 /* GPIO Rising-Edge Detect Register GPIO<31:0> */ -#define GRER1 0x40E00034 /* GPIO Rising-Edge Detect Register GPIO<63:32> */ -#define GRER2 0x40E00038 /* GPIO Rising-Edge Detect Register GPIO<80:64> */ - -#define GFER0 0x40E0003C /* GPIO Falling-Edge Detect Register GPIO<31:0> */ -#define GFER1 0x40E00040 /* GPIO Falling-Edge Detect Register GPIO<63:32> */ -#define GFER2 0x40E00044 /* GPIO Falling-Edge Detect Register GPIO<80:64> */ - -#define GEDR0 0x40E00048 /* GPIO Edge Detect Status Register GPIO<31:0> */ -#define GEDR1 0x40E0004C /* GPIO Edge Detect Status Register GPIO<63:32> */ -#define GEDR2 0x40E00050 /* GPIO Edge Detect Status Register GPIO<80:64> */ - -#define GAFR0_L 0x40E00054 /* GPIO Alternate Function Select Register GPIO<15:0> */ -#define GAFR0_U 0x40E00058 /* GPIO Alternate Function Select Register GPIO<31:16> */ -#define GAFR1_L 0x40E0005C /* GPIO Alternate Function Select Register GPIO<47:32> */ -#define GAFR1_U 0x40E00060 /* GPIO Alternate Function Select Register GPIO<63:48> */ -#define GAFR2_L 0x40E00064 /* GPIO Alternate Function Select Register GPIO<79:64> */ -#define GAFR2_U 0x40E00068 /* GPIO Alternate Function Select Register GPIO 80 */ - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR3 0x40E00100 /* GPIO Pin-Level Register GPIO<127:96> */ -#define GPDR3 0x40E0010C /* GPIO Pin Direction Register GPIO<127:96> */ -#define GPSR3 0x40E00118 /* GPIO Pin Output Set Register GPIO<127:96> */ -#define GPCR3 0x40E00124 /* GPIO Pin Output Clear Register GPIO<127:96> */ -#define GRER3 0x40E00130 /* GPIO Rising-Edge Detect Register GPIO<127:96> */ -#define GFER3 0x40E0013C /* GPIO Falling-Edge Detect Register GPIO<127:96> */ -#define GEDR3 0x40E00148 /* GPIO Edge Detect Status Register GPIO<127:96> */ -#define GAFR3_L 0x40E0006C /* GPIO Alternate Function Select Register GPIO<111:96> */ -#define GAFR3_U 0x40E00070 /* GPIO Alternate Function Select Register GPIO<127:112> */ -#endif /* CONFIG_PXA27X || CONFIG_CPU_MONAHANS */ - -#ifdef CONFIG_CPU_MONAHANS -#define GSDR0 0x40E00400 /* Bit-wise Set of GPDR[31:0] */ -#define GSDR1 0x40E00404 /* Bit-wise Set of GPDR[63:32] */ -#define GSDR2 0x40E00408 /* Bit-wise Set of GPDR[95:64] */ -#define GSDR3 0x40E0040C /* Bit-wise Set of GPDR[127:96] */ - -#define GCDR0 0x40E00420 /* Bit-wise Clear of GPDR[31:0] */ -#define GCDR1 0x40E00424 /* Bit-wise Clear of GPDR[63:32] */ -#define GCDR2 0x40E00428 /* Bit-wise Clear of GPDR[95:64] */ -#define GCDR3 0x40E0042C /* Bit-wise Clear of GPDR[127:96] */ - -#define GSRER0 0x40E00440 /* Set Rising Edge Det. Enable [31:0] */ -#define GSRER1 0x40E00444 /* Set Rising Edge Det. Enable [63:32] */ -#define GSRER2 0x40E00448 /* Set Rising Edge Det. Enable [95:64] */ -#define GSRER3 0x40E0044C /* Set Rising Edge Det. Enable [127:96] */ - -#define GCRER0 0x40E00460 /* Clear Rising Edge Det. Enable [31:0] */ -#define GCRER1 0x40E00464 /* Clear Rising Edge Det. Enable [63:32] */ -#define GCRER2 0x40E00468 /* Clear Rising Edge Det. Enable [95:64] */ -#define GCRER3 0x40E0046C /* Clear Rising Edge Det. Enable[127:96] */ - -#define GSFER0 0x40E00480 /* Set Falling Edge Det. Enable [31:0] */ -#define GSFER1 0x40E00484 /* Set Falling Edge Det. Enable [63:32] */ -#define GSFER2 0x40E00488 /* Set Falling Edge Det. Enable [95:64] */ -#define GSFER3 0x40E0048C /* Set Falling Edge Det. Enable[127:96] */ - -#define GCFER0 0x40E004A0 /* Clr Falling Edge Det. Enable [31:0] */ -#define GCFER1 0x40E004A4 /* Clr Falling Edge Det. Enable [63:32] */ -#define GCFER2 0x40E004A8 /* Clr Falling Edge Det. Enable [95:64] */ -#define GCFER3 0x40E004AC /* Clr Falling Edge Det. Enable[127:96] */ - -#define GSDR(x) (0x40E00400 | ((x) & 0x60) >> 3) -#define GCDR(x) (0x40E00420 | ((x) & 0x60) >> 3) -#endif - -#define _GPLR(x) (0x40E00000 + (((x) & 0x60) >> 3)) -#define _GPDR(x) (0x40E0000C + (((x) & 0x60) >> 3)) -#define _GPSR(x) (0x40E00018 + (((x) & 0x60) >> 3)) -#define _GPCR(x) (0x40E00024 + (((x) & 0x60) >> 3)) -#define _GRER(x) (0x40E00030 + (((x) & 0x60) >> 3)) -#define _GFER(x) (0x40E0003C + (((x) & 0x60) >> 3)) -#define _GEDR(x) (0x40E00048 + (((x) & 0x60) >> 3)) -#define _GAFR(x) (0x40E00054 + (((x) & 0x70) >> 2)) - -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR(x) (((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3)) -#define GPDR(x) (((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3)) -#define GPSR(x) (((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3)) -#define GPCR(x) (((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3)) -#define GRER(x) (((((x) & 0x7f) < 96) ? _GRER(x) : GRER3)) -#define GFER(x) (((((x) & 0x7f) < 96) ? _GFER(x) : GFER3)) -#define GEDR(x) (((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3)) -#define GAFR(x) (((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U))) -#else -#define GPLR(x) _GPLR(x) -#define GPDR(x) _GPDR(x) -#define GPSR(x) _GPSR(x) -#define GPCR(x) _GPCR(x) -#define GRER(x) _GRER(x) -#define GFER(x) _GFER(x) -#define GEDR(x) _GEDR(x) -#define GAFR(x) _GAFR(x) -#endif - -#define GPIO_bit(x) (1 << ((x) & 0x1f)) - -/******************************************************************************/ -/* - * Multi-function Pin Registers: - */ -/* PXA320 */ -#if defined(CONFIG_CPU_PXA320) -#define DF_IO0 0x40e1024c -#define DF_IO1 0x40e10254 -#define DF_IO2 0x40e1025c -#define DF_IO3 0x40e10264 -#define DF_IO4 0x40e1026c -#define DF_IO5 0x40e10274 -#define DF_IO6 0x40e1027c -#define DF_IO7 0x40e10284 -#define DF_IO8 0x40e10250 -#define DF_IO9 0x40e10258 -#define DF_IO10 0x40e10260 -#define DF_IO11 0x40e10268 -#define DF_IO12 0x40e10270 -#define DF_IO13 0x40e10278 -#define DF_IO14 0x40e10280 -#define DF_IO15 0x40e10288 -#define DF_CLE_nOE 0x40e10204 -#define DF_ALE_nWE1 0x40e10208 -#define DF_ALE_nWE2 0x40e1021c -#define DF_SCLK_E 0x40e10210 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define nBE0 0x40e10214 -#define nBE1 0x40e10218 -#define nLUA 0x40e10234 -#define nLLA 0x40e10238 -#define DF_ADDR0 0x40e1023c -#define DF_ADDR1 0x40e10240 -#define DF_ADDR2 0x40e10244 -#define DF_ADDR3 0x40e10248 -#define DF_INT_RnB 0x40e10220 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define DF_nWE 0x40e1022c -#define DF_nRE 0x40e10230 - -#define nXCVREN 0x40e10138 - -#define GPIO0 0x40e10124 -#define GPIO1 0x40e10128 -#define GPIO2 0x40e1012c -#define GPIO3 0x40e10130 -#define GPIO4 0x40e10134 -#define GPIO5 0x40e1028c -#define GPIO6 0x40e10290 -#define GPIO7 0x40e10294 -#define GPIO8 0x40e10298 -#define GPIO9 0x40e1029c -#define GPIO10 0x40e10458 -#define GPIO11 0x40e102a0 -#define GPIO12 0x40e102a4 -#define GPIO13 0x40e102a8 -#define GPIO14 0x40e102ac -#define GPIO15 0x40e102b0 -#define GPIO16 0x40e102b4 -#define GPIO17 0x40e102b8 -#define GPIO18 0x40e102bc -#define GPIO19 0x40e102c0 -#define GPIO20 0x40e102c4 -#define GPIO21 0x40e102c8 -#define GPIO22 0x40e102cc -#define GPIO23 0x40e102d0 -#define GPIO24 0x40e102d4 -#define GPIO25 0x40e102d8 -#define GPIO26 0x40e102dc - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define GPIO30 0x40e1040c -#define GPIO31 0x40e10410 -#define GPIO32 0x40e10414 -#define GPIO33 0x40e10418 -#define GPIO34 0x40e1041c -#define GPIO35 0x40e10420 -#define GPIO36 0x40e10424 -#define GPIO37 0x40e10428 -#define GPIO38 0x40e1042c -#define GPIO39 0x40e10430 -#define GPIO40 0x40e10434 -#define GPIO41 0x40e10438 -#define GPIO42 0x40e1043c -#define GPIO43 0x40e10440 -#define GPIO44 0x40e10444 -#define GPIO45 0x40e10448 -#define GPIO46 0x40e1044c -#define GPIO47 0x40e10450 -#define GPIO48 0x40e10454 -#define GPIO49 0x40e1045c -#define GPIO50 0x40e10460 -#define GPIO51 0x40e10464 -#define GPIO52 0x40e10468 -#define GPIO53 0x40e1046c -#define GPIO54 0x40e10470 -#define GPIO55 0x40e10474 -#define GPIO56 0x40e10478 -#define GPIO57 0x40e1047c -#define GPIO58 0x40e10480 -#define GPIO59 0x40e10484 -#define GPIO60 0x40e10488 -#define GPIO61 0x40e1048c -#define GPIO62 0x40e10490 - -#define GPIO6_2 0x40e10494 -#define GPIO7_2 0x40e10498 -#define GPIO8_2 0x40e1049c -#define GPIO9_2 0x40e104a0 -#define GPIO10_2 0x40e104a4 -#define GPIO11_2 0x40e104a8 -#define GPIO12_2 0x40e104ac -#define GPIO13_2 0x40e104b0 - -#define GPIO63 0x40e104b4 -#define GPIO64 0x40e104b8 -#define GPIO65 0x40e104bc -#define GPIO66 0x40e104c0 -#define GPIO67 0x40e104c4 -#define GPIO68 0x40e104c8 -#define GPIO69 0x40e104cc -#define GPIO70 0x40e104d0 -#define GPIO71 0x40e104d4 -#define GPIO72 0x40e104d8 -#define GPIO73 0x40e104dc - -#define GPIO14_2 0x40e104e0 -#define GPIO15_2 0x40e104e4 -#define GPIO16_2 0x40e104e8 -#define GPIO17_2 0x40e104ec - -#define GPIO74 0x40e104f0 -#define GPIO75 0x40e104f4 -#define GPIO76 0x40e104f8 -#define GPIO77 0x40e104fc -#define GPIO78 0x40e10500 -#define GPIO79 0x40e10504 -#define GPIO80 0x40e10508 -#define GPIO81 0x40e1050c -#define GPIO82 0x40e10510 -#define GPIO83 0x40e10514 -#define GPIO84 0x40e10518 -#define GPIO85 0x40e1051c -#define GPIO86 0x40e10520 -#define GPIO87 0x40e10524 -#define GPIO88 0x40e10528 -#define GPIO89 0x40e1052c -#define GPIO90 0x40e10530 -#define GPIO91 0x40e10534 -#define GPIO92 0x40e10538 -#define GPIO93 0x40e1053c -#define GPIO94 0x40e10540 -#define GPIO95 0x40e10544 -#define GPIO96 0x40e10548 -#define GPIO97 0x40e1054c -#define GPIO98 0x40e10550 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e1067c -#define GPIO3_2 0x40e10680 -#define GPIO4_2 0x40e10684 -#define GPIO5_2 0x40e10688 - -/* PXA300 and PXA310 */ -#elif defined(CONFIG_CPU_PXA300) || defined(CONFIG_CPU_PXA310) -#define DF_IO0 0x40e10220 -#define DF_IO1 0x40e10228 -#define DF_IO2 0x40e10230 -#define DF_IO3 0x40e10238 -#define DF_IO4 0x40e10258 -#define DF_IO5 0x40e10260 -#define DF_IO7 0x40e10270 -#define DF_IO6 0x40e10268 -#define DF_IO8 0x40e10224 -#define DF_IO9 0x40e1022c -#define DF_IO10 0x40e10234 -#define DF_IO11 0x40e1023c -#define DF_IO12 0x40e1025c -#define DF_IO13 0x40e10264 -#define DF_IO14 0x40e1026c -#define DF_IO15 0x40e10274 -#define DF_CLE_NOE 0x40e10240 -#define DF_ALE_nWE 0x40e1020c -#define DF_SCLK_E 0x40e10250 -#define nCS0 0x40e100c4 -#define nCS1 0x40e100c0 -#define nBE0 0x40e10204 -#define nBE1 0x40e10208 -#define nLUA 0x40e10244 -#define nLLA 0x40e10254 -#define DF_ADDR0 0x40e10210 -#define DF_ADDR1 0x40e10214 -#define DF_ADDR2 0x40e10218 -#define DF_ADDR3 0x40e1021c -#define DF_INT_RnB 0x40e100c8 -#define DF_nCS0 0x40e10248 -#define DF_nCS1 0x40e10278 -#define DF_nWE 0x40e100cc -#define DF_nRE 0x40e10200 - -#define GPIO0 0x40e100b4 -#define GPIO1 0x40e100b8 -#define GPIO2 0x40e100bc -#define GPIO3 0x40e1027c -#define GPIO4 0x40e10280 - -#define GPIO5 0x40e10284 -#define GPIO6 0x40e10288 -#define GPIO7 0x40e1028c -#define GPIO8 0x40e10290 -#define GPIO9 0x40e10294 -#define GPIO10 0x40e10298 -#define GPIO11 0x40e1029c -#define GPIO12 0x40e102a0 -#define GPIO13 0x40e102a4 -#define GPIO14 0x40e102a8 -#define GPIO15 0x40e102ac -#define GPIO16 0x40e102b0 -#define GPIO17 0x40e102b4 -#define GPIO18 0x40e102b8 -#define GPIO19 0x40e102bc -#define GPIO20 0x40e102c0 -#define GPIO21 0x40e102c4 -#define GPIO22 0x40e102c8 -#define GPIO23 0x40e102cc -#define GPIO24 0x40e102d0 -#define GPIO25 0x40e102d4 -#define GPIO26 0x40e102d8 - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define ULPI_STP 0x40e1040c -#define ULPI_NXT 0x40e10410 -#define ULPI_DIR 0x40e10414 -#define GPIO30 0x40e10418 -#define GPIO31 0x40e1041c -#define GPIO32 0x40e10420 -#define GPIO33 0x40e10424 -#define GPIO34 0x40e10428 -#define GPIO35 0x40e1042c -#define GPIO36 0x40e10430 -#define GPIO37 0x40e10434 -#define GPIO38 0x40e10438 -#define GPIO39 0x40e1043c -#define GPIO40 0x40e10440 -#define GPIO41 0x40e10444 -#define GPIO42 0x40e10448 -#define GPIO43 0x40e1044c -#define GPIO44 0x40e10450 -#define GPIO45 0x40e10454 -#define GPIO46 0x40e10458 -#define GPIO47 0x40e1045c -#define GPIO48 0x40e10460 - -#define GPIO49 0x40e10464 -#define GPIO50 0x40e10468 -#define GPIO51 0x40e1046c -#define GPIO52 0x40e10470 -#define GPIO53 0x40e10474 -#define GPIO54 0x40e10478 -#define GPIO55 0x40e1047c -#define GPIO56 0x40e10480 -#define GPIO57 0x40e10484 -#define GPIO58 0x40e10488 -#define GPIO59 0x40e1048c -#define GPIO60 0x40e10490 -#define GPIO61 0x40e10494 -#define GPIO62 0x40e10498 -#define GPIO63 0x40e1049c -#define GPIO64 0x40e104a0 -#define GPIO65 0x40e104a4 -#define GPIO66 0x40e104a8 -#define GPIO67 0x40e104ac -#define GPIO68 0x40e104b0 -#define GPIO69 0x40e104b4 -#define GPIO70 0x40e104b8 -#define GPIO71 0x40e104bc -#define GPIO72 0x40e104c0 -#define GPIO73 0x40e104c4 -#define GPIO74 0x40e104c8 -#define GPIO75 0x40e104cc -#define GPIO76 0x40e104d0 -#define GPIO77 0x40e104d4 -#define GPIO78 0x40e104d8 -#define GPIO79 0x40e104dc -#define GPIO80 0x40e104e0 -#define GPIO81 0x40e104e4 -#define GPIO82 0x40e104e8 -#define GPIO83 0x40e104ec -#define GPIO84 0x40e104f0 -#define GPIO85 0x40e104f4 -#define GPIO86 0x40e104f8 -#define GPIO87 0x40e104fc -#define GPIO88 0x40e10500 -#define GPIO89 0x40e10504 -#define GPIO90 0x40e10508 -#define GPIO91 0x40e1050c -#define GPIO92 0x40e10510 -#define GPIO93 0x40e10514 -#define GPIO94 0x40e10518 -#define GPIO95 0x40e1051c -#define GPIO96 0x40e10520 -#define GPIO97 0x40e10524 -#define GPIO98 0x40e10528 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e102dc -#define GPIO3_2 0x40e102e0 -#define GPIO4_2 0x40e102e4 -#define GPIO5_2 0x40e102e8 -#define GPIO6_2 0x40e102ec - -#ifndef CONFIG_CPU_PXA300 /* PXA310 only */ -#define GPIO7_2 0x40e1052c -#define GPIO8_2 0x40e10530 -#define GPIO9_2 0x40e10534 -#define GPIO10_2 0x40e10538 -#endif -#endif - -#ifdef CONFIG_CPU_MONAHANS -/* MFPR Bit Definitions, see 4-10, Vol. 1 */ -#define PULL_SEL 0x8000 -#define PULLUP_EN 0x4000 -#define PULLDOWN_EN 0x2000 - -#define DRIVE_FAST_1mA 0x0 -#define DRIVE_FAST_2mA 0x400 -#define DRIVE_FAST_3mA 0x800 -#define DRIVE_FAST_4mA 0xC00 -#define DRIVE_SLOW_6mA 0x1000 -#define DRIVE_FAST_6mA 0x1400 -#define DRIVE_SLOW_10mA 0x1800 -#define DRIVE_FAST_10mA 0x1C00 - -#define SLEEP_SEL 0x200 -#define SLEEP_DATA 0x100 -#define SLEEP_OE_N 0x80 -#define EDGE_CLEAR 0x40 -#define EDGE_FALL_EN 0x20 -#define EDGE_RISE_EN 0x10 - -#define AF_SEL_0 0x0 /* Alternate function 0 (reset state) */ -#define AF_SEL_1 0x1 /* Alternate function 1 */ -#define AF_SEL_2 0x2 /* Alternate function 2 */ -#define AF_SEL_3 0x3 /* Alternate function 3 */ -#define AF_SEL_4 0x4 /* Alternate function 4 */ -#define AF_SEL_5 0x5 /* Alternate function 5 */ -#define AF_SEL_6 0x6 /* Alternate function 6 */ -#define AF_SEL_7 0x7 /* Alternate function 7 */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* GPIO alternate function assignments */ - -#define GPIO1_RST 1 /* reset */ -#define GPIO6_MMCCLK 6 /* MMC Clock */ -#define GPIO8_48MHz 7 /* 48 MHz clock output */ -#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */ -#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */ -#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ -#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ -#define GPIO12_32KHz 12 /* 32 kHz out */ -#define GPIO13_MBGNT 13 /* memory controller grant */ -#define GPIO14_MBREQ 14 /* alternate bus master request */ -#define GPIO15_nCS_1 15 /* chip select 1 */ -#define GPIO16_PWM0 16 /* PWM0 output */ -#define GPIO17_PWM1 17 /* PWM1 output */ -#define GPIO18_RDY 18 /* Ext. Bus Ready */ -#define GPIO19_DREQ1 19 /* External DMA Request */ -#define GPIO20_DREQ0 20 /* External DMA Request */ -#define GPIO23_SCLK 23 /* SSP clock */ -#define GPIO24_SFRM 24 /* SSP Frame */ -#define GPIO25_STXD 25 /* SSP transmit */ -#define GPIO26_SRXD 26 /* SSP receive */ -#define GPIO27_SEXTCLK 27 /* SSP ext_clk */ -#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */ -#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */ -#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */ -#define GPIO31_SYNC 31 /* AC97/I2S sync */ -#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */ -#define GPIO33_nCS_5 33 /* chip select 5 */ -#define GPIO34_FFRXD 34 /* FFUART receive */ -#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ -#define GPIO35_FFCTS 35 /* FFUART Clear to send */ -#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ -#define GPIO37_FFDSR 37 /* FFUART data set ready */ -#define GPIO38_FFRI 38 /* FFUART Ring Indicator */ -#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */ -#define GPIO39_FFTXD 39 /* FFUART transmit data */ -#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ -#define GPIO41_FFRTS 41 /* FFUART request to send */ -#define GPIO42_BTRXD 42 /* BTUART receive data */ -#define GPIO43_BTTXD 43 /* BTUART transmit data */ -#define GPIO44_BTCTS 44 /* BTUART clear to send */ -#define GPIO45_BTRTS 45 /* BTUART request to send */ -#define GPIO46_ICPRXD 46 /* ICP receive data */ -#define GPIO46_STRXD 46 /* STD_UART receive data */ -#define GPIO47_ICPTXD 47 /* ICP transmit data */ -#define GPIO47_STTXD 47 /* STD_UART transmit data */ -#define GPIO48_nPOE 48 /* Output Enable for Card Space */ -#define GPIO49_nPWE 49 /* Write Enable for Card Space */ -#define GPIO50_nPIOR 50 /* I/O Read for Card Space */ -#define GPIO51_nPIOW 51 /* I/O Write for Card Space */ -#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ -#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ -#define GPIO53_MMCCLK 53 /* MMC Clock */ -#define GPIO54_MMCCLK 54 /* MMC Clock */ -#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ -#define GPIO55_nPREG 55 /* Card Address bit 26 */ -#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ -#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ -#define GPIO58_LDD_0 58 /* LCD data pin 0 */ -#define GPIO59_LDD_1 59 /* LCD data pin 1 */ -#define GPIO60_LDD_2 60 /* LCD data pin 2 */ -#define GPIO61_LDD_3 61 /* LCD data pin 3 */ -#define GPIO62_LDD_4 62 /* LCD data pin 4 */ -#define GPIO63_LDD_5 63 /* LCD data pin 5 */ -#define GPIO64_LDD_6 64 /* LCD data pin 6 */ -#define GPIO65_LDD_7 65 /* LCD data pin 7 */ -#define GPIO66_LDD_8 66 /* LCD data pin 8 */ -#define GPIO66_MBREQ 66 /* alternate bus master req */ -#define GPIO67_LDD_9 67 /* LCD data pin 9 */ -#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */ -#define GPIO68_LDD_10 68 /* LCD data pin 10 */ -#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */ -#define GPIO69_LDD_11 69 /* LCD data pin 11 */ -#define GPIO69_MMCCLK 69 /* MMC_CLK */ -#define GPIO70_LDD_12 70 /* LCD data pin 12 */ -#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */ -#define GPIO71_LDD_13 71 /* LCD data pin 13 */ -#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */ -#define GPIO72_LDD_14 72 /* LCD data pin 14 */ -#define GPIO72_32kHz 72 /* 32 kHz clock */ -#define GPIO73_LDD_15 73 /* LCD data pin 15 */ -#define GPIO73_MBGNT 73 /* Memory controller grant */ -#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */ -#define GPIO75_LCD_LCLK 75 /* LCD line clock */ -#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */ -#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */ -#define GPIO78_nCS_2 78 /* chip select 2 */ -#define GPIO79_nCS_3 79 /* chip select 3 */ -#define GPIO80_nCS_4 80 /* chip select 4 */ - -/* GPIO alternate function mode & direction */ - -#define GPIO_IN 0x000 -#define GPIO_OUT 0x080 -#define GPIO_ALT_FN_1_IN 0x100 -#define GPIO_ALT_FN_1_OUT 0x180 -#define GPIO_ALT_FN_2_IN 0x200 -#define GPIO_ALT_FN_2_OUT 0x280 -#define GPIO_ALT_FN_3_IN 0x300 -#define GPIO_ALT_FN_3_OUT 0x380 -#define GPIO_MD_MASK_NR 0x07f -#define GPIO_MD_MASK_DIR 0x080 -#define GPIO_MD_MASK_FN 0x300 - -#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN) -#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT) -#define GPIO8_48MHz_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT) -#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) -#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) -#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) -#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) -#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) -#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) -#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) -#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) -#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) -#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) -#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) -#define GPIO23_SCLK_md (23 | GPIO_ALT_FN_2_OUT) -#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) -#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) -#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN) -#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_I2S_MD (28 | GPIO_ALT_FN_2_IN) -#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) -#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) -#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) -#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) -#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) -#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) -#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) -#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) -#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) -#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) -#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) -#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) -#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) -#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) -#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) -#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) -#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) -#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) -#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) -#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) -#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) -#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) -#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) -#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) -#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) -#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) -#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) -#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) -#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) -#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) -#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) -#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) -#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) -#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) -#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) -#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) -#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) -#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) -#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) -#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) -#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT) -#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT) -#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT) -#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT) -#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT) -#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT) -#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT) -#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN) -#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT) -#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT) -#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT) -#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT) -#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT) -#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT) -#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT) -#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT) -#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT) -#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT) -#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT) -#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT) -#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT) -#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT) -#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT) -#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT) -#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) -#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) -#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) -#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) -#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) - -#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT) -#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT) - -/* - * Power Manager - */ -#ifdef CONFIG_CPU_MONAHANS - -#define ASCR 0x40F40000 /* Application Subsystem Power Status/Control Register */ -#define ARSR 0x40F40004 /* Application Subsystem Reset Status Register */ -#define AD3ER 0x40F40008 /* Application Subsystem D3 state Wakeup Enable Register */ -#define AD3SR 0x40F4000C /* Application Subsystem D3 state Wakeup Status Register */ -#define AD2D0ER 0x40F40010 /* Application Subsystem D2 to D0 state Wakeup Enable Register */ -#define AD2D0SR 0x40F40014 /* Application Subsystem D2 to D0 state Wakeup Status Register */ -#define AD2D1ER 0x40F40018 /* Application Subsystem D2 to D1 state Wakeup Enable Register */ -#define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ -#define AD1D0ER 0x40F40020 /* Application Subsystem D1 to D0 state Wakeup Enable Register */ -#define AD1D0SR 0x40F40024 /* Application Subsystem D1 to D0 state Wakeup Status Register */ -#define ASDCNT 0x40F40028 /* Application Subsystem SRAM Drowsy Count Register */ -#define AD3R 0x40F40030 /* Application Subsystem D3 State Configuration Register */ -#define AD2R 0x40F40034 /* Application Subsystem D2 State Configuration Register */ -#define AD1R 0x40F40038 /* Application Subsystem D1 State Configuration Register */ - -#define PMCR 0x40F50000 /* Power Manager Control Register */ -#define PSR 0x40F50004 /* Power Manager S2 Status Register */ -#define PSPR 0x40F50008 /* Power Manager Scratch Pad Register */ -#define PCFR 0x40F5000C /* Power Manager General Configuration Register */ -#define PWER 0x40F50010 /* Power Manager Wake-up Enable Register */ -#define PWSR 0x40F50014 /* Power Manager Wake-up Status Register */ -#define PECR 0x40F50018 /* Power Manager EXT_WAKEUP[1:0] Control Register */ -#define DCDCSR 0x40F50080 /* DC-DC Controller Status Register */ -#define PVCR 0x40F50100 /* Power Manager Voltage Change Control Register */ -#define PCMD(x) (0x40F50110 + x*4) -#define PCMD0 (0x40F50110 + 0 * 4) -#define PCMD1 (0x40F50110 + 1 * 4) -#define PCMD2 (0x40F50110 + 2 * 4) -#define PCMD3 (0x40F50110 + 3 * 4) -#define PCMD4 (0x40F50110 + 4 * 4) -#define PCMD5 (0x40F50110 + 5 * 4) -#define PCMD6 (0x40F50110 + 6 * 4) -#define PCMD7 (0x40F50110 + 7 * 4) -#define PCMD8 (0x40F50110 + 8 * 4) -#define PCMD9 (0x40F50110 + 9 * 4) -#define PCMD10 (0x40F50110 + 10 * 4) -#define PCMD11 (0x40F50110 + 11 * 4) -#define PCMD12 (0x40F50110 + 12 * 4) -#define PCMD13 (0x40F50110 + 13 * 4) -#define PCMD14 (0x40F50110 + 14 * 4) -#define PCMD15 (0x40F50110 + 15 * 4) -#define PCMD16 (0x40F50110 + 16 * 4) -#define PCMD17 (0x40F50110 + 17 * 4) -#define PCMD18 (0x40F50110 + 18 * 4) -#define PCMD19 (0x40F50110 + 19 * 4) -#define PCMD20 (0x40F50110 + 20 * 4) -#define PCMD21 (0x40F50110 + 21 * 4) -#define PCMD22 (0x40F50110 + 22 * 4) -#define PCMD23 (0x40F50110 + 23 * 4) -#define PCMD24 (0x40F50110 + 24 * 4) -#define PCMD25 (0x40F50110 + 25 * 4) -#define PCMD26 (0x40F50110 + 26 * 4) -#define PCMD27 (0x40F50110 + 27 * 4) -#define PCMD28 (0x40F50110 + 28 * 4) -#define PCMD29 (0x40F50110 + 29 * 4) -#define PCMD30 (0x40F50110 + 30 * 4) -#define PCMD31 (0x40F50110 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -#define PCMD_SQC (3<<8) /* only 00 and 01 are valid */ - -#define PVCR_FVC (0x1 << 28) -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -#define PVCR_ReadPointer 0x01f00000 -#define PVCR_SlaveAddress (0x7f) - -#else /* ifdef CONFIG_CPU_MONAHANS */ - -#define PMCR 0x40F00000 /* Power Manager Control Register */ -#define PSSR 0x40F00004 /* Power Manager Sleep Status Register */ -#define PSPR 0x40F00008 /* Power Manager Scratch Pad Register */ -#define PWER 0x40F0000C /* Power Manager Wake-up Enable Register */ -#define PRER 0x40F00010 /* Power Manager GPIO Rising-Edge Detect Enable Register */ -#define PFER 0x40F00014 /* Power Manager GPIO Falling-Edge Detect Enable Register */ -#define PEDR 0x40F00018 /* Power Manager GPIO Edge Detect Status Register */ -#define PCFR 0x40F0001C /* Power Manager General Configuration Register */ -#define PGSR0 0x40F00020 /* Power Manager GPIO Sleep State Register for GP[31-0] */ -#define PGSR1 0x40F00024 /* Power Manager GPIO Sleep State Register for GP[63-32] */ -#define PGSR2 0x40F00028 /* Power Manager GPIO Sleep State Register for GP[84-64] */ -#define PGSR3 0x40F0002C /* Power Manager GPIO Sleep State Register for GP[118-96] */ -#define RCSR 0x40F00030 /* Reset Controller Status Register */ - -#define PSLR 0x40F00034 /* Power Manager Sleep Config Register */ -#define PSTR 0x40F00038 /* Power Manager Standby Config Register */ -#define PSNR 0x40F0003C /* Power Manager Sense Config Register */ -#define PVCR 0x40F00040 /* Power Manager VoltageControl Register */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Register */ -#define PCMD(x) (0x40F00080 + x*4) -#define PCMD0 (0x40F00080 + 0 * 4) -#define PCMD1 (0x40F00080 + 1 * 4) -#define PCMD2 (0x40F00080 + 2 * 4) -#define PCMD3 (0x40F00080 + 3 * 4) -#define PCMD4 (0x40F00080 + 4 * 4) -#define PCMD5 (0x40F00080 + 5 * 4) -#define PCMD6 (0x40F00080 + 6 * 4) -#define PCMD7 (0x40F00080 + 7 * 4) -#define PCMD8 (0x40F00080 + 8 * 4) -#define PCMD9 (0x40F00080 + 9 * 4) -#define PCMD10 (0x40F00080 + 10 * 4) -#define PCMD11 (0x40F00080 + 11 * 4) -#define PCMD12 (0x40F00080 + 12 * 4) -#define PCMD13 (0x40F00080 + 13 * 4) -#define PCMD14 (0x40F00080 + 14 * 4) -#define PCMD15 (0x40F00080 + 15 * 4) -#define PCMD16 (0x40F00080 + 16 * 4) -#define PCMD17 (0x40F00080 + 17 * 4) -#define PCMD18 (0x40F00080 + 18 * 4) -#define PCMD19 (0x40F00080 + 19 * 4) -#define PCMD20 (0x40F00080 + 20 * 4) -#define PCMD21 (0x40F00080 + 21 * 4) -#define PCMD22 (0x40F00080 + 22 * 4) -#define PCMD23 (0x40F00080 + 23 * 4) -#define PCMD24 (0x40F00080 + 24 * 4) -#define PCMD25 (0x40F00080 + 25 * 4) -#define PCMD26 (0x40F00080 + 26 * 4) -#define PCMD27 (0x40F00080 + 27 * 4) -#define PCMD28 (0x40F00080 + 28 * 4) -#define PCMD29 (0x40F00080 + 29 * 4) -#define PCMD30 (0x40F00080 + 30 * 4) -#define PCMD31 (0x40F00080 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -/* FIXME: PCMD_SQC need be checked. */ -#define PCMD_SQC (3<<8) /* currently only bit 8 is changerable, */ - /* bit 9 should be 0 all day. */ -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -/* define MACRO for Power Manager General Configuration Register (PCFR) */ -#define PCFR_FVC (0x1 << 10) -#define PCFR_PI2C_EN (0x1 << 6) - -#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ -#define PSSR_RDH (1 << 5) /* Read Disable Hold */ -#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ -#define PSSR_VFS (1 << 2) /* VDD Fault Status */ -#define PSSR_BFS (1 << 1) /* Battery Fault Status */ -#define PSSR_SSS (1 << 0) /* Software Sleep Status */ - -#define PCFR_DS (1 << 3) /* Deep Sleep Mode */ -#define PCFR_FS (1 << 2) /* Float Static Chip Selects */ -#define PCFR_FP (1 << 1) /* Float PCMCIA controls */ -#define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ - -#define RCSR_GPR (1 << 3) /* GPIO Reset */ -#define RCSR_SMR (1 << 2) /* Sleep Mode */ -#define RCSR_WDR (1 << 1) /* Watchdog Reset */ -#define RCSR_HWR (1 << 0) /* Hardware Reset */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* - * SSP Serial Port Registers - */ -#define SSCR0 0x41000000 /* SSP Control Register 0 */ -#define SSCR1 0x41000004 /* SSP Control Register 1 */ -#define SSSR 0x41000008 /* SSP Status Register */ -#define SSITR 0x4100000C /* SSP Interrupt Test Register */ -#define SSDR 0x41000010 /* (Write / Read) SSP Data Write Register/SSP Data Read Register */ - -/* - * MultiMediaCard (MMC) controller - */ -#define MMC_STRPCL 0x41100000 /* Control to start and stop MMC clock */ -#define MMC_STAT 0x41100004 /* MMC Status Register (read only) */ -#define MMC_CLKRT 0x41100008 /* MMC clock rate */ -#define MMC_SPI 0x4110000c /* SPI mode control bits */ -#define MMC_CMDAT 0x41100010 /* Command/response/data sequence control */ -#define MMC_RESTO 0x41100014 /* Expected response time out */ -#define MMC_RDTO 0x41100018 /* Expected data read time out */ -#define MMC_BLKLEN 0x4110001c /* Block length of data transaction */ -#define MMC_NOB 0x41100020 /* Number of blocks, for block mode */ -#define MMC_PRTBUF 0x41100024 /* Partial MMC_TXFIFO FIFO written */ -#define MMC_I_MASK 0x41100028 /* Interrupt Mask */ -#define MMC_I_REG 0x4110002c /* Interrupt Register (read only) */ -#define MMC_CMD 0x41100030 /* Index of current command */ -#define MMC_ARGH 0x41100034 /* MSW part of the current command argument */ -#define MMC_ARGL 0x41100038 /* LSW part of the current command argument */ -#define MMC_RES 0x4110003c /* Response FIFO (read only) */ -#define MMC_RXFIFO 0x41100040 /* Receive FIFO (read only) */ -#define MMC_TXFIFO 0x41100044 /* Transmit FIFO (write only) */ - - -/* - * LCD - */ -#define LCCR0 0x44000000 /* LCD Controller Control Register 0 */ -#define LCCR1 0x44000004 /* LCD Controller Control Register 1 */ -#define LCCR2 0x44000008 /* LCD Controller Control Register 2 */ -#define LCCR3 0x4400000C /* LCD Controller Control Register 3 */ -#define DFBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define DFBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define LCSR0 0x44000038 /* LCD Controller Status Register */ -#define LCSR1 0x44000034 /* LCD Controller Status Register */ -#define LIIDR 0x4400003C /* LCD Controller Interrupt ID Register */ -#define TMEDRGBR 0x44000040 /* TMED RGB Seed Register */ -#define TMEDCR 0x44000044 /* TMED Control Register */ - -#define FDADR0 0x44000200 /* DMA Channel 0 Frame Descriptor Address Register */ -#define FSADR0 0x44000204 /* DMA Channel 0 Frame Source Address Register */ -#define FIDR0 0x44000208 /* DMA Channel 0 Frame ID Register */ -#define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ -#define FDADR1 0x44000210 /* DMA Channel 1 Frame Descriptor Address Register */ -#define FSADR1 0x44000214 /* DMA Channel 1 Frame Source Address Register */ -#define FIDR1 0x44000218 /* DMA Channel 1 Frame ID Register */ -#define LDCMD1 0x4400021C /* DMA Channel 1 Command Register */ - -#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ -#define LCCR0_CMS (1 << 1) /* Color = 0, Monochrome = 1 */ -#define LCCR0_SDS (1 << 2) /* Single Panel = 0, Dual Panel = 1 */ -#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ -#define LCCR0_SFM (1 << 4) /* Start of frame mask */ -#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ -#define LCCR0_EFM (1 << 6) /* End of Frame mask */ -#define LCCR0_PAS (1 << 7) /* Passive = 0, Active = 1 */ -#define LCCR0_BLE (1 << 8) /* Little Endian = 0, Big Endian = 1 */ -#define LCCR0_DPD (1 << 9) /* Double Pixel mode, 4 pixel value = 0, 8 pixle values = 1 */ -#define LCCR0_DIS (1 << 10) /* LCD Disable */ -#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ -#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ -#define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ -#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ -#if defined(CONFIG_PXA27X) -#define LCCR0_LCDT (1 << 22) /* LCD Panel Type */ -#define LCCR0_RDSTM (1 << 23) /* Read Status Interrupt Mask */ -#define LCCR0_CMDIM (1 << 24) /* Command Interrupt Mask */ -#endif - -#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ -#define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ - (((Pixel) - 1) << FShft (LCCR1_PPL)) - -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ -#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [1..64 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_HSW)) - -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ -#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) - -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ -#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) - - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) - -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ -#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) - -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ -#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) - -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ -#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ -#define LCCR3_API_S 16 -#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ -#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ -#define LCCR3_PCP (1 << 22) /* pixel clock polarity */ -#define LCCR3_OEP (1 << 23) /* output enable polarity */ -#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ - -#define LCCR3_PDFOR_0 (0 << 30) -#define LCCR3_PDFOR_1 (1 << 30) -#define LCCR3_PDFOR_2 (2 << 30) -#define LCCR3_PDFOR_3 (3 << 30) - - -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ -#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor */ \ - (((Div) << FShft (LCCR3_PCD))) - - -#define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ -#define LCCR3_Bpp(Bpp) /* Bit Per Pixel */ \ - ((((Bpp&0x7) << FShft (LCCR3_BPP)))|(((Bpp&0x8)<<26))) - -#define LCCR3_ACB Fld (8, 8) /* AC Bias */ -#define LCCR3_Acb(Acb) /* BAC Bias */ \ - (((Acb) << FShft (LCCR3_ACB))) - -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ - -#define LCSR0_LDD (1 << 0) /* LCD Disable Done */ -#define LCSR0_SOF (1 << 1) /* Start of frame */ -#define LCSR0_BER (1 << 2) /* Bus error */ -#define LCSR0_ABC (1 << 3) /* AC Bias count */ -#define LCSR0_IUL (1 << 4) /* input FIFO underrun Lower panel */ -#define LCSR0_IUU (1 << 5) /* input FIFO underrun Upper panel */ -#define LCSR0_OU (1 << 6) /* output FIFO underrun */ -#define LCSR0_QD (1 << 7) /* quick disable */ -#define LCSR0_EOF0 (1 << 8) /* end of frame */ -#define LCSR0_BS (1 << 9) /* branch status */ -#define LCSR0_SINT (1 << 10) /* subsequent interrupt */ - -#define LCSR1_SOF1 (1 << 0) -#define LCSR1_SOF2 (1 << 1) -#define LCSR1_SOF3 (1 << 2) -#define LCSR1_SOF4 (1 << 3) -#define LCSR1_SOF5 (1 << 4) -#define LCSR1_SOF6 (1 << 5) - -#define LCSR1_EOF1 (1 << 8) -#define LCSR1_EOF2 (1 << 9) -#define LCSR1_EOF3 (1 << 10) -#define LCSR1_EOF4 (1 << 11) -#define LCSR1_EOF5 (1 << 12) -#define LCSR1_EOF6 (1 << 13) - -#define LCSR1_BS1 (1 << 16) -#define LCSR1_BS2 (1 << 17) -#define LCSR1_BS3 (1 << 18) -#define LCSR1_BS4 (1 << 19) -#define LCSR1_BS5 (1 << 20) -#define LCSR1_BS6 (1 << 21) - -#define LCSR1_IU2 (1 << 25) -#define LCSR1_IU3 (1 << 26) -#define LCSR1_IU4 (1 << 27) -#define LCSR1_IU5 (1 << 28) -#define LCSR1_IU6 (1 << 29) - -#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ -#if defined(CONFIG_PXA27X) -#define LDCMD_SOFINT (1 << 22) -#define LDCMD_EOFINT (1 << 21) -#endif - -/* - * Memory controller - */ - -#ifdef CONFIG_CPU_MONAHANS - -/* PXA3xx */ - -/* Static Memory Controller Registers */ -#define MSC0 0x4A000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4A00000C /* Static Memory Control Register 1 */ -#define MECR 0x4A000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXCNFG 0x4A00001C /* Synchronous Static Memory Control Register */ -#define MCMEM0 0x4A000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCATT0 0x4A000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MEMCLKCFG 0x4A000068 /* SCLK speed configuration */ -#define CSADRCFG0 0x4A000080 /* Address Configuration for chip select 0 */ -#define CSADRCFG1 0x4A000084 /* Address Configuration for chip select 1 */ -#define CSADRCFG2 0x4A000088 /* Address Configuration for chip select 2 */ -#define CSADRCFG3 0x4A00008C /* Address Configuration for chip select 3 */ -#define CSADRCFG_P 0x4A000090 /* Address Configuration for pcmcia card interface */ -#define CSMSADRCFG 0x4A0000A0 /* Master Address Configuration Register */ -#define CLK_RET_DEL 0x4A0000B0 /* Delay line and mux selects for return data latching for sync. flash */ -#define ADV_RET_DEL 0x4A0000B4 /* Delay line and mux selects for return data latching for sync. flash */ - -/* Dynamic Memory Controller Registers */ -#define MDCNFG 0x48100000 /* SDRAM Configuration Register 0 */ -#define MDREFR 0x48100004 /* SDRAM Refresh Control Register */ -#define FLYCNFG 0x48100020 /* Fly-by DMA DVAL[1:0] polarities */ -#define MDMRS 0x48100040 /* MRS value to be written to SDRAM */ -#define DDR_SCAL 0x48100050 /* Software Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_HCAL 0x48100060 /* Hardware Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_WCAL 0x48100068 /* DDR Write Strobe Calibration Register */ -#define DMCIER 0x48100070 /* Dynamic MC Interrupt Enable Register. */ -#define DMCISR 0x48100078 /* Dynamic MC Interrupt Status Register. */ -#define DDR_DLS 0x48100080 /* DDR Delay Line Value Status register for external DDR memory. */ -#define EMPI 0x48100090 /* EMPI Control Register */ -#define RCOMP 0x48100100 -#define PAD_MA 0x48100110 -#define PAD_MDMSB 0x48100114 -#define PAD_MDLSB 0x48100118 -#define PAD_DMEM 0x4810011c -#define PAD_SDCLK 0x48100120 -#define PAD_SDCS 0x48100124 -#define PAD_SMEM 0x48100128 -#define PAD_SCLK 0x4810012C -#define TAI 0x48100F00 /* TAI Tavor Address Isolation Register */ - -/* Some frequently used bits */ -#define MDCNFG_DMAP 0x80000000 /* SDRAM 1GB Memory Map Enable */ -#define MDCNFG_DMCEN 0x40000000 /* Enable Dynamic Memory Controller */ -#define MDCNFG_HWFREQ 0x20000000 /* Hardware Frequency Change Calibration */ -#define MDCNFG_DTYPE 0x400 /* SDRAM Type: 1=DDR SDRAM */ - -#define MDCNFG_DTC_0 0x0 /* Timing Category of SDRAM */ -#define MDCNFG_DTC_1 0x100 -#define MDCNFG_DTC_2 0x200 -#define MDCNFG_DTC_3 0x300 - -#define MDCNFG_DRAC_12 0x0 /* Number of Row Access Bits */ -#define MDCNFG_DRAC_13 0x20 -#define MDCNFG_DRAC_14 0x40 - -#define MDCNFG_DCAC_9 0x0 /* Number of Column Acess Bits */ -#define MDCNFG_DCAC_10 0x08 -#define MDCNFG_DCAC_11 0x10 - -#define MDCNFG_DBW_16 0x4 /* SDRAM Data Bus width 16bit */ -#define MDCNFG_DCSE1 0x2 /* SDRAM CS 1 Enable */ -#define MDCNFG_DCSE0 0x1 /* SDRAM CS 0 Enable */ - - -/* Data Flash Controller Registers */ - -#define NDCR 0x43100000 /* Data Flash Control register */ -#define NDTR0CS0 0x43100004 /* Data Controller Timing Parameter 0 Register for ND_nCS0 */ -/* #define NDTR0CS1 0x43100008 /\* Data Controller Timing Parameter 0 Register for ND_nCS1 *\/ */ -#define NDTR1CS0 0x4310000C /* Data Controller Timing Parameter 1 Register for ND_nCS0 */ -/* #define NDTR1CS1 0x43100010 /\* Data Controller Timing Parameter 1 Register for ND_nCS1 *\/ */ -#define NDSR 0x43100014 /* Data Controller Status Register */ -#define NDPCR 0x43100018 /* Data Controller Page Count Register */ -#define NDBDR0 0x4310001C /* Data Controller Bad Block Register 0 */ -#define NDBDR1 0x43100020 /* Data Controller Bad Block Register 1 */ -#define NDDB 0x43100040 /* Data Controller Data Buffer */ -#define NDCB0 0x43100048 /* Data Controller Command Buffer0 */ -#define NDCB1 0x4310004C /* Data Controller Command Buffer1 */ -#define NDCB2 0x43100050 /* Data Controller Command Buffer2 */ - -#define NDCR_SPARE_EN (0x1<<31) -#define NDCR_ECC_EN (0x1<<30) -#define NDCR_DMA_EN (0x1<<29) -#define NDCR_ND_RUN (0x1<<28) -#define NDCR_DWIDTH_C (0x1<<27) -#define NDCR_DWIDTH_M (0x1<<26) -#define NDCR_PAGE_SZ (0x3<<24) -#define NDCR_NCSX (0x1<<23) -#define NDCR_ND_STOP (0x1<<22) -/* reserved: - * #define NDCR_ND_MODE (0x3<<21) - * #define NDCR_NAND_MODE 0x0 */ -#define NDCR_CLR_PG_CNT (0x1<<20) -#define NDCR_CLR_ECC (0x1<<19) -#define NDCR_RD_ID_CNT (0x7<<16) -#define NDCR_RA_START (0x1<<15) -#define NDCR_PG_PER_BLK (0x1<<14) -#define NDCR_ND_ARB_EN (0x1<<12) -#define NDCR_RDYM (0x1<<11) -#define NDCR_CS0_PAGEDM (0x1<<10) -#define NDCR_CS1_PAGEDM (0x1<<9) -#define NDCR_CS0_CMDDM (0x1<<8) -#define NDCR_CS1_CMDDM (0x1<<7) -#define NDCR_CS0_BBDM (0x1<<6) -#define NDCR_CS1_BBDM (0x1<<5) -#define NDCR_DBERRM (0x1<<4) -#define NDCR_SBERRM (0x1<<3) -#define NDCR_WRDREQM (0x1<<2) -#define NDCR_RDDREQM (0x1<<1) -#define NDCR_WRCMDREQM (0x1) - -#define NDSR_RDY (0x1<<11) -#define NDSR_CS0_PAGED (0x1<<10) -#define NDSR_CS1_PAGED (0x1<<9) -#define NDSR_CS0_CMDD (0x1<<8) -#define NDSR_CS1_CMDD (0x1<<7) -#define NDSR_CS0_BBD (0x1<<6) -#define NDSR_CS1_BBD (0x1<<5) -#define NDSR_DBERR (0x1<<4) -#define NDSR_SBERR (0x1<<3) -#define NDSR_WRDREQ (0x1<<2) -#define NDSR_RDDREQ (0x1<<1) -#define NDSR_WRCMDREQ (0x1) - -#define NDCB0_AUTO_RS (0x1<<25) -#define NDCB0_CSEL (0x1<<24) -#define NDCB0_CMD_TYPE (0x7<<21) -#define NDCB0_NC (0x1<<20) -#define NDCB0_DBC (0x1<<19) -#define NDCB0_ADDR_CYC (0x7<<16) -#define NDCB0_CMD2 (0xff<<8) -#define NDCB0_CMD1 (0xff) -#define MCMEM(s) MCMEM0 -#define MCATT(s) MCATT0 -#define MCIO(s) MCIO0 -#define MECR_CIT (1 << 1)/* Card Is There: 0 -> no card, 1 -> card inserted */ - -/* Maximum values for NAND Interface Timing Registers in DFC clock - * periods */ -#define DFC_MAX_tCH 7 -#define DFC_MAX_tCS 7 -#define DFC_MAX_tWH 7 -#define DFC_MAX_tWP 7 -#define DFC_MAX_tRH 7 -#define DFC_MAX_tRP 15 -#define DFC_MAX_tR 65535 -#define DFC_MAX_tWHR 15 -#define DFC_MAX_tAR 15 - -#define DFC_CLOCK 104 /* DFC Clock is 104 MHz */ -#define DFC_CLK_PER_US DFC_CLOCK/1000 /* clock period in ns */ - -#else /* CONFIG_CPU_MONAHANS */ - -/* PXA2xx */ - -#define MEMC_BASE 0x48000000 /* Base of Memory Controller */ -#define MDCNFG_OFFSET 0x0 -#define MDREFR_OFFSET 0x4 -#define MSC0_OFFSET 0x8 -#define MSC1_OFFSET 0xC -#define MSC2_OFFSET 0x10 -#define MECR_OFFSET 0x14 -#define SXLCR_OFFSET 0x18 -#define SXCNFG_OFFSET 0x1C -#define FLYCNFG_OFFSET 0x20 -#define SXMRS_OFFSET 0x24 -#define MCMEM0_OFFSET 0x28 -#define MCMEM1_OFFSET 0x2C -#define MCATT0_OFFSET 0x30 -#define MCATT1_OFFSET 0x34 -#define MCIO0_OFFSET 0x38 -#define MCIO1_OFFSET 0x3C -#define MDMRS_OFFSET 0x40 - -#define MDCNFG 0x48000000 /* SDRAM Configuration Register 0 */ -#define MDCNFG_DE0 0x00000001 -#define MDCNFG_DE1 0x00000002 -#define MDCNFG_DE2 0x00010000 -#define MDCNFG_DE3 0x00020000 -#define MDCNFG_DWID0 0x00000004 - -#define MDREFR 0x48000004 /* SDRAM Refresh Control Register */ -#define MSC0 0x48000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4800000C /* Static Memory Control Register 1 */ -#define MSC2 0x48000010 /* Static Memory Control Register 2 */ -#define MECR 0x48000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXLCR 0x48000018 /* LCR value to be written to SDRAM-Timing Synchronous Flash */ -#define SXCNFG 0x4800001C /* Synchronous Static Memory Control Register */ -#define FLYCNFG 0x48000020 -#define SXMRS 0x48000024 /* MRS value to be written to Synchronous Flash or SMROM */ -#define MCMEM0 0x48000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCMEM1 0x4800002C /* Card interface Common Memory Space Socket 1 Timing */ -#define MCATT0 0x48000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCATT1 0x48000034 /* Card interface Attribute Space Socket 1 Timing Configuration */ -#define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MCIO1 0x4800003C /* Card interface I/O Space Socket 1 Timing Configuration */ -#define MDMRS 0x48000040 /* MRS value to be written to SDRAM */ -#define BOOT_DEF 0x48000044 /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ - -#define MDREFR_ALTREFA (1 << 31) /* Exiting Alternate Bus Master Mode Refresh Control */ -#define MDREFR_ALTREFB (1 << 30) /* Entering Alternate Bus Master Mode Refresh Control */ -#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ -#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ -#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ -#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ -#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ -#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */ -#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */ -#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */ -#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */ -#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */ -#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */ -#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */ -#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ -#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ - -#if defined(CONFIG_PXA27X) - -#define ARB_CNTRL 0x48000048 /* Arbiter Control Register */ - -#define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ -#define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ -#define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ -#define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ -#define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ -#define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ -#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ -#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ -#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ - -#endif /* CONFIG_PXA27X */ - -/* LCD registers */ -#define LCCR4 0x44000010 /* LCD Controller Control Register 4 */ -#define LCCR5 0x44000014 /* LCD Controller Control Register 5 */ -#define FBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define FBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define FBR2 0x44000028 /* DMA Channel 2 Frame Branch Register */ -#define FBR3 0x4400002C /* DMA Channel 3 Frame Branch Register */ -#define FBR4 0x44000030 /* DMA Channel 4 Frame Branch Register */ -#define FDADR2 0x44000220 /* DMA Channel 2 Frame Descriptor Address Register */ -#define FSADR2 0x44000224 /* DMA Channel 2 Frame Source Address Register */ -#define FIDR2 0x44000228 /* DMA Channel 2 Frame ID Register */ -#define LDCMD2 0x4400022C /* DMA Channel 2 Command Register */ -#define FDADR3 0x44000230 /* DMA Channel 3 Frame Descriptor Address Register */ -#define FSADR3 0x44000234 /* DMA Channel 3 Frame Source Address Register */ -#define FIDR3 0x44000238 /* DMA Channel 3 Frame ID Register */ -#define LDCMD3 0x4400023C /* DMA Channel 3 Command Register */ -#define FDADR4 0x44000240 /* DMA Channel 4 Frame Descriptor Address Register */ -#define FSADR4 0x44000244 /* DMA Channel 4 Frame Source Address Register */ -#define FIDR4 0x44000248 /* DMA Channel 4 Frame ID Register */ -#define LDCMD4 0x4400024C /* DMA Channel 4 Command Register */ -#define FDADR5 0x44000250 /* DMA Channel 5 Frame Descriptor Address Register */ -#define FSADR5 0x44000254 /* DMA Channel 5 Frame Source Address Register */ -#define FIDR5 0x44000258 /* DMA Channel 5 Frame ID Register */ -#define LDCMD5 0x4400025C /* DMA Channel 5 Command Register */ - -#define OVL1C1 0x44000050 /* Overlay 1 Control Register 1 */ -#define OVL1C2 0x44000060 /* Overlay 1 Control Register 2 */ -#define OVL2C1 0x44000070 /* Overlay 2 Control Register 1 */ -#define OVL2C2 0x44000080 /* Overlay 2 Control Register 2 */ -#define CCR 0x44000090 /* Cursor Control Register */ - -#define FBR5 0x44000110 /* DMA Channel 5 Frame Branch Register */ -#define FBR6 0x44000114 /* DMA Channel 6 Frame Branch Register */ - -#define LCCR0_LDDALT (1<<26) /* LDD Alternate mapping bit when base pixel is RGBT16 */ -#define LCCR0_OUC (1<<25) /* Overlay Underlay Control Bit */ - -#define LCCR5_SOFM1 (1<<0) /* Start Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_SOFM2 (1<<1) /* Start Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_SOFM3 (1<<2) /* Start Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_SOFM4 (1<<3) /* Start Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_SOFM5 (1<<4) /* Start Of Frame Mask for cursor (channel 5) */ -#define LCCR5_SOFM6 (1<<5) /* Start Of Frame Mask for command data (channel 6) */ - -#define LCCR5_EOFM1 (1<<8) /* End Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_EOFM2 (1<<9) /* End Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_EOFM3 (1<<10) /* End Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_EOFM4 (1<<11) /* End Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_EOFM5 (1<<12) /* End Of Frame Mask for cursor (channel 5) */ -#define LCCR5_EOFM6 (1<<13) /* End Of Frame Mask for command data (channel 6) */ - -#define LCCR5_BSM1 (1<<16) /* Branch mask for Overlay 1 (channel 1) */ -#define LCCR5_BSM2 (1<<17) /* Branch mask for Overlay 2 (channel 2) */ -#define LCCR5_BSM3 (1<<18) /* Branch mask for Overlay 2 (channel 3) */ -#define LCCR5_BSM4 (1<<19) /* Branch mask for Overlay 2 (channel 4) */ -#define LCCR5_BSM5 (1<<20) /* Branch mask for cursor (channel 5) */ -#define LCCR5_BSM6 (1<<21) /* Branch mask for data command (channel 6) */ - -#define LCCR5_IUM1 (1<<24) /* Input FIFO Underrun Mask for Overlay 1 */ -#define LCCR5_IUM2 (1<<25) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM3 (1<<26) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM4 (1<<27) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM5 (1<<28) /* Input FIFO Underrun Mask for cursor */ -#define LCCR5_IUM6 (1<<29) /* Input FIFO Underrun Mask for data command */ - -#define OVL1C1_O1EN (1<<31) /* Enable bit for Overlay 1 */ -#define OVL2C1_O2EN (1<<31) /* Enable bit for Overlay 2 */ -#define CCR_CEN (1<<31) /* Enable bit for Cursor */ - -/* Keypad controller */ - -#define KPC 0x41500000 /* Keypad Interface Control register */ -#define KPDK 0x41500008 /* Keypad Interface Direct Key register */ -#define KPREC 0x41500010 /* Keypad Intefcace Rotary Encoder register */ -#define KPMK 0x41500018 /* Keypad Intefcace Matrix Key register */ -#define KPAS 0x41500020 /* Keypad Interface Automatic Scan register */ -#define KPASMKP0 0x41500028 /* Keypad Interface Automatic Scan Multiple Key Presser register 0 */ -#define KPASMKP1 0x41500030 /* Keypad Interface Automatic Scan Multiple Key Presser register 1 */ -#define KPASMKP2 0x41500038 /* Keypad Interface Automatic Scan Multiple Key Presser register 2 */ -#define KPASMKP3 0x41500040 /* Keypad Interface Automatic Scan Multiple Key Presser register 3 */ -#define KPKDI 0x41500048 /* Keypad Interface Key Debounce Interval register */ - -#define KPC_AS (0x1 << 30) /* Automatic Scan bit */ -#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */ -#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */ -#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */ -#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */ -#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */ -#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */ -#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */ -#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */ -#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */ -#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */ -#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */ -#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */ -#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */ -#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Key Debounce select */ -#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */ -#define KPC_DEE0 (0x1 << 2) /* Rotary Encoder 0 Enable */ -#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */ -#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */ - -#define KPDK_DKP (0x1 << 31) -#define KPDK_DK7 (0x1 << 7) -#define KPDK_DK6 (0x1 << 6) -#define KPDK_DK5 (0x1 << 5) -#define KPDK_DK4 (0x1 << 4) -#define KPDK_DK3 (0x1 << 3) -#define KPDK_DK2 (0x1 << 2) -#define KPDK_DK1 (0x1 << 1) -#define KPDK_DK0 (0x1 << 0) - -#define KPREC_OF1 (0x1 << 31) -#define kPREC_UF1 (0x1 << 30) -#define KPREC_OF0 (0x1 << 15) -#define KPREC_UF0 (0x1 << 14) - -#define KPMK_MKP (0x1 << 31) -#define KPAS_SO (0x1 << 31) -#define KPASMKPx_SO (0x1 << 31) - -#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ -#define PSLR 0x40F00034 -#define PSTR 0x40F00038 /* Power Manager Standby Configuration Reg */ -#define PSNR 0x40F0003C /* Power Manager Sense Configuration Reg */ -#define PVCR 0x40F00040 /* Power Manager Voltage Change Control Reg */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-Up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Status Reg */ -#define OSMR4 0x40A00080 /* */ -#define OSCR4 0x40A00040 /* OS Timer Counter Register */ -#define OMCR4 0x40A000C0 /* */ - -#endif /* CONFIG_PXA27X */ - -#endif /* _PXA_REGS_H_ */ diff --git a/arch/arm/include/asm/arch-s3c24x0/memory.h b/arch/arm/include/asm/arch-s3c24x0/memory.h deleted file mode 100644 index 61d6270..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/memory.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * linux/include/asm-arm/arch-s3c2400/memory.h by garyj@denx.de - * based on - * linux/include/asm-arm/arch-sa1100/memory.h - * - * Copyright (c) 1999 Nicolas Pitre <nico@visuaide.com> - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - - -/* - * Task size: 3GB - */ -#define TASK_SIZE (0xc0000000UL) -#define TASK_SIZE_26 (0x04000000UL) - -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -/* - * Page offset: 3GB - */ -#define PAGE_OFFSET (0xc0000000UL) - -/* - * Physical DRAM offset is 0x0c000000 on the S3C2400 - */ -#define PHYS_OFFSET (0x0c000000UL) - -#include <linux/config.h> - - -/* Modified for S3C2400, by chc, 20010509 */ -#define RAM_IN_BANK_0 32*1024*1024 -#define RAM_IN_BANK_1 0 -#define RAM_IN_BANK_2 0 -#define RAM_IN_BANK_3 0 - -#define MEM_SIZE (RAM_IN_BANK_0+RAM_IN_BANK_1+RAM_IN_BANK_2+RAM_IN_BANK_3) - - -/* translation macros */ -#define __virt_to_phys__is_a_macro -#define __phys_to_virt__is_a_macro - -#if (RAM_IN_BANK_1 + RAM_IN_BANK_2 + RAM_IN_BANK_3 == 0) - -#define __virt_to_phys(x) ( (x) - PAGE_OFFSET + 0x0c000000 ) -#define __phys_to_virt(x) ( (x) - 0x0c000000 + PAGE_OFFSET ) - -#elif (RAM_IN_BANK_0 == RAM_IN_BANK_1) && \ - (RAM_IN_BANK_2 + RAM_IN_BANK_3 == 0) - -/* Two identical banks */ -#define __virt_to_phys(x) \ - ( ((x) < PAGE_OFFSET+RAM_IN_BANK_0) ? \ - ((x) - PAGE_OFFSET + _DRAMBnk0) : \ - ((x) - PAGE_OFFSET - RAM_IN_BANK_0 + _DRAMBnk1) ) -#define __phys_to_virt(x) \ - ( ((x)&0x07ffffff) + \ - (((x)&0x08000000) ? PAGE_OFFSET+RAM_IN_BANK_0 : PAGE_OFFSET) ) -#else - -/* It's more efficient for all other cases to use the function call */ -#undef __virt_to_phys__is_a_macro -#undef __phys_to_virt__is_a_macro -extern unsigned long __virt_to_phys(unsigned long vpage); -extern unsigned long __phys_to_virt(unsigned long ppage); - -#endif - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - * - * On the SA1100, bus addresses are equivalent to physical addresses. - */ -#define __virt_to_bus__is_a_macro -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt__is_a_macro -#define __bus_to_virt(x) __phys_to_virt(x) - - -#ifdef CONFIG_DISCONTIGMEM -#error "CONFIG_DISCONTIGMEM will not work on S3C2400" -/* - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much more convenient to use Linux's NUMA support to implement - * our memory map representation. Assuming all memory nodes have equal access - * characteristics, we then have generic discontiguous memory support. - * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. - * - * node 0: 0xc0000000 - 0xc7ffffff - * node 1: 0xc8000000 - 0xcfffffff - * node 2: 0xd0000000 - 0xd7ffffff - * node 3: 0xd8000000 - 0xdfffffff - */ - -#define NR_NODES 4 - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - 0xc0000000) >> 27) - -/* - * Given a physical address, convert it to a node id. - */ -#define PHYS_TO_NID(addr) KVADDR_TO_NID(__phys_to_virt(addr)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) \ - NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(kvaddr) \ - (((unsigned long)(kvaddr) & 0x07ffffff) >> PAGE_SHIFT) - -/* - * Given a kaddr, virt_to_page returns a pointer to the corresponding - * mem_map entry. - */ -#define virt_to_page(kaddr) \ - (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) - -/* - * VALID_PAGE returns a non-zero value if given page pointer is valid. - * This assumes all node's mem_maps are stored within the node they refer to. - */ -#define VALID_PAGE(page) \ -({ unsigned int node = KVADDR_TO_NID(page); \ - ( (node < NR_NODES) && \ - ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \ -}) - -#else - -#define PHYS_TO_NID(addr) (0) - -#endif -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2400.h b/arch/arm/include/asm/arch-s3c24x0/s3c2400.h deleted file mode 100644 index 2678be1..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/s3c2400.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c2400.h - * Version : 31.3.2003 - * - * Based on S3C2400X User's manual Rev 1.1 - ************************************************/ - -#ifndef __S3C2400_H__ -#define __S3C2400_H__ - -#define S3C24X0_UART_CHANNELS 2 -#define S3C24X0_SPI_CHANNELS 1 -#define PALETTE (0x14A00400) /* SJS */ - -enum s3c24x0_uarts_nr { - S3C24X0_UART0, - S3C24X0_UART1, -}; - -/*S3C2400 device base addresses */ -#define S3C24X0_MEMCTL_BASE 0x14000000 -#define S3C24X0_USB_HOST_BASE 0x14200000 -#define S3C24X0_INTERRUPT_BASE 0x14400000 -#define S3C24X0_DMA_BASE 0x14600000 -#define S3C24X0_CLOCK_POWER_BASE 0x14800000 -#define S3C24X0_LCD_BASE 0x14A00000 -#define S3C24X0_UART_BASE 0x15000000 -#define S3C24X0_TIMER_BASE 0x15100000 -#define S3C24X0_USB_DEVICE_BASE 0x15200140 -#define S3C24X0_WATCHDOG_BASE 0x15300000 -#define S3C24X0_I2C_BASE 0x15400000 -#define S3C24X0_I2S_BASE 0x15508000 -#define S3C24X0_GPIO_BASE 0x15600000 -#define S3C24X0_RTC_BASE 0x15700000 -#define S3C24X0_ADC_BASE 0x15800000 -#define S3C24X0_SPI_BASE 0x15900000 -#define S3C2400_MMC_BASE 0x15A00000 - -/* include common stuff */ -#include <asm/arch/s3c24x0.h> - - -static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) -{ - return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; -} - -static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) -{ - return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; -} - -static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) -{ - return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; -} - -static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) -{ - return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; -} - -static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) -{ - return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; -} - -static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) -{ - return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; -} - -static inline struct s3c24x0_uart - *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) -{ - return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); -} - -static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) -{ - return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; -} - -static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) -{ - return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; -} - -static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) -{ - return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; -} - -static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) -{ - return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; -} - -static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) -{ - return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; -} - -static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) -{ - return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; -} - -static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) -{ - return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; -} - -static inline struct s3c2400_adc *s3c2400_get_base_adc(void) -{ - return (struct s3c2400_adc *)S3C24X0_ADC_BASE; -} - -static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) -{ - return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; -} - -static inline struct s3c2400_mmc *s3c2400_get_base_mmc(void) -{ - return (struct s3c2400_mmc *)S3C2400_MMC_BASE; -} - -#endif /*__S3C2400_H__*/ diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h deleted file mode 100644 index 0543fe1..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c2410.h - * Version : 31.3.2003 - * - * Based on S3C2410X User's manual Rev 1.1 - ************************************************/ - -#ifndef __S3C2410_H__ -#define __S3C2410_H__ - -#define S3C24X0_UART_CHANNELS 3 -#define S3C24X0_SPI_CHANNELS 2 - -/* S3C2410 only supports 512 Byte HW ECC */ -#define S3C2410_ECCSIZE 512 -#define S3C2410_ECCBYTES 3 - -enum s3c24x0_uarts_nr { - S3C24X0_UART0, - S3C24X0_UART1, - S3C24X0_UART2 -}; - -/* S3C2410 device base addresses */ -#define S3C24X0_MEMCTL_BASE 0x48000000 -#define S3C24X0_USB_HOST_BASE 0x49000000 -#define S3C24X0_INTERRUPT_BASE 0x4A000000 -#define S3C24X0_DMA_BASE 0x4B000000 -#define S3C24X0_CLOCK_POWER_BASE 0x4C000000 -#define S3C24X0_LCD_BASE 0x4D000000 -#define S3C2410_NAND_BASE 0x4E000000 -#define S3C24X0_UART_BASE 0x50000000 -#define S3C24X0_TIMER_BASE 0x51000000 -#define S3C24X0_USB_DEVICE_BASE 0x52000140 -#define S3C24X0_WATCHDOG_BASE 0x53000000 -#define S3C24X0_I2C_BASE 0x54000000 -#define S3C24X0_I2S_BASE 0x55000000 -#define S3C24X0_GPIO_BASE 0x56000000 -#define S3C24X0_RTC_BASE 0x57000000 -#define S3C2410_ADC_BASE 0x58000000 -#define S3C24X0_SPI_BASE 0x59000000 -#define S3C2410_SDI_BASE 0x5A000000 - - -/* include common stuff */ -#include <asm/arch/s3c24x0.h> - - -static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) -{ - return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; -} - -static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) -{ - return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; -} - -static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) -{ - return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; -} - -static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) -{ - return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; -} - -static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) -{ - return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; -} - -static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) -{ - return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; -} - -static inline struct s3c2410_nand *s3c2410_get_base_nand(void) -{ - return (struct s3c2410_nand *)S3C2410_NAND_BASE; -} - -static inline struct s3c24x0_uart - *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) -{ - return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); -} - -static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) -{ - return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; -} - -static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) -{ - return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; -} - -static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) -{ - return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; -} - -static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) -{ - return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; -} - -static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) -{ - return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; -} - -static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) -{ - return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; -} - -static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) -{ - return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; -} - -static inline struct s3c2410_adc *s3c2410_get_base_adc(void) -{ - return (struct s3c2410_adc *)S3C2410_ADC_BASE; -} - -static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) -{ - return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; -} - -static inline struct s3c2410_sdi *s3c2410_get_base_sdi(void) -{ - return (struct s3c2410_sdi *)S3C2410_SDI_BASE; -} - -#endif /*__S3C2410_H__*/ diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h b/arch/arm/include/asm/arch-s3c24x0/s3c2440.h deleted file mode 100644 index 8c606e3..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - * (C) Copyright 2003 - * David Mueller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c2440.h - * Version : 31.3.2003 - * - * Based on S3C2440 User's manual Rev x.x - ************************************************/ - -#ifndef __S3C2440_H__ -#define __S3C2440_H__ - -#define S3C24X0_UART_CHANNELS 3 -#define S3C24X0_SPI_CHANNELS 2 - -/* S3C2440 only supports 512 Byte HW ECC */ -#define S3C2440_ECCSIZE 512 -#define S3C2440_ECCBYTES 3 - -enum s3c24x0_uarts_nr { - S3C24X0_UART0, - S3C24X0_UART1, - S3C24X0_UART2 -}; - -/* S3C2440 device base addresses */ -#define S3C24X0_MEMCTL_BASE 0x48000000 -#define S3C24X0_USB_HOST_BASE 0x49000000 -#define S3C24X0_INTERRUPT_BASE 0x4A000000 -#define S3C24X0_DMA_BASE 0x4B000000 -#define S3C24X0_CLOCK_POWER_BASE 0x4C000000 -#define S3C24X0_LCD_BASE 0x4D000000 -#define S3C2440_NAND_BASE 0x4E000000 -#define S3C24X0_UART_BASE 0x50000000 -#define S3C24X0_TIMER_BASE 0x51000000 -#define S3C24X0_USB_DEVICE_BASE 0x52000140 -#define S3C24X0_WATCHDOG_BASE 0x53000000 -#define S3C24X0_I2C_BASE 0x54000000 -#define S3C24X0_I2S_BASE 0x55000000 -#define S3C24X0_GPIO_BASE 0x56000000 -#define S3C24X0_RTC_BASE 0x57000000 -#define S3C2440_ADC_BASE 0x58000000 -#define S3C24X0_SPI_BASE 0x59000000 -#define S3C2440_SDI_BASE 0x5A000000 - -/* include common stuff */ -#include <asm/arch/s3c24x0.h> - -static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) -{ - return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; -} - -static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) -{ - return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; -} - -static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) -{ - return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; -} - -static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) -{ - return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; -} - -static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) -{ - return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; -} - -static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) -{ - return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; -} - -static inline struct s3c2440_nand *s3c2440_get_base_nand(void) -{ - return (struct s3c2440_nand *)S3C2440_NAND_BASE; -} - -static inline struct s3c24x0_uart - *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) -{ - return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); -} - -static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) -{ - return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; -} - -static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) -{ - return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; -} - -static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) -{ - return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; -} - -static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) -{ - return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; -} - -static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) -{ - return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; -} - -static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) -{ - return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; -} - -static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) -{ - return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; -} - -static inline struct s3c2440_adc *s3c2440_get_base_adc(void) -{ - return (struct s3c2440_adc *)S3C2440_ADC_BASE; -} - -static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) -{ - return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; -} - -static inline struct s3c2440_sdi *s3c2440_get_base_sdi(void) -{ - return (struct s3c2440_sdi *)S3C2440_SDI_BASE; -} - -#endif /*__S3C2440_H__*/ diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h deleted file mode 100644 index f634d11..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h +++ /dev/null @@ -1,730 +0,0 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c24x0.h - * Version : 31.3.2003 - * - * common stuff for SAMSUNG S3C24X0 SoC - ************************************************/ - -#ifndef __S3C24X0_H__ -#define __S3C24X0_H__ - -/* Memory controller (see manual chapter 5) */ -struct s3c24x0_memctl { - u32 bwscon; - u32 bankcon[8]; - u32 refresh; - u32 banksize; - u32 mrsrb6; - u32 mrsrb7; -}; - - -/* USB HOST (see manual chapter 12) */ -struct s3c24x0_usb_host { - u32 HcRevision; - u32 HcControl; - u32 HcCommonStatus; - u32 HcInterruptStatus; - u32 HcInterruptEnable; - u32 HcInterruptDisable; - u32 HcHCCA; - u32 HcPeriodCuttendED; - u32 HcControlHeadED; - u32 HcControlCurrentED; - u32 HcBulkHeadED; - u32 HcBuldCurrentED; - u32 HcDoneHead; - u32 HcRmInterval; - u32 HcFmRemaining; - u32 HcFmNumber; - u32 HcPeriodicStart; - u32 HcLSThreshold; - u32 HcRhDescriptorA; - u32 HcRhDescriptorB; - u32 HcRhStatus; - u32 HcRhPortStatus1; - u32 HcRhPortStatus2; -}; - - -/* INTERRUPT (see manual chapter 14) */ -struct s3c24x0_interrupt { - u32 srcpnd; - u32 intmod; - u32 intmsk; - u32 priority; - u32 intpnd; - u32 intoffset; -#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) - u32 subsrcpnd; - u32 intsubmsk; -#endif -}; - - -/* DMAS (see manual chapter 8) */ -struct s3c24x0_dma { - u32 disrc; -#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) - u32 disrcc; -#endif - u32 didst; -#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) - u32 didstc; -#endif - u32 dcon; - u32 dstat; - u32 dcsrc; - u32 dcdst; - u32 dmasktrig; -#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) \ - || defined(CONFIG_S3C2440) - u32 res[1]; -#endif -}; - -struct s3c24x0_dmas { - struct s3c24x0_dma dma[4]; -}; - - -/* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */ -/* (see S3C2410 manual chapter 7) */ -struct s3c24x0_clock_power { - u32 locktime; - u32 mpllcon; - u32 upllcon; - u32 clkcon; - u32 clkslow; - u32 clkdivn; -#if defined(CONFIG_S3C2440) - u32 camdivn; -#endif -}; - - -/* LCD CONTROLLER (see manual chapter 15) */ -struct s3c24x0_lcd { - u32 lcdcon1; - u32 lcdcon2; - u32 lcdcon3; - u32 lcdcon4; - u32 lcdcon5; - u32 lcdsaddr1; - u32 lcdsaddr2; - u32 lcdsaddr3; - u32 redlut; - u32 greenlut; - u32 bluelut; - u32 res[8]; - u32 dithmode; - u32 tpal; -#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) - u32 lcdintpnd; - u32 lcdsrcpnd; - u32 lcdintmsk; - u32 lpcsel; -#endif -}; - - -#ifdef CONFIG_S3C2410 -/* NAND FLASH (see S3C2410 manual chapter 6) */ -struct s3c2410_nand { - u32 nfconf; - u32 nfcmd; - u32 nfaddr; - u32 nfdata; - u32 nfstat; - u32 nfecc; -}; -#endif -#ifdef CONFIG_S3C2440 -/* NAND FLASH (see S3C2440 manual chapter 6) */ -struct s3c2440_nand { - u32 nfconf; - u32 nfcont; - u32 nfcmd; - u32 nfaddr; - u32 nfdata; - u32 nfeccd0; - u32 nfeccd1; - u32 nfeccd; - u32 nfstat; - u32 nfstat0; - u32 nfstat1; -}; -#endif - - -/* UART (see manual chapter 11) */ -struct s3c24x0_uart { - u32 ulcon; - u32 ucon; - u32 ufcon; - u32 umcon; - u32 utrstat; - u32 uerstat; - u32 ufstat; - u32 umstat; -#ifdef __BIG_ENDIAN - u8 res1[3]; - u8 utxh; - u8 res2[3]; - u8 urxh; -#else /* Little Endian */ - u8 utxh; - u8 res1[3]; - u8 urxh; - u8 res2[3]; -#endif - u32 ubrdiv; -}; - - -/* PWM TIMER (see manual chapter 10) */ -struct s3c24x0_timer { - u32 tcntb; - u32 tcmpb; - u32 tcnto; -}; - -struct s3c24x0_timers { - u32 tcfg0; - u32 tcfg1; - u32 tcon; - struct s3c24x0_timer ch[4]; - u32 tcntb4; - u32 tcnto4; -}; - - -/* USB DEVICE (see manual chapter 13) */ -struct s3c24x0_usb_dev_fifos { -#ifdef __BIG_ENDIAN - u8 res[3]; - u8 ep_fifo_reg; -#else /* little endian */ - u8 ep_fifo_reg; - u8 res[3]; -#endif -}; - -struct s3c24x0_usb_dev_dmas { -#ifdef __BIG_ENDIAN - u8 res1[3]; - u8 ep_dma_con; - u8 res2[3]; - u8 ep_dma_unit; - u8 res3[3]; - u8 ep_dma_fifo; - u8 res4[3]; - u8 ep_dma_ttc_l; - u8 res5[3]; - u8 ep_dma_ttc_m; - u8 res6[3]; - u8 ep_dma_ttc_h; -#else /* little endian */ - u8 ep_dma_con; - u8 res1[3]; - u8 ep_dma_unit; - u8 res2[3]; - u8 ep_dma_fifo; - u8 res3[3]; - u8 ep_dma_ttc_l; - u8 res4[3]; - u8 ep_dma_ttc_m; - u8 res5[3]; - u8 ep_dma_ttc_h; - u8 res6[3]; -#endif -}; - -struct s3c24x0_usb_device { -#ifdef __BIG_ENDIAN - u8 res1[3]; - u8 func_addr_reg; - u8 res2[3]; - u8 pwr_reg; - u8 res3[3]; - u8 ep_int_reg; - u8 res4[15]; - u8 usb_int_reg; - u8 res5[3]; - u8 ep_int_en_reg; - u8 res6[15]; - u8 usb_int_en_reg; - u8 res7[3]; - u8 frame_num1_reg; - u8 res8[3]; - u8 frame_num2_reg; - u8 res9[3]; - u8 index_reg; - u8 res10[7]; - u8 maxp_reg; - u8 res11[3]; - u8 ep0_csr_in_csr1_reg; - u8 res12[3]; - u8 in_csr2_reg; - u8 res13[7]; - u8 out_csr1_reg; - u8 res14[3]; - u8 out_csr2_reg; - u8 res15[3]; - u8 out_fifo_cnt1_reg; - u8 res16[3]; - u8 out_fifo_cnt2_reg; -#else /* little endian */ - u8 func_addr_reg; - u8 res1[3]; - u8 pwr_reg; - u8 res2[3]; - u8 ep_int_reg; - u8 res3[15]; - u8 usb_int_reg; - u8 res4[3]; - u8 ep_int_en_reg; - u8 res5[15]; - u8 usb_int_en_reg; - u8 res6[3]; - u8 frame_num1_reg; - u8 res7[3]; - u8 frame_num2_reg; - u8 res8[3]; - u8 index_reg; - u8 res9[7]; - u8 maxp_reg; - u8 res10[7]; - u8 ep0_csr_in_csr1_reg; - u8 res11[3]; - u8 in_csr2_reg; - u8 res12[3]; - u8 out_csr1_reg; - u8 res13[7]; - u8 out_csr2_reg; - u8 res14[3]; - u8 out_fifo_cnt1_reg; - u8 res15[3]; - u8 out_fifo_cnt2_reg; - u8 res16[3]; -#endif /* __BIG_ENDIAN */ - struct s3c24x0_usb_dev_fifos fifo[5]; - struct s3c24x0_usb_dev_dmas dma[5]; -}; - - -/* WATCH DOG TIMER (see manual chapter 18) */ -struct s3c24x0_watchdog { - u32 wtcon; - u32 wtdat; - u32 wtcnt; -}; - - -/* IIC (see manual chapter 20) */ -struct s3c24x0_i2c { - u32 iiccon; - u32 iicstat; - u32 iicadd; - u32 iicds; -}; - - -/* IIS (see manual chapter 21) */ -struct s3c24x0_i2s { -#ifdef __BIG_ENDIAN - u16 res1; - u16 iiscon; - u16 res2; - u16 iismod; - u16 res3; - u16 iispsr; - u16 res4; - u16 iisfcon; - u16 res5; - u16 iisfifo; -#else /* little endian */ - u16 iiscon; - u16 res1; - u16 iismod; - u16 res2; - u16 iispsr; - u16 res3; - u16 iisfcon; - u16 res4; - u16 iisfifo; - u16 res5; -#endif -}; - - -/* I/O PORT (see manual chapter 9) */ -struct s3c24x0_gpio { -#ifdef CONFIG_S3C2400 - u32 pacon; - u32 padat; - - u32 pbcon; - u32 pbdat; - u32 pbup; - - u32 pccon; - u32 pcdat; - u32 pcup; - - u32 pdcon; - u32 pddat; - u32 pdup; - - u32 pecon; - u32 pedat; - u32 peup; - - u32 pfcon; - u32 pfdat; - u32 pfup; - - u32 pgcon; - u32 pgdat; - u32 pgup; - - u32 opencr; - - u32 misccr; - u32 extint; -#endif -#ifdef CONFIG_S3C2410 - u32 gpacon; - u32 gpadat; - u32 res1[2]; - u32 gpbcon; - u32 gpbdat; - u32 gpbup; - u32 res2; - u32 gpccon; - u32 gpcdat; - u32 gpcup; - u32 res3; - u32 gpdcon; - u32 gpddat; - u32 gpdup; - u32 res4; - u32 gpecon; - u32 gpedat; - u32 gpeup; - u32 res5; - u32 gpfcon; - u32 gpfdat; - u32 gpfup; - u32 res6; - u32 gpgcon; - u32 gpgdat; - u32 gpgup; - u32 res7; - u32 gphcon; - u32 gphdat; - u32 gphup; - u32 res8; - - u32 misccr; - u32 dclkcon; - u32 extint0; - u32 extint1; - u32 extint2; - u32 eintflt0; - u32 eintflt1; - u32 eintflt2; - u32 eintflt3; - u32 eintmask; - u32 eintpend; - u32 gstatus0; - u32 gstatus1; - u32 gstatus2; - u32 gstatus3; - u32 gstatus4; -#endif -#if defined(CONFIG_S3C2440) - u32 gpacon; - u32 gpadat; - u32 res1[2]; - u32 gpbcon; - u32 gpbdat; - u32 gpbup; - u32 res2; - u32 gpccon; - u32 gpcdat; - u32 gpcup; - u32 res3; - u32 gpdcon; - u32 gpddat; - u32 gpdup; - u32 res4; - u32 gpecon; - u32 gpedat; - u32 gpeup; - u32 res5; - u32 gpfcon; - u32 gpfdat; - u32 gpfup; - u32 res6; - u32 gpgcon; - u32 gpgdat; - u32 gpgup; - u32 res7; - u32 gphcon; - u32 gphdat; - u32 gphup; - u32 res8; - - u32 misccr; - u32 dclkcon; - u32 extint0; - u32 extint1; - u32 extint2; - u32 eintflt0; - u32 eintflt1; - u32 eintflt2; - u32 eintflt3; - u32 eintmask; - u32 eintpend; - u32 gstatus0; - u32 gstatus1; - u32 gstatus2; - u32 gstatus3; - u32 gstatus4; - - u32 res9; - u32 dsc0; - u32 dsc1; - u32 mslcon; - u32 gpjcon; - u32 gpjdat; - u32 gpjup; - u32 res10; -#endif -}; - - -/* RTC (see manual chapter 17) */ -struct s3c24x0_rtc { -#ifdef __BIG_ENDIAN - u8 res1[67]; - u8 rtccon; - u8 res2[3]; - u8 ticnt; - u8 res3[11]; - u8 rtcalm; - u8 res4[3]; - u8 almsec; - u8 res5[3]; - u8 almmin; - u8 res6[3]; - u8 almhour; - u8 res7[3]; - u8 almdate; - u8 res8[3]; - u8 almmon; - u8 res9[3]; - u8 almyear; - u8 res10[3]; - u8 rtcrst; - u8 res11[3]; - u8 bcdsec; - u8 res12[3]; - u8 bcdmin; - u8 res13[3]; - u8 bcdhour; - u8 res14[3]; - u8 bcddate; - u8 res15[3]; - u8 bcdday; - u8 res16[3]; - u8 bcdmon; - u8 res17[3]; - u8 bcdyear; -#else /* little endian */ - u8 res0[64]; - u8 rtccon; - u8 res1[3]; - u8 ticnt; - u8 res2[11]; - u8 rtcalm; - u8 res3[3]; - u8 almsec; - u8 res4[3]; - u8 almmin; - u8 res5[3]; - u8 almhour; - u8 res6[3]; - u8 almdate; - u8 res7[3]; - u8 almmon; - u8 res8[3]; - u8 almyear; - u8 res9[3]; - u8 rtcrst; - u8 res10[3]; - u8 bcdsec; - u8 res11[3]; - u8 bcdmin; - u8 res12[3]; - u8 bcdhour; - u8 res13[3]; - u8 bcddate; - u8 res14[3]; - u8 bcdday; - u8 res15[3]; - u8 bcdmon; - u8 res16[3]; - u8 bcdyear; - u8 res17[3]; -#endif -}; - - -/* ADC (see manual chapter 16) */ -struct s3c2400_adc { - u32 adccon; - u32 adcdat; -}; - - -/* ADC (see manual chapter 16) */ -struct s3c2410_adc { - u32 adccon; - u32 adctsc; - u32 adcdly; - u32 adcdat0; - u32 adcdat1; -}; - - -/* SPI (see manual chapter 22) */ -struct s3c24x0_spi_channel { - u8 spcon; - u8 res1[3]; - u8 spsta; - u8 res2[3]; - u8 sppin; - u8 res3[3]; - u8 sppre; - u8 res4[3]; - u8 sptdat; - u8 res5[3]; - u8 sprdat; - u8 res6[3]; - u8 res7[16]; -}; - -struct s3c24x0_spi { - struct s3c24x0_spi_channel ch[S3C24X0_SPI_CHANNELS]; -}; - - -/* MMC INTERFACE (see S3C2400 manual chapter 19) */ -struct s3c2400_mmc { -#ifdef __BIG_ENDIAN - u8 res1[3]; - u8 mmcon; - u8 res2[3]; - u8 mmcrr; - u8 res3[3]; - u8 mmfcon; - u8 res4[3]; - u8 mmsta; - u16 res5; - u16 mmfsta; - u8 res6[3]; - u8 mmpre; - u16 res7; - u16 mmlen; - u8 res8[3]; - u8 mmcr7; - u32 mmrsp[4]; - u8 res9[3]; - u8 mmcmd0; - u32 mmcmd1; - u16 res10; - u16 mmcr16; - u8 res11[3]; - u8 mmdat; -#else - u8 mmcon; - u8 res1[3]; - u8 mmcrr; - u8 res2[3]; - u8 mmfcon; - u8 res3[3]; - u8 mmsta; - u8 res4[3]; - u16 mmfsta; - u16 res5; - u8 mmpre; - u8 res6[3]; - u16 mmlen; - u16 res7; - u8 mmcr7; - u8 res8[3]; - u32 mmrsp[4]; - u8 mmcmd0; - u8 res9[3]; - u32 mmcmd1; - u16 mmcr16; - u16 res10; - u8 mmdat; - u8 res11[3]; -#endif -}; - - -/* SD INTERFACE (see S3C2410 manual chapter 19) */ -struct s3c2410_sdi { - u32 sdicon; - u32 sdipre; - u32 sdicarg; - u32 sdiccon; - u32 sdicsta; - u32 sdirsp0; - u32 sdirsp1; - u32 sdirsp2; - u32 sdirsp3; - u32 sdidtimer; - u32 sdibsize; - u32 sdidcon; - u32 sdidcnt; - u32 sdidsta; - u32 sdifsta; -#ifdef __BIG_ENDIAN - u8 res[3]; - u8 sdidat; -#else - u8 sdidat; - u8 res[3]; -#endif - u32 sdiimsk; -}; - -#endif /*__S3C24X0_H__*/ diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h deleted file mode 100644 index 54184c4..0000000 --- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * (C) Copyright 2009 - * Kevin Morfitt, Fearnside Systems Ltd, <kevin.morfitt@fearnside-systems.co.uk> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifdef CONFIG_S3C2400 - #include <asm/arch/s3c2400.h> -#elif defined CONFIG_S3C2410 - #include <asm/arch/s3c2410.h> -#elif defined CONFIG_S3C2440 - #include <asm/arch/s3c2440.h> -#else - #error Please define the s3c24x0 cpu type -#endif diff --git a/arch/arm/include/asm/arch-s3c44b0/hardware.h b/arch/arm/include/asm/arch-s3c44b0/hardware.h deleted file mode 100644 index 146e265..0000000 --- a/arch/arm/include/asm/arch-s3c44b0/hardware.h +++ /dev/null @@ -1,281 +0,0 @@ -/********************************************************/ -/* */ -/* Samsung S3C44B0 */ -/* tpu <tapu@371.net> */ -/* */ -/********************************************************/ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#define REGBASE 0x01c00000 -#define REGL(addr) (*(volatile unsigned int *)(REGBASE+addr)) -#define REGW(addr) (*(volatile unsigned short *)(REGBASE+addr)) -#define REGB(addr) (*(volatile unsigned char *)(REGBASE+addr)) - - -/*****************************/ -/* CPU Wrapper Registers */ -/*****************************/ - -#define SYSCFG REGL(0x000000) -#define NCACHBE0 REGL(0x000004) -#define NCACHBE1 REGL(0x000008) -#define SBUSCON REGL(0x040000) - -/************************************/ -/* Memory Controller Registers */ -/************************************/ - -#define BWSCON REGL(0x080000) -#define BANKCON0 REGL(0x080004) -#define BANKCON1 REGL(0x080008) -#define BANKCON2 REGL(0x08000c) -#define BANKCON3 REGL(0x080010) -#define BANKCON4 REGL(0x080014) -#define BANKCON5 REGL(0x080018) -#define BANKCON6 REGL(0x08001c) -#define BANKCON7 REGL(0x080020) -#define REFRESH REGL(0x080024) -#define BANKSIZE REGL(0x080028) -#define MRSRB6 REGL(0x08002c) -#define MRSRB7 REGL(0x080030) - -/*********************/ -/* UART Registers */ -/*********************/ - -#define ULCON0 REGL(0x100000) -#define ULCON1 REGL(0x104000) -#define UCON0 REGL(0x100004) -#define UCON1 REGL(0x104004) -#define UFCON0 REGL(0x100008) -#define UFCON1 REGL(0x104008) -#define UMCON0 REGL(0x10000c) -#define UMCON1 REGL(0x10400c) -#define UTRSTAT0 REGL(0x100010) -#define UTRSTAT1 REGL(0x104010) -#define UERSTAT0 REGL(0x100014) -#define UERSTAT1 REGL(0x104014) -#define UFSTAT0 REGL(0x100018) -#define UFSTAT1 REGL(0x104018) -#define UMSTAT0 REGL(0x10001c) -#define UMSTAT1 REGL(0x10401c) -#define UTXH0 REGB(0x100020) -#define UTXH1 REGB(0x104020) -#define URXH0 REGB(0x100024) -#define URXH1 REGB(0x104024) -#define UBRDIV0 REGL(0x100028) -#define UBRDIV1 REGL(0x104028) - -/*******************/ -/* SIO Registers */ -/*******************/ - -#define SIOCON REGL(0x114000) -#define SIODAT REGL(0x114004) -#define SBRDR REGL(0x114008) -#define ITVCNT REGL(0x11400c) -#define DCNTZ REGL(0x114010) - -/********************/ -/* IIS Registers */ -/********************/ - -#define IISCON REGL(0x118000) -#define IISMOD REGL(0x118004) -#define IISPSR REGL(0x118008) -#define IISFIFCON REGL(0x11800c) -#define IISFIF REGW(0x118010) - -/**************************/ -/* I/O Ports Registers */ -/**************************/ - -#define PCONA REGL(0x120000) -#define PDATA REGL(0x120004) -#define PCONB REGL(0x120008) -#define PDATB REGL(0x12000c) -#define PCONC REGL(0x120010) -#define PDATC REGL(0x120014) -#define PUPC REGL(0x120018) -#define PCOND REGL(0x12001c) -#define PDATD REGL(0x120020) -#define PUPD REGL(0x120024) -#define PCONE REGL(0x120028) -#define PDATE REGL(0x12002c) -#define PUPE REGL(0x120030) -#define PCONF REGL(0x120034) -#define PDATF REGL(0x120038) -#define PUPF REGL(0x12003c) -#define PCONG REGL(0x120040) -#define PDATG REGL(0x120044) -#define PUPG REGL(0x120048) -#define SPUCR REGL(0x12004c) -#define EXTINT REGL(0x120050) -#define EXTINTPND REGL(0x120054) - -/*********************************/ -/* WatchDog Timers Registers */ -/*********************************/ - -#define WTCON REGL(0x130000) -#define WTDAT REGL(0x130004) -#define WTCNT REGL(0x130008) - -/*********************************/ -/* A/D Converter Registers */ -/*********************************/ - -#define ADCCON REGL(0x140000) -#define ADCPSR REGL(0x140004) -#define ADCDAT REGL(0x140008) - -/***************************/ -/* PWM Timer Registers */ -/***************************/ - -#define TCFG0 REGL(0x150000) -#define TCFG1 REGL(0x150004) -#define TCON REGL(0x150008) -#define TCNTB0 REGL(0x15000c) -#define TCMPB0 REGL(0x150010) -#define TCNTO0 REGL(0x150014) -#define TCNTB1 REGL(0x150018) -#define TCMPB1 REGL(0x15001c) -#define TCNTO1 REGL(0x150020) -#define TCNTB2 REGL(0x150024) -#define TCMPB2 REGL(0x150028) -#define TCNTO2 REGL(0x15002c) -#define TCNTB3 REGL(0x150030) -#define TCMPB3 REGL(0x150034) -#define TCNTO3 REGL(0x150038) -#define TCNTB4 REGL(0x15003c) -#define TCMPB4 REGL(0x150040) -#define TCNTO4 REGL(0x150044) -#define TCNTB5 REGL(0x150048) -#define TCNTO5 REGL(0x15004c) - -/*********************/ -/* IIC Registers */ -/*********************/ - -#define IICCON REGL(0x160000) -#define IICSTAT REGL(0x160004) -#define IICADD REGL(0x160008) -#define IICDS REGL(0x16000c) - -/*********************/ -/* RTC Registers */ -/*********************/ - -#define RTCCON REGB(0x170040) -#define RTCALM REGB(0x170050) -#define ALMSEC REGB(0x170054) -#define ALMMIN REGB(0x170058) -#define ALMHOUR REGB(0x17005c) -#define ALMDAY REGB(0x170060) -#define ALMMON REGB(0x170064) -#define ALMYEAR REGB(0x170068) -#define RTCRST REGB(0x17006c) -#define BCDSEC REGB(0x170070) -#define BCDMIN REGB(0x170074) -#define BCDHOUR REGB(0x170078) -#define BCDDAY REGB(0x17007c) -#define BCDDATE REGB(0x170080) -#define BCDMON REGB(0x170084) -#define BCDYEAR REGB(0x170088) -#define TICINT REGB(0x17008c) - -/*********************************/ -/* Clock & Power Registers */ -/*********************************/ - -#define PLLCON REGL(0x180000) -#define CLKCON REGL(0x180004) -#define CLKSLOW REGL(0x180008) -#define LOCKTIME REGL(0x18000c) - -/**************************************/ -/* Interrupt Controller Registers */ -/**************************************/ - -#define INTCON REGL(0x200000) -#define INTPND REGL(0x200004) -#define INTMOD REGL(0x200008) -#define INTMSK REGL(0x20000c) -#define I_PSLV REGL(0x200010) -#define I_PMST REGL(0x200014) -#define I_CSLV REGL(0x200018) -#define I_CMST REGL(0x20001c) -#define I_ISPR REGL(0x200020) -#define I_ISPC REGL(0x200024) -#define F_ISPR REGL(0x200038) -#define F_ISPC REGL(0x20003c) - -/********************************/ -/* LCD Controller Registers */ -/********************************/ - -#define LCDCON1 REGL(0x300000) -#define LCDCON2 REGL(0x300004) -#define LCDSADDR1 REGL(0x300008) -#define LCDSADDR2 REGL(0x30000c) -#define LCDSADDR3 REGL(0x300010) -#define REDLUT REGL(0x300014) -#define GREENLUT REGL(0x300018) -#define BLUELUT REGL(0x30001c) -#define DP1_2 REGL(0x300020) -#define DP4_7 REGL(0x300024) -#define DP3_5 REGL(0x300028) -#define DP2_3 REGL(0x30002c) -#define DP5_7 REGL(0x300030) -#define DP3_4 REGL(0x300034) -#define DP4_5 REGL(0x300038) -#define DP6_7 REGL(0x30003c) -#define LCDCON3 REGL(0x300040) -#define DITHMODE REGL(0x300044) - -/*********************/ -/* DMA Registers */ -/*********************/ - -#define ZDCON0 REGL(0x280000) -#define ZDISRC0 REGL(0x280004) -#define ZDIDES0 REGL(0x280008) -#define ZDICNT0 REGL(0x28000c) -#define ZDCSRC0 REGL(0x280010) -#define ZDCDES0 REGL(0x280014) -#define ZDCCNT0 REGL(0x280018) - -#define ZDCON1 REGL(0x280020) -#define ZDISRC1 REGL(0x280024) -#define ZDIDES1 REGL(0x280028) -#define ZDICNT1 REGL(0x28002c) -#define ZDCSRC1 REGL(0x280030) -#define ZDCDES1 REGL(0x280034) -#define ZDCCNT1 REGL(0x280038) - -#define BDCON0 REGL(0x380000) -#define BDISRC0 REGL(0x380004) -#define BDIDES0 REGL(0x380008) -#define BDICNT0 REGL(0x38000c) -#define BDCSRC0 REGL(0x380010) -#define BDCDES0 REGL(0x380014) -#define BDCCNT0 REGL(0x380018) - -#define BDCON1 REGL(0x380020) -#define BDISRC1 REGL(0x380024) -#define BDIDES1 REGL(0x380028) -#define BDICNT1 REGL(0x38002c) -#define BDCSRC1 REGL(0x380030) -#define BDCDES1 REGL(0x380034) -#define BDCCNT1 REGL(0x380038) - - -#define CLEAR_PEND_INT(n) I_ISPC = (1<<(n)) -#define INT_ENABLE(n) INTMSK &= ~(1<<(n)) -#define INT_DISABLE(n) INTMSK |= (1<<(n)) - -#define HARD_RESET_NOW() - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-s3c4510b/hardware.h b/arch/arm/include/asm/arch-s3c4510b/hardware.h deleted file mode 100644 index 6b8c8ed..0000000 --- a/arch/arm/include/asm/arch-s3c4510b/hardware.h +++ /dev/null @@ -1,272 +0,0 @@ -#ifndef __HW_S3C4510_H -#define __HW_S3C4510_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Description: Samsung S3C4510B register layout - */ - -/*------------------------------------------------------------------------ - * ASIC Address Definition - *----------------------------------------------------------------------*/ - -/* L1 8KB on chip SRAM base address */ -#define SRAM_BASE (0x03fe0000) - -/* Special Register Start Address After System Reset */ -#define REG_BASE (0x03ff0000) -#define SPSTR (REG_BASE) - -/* *********************** */ -/* System Manager Register */ -/* *********************** */ -#define REG_SYSCFG (REG_BASE+0x0000) - -#define REG_CLKCON (REG_BASE+0x3000) -#define REG_EXTACON0 (REG_BASE+0x3008) -#define REG_EXTACON1 (REG_BASE+0x300c) -#define REG_EXTDBWTH (REG_BASE+0x3010) -#define REG_ROMCON0 (REG_BASE+0x3014) -#define REG_ROMCON1 (REG_BASE+0x3018) -#define REG_ROMCON2 (REG_BASE+0x301c) -#define REG_ROMCON3 (REG_BASE+0x3020) -#define REG_ROMCON4 (REG_BASE+0x3024) -#define REG_ROMCON5 (REG_BASE+0x3028) -#define REG_DRAMCON0 (REG_BASE+0x302c) -#define REG_DRAMCON1 (REG_BASE+0x3030) -#define REG_DRAMCON2 (REG_BASE+0x3034) -#define REG_DRAMCON3 (REG_BASE+0x3038) -#define REG_REFEXTCON (REG_BASE+0x303c) - -/* *********************** */ -/* Ethernet BDMA Register */ -/* *********************** */ -#define REG_BDMATXCON (REG_BASE+0x9000) -#define REG_BDMARXCON (REG_BASE+0x9004) -#define REG_BDMATXPTR (REG_BASE+0x9008) -#define REG_BDMARXPTR (REG_BASE+0x900c) -#define REG_BDMARXLSZ (REG_BASE+0x9010) -#define REG_BDMASTAT (REG_BASE+0x9014) - -/* Content Address Memory */ -#define REG_CAM_BASE (REG_BASE+0x9100) - -#define REG_BDMATXBUF (REG_BASE+0x9200) -#define REG_BDMARXBUF (REG_BASE+0x9800) - -/* *********************** */ -/* Ethernet MAC Register */ -/* *********************** */ -#define REG_MACCON (REG_BASE+0xa000) -#define REG_CAMCON (REG_BASE+0xa004) -#define REG_MACTXCON (REG_BASE+0xa008) -#define REG_MACTXSTAT (REG_BASE+0xa00c) -#define REG_MACRXCON (REG_BASE+0xa010) -#define REG_MACRXSTAT (REG_BASE+0xa014) -#define REG_STADATA (REG_BASE+0xa018) -#define REG_STACON (REG_BASE+0xa01c) -#define REG_CAMEN (REG_BASE+0xa028) -#define REG_EMISSCNT (REG_BASE+0xa03c) -#define REG_EPZCNT (REG_BASE+0xa040) -#define REG_ERMPZCNT (REG_BASE+0xa044) -#define REG_ETXSTAT (REG_BASE+0x9040) -#define REG_MACRXDESTR (REG_BASE+0xa064) -#define REG_MACRXSTATEM (REG_BASE+0xa090) -#define REG_MACRXFIFO (REG_BASE+0xa200) - -/********************/ -/* I2C Bus Register */ -/********************/ -#define REG_I2C_CON (REG_BASE+0xf000) -#define REG_I2C_BUF (REG_BASE+0xf004) -#define REG_I2C_PS (REG_BASE+0xf008) -#define REG_I2C_COUNT (REG_BASE+0xf00c) - -/********************/ -/* GDMA 0 */ -/********************/ -#define REG_GDMACON0 (REG_BASE+0xb000) -#define REG_GDMA0_RUN_ENABLE (REG_BASE+0xb020) -#define REG_GDMASRC0 (REG_BASE+0xb004) -#define REG_GDMADST0 (REG_BASE+0xb008) -#define REG_GDMACNT0 (REG_BASE+0xb00c) - -/********************/ -/* GDMA 1 */ -/********************/ -#define REG_GDMACON1 (REG_BASE+0xc000) -#define REG_GDMA1_RUN_ENABLE (REG_BASE+0xc020) -#define REG_GDMASRC1 (REG_BASE+0xc004) -#define REG_GDMADST1 (REG_BASE+0xc008) -#define REG_GDMACNT1 (REG_BASE+0xc00c) - -/********************/ -/* UART 0 */ -/********************/ -#define UART0_BASE (REG_BASE+0xd000) -#define REG_UART0_LCON (REG_BASE+0xd000) -#define REG_UART0_CTRL (REG_BASE+0xd004) -#define REG_UART0_STAT (REG_BASE+0xd008) -#define REG_UART0_TXB (REG_BASE+0xd00c) -#define REG_UART0_RXB (REG_BASE+0xd010) -#define REG_UART0_BAUD_DIV (REG_BASE+0xd014) -#define REG_UART0_BAUD_CNT (REG_BASE+0xd018) -#define REG_UART0_BAUD_CLK (REG_BASE+0xd01C) - -/********************/ -/* UART 1 */ -/********************/ -#define UART1_BASE (REG_BASE+0xe000) -#define REG_UART1_LCON (REG_BASE+0xe000) -#define REG_UART1_CTRL (REG_BASE+0xe004) -#define REG_UART1_STAT (REG_BASE+0xe008) -#define REG_UART1_TXB (REG_BASE+0xe00c) -#define REG_UART1_RXB (REG_BASE+0xe010) -#define REG_UART1_BAUD_DIV (REG_BASE+0xe014) -#define REG_UART1_BAUD_CNT (REG_BASE+0xe018) -#define REG_UART1_BAUD_CLK (REG_BASE+0xe01C) - -/********************/ -/* Timer Register */ -/********************/ -#define REG_TMOD (REG_BASE+0x6000) -#define REG_TDATA0 (REG_BASE+0x6004) -#define REG_TDATA1 (REG_BASE+0x6008) -#define REG_TCNT0 (REG_BASE+0x600c) -#define REG_TCNT1 (REG_BASE+0x6010) - -/**********************/ -/* I/O Port Interface */ -/**********************/ -#define REG_IOPMODE (REG_BASE+0x5000) -#define REG_IOPCON (REG_BASE+0x5004) -#define REG_IOPDATA (REG_BASE+0x5008) - -/*********************************/ -/* Interrupt Controller Register */ -/*********************************/ -#define REG_INTMODE (REG_BASE+0x4000) -#define REG_INTPEND (REG_BASE+0x4004) -#define REG_INTMASK (REG_BASE+0x4008) - -#define REG_INTPRI0 (REG_BASE+0x400c) -#define REG_INTPRI1 (REG_BASE+0x4010) -#define REG_INTPRI2 (REG_BASE+0x4014) -#define REG_INTPRI3 (REG_BASE+0x4018) -#define REG_INTPRI4 (REG_BASE+0x401c) -#define REG_INTPRI5 (REG_BASE+0x4020) -#define REG_INTOFFSET (REG_BASE+0x4024) -#define REG_INTPNDPRI (REG_BASE+0x4028) -#define REG_INTPNDTST (REG_BASE+0x402C) - -/*********************************/ -/* CACHE CONTROL MASKS */ -/*********************************/ -#define CACHE_STALL (0x00000001) -#define CACHE_ENABLE (0x00000002) -#define CACHE_WRITE_BUFF (0x00000004) -#define CACHE_MODE (0x00000030) -#define CACHE_MODE_00 (0x00000000) -#define CACHE_MODE_01 (0x00000010) -#define CACHE_MODE_10 (0x00000020) - -/*********************************/ -/* CACHE RAM BASE ADDRESSES */ -/*********************************/ -#define CACHE_SET0_RAM (0x10000000) -#define CACHE_SET1_RAM (0x10800000) -#define CACHE_TAG_RAM (0x11000000) - -/*********************************/ -/* CACHE_DISABLE MASK */ -/*********************************/ -#define CACHE_DISABLE_MASK (0x04000000) - -#define GET_REG(reg) (*((volatile u32 *)(reg))) -#define PUT_REG(reg, val) (*((volatile u32 *)(reg)) = ((u32)(val))) -#define SET_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) | mask)) -#define CLR_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) & ~mask)) -#define PUT_U16(reg, val) (*((volatile u16 *)(reg)) = ((u16)(val))) -#define PUT__U8(reg, val) (*((volatile u8 *)(reg)) = (( u8)((val)&0xFF))) -#define GET__U8(reg) (*((volatile u8 *)(reg))) - -#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF)) -#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF) -#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); } -#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); } - -/***********************************/ -/* CLOCK CONSTANTS -- 50 MHz Clock */ -/***********************************/ - -#define CLK_FREQ_MHZ (50) -#define t_data_us(t) ((t)*CLK_FREQ_MHZ-1) /* t is time tick,unit[us] */ -#define t_data_ms(t) (t_data_us((t)*1000)) /* t is time tick,unit[ms] */ - -/*********************************************************/ -/* TIMER MODE REGISTER */ -/*********************************************************/ -#define TM0_RUN 0x01 /* Timer 0 enable */ -#define TM0_TOGGLE 0x02 /* 0, interval mode */ -#define TM0_OUT_1 0x04 /* Timer 0 Initial TOUT0 value */ -#define TM1_RUN 0x08 /* Timer 1 enable */ -#define TM1_TOGGLE 0x10 /* 0, interval mode */ -#define TM1_OUT_1 0x20 /* Timer 0 Initial TOUT0 value */ - - -/*********************************/ -/* INTERRUPT SOURCES */ -/*********************************/ -#define INT_EXTINT0 0 -#define INT_EXTINT1 1 -#define INT_EXTINT2 2 -#define INT_EXTINT3 3 -#define INT_UARTTX0 4 -#define INT_UARTRX0 5 -#define INT_UARTTX1 6 -#define INT_UARTRX1 7 -#define INT_GDMA0 8 -#define INT_GDMA1 9 -#define INT_TIMER0 10 -#define INT_TIMER1 11 -#define INT_HDLCTXA 12 -#define INT_HDLCRXA 13 -#define INT_HDLCTXB 14 -#define INT_HDLCRXB 15 -#define INT_BDMATX 16 -#define INT_BDMARX 17 -#define INT_MACTX 18 -#define INT_MACRX 19 -#define INT_IIC 20 -#define INT_GLOBAL 21 -#define N_IRQS (21) - -#ifndef __ASSEMBLER__ -struct _irq_handler { - void *m_data; - void (*m_func)( void *data); -}; - -#endif - -#endif /* __S3C4510_h */ diff --git a/arch/arm/include/asm/arch-s3c64xx/hardware.h b/arch/arm/include/asm/arch-s3c64xx/hardware.h deleted file mode 100644 index 84d24c9..0000000 --- a/arch/arm/include/asm/arch-s3c64xx/hardware.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400 - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _ARCH_HARDWARE_H_ -#define _ARCH_HARDWARE_H_ - -#include <asm/sizes.h> - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) - -#define __REG(x) (*(vu_long *)(x)) -#define __REGl(x) (*(vu_long *)(x)) -#define __REGw(x) (*(vu_short *)(x)) -#define __REGb(x) (*(vu_char *)(x)) -#define __REG2(x, y) (*(vu_long *)((x) + (y))) -#else -#define UData(Data) (Data) - -#define __REG(x) (x) -#define __REGl(x) (x) -#define __REGw(x) (x) -#define __REGb(x) (x) -#define __REG2(x, y) ((x) + (y)) -#endif - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - -#define FClrBit(Data, Bit) (Data = (Data & ~(Bit))) -#define FClrFld(Data, Field) (Data = (Data & ~FMsk(Field))) - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - -#endif /* _ARCH_HARDWARE_H_ */ diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h deleted file mode 100644 index 10b3324..0000000 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ /dev/null @@ -1,895 +0,0 @@ -/* - * (C) Copyright 2007 - * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com. - * - only support for S3C6400 - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c6400.h - * - * Based on S3C6400 User's manual Rev 0.0 - ************************************************/ - -#ifndef __S3C6400_H__ -#define __S3C6400_H__ - -#define S3C64XX_UART_CHANNELS 3 -#define S3C64XX_SPI_CHANNELS 2 - -#include <asm/hardware.h> - -#define ELFIN_CLOCK_POWER_BASE 0x7e00f000 - -/* Clock & Power Controller for mDirac3*/ -#define APLL_LOCK_OFFSET 0x00 -#define MPLL_LOCK_OFFSET 0x04 -#define EPLL_LOCK_OFFSET 0x08 -#define APLL_CON_OFFSET 0x0C -#define MPLL_CON_OFFSET 0x10 -#define EPLL_CON0_OFFSET 0x14 -#define EPLL_CON1_OFFSET 0x18 -#define CLK_SRC_OFFSET 0x1C -#define CLK_DIV0_OFFSET 0x20 -#define CLK_DIV1_OFFSET 0x24 -#define CLK_DIV2_OFFSET 0x28 -#define CLK_OUT_OFFSET 0x2C -#define HCLK_GATE_OFFSET 0x30 -#define PCLK_GATE_OFFSET 0x34 -#define SCLK_GATE_OFFSET 0x38 -#define AHB_CON0_OFFSET 0x100 -#define AHB_CON1_OFFSET 0x104 -#define AHB_CON2_OFFSET 0x108 -#define SELECT_DMA_OFFSET 0x110 -#define SW_RST_OFFSET 0x114 -#define SYS_ID_OFFSET 0x118 -#define MEM_SYS_CFG_OFFSET 0x120 -#define QOS_OVERRIDE0_OFFSET 0x124 -#define QOS_OVERRIDE1_OFFSET 0x128 -#define MEM_CFG_STAT_OFFSET 0x12C -#define PWR_CFG_OFFSET 0x804 -#define EINT_MASK_OFFSET 0x808 -#define NOR_CFG_OFFSET 0x810 -#define STOP_CFG_OFFSET 0x814 -#define SLEEP_CFG_OFFSET 0x818 -#define OSC_FREQ_OFFSET 0x820 -#define OSC_STABLE_OFFSET 0x824 -#define PWR_STABLE_OFFSET 0x828 -#define FPC_STABLE_OFFSET 0x82C -#define MTC_STABLE_OFFSET 0x830 -#define OTHERS_OFFSET 0x900 -#define RST_STAT_OFFSET 0x904 -#define WAKEUP_STAT_OFFSET 0x908 -#define BLK_PWR_STAT_OFFSET 0x90C -#define INF_REG0_OFFSET 0xA00 -#define INF_REG1_OFFSET 0xA04 -#define INF_REG2_OFFSET 0xA08 -#define INF_REG3_OFFSET 0xA0C -#define INF_REG4_OFFSET 0xA10 -#define INF_REG5_OFFSET 0xA14 -#define INF_REG6_OFFSET 0xA18 -#define INF_REG7_OFFSET 0xA1C - -#define OSC_CNT_VAL_OFFSET 0x824 -#define PWR_CNT_VAL_OFFSET 0x828 -#define FPC_CNT_VAL_OFFSET 0x82C -#define MTC_CNT_VAL_OFFSET 0x830 - -#define APLL_LOCK_REG __REG(ELFIN_CLOCK_POWER_BASE + APLL_LOCK_OFFSET) -#define MPLL_LOCK_REG __REG(ELFIN_CLOCK_POWER_BASE + MPLL_LOCK_OFFSET) -#define EPLL_LOCK_REG __REG(ELFIN_CLOCK_POWER_BASE + EPLL_LOCK_OFFSET) -#define APLL_CON_REG __REG(ELFIN_CLOCK_POWER_BASE + APLL_CON_OFFSET) -#define MPLL_CON_REG __REG(ELFIN_CLOCK_POWER_BASE + MPLL_CON_OFFSET) -#define EPLL_CON0_REG __REG(ELFIN_CLOCK_POWER_BASE + EPLL_CON0_OFFSET) -#define EPLL_CON1_REG __REG(ELFIN_CLOCK_POWER_BASE + EPLL_CON1_OFFSET) -#define CLK_SRC_REG __REG(ELFIN_CLOCK_POWER_BASE + CLK_SRC_OFFSET) -#define CLK_DIV0_REG __REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV0_OFFSET) -#define CLK_DIV1_REG __REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV1_OFFSET) -#define CLK_DIV2_REG __REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV2_OFFSET) -#define CLK_OUT_REG __REG(ELFIN_CLOCK_POWER_BASE + CLK_OUT_OFFSET) -#define HCLK_GATE_REG __REG(ELFIN_CLOCK_POWER_BASE + HCLK_GATE_OFFSET) -#define PCLK_GATE_REG __REG(ELFIN_CLOCK_POWER_BASE + PCLK_GATE_OFFSET) -#define SCLK_GATE_REG __REG(ELFIN_CLOCK_POWER_BASE + SCLK_GATE_OFFSET) -#define AHB_CON0_REG __REG(ELFIN_CLOCK_POWER_BASE + AHB_CON0_OFFSET) -#define AHB_CON1_REG __REG(ELFIN_CLOCK_POWER_BASE + AHB_CON1_OFFSET) -#define AHB_CON2_REG __REG(ELFIN_CLOCK_POWER_BASE + AHB_CON2_OFFSET) -#define SELECT_DMA_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - SELECT_DMA_OFFSET) -#define SW_RST_REG __REG(ELFIN_CLOCK_POWER_BASE + SW_RST_OFFSET) -#define SYS_ID_REG __REG(ELFIN_CLOCK_POWER_BASE + SYS_ID_OFFSET) -#define MEM_SYS_CFG_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - MEM_SYS_CFG_OFFSET) -#define QOS_OVERRIDE0_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - QOS_OVERRIDE0_OFFSET) -#define QOS_OVERRIDE1_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - QOS_OVERRIDE1_OFFSET) -#define MEM_CFG_STAT_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - MEM_CFG_STAT_OFFSET) -#define PWR_CFG_REG __REG(ELFIN_CLOCK_POWER_BASE + PWR_CFG_OFFSET) -#define EINT_MASK_REG __REG(ELFIN_CLOCK_POWER_BASE + EINT_MASK_OFFSET) -#define NOR_CFG_REG __REG(ELFIN_CLOCK_POWER_BASE + NOR_CFG_OFFSET) -#define STOP_CFG_REG __REG(ELFIN_CLOCK_POWER_BASE + STOP_CFG_OFFSET) -#define SLEEP_CFG_REG __REG(ELFIN_CLOCK_POWER_BASE + SLEEP_CFG_OFFSET) -#define OSC_FREQ_REG __REG(ELFIN_CLOCK_POWER_BASE + OSC_FREQ_OFFSET) -#define OSC_CNT_VAL_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - OSC_CNT_VAL_OFFSET) -#define PWR_CNT_VAL_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - PWR_CNT_VAL_OFFSET) -#define FPC_CNT_VAL_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - FPC_CNT_VAL_OFFSET) -#define MTC_CNT_VAL_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - MTC_CNT_VAL_OFFSET) -#define OTHERS_REG __REG(ELFIN_CLOCK_POWER_BASE + OTHERS_OFFSET) -#define RST_STAT_REG __REG(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) -#define WAKEUP_STAT_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - WAKEUP_STAT_OFFSET) -#define BLK_PWR_STAT_REG __REG(ELFIN_CLOCK_POWER_BASE + \ - BLK_PWR_STAT_OFFSET) -#define INF_REG0_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) -#define INF_REG1_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG1_OFFSET) -#define INF_REG2_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG2_OFFSET) -#define INF_REG3_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG3_OFFSET) -#define INF_REG4_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG4_OFFSET) -#define INF_REG5_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG5_OFFSET) -#define INF_REG6_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG6_OFFSET) -#define INF_REG7_REG __REG(ELFIN_CLOCK_POWER_BASE + INF_REG7_OFFSET) - -#define APLL_LOCK (ELFIN_CLOCK_POWER_BASE + APLL_LOCK_OFFSET) -#define MPLL_LOCK (ELFIN_CLOCK_POWER_BASE + MPLL_LOCK_OFFSET) -#define EPLL_LOCK (ELFIN_CLOCK_POWER_BASE + EPLL_LOCK_OFFSET) -#define APLL_CON (ELFIN_CLOCK_POWER_BASE + APLL_CON_OFFSET) -#define MPLL_CON (ELFIN_CLOCK_POWER_BASE + MPLL_CON_OFFSET) -#define EPLL_CON0 (ELFIN_CLOCK_POWER_BASE + EPLL_CON0_OFFSET) -#define EPLL_CON1 (ELFIN_CLOCK_POWER_BASE + EPLL_CON1_OFFSET) -#define CLK_SRC (ELFIN_CLOCK_POWER_BASE + CLK_SRC_OFFSET) -#define CLK_DIV0 (ELFIN_CLOCK_POWER_BASE + CLK_DIV0_OFFSET) -#define CLK_DIV1 (ELFIN_CLOCK_POWER_BASE + CLK_DIV1_OFFSET) -#define CLK_DIV2 (ELFIN_CLOCK_POWER_BASE + CLK_DIV2_OFFSET) -#define CLK_OUT (ELFIN_CLOCK_POWER_BASE + CLK_OUT_OFFSET) -#define HCLK_GATE (ELFIN_CLOCK_POWER_BASE + HCLK_GATE_OFFSET) -#define PCLK_GATE (ELFIN_CLOCK_POWER_BASE + PCLK_GATE_OFFSET) -#define SCLK_GATE (ELFIN_CLOCK_POWER_BASE + SCLK_GATE_OFFSET) -#define AHB_CON0 (ELFIN_CLOCK_POWER_BASE + AHB_CON0_OFFSET) -#define AHB_CON1 (ELFIN_CLOCK_POWER_BASE + AHB_CON1_OFFSET) -#define AHB_CON2 (ELFIN_CLOCK_POWER_BASE + AHB_CON2_OFFSET) -#define SELECT_DMA (ELFIN_CLOCK_POWER_BASE + SELECT_DMA_OFFSET) -#define SW_RST (ELFIN_CLOCK_POWER_BASE + SW_RST_OFFSET) -#define SYS_ID (ELFIN_CLOCK_POWER_BASE + SYS_ID_OFFSET) -#define MEM_SYS_CFG (ELFIN_CLOCK_POWER_BASE + MEM_SYS_CFG_OFFSET) -#define QOS_OVERRIDE0 (ELFIN_CLOCK_POWER_BASE + QOS_OVERRIDE0_OFFSET) -#define QOS_OVERRIDE1 (ELFIN_CLOCK_POWER_BASE + QOS_OVERRIDE1_OFFSET) -#define MEM_CFG_STAT (ELFIN_CLOCK_POWER_BASE + MEM_CFG_STAT_OFFSET) -#define PWR_CFG (ELFIN_CLOCK_POWER_BASE + PWR_CFG_OFFSET) -#define EINT_MASK (ELFIN_CLOCK_POWER_BASE + EINT_MASK_OFFSET) -#define NOR_CFG (ELFIN_CLOCK_POWER_BASE + NOR_CFG_OFFSET) -#define STOP_CFG (ELFIN_CLOCK_POWER_BASE + STOP_CFG_OFFSET) -#define SLEEP_CFG (ELFIN_CLOCK_POWER_BASE + SLEEP_CFG_OFFSET) -#define OSC_FREQ (ELFIN_CLOCK_POWER_BASE + OSC_FREQ_OFFSET) -#define OSC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + OSC_CNT_VAL_OFFSET) -#define PWR_CNT_VAL (ELFIN_CLOCK_POWER_BASE + PWR_CNT_VAL_OFFSET) -#define FPC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + FPC_CNT_VAL_OFFSET) -#define MTC_CNT_VAL (ELFIN_CLOCK_POWER_BASE + MTC_CNT_VAL_OFFSET) -#define OTHERS (ELFIN_CLOCK_POWER_BASE + OTHERS_OFFSET) -#define RST_STAT (ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) -#define WAKEUP_STAT (ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) -#define BLK_PWR_STAT (ELFIN_CLOCK_POWER_BASE + BLK_PWR_STAT_OFFSET) -#define INF_REG0 (ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) -#define INF_REG1 (ELFIN_CLOCK_POWER_BASE + INF_REG1_OFFSET) -#define INF_REG2 (ELFIN_CLOCK_POWER_BASE + INF_REG2_OFFSET) -#define INF_REG3 (ELFIN_CLOCK_POWER_BASE + INF_REG3_OFFSET) -#define INF_REG4 (ELFIN_CLOCK_POWER_BASE + INF_REG4_OFFSET) -#define INF_REG5 (ELFIN_CLOCK_POWER_BASE + INF_REG5_OFFSET) -#define INF_REG6 (ELFIN_CLOCK_POWER_BASE + INF_REG6_OFFSET) -#define INF_REG7 (ELFIN_CLOCK_POWER_BASE + INF_REG7_OFFSET) - - -/* - * GPIO - */ -#define ELFIN_GPIO_BASE 0x7f008000 - -#define GPACON_OFFSET 0x00 -#define GPADAT_OFFSET 0x04 -#define GPAPUD_OFFSET 0x08 -#define GPACONSLP_OFFSET 0x0C -#define GPAPUDSLP_OFFSET 0x10 -#define GPBCON_OFFSET 0x20 -#define GPBDAT_OFFSET 0x24 -#define GPBPUD_OFFSET 0x28 -#define GPBCONSLP_OFFSET 0x2C -#define GPBPUDSLP_OFFSET 0x30 -#define GPCCON_OFFSET 0x40 -#define GPCDAT_OFFSET 0x44 -#define GPCPUD_OFFSET 0x48 -#define GPCCONSLP_OFFSET 0x4C -#define GPCPUDSLP_OFFSET 0x50 -#define GPDCON_OFFSET 0x60 -#define GPDDAT_OFFSET 0x64 -#define GPDPUD_OFFSET 0x68 -#define GPDCONSLP_OFFSET 0x6C -#define GPDPUDSLP_OFFSET 0x70 -#define GPECON_OFFSET 0x80 -#define GPEDAT_OFFSET 0x84 -#define GPEPUD_OFFSET 0x88 -#define GPECONSLP_OFFSET 0x8C -#define GPEPUDSLP_OFFSET 0x90 -#define GPFCON_OFFSET 0xA0 -#define GPFDAT_OFFSET 0xA4 -#define GPFPUD_OFFSET 0xA8 -#define GPFCONSLP_OFFSET 0xAC -#define GPFPUDSLP_OFFSET 0xB0 -#define GPGCON_OFFSET 0xC0 -#define GPGDAT_OFFSET 0xC4 -#define GPGPUD_OFFSET 0xC8 -#define GPGCONSLP_OFFSET 0xCC -#define GPGPUDSLP_OFFSET 0xD0 -#define GPHCON0_OFFSET 0xE0 -#define GPHCON1_OFFSET 0xE4 -#define GPHDAT_OFFSET 0xE8 -#define GPHPUD_OFFSET 0xEC -#define GPHCONSLP_OFFSET 0xF0 -#define GPHPUDSLP_OFFSET 0xF4 -#define GPICON_OFFSET 0x100 -#define GPIDAT_OFFSET 0x104 -#define GPIPUD_OFFSET 0x108 -#define GPICONSLP_OFFSET 0x10C -#define GPIPUDSLP_OFFSET 0x110 -#define GPJCON_OFFSET 0x120 -#define GPJDAT_OFFSET 0x124 -#define GPJPUD_OFFSET 0x128 -#define GPJCONSLP_OFFSET 0x12C -#define GPJPUDSLP_OFFSET 0x130 -#define MEM0DRVCON_OFFSET 0x1D0 -#define MEM1DRVCON_OFFSET 0x1D4 -#define GPKCON0_OFFSET 0x800 -#define GPKCON1_OFFSET 0x804 -#define GPKDAT_OFFSET 0x808 -#define GPKPUD_OFFSET 0x80C -#define GPLCON0_OFFSET 0x810 -#define GPLCON1_OFFSET 0x814 -#define GPLDAT_OFFSET 0x818 -#define GPLPUD_OFFSET 0x81C -#define GPMCON_OFFSET 0x820 -#define GPMDAT_OFFSET 0x824 -#define GPMPUD_OFFSET 0x828 -#define GPNCON_OFFSET 0x830 -#define GPNDAT_OFFSET 0x834 -#define GPNPUD_OFFSET 0x838 -#define GPOCON_OFFSET 0x140 -#define GPODAT_OFFSET 0x144 -#define GPOPUD_OFFSET 0x148 -#define GPOCONSLP_OFFSET 0x14C -#define GPOPUDSLP_OFFSET 0x150 -#define GPPCON_OFFSET 0x160 -#define GPPDAT_OFFSET 0x164 -#define GPPPUD_OFFSET 0x168 -#define GPPCONSLP_OFFSET 0x16C -#define GPPPUDSLP_OFFSET 0x170 -#define GPQCON_OFFSET 0x180 -#define GPQDAT_OFFSET 0x184 -#define GPQPUD_OFFSET 0x188 -#define GPQCONSLP_OFFSET 0x18C -#define GPQPUDSLP_OFFSET 0x190 - -#define EINTPEND_OFFSET 0x924 - -#define GPACON_REG __REG(ELFIN_GPIO_BASE + GPACON_OFFSET) -#define GPADAT_REG __REG(ELFIN_GPIO_BASE + GPADAT_OFFSET) -#define GPAPUD_REG __REG(ELFIN_GPIO_BASE + GPAPUD_OFFSET) -#define GPACONSLP_REG __REG(ELFIN_GPIO_BASE + GPACONSLP_OFFSET) -#define GPAPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET) -#define GPBCON_REG __REG(ELFIN_GPIO_BASE + GPBCON_OFFSET) -#define GPBDAT_REG __REG(ELFIN_GPIO_BASE + GPBDAT_OFFSET) -#define GPBPUD_REG __REG(ELFIN_GPIO_BASE + GPBPUD_OFFSET) -#define GPBCONSLP_REG __REG(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET) -#define GPBPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET) -#define GPCCON_REG __REG(ELFIN_GPIO_BASE + GPCCON_OFFSET) -#define GPCDAT_REG __REG(ELFIN_GPIO_BASE + GPCDAT_OFFSET) -#define GPCPUD_REG __REG(ELFIN_GPIO_BASE + GPCPUD_OFFSET) -#define GPCCONSLP_REG __REG(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET) -#define GPCPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET) -#define GPDCON_REG __REG(ELFIN_GPIO_BASE + GPDCON_OFFSET) -#define GPDDAT_REG __REG(ELFIN_GPIO_BASE + GPDDAT_OFFSET) -#define GPDPUD_REG __REG(ELFIN_GPIO_BASE + GPDPUD_OFFSET) -#define GPDCONSLP_REG __REG(ELFIN_GPIO_BASE + GPDCONSLP_OFFSET) -#define GPDPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET) -#define GPECON_REG __REG(ELFIN_GPIO_BASE + GPECON_OFFSET) -#define GPEDAT_REG __REG(ELFIN_GPIO_BASE + GPEDAT_OFFSET) -#define GPEPUD_REG __REG(ELFIN_GPIO_BASE + GPEPUD_OFFSET) -#define GPECONSLP_REG __REG(ELFIN_GPIO_BASE + GPECONSLP_OFFSET) -#define GPEPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET) -#define GPFCON_REG __REG(ELFIN_GPIO_BASE + GPFCON_OFFSET) -#define GPFDAT_REG __REG(ELFIN_GPIO_BASE + GPFDAT_OFFSET) -#define GPFPUD_REG __REG(ELFIN_GPIO_BASE + GPFPUD_OFFSET) -#define GPFCONSLP_REG __REG(ELFIN_GPIO_BASE + GPFCONSLP_OFFSET) -#define GPFPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET) -#define GPGCON_REG __REG(ELFIN_GPIO_BASE + GPGCON_OFFSET) -#define GPGDAT_REG __REG(ELFIN_GPIO_BASE + GPGDAT_OFFSET) -#define GPGPUD_REG __REG(ELFIN_GPIO_BASE + GPGPUD_OFFSET) -#define GPGCONSLP_REG __REG(ELFIN_GPIO_BASE + GPGCONSLP_OFFSET) -#define GPGPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET) -#define GPHCON0_REG __REG(ELFIN_GPIO_BASE + GPHCON0_OFFSET) -#define GPHCON1_REG __REG(ELFIN_GPIO_BASE + GPHCON1_OFFSET) -#define GPHDAT_REG __REG(ELFIN_GPIO_BASE + GPHDAT_OFFSET) -#define GPHPUD_REG __REG(ELFIN_GPIO_BASE + GPHPUD_OFFSET) -#define GPHCONSLP_REG __REG(ELFIN_GPIO_BASE + GPHCONSLP_OFFSET) -#define GPHPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET) -#define GPICON_REG __REG(ELFIN_GPIO_BASE + GPICON_OFFSET) -#define GPIDAT_REG __REG(ELFIN_GPIO_BASE + GPIDAT_OFFSET) -#define GPIPUD_REG __REG(ELFIN_GPIO_BASE + GPIPUD_OFFSET) -#define GPICONSLP_REG __REG(ELFIN_GPIO_BASE + GPICONSLP_OFFSET) -#define GPIPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET) -#define GPJCON_REG __REG(ELFIN_GPIO_BASE + GPJCON_OFFSET) -#define GPJDAT_REG __REG(ELFIN_GPIO_BASE + GPJDAT_OFFSET) -#define GPJPUD_REG __REG(ELFIN_GPIO_BASE + GPJPUD_OFFSET) -#define GPJCONSLP_REG __REG(ELFIN_GPIO_BASE + GPJCONSLP_OFFSET) -#define GPJPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET) -#define GPKCON0_REG __REG(ELFIN_GPIO_BASE + GPKCON0_OFFSET) -#define GPKCON1_REG __REG(ELFIN_GPIO_BASE + GPKCON1_OFFSET) -#define GPKDAT_REG __REG(ELFIN_GPIO_BASE + GPKDAT_OFFSET) -#define GPKPUD_REG __REG(ELFIN_GPIO_BASE + GPKPUD_OFFSET) -#define GPLCON0_REG __REG(ELFIN_GPIO_BASE + GPLCON0_OFFSET) -#define GPLCON1_REG __REG(ELFIN_GPIO_BASE + GPLCON1_OFFSET) -#define GPLDAT_REG __REG(ELFIN_GPIO_BASE + GPLDAT_OFFSET) -#define GPLPUD_REG __REG(ELFIN_GPIO_BASE + GPLPUD_OFFSET) -#define GPMCON_REG __REG(ELFIN_GPIO_BASE + GPMCON_OFFSET) -#define GPMDAT_REG __REG(ELFIN_GPIO_BASE + GPMDAT_OFFSET) -#define GPMPUD_REG __REG(ELFIN_GPIO_BASE + GPMPUD_OFFSET) -#define GPNCON_REG __REG(ELFIN_GPIO_BASE + GPNCON_OFFSET) -#define GPNDAT_REG __REG(ELFIN_GPIO_BASE + GPNDAT_OFFSET) -#define GPNPUD_REG __REG(ELFIN_GPIO_BASE + GPNPUD_OFFSET) -#define GPOCON_REG __REG(ELFIN_GPIO_BASE + GPOCON_OFFSET) -#define GPODAT_REG __REG(ELFIN_GPIO_BASE + GPODAT_OFFSET) -#define GPOPUD_REG __REG(ELFIN_GPIO_BASE + GPOPUD_OFFSET) -#define GPOCONSLP_REG __REG(ELFIN_GPIO_BASE + GPOCONSLP_OFFSET) -#define GPOPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET) -#define GPPCON_REG __REG(ELFIN_GPIO_BASE + GPPCON_OFFSET) -#define GPPDAT_REG __REG(ELFIN_GPIO_BASE + GPPDAT_OFFSET) -#define GPPPUD_REG __REG(ELFIN_GPIO_BASE + GPPPUD_OFFSET) -#define GPPCONSLP_REG __REG(ELFIN_GPIO_BASE + GPPCONSLP_OFFSET) -#define GPPPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET) -#define GPQCON_REG __REG(ELFIN_GPIO_BASE + GPQCON_OFFSET) -#define GPQDAT_REG __REG(ELFIN_GPIO_BASE + GPQDAT_OFFSET) -#define GPQPUD_REG __REG(ELFIN_GPIO_BASE + GPQPUD_OFFSET) -#define GPQCONSLP_REG __REG(ELFIN_GPIO_BASE + GPQCONSLP_OFFSET) -#define GPQPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET) - -/* - * Bus Matrix - */ -#define ELFIN_MEM_SYS_CFG 0x7e00f120 - -#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12) - -#define S3C64XX_MEM_SYS_CFG_NAND 0x0008 -#define S3C64XX_MEM_SYS_CFG_ONENAND S3C64XX_MEM_SYS_CFG_16BIT - -#define GPACON (ELFIN_GPIO_BASE + GPACON_OFFSET) -#define GPADAT (ELFIN_GPIO_BASE + GPADAT_OFFSET) -#define GPAPUD (ELFIN_GPIO_BASE + GPAPUD_OFFSET) -#define GPACONSLP (ELFIN_GPIO_BASE + GPACONSLP_OFFSET) -#define GPAPUDSLP (ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET) -#define GPBCON (ELFIN_GPIO_BASE + GPBCON_OFFSET) -#define GPBDAT (ELFIN_GPIO_BASE + GPBDAT_OFFSET) -#define GPBPUD (ELFIN_GPIO_BASE + GPBPUD_OFFSET) -#define GPBCONSLP (ELFIN_GPIO_BASE + GPBCONSLP_OFFSET) -#define GPBPUDSLP (ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET) -#define GPCCON (ELFIN_GPIO_BASE + GPCCON_OFFSET) -#define GPCDAT (ELFIN_GPIO_BASE + GPCDAT_OFFSET) -#define GPCPUD (ELFIN_GPIO_BASE + GPCPUD_OFFSET) -#define GPCCONSLP (ELFIN_GPIO_BASE + GPCCONSLP_OFFSET) -#define GPCPUDSLP (ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET) -#define GPDCON (ELFIN_GPIO_BASE + GPDCON_OFFSET) -#define GPDDAT (ELFIN_GPIO_BASE + GPDDAT_OFFSET) -#define GPDPUD (ELFIN_GPIO_BASE + GPDPUD_OFFSET) -#define GPDCONSLP (ELFIN_GPIO_BASE + GPDCONSLP_OFFSET) -#define GPDPUDSLP (ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET) -#define GPECON (ELFIN_GPIO_BASE + GPECON_OFFSET) -#define GPEDAT (ELFIN_GPIO_BASE + GPEDAT_OFFSET) -#define GPEPUD (ELFIN_GPIO_BASE + GPEPUD_OFFSET) -#define GPECONSLP (ELFIN_GPIO_BASE + GPECONSLP_OFFSET) -#define GPEPUDSLP (ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET) -#define GPFCON (ELFIN_GPIO_BASE + GPFCON_OFFSET) -#define GPFDAT (ELFIN_GPIO_BASE + GPFDAT_OFFSET) -#define GPFPUD (ELFIN_GPIO_BASE + GPFPUD_OFFSET) -#define GPFCONSLP (ELFIN_GPIO_BASE + GPFCONSLP_OFFSET) -#define GPFPUDSLP (ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET) -#define GPGCON (ELFIN_GPIO_BASE + GPGCON_OFFSET) -#define GPGDAT (ELFIN_GPIO_BASE + GPGDAT_OFFSET) -#define GPGPUD (ELFIN_GPIO_BASE + GPGPUD_OFFSET) -#define GPGCONSLP (ELFIN_GPIO_BASE + GPGCONSLP_OFFSET) -#define GPGPUDSLP (ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET) -#define GPHCON0 (ELFIN_GPIO_BASE + GPHCON0_OFFSET) -#define GPHCON1 (ELFIN_GPIO_BASE + GPHCON1_OFFSET) -#define GPHDAT (ELFIN_GPIO_BASE + GPHDAT_OFFSET) -#define GPHPUD (ELFIN_GPIO_BASE + GPHPUD_OFFSET) -#define GPHCONSLP (ELFIN_GPIO_BASE + GPHCONSLP_OFFSET) -#define GPHPUDSLP (ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET) -#define GPICON (ELFIN_GPIO_BASE + GPICON_OFFSET) -#define GPIDAT (ELFIN_GPIO_BASE + GPIDAT_OFFSET) -#define GPIPUD (ELFIN_GPIO_BASE + GPIPUD_OFFSET) -#define GPICONSLP (ELFIN_GPIO_BASE + GPICONSLP_OFFSET) -#define GPIPUDSLP (ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET) -#define GPJCON (ELFIN_GPIO_BASE + GPJCON_OFFSET) -#define GPJDAT (ELFIN_GPIO_BASE + GPJDAT_OFFSET) -#define GPJPUD (ELFIN_GPIO_BASE + GPJPUD_OFFSET) -#define GPJCONSLP (ELFIN_GPIO_BASE + GPJCONSLP_OFFSET) -#define GPJPUDSLP (ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET) -#define GPKCON0 (ELFIN_GPIO_BASE + GPKCON0_OFFSET) -#define GPKCON1 (ELFIN_GPIO_BASE + GPKCON1_OFFSET) -#define GPKDAT (ELFIN_GPIO_BASE + GPKDAT_OFFSET) -#define GPKPUD (ELFIN_GPIO_BASE + GPKPUD_OFFSET) -#define GPLCON0 (ELFIN_GPIO_BASE + GPLCON0_OFFSET) -#define GPLCON1 (ELFIN_GPIO_BASE + GPLCON1_OFFSET) -#define GPLDAT (ELFIN_GPIO_BASE + GPLDAT_OFFSET) -#define GPLPUD (ELFIN_GPIO_BASE + GPLPUD_OFFSET) -#define GPMCON (ELFIN_GPIO_BASE + GPMCON_OFFSET) -#define GPMDAT (ELFIN_GPIO_BASE + GPMDAT_OFFSET) -#define GPMPUD (ELFIN_GPIO_BASE + GPMPUD_OFFSET) -#define GPNCON (ELFIN_GPIO_BASE + GPNCON_OFFSET) -#define GPNDAT (ELFIN_GPIO_BASE + GPNDAT_OFFSET) -#define GPNPUD (ELFIN_GPIO_BASE + GPNPUD_OFFSET) -#define GPOCON (ELFIN_GPIO_BASE + GPOCON_OFFSET) -#define GPODAT (ELFIN_GPIO_BASE + GPODAT_OFFSET) -#define GPOPUD (ELFIN_GPIO_BASE + GPOPUD_OFFSET) -#define GPOCONSLP (ELFIN_GPIO_BASE + GPOCONSLP_OFFSET) -#define GPOPUDSLP (ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET) -#define GPPCON (ELFIN_GPIO_BASE + GPPCON_OFFSET) -#define GPPDAT (ELFIN_GPIO_BASE + GPPDAT_OFFSET) -#define GPPPUD (ELFIN_GPIO_BASE + GPPPUD_OFFSET) -#define GPPCONSLP (ELFIN_GPIO_BASE + GPPCONSLP_OFFSET) -#define GPPPUDSLP (ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET) -#define GPQCON (ELFIN_GPIO_BASE + GPQCON_OFFSET) -#define GPQDAT (ELFIN_GPIO_BASE + GPQDAT_OFFSET) -#define GPQPUD (ELFIN_GPIO_BASE + GPQPUD_OFFSET) -#define GPQCONSLP (ELFIN_GPIO_BASE + GPQCONSLP_OFFSET) -#define GPQPUDSLP (ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET) - -/* - * Memory controller - */ -#define ELFIN_SROM_BASE 0x70000000 - -#define SROM_BW_REG __REG(ELFIN_SROM_BASE + 0x0) -#define SROM_BC0_REG __REG(ELFIN_SROM_BASE + 0x4) -#define SROM_BC1_REG __REG(ELFIN_SROM_BASE + 0x8) -#define SROM_BC2_REG __REG(ELFIN_SROM_BASE + 0xC) -#define SROM_BC3_REG __REG(ELFIN_SROM_BASE + 0x10) -#define SROM_BC4_REG __REG(ELFIN_SROM_BASE + 0x14) -#define SROM_BC5_REG __REG(ELFIN_SROM_BASE + 0x18) - -/* - * SDRAM Controller - */ -#define ELFIN_DMC0_BASE 0x7e000000 -#define ELFIN_DMC1_BASE 0x7e001000 - -#define INDEX_DMC_MEMC_STATUS 0x00 -#define INDEX_DMC_MEMC_CMD 0x04 -#define INDEX_DMC_DIRECT_CMD 0x08 -#define INDEX_DMC_MEMORY_CFG 0x0C -#define INDEX_DMC_REFRESH_PRD 0x10 -#define INDEX_DMC_CAS_LATENCY 0x14 -#define INDEX_DMC_T_DQSS 0x18 -#define INDEX_DMC_T_MRD 0x1C -#define INDEX_DMC_T_RAS 0x20 -#define INDEX_DMC_T_RC 0x24 -#define INDEX_DMC_T_RCD 0x28 -#define INDEX_DMC_T_RFC 0x2C -#define INDEX_DMC_T_RP 0x30 -#define INDEX_DMC_T_RRD 0x34 -#define INDEX_DMC_T_WR 0x38 -#define INDEX_DMC_T_WTR 0x3C -#define INDEX_DMC_T_XP 0x40 -#define INDEX_DMC_T_XSR 0x44 -#define INDEX_DMC_T_ESR 0x48 -#define INDEX_DMC_MEMORY_CFG2 0x4C -#define INDEX_DMC_CHIP_0_CFG 0x200 -#define INDEX_DMC_CHIP_1_CFG 0x204 -#define INDEX_DMC_CHIP_2_CFG 0x208 -#define INDEX_DMC_CHIP_3_CFG 0x20C -#define INDEX_DMC_USER_STATUS 0x300 -#define INDEX_DMC_USER_CONFIG 0x304 - -/* - * Memory Chip direct command - */ -#define DMC_NOP0 0x0c0000 -#define DMC_NOP1 0x1c0000 -#define DMC_PA0 0x000000 /* Precharge all */ -#define DMC_PA1 0x100000 -#define DMC_AR0 0x040000 /* Autorefresh */ -#define DMC_AR1 0x140000 -#define DMC_SDR_MR0 0x080032 /* MRS, CAS 3, Burst Length 4 */ -#define DMC_SDR_MR1 0x180032 -#define DMC_DDR_MR0 0x080162 -#define DMC_DDR_MR1 0x180162 -#define DMC_mDDR_MR0 0x080032 /* CAS 3, Burst Length 4 */ -#define DMC_mDDR_MR1 0x180032 -#define DMC_mSDR_EMR0 0x0a0000 /* EMRS, DS:Full, PASR:Full Array */ -#define DMC_mSDR_EMR1 0x1a0000 -#define DMC_DDR_EMR0 0x090000 -#define DMC_DDR_EMR1 0x190000 -#define DMC_mDDR_EMR0 0x0a0000 /* DS:Full, PASR:Full Array */ -#define DMC_mDDR_EMR1 0x1a0000 - -/* - * Definitions for memory configuration - * Set memory configuration - * active_chips = 1'b0 (1 chip) - * qos_master_chip = 3'b000(ARID[3:0]) - * memory burst = 3'b010(burst 4) - * stop_mem_clock = 1'b0(disable dynamical stop) - * auto_power_down = 1'b0(disable auto power-down mode) - * power_down_prd = 6'b00_0000(0 cycle for auto power-down) - * ap_bit = 1'b0 (bit position of auto-precharge is 10) - * row_bits = 3'b010(# row address 13) - * column_bits = 3'b010(# column address 10 ) - * - * Set user configuration - * 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR - * - * Set chip select for chip [n] - * row bank control, bank address 0x3000_0000 ~ 0x37ff_ffff - * CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24] - */ - -/* - * Nand flash controller - */ -#define ELFIN_NAND_BASE 0x70200000 - -#define NFCONF_OFFSET 0x00 -#define NFCONT_OFFSET 0x04 -#define NFCMMD_OFFSET 0x08 -#define NFADDR_OFFSET 0x0c -#define NFDATA_OFFSET 0x10 -#define NFMECCDATA0_OFFSET 0x14 -#define NFMECCDATA1_OFFSET 0x18 -#define NFSECCDATA0_OFFSET 0x1c -#define NFSBLK_OFFSET 0x20 -#define NFEBLK_OFFSET 0x24 -#define NFSTAT_OFFSET 0x28 -#define NFESTAT0_OFFSET 0x2c -#define NFESTAT1_OFFSET 0x30 -#define NFMECC0_OFFSET 0x34 -#define NFMECC1_OFFSET 0x38 -#define NFSECC_OFFSET 0x3c -#define NFMLCBITPT_OFFSET 0x40 - -#define NFCONF (ELFIN_NAND_BASE + NFCONF_OFFSET) -#define NFCONT (ELFIN_NAND_BASE + NFCONT_OFFSET) -#define NFCMMD (ELFIN_NAND_BASE + NFCMMD_OFFSET) -#define NFADDR (ELFIN_NAND_BASE + NFADDR_OFFSET) -#define NFDATA (ELFIN_NAND_BASE + NFDATA_OFFSET) -#define NFMECCDATA0 (ELFIN_NAND_BASE + NFMECCDATA0_OFFSET) -#define NFMECCDATA1 (ELFIN_NAND_BASE + NFMECCDATA1_OFFSET) -#define NFSECCDATA0 (ELFIN_NAND_BASE + NFSECCDATA0_OFFSET) -#define NFSBLK (ELFIN_NAND_BASE + NFSBLK_OFFSET) -#define NFEBLK (ELFIN_NAND_BASE + NFEBLK_OFFSET) -#define NFSTAT (ELFIN_NAND_BASE + NFSTAT_OFFSET) -#define NFESTAT0 (ELFIN_NAND_BASE + NFESTAT0_OFFSET) -#define NFESTAT1 (ELFIN_NAND_BASE + NFESTAT1_OFFSET) -#define NFMECC0 (ELFIN_NAND_BASE + NFMECC0_OFFSET) -#define NFMECC1 (ELFIN_NAND_BASE + NFMECC1_OFFSET) -#define NFSECC (ELFIN_NAND_BASE + NFSECC_OFFSET) -#define NFMLCBITPT (ELFIN_NAND_BASE + NFMLCBITPT_OFFSET) - -#define NFCONF_REG __REG(ELFIN_NAND_BASE + NFCONF_OFFSET) -#define NFCONT_REG __REG(ELFIN_NAND_BASE + NFCONT_OFFSET) -#define NFCMD_REG __REG(ELFIN_NAND_BASE + NFCMMD_OFFSET) -#define NFADDR_REG __REG(ELFIN_NAND_BASE + NFADDR_OFFSET) -#define NFDATA_REG __REG(ELFIN_NAND_BASE + NFDATA_OFFSET) -#define NFDATA8_REG __REGb(ELFIN_NAND_BASE + NFDATA_OFFSET) -#define NFMECCDATA0_REG __REG(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET) -#define NFMECCDATA1_REG __REG(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET) -#define NFSECCDATA0_REG __REG(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET) -#define NFSBLK_REG __REG(ELFIN_NAND_BASE + NFSBLK_OFFSET) -#define NFEBLK_REG __REG(ELFIN_NAND_BASE + NFEBLK_OFFSET) -#define NFSTAT_REG __REG(ELFIN_NAND_BASE + NFSTAT_OFFSET) -#define NFESTAT0_REG __REG(ELFIN_NAND_BASE + NFESTAT0_OFFSET) -#define NFESTAT1_REG __REG(ELFIN_NAND_BASE + NFESTAT1_OFFSET) -#define NFMECC0_REG __REG(ELFIN_NAND_BASE + NFMECC0_OFFSET) -#define NFMECC1_REG __REG(ELFIN_NAND_BASE + NFMECC1_OFFSET) -#define NFSECC_REG __REG(ELFIN_NAND_BASE + NFSECC_OFFSET) -#define NFMLCBITPT_REG __REG(ELFIN_NAND_BASE + NFMLCBITPT_OFFSET) - -#define NFCONF_ECC_4BIT (1<<24) - -#define NFCONT_ECC_ENC (1<<18) -#define NFCONT_WP (1<<16) -#define NFCONT_MECCLOCK (1<<7) -#define NFCONT_SECCLOCK (1<<6) -#define NFCONT_INITMECC (1<<5) -#define NFCONT_INITSECC (1<<4) -#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC) -#define NFCONT_CS_ALT (1<<2) -#define NFCONT_CS (1<<1) -#define NFCONT_ENABLE (1<<0) - -#define NFSTAT_ECCENCDONE (1<<7) -#define NFSTAT_ECCDECDONE (1<<6) -#define NFSTAT_RnB (1<<0) - -#define NFESTAT0_ECCBUSY (1<<31) - -/* - * Interrupt - */ -#define ELFIN_VIC0_BASE_ADDR 0x71200000 -#define ELFIN_VIC1_BASE_ADDR 0x71300000 -#define oINTMOD 0x0C /* VIC INT SELECT (IRQ or FIQ) */ -#define oINTUNMSK 0x10 /* VIC INT EN (write 1 to unmask) */ -#define oINTMSK 0x14 /* VIC INT EN CLEAR (write 1 to mask) */ -#define oINTSUBMSK 0x1C /* VIC SOFT INT CLEAR */ -#define oVECTADDR 0xF00 /* VIC ADDRESS */ - -/* - * Watchdog timer - */ -#define ELFIN_WATCHDOG_BASE 0x7E004000 - -#define WTCON_REG __REG(0x7E004004) -#define WTDAT_REG __REG(0x7E004008) -#define WTCNT_REG __REG(0x7E00400C) - - -/* - * UART - */ -#define ELFIN_UART_BASE 0x7F005000 - -#define ELFIN_UART0_OFFSET 0x0000 -#define ELFIN_UART1_OFFSET 0x0400 -#define ELFIN_UART2_OFFSET 0x0800 - -#define ULCON_OFFSET 0x00 -#define UCON_OFFSET 0x04 -#define UFCON_OFFSET 0x08 -#define UMCON_OFFSET 0x0C -#define UTRSTAT_OFFSET 0x10 -#define UERSTAT_OFFSET 0x14 -#define UFSTAT_OFFSET 0x18 -#define UMSTAT_OFFSET 0x1C -#define UTXH_OFFSET 0x20 -#define URXH_OFFSET 0x24 -#define UBRDIV_OFFSET 0x28 -#define UDIVSLOT_OFFSET 0x2C -#define UINTP_OFFSET 0x30 -#define UINTSP_OFFSET 0x34 -#define UINTM_OFFSET 0x38 - -#define ULCON0_REG __REG(0x7F005000) -#define UCON0_REG __REG(0x7F005004) -#define UFCON0_REG __REG(0x7F005008) -#define UMCON0_REG __REG(0x7F00500C) -#define UTRSTAT0_REG __REG(0x7F005010) -#define UERSTAT0_REG __REG(0x7F005014) -#define UFSTAT0_REG __REG(0x7F005018) -#define UMSTAT0_REG __REG(0x7F00501c) -#define UTXH0_REG __REG(0x7F005020) -#define URXH0_REG __REG(0x7F005024) -#define UBRDIV0_REG __REG(0x7F005028) -#define UDIVSLOT0_REG __REG(0x7F00502c) -#define UINTP0_REG __REG(0x7F005030) -#define UINTSP0_REG __REG(0x7F005034) -#define UINTM0_REG __REG(0x7F005038) - -#define ULCON1_REG __REG(0x7F005400) -#define UCON1_REG __REG(0x7F005404) -#define UFCON1_REG __REG(0x7F005408) -#define UMCON1_REG __REG(0x7F00540C) -#define UTRSTAT1_REG __REG(0x7F005410) -#define UERSTAT1_REG __REG(0x7F005414) -#define UFSTAT1_REG __REG(0x7F005418) -#define UMSTAT1_REG __REG(0x7F00541c) -#define UTXH1_REG __REG(0x7F005420) -#define URXH1_REG __REG(0x7F005424) -#define UBRDIV1_REG __REG(0x7F005428) -#define UDIVSLOT1_REG __REG(0x7F00542c) -#define UINTP1_REG __REG(0x7F005430) -#define UINTSP1_REG __REG(0x7F005434) -#define UINTM1_REG __REG(0x7F005438) - -#define UTRSTAT_TX_EMPTY (1 << 2) -#define UTRSTAT_RX_READY (1 << 0) -#define UART_ERR_MASK 0xF - -/* - * PWM timer - */ -#define ELFIN_TIMER_BASE 0x7F006000 - -#define TCFG0_REG __REG(0x7F006000) -#define TCFG1_REG __REG(0x7F006004) -#define TCON_REG __REG(0x7F006008) -#define TCNTB0_REG __REG(0x7F00600c) -#define TCMPB0_REG __REG(0x7F006010) -#define TCNTO0_REG __REG(0x7F006014) -#define TCNTB1_REG __REG(0x7F006018) -#define TCMPB1_REG __REG(0x7F00601c) -#define TCNTO1_REG __REG(0x7F006020) -#define TCNTB2_REG __REG(0x7F006024) -#define TCMPB2_REG __REG(0x7F006028) -#define TCNTO2_REG __REG(0x7F00602c) -#define TCNTB3_REG __REG(0x7F006030) -#define TCMPB3_REG __REG(0x7F006034) -#define TCNTO3_REG __REG(0x7F006038) -#define TCNTB4_REG __REG(0x7F00603c) -#define TCNTO4_REG __REG(0x7F006040) - -/* Fields */ -#define fTCFG0_DZONE Fld(8, 16) /* the dead zone length (=timer 0) */ -#define fTCFG0_PRE1 Fld(8, 8) /* prescaler value for time 2,3,4 */ -#define fTCFG0_PRE0 Fld(8, 0) /* prescaler value for time 0,1 */ -#define fTCFG1_MUX4 Fld(4, 16) -/* bits */ -#define TCFG0_DZONE(x) FInsrt((x), fTCFG0_DZONE) -#define TCFG0_PRE1(x) FInsrt((x), fTCFG0_PRE1) -#define TCFG0_PRE0(x) FInsrt((x), fTCFG0_PRE0) -#define TCON_4_AUTO (1 << 22) /* auto reload on/off for Timer 4 */ -#define TCON_4_UPDATE (1 << 21) /* manual Update TCNTB4 */ -#define TCON_4_ONOFF (1 << 20) /* 0: Stop, 1: start Timer 4 */ -#define COUNT_4_ON (TCON_4_ONOFF * 1) -#define COUNT_4_OFF (TCON_4_ONOFF * 0) -#define TCON_3_AUTO (1 << 19) /* auto reload on/off for Timer 3 */ -#define TIMER3_ATLOAD_ON (TCON_3_AUTO * 1) -#define TIMER3_ATLAOD_OFF FClrBit(TCON, TCON_3_AUTO) -#define TCON_3_INVERT (1 << 18) /* 1: Inverter on for TOUT3 */ -#define TIMER3_IVT_ON (TCON_3_INVERT * 1) -#define TIMER3_IVT_OFF (FClrBit(TCON, TCON_3_INVERT)) -#define TCON_3_MAN (1 << 17) /* manual Update TCNTB3,TCMPB3 */ -#define TIMER3_MANUP (TCON_3_MAN*1) -#define TIMER3_NOP (FClrBit(TCON, TCON_3_MAN)) -#define TCON_3_ONOFF (1 << 16) /* 0: Stop, 1: start Timer 3 */ -#define TIMER3_ON (TCON_3_ONOFF * 1) -#define TIMER3_OFF (FClrBit(TCON, TCON_3_ONOFF)) - -#if defined(CONFIG_CLK_400_100_50) -#define STARTUP_AMDIV 400 -#define STARTUP_MDIV 400 -#define STARTUP_PDIV 6 -#define STARTUP_SDIV 1 -#elif defined(CONFIG_CLK_400_133_66) -#define STARTUP_AMDIV 400 -#define STARTUP_MDIV 533 -#define STARTUP_PDIV 6 -#define STARTUP_SDIV 1 -#elif defined(CONFIG_CLK_533_133_66) -#define STARTUP_AMDIV 533 -#define STARTUP_MDIV 533 -#define STARTUP_PDIV 6 -#define STARTUP_SDIV 1 -#elif defined(CONFIG_CLK_667_133_66) -#define STARTUP_AMDIV 667 -#define STARTUP_MDIV 533 -#define STARTUP_PDIV 6 -#define STARTUP_SDIV 1 -#endif - -#define STARTUP_PCLKDIV 3 -#define STARTUP_HCLKX2DIV 1 -#define STARTUP_HCLKDIV 1 -#define STARTUP_MPLLDIV 1 -#define STARTUP_APLLDIV 0 - -#define CLK_DIV_VAL ((STARTUP_PCLKDIV << 12) | (STARTUP_HCLKX2DIV << 9) | \ - (STARTUP_HCLKDIV << 8) | (STARTUP_MPLLDIV<<4) | STARTUP_APLLDIV) -#define MPLL_VAL ((1 << 31) | (STARTUP_MDIV << 16) | \ - (STARTUP_PDIV << 8) | STARTUP_SDIV) -#define STARTUP_MPLL (((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \ - STARTUP_PDIV) * STARTUP_MDIV) - -#if defined(CONFIG_SYNC_MODE) -#define APLL_VAL ((1 << 31) | (STARTUP_MDIV << 16) | \ - (STARTUP_PDIV << 8) | STARTUP_SDIV) -#define STARTUP_APLL (((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \ - STARTUP_PDIV) * STARTUP_MDIV) -#define STARTUP_HCLK (STARTUP_MPLL / (STARTUP_HCLKX2DIV + 1) / \ - (STARTUP_HCLKDIV + 1)) -#else -#define APLL_VAL ((1 << 31) | (STARTUP_AMDIV << 16) | \ - (STARTUP_PDIV << 8) | STARTUP_SDIV) -#define STARTUP_APLL (((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \ - STARTUP_PDIV) * STARTUP_AMDIV) -#define STARTUP_HCLK (STARTUP_MPLL / (STARTUP_HCLKX2DIV + 1) / \ - (STARTUP_HCLKDIV + 1)) -#endif - - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define DMC1_MEM_CFG 0x00010012 /* burst 4, 13-bit row, 10-bit col */ -#define DMC1_MEM_CFG2 0xB45 -#define DMC1_CHIP0_CFG 0x150F8 /* 0x5000_0000~0x57ff_ffff (128 MiB) */ -#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ - -/* Memory Parameters */ -/* DDR Parameters */ -#define DDR_tREFRESH 7800 /* ns */ -#define DDR_tRAS 45 /* ns (min: 45ns)*/ -#define DDR_tRC 68 /* ns (min: 67.5ns)*/ -#define DDR_tRCD 23 /* ns (min: 22.5ns)*/ -#define DDR_tRFC 80 /* ns (min: 80ns)*/ -#define DDR_tRP 23 /* ns (min: 22.5ns)*/ -#define DDR_tRRD 15 /* ns (min: 15ns)*/ -#define DDR_tWR 15 /* ns (min: 15ns)*/ -#define DDR_tXSR 120 /* ns (min: 120ns)*/ -#define DDR_CASL 3 /* CAS Latency 3 */ - -/* - * mDDR memory configuration - */ - -#define NS_TO_CLK(t) ((STARTUP_HCLK / 1000 * (t) - 1) / 1000000) - -#define DMC_DDR_BA_EMRS 2 -#define DMC_DDR_MEM_CASLAT 3 -/* 6 Set Cas Latency to 3 */ -#define DMC_DDR_CAS_LATENCY (DDR_CASL << 1) -/* Min 0.75 ~ 1.25 */ -#define DMC_DDR_t_DQSS 1 -/* Min 2 tck */ -#define DMC_DDR_t_MRD 2 -/* 7, Min 45ns */ -#define DMC_DDR_t_RAS (NS_TO_CLK(DDR_tRAS) + 1) -/* 10, Min 67.5ns */ -#define DMC_DDR_t_RC (NS_TO_CLK(DDR_tRC) + 1) -/* 4,5(TRM), Min 22.5ns */ -#define DMC_DDR_t_RCD (NS_TO_CLK(DDR_tRCD) + 1) -#define DMC_DDR_schedule_RCD ((DMC_DDR_t_RCD - 3) << 3) -/* 11,18(TRM) Min 80ns */ -#define DMC_DDR_t_RFC (NS_TO_CLK(DDR_tRFC) + 1) -#define DMC_DDR_schedule_RFC ((DMC_DDR_t_RFC - 3) << 5) -/* 4, 5(TRM) Min 22.5ns */ -#define DMC_DDR_t_RP (NS_TO_CLK(DDR_tRP) + 1) -#define DMC_DDR_schedule_RP ((DMC_DDR_t_RP - 3) << 3) -/* 3, Min 15ns */ -#define DMC_DDR_t_RRD (NS_TO_CLK(DDR_tRRD) + 1) -/* Min 15ns */ -#define DMC_DDR_t_WR (NS_TO_CLK(DDR_tWR) + 1) -#define DMC_DDR_t_WTR 2 -/* 1tck + tIS(1.5ns) */ -#define DMC_DDR_t_XP 2 -/* 17, Min 120ns */ -#define DMC_DDR_t_XSR (NS_TO_CLK(DDR_tXSR) + 1) -#define DMC_DDR_t_ESR DMC_DDR_t_XSR -/* TRM 2656 */ -#define DMC_DDR_REFRESH_PRD (NS_TO_CLK(DDR_tREFRESH)) -/* 2b01 : mDDR */ -#define DMC_DDR_USER_CONFIG 1 - -#ifndef __ASSEMBLY__ -enum s3c64xx_uarts_nr { - S3C64XX_UART0, - S3C64XX_UART1, - S3C64XX_UART2, -}; - -#include "s3c64x0.h" - -static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr) -{ - return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400)); -} -#endif - -#endif /*__S3C6400_H__*/ diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h deleted file mode 100644 index 0bbf1d0..0000000 --- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * (C) Copyright 2003 - * David MÃŒller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : S3C64XX.h - * Version : 31.3.2003 - * - * common stuff for SAMSUNG S3C64XX SoC - ************************************************/ - -#ifndef __S3C64XX_H__ -#define __S3C64XX_H__ - -#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400) -#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! -#endif - -#include <asm/types.h> - -/* UART (see manual chapter 11) */ -typedef struct { - volatile u32 ULCON; - volatile u32 UCON; - volatile u32 UFCON; - volatile u32 UMCON; - volatile u32 UTRSTAT; - volatile u32 UERSTAT; - volatile u32 UFSTAT; - volatile u32 UMSTAT; -#ifdef __BIG_ENDIAN - volatile u8 res1[3]; - volatile u8 UTXH; - volatile u8 res2[3]; - volatile u8 URXH; -#else /* Little Endian */ - volatile u8 UTXH; - volatile u8 res1[3]; - volatile u8 URXH; - volatile u8 res2[3]; -#endif - volatile u32 UBRDIV; -#ifdef __BIG_ENDIAN - volatile u8 res3[2]; - volatile u16 UDIVSLOT; -#else - volatile u16 UDIVSLOT; - volatile u8 res3[2]; -#endif -} s3c64xx_uart; - -/* PWM TIMER (see manual chapter 10) */ -typedef struct { - volatile u32 TCNTB; - volatile u32 TCMPB; - volatile u32 TCNTO; -} s3c64xx_timer; - -typedef struct { - volatile u32 TCFG0; - volatile u32 TCFG1; - volatile u32 TCON; - s3c64xx_timer ch[4]; - volatile u32 TCNTB4; - volatile u32 TCNTO4; -} s3c64xx_timers; - -#endif /*__S3C64XX_H__*/ diff --git a/arch/arm/include/asm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h deleted file mode 100644 index 4c389c1..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/clk.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Heungjun Kim <riverful.kim@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_ARCH_CLK_H_ -#define __ASM_ARM_ARCH_CLK_H_ - -#define APLL 0 -#define MPLL 1 -#define EPLL 2 -#define HPLL 3 -#define VPLL 4 - -unsigned long get_pll_clk(int pllreg); -unsigned long get_arm_clk(void); -unsigned long get_pwm_clk(void); -unsigned long get_uart_clk(int dev_index); - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/clock.h b/arch/arm/include/asm/arch-s5pc1xx/clock.h deleted file mode 100644 index 7b4eb89..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/clock.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Heungjun Kim <riverful.kim@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_ARCH_CLOCK_H_ -#define __ASM_ARM_ARCH_CLOCK_H_ - -#ifndef __ASSEMBLY__ -struct s5pc100_clock { - unsigned int apll_lock; - unsigned int mpll_lock; - unsigned int epll_lock; - unsigned int hpll_lock; - unsigned char res1[0xf0]; - unsigned int apll_con; - unsigned int mpll_con; - unsigned int epll_con; - unsigned int hpll_con; - unsigned char res2[0xf0]; - unsigned int src0; - unsigned int src1; - unsigned int src2; - unsigned int src3; - unsigned char res3[0xf0]; - unsigned int div0; - unsigned int div1; - unsigned int div2; - unsigned int div3; - unsigned int div4; - unsigned char res4[0x1ec]; - unsigned int gate_d00; - unsigned int gate_d01; - unsigned int gate_d02; - unsigned char res5[0x54]; - unsigned int gate_sclk0; - unsigned int gate_sclk1; -}; - -struct s5pc110_clock { - unsigned int apll_lock; - unsigned char res1[0x4]; - unsigned int mpll_lock; - unsigned char res2[0x4]; - unsigned int epll_lock; - unsigned char res3[0xc]; - unsigned int vpll_lock; - unsigned char res4[0xdc]; - unsigned int apll_con; - unsigned char res5[0x4]; - unsigned int mpll_con; - unsigned char res6[0x4]; - unsigned int epll_con; - unsigned char res7[0xc]; - unsigned int vpll_con; - unsigned char res8[0xdc]; - unsigned int src0; - unsigned int src1; - unsigned int src2; - unsigned int src3; - unsigned char res9[0xf0]; - unsigned int div0; - unsigned int div1; - unsigned int div2; - unsigned int div3; - unsigned int div4; - unsigned char res10[0x1ec]; - unsigned int gate_d00; - unsigned int gate_d01; - unsigned int gate_d02; - unsigned char res11[0x54]; - unsigned int gate_sclk0; - unsigned int gate_sclk1; -}; -#endif - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/cpu.h b/arch/arm/include/asm/arch-s5pc1xx/cpu.h deleted file mode 100644 index e74959f..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/cpu.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Heungjun Kim <riverful.kim@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _S5PC1XX_CPU_H -#define _S5PC1XX_CPU_H - -#define S5PC1XX_ADDR_BASE 0xE0000000 - -/* S5PC100 */ -#define S5PC100_PRO_ID 0xE0000000 -#define S5PC100_CLOCK_BASE 0xE0100000 -#define S5PC100_GPIO_BASE 0xE0300000 -#define S5PC100_VIC0_BASE 0xE4000000 -#define S5PC100_VIC1_BASE 0xE4100000 -#define S5PC100_VIC2_BASE 0xE4200000 -#define S5PC100_DMC_BASE 0xE6000000 -#define S5PC100_SROMC_BASE 0xE7000000 -#define S5PC100_ONENAND_BASE 0xE7100000 -#define S5PC100_PWMTIMER_BASE 0xEA000000 -#define S5PC100_WATCHDOG_BASE 0xEA200000 -#define S5PC100_UART_BASE 0xEC000000 -#define S5PC100_MMC_BASE 0xED800000 - -/* S5PC110 */ -#define S5PC110_PRO_ID 0xE0000000 -#define S5PC110_CLOCK_BASE 0xE0100000 -#define S5PC110_GPIO_BASE 0xE0200000 -#define S5PC110_PWMTIMER_BASE 0xE2500000 -#define S5PC110_WATCHDOG_BASE 0xE2700000 -#define S5PC110_UART_BASE 0xE2900000 -#define S5PC110_SROMC_BASE 0xE8000000 -#define S5PC110_MMC_BASE 0xEB000000 -#define S5PC110_DMC0_BASE 0xF0000000 -#define S5PC110_DMC1_BASE 0xF1400000 -#define S5PC110_VIC0_BASE 0xF2000000 -#define S5PC110_VIC1_BASE 0xF2100000 -#define S5PC110_VIC2_BASE 0xF2200000 -#define S5PC110_VIC3_BASE 0xF2300000 - -#ifndef __ASSEMBLY__ -#include <asm/io.h> -/* CPU detection macros */ -extern unsigned int s5p_cpu_id; - -static inline void s5p_set_cpu_id(void) -{ - s5p_cpu_id = readl(S5PC100_PRO_ID); - s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12); -} - -#define IS_SAMSUNG_TYPE(type, id) \ -static inline int cpu_is_##type(void) \ -{ \ - return s5p_cpu_id == id ? 1 : 0; \ -} - -IS_SAMSUNG_TYPE(s5pc100, 0xc100) -IS_SAMSUNG_TYPE(s5pc110, 0xc110) - -#define SAMSUNG_BASE(device, base) \ -static inline unsigned int samsung_get_base_##device(void) \ -{ \ - if (cpu_is_s5pc100()) \ - return S5PC100_##base; \ - else if (cpu_is_s5pc110()) \ - return S5PC110_##base; \ - else \ - return 0; \ -} - -SAMSUNG_BASE(clock, CLOCK_BASE) -SAMSUNG_BASE(gpio, GPIO_BASE) -SAMSUNG_BASE(pro_id, PRO_ID) -SAMSUNG_BASE(mmc, MMC_BASE) -SAMSUNG_BASE(sromc, SROMC_BASE) -SAMSUNG_BASE(timer, PWMTIMER_BASE) -SAMSUNG_BASE(uart, UART_BASE) -#endif - -#endif /* _S5PC1XX_CPU_H */ diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h deleted file mode 100644 index 2df33a6..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#ifndef __ASSEMBLY__ -struct s5p_gpio_bank { - unsigned int con; - unsigned int dat; - unsigned int pull; - unsigned int drv; - unsigned int pdn_con; - unsigned int pdn_pull; - unsigned char res1[8]; -}; - -struct s5pc100_gpio { - struct s5p_gpio_bank a0; - struct s5p_gpio_bank a1; - struct s5p_gpio_bank b; - struct s5p_gpio_bank c; - struct s5p_gpio_bank d; - struct s5p_gpio_bank e0; - struct s5p_gpio_bank e1; - struct s5p_gpio_bank f0; - struct s5p_gpio_bank f1; - struct s5p_gpio_bank f2; - struct s5p_gpio_bank f3; - struct s5p_gpio_bank g0; - struct s5p_gpio_bank g1; - struct s5p_gpio_bank g2; - struct s5p_gpio_bank g3; - struct s5p_gpio_bank i; - struct s5p_gpio_bank j0; - struct s5p_gpio_bank j1; - struct s5p_gpio_bank j2; - struct s5p_gpio_bank j3; - struct s5p_gpio_bank j4; - struct s5p_gpio_bank k0; - struct s5p_gpio_bank k1; - struct s5p_gpio_bank k2; - struct s5p_gpio_bank k3; - struct s5p_gpio_bank l0; - struct s5p_gpio_bank l1; - struct s5p_gpio_bank l2; - struct s5p_gpio_bank l3; - struct s5p_gpio_bank l4; - struct s5p_gpio_bank h0; - struct s5p_gpio_bank h1; - struct s5p_gpio_bank h2; - struct s5p_gpio_bank h3; -}; - -struct s5pc110_gpio { - struct s5p_gpio_bank a0; - struct s5p_gpio_bank a1; - struct s5p_gpio_bank b; - struct s5p_gpio_bank c0; - struct s5p_gpio_bank c1; - struct s5p_gpio_bank d0; - struct s5p_gpio_bank d1; - struct s5p_gpio_bank e0; - struct s5p_gpio_bank e1; - struct s5p_gpio_bank f0; - struct s5p_gpio_bank f1; - struct s5p_gpio_bank f2; - struct s5p_gpio_bank f3; - struct s5p_gpio_bank g0; - struct s5p_gpio_bank g1; - struct s5p_gpio_bank g2; - struct s5p_gpio_bank g3; - struct s5p_gpio_bank i; - struct s5p_gpio_bank j0; - struct s5p_gpio_bank j1; - struct s5p_gpio_bank j2; - struct s5p_gpio_bank j3; - struct s5p_gpio_bank j4; - struct s5p_gpio_bank mp0_1; - struct s5p_gpio_bank mp0_2; - struct s5p_gpio_bank mp0_3; - struct s5p_gpio_bank mp0_4; - struct s5p_gpio_bank mp0_5; - struct s5p_gpio_bank mp0_6; - struct s5p_gpio_bank mp0_7; - struct s5p_gpio_bank mp1_0; - struct s5p_gpio_bank mp1_1; - struct s5p_gpio_bank mp1_2; - struct s5p_gpio_bank mp1_3; - struct s5p_gpio_bank mp1_4; - struct s5p_gpio_bank mp1_5; - struct s5p_gpio_bank mp1_6; - struct s5p_gpio_bank mp1_7; - struct s5p_gpio_bank mp1_8; - struct s5p_gpio_bank mp2_0; - struct s5p_gpio_bank mp2_1; - struct s5p_gpio_bank mp2_2; - struct s5p_gpio_bank mp2_3; - struct s5p_gpio_bank mp2_4; - struct s5p_gpio_bank mp2_5; - struct s5p_gpio_bank mp2_6; - struct s5p_gpio_bank mp2_7; - struct s5p_gpio_bank mp2_8; - struct s5p_gpio_bank res1[48]; - struct s5p_gpio_bank h0; - struct s5p_gpio_bank h1; - struct s5p_gpio_bank h2; - struct s5p_gpio_bank h3; -}; - -/* functions */ -void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); -void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); -void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); -void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en); -unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio); -void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); -void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); -void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); -#endif - -/* Pin configurations */ -#define GPIO_INPUT 0x0 -#define GPIO_OUTPUT 0x1 -#define GPIO_IRQ 0xf -#define GPIO_FUNC(x) (x) - -/* Pull mode */ -#define GPIO_PULL_NONE 0x0 -#define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 - -/* Drive Strength level */ -#define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 -#define GPIO_DRV_4X 0x3 -#define GPIO_DRV_FAST 0x0 -#define GPIO_DRV_SLOW 0x1 - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h b/arch/arm/include/asm/arch-s5pc1xx/mmc.h deleted file mode 100644 index 48de64d..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * (C) Copyright 2009 SAMSUNG Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_MMC_H_ -#define __ASM_ARCH_MMC_H_ - -#ifndef __ASSEMBLY__ -struct s5p_mmc { - unsigned int sysad; - unsigned short blksize; - unsigned short blkcnt; - unsigned int argument; - unsigned short trnmod; - unsigned short cmdreg; - unsigned int rspreg0; - unsigned int rspreg1; - unsigned int rspreg2; - unsigned int rspreg3; - unsigned int bdata; - unsigned int prnsts; - unsigned char hostctl; - unsigned char pwrcon; - unsigned char blkgap; - unsigned char wakcon; - unsigned short clkcon; - unsigned char timeoutcon; - unsigned char swrst; - unsigned int norintsts; /* errintsts */ - unsigned int norintstsen; /* errintstsen */ - unsigned int norintsigen; /* errintsigen */ - unsigned short acmd12errsts; - unsigned char res1[2]; - unsigned int capareg; - unsigned char res2[4]; - unsigned int maxcurr; - unsigned char res3[0x34]; - unsigned int control2; - unsigned int control3; - unsigned int control4; - unsigned char res4[0x6e]; - unsigned short hcver; - unsigned char res5[0xFFF02]; -}; - -struct mmc_host { - struct s5p_mmc *reg; - unsigned int version; /* SDHCI spec. version */ - unsigned int clock; /* Current clock (MHz) */ -}; - -int s5p_mmc_init(int dev_index, int bus_width); - -#endif /* __ASSEMBLY__ */ -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/power.h b/arch/arm/include/asm/arch-s5pc1xx/power.h deleted file mode 100644 index 57e2a2b..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/power.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2009 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_ARCH_POWER_H_ -#define __ASM_ARM_ARCH_POWER_H_ - -/* - * Power control - */ -#define S5PC100_OTHERS 0xE0108200 -#define S5PC100_RST_STAT 0xE0108300 -#define S5PC100_SLEEP_WAKEUP (1 << 3) -#define S5PC100_WAKEUP_STAT 0xE0108304 -#define S5PC100_INFORM0 0xE0108400 - -#define S5PC110_RST_STAT 0xE010A000 -#define S5PC110_SLEEP_WAKEUP (1 << 3) -#define S5PC110_WAKEUP_STAT 0xE010C200 -#define S5PC110_OTHERS 0xE010E000 -#define S5PC110_USB_PHY_CON 0xE010E80C -#define S5PC110_INFORM0 0xE010F000 - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h deleted file mode 100644 index 0369968..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2009 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_PWM_H_ -#define __ASM_ARM_ARCH_PWM_H_ - -/* Interval mode(Auto Reload) of PWM Timer 4 */ -#define TCON4_AUTO_RELOAD (1 << 22) -/* Update TCNTB4 */ -#define TCON4_UPDATE (1 << 21) -/* start bit of PWM Timer 4 */ -#define TCON4_START (1 << 20) - -#ifndef __ASSEMBLY__ -struct s5p_timer { - unsigned int tcfg0; - unsigned int tcfg1; - unsigned int tcon; - unsigned int tcntb0; - unsigned int tcmpb0; - unsigned int tcnto0; - unsigned int tcntb1; - unsigned int tcmpb1; - unsigned int tcnto1; - unsigned int tcntb2; - unsigned int tcmpb2; - unsigned int tcnto2; - unsigned int tcntb3; - unsigned int res1; - unsigned int tcnto3; - unsigned int tcntb4; - unsigned int tcnto4; - unsigned int tintcstat; -}; -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/smc.h b/arch/arm/include/asm/arch-s5pc1xx/smc.h deleted file mode 100644 index 88f4ffe..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/smc.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * (C) Copyright 2010 Samsung Electronics - * Naveen Krishna Ch <ch.naveen@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Note: This file contains the register description for Memory subsystem - * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX. - * - * Only SROMC is defined as of now - */ - -#ifndef __ASM_ARCH_SMC_H_ -#define __ASM_ARCH_SMC_H_ - -#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0)) -#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/ - /* 1-> Byte base address*/ -#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2)) -#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3)) - -#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */ -#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */ -#define SMC_BC_TACC(x) (x << 16) /* 14clk access cycle */ -#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */ -#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */ -#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */ -#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */ - -#ifndef __ASSEMBLY__ -struct s5pc1xx_smc { - unsigned int bw; - unsigned int bc[6]; -}; -#endif /* __ASSEMBLY__ */ - -/* Configure the Band Width and Bank Control Regs for required SROMC Bank */ -void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf); - -#endif /* __ASM_ARCH_SMC_H_ */ diff --git a/arch/arm/include/asm/arch-s5pc1xx/sys_proto.h b/arch/arm/include/asm/arch-s5pc1xx/sys_proto.h deleted file mode 100644 index 3078aaf..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/sys_proto.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2009 Samsung Electrnoics - * Minkyu Kang <mk7.kang@samsung.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -u32 get_device_type(void); -void invalidate_dcache(u32); -void l2_cache_disable(void); -void l2_cache_enable(void); - -#endif diff --git a/arch/arm/include/asm/arch-s5pc1xx/uart.h b/arch/arm/include/asm/arch-s5pc1xx/uart.h deleted file mode 100644 index 1c56739..0000000 --- a/arch/arm/include/asm/arch-s5pc1xx/uart.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Heungjun Kim <riverful.kim@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_UART_H_ -#define __ASM_ARCH_UART_H_ - -#ifndef __ASSEMBLY__ -/* baudrate rest value */ -union br_rest { - unsigned short slot; /* udivslot */ - unsigned char value; /* ufracval */ -}; - -struct s5p_uart { - unsigned int ulcon; - unsigned int ucon; - unsigned int ufcon; - unsigned int umcon; - unsigned int utrstat; - unsigned int uerstat; - unsigned int ufstat; - unsigned int umstat; - unsigned char utxh; - unsigned char res1[3]; - unsigned char urxh; - unsigned char res2[3]; - unsigned int ubrdiv; - union br_rest rest; - unsigned char res3[0x3d0]; -}; - -static inline int s5p_uart_divslot(void) -{ - return 1; -} - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/adc.h b/arch/arm/include/asm/arch-s5pc2xx/adc.h deleted file mode 100644 index c0aa580..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/adc.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * MyungJoo Ham <myungjoo.ham@samsung.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_ADC_H_ -#define __ASM_ARM_ARCH_ADC_H_ - -#ifndef __ASSEMBLY__ -struct s5p_adc { - unsigned int adccon; - unsigned int adctsc; - unsigned int adcdly; - unsigned int adcdat0; - unsigned int adcdat1; - unsigned int adcupdn; - unsigned int adcclrint; - unsigned int adcmux; - unsigned int adcclrintpndnup; -}; -#endif - -#endif /* __ASM_ARM_ARCH_ADC_H_ */ diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h b/arch/arm/include/asm/arch-s5pc2xx/clk.h deleted file mode 100644 index 5a1cdf1..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/clk.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * (C) Copyright 2010 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_ARCH_CLK_H_ -#define __ASM_ARM_ARCH_CLK_H_ - -#define APLL 0 -#define MPLL 1 -#define EPLL 2 -#define HPLL 3 -#define VPLL 4 - -unsigned long get_pll_clk(int pllreg); -unsigned long get_arm_clk(void); -unsigned long get_pwm_clk(void); -unsigned long get_uart_clk(int dev_index); - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/clock.h b/arch/arm/include/asm/arch-s5pc2xx/clock.h deleted file mode 100644 index 0ff8cf8..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/clock.h +++ /dev/null @@ -1,255 +0,0 @@ -/* - * (C) Copyright 2010 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_ARCH_CLOCK_H_ -#define __ASM_ARM_ARCH_CLOCK_H_ - -#ifndef __ASSEMBLY__ -struct s5pc210_clock { - unsigned char res1[0x4200]; - unsigned int src_leftbus; - unsigned char res2[0x1fc]; - unsigned int mux_stat_leftbus; - unsigned char res4[0xfc]; - unsigned int div_leftbus; - unsigned char res5[0xfc]; - unsigned int div_stat_leftbus; - unsigned char res6[0x1fc]; - unsigned int gate_ip_leftbus; - unsigned char res7[0x1fc]; - unsigned int clkout_leftbus; - unsigned int clkout_leftbus_div_stat; - unsigned char res8[0x37f8]; - unsigned int src_rightbus; - unsigned char res9[0x1fc]; - unsigned int mux_stat_rightbus; - unsigned char res10[0xfc]; - unsigned int div_rightbus; - unsigned char res11[0xfc]; - unsigned int div_stat_rightbus; - unsigned char res12[0x1fc]; - unsigned int gate_ip_rightbus; - unsigned char res13[0x1fc]; - unsigned int clkout_rightbus; - unsigned int clkout_rightbus_div_stat; - unsigned char res14[0x3608]; - unsigned int epll_lock; - unsigned char res15[0xc]; - unsigned int vpll_lock; - unsigned char res16[0xec]; - unsigned int epll_con0; - unsigned int epll_con1; - unsigned char res17[0x8]; - unsigned int vpll_con0; - unsigned int vpll_con1; - unsigned char res18[0xe8]; - unsigned int src_top0; - unsigned int src_top1; - unsigned char res19[0x8]; - unsigned int src_cam; - unsigned int src_tv; - unsigned int src_mfc; - unsigned int src_g3d; - unsigned int src_image; - unsigned int src_lcd0; - unsigned int src_lcd1; - unsigned int src_maudio; - unsigned int src_fsys; - unsigned char res20[0xc]; - unsigned int src_peril0; - unsigned int src_peril1; - unsigned char res21[0xb8]; - unsigned int src_mask_top; - unsigned char res22[0xc]; - unsigned int src_mask_cam; - unsigned int src_mask_tv; - unsigned char res23[0xc]; - unsigned int src_mask_lcd0; - unsigned int src_mask_lcd1; - unsigned int src_mask_maudio; - unsigned int src_mask_fsys; - unsigned char res24[0xc]; - unsigned int src_mask_peril0; - unsigned int src_mask_peril1; - unsigned char res25[0xb8]; - unsigned int mux_stat_top; - unsigned char res26[0x14]; - unsigned int mux_stat_mfc; - unsigned int mux_stat_g3d; - unsigned int mux_stat_image; - unsigned char res27[0xdc]; - unsigned int div_top; - unsigned char res28[0xc]; - unsigned int div_cam; - unsigned int div_tv; - unsigned int div_mfc; - unsigned int div_g3d; - unsigned int div_image; - unsigned int div_lcd0; - unsigned int div_lcd1; - unsigned int div_maudio; - unsigned int div_fsys0; - unsigned int div_fsys1; - unsigned int div_fsys2; - unsigned int div_fsys3; - unsigned int div_peril0; - unsigned int div_peril1; - unsigned int div_peril2; - unsigned int div_peril3; - unsigned int div_peril4; - unsigned int div_peril5; - unsigned char res29[0x18]; - unsigned int div2_ratio; - unsigned char res30[0x8c]; - unsigned int div_stat_top; - unsigned char res31[0xc]; - unsigned int div_stat_cam; - unsigned int div_stat_tv; - unsigned int div_stat_mfc; - unsigned int div_stat_g3d; - unsigned int div_stat_image; - unsigned int div_stat_lcd0; - unsigned int div_stat_lcd1; - unsigned int div_stat_maudio; - unsigned int div_stat_fsys0; - unsigned int div_stat_fsys1; - unsigned int div_stat_fsys2; - unsigned int div_stat_fsys3; - unsigned int div_stat_peril0; - unsigned int div_stat_peril1; - unsigned int div_stat_peril2; - unsigned int div_stat_peril3; - unsigned int div_stat_peril4; - unsigned int div_stat_peril5; - unsigned char res32[0x18]; - unsigned int div2_stat; - unsigned char res33[0x29c]; - unsigned int gate_ip_cam; - unsigned int gate_ip_tv; - unsigned int gate_ip_mfc; - unsigned int gate_ip_g3d; - unsigned int gate_ip_image; - unsigned int gate_ip_lcd0; - unsigned int gate_ip_lcd1; - unsigned char res34[0x4]; - unsigned int gate_ip_fsys; - unsigned char res35[0x8]; - unsigned int gate_ip_gps; - unsigned int gate_ip_peril; - unsigned char res36[0xc]; - unsigned int gate_ip_perir; - unsigned char res37[0xc]; - unsigned int gate_block; - unsigned char res38[0x8c]; - unsigned int clkout_cmu_top; - unsigned int clkout_cmu_top_div_stat; - unsigned char res39[0x37f8]; - unsigned int src_dmc; - unsigned char res40[0xfc]; - unsigned int src_mask_dmc; - unsigned char res41[0xfc]; - unsigned int mux_stat_dmc; - unsigned char res42[0xfc]; - unsigned int div_dmc0; - unsigned int div_dmc1; - unsigned char res43[0xf8]; - unsigned int div_stat_dmc0; - unsigned int div_stat_dmc1; - unsigned char res44[0x2f8]; - unsigned int gate_ip_dmc; - unsigned char res45[0xfc]; - unsigned int clkout_cmu_dmc; - unsigned int clkout_cmu_dmc_div_stat; - unsigned char res46[0x5f8]; - unsigned int dcgidx_map0; - unsigned int dcgidx_map1; - unsigned int dcgidx_map2; - unsigned char res47[0x14]; - unsigned int dcgperf_map0; - unsigned int dcgperf_map1; - unsigned char res48[0x18]; - unsigned int dvcidx_map; - unsigned char res49[0x1c]; - unsigned int freq_cpu; - unsigned int freq_dpm; - unsigned char res50[0x18]; - unsigned int dvsemclk_en; - unsigned int maxperf; - unsigned char res51[0x2f78]; - unsigned int apll_lock; - unsigned char res52[0x4]; - unsigned int mpll_lock; - unsigned char res53[0xf4]; - unsigned int apll_con0; - unsigned int apll_con1; - unsigned int mpll_con0; - unsigned int mpll_con1; - unsigned char res54[0xf0]; - unsigned int src_cpu; - unsigned char res55[0x1fc]; - unsigned int mux_stat_cpu; - unsigned char res56[0xfc]; - unsigned int div_cpu0; - unsigned int div_cpu1; - unsigned char res57[0xf8]; - unsigned int div_stat_cpu0; - unsigned int div_stat_cpu1; - unsigned char res58[0x3f8]; - unsigned int clkout_cmu_cpu; - unsigned int clkout_cmu_cpu_div_stat; - unsigned char res59[0x5f8]; - unsigned int armclk_stopctrl; - unsigned int atclk_stopctrl; - unsigned char res60[0x8]; - unsigned int parityfail_status; - unsigned int parityfail_clear; - unsigned char res61[0xe8]; - unsigned int apll_con0_l8; - unsigned int apll_con0_l7; - unsigned int apll_con0_l6; - unsigned int apll_con0_l5; - unsigned int apll_con0_l4; - unsigned int apll_con0_l3; - unsigned int apll_con0_l2; - unsigned int apll_con0_l1; - unsigned int iem_control; - unsigned char res62[0xdc]; - unsigned int apll_con1_l8; - unsigned int apll_con1_l7; - unsigned int apll_con1_l6; - unsigned int apll_con1_l5; - unsigned int apll_con1_l4; - unsigned int apll_con1_l3; - unsigned int apll_con1_l2; - unsigned int apll_con1_l1; - unsigned char res63[0xe0]; - unsigned int div_iem_l8; - unsigned int div_iem_l7; - unsigned int div_iem_l6; - unsigned int div_iem_l5; - unsigned int div_iem_l4; - unsigned int div_iem_l3; - unsigned int div_iem_l2; - unsigned int div_iem_l1; -}; -#endif - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h b/arch/arm/include/asm/arch-s5pc2xx/cpu.h deleted file mode 100644 index d56ee80..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/cpu.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * (C) Copyright 2010 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _S5PC2XX_CPU_H -#define _S5PC2XX_CPU_H - -#define S5PC2XX_ADDR_BASE 0x10000000 - -/* S5PC210 */ -#define S5PC210_GPIO_PART3_BASE 0x03860000 -#define S5PC210_PRO_ID 0x10000000 -#define S5PC210_POWER_BASE 0x10020000 -#define S5PC210_SWRESET 0x10020400 -#define S5PC210_CLOCK_BASE 0x10030000 -#define S5PC210_SYSTIMER_BASE 0x10050000 -#define S5PC210_WATCHDOG_BASE 0x10060000 -#define S5PC210_MIU_BASE 0x10600000 -#define S5PC210_DMC0_BASE 0x10400000 -#define S5PC210_DMC1_BASE 0x10410000 -#define S5PC210_GPIO_PART2_BASE 0x11000000 -#define S5PC210_GPIO_PART1_BASE 0x11400000 -#define S5PC210_FIMD_BASE 0x11C00000 -#define S5PC210_USBOTG_BASE 0x12480000 -#define S5PC210_MMC_BASE 0x12510000 -#define S5PC210_SROMC_BASE 0x12570000 -#define S5PC210_USBPHY_BASE 0x125B0000 -#define S5PC210_UART_BASE 0x13800000 -#define S5PC210_ADC_BASE 0x13910000 -#define S5PC210_PWMTIMER_BASE 0x139D0000 -#define S5PC210_MODEM_BASE 0x13A00000 - -#ifndef __ASSEMBLY__ -#include <asm/io.h> -/* CPU detection macros */ -extern unsigned int s5p_cpu_id; - -static inline void s5p_set_cpu_id(void) -{ - s5p_cpu_id = readl(S5PC210_PRO_ID); - s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)); - - /* - * 0xC200: S5PC210 EVT0 - * 0xC210: S5PC210 EVT1 - */ - if (s5p_cpu_id == 0xC200) - s5p_cpu_id |= 0x10; -} - -#define IS_SAMSUNG_TYPE(type, id) \ -static inline int cpu_is_##type(void) \ -{ \ - return s5p_cpu_id == id ? 1 : 0; \ -} - -IS_SAMSUNG_TYPE(s5pc210, 0xc210) - -#define SAMSUNG_BASE(device, base) \ -static inline unsigned int samsung_get_base_##device(void) \ -{ \ - if (cpu_is_s5pc210()) \ - return S5PC210_##base; \ - else \ - return 0; \ -} - -SAMSUNG_BASE(adc, ADC_BASE) -SAMSUNG_BASE(clock, CLOCK_BASE) -SAMSUNG_BASE(fimd, FIMD_BASE) -SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE) -SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE) -SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE) -SAMSUNG_BASE(pro_id, PRO_ID) -SAMSUNG_BASE(mmc, MMC_BASE) -SAMSUNG_BASE(modem, MODEM_BASE) -SAMSUNG_BASE(sromc, SROMC_BASE) -SAMSUNG_BASE(swreset, SWRESET) -SAMSUNG_BASE(timer, PWMTIMER_BASE) -SAMSUNG_BASE(uart, UART_BASE) -SAMSUNG_BASE(usb_phy, USBPHY_BASE) -SAMSUNG_BASE(usb_otg, USBOTG_BASE) -SAMSUNG_BASE(watchdog, WATCHDOG_BASE) -#endif - -#endif /* _S5PC2XX_CPU_H */ diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-s5pc2xx/gpio.h deleted file mode 100644 index 05e5b3e..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * (C) Copyright 2010 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#ifndef __ASSEMBLY__ -struct s5p_gpio_bank { - unsigned int con; - unsigned int dat; - unsigned int pull; - unsigned int drv; - unsigned int pdn_con; - unsigned int pdn_pull; - unsigned char res1[8]; -}; - -struct s5pc210_gpio_part1 { - struct s5p_gpio_bank a0; - struct s5p_gpio_bank a1; - struct s5p_gpio_bank b; - struct s5p_gpio_bank c0; - struct s5p_gpio_bank c1; - struct s5p_gpio_bank d0; - struct s5p_gpio_bank d1; - struct s5p_gpio_bank e0; - struct s5p_gpio_bank e1; - struct s5p_gpio_bank e2; - struct s5p_gpio_bank e3; - struct s5p_gpio_bank e4; - struct s5p_gpio_bank f0; - struct s5p_gpio_bank f1; - struct s5p_gpio_bank f2; - struct s5p_gpio_bank f3; -}; - -struct s5pc210_gpio_part2 { - struct s5p_gpio_bank j0; - struct s5p_gpio_bank j1; - struct s5p_gpio_bank k0; - struct s5p_gpio_bank k1; - struct s5p_gpio_bank k2; - struct s5p_gpio_bank k3; - struct s5p_gpio_bank l0; - struct s5p_gpio_bank l1; - struct s5p_gpio_bank l2; - struct s5p_gpio_bank y0; - struct s5p_gpio_bank y1; - struct s5p_gpio_bank y2; - struct s5p_gpio_bank y3; - struct s5p_gpio_bank y4; - struct s5p_gpio_bank y5; - struct s5p_gpio_bank y6; - struct s5p_gpio_bank res1[80]; - struct s5p_gpio_bank x0; - struct s5p_gpio_bank x1; - struct s5p_gpio_bank x2; - struct s5p_gpio_bank x3; -}; - -struct s5pc210_gpio_part3 { - struct s5p_gpio_bank z; -}; - -/* functions */ -void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); -void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); -void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); -void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en); -unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio); -void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); -void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); -void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); -#endif - -/* Pin configurations */ -#define GPIO_INPUT 0x0 -#define GPIO_OUTPUT 0x1 -#define GPIO_IRQ 0xf -#define GPIO_FUNC(x) (x) - -/* Pull mode */ -#define GPIO_PULL_NONE 0x0 -#define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 - -/* Drive Strength level */ -#define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 -#define GPIO_DRV_4X 0x3 -#define GPIO_DRV_FAST 0x0 -#define GPIO_DRV_SLOW 0x1 - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-s5pc2xx/mmc.h deleted file mode 100644 index 528150d..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/mmc.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * (C) Copyright 2009 SAMSUNG Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_MMC_H_ -#define __ASM_ARCH_MMC_H_ - -#ifndef __ASSEMBLY__ -struct s5p_mmc { - unsigned int sysad; - unsigned short blksize; - unsigned short blkcnt; - unsigned int argument; - unsigned short trnmod; - unsigned short cmdreg; - unsigned int rspreg0; - unsigned int rspreg1; - unsigned int rspreg2; - unsigned int rspreg3; - unsigned int bdata; - unsigned int prnsts; - unsigned char hostctl; - unsigned char pwrcon; - unsigned char blkgap; - unsigned char wakcon; - unsigned short clkcon; - unsigned char timeoutcon; - unsigned char swrst; - unsigned int norintsts; /* errintsts */ - unsigned int norintstsen; /* errintstsen */ - unsigned int norintsigen; /* errintsigen */ - unsigned short acmd12errsts; - unsigned char res1[2]; - unsigned int capareg; - unsigned char res2[4]; - unsigned int maxcurr; - unsigned char res3[0x34]; - unsigned int control2; - unsigned int control3; - unsigned int control4; - unsigned char res4[0x6e]; - unsigned short hcver; - unsigned char res5[0xFF02]; -}; - -struct mmc_host { - struct s5p_mmc *reg; - unsigned int version; /* SDHCI spec. version */ - unsigned int clock; /* Current clock (MHz) */ -}; - -int s5p_mmc_init(int dev_index, int bus_width); - -#endif /* __ASSEMBLY__ */ -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-s5pc2xx/pwm.h deleted file mode 100644 index 0369968..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/pwm.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2009 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * Minkyu Kang <mk7.kang@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_PWM_H_ -#define __ASM_ARM_ARCH_PWM_H_ - -/* Interval mode(Auto Reload) of PWM Timer 4 */ -#define TCON4_AUTO_RELOAD (1 << 22) -/* Update TCNTB4 */ -#define TCON4_UPDATE (1 << 21) -/* start bit of PWM Timer 4 */ -#define TCON4_START (1 << 20) - -#ifndef __ASSEMBLY__ -struct s5p_timer { - unsigned int tcfg0; - unsigned int tcfg1; - unsigned int tcon; - unsigned int tcntb0; - unsigned int tcmpb0; - unsigned int tcnto0; - unsigned int tcntb1; - unsigned int tcmpb1; - unsigned int tcnto1; - unsigned int tcntb2; - unsigned int tcmpb2; - unsigned int tcnto2; - unsigned int tcntb3; - unsigned int res1; - unsigned int tcnto3; - unsigned int tcntb4; - unsigned int tcnto4; - unsigned int tintcstat; -}; -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h b/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h deleted file mode 100644 index 11f1636..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electrnoics - * Minkyu Kang <mk7.kang@samsung.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -u32 get_device_type(void); -void invalidate_dcache(u32); -void l2_cache_disable(void); -void l2_cache_enable(void); - -#endif diff --git a/arch/arm/include/asm/arch-s5pc2xx/uart.h b/arch/arm/include/asm/arch-s5pc2xx/uart.h deleted file mode 100644 index 6cc68df..0000000 --- a/arch/arm/include/asm/arch-s5pc2xx/uart.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Heungjun Kim <riverful.kim@samsung.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_UART_H_ -#define __ASM_ARCH_UART_H_ - -#ifndef __ASSEMBLY__ -/* baudrate rest value */ -union br_rest { - unsigned short slot; /* udivslot */ - unsigned char value; /* ufracval */ -}; - -struct s5p_uart { - unsigned int ulcon; - unsigned int ucon; - unsigned int ufcon; - unsigned int umcon; - unsigned int utrstat; - unsigned int uerstat; - unsigned int ufstat; - unsigned int umstat; - unsigned char utxh; - unsigned char res1[3]; - unsigned char urxh; - unsigned char res2[3]; - unsigned int ubrdiv; - union br_rest rest; - unsigned char res3[0xffd0]; -}; - -static inline int s5p_uart_divslot(void) -{ - return 0; -} - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/arch-sa1100/bitfield.h b/arch/arm/include/asm/arch-sa1100/bitfield.h deleted file mode 100644 index 104a21c..0000000 --- a/arch/arm/include/asm/arch-sa1100/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/arch-spear/hardware.h b/arch/arm/include/asm/arch-spear/hardware.h deleted file mode 100644 index 818f36c..0000000 --- a/arch/arm/include/asm/arch-spear/hardware.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _ASM_ARCH_HARDWARE_H -#define _ASM_ARCH_HARDWARE_H - -#define CONFIG_SYS_USBD_BASE (0xE1100000) -#define CONFIG_SYS_PLUG_BASE (0xE1200000) -#define CONFIG_SYS_FIFO_BASE (0xE1000800) -#define CONFIG_SYS_SMI_BASE (0xFC000000) -#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) -#define CONFIG_SPEAR_TIMERBASE (0xFC800000) -#define CONFIG_SPEAR_MISCBASE (0xFCA80000) - -#define CONFIG_SYS_NAND_CLE (1 << 16) -#define CONFIG_SYS_NAND_ALE (1 << 17) - -#if defined(CONFIG_SPEAR600) -#define CONFIG_SYS_I2C_BASE (0xD0200000) -#define CONFIG_SPEAR_FSMCBASE (0xD1800000) - -#elif defined(CONFIG_SPEAR300) -#define CONFIG_SYS_I2C_BASE (0xD0180000) -#define CONFIG_SPEAR_FSMCBASE (0x94000000) - -#elif defined(CONFIG_SPEAR310) -#define CONFIG_SYS_I2C_BASE (0xD0180000) -#define CONFIG_SPEAR_FSMCBASE (0x44000000) - -#undef CONFIG_SYS_NAND_CLE -#undef CONFIG_SYS_NAND_ALE -#define CONFIG_SYS_NAND_CLE (1 << 17) -#define CONFIG_SYS_NAND_ALE (1 << 16) - -#define CONFIG_SPEAR_EMIBASE (0x4F000000) -#define CONFIG_SPEAR_RASBASE (0xB4000000) - -#elif defined(CONFIG_SPEAR320) -#define CONFIG_SYS_I2C_BASE (0xD0180000) -#define CONFIG_SPEAR_FSMCBASE (0x4C000000) - -#define CONFIG_SPEAR_EMIBASE (0x40000000) -#define CONFIG_SPEAR_RASBASE (0xB3000000) - -#endif -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-spear/spr_defs.h b/arch/arm/include/asm/arch-spear/spr_defs.h deleted file mode 100644 index fa8412c..0000000 --- a/arch/arm/include/asm/arch-spear/spr_defs.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __SPR_DEFS_H__ -#define __SPR_DEFS_H__ - -extern int spear_board_init(ulong); -extern void setfreq(unsigned int, unsigned int); -extern unsigned int setfreq_sz; - -struct chip_data { - int cpufreq; - int dramfreq; - int dramtype; - uchar version[32]; -}; - -/* HW mac id in i2c memory definitions */ -#define MAGIC_OFF 0x0 -#define MAGIC_LEN 0x2 -#define MAGIC_BYTE0 0x55 -#define MAGIC_BYTE1 0xAA -#define MAC_OFF 0x2 -#define MAC_LEN 0x6 - -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_emi.h b/arch/arm/include/asm/arch-spear/spr_emi.h deleted file mode 100644 index c1f1c2a..0000000 --- a/arch/arm/include/asm/arch-spear/spr_emi.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2009 - * Ryan CHEN, ST Micoelectronics, ryan.chen@st.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __SPEAR_EMI_H__ -#define __SPEAR_EMI_H__ - -#ifdef CONFIG_SPEAR_EMI - -struct emi_bank_regs { - u32 tap; - u32 tsdp; - u32 tdpw; - u32 tdpr; - u32 tdcs; - u32 control; -}; - -struct emi_regs { - struct emi_bank_regs bank_regs[CONFIG_SYS_MAX_FLASH_BANKS]; - u32 tout; - u32 ack; - u32 irq; -}; - -#define EMI_ACKMSK 0x40 - -/* control register definitions */ -#define EMI_CNTL_ENBBYTEW (1 << 2) -#define EMI_CNTL_ENBBYTER (1 << 3) -#define EMI_CNTL_ENBBYTERW (EMI_CNTL_ENBBYTER | EMI_CNTL_ENBBYTEW) - -#endif - -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_gpt.h b/arch/arm/include/asm/arch-spear/spr_gpt.h deleted file mode 100644 index 965b5ab..0000000 --- a/arch/arm/include/asm/arch-spear/spr_gpt.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SPR_GPT_H -#define _SPR_GPT_H - -struct gpt_regs { - u8 reserved[0x80]; - u32 control; - u32 status; - u32 compare; - u32 count; - u32 capture_re; - u32 capture_fe; -}; - -/* - * TIMER_CONTROL register settings - */ - -#define GPT_PRESCALER_MASK 0x000F -#define GPT_PRESCALER_1 0x0000 -#define GPT_PRESCALER_2 0x0001 -#define GPT_PRESCALER_4 0x0002 -#define GPT_PRESCALER_8 0x0003 -#define GPT_PRESCALER_16 0x0004 -#define GPT_PRESCALER_32 0x0005 -#define GPT_PRESCALER_64 0x0006 -#define GPT_PRESCALER_128 0x0007 -#define GPT_PRESCALER_256 0x0008 - -#define GPT_MODE_SINGLE_SHOT 0x0010 -#define GPT_MODE_AUTO_RELOAD 0x0000 - -#define GPT_ENABLE 0x0020 - -#define GPT_CAPT_MODE_MASK 0x00C0 -#define GPT_CAPT_MODE_NONE 0x0000 -#define GPT_CAPT_MODE_RE 0x0040 -#define GPT_CAPT_MODE_FE 0x0080 -#define GPT_CAPT_MODE_BOTH 0x00C0 - -#define GPT_INT_MATCH 0x0100 -#define GPT_INT_FE 0x0200 -#define GPT_INT_RE 0x0400 - -/* - * TIMER_STATUS register settings - */ - -#define GPT_STS_MATCH 0x0001 -#define GPT_STS_FE 0x0002 -#define GPT_STS_RE 0x0004 - -/* - * TIMER_COMPARE register settings - */ - -#define GPT_FREE_RUNNING 0xFFFF - -/* Timer, HZ specific defines */ -#define CONFIG_SPEAR_HZ (1000) -#define CONFIG_SPEAR_HZ_CLOCK (8300000) - -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_i2c.h b/arch/arm/include/asm/arch-spear/spr_i2c.h deleted file mode 100644 index 7521ebc..0000000 --- a/arch/arm/include/asm/arch-spear/spr_i2c.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __SPR_I2C_H_ -#define __SPR_I2C_H_ - -struct i2c_regs { - u32 ic_con; - u32 ic_tar; - u32 ic_sar; - u32 ic_hs_maddr; - u32 ic_cmd_data; - u32 ic_ss_scl_hcnt; - u32 ic_ss_scl_lcnt; - u32 ic_fs_scl_hcnt; - u32 ic_fs_scl_lcnt; - u32 ic_hs_scl_hcnt; - u32 ic_hs_scl_lcnt; - u32 ic_intr_stat; - u32 ic_intr_mask; - u32 ic_raw_intr_stat; - u32 ic_rx_tl; - u32 ic_tx_tl; - u32 ic_clr_intr; - u32 ic_clr_rx_under; - u32 ic_clr_rx_over; - u32 ic_clr_tx_over; - u32 ic_clr_rd_req; - u32 ic_clr_tx_abrt; - u32 ic_clr_rx_done; - u32 ic_clr_activity; - u32 ic_clr_stop_det; - u32 ic_clr_start_det; - u32 ic_clr_gen_call; - u32 ic_enable; - u32 ic_status; - u32 ic_txflr; - u32 ix_rxflr; - u32 reserved_1; - u32 ic_tx_abrt_source; -}; - -#define IC_CLK 166 -#define NANO_TO_MICRO 1000 - -/* High and low times in different speed modes (in ns) */ -#define MIN_SS_SCL_HIGHTIME 4000 -#define MIN_SS_SCL_LOWTIME 5000 -#define MIN_FS_SCL_HIGHTIME 800 -#define MIN_FS_SCL_LOWTIME 1700 -#define MIN_HS_SCL_HIGHTIME 60 -#define MIN_HS_SCL_LOWTIME 160 - -/* Worst case timeout for 1 byte is kept as 2ms */ -#define I2C_BYTE_TO (CONFIG_SYS_HZ/500) -#define I2C_STOPDET_TO (CONFIG_SYS_HZ/500) -#define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16) - -/* i2c control register definitions */ -#define IC_CON_SD 0x0040 -#define IC_CON_RE 0x0020 -#define IC_CON_10BITADDRMASTER 0x0010 -#define IC_CON_10BITADDR_SLAVE 0x0008 -#define IC_CON_SPD_MSK 0x0006 -#define IC_CON_SPD_SS 0x0002 -#define IC_CON_SPD_FS 0x0004 -#define IC_CON_SPD_HS 0x0006 -#define IC_CON_MM 0x0001 - -/* i2c target address register definitions */ -#define TAR_ADDR 0x0050 - -/* i2c slave address register definitions */ -#define IC_SLAVE_ADDR 0x0002 - -/* i2c data buffer and command register definitions */ -#define IC_CMD 0x0100 - -/* i2c interrupt status register definitions */ -#define IC_GEN_CALL 0x0800 -#define IC_START_DET 0x0400 -#define IC_STOP_DET 0x0200 -#define IC_ACTIVITY 0x0100 -#define IC_RX_DONE 0x0080 -#define IC_TX_ABRT 0x0040 -#define IC_RD_REQ 0x0020 -#define IC_TX_EMPTY 0x0010 -#define IC_TX_OVER 0x0008 -#define IC_RX_FULL 0x0004 -#define IC_RX_OVER 0x0002 -#define IC_RX_UNDER 0x0001 - -/* fifo threshold register definitions */ -#define IC_TL0 0x00 -#define IC_TL1 0x01 -#define IC_TL2 0x02 -#define IC_TL3 0x03 -#define IC_TL4 0x04 -#define IC_TL5 0x05 -#define IC_TL6 0x06 -#define IC_TL7 0x07 -#define IC_RX_TL IC_TL0 -#define IC_TX_TL IC_TL0 - -/* i2c enable register definitions */ -#define IC_ENABLE_0B 0x0001 - -/* i2c status register definitions */ -#define IC_STATUS_SA 0x0040 -#define IC_STATUS_MA 0x0020 -#define IC_STATUS_RFF 0x0010 -#define IC_STATUS_RFNE 0x0008 -#define IC_STATUS_TFE 0x0004 -#define IC_STATUS_TFNF 0x0002 -#define IC_STATUS_ACT 0x0001 - -/* Speed Selection */ -#define IC_SPEED_MODE_STANDARD 1 -#define IC_SPEED_MODE_FAST 2 -#define IC_SPEED_MODE_MAX 3 - -#define I2C_MAX_SPEED 3400000 -#define I2C_FAST_SPEED 400000 -#define I2C_STANDARD_SPEED 100000 - -#endif /* __SPR_I2C_H_ */ diff --git a/arch/arm/include/asm/arch-spear/spr_misc.h b/arch/arm/include/asm/arch-spear/spr_misc.h deleted file mode 100644 index 8b96d9b..0000000 --- a/arch/arm/include/asm/arch-spear/spr_misc.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SPR_MISC_H -#define _SPR_MISC_H - -struct misc_regs { - u32 auto_cfg_reg; /* 0x0 */ - u32 armdbg_ctr_reg; /* 0x4 */ - u32 pll1_cntl; /* 0x8 */ - u32 pll1_frq; /* 0xc */ - u32 pll1_mod; /* 0x10 */ - u32 pll2_cntl; /* 0x14 */ - u32 pll2_frq; /* 0x18 */ - u32 pll2_mod; /* 0x1C */ - u32 pll_ctr_reg; /* 0x20 */ - u32 amba_clk_cfg; /* 0x24 */ - u32 periph_clk_cfg; /* 0x28 */ - u32 periph1_clken; /* 0x2C */ - u32 periph2_clken; /* 0x30 */ - u32 ras_clken; /* 0x34 */ - u32 periph1_rst; /* 0x38 */ - u32 periph2_rst; /* 0x3C */ - u32 ras_rst; /* 0x40 */ - u32 prsc1_clk_cfg; /* 0x44 */ - u32 prsc2_clk_cfg; /* 0x48 */ - u32 prsc3_clk_cfg; /* 0x4C */ - u32 amem_cfg_ctrl; /* 0x50 */ - u32 port_cfg_ctrl; /* 0x54 */ - u32 reserved_1; /* 0x58 */ - u32 clcd_synth_clk; /* 0x5C */ - u32 irda_synth_clk; /* 0x60 */ - u32 uart_synth_clk; /* 0x64 */ - u32 gmac_synth_clk; /* 0x68 */ - u32 ras_synth1_clk; /* 0x6C */ - u32 ras_synth2_clk; /* 0x70 */ - u32 ras_synth3_clk; /* 0x74 */ - u32 ras_synth4_clk; /* 0x78 */ - u32 arb_icm_ml1; /* 0x7C */ - u32 arb_icm_ml2; /* 0x80 */ - u32 arb_icm_ml3; /* 0x84 */ - u32 arb_icm_ml4; /* 0x88 */ - u32 arb_icm_ml5; /* 0x8C */ - u32 arb_icm_ml6; /* 0x90 */ - u32 arb_icm_ml7; /* 0x94 */ - u32 arb_icm_ml8; /* 0x98 */ - u32 arb_icm_ml9; /* 0x9C */ - u32 dma_src_sel; /* 0xA0 */ - u32 uphy_ctr_reg; /* 0xA4 */ - u32 gmac_ctr_reg; /* 0xA8 */ - u32 port_bridge_ctrl; /* 0xAC */ - u32 reserved_2[4]; /* 0xB0--0xBC */ - u32 prc1_ilck_ctrl_reg; /* 0xC0 */ - u32 prc2_ilck_ctrl_reg; /* 0xC4 */ - u32 prc3_ilck_ctrl_reg; /* 0xC8 */ - u32 prc4_ilck_ctrl_reg; /* 0xCC */ - u32 prc1_intr_ctrl_reg; /* 0xD0 */ - u32 prc2_intr_ctrl_reg; /* 0xD4 */ - u32 prc3_intr_ctrl_reg; /* 0xD8 */ - u32 prc4_intr_ctrl_reg; /* 0xDC */ - u32 powerdown_cfg_reg; /* 0xE0 */ - u32 ddr_1v8_compensation; /* 0xE4 */ - u32 ddr_2v5_compensation; /* 0xE8 */ - u32 core_3v3_compensation; /* 0xEC */ - u32 ddr_pad; /* 0xF0 */ - u32 bist1_ctr_reg; /* 0xF4 */ - u32 bist2_ctr_reg; /* 0xF8 */ - u32 bist3_ctr_reg; /* 0xFC */ - u32 bist4_ctr_reg; /* 0x100 */ - u32 bist5_ctr_reg; /* 0x104 */ - u32 bist1_rslt_reg; /* 0x108 */ - u32 bist2_rslt_reg; /* 0x10C */ - u32 bist3_rslt_reg; /* 0x110 */ - u32 bist4_rslt_reg; /* 0x114 */ - u32 bist5_rslt_reg; /* 0x118 */ - u32 syst_error_reg; /* 0x11C */ - u32 reserved_3[0x1FB8]; /* 0x120--0x7FFC */ - u32 ras_gpp1_in; /* 0x8000 */ - u32 ras_gpp2_in; /* 0x8004 */ - u32 ras_gpp1_out; /* 0x8008 */ - u32 ras_gpp2_out; /* 0x800C */ -}; - -/* AUTO_CFG_REG value */ -#define MISC_SOCCFGMSK 0x0000003F -#define MISC_SOCCFG30 0x0000000C -#define MISC_SOCCFG31 0x0000000D -#define MISC_NANDDIS 0x00020000 - -/* PERIPH_CLK_CFG value */ -#define MISC_GPT3SYNTH 0x00000400 -#define MISC_GPT4SYNTH 0x00000800 - -/* PRSC_CLK_CFG value */ -/* - * Fout = Fin / (2^(N+1) * (M + 1)) - */ -#define MISC_PRSC_N_1 0x00001000 -#define MISC_PRSC_M_9 0x00000009 -#define MISC_PRSC_N_4 0x00004000 -#define MISC_PRSC_M_399 0x0000018F -#define MISC_PRSC_N_6 0x00006000 -#define MISC_PRSC_M_2593 0x00000A21 -#define MISC_PRSC_M_124 0x0000007C -#define MISC_PRSC_CFG (MISC_PRSC_N_1 | MISC_PRSC_M_9) - -/* PERIPH1_CLKEN, PERIPH1_RST value */ -#define MISC_USBDENB 0x01000000 - -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_nand.h b/arch/arm/include/asm/arch-spear/spr_nand.h deleted file mode 100644 index 2b63dc7..0000000 --- a/arch/arm/include/asm/arch-spear/spr_nand.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __SPR_NAND_H__ -#define __SPR_NAND_H__ - -struct fsmc_regs { - u32 reserved_1[0x10]; - u32 genmemctrl_pc; - u32 reserved_2; - u32 genmemctrl_comm; - u32 genmemctrl_attrib; - u32 reserved_3; - u32 genmemctrl_ecc; -}; - -/* genmemctrl_pc register definitions */ -#define FSMC_RESET (1 << 0) -#define FSMC_WAITON (1 << 1) -#define FSMC_ENABLE (1 << 2) -#define FSMC_DEVTYPE_NAND (1 << 3) -#define FSMC_DEVWID_8 (0 << 4) -#define FSMC_DEVWID_16 (1 << 4) -#define FSMC_ECCEN (1 << 6) -#define FSMC_ECCPLEN_512 (0 << 7) -#define FSMC_ECCPLEN_256 (1 << 7) -#define FSMC_TCLR_1 (1 << 9) -#define FSMC_TAR_1 (1 << 13) - -/* genmemctrl_comm register definitions */ -#define FSMC_TSET_0 (0 << 0) -#define FSMC_TWAIT_6 (6 << 8) -#define FSMC_THOLD_4 (4 << 16) -#define FSMC_THIZ_1 (1 << 24) - -extern int spear_nand_init(struct nand_chip *nand); -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_smi.h b/arch/arm/include/asm/arch-spear/spr_smi.h deleted file mode 100644 index 06df745..0000000 --- a/arch/arm/include/asm/arch-spear/spr_smi.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef SPR_SMI_H -#define SPR_SMI_H - -/* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */ -/* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */ - -#define FLASH_START_ADDRESS CONFIG_SYS_FLASH_BASE -#define FLASH_BANK_SIZE CONFIG_SYS_FLASH_BANK_SIZE - -#define SMIBANK0_BASE (FLASH_START_ADDRESS) -#define SMIBANK1_BASE (SMIBANK0_BASE + FLASH_BANK_SIZE) -#define SMIBANK2_BASE (SMIBANK1_BASE + FLASH_BANK_SIZE) -#define SMIBANK3_BASE (SMIBANK2_BASE + FLASH_BANK_SIZE) - -#define BANK0 0 -#define BANK1 1 -#define BANK2 2 -#define BANK3 3 - -struct smi_regs { - u32 smi_cr1; - u32 smi_cr2; - u32 smi_sr; - u32 smi_tr; - u32 smi_rr; -}; - -/* CONTROL REG 1 */ -#define BANK_EN 0x0000000F /* enables all banks */ -#define DSEL_TIME 0x00000060 /* Deselect time */ -#define PRESCAL5 0x00000500 /* AHB_CK prescaling value */ -#define PRESCALA 0x00000A00 /* AHB_CK prescaling value */ -#define PRESCAL3 0x00000300 /* AHB_CK prescaling value */ -#define PRESCAL4 0x00000400 /* AHB_CK prescaling value */ -#define SW_MODE 0x10000000 /* enables SW Mode */ -#define WB_MODE 0x20000000 /* Write Burst Mode */ -#define FAST_MODE 0x00008000 /* Fast Mode */ -#define HOLD1 0x00010000 - -/* CONTROL REG 2 */ -#define RD_STATUS_REG 0x00000400 /* reads status reg */ -#define WE 0x00000800 /* Write Enable */ -#define BANK0_SEL 0x00000000 /* Select Banck0 */ -#define BANK1_SEL 0x00001000 /* Select Banck1 */ -#define BANK2_SEL 0x00002000 /* Select Banck2 */ -#define BANK3_SEL 0x00003000 /* Select Banck3 */ -#define BANKSEL_SHIFT 12 -#define SEND 0x00000080 /* Send data */ -#define TX_LEN_1 0x00000001 /* data length = 1 byte */ -#define TX_LEN_2 0x00000002 /* data length = 2 byte */ -#define TX_LEN_3 0x00000003 /* data length = 3 byte */ -#define TX_LEN_4 0x00000004 /* data length = 4 byte */ -#define RX_LEN_1 0x00000010 /* data length = 1 byte */ -#define RX_LEN_2 0x00000020 /* data length = 2 byte */ -#define RX_LEN_3 0x00000030 /* data length = 3 byte */ -#define RX_LEN_4 0x00000040 /* data length = 4 byte */ -#define TFIE 0x00000100 /* Tx Flag Interrupt Enable */ -#define WCIE 0x00000200 /* WCF Interrupt Enable */ - -/* STATUS_REG */ -#define INT_WCF_CLR 0xFFFFFDFF /* clear: WCF clear */ -#define INT_TFF_CLR 0xFFFFFEFF /* clear: TFF clear */ -#define WIP_BIT 0x00000001 /* WIP Bit of SPI SR */ -#define WEL_BIT 0x00000002 /* WEL Bit of SPI SR */ -#define RSR 0x00000005 /* Read Status regiser */ -#define TFF 0x00000100 /* Transfer Finished FLag */ -#define WCF 0x00000200 /* Transfer Finished FLag */ -#define ERF1 0x00000400 /* Error Flag 1 */ -#define ERF2 0x00000800 /* Error Flag 2 */ -#define WM0 0x00001000 /* WM Bank 0 */ -#define WM1 0x00002000 /* WM Bank 1 */ -#define WM2 0x00004000 /* WM Bank 2 */ -#define WM3 0x00008000 /* WM Bank 3 */ -#define WM_SHIFT 12 - -/* TR REG */ -#define READ_ID 0x0000009F /* Read Identification */ -#define BULK_ERASE 0x000000C7 /* BULK erase */ -#define SECTOR_ERASE 0x000000D8 /* SECTOR erase */ -#define WRITE_ENABLE 0x00000006 /* Wenable command to FLASH */ - -struct flash_dev { - u32 density; - ulong size; - ushort sector_count; -}; - -#define SFLASH_PAGE_SIZE 0x100 /* flash page size */ -#define XFER_FINISH_TOUT 2 /* xfer finish timeout */ -#define WMODE_TOUT 2 /* write enable timeout */ - -#endif diff --git a/arch/arm/include/asm/arch-spear/spr_syscntl.h b/arch/arm/include/asm/arch-spear/spr_syscntl.h deleted file mode 100644 index 3c92f09..0000000 --- a/arch/arm/include/asm/arch-spear/spr_syscntl.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2009 - * Ryan CHEN, ST Micoelectronics, ryan.chen@st.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -struct syscntl_regs { - u32 scctrl; - u32 scsysstat; - u32 scimctrl; - u32 scimsysstat; - u32 scxtalctrl; - u32 scpllctrl; - u32 scpllfctrl; - u32 scperctrl0; - u32 scperctrl1; - u32 scperen; - u32 scperdis; - const u32 scperclken; - const u32 scperstat; -}; diff --git a/arch/arm/include/asm/arch-spear/spr_xloader_table.h b/arch/arm/include/asm/arch-spear/spr_xloader_table.h deleted file mode 100644 index 7e3da18..0000000 --- a/arch/arm/include/asm/arch-spear/spr_xloader_table.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SPR_XLOADER_TABLE_H -#define _SPR_XLOADER_TABLE_H - -#define XLOADER_TABLE_VERSION_1_1 2 -#define XLOADER_TABLE_VERSION_1_2 3 - -#define XLOADER_TABLE_ADDRESS 0xD2801FF0 - -#define DDRMOBILE 1 -#define DDR2 2 - -#define REV_BA 1 -#define REV_AA 2 -#define REV_AB 3 - -struct xloader_table_1_1 { - unsigned short ddrfreq; - unsigned char ddrsize; - unsigned char ddrtype; - - unsigned char soc_rev; -} __attribute__ ((packed)); - -struct xloader_table_1_2 { - unsigned const char *version; - - unsigned short ddrfreq; - unsigned char ddrsize; - unsigned char ddrtype; - - unsigned char soc_rev; -} __attribute__ ((packed)); - -union table_contents { - struct xloader_table_1_1 table_1_1; - struct xloader_table_1_2 table_1_2; -}; - -struct xloader_table { - unsigned char table_version; - union table_contents table; -} __attribute__ ((packed)); - -#endif diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h b/arch/arm/include/asm/arch-tegra2/clk_rst.h deleted file mode 100644 index 6d573bf..0000000 --- a/arch/arm/include/asm/arch-tegra2/clk_rst.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CLK_RST_H_ -#define _CLK_RST_H_ - -/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ -struct clk_rst_ctlr { - uint crc_rst_src; /* _RST_SOURCE_0, 0x00 */ - uint crc_rst_dev_l; /* _RST_DEVICES_L_0, 0x04 */ - uint crc_rst_dev_h; /* _RST_DEVICES_H_0, 0x08 */ - uint crc_rst_dev_u; /* _RST_DEVICES_U_0, 0x0C */ - uint crc_clk_out_enb_l; /* _CLK_OUT_ENB_L_0, 0x10 */ - uint crc_clk_out_enb_h; /* _CLK_OUT_ENB_H_0, 0x14 */ - uint crc_clk_out_enb_u; /* _CLK_OUT_ENB_U_0, 0x18 */ - uint crc_reserved0; /* reserved_0, 0x1C */ - uint crc_cclk_brst_pol; /* _CCLK_BURST_POLICY_0,0x20 */ - uint crc_super_cclk_div; /* _SUPER_CCLK_DIVIDER_0,0x24 */ - uint crc_sclk_brst_pol; /* _SCLK_BURST_POLICY_0, 0x28 */ - uint crc_super_sclk_div; /* _SUPER_SCLK_DIVIDER_0,0x2C */ - uint crc_clk_sys_rate; /* _CLK_SYSTEM_RATE_0, 0x30 */ - uint crc_prog_dly_clk; /* _PROG_DLY_CLK_0, 0x34 */ - uint crc_aud_sync_clk_rate; /* _AUDIO_SYNC_CLK_RATE_0,0x38 */ - uint crc_reserved1; /* reserved_1, 0x3C */ - uint crc_cop_clk_skip_plcy; /* _COP_CLK_SKIP_POLICY_0,0x40 */ - uint crc_clk_mask_arm; /* _CLK_MASK_ARM_0, 0x44 */ - uint crc_misc_clk_enb; /* _MISC_CLK_ENB_0, 0x48 */ - uint crc_clk_cpu_cmplx; /* _CLK_CPU_CMPLX_0, 0x4C */ - uint crc_osc_ctrl; /* _OSC_CTRL_0, 0x50 */ - uint crc_pll_lfsr; /* _PLL_LFSR_0, 0x54 */ - uint crc_osc_freq_det; /* _OSC_FREQ_DET_0, 0x58 */ - uint crc_osc_freq_det_stat; /* _OSC_FREQ_DET_STATUS_0,0x5C */ - uint crc_reserved2[8]; /* reserved_2[8], 0x60-7C */ - - uint crc_pllc_base; /* _PLLC_BASE_0, 0x80 */ - uint crc_pllc_out; /* _PLLC_OUT_0, 0x84 */ - uint crc_reserved3; /* reserved_3, 0x88 */ - uint crc_pllc_misc; /* _PLLC_MISC_0, 0x8C */ - - uint crc_pllm_base; /* _PLLM_BASE_0, 0x90 */ - uint crc_pllm_out; /* _PLLM_OUT_0, 0x94 */ - uint crc_reserved4; /* reserved_4, 0x98 */ - uint crc_pllm_misc; /* _PLLM_MISC_0, 0x9C */ - - uint crc_pllp_base; /* _PLLP_BASE_0, 0xA0 */ - uint crc_pllp_outa; /* _PLLP_OUTA_0, 0xA4 */ - uint crc_pllp_outb; /* _PLLP_OUTB_0, 0xA8 */ - uint crc_pllp_misc; /* _PLLP_MISC_0, 0xAC */ - - uint crc_plla_base; /* _PLLA_BASE_0, 0xB0 */ - uint crc_plla_out; /* _PLLA_OUT_0, 0xB4 */ - uint crc_reserved5; /* reserved_5, 0xB8 */ - uint crc_plla_misc; /* _PLLA_MISC_0, 0xBC */ - - uint crc_pllu_base; /* _PLLU_BASE_0, 0xC0 */ - uint crc_reserved6; /* _reserved_6, 0xC4 */ - uint crc_reserved7; /* _reserved_7, 0xC8 */ - uint crc_pllu_misc; /* _PLLU_MISC_0, 0xCC */ - - uint crc_plld_base; /* _PLLD_BASE_0, 0xD0 */ - uint crc_reserved8; /* _reserved_8, 0xD4 */ - uint crc_reserved9; /* _reserved_9, 0xD8 */ - uint crc_plld_misc; /* _PLLD_MISC_0, 0xDC */ - - uint crc_pllx_base; /* _PLLX_BASE_0, 0xE0 */ - uint crc_pllx_misc; /* _PLLX_MISC_0, 0xE4 */ - - uint crc_plle_base; /* _PLLE_BASE_0, 0xE8 */ - uint crc_plle_misc; /* _PLLE_MISC_0, 0xEC */ - - uint crc_plls_base; /* _PLLS_BASE_0, 0xF0 */ - uint crc_plls_misc; /* _PLLS_MISC_0, 0xF4 */ - uint crc_reserved10; /* _reserved_10, 0xF8 */ - uint crc_reserved11; /* _reserved_11, 0xFC */ - - uint crc_clk_src_i2s1; /*_I2S1_0, 0x100 */ - uint crc_clk_src_i2s2; /*_I2S2_0, 0x104 */ - uint crc_clk_src_spdif_out; /*_SPDIF_OUT_0, 0x108 */ - uint crc_clk_src_spdif_in; /*_SPDIF_IN_0, 0x10C */ - uint crc_clk_src_pwm; /*_PWM_0, 0x110 */ - uint crc_clk_src_spi1; /*_SPI1_0, 0x114 */ - uint crc_clk_src_sbc2; /*_SBC2_0, 0x118 */ - uint crc_clk_src_sbc3; /*_SBC3_0, 0x11C */ - uint crc_clk_src_xio; /*_XIO_0, 0x120 */ - uint crc_clk_src_i2c1; /*_I2C1_0, 0x124 */ - uint crc_clk_src_dvc_i2c; /*_DVC_I2C_0, 0x128 */ - uint crc_clk_src_twc; /*_TWC_0, 0x12C */ - uint crc_reserved12; /* 0x130 */ - uint crc_clk_src_sbc1; /*_SBC1_0, 0x134 */ - uint crc_clk_src_disp1; /*_DISP1_0, 0x138 */ - uint crc_clk_src_disp2; /*_DISP2_0, 0x13C */ - uint crc_clk_src_cve; /*_CVE_0, 0x140 */ - uint crc_clk_src_ide; /*_IDE_0, 0x144 */ - uint crc_clk_src_vi; /*_VI_0, 0x148 */ - uint crc_reserved13; /* 0x14C */ - uint crc_clk_src_sdmmc1; /*_SDMMC1_0, 0x150 */ - uint crc_clk_src_sdmmc2; /*_SDMMC2_0, 0x154 */ - uint crc_clk_src_g3d; /*_G3D_0, 0x158 */ - uint crc_clk_src_g2d; /*_G2D_0, 0x15C */ - uint crc_clk_src_ndflash; /*_NDFLASH_0, 0x160 */ - uint crc_clk_src_sdmmc4; /*_SDMMC4_0, 0x164 */ - uint crc_clk_src_vfir; /*_VFIR_0, 0x168 */ - uint crc_clk_src_epp; /*_EPP_0, 0x16C */ - uint crc_clk_src_mp3; /*_MPE_0, 0x170 */ - uint crc_clk_src_mipi; /*_MIPI_0, 0x174 */ - uint crc_clk_src_uarta; /*_UARTA_0, 0x178 */ - uint crc_clk_src_uartb; /*_UARTB_0, 0x17C */ - uint crc_clk_src_host1x; /*_HOST1X_0, 0x180 */ - uint crc_reserved14; /* 0x184 */ - uint crc_clk_src_tvo; /*_TVO_0, 0x188 */ - uint crc_clk_src_hdmi; /*_HDMI_0, 0x18C */ - uint crc_reserved15; /* 0x190 */ - uint crc_clk_src_tvdac; /*_TVDAC_0, 0x194 */ - uint crc_clk_src_i2c2; /*_I2C2_0, 0x198 */ - uint crc_clk_src_emc; /*_EMC_0, 0x19C */ - uint crc_clk_src_uartc; /*_UARTC_0, 0x1A0 */ - uint crc_reserved16; /* 0x1A4 */ - uint crc_clk_src_vi_sensor; /*_VI_SENSOR_0, 0x1A8 */ - uint crc_reserved17; /* 0x1AC */ - uint crc_reserved18; /* 0x1B0 */ - uint crc_clk_src_sbc4; /*_SBC4_0, 0x1B4 */ - uint crc_clk_src_i2c3; /*_I2C3_0, 0x1B8 */ - uint crc_clk_src_sdmmc3; /*_SDMMC3_0, 0x1BC */ - uint crc_clk_src_uartd; /*_UARTD_0, 0x1C0 */ - uint crc_clk_src_uarte; /*_UARTE_0, 0x1C4 */ - uint crc_clk_src_vde; /*_VDE_0, 0x1C8 */ - uint crc_clk_src_owr; /*_OWR_0, 0x1CC */ - uint crc_clk_src_nor; /*_NOR_0, 0x1D0 */ - uint crc_clk_src_csite; /*_CSITE_0, 0x1D4 */ - uint crc_reserved19[9]; /* 0x1D8-1F8 */ - uint crc_clk_src_osc; /*_OSC_0, 0x1FC */ -}; - -#define PLL_BYPASS (1 << 31) -#define PLL_ENABLE (1 << 30) -#define PLL_BASE_OVRRIDE (1 << 28) -#define PLL_DIVP (1 << 20) /* post divider, b22:20 */ -#define PLL_DIVM 0x0C /* input divider, b4:0 */ - -#define SWR_UARTD_RST (1 << 2) -#define CLK_ENB_UARTD (1 << 2) -#define SWR_UARTA_RST (1 << 6) -#define CLK_ENB_UARTA (1 << 6) - -#endif /* CLK_RST_H */ diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra2/pinmux.h deleted file mode 100644 index 8b4bd8d..0000000 --- a/arch/arm/include/asm/arch-tegra2/pinmux.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _PINMUX_H_ -#define _PINMUX_H_ - -/* APB MISC Pin Mux and Tristate (APB_MISC_PP_) registers */ -struct pmux_tri_ctlr { - uint pmt_reserved0; /* ABP_MISC_PP_ reserved offset 00 */ - uint pmt_reserved1; /* ABP_MISC_PP_ reserved offset 04 */ - uint pmt_strap_opt_a; /* _STRAPPING_OPT_A_0, offset 08 */ - uint pmt_reserved2; /* ABP_MISC_PP_ reserved offset 0C */ - uint pmt_reserved3; /* ABP_MISC_PP_ reserved offset 10 */ - uint pmt_tri_a; /* _TRI_STATE_REG_A_0, offset 14 */ - uint pmt_tri_b; /* _TRI_STATE_REG_B_0, offset 18 */ - uint pmt_tri_c; /* _TRI_STATE_REG_C_0, offset 1C */ - uint pmt_tri_d; /* _TRI_STATE_REG_D_0, offset 20 */ - uint pmt_cfg_ctl; /* _CONFIG_CTL_0, offset 24 */ - - uint pmt_reserved[22]; /* ABP_MISC_PP_ reserved offs 28-7C */ - - uint pmt_ctl_a; /* _PIN_MUX_CTL_A_0, offset 80 */ - uint pmt_ctl_b; /* _PIN_MUX_CTL_B_0, offset 84 */ - uint pmt_ctl_c; /* _PIN_MUX_CTL_C_0, offset 88 */ - uint pmt_ctl_d; /* _PIN_MUX_CTL_D_0, offset 8C */ - uint pmt_ctl_e; /* _PIN_MUX_CTL_E_0, offset 90 */ - uint pmt_ctl_f; /* _PIN_MUX_CTL_F_0, offset 94 */ - uint pmt_ctl_g; /* _PIN_MUX_CTL_G_0, offset 98 */ -}; - -#define Z_GMC (1 << 29) -#define Z_IRRX (1 << 20) -#define Z_IRTX (1 << 19) - -#endif /* PINMUX_H */ diff --git a/arch/arm/include/asm/arch-tegra2/pmc.h b/arch/arm/include/asm/arch-tegra2/pmc.h deleted file mode 100644 index 7ec9eeb..0000000 --- a/arch/arm/include/asm/arch-tegra2/pmc.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _PMC_H_ -#define _PMC_H_ - -/* Power Management Controller (APBDEV_PMC_) registers */ -struct pmc_ctlr { - uint pmc_cntrl; /* _CNTRL_0, offset 00 */ - uint pmc_sec_disable; /* _SEC_DISABLE_0, offset 04 */ - uint pmc_pmc_swrst; /* _PMC_SWRST_0, offset 08 */ - uint pmc_wake_mask; /* _WAKE_MASK_0, offset 0C */ - uint pmc_wake_lvl; /* _WAKE_LVL_0, offset 10 */ - uint pmc_wake_status; /* _WAKE_STATUS_0, offset 14 */ - uint pmc_sw_wake_status; /* _SW_WAKE_STATUS_0, offset 18 */ - uint pmc_dpd_pads_oride; /* _DPD_PADS_ORIDE_0, offset 1C */ - uint pmc_dpd_sample; /* _DPD_PADS_SAMPLE_0, offset 20 */ - uint pmc_dpd_enable; /* _DPD_PADS_ENABLE_0, offset 24 */ - uint pmc_pwrgate_timer_off; /* _PWRGATE_TIMER_OFF_0, offset 28 */ - uint pmc_pwrgate_timer_on; /* _PWRGATE_TIMER_ON_0, offset 2C */ - uint pmc_pwrgate_toggle; /* _PWRGATE_TOGGLE_0, offset 30 */ - uint pmc_remove_clamping; /* _REMOVE_CLAMPING_CMD_0, offset 34 */ - uint pmc_pwrgate_status; /* _PWRGATE_STATUS_0, offset 38 */ - uint pmc_pwrgood_timer; /* _PWRGOOD_TIMER_0, offset 3C */ - uint pmc_blink_timer; /* _BLINK_TIMER_0, offset 40 */ - uint pmc_no_iopower; /* _NO_IOPOWER_0, offset 44 */ - uint pmc_pwr_det; /* _PWR_DET_0, offset 48 */ - uint pmc_pwr_det_latch; /* _PWR_DET_LATCH_0, offset 4C */ - - uint pmc_scratch0; /* _SCRATCH0_0, offset 50 */ - uint pmc_scratch1; /* _SCRATCH1_0, offset 54 */ - uint pmc_scratch2; /* _SCRATCH2_0, offset 58 */ - uint pmc_scratch3; /* _SCRATCH3_0, offset 5C */ - uint pmc_scratch4; /* _SCRATCH4_0, offset 60 */ - uint pmc_scratch5; /* _SCRATCH5_0, offset 64 */ - uint pmc_scratch6; /* _SCRATCH6_0, offset 68 */ - uint pmc_scratch7; /* _SCRATCH7_0, offset 6C */ - uint pmc_scratch8; /* _SCRATCH8_0, offset 70 */ - uint pmc_scratch9; /* _SCRATCH9_0, offset 74 */ - uint pmc_scratch10; /* _SCRATCH10_0, offset 78 */ - uint pmc_scratch11; /* _SCRATCH11_0, offset 7C */ - uint pmc_scratch12; /* _SCRATCH12_0, offset 80 */ - uint pmc_scratch13; /* _SCRATCH13_0, offset 84 */ - uint pmc_scratch14; /* _SCRATCH14_0, offset 88 */ - uint pmc_scratch15; /* _SCRATCH15_0, offset 8C */ - uint pmc_scratch16; /* _SCRATCH16_0, offset 90 */ - uint pmc_scratch17; /* _SCRATCH17_0, offset 94 */ - uint pmc_scratch18; /* _SCRATCH18_0, offset 98 */ - uint pmc_scratch19; /* _SCRATCH19_0, offset 9C */ - uint pmc_scratch20; /* _SCRATCH20_0, offset A0 */ - uint pmc_scratch21; /* _SCRATCH21_0, offset A4 */ - uint pmc_scratch22; /* _SCRATCH22_0, offset A8 */ - uint pmc_scratch23; /* _SCRATCH23_0, offset AC */ - - uint pmc_secure_scratch0; /* _SECURE_SCRATCH0_0, offset B0 */ - uint pmc_secure_scratch1; /* _SECURE_SCRATCH1_0, offset B4 */ - uint pmc_secure_scratch2; /* _SECURE_SCRATCH2_0, offset B8 */ - uint pmc_secure_scratch3; /* _SECURE_SCRATCH3_0, offset BC */ - uint pmc_secure_scratch4; /* _SECURE_SCRATCH4_0, offset C0 */ - uint pmc_secure_scratch5; /* _SECURE_SCRATCH5_0, offset C4 */ - - uint pmc_cpupwrgood_timer; /* _CPUPWRGOOD_TIMER_0, offset C8 */ - uint pmc_cpupwroff_timer; /* _CPUPWROFF_TIMER_0, offset CC */ - uint pmc_pg_mask; /* _PG_MASK_0, offset D0 */ - uint pmc_pg_mask_1; /* _PG_MASK_1_0, offset D4 */ - uint pmc_auto_wake_lvl; /* _AUTO_WAKE_LVL_0, offset D8 */ - uint pmc_auto_wake_lvl_mask; /* _AUTO_WAKE_LVL_MASK_0, offset DC */ - uint pmc_wake_delay; /* _WAKE_DELAY_0, offset E0 */ - uint pmc_pwr_det_val; /* _PWR_DET_VAL_0, offset E4 */ - uint pmc_ddr_pwr; /* _DDR_PWR_0, offset E8 */ - uint pmc_usb_debounce_del; /* _USB_DEBOUNCE_DEL_0, offset EC */ - uint pmc_usb_ao; /* _USB_AO_0, offset F0 */ - uint pmc_crypto_op; /* _CRYPTO_OP__0, offset F4 */ - uint pmc_pllp_wb0_override; /* _PLLP_WB0_OVERRIDE_0, offset F8 */ - - uint pmc_scratch24; /* _SCRATCH24_0, offset FC */ - uint pmc_scratch25; /* _SCRATCH24_0, offset 100 */ - uint pmc_scratch26; /* _SCRATCH24_0, offset 104 */ - uint pmc_scratch27; /* _SCRATCH24_0, offset 108 */ - uint pmc_scratch28; /* _SCRATCH24_0, offset 10C */ - uint pmc_scratch29; /* _SCRATCH24_0, offset 110 */ - uint pmc_scratch30; /* _SCRATCH24_0, offset 114 */ - uint pmc_scratch31; /* _SCRATCH24_0, offset 118 */ - uint pmc_scratch32; /* _SCRATCH24_0, offset 11C */ - uint pmc_scratch33; /* _SCRATCH24_0, offset 120 */ - uint pmc_scratch34; /* _SCRATCH24_0, offset 124 */ - uint pmc_scratch35; /* _SCRATCH24_0, offset 128 */ - uint pmc_scratch36; /* _SCRATCH24_0, offset 12C */ - uint pmc_scratch37; /* _SCRATCH24_0, offset 130 */ - uint pmc_scratch38; /* _SCRATCH24_0, offset 134 */ - uint pmc_scratch39; /* _SCRATCH24_0, offset 138 */ - uint pmc_scratch40; /* _SCRATCH24_0, offset 13C */ - uint pmc_scratch41; /* _SCRATCH24_0, offset 140 */ - uint pmc_scratch42; /* _SCRATCH24_0, offset 144 */ - - uint pmc_bo_mirror0; /* _BOUNDOUT_MIRROR0_0, offset 148 */ - uint pmc_bo_mirror1; /* _BOUNDOUT_MIRROR1_0, offset 14C */ - uint pmc_bo_mirror2; /* _BOUNDOUT_MIRROR2_0, offset 150 */ - uint pmc_sys_33v_en; /* _SYS_33V_EN_0, offset 154 */ - uint pmc_bo_mirror_access; /* _BOUNDOUT_MIRROR_ACCESS_0, off158 */ - uint pmc_gate; /* _GATE_0, offset 15C */ -}; - -#endif /* PMC_H */ diff --git a/arch/arm/include/asm/arch-tegra2/sys_proto.h b/arch/arm/include/asm/arch-tegra2/sys_proto.h deleted file mode 100644 index c11534e..0000000 --- a/arch/arm/include/asm/arch-tegra2/sys_proto.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ - -struct tegra2_sysinfo { - char *board_string; -}; - -void invalidate_dcache(void); - -extern const struct tegra2_sysinfo sysinfo; - -#endif diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra2/tegra2.h deleted file mode 100644 index 9001b68..0000000 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _TEGRA2_H_ -#define _TEGRA2_H_ - -#define NV_PA_SDRAM_BASE 0x00000000 -#define NV_PA_TMRUS_BASE 0x60005010 -#define NV_PA_CLK_RST_BASE 0x60006000 -#define NV_PA_APB_MISC_BASE 0x70000000 -#define NV_PA_APB_UARTA_BASE (NV_PA_APB_MISC_BASE + 0x6000) -#define NV_PA_APB_UARTB_BASE (NV_PA_APB_MISC_BASE + 0x6040) -#define NV_PA_APB_UARTC_BASE (NV_PA_APB_MISC_BASE + 0x6200) -#define NV_PA_APB_UARTD_BASE (NV_PA_APB_MISC_BASE + 0x6300) -#define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400) -#define NV_PA_PMC_BASE 0x7000E400 - -#define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE -#define LOW_LEVEL_SRAM_STACK 0x4000FFFC - -#ifndef __ASSEMBLY__ -struct timerus { - unsigned int cntr_1us; -}; -#else /* __ASSEMBLY__ */ -#define PRM_RSTCTRL NV_PA_PMC_BASE -#endif - -#endif /* TEGRA2_H */ diff --git a/arch/arm/include/asm/arch-tegra2/uart.h b/arch/arm/include/asm/arch-tegra2/uart.h deleted file mode 100644 index aea29a7..0000000 --- a/arch/arm/include/asm/arch-tegra2/uart.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation <www.nvidia.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _UART_H_ -#define _UART_H_ - -/* UART registers */ -struct uart_ctlr { - uint uart_thr_dlab_0; /* UART_THR_DLAB_0_0, offset 00 */ - uint uart_ier_dlab_0; /* UART_IER_DLAB_0_0, offset 04 */ - uint uart_iir_fcr; /* UART_IIR_FCR_0, offset 08 */ - uint uart_lcr; /* UART_LCR_0, offset 0C */ - uint uart_mcr; /* UART_MCR_0, offset 10 */ - uint uart_lsr; /* UART_LSR_0, offset 14 */ - uint uart_msr; /* UART_MSR_0, offset 18 */ - uint uart_spr; /* UART_SPR_0, offset 1C */ - uint uart_irda_csr; /* UART_IRDA_CSR_0, offset 20 */ - uint uart_reserved[6]; /* Reserved, unused, offset 24-38*/ - uint uart_asr; /* UART_ASR_0, offset 3C */ -}; - -#define NVRM_PLLP_FIXED_FREQ_KHZ 216000 -#define NV_DEFAULT_DEBUG_BAUD 115200 - -#define UART_FCR_TRIGGER_3 0x30 /* Mask for trigger set at 3 */ - -#endif /* UART_H */ diff --git a/arch/arm/include/asm/arch-tnetv107x/clock.h b/arch/arm/include/asm/arch-tnetv107x/clock.h deleted file mode 100644 index 097f825..0000000 --- a/arch/arm/include/asm/arch-tnetv107x/clock.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * TNETV107X: Clock APIs - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H - -#define PSC_MDCTL_NEXT_SWRSTDISABLE 0x0 -#define PSC_MDCTL_NEXT_SYNCRST 0x1 -#define PSC_MDCTL_NEXT_DISABLE 0x2 -#define PSC_MDCTL_NEXT_ENABLE 0x3 - -#define CONFIG_SYS_INT_OSC_FREQ 24000000 - -#ifndef __ASSEMBLY__ - -/* PLL identifiers */ -enum pll_type_e { - SYS_PLL, - TDM_PLL, - ETH_PLL -}; - -/* PLL configuration data */ -struct pll_init_data { - int pll; - int internal_osc; - unsigned long pll_freq; - unsigned long div_freq[10]; -}; - -void init_plls(int num_pll, struct pll_init_data *config); -int lpsc_status(unsigned int mod); -void lpsc_control(int mod, unsigned long state, int lrstz); -unsigned long clk_get_rate(unsigned int clk); -unsigned long clk_round_rate(unsigned int clk, unsigned long hz); -int clk_set_rate(unsigned int clk, unsigned long hz); - -static inline void clk_enable(unsigned int mod) -{ - lpsc_control(mod, PSC_MDCTL_NEXT_ENABLE, -1); -} - -static inline void clk_disable(unsigned int mod) -{ - lpsc_control(mod, PSC_MDCTL_NEXT_DISABLE, -1); -} - -#endif - -#endif diff --git a/arch/arm/include/asm/arch-tnetv107x/emif_defs.h b/arch/arm/include/asm/arch-tnetv107x/emif_defs.h deleted file mode 100644 index 9969a01..0000000 --- a/arch/arm/include/asm/arch-tnetv107x/emif_defs.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm/arch-davinci/emif_defs.h> diff --git a/arch/arm/include/asm/arch-tnetv107x/hardware.h b/arch/arm/include/asm/arch-tnetv107x/hardware.h deleted file mode 100644 index 94a94f9..0000000 --- a/arch/arm/include/asm/arch-tnetv107x/hardware.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * TNETV107X: Hardware information - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ - -#include <asm/sizes.h> - -#define ASYNC_EMIF_NUM_CS 4 -#define ASYNC_EMIF_MODE_NOR 0 -#define ASYNC_EMIF_MODE_NAND 1 -#define ASYNC_EMIF_MODE_ONENAND 2 -#define ASYNC_EMIF_PRESERVE -1 - -struct async_emif_config { - unsigned mode; - unsigned select_strobe; - unsigned extend_wait; - unsigned wr_setup; - unsigned wr_strobe; - unsigned wr_hold; - unsigned rd_setup; - unsigned rd_strobe; - unsigned rd_hold; - unsigned turn_around; - enum { - ASYNC_EMIF_8 = 0, - ASYNC_EMIF_16 = 1, - ASYNC_EMIF_32 = 2, - } width; -}; - -void init_async_emif(int num_cs, struct async_emif_config *config); - -int wdt_start(unsigned long msecs); -int wdt_stop(void); -int wdt_kick(void); - -#endif - -/* Chip configuration unlock codes and registers */ -#define TNETV107X_KICK0 (TNETV107X_CHIP_CONFIG_SYS_BASE+0x38) -#define TNETV107X_KICK1 (TNETV107X_CHIP_CONFIG_SYS_BASE+0x3c) -#define TNETV107X_PINMUX(n) (TNETV107X_CHIP_CONFIG_SYS_BASE+0x150+(n)*4) -#define TNETV107X_KICK0_MAGIC 0x83e70b13 -#define TNETV107X_KICK1_MAGIC 0x95a4f1e0 - -/* Module base addresses */ -#define TNETV107X_TPCC_BASE 0x01C00000 -#define TNETV107X_TPTC0_BASE 0x01C10000 -#define TNETV107X_TPTC1_BASE 0x01C10400 -#define TNETV107X_INTC_BASE 0x03000000 -#define TNETV107X_LCD_CONTROLLER_BASE 0x08030000 -#define TNETV107X_INTD_BASE 0x08038000 -#define TNETV107X_INTD_IPC_BASE 0x08038000 -#define TNETV107X_INTD_FAST_BASE 0x08039000 -#define TNETV107X_INTD_ASYNC_BASE 0x0803A000 -#define TNETV107X_INTD_SLOW_BASE 0x0803B000 -#define TNETV107X_PKA_BASE 0x08040000 -#define TNETV107X_RNG_BASE 0x08044000 -#define TNETV107X_TIMER0_BASE 0x08086500 -#define TNETV107X_TIMER1_BASE 0x08086600 -#define TNETV107X_WDT0_ARM_BASE 0x08086700 -#define TNETV107X_WDT1_DSP_BASE 0x08086800 -#define TNETV107X_CHIP_CONFIG_SYS_BASE 0x08087000 -#define TNETV107X_GPIO_BASE 0x08088000 -#define TNETV107X_UART1_BASE 0x08088400 -#define TNETV107X_TOUCHSCREEN_BASE 0x08088500 -#define TNETV107X_SDIO0_BASE 0x08088700 -#define TNETV107X_SDIO1_BASE 0x08088800 -#define TNETV107X_MDIO_BASE 0x08088900 -#define TNETV107X_KEYPAD_BASE 0x08088A00 -#define TNETV107X_SSP_BASE 0x08088C00 -#define TNETV107X_CLOCK_CONTROL_BASE 0x0808A000 -#define TNETV107X_PSC_BASE 0x0808B000 -#define TNETV107X_TDM0_BASE 0x08100000 -#define TNETV107X_TDM1_BASE 0x08100100 -#define TNETV107X_MCDMA_BASE 0x08108000 -#define TNETV107X_UART0_DMA_BASE 0x08108200 -#define TNETV107X_USBSS_BASE 0x08120000 -#define TNETV107X_VLYNQ_CONTROL_BASE 0x0810D000 -#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 -#define TNETV107X_VLYNQ_MEM_MAP_BASE 0x0C000000 -#define TNETV107X_IMCOP_BASE 0x01CC0000 -#define TNETV107X_MBX_LITE_BASE 0x07000000 -#define TNETV107X_ETHSS_BASE 0x0803C000 -#define TNETV107X_CPSW_BASE 0x0803C000 -#define TNETV107X_SPF_BASE 0x0803C800 -#define TNETV107X_IOPU_ETHSS_BASE 0x0803D000 -#define TNETV107X_VTP_CNTRL_0 0x0803D800 -#define TNETV107X_VTP_CNTRL_1 0x0803D900 -#define TNETV107X_UART2_DMA_BASE 0x08108400 -#define TNETV107X_INTERNAL_MEMORY 0x20000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 -#define TNETV107X_DDR_EMIF_DATA_BASE 0x80000000 -#define TNETV107X_DDR_EMIF_CONTROL_BASE 0x90000000 - -/* LPSC module definitions */ -#define TNETV107X_LPSC_ARM 0 -#define TNETV107X_LPSC_GEM 1 -#define TNETV107X_LPSC_DDR2_PHY 2 -#define TNETV107X_LPSC_TPCC 3 -#define TNETV107X_LPSC_TPTC0 4 -#define TNETV107X_LPSC_TPTC1 5 -#define TNETV107X_LPSC_RAM 6 -#define TNETV107X_LPSC_MBX_LITE 7 -#define TNETV107X_LPSC_LCD 8 -#define TNETV107X_LPSC_ETHSS 9 -#define TNETV107X_LPSC_AEMIF 10 -#define TNETV107X_LPSC_CHIP_CFG 11 -#define TNETV107X_LPSC_TSC 12 -#define TNETV107X_LPSC_ROM 13 -#define TNETV107X_LPSC_UART2 14 -#define TNETV107X_LPSC_PKTSEC 15 -#define TNETV107X_LPSC_SECCTL 16 -#define TNETV107X_LPSC_KEYMGR 17 -#define TNETV107X_LPSC_KEYPAD 18 -#define TNETV107X_LPSC_GPIO 19 -#define TNETV107X_LPSC_MDIO 20 -#define TNETV107X_LPSC_SDIO0 21 -#define TNETV107X_LPSC_UART0 22 -#define TNETV107X_LPSC_UART1 23 -#define TNETV107X_LPSC_TIMER0 24 -#define TNETV107X_LPSC_TIMER1 25 -#define TNETV107X_LPSC_WDT_ARM 26 -#define TNETV107X_LPSC_WDT_DSP 27 -#define TNETV107X_LPSC_SSP 28 -#define TNETV107X_LPSC_TDM0 29 -#define TNETV107X_LPSC_VLYNQ 30 -#define TNETV107X_LPSC_MCDMA 31 -#define TNETV107X_LPSC_USB0 32 -#define TNETV107X_LPSC_TDM1 33 -#define TNETV107X_LPSC_DEBUGSS 34 -#define TNETV107X_LPSC_ETHSS_RGMII 35 -#define TNETV107X_LPSC_SYSTEM 36 -#define TNETV107X_LPSC_IMCOP 37 -#define TNETV107X_LPSC_SPARE 38 -#define TNETV107X_LPSC_SDIO1 39 -#define TNETV107X_LPSC_USB1 40 -#define TNETV107X_LPSC_USBSS 41 -#define TNETV107X_LPSC_DDR2_EMIF1_VRST 42 -#define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43 -#define TNETV107X_LPSC_MAX 44 - -/* Interrupt controller */ -#define INTC_GLB_EN (TNETV107X_INTC_BASE + 0x10) -#define INTC_HINT_EN (TNETV107X_INTC_BASE + 0x1500) -#define INTC_EN_CLR0 (TNETV107X_INTC_BASE + 0x380) - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-tnetv107x/mux.h b/arch/arm/include/asm/arch-tnetv107x/mux.h deleted file mode 100644 index f16bc99..0000000 --- a/arch/arm/include/asm/arch-tnetv107x/mux.h +++ /dev/null @@ -1,306 +0,0 @@ -/* - * TNETV107X: Pinmux APIs - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -struct pin_config { - unsigned char reg_index; - unsigned char mask_offset; - unsigned char mode; -}; - -#define TNETV107X_MUX_CFG(reg, offset, mux_mode) \ - { reg, offset, mux_mode } - -int mux_select_pin(short index); -int mux_select_pins(const short *pins); - -enum tnetv107x_pin_mux_index { - TNETV107X_PIN_ASR_A00, - TNETV107X_PIN_GPIO32, - TNETV107X_PIN_ASR_A01, - TNETV107X_PIN_GPIO33, - TNETV107X_PIN_ASR_A02, - TNETV107X_PIN_GPIO34, - TNETV107X_PIN_ASR_A03, - TNETV107X_PIN_GPIO35, - TNETV107X_PIN_ASR_A04, - TNETV107X_PIN_GPIO36, - TNETV107X_PIN_ASR_A05, - TNETV107X_PIN_GPIO37, - TNETV107X_PIN_ASR_A06, - TNETV107X_PIN_GPIO38, - TNETV107X_PIN_ASR_A07, - TNETV107X_PIN_GPIO39, - TNETV107X_PIN_ASR_A08, - TNETV107X_PIN_GPIO40, - TNETV107X_PIN_ASR_A09, - TNETV107X_PIN_GPIO41, - TNETV107X_PIN_ASR_A10, - TNETV107X_PIN_GPIO42, - TNETV107X_PIN_ASR_A11, - TNETV107X_PIN_BOOT_STRP_0, - TNETV107X_PIN_ASR_A12, - TNETV107X_PIN_BOOT_STRP_1, - TNETV107X_PIN_ASR_A13, - TNETV107X_PIN_GPIO43, - TNETV107X_PIN_ASR_A14, - TNETV107X_PIN_GPIO44, - TNETV107X_PIN_ASR_A15, - TNETV107X_PIN_GPIO45, - TNETV107X_PIN_ASR_A16, - TNETV107X_PIN_GPIO46, - TNETV107X_PIN_ASR_A17, - TNETV107X_PIN_GPIO47, - TNETV107X_PIN_ASR_A18, - TNETV107X_PIN_GPIO48, - TNETV107X_PIN_SDIO1_DATA3_0, - TNETV107X_PIN_ASR_A19, - TNETV107X_PIN_GPIO49, - TNETV107X_PIN_SDIO1_DATA2_0, - TNETV107X_PIN_ASR_A20, - TNETV107X_PIN_GPIO50, - TNETV107X_PIN_SDIO1_DATA1_0, - TNETV107X_PIN_ASR_A21, - TNETV107X_PIN_GPIO51, - TNETV107X_PIN_SDIO1_DATA0_0, - TNETV107X_PIN_ASR_A22, - TNETV107X_PIN_GPIO52, - TNETV107X_PIN_SDIO1_CMD_0, - TNETV107X_PIN_ASR_A23, - TNETV107X_PIN_GPIO53, - TNETV107X_PIN_SDIO1_CLK_0, - TNETV107X_PIN_ASR_BA_1, - TNETV107X_PIN_GPIO54, - TNETV107X_PIN_SYS_PLL_CLK, - TNETV107X_PIN_ASR_CS0, - TNETV107X_PIN_ASR_CS1, - TNETV107X_PIN_ASR_CS2, - TNETV107X_PIN_TDM_PLL_CLK, - TNETV107X_PIN_ASR_CS3, - TNETV107X_PIN_ETH_PHY_CLK, - TNETV107X_PIN_ASR_D00, - TNETV107X_PIN_GPIO55, - TNETV107X_PIN_ASR_D01, - TNETV107X_PIN_GPIO56, - TNETV107X_PIN_ASR_D02, - TNETV107X_PIN_GPIO57, - TNETV107X_PIN_ASR_D03, - TNETV107X_PIN_GPIO58, - TNETV107X_PIN_ASR_D04, - TNETV107X_PIN_GPIO59_0, - TNETV107X_PIN_ASR_D05, - TNETV107X_PIN_GPIO60_0, - TNETV107X_PIN_ASR_D06, - TNETV107X_PIN_GPIO61_0, - TNETV107X_PIN_ASR_D07, - TNETV107X_PIN_GPIO62_0, - TNETV107X_PIN_ASR_D08, - TNETV107X_PIN_GPIO63_0, - TNETV107X_PIN_ASR_D09, - TNETV107X_PIN_GPIO64_0, - TNETV107X_PIN_ASR_D10, - TNETV107X_PIN_SDIO1_DATA3_1, - TNETV107X_PIN_ASR_D11, - TNETV107X_PIN_SDIO1_DATA2_1, - TNETV107X_PIN_ASR_D12, - TNETV107X_PIN_SDIO1_DATA1_1, - TNETV107X_PIN_ASR_D13, - TNETV107X_PIN_SDIO1_DATA0_1, - TNETV107X_PIN_ASR_D14, - TNETV107X_PIN_SDIO1_CMD_1, - TNETV107X_PIN_ASR_D15, - TNETV107X_PIN_SDIO1_CLK_1, - TNETV107X_PIN_ASR_OE, - TNETV107X_PIN_BOOT_STRP_2, - TNETV107X_PIN_ASR_RNW, - TNETV107X_PIN_GPIO29_0, - TNETV107X_PIN_ASR_WAIT, - TNETV107X_PIN_GPIO30_0, - TNETV107X_PIN_ASR_WE, - TNETV107X_PIN_BOOT_STRP_3, - TNETV107X_PIN_ASR_WE_DQM0, - TNETV107X_PIN_GPIO31, - TNETV107X_PIN_LCD_PD17_0, - TNETV107X_PIN_ASR_WE_DQM1, - TNETV107X_PIN_ASR_BA0_0, - TNETV107X_PIN_VLYNQ_CLK, - TNETV107X_PIN_GPIO14, - TNETV107X_PIN_LCD_PD19_0, - TNETV107X_PIN_VLYNQ_RXD0, - TNETV107X_PIN_GPIO15, - TNETV107X_PIN_LCD_PD20_0, - TNETV107X_PIN_VLYNQ_RXD1, - TNETV107X_PIN_GPIO16, - TNETV107X_PIN_LCD_PD21_0, - TNETV107X_PIN_VLYNQ_TXD0, - TNETV107X_PIN_GPIO17, - TNETV107X_PIN_LCD_PD22_0, - TNETV107X_PIN_VLYNQ_TXD1, - TNETV107X_PIN_GPIO18, - TNETV107X_PIN_LCD_PD23_0, - TNETV107X_PIN_SDIO0_CLK, - TNETV107X_PIN_GPIO19, - TNETV107X_PIN_SDIO0_CMD, - TNETV107X_PIN_GPIO20, - TNETV107X_PIN_SDIO0_DATA0, - TNETV107X_PIN_GPIO21, - TNETV107X_PIN_SDIO0_DATA1, - TNETV107X_PIN_GPIO22, - TNETV107X_PIN_SDIO0_DATA2, - TNETV107X_PIN_GPIO23, - TNETV107X_PIN_SDIO0_DATA3, - TNETV107X_PIN_GPIO24, - TNETV107X_PIN_EMU0, - TNETV107X_PIN_EMU1, - TNETV107X_PIN_RTCK, - TNETV107X_PIN_TRST_N, - TNETV107X_PIN_TCK, - TNETV107X_PIN_TDI, - TNETV107X_PIN_TDO, - TNETV107X_PIN_TMS, - TNETV107X_PIN_TDM1_CLK, - TNETV107X_PIN_TDM1_RX, - TNETV107X_PIN_TDM1_TX, - TNETV107X_PIN_TDM1_FS, - TNETV107X_PIN_KEYPAD_R0, - TNETV107X_PIN_KEYPAD_R1, - TNETV107X_PIN_KEYPAD_R2, - TNETV107X_PIN_KEYPAD_R3, - TNETV107X_PIN_KEYPAD_R4, - TNETV107X_PIN_KEYPAD_R5, - TNETV107X_PIN_KEYPAD_R6, - TNETV107X_PIN_GPIO12, - TNETV107X_PIN_KEYPAD_R7, - TNETV107X_PIN_GPIO10, - TNETV107X_PIN_KEYPAD_C0, - TNETV107X_PIN_KEYPAD_C1, - TNETV107X_PIN_KEYPAD_C2, - TNETV107X_PIN_KEYPAD_C3, - TNETV107X_PIN_KEYPAD_C4, - TNETV107X_PIN_KEYPAD_C5, - TNETV107X_PIN_KEYPAD_C6, - TNETV107X_PIN_GPIO13, - TNETV107X_PIN_TEST_CLK_IN, - TNETV107X_PIN_KEYPAD_C7, - TNETV107X_PIN_GPIO11, - TNETV107X_PIN_SSP0_0, - TNETV107X_PIN_SCC_DCLK, - TNETV107X_PIN_LCD_PD20_1, - TNETV107X_PIN_SSP0_1, - TNETV107X_PIN_SCC_CS_N, - TNETV107X_PIN_LCD_PD21_1, - TNETV107X_PIN_SSP0_2, - TNETV107X_PIN_SCC_D, - TNETV107X_PIN_LCD_PD22_1, - TNETV107X_PIN_SSP0_3, - TNETV107X_PIN_SCC_RESETN, - TNETV107X_PIN_LCD_PD23_1, - TNETV107X_PIN_SSP1_0, - TNETV107X_PIN_GPIO25, - TNETV107X_PIN_UART2_CTS, - TNETV107X_PIN_SSP1_1, - TNETV107X_PIN_GPIO26, - TNETV107X_PIN_UART2_RD, - TNETV107X_PIN_SSP1_2, - TNETV107X_PIN_GPIO27, - TNETV107X_PIN_UART2_RTS, - TNETV107X_PIN_SSP1_3, - TNETV107X_PIN_GPIO28, - TNETV107X_PIN_UART2_TD, - TNETV107X_PIN_UART0_CTS, - TNETV107X_PIN_UART0_RD, - TNETV107X_PIN_UART0_RTS, - TNETV107X_PIN_UART0_TD, - TNETV107X_PIN_UART1_RD, - TNETV107X_PIN_UART1_TD, - TNETV107X_PIN_LCD_AC_NCS, - TNETV107X_PIN_LCD_HSYNC_RNW, - TNETV107X_PIN_LCD_VSYNC_A0, - TNETV107X_PIN_LCD_MCLK, - TNETV107X_PIN_LCD_PD16_0, - TNETV107X_PIN_LCD_PCLK_E, - TNETV107X_PIN_LCD_PD00, - TNETV107X_PIN_LCD_PD01, - TNETV107X_PIN_LCD_PD02, - TNETV107X_PIN_LCD_PD03, - TNETV107X_PIN_LCD_PD04, - TNETV107X_PIN_LCD_PD05, - TNETV107X_PIN_LCD_PD06, - TNETV107X_PIN_LCD_PD07, - TNETV107X_PIN_LCD_PD08, - TNETV107X_PIN_GPIO59_1, - TNETV107X_PIN_LCD_PD09, - TNETV107X_PIN_GPIO60_1, - TNETV107X_PIN_LCD_PD10, - TNETV107X_PIN_ASR_BA0_1, - TNETV107X_PIN_GPIO61_1, - TNETV107X_PIN_LCD_PD11, - TNETV107X_PIN_GPIO62_1, - TNETV107X_PIN_LCD_PD12, - TNETV107X_PIN_GPIO63_1, - TNETV107X_PIN_LCD_PD13, - TNETV107X_PIN_GPIO64_1, - TNETV107X_PIN_LCD_PD14, - TNETV107X_PIN_GPIO29_1, - TNETV107X_PIN_LCD_PD15, - TNETV107X_PIN_GPIO30_1, - TNETV107X_PIN_EINT0, - TNETV107X_PIN_GPIO08, - TNETV107X_PIN_EINT1, - TNETV107X_PIN_GPIO09, - TNETV107X_PIN_GPIO00, - TNETV107X_PIN_LCD_PD20_2, - TNETV107X_PIN_TDM_CLK_IN_2, - TNETV107X_PIN_GPIO01, - TNETV107X_PIN_LCD_PD21_2, - TNETV107X_PIN_24M_CLK_OUT_1, - TNETV107X_PIN_GPIO02, - TNETV107X_PIN_LCD_PD22_2, - TNETV107X_PIN_GPIO03, - TNETV107X_PIN_LCD_PD23_2, - TNETV107X_PIN_GPIO04, - TNETV107X_PIN_LCD_PD16_1, - TNETV107X_PIN_USB0_RXERR, - TNETV107X_PIN_GPIO05, - TNETV107X_PIN_LCD_PD17_1, - TNETV107X_PIN_TDM_CLK_IN_1, - TNETV107X_PIN_GPIO06, - TNETV107X_PIN_LCD_PD18, - TNETV107X_PIN_24M_CLK_OUT_2, - TNETV107X_PIN_GPIO07, - TNETV107X_PIN_LCD_PD19_1, - TNETV107X_PIN_USB1_RXERR, - TNETV107X_PIN_ETH_PLL_CLK, - TNETV107X_PIN_MDIO, - TNETV107X_PIN_MDC, - TNETV107X_PIN_AIC_MUTE_STAT_N, - TNETV107X_PIN_TDM0_CLK, - TNETV107X_PIN_AIC_HNS_EN_N, - TNETV107X_PIN_TDM0_FS, - TNETV107X_PIN_AIC_HDS_EN_STAT_N, - TNETV107X_PIN_TDM0_TX, - TNETV107X_PIN_AIC_HNF_EN_STAT_N, - TNETV107X_PIN_TDM0_RX, -}; - -#endif diff --git a/arch/arm/include/asm/arch-tnetv107x/nand_defs.h b/arch/arm/include/asm/arch-tnetv107x/nand_defs.h deleted file mode 100644 index 961b710..0000000 --- a/arch/arm/include/asm/arch-tnetv107x/nand_defs.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * TNETV107X: NAND definitions - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef _NAND_DEFS_H_ -#define _NAND_DEFS_H_ - -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> - -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE - -#define MASK_CLE 0x4000 -#define MASK_ALE 0x2000 - -#define NAND_READ_START 0x00 -#define NAND_READ_END 0x30 -#define NAND_STATUS 0x70 - -extern void davinci_nand_init(struct nand_chip *nand); - -#endif diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h deleted file mode 100644 index ba9e4b7..0000000 --- a/arch/arm/include/asm/atomic.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * linux/include/asm-arm/atomic.h - * - * Copyright (c) 1996 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 27-06-1996 RMK Created - * 13-04-1997 RMK Made functions atomic! - * 07-12-1997 RMK Upgraded for v2.1. - * 26-08-1998 PJB Added #ifdef __KERNEL__ - */ -#ifndef __ASM_ARM_ATOMIC_H -#define __ASM_ARM_ATOMIC_H - -#include <linux/config.h> - -#ifdef CONFIG_SMP -#error SMP not supported -#endif - -typedef struct { volatile int counter; } atomic_t; - -#define ATOMIC_INIT(i) { (i) } - -#ifdef __KERNEL__ -#include <asm/proc/system.h> - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v,i) (((v)->counter) = (i)) - -static inline void atomic_add(int i, volatile atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter += i; - local_irq_restore(flags); -} - -static inline void atomic_sub(int i, volatile atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter -= i; - local_irq_restore(flags); -} - -static inline void atomic_inc(volatile atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter += 1; - local_irq_restore(flags); -} - -static inline void atomic_dec(volatile atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter -= 1; - local_irq_restore(flags); -} - -static inline int atomic_dec_and_test(volatile atomic_t *v) -{ - unsigned long flags; - int val; - - local_irq_save(flags); - val = v->counter; - v->counter = val -= 1; - local_irq_restore(flags); - - return val == 0; -} - -static inline int atomic_add_negative(int i, volatile atomic_t *v) -{ - unsigned long flags; - int val; - - local_irq_save(flags); - val = v->counter; - v->counter = val += i; - local_irq_restore(flags); - - return val < 0; -} - -static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) -{ - unsigned long flags; - - local_irq_save(flags); - *addr &= ~mask; - local_irq_restore(flags); -} - -/* Atomic operations are already serializing on ARM */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#endif -#endif diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h deleted file mode 100644 index 270f163..0000000 --- a/arch/arm/include/asm/bitops.h +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Copyright 1995, Russell King. - * Various bits and pieces copyrights include: - * Linus Torvalds (test_bit). - * - * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). - * - * Please note that the code in this file should never be included - * from user space. Many of these are not implemented in assembler - * since they would be too costly. Also, they require priviledged - * instructions (which are not available from user mode) to ensure - * that they are atomic. - */ - -#ifndef __ASM_ARM_BITOPS_H -#define __ASM_ARM_BITOPS_H - -#ifdef __KERNEL__ - -#include <asm/proc/system.h> - -#define smp_mb__before_clear_bit() do { } while (0) -#define smp_mb__after_clear_bit() do { } while (0) - -/* - * Function prototypes to keep gcc -Wall happy. - */ -extern void set_bit(int nr, volatile void * addr); - -extern void clear_bit(int nr, volatile void * addr); - -extern void change_bit(int nr, volatile void * addr); - -static inline void __change_bit(int nr, volatile void *addr) -{ - unsigned long mask = BIT_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); - - *p ^= mask; -} - -static inline int __test_and_set_bit(int nr, volatile void *addr) -{ - unsigned long mask = BIT_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; - - *p = old | mask; - return (old & mask) != 0; -} - -static inline int test_and_set_bit(int nr, volatile void * addr) -{ - unsigned long flags; - int out; - - local_irq_save(flags); - out = __test_and_set_bit(nr, addr); - local_irq_restore(flags); - - return out; -} - -static inline int __test_and_clear_bit(int nr, volatile void *addr) -{ - unsigned long mask = BIT_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; - - *p = old & ~mask; - return (old & mask) != 0; -} - -static inline int test_and_clear_bit(int nr, volatile void * addr) -{ - unsigned long flags; - int out; - - local_irq_save(flags); - out = __test_and_clear_bit(nr, addr); - local_irq_restore(flags); - - return out; -} - -extern int test_and_change_bit(int nr, volatile void * addr); - -static inline int __test_and_change_bit(int nr, volatile void *addr) -{ - unsigned long mask = BIT_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); - unsigned long old = *p; - - *p = old ^ mask; - return (old & mask) != 0; -} - -extern int find_first_zero_bit(void * addr, unsigned size); -extern int find_next_zero_bit(void * addr, int size, int offset); - -/* - * This routine doesn't need to be atomic. - */ -static inline int test_bit(int nr, const void * addr) -{ - return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); -} - -/* - * ffz = Find First Zero in word. Undefined if no zero exists, - * so code should check against ~0UL first.. - */ -static inline unsigned long ffz(unsigned long word) -{ - int k; - - word = ~word; - k = 31; - if (word & 0x0000ffff) { k -= 16; word <<= 16; } - if (word & 0x00ff0000) { k -= 8; word <<= 8; } - if (word & 0x0f000000) { k -= 4; word <<= 4; } - if (word & 0x30000000) { k -= 2; word <<= 2; } - if (word & 0x40000000) { k -= 1; } - return k; -} - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ - -#define hweight32(x) generic_hweight32(x) -#define hweight16(x) generic_hweight16(x) -#define hweight8(x) generic_hweight8(x) - -#define ext2_set_bit test_and_set_bit -#define ext2_clear_bit test_and_clear_bit -#define ext2_test_bit test_bit -#define ext2_find_first_zero_bit find_first_zero_bit -#define ext2_find_next_zero_bit find_next_zero_bit - -/* Bitmap functions for the minix filesystem. */ -#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr) -#define minix_set_bit(nr,addr) set_bit(nr,addr) -#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr) -#define minix_test_bit(nr,addr) test_bit(nr,addr) -#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) - -#endif /* __KERNEL__ */ - -#endif /* _ARM_BITOPS_H */ diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h deleted file mode 100644 index c3489f1..0000000 --- a/arch/arm/include/asm/byteorder.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/include/asm-arm/byteorder.h - * - * ARM Endian-ness. In little endian mode, the data bus is connected such - * that byte accesses appear as: - * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 - * and word accesses (data or instruction) appear as: - * d0...d31 - * - * When in big endian mode, byte accesses appear as: - * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7 - * and word accesses (data or instruction) appear as: - * d0...d31 - */ -#ifndef __ASM_ARM_BYTEORDER_H -#define __ASM_ARM_BYTEORDER_H - - -#include <asm/types.h> - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __ARMEB__ -#include <linux/byteorder/big_endian.h> -#else -#include <linux/byteorder/little_endian.h> -#endif - -#endif diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h deleted file mode 100644 index d0518be..0000000 --- a/arch/arm/include/asm/cache.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#ifndef _ASM_CACHE_H -#define _ASM_CACHE_H - -#include <asm/system.h> - -/* - * Invalidate L2 Cache using co-proc instruction - */ -static inline void invalidate_l2_cache(void) -{ - unsigned int val=0; - - asm volatile("mcr p15, 1, %0, c15, c11, 0 @ invl l2 cache" - : : "r" (val) : "cc"); - isb(); -} - -void l2_cache_enable(void); -void l2_cache_disable(void); - -#endif /* _ASM_CACHE_H */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h deleted file mode 100644 index c60dba2..0000000 --- a/arch/arm/include/asm/config.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright 2009 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _ASM_CONFIG_H_ -#define _ASM_CONFIG_H_ - -#define CONFIG_LMB -#define CONFIG_SYS_BOOT_RAMDISK_HIGH -#endif diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h deleted file mode 100644 index 501ce0e..0000000 --- a/arch/arm/include/asm/dma-mapping.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * (C) Copyright 2007 - * Stelian Pop <stelian.pop@leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARM_DMA_MAPPING_H -#define __ASM_ARM_DMA_MAPPING_H - -enum dma_data_direction { - DMA_BIDIRECTIONAL = 0, - DMA_TO_DEVICE = 1, - DMA_FROM_DEVICE = 2, -}; - -static void *dma_alloc_coherent(size_t len, unsigned long *handle) -{ - *handle = (unsigned long)malloc(len); - return (void *)*handle; -} - -static inline unsigned long dma_map_single(volatile void *vaddr, size_t len, - enum dma_data_direction dir) -{ - return (unsigned long)vaddr; -} - -static inline void dma_unmap_single(volatile void *vaddr, size_t len, - unsigned long paddr) -{ -} - -#endif /* __ASM_ARM_DMA_MAPPING_H */ diff --git a/arch/arm/include/asm/errno.h b/arch/arm/include/asm/errno.h deleted file mode 100644 index 4c82b50..0000000 --- a/arch/arm/include/asm/errno.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/errno.h> diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h deleted file mode 100644 index 2a84d27..0000000 --- a/arch/arm/include/asm/global_data.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * (C) Copyright 2002-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_GBL_DATA_H -#define __ASM_GBL_DATA_H -/* - * The following data structure is placed in some memory wich is - * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or - * some locked parts of the data cache) to allow for a minimum set of - * global variables during system initialization (until we have set - * up the memory controller so that we can use RAM). - * - * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) - */ - -typedef struct global_data { - bd_t *bd; - unsigned long flags; - unsigned long baudrate; - unsigned long have_console; /* serial_init() was called */ - unsigned long env_addr; /* Address of Environment struct */ - unsigned long env_valid; /* Checksum of Environment valid? */ - unsigned long fb_base; /* base address of frame buffer */ -#ifdef CONFIG_VFD - unsigned char vfd_type; /* display type */ -#endif -#ifdef CONFIG_FSL_ESDHC - unsigned long sdhc_clk; -#endif -#ifdef CONFIG_AT91FAMILY - /* "static data" needed by at91's clock.c */ - unsigned long cpu_clk_rate_hz; - unsigned long main_clk_rate_hz; - unsigned long mck_rate_hz; - unsigned long plla_rate_hz; - unsigned long pllb_rate_hz; - unsigned long at91_pllb_usb_init; -#endif -#ifdef CONFIG_ARM - /* "static data" needed by most of timer.c on ARM platforms */ - unsigned long timer_rate_hz; - unsigned long tbl; - unsigned long tbu; - unsigned long long timer_reset_value; - unsigned long lastinc; -#endif - unsigned long relocaddr; /* Start address of U-Boot in RAM */ - phys_size_t ram_size; /* RAM size */ - unsigned long mon_len; /* monitor len */ - unsigned long irq_sp; /* irq stack pointer */ - unsigned long start_addr_sp; /* start_addr_stackpointer */ - unsigned long reloc_off; -#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE)) - unsigned long tlb_addr; -#endif - void **jt; /* jump table */ - char env_buf[32]; /* buffer for getenv() before reloc. */ -} gd_t; - -/* - * Global Data Flags - */ -#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ -#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ -#define GD_FLG_SILENT 0x00004 /* Silent mode */ -#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ -#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ -#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ -#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ -#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */ - -#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8") - -#endif /* __ASM_GBL_DATA_H */ diff --git a/arch/arm/include/asm/hardware.h b/arch/arm/include/asm/hardware.h deleted file mode 100644 index 1fd1a5b..0000000 --- a/arch/arm/include/asm/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/hardware.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Common hardware definitions - */ - -#ifndef __ASM_HARDWARE_H -#define __ASM_HARDWARE_H - -#include <asm/arch/hardware.h> - -#endif diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h deleted file mode 100644 index 1fbc531..0000000 --- a/arch/arm/include/asm/io.h +++ /dev/null @@ -1,437 +0,0 @@ -/* - * linux/include/asm-arm/io.h - * - * Copyright (C) 1996-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Modifications: - * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both - * constant addresses and variable addresses. - * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture - * specific IO header files. - * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. - * 04-Apr-1999 PJB Added check_signature. - * 12-Dec-1999 RMK More cleanups - * 18-Jun-2000 RMK Removed virt_to_* and friends definitions - */ -#ifndef __ASM_ARM_IO_H -#define __ASM_ARM_IO_H - -#ifdef __KERNEL__ - -#include <linux/types.h> -#include <asm/byteorder.h> -#include <asm/memory.h> -#if 0 /* XXX###XXX */ -#include <asm/arch/hardware.h> -#endif /* XXX###XXX */ - -static inline void sync(void) -{ -} - -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)(vaddr); -} - -/* - * Generic virtual read/write. Note that we don't support half-word - * read/writes. We define __arch_*[bl] here, and leave __arch_*w - * to the architecture specific code. - */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getw(a) (*(volatile unsigned short *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -extern inline void __raw_writesb(unsigned int addr, const void *data, int bytelen) -{ - uint8_t *buf = (uint8_t *)data; - while(bytelen--) - __arch_putb(*buf++, addr); -} - -extern inline void __raw_writesw(unsigned int addr, const void *data, int wordlen) -{ - uint16_t *buf = (uint16_t *)data; - while(wordlen--) - __arch_putw(*buf++, addr); -} - -extern inline void __raw_writesl(unsigned int addr, const void *data, int longlen) -{ - uint32_t *buf = (uint32_t *)data; - while(longlen--) - __arch_putl(*buf++, addr); -} - -extern inline void __raw_readsb(unsigned int addr, void *data, int bytelen) -{ - uint8_t *buf = (uint8_t *)data; - while(bytelen--) - *buf++ = __arch_getb(addr); -} - -extern inline void __raw_readsw(unsigned int addr, void *data, int wordlen) -{ - uint16_t *buf = (uint16_t *)data; - while(wordlen--) - *buf++ = __arch_getw(addr); -} - -extern inline void __raw_readsl(unsigned int addr, void *data, int longlen) -{ - uint32_t *buf = (uint32_t *)data; - while(longlen--) - *buf++ = __arch_getl(addr); -} - -#define __raw_writeb(v,a) __arch_putb(v,a) -#define __raw_writew(v,a) __arch_putw(v,a) -#define __raw_writel(v,a) __arch_putl(v,a) - -#define __raw_readb(a) __arch_getb(a) -#define __raw_readw(a) __arch_getw(a) -#define __raw_readl(a) __arch_getl(a) - -/* - * TODO: The kernel offers some more advanced versions of barriers, it might - * have some advantages to use them instead of the simple one here. - */ -#define dmb() __asm__ __volatile__ ("" : : : "memory") -#define __iormb() dmb() -#define __iowmb() dmb() - -#define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; }) -#define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; }) -#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) - -#define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; }) -#define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; }) -#define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) - -/* - * The compiler seems to be incapable of optimising constants - * properly. Spell it out to the compiler in some cases. - * These are only valid for small values of "off" (< 1<<12) - */ -#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) -#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) -#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) - -#define __raw_base_readb(base,off) __arch_base_getb(base,off) -#define __raw_base_readw(base,off) __arch_base_getw(base,off) -#define __raw_base_readl(base,off) __arch_base_getl(base,off) - -/* - * Clear and set bits in one shot. These macros can be used to clear and - * set multiple bits in a register using a single call. These macros can - * also be used to set a multiple-bit bit pattern using a mask, by - * specifying the mask in the 'clear' parameter and the new bit pattern - * in the 'set' parameter. - */ - -#define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) -#define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) - -#define out_le32(a,v) out_arch(l,le32,a,v) -#define out_le16(a,v) out_arch(w,le16,a,v) - -#define in_le32(a) in_arch(l,le32,a) -#define in_le16(a) in_arch(w,le16,a) - -#define out_be32(a,v) out_arch(l,be32,a,v) -#define out_be16(a,v) out_arch(w,be16,a,v) - -#define in_be32(a) in_arch(l,be32,a) -#define in_be16(a) in_arch(w,be16,a) - -#define out_8(a,v) __raw_writeb(v,a) -#define in_8(a) __raw_readb(a) - -#define clrbits(type, addr, clear) \ - out_##type((addr), in_##type(addr) & ~(clear)) - -#define setbits(type, addr, set) \ - out_##type((addr), in_##type(addr) | (set)) - -#define clrsetbits(type, addr, clear, set) \ - out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) - -#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) -#define setbits_be32(addr, set) setbits(be32, addr, set) -#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) - -#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) -#define setbits_le32(addr, set) setbits(le32, addr, set) -#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) - -#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) -#define setbits_be16(addr, set) setbits(be16, addr, set) -#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) - -#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) -#define setbits_le16(addr, set) setbits(le16, addr, set) -#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) - -#define clrbits_8(addr, clear) clrbits(8, addr, clear) -#define setbits_8(addr, set) setbits(8, addr, set) -#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) - -/* - * Now, pick up the machine-defined IO definitions - */ -#if 0 /* XXX###XXX */ -#include <asm/arch/io.h> -#endif /* XXX###XXX */ - -/* - * IO port access primitives - * ------------------------- - * - * The ARM doesn't have special IO access instructions; all IO is memory - * mapped. Note that these are defined to perform little endian accesses - * only. Their primary purpose is to access PCI and ISA peripherals. - * - * Note that for a big endian machine, this implies that the following - * big endian mode connectivity is in place, as described by numerous - * ARM documents: - * - * PCI: D0-D7 D8-D15 D16-D23 D24-D31 - * ARM: D24-D31 D16-D23 D8-D15 D0-D7 - * - * The machine specific io.h include defines __io to translate an "IO" - * address to a memory address. - * - * Note that we prevent GCC re-ordering or caching values in expressions - * by introducing sequence points into the in*() definitions. Note that - * __raw_* do not guarantee this behaviour. - * - * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. - */ -#ifdef __io -#define outb(v,p) __raw_writeb(v,__io(p)) -#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) -#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p)) - -#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) -#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) -#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) - -#define outsb(p,d,l) __raw_writesb(__io(p),d,l) -#define outsw(p,d,l) __raw_writesw(__io(p),d,l) -#define outsl(p,d,l) __raw_writesl(__io(p),d,l) - -#define insb(p,d,l) __raw_readsb(__io(p),d,l) -#define insw(p,d,l) __raw_readsw(__io(p),d,l) -#define insl(p,d,l) __raw_readsl(__io(p),d,l) -#endif - -#define outb_p(val,port) outb((val),(port)) -#define outw_p(val,port) outw((val),(port)) -#define outl_p(val,port) outl((val),(port)) -#define inb_p(port) inb((port)) -#define inw_p(port) inw((port)) -#define inl_p(port) inl((port)) - -#define outsb_p(port,from,len) outsb(port,from,len) -#define outsw_p(port,from,len) outsw(port,from,len) -#define outsl_p(port,from,len) outsl(port,from,len) -#define insb_p(port,to,len) insb(port,to,len) -#define insw_p(port,to,len) insw(port,to,len) -#define insl_p(port,to,len) insl(port,to,len) - -/* - * ioremap and friends. - * - * ioremap takes a PCI memory address, as specified in - * linux/Documentation/IO-mapping.txt. If you want a - * physical address, use __ioremap instead. - */ -extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); -extern void __iounmap(void *addr); - -/* - * Generic ioremap support. - * - * Define: - * iomem_valid_addr(off,size) - * iomem_to_phys(off) - */ -#ifdef iomem_valid_addr -#define __arch_ioremap(off,sz,nocache) \ - ({ \ - unsigned long _off = (off), _size = (sz); \ - void *_ret = (void *)0; \ - if (iomem_valid_addr(_off, _size)) \ - _ret = __ioremap(iomem_to_phys(_off),_size,nocache); \ - _ret; \ - }) - -#define __arch_iounmap __iounmap -#endif - -#define ioremap(off,sz) __arch_ioremap((off),(sz),0) -#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) -#define iounmap(_addr) __arch_iounmap(_addr) - -/* - * DMA-consistent mapping functions. These allocate/free a region of - * uncached, unwrite-buffered mapped memory space for use with DMA - * devices. This is the "generic" version. The PCI specific version - * is in pci.h - */ -extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); -extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); -extern void consistent_sync(void *vaddr, size_t size, int rw); - -/* - * String version of IO memory access ops: - */ -extern void _memcpy_fromio(void *, unsigned long, size_t); -extern void _memcpy_toio(unsigned long, const void *, size_t); -extern void _memset_io(unsigned long, int, size_t); - -extern void __readwrite_bug(const char *fn); - -/* - * If this architecture has PCI memory IO, then define the read/write - * macros. These should only be used with the cookie passed from - * ioremap. - */ -#ifdef __mem_pci - -#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) -#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) -#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) - -#define writeb(v,c) __raw_writeb(v,__mem_pci(c)) -#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c)) -#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c)) - -#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) -#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) -#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) - -#define eth_io_copy_and_sum(s,c,l,b) \ - eth_copy_and_sum((s),__mem_pci(c),(l),(b)) - -static inline int -check_signature(unsigned long io_addr, const unsigned char *signature, - int length) -{ - int retval = 0; - do { - if (readb(io_addr) != *signature) - goto out; - io_addr++; - signature++; - length--; - } while (length); - retval = 1; -out: - return retval; -} - -#elif !defined(readb) - -#define readb(addr) (__readwrite_bug("readb"),0) -#define readw(addr) (__readwrite_bug("readw"),0) -#define readl(addr) (__readwrite_bug("readl"),0) -#define writeb(v,addr) __readwrite_bug("writeb") -#define writew(v,addr) __readwrite_bug("writew") -#define writel(v,addr) __readwrite_bug("writel") - -#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum") - -#define check_signature(io,sig,len) (0) - -#endif /* __mem_pci */ - -/* - * If this architecture has ISA IO, then define the isa_read/isa_write - * macros. - */ -#ifdef __mem_isa - -#define isa_readb(addr) __raw_readb(__mem_isa(addr)) -#define isa_readw(addr) __raw_readw(__mem_isa(addr)) -#define isa_readl(addr) __raw_readl(__mem_isa(addr)) -#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) -#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) -#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) -#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) -#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) -#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) - -#define isa_eth_io_copy_and_sum(a,b,c,d) \ - eth_copy_and_sum((a),__mem_isa(b),(c),(d)) - -static inline int -isa_check_signature(unsigned long io_addr, const unsigned char *signature, - int length) -{ - int retval = 0; - do { - if (isa_readb(io_addr) != *signature) - goto out; - io_addr++; - signature++; - length--; - } while (length); - retval = 1; -out: - return retval; -} - -#else /* __mem_isa */ - -#define isa_readb(addr) (__readwrite_bug("isa_readb"),0) -#define isa_readw(addr) (__readwrite_bug("isa_readw"),0) -#define isa_readl(addr) (__readwrite_bug("isa_readl"),0) -#define isa_writeb(val,addr) __readwrite_bug("isa_writeb") -#define isa_writew(val,addr) __readwrite_bug("isa_writew") -#define isa_writel(val,addr) __readwrite_bug("isa_writel") -#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") -#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") -#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") - -#define isa_eth_io_copy_and_sum(a,b,c,d) \ - __readwrite_bug("isa_eth_io_copy_and_sum") - -#define isa_check_signature(io,sig,len) (0) - -#endif /* __mem_isa */ -#endif /* __KERNEL__ */ -#endif /* __ASM_ARM_IO_H */ diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h deleted file mode 100644 index a1fd03a..0000000 --- a/arch/arm/include/asm/mach-types.h +++ /dev/null @@ -1,42924 +0,0 @@ -/* - * This was automagically generated from arch/arm/tools/mach-types! - * Do NOT edit - */ - -#ifndef __ASM_ARM_MACH_TYPE_H -#define __ASM_ARM_MACH_TYPE_H - -#ifndef __ASSEMBLY__ -/* The type of machine we're running on */ -extern unsigned int __machine_arch_type; -#endif - -/* see arch/arm/kernel/arch.c for a description of these */ -#define MACH_TYPE_EBSA110 0 -#define MACH_TYPE_RISCPC 1 -#define MACH_TYPE_NEXUSPCI 3 -#define MACH_TYPE_EBSA285 4 -#define MACH_TYPE_NETWINDER 5 -#define MACH_TYPE_CATS 6 -#define MACH_TYPE_TBOX 7 -#define MACH_TYPE_CO285 8 -#define MACH_TYPE_CLPS7110 9 -#define MACH_TYPE_ARCHIMEDES 10 -#define MACH_TYPE_A5K 11 -#define MACH_TYPE_ETOILE 12 -#define MACH_TYPE_LACIE_NAS 13 -#define MACH_TYPE_CLPS7500 14 -#define MACH_TYPE_SHARK 15 -#define MACH_TYPE_BRUTUS 16 -#define MACH_TYPE_PERSONAL_SERVER 17 -#define MACH_TYPE_ITSY 18 -#define MACH_TYPE_L7200 19 -#define MACH_TYPE_PLEB 20 -#define MACH_TYPE_INTEGRATOR 21 -#define MACH_TYPE_H3600 22 -#define MACH_TYPE_IXP1200 23 -#define MACH_TYPE_P720T 24 -#define MACH_TYPE_ASSABET 25 -#define MACH_TYPE_VICTOR 26 -#define MACH_TYPE_LART 27 -#define MACH_TYPE_RANGER 28 -#define MACH_TYPE_GRAPHICSCLIENT 29 -#define MACH_TYPE_XP860 30 -#define MACH_TYPE_CERF 31 -#define MACH_TYPE_NANOENGINE 32 -#define MACH_TYPE_FPIC 33 -#define MACH_TYPE_EXTENEX1 34 -#define MACH_TYPE_SHERMAN 35 -#define MACH_TYPE_ACCELENT_SA 36 -#define MACH_TYPE_ACCELENT_L7200 37 -#define MACH_TYPE_NETPORT 38 -#define MACH_TYPE_PANGOLIN 39 -#define MACH_TYPE_YOPY 40 -#define MACH_TYPE_COOLIDGE 41 -#define MACH_TYPE_HUW_WEBPANEL 42 -#define MACH_TYPE_SPOTME 43 -#define MACH_TYPE_FREEBIRD 44 -#define MACH_TYPE_TI925 45 -#define MACH_TYPE_RISCSTATION 46 -#define MACH_TYPE_CAVY 47 -#define MACH_TYPE_JORNADA720 48 -#define MACH_TYPE_OMNIMETER 49 -#define MACH_TYPE_EDB7211 50 -#define MACH_TYPE_CITYGO 51 -#define MACH_TYPE_PFS168 52 -#define MACH_TYPE_SPOT 53 -#define MACH_TYPE_FLEXANET 54 -#define MACH_TYPE_WEBPAL 55 -#define MACH_TYPE_LINPDA 56 -#define MACH_TYPE_ANAKIN 57 -#define MACH_TYPE_MVI 58 -#define MACH_TYPE_JUPITER 59 -#define MACH_TYPE_PSIONW 60 -#define MACH_TYPE_ALN 61 -#define MACH_TYPE_CAMELOT 62 -#define MACH_TYPE_GDS2200 63 -#define MACH_TYPE_PSION_SERIES7 64 -#define MACH_TYPE_XFILE 65 -#define MACH_TYPE_ACCELENT_EP9312 66 -#define MACH_TYPE_IC200 67 -#define MACH_TYPE_CREDITLART 68 -#define MACH_TYPE_HTM 69 -#define MACH_TYPE_IQ80310 70 -#define MACH_TYPE_FREEBOT 71 -#define MACH_TYPE_ENTEL 72 -#define MACH_TYPE_ENP3510 73 -#define MACH_TYPE_TRIZEPS 74 -#define MACH_TYPE_NESA 75 -#define MACH_TYPE_VENUS 76 -#define MACH_TYPE_TARDIS 77 -#define MACH_TYPE_MERCURY 78 -#define MACH_TYPE_EMPEG 79 -#define MACH_TYPE_I80200FCC 80 -#define MACH_TYPE_ITT_CPB 81 -#define MACH_TYPE_SVC 82 -#define MACH_TYPE_ALPHA2 84 -#define MACH_TYPE_ALPHA1 85 -#define MACH_TYPE_NETARM 86 -#define MACH_TYPE_SIMPAD 87 -#define MACH_TYPE_PDA1 88 -#define MACH_TYPE_LUBBOCK 89 -#define MACH_TYPE_ANIKO 90 -#define MACH_TYPE_CLEP7212 91 -#define MACH_TYPE_CS89712 92 -#define MACH_TYPE_WEARARM 93 -#define MACH_TYPE_POSSIO_PX 94 -#define MACH_TYPE_SIDEARM 95 -#define MACH_TYPE_STORK 96 -#define MACH_TYPE_SHANNON 97 -#define MACH_TYPE_ACE 98 -#define MACH_TYPE_BALLYARM 99 -#define MACH_TYPE_SIMPUTER 100 -#define MACH_TYPE_NEXTERM 101 -#define MACH_TYPE_SA1100_ELF 102 -#define MACH_TYPE_GATOR 103 -#define MACH_TYPE_GRANITE 104 -#define MACH_TYPE_CONSUS 105 -#define MACH_TYPE_AAED2000 106 -#define MACH_TYPE_CDB89712 107 -#define MACH_TYPE_GRAPHICSMASTER 108 -#define MACH_TYPE_ADSBITSY 109 -#define MACH_TYPE_PXA_IDP 110 -#define MACH_TYPE_PLCE 111 -#define MACH_TYPE_PT_SYSTEM3 112 -#define MACH_TYPE_MEDALB 113 -#define MACH_TYPE_EAGLE 114 -#define MACH_TYPE_DSC21 115 -#define MACH_TYPE_DSC24 116 -#define MACH_TYPE_TI5472 117 -#define MACH_TYPE_AUTCPU12 118 -#define MACH_TYPE_UENGINE 119 -#define MACH_TYPE_BLUESTEM 120 -#define MACH_TYPE_XINGU8 121 -#define MACH_TYPE_BUSHSTB 122 -#define MACH_TYPE_EPSILON1 123 -#define MACH_TYPE_BALLOON 124 -#define MACH_TYPE_PUPPY 125 -#define MACH_TYPE_ELROY 126 -#define MACH_TYPE_GMS720 127 -#define MACH_TYPE_S24X 128 -#define MACH_TYPE_JTEL_CLEP7312 129 -#define MACH_TYPE_CX821XX 130 -#define MACH_TYPE_EDB7312 131 -#define MACH_TYPE_BSA1110 132 -#define MACH_TYPE_POWERPIN 133 -#define MACH_TYPE_OPENARM 134 -#define MACH_TYPE_WHITECHAPEL 135 -#define MACH_TYPE_H3100 136 -#define MACH_TYPE_H3800 137 -#define MACH_TYPE_BLUE_V1 138 -#define MACH_TYPE_PXA_CERF 139 -#define MACH_TYPE_ARM7TEVB 140 -#define MACH_TYPE_D7400 141 -#define MACH_TYPE_PIRANHA 142 -#define MACH_TYPE_SBCAMELOT 143 -#define MACH_TYPE_KINGS 144 -#define MACH_TYPE_SMDK2400 145 -#define MACH_TYPE_COLLIE 146 -#define MACH_TYPE_IDR 147 -#define MACH_TYPE_BADGE4 148 -#define MACH_TYPE_WEBNET 149 -#define MACH_TYPE_D7300 150 -#define MACH_TYPE_CEP 151 -#define MACH_TYPE_FORTUNET 152 -#define MACH_TYPE_VC547X 153 -#define MACH_TYPE_FILEWALKER 154 -#define MACH_TYPE_NETGATEWAY 155 -#define MACH_TYPE_SYMBOL2800 156 -#define MACH_TYPE_SUNS 157 -#define MACH_TYPE_FRODO 158 -#define MACH_TYPE_MACH_TYTE_MS301 159 -#define MACH_TYPE_MX1ADS 160 -#define MACH_TYPE_H7201 161 -#define MACH_TYPE_H7202 162 -#define MACH_TYPE_AMICO 163 -#define MACH_TYPE_IAM 164 -#define MACH_TYPE_TT530 165 -#define MACH_TYPE_SAM2400 166 -#define MACH_TYPE_JORNADA56X 167 -#define MACH_TYPE_ACTIVE 168 -#define MACH_TYPE_IQ80321 169 -#define MACH_TYPE_WID 170 -#define MACH_TYPE_SABINAL 171 -#define MACH_TYPE_IXP425_MATACUMBE 172 -#define MACH_TYPE_MINIPRINT 173 -#define MACH_TYPE_ADM510X 174 -#define MACH_TYPE_SVS200 175 -#define MACH_TYPE_ATG_TCU 176 -#define MACH_TYPE_JORNADA820 177 -#define MACH_TYPE_S3C44B0 178 -#define MACH_TYPE_MARGIS2 179 -#define MACH_TYPE_KS8695 180 -#define MACH_TYPE_BRH 181 -#define MACH_TYPE_S3C2410 182 -#define MACH_TYPE_POSSIO_PX30 183 -#define MACH_TYPE_S3C2800 184 -#define MACH_TYPE_FLEETWOOD 185 -#define MACH_TYPE_OMAHA 186 -#define MACH_TYPE_TA7 187 -#define MACH_TYPE_NOVA 188 -#define MACH_TYPE_HMK 189 -#define MACH_TYPE_KARO 190 -#define MACH_TYPE_FESTER 191 -#define MACH_TYPE_GPI 192 -#define MACH_TYPE_SMDK2410 193 -#define MACH_TYPE_I519 194 -#define MACH_TYPE_NEXIO 195 -#define MACH_TYPE_BITBOX 196 -#define MACH_TYPE_G200 197 -#define MACH_TYPE_GILL 198 -#define MACH_TYPE_PXA_MERCURY 199 -#define MACH_TYPE_CEIVA 200 -#define MACH_TYPE_FRET 201 -#define MACH_TYPE_EMAILPHONE 202 -#define MACH_TYPE_H3900 203 -#define MACH_TYPE_PXA1 204 -#define MACH_TYPE_KOAN369 205 -#define MACH_TYPE_COGENT 206 -#define MACH_TYPE_ESL_SIMPUTER 207 -#define MACH_TYPE_ESL_SIMPUTER_CLR 208 -#define MACH_TYPE_ESL_SIMPUTER_BW 209 -#define MACH_TYPE_HHP_CRADLE 210 -#define MACH_TYPE_HE500 211 -#define MACH_TYPE_INHANDELF2 212 -#define MACH_TYPE_INHANDFTIP 213 -#define MACH_TYPE_DNP1110 214 -#define MACH_TYPE_PNP1110 215 -#define MACH_TYPE_CSB226 216 -#define MACH_TYPE_ARNOLD 217 -#define MACH_TYPE_VOICEBLUE 218 -#define MACH_TYPE_JZ8028 219 -#define MACH_TYPE_H5400 220 -#define MACH_TYPE_FORTE 221 -#define MACH_TYPE_ACAM 222 -#define MACH_TYPE_ABOX 223 -#define MACH_TYPE_ATMEL 224 -#define MACH_TYPE_SITSANG 225 -#define MACH_TYPE_CPU1110LCDNET 226 -#define MACH_TYPE_MPL_VCMA9 227 -#define MACH_TYPE_OPUS_A1 228 -#define MACH_TYPE_DAYTONA 229 -#define MACH_TYPE_KILLBEAR 230 -#define MACH_TYPE_YOHO 231 -#define MACH_TYPE_JASPER 232 -#define MACH_TYPE_DSC25 233 -#define MACH_TYPE_OMAP_INNOVATOR 234 -#define MACH_TYPE_RAMSES 235 -#define MACH_TYPE_S28X 236 -#define MACH_TYPE_MPORT3 237 -#define MACH_TYPE_PXA_EAGLE250 238 -#define MACH_TYPE_PDB 239 -#define MACH_TYPE_BLUE_2G 240 -#define MACH_TYPE_BLUEARCH 241 -#define MACH_TYPE_IXDP2400 242 -#define MACH_TYPE_IXDP2800 243 -#define MACH_TYPE_EXPLORER 244 -#define MACH_TYPE_IXDP425 245 -#define MACH_TYPE_CHIMP 246 -#define MACH_TYPE_STORK_NEST 247 -#define MACH_TYPE_STORK_EGG 248 -#define MACH_TYPE_WISMO 249 -#define MACH_TYPE_EZLINX 250 -#define MACH_TYPE_AT91RM9200 251 -#define MACH_TYPE_ADTECH_ORION 252 -#define MACH_TYPE_NEPTUNE 253 -#define MACH_TYPE_HACKKIT 254 -#define MACH_TYPE_PXA_WINS30 255 -#define MACH_TYPE_LAVINNA 256 -#define MACH_TYPE_PXA_UENGINE 257 -#define MACH_TYPE_INNOKOM 258 -#define MACH_TYPE_BMS 259 -#define MACH_TYPE_IXCDP1100 260 -#define MACH_TYPE_PRPMC1100 261 -#define MACH_TYPE_AT91RM9200DK 262 -#define MACH_TYPE_ARMSTICK 263 -#define MACH_TYPE_ARMONIE 264 -#define MACH_TYPE_MPORT1 265 -#define MACH_TYPE_S3C5410 266 -#define MACH_TYPE_ZCP320A 267 -#define MACH_TYPE_I_BOX 268 -#define MACH_TYPE_STLC1502 269 -#define MACH_TYPE_SIREN 270 -#define MACH_TYPE_GREENLAKE 271 -#define MACH_TYPE_ARGUS 272 -#define MACH_TYPE_COMBADGE 273 -#define MACH_TYPE_ROKEPXA 274 -#define MACH_TYPE_CINTEGRATOR 275 -#define MACH_TYPE_GUIDEA07 276 -#define MACH_TYPE_TAT257 277 -#define MACH_TYPE_IGP2425 278 -#define MACH_TYPE_BLUEGRAMMA 279 -#define MACH_TYPE_IPOD 280 -#define MACH_TYPE_ADSBITSYX 281 -#define MACH_TYPE_TRIZEPS2 282 -#define MACH_TYPE_VIPER 283 -#define MACH_TYPE_ADSBITSYPLUS 284 -#define MACH_TYPE_ADSAGC 285 -#define MACH_TYPE_STP7312 286 -#define MACH_TYPE_NX_PHNX 287 -#define MACH_TYPE_WEP_EP250 288 -#define MACH_TYPE_INHANDELF3 289 -#define MACH_TYPE_ADI_COYOTE 290 -#define MACH_TYPE_IYONIX 291 -#define MACH_TYPE_DAMICAM_SA1110 292 -#define MACH_TYPE_MEG03 293 -#define MACH_TYPE_PXA_WHITECHAPEL 294 -#define MACH_TYPE_NWSC 295 -#define MACH_TYPE_NWLARM 296 -#define MACH_TYPE_IXP425_MGUARD 297 -#define MACH_TYPE_PXA_NETDCU4 298 -#define MACH_TYPE_IXDP2401 299 -#define MACH_TYPE_IXDP2801 300 -#define MACH_TYPE_ZODIAC 301 -#define MACH_TYPE_ARMMODUL 302 -#define MACH_TYPE_KETOP 303 -#define MACH_TYPE_AV7200 304 -#define MACH_TYPE_ARCH_TI925 305 -#define MACH_TYPE_ACQ200 306 -#define MACH_TYPE_PT_DAFIT 307 -#define MACH_TYPE_IHBA 308 -#define MACH_TYPE_QUINQUE 309 -#define MACH_TYPE_NIMBRAONE 310 -#define MACH_TYPE_NIMBRA29X 311 -#define MACH_TYPE_NIMBRA210 312 -#define MACH_TYPE_HHP_D95XX 313 -#define MACH_TYPE_LABARM 314 -#define MACH_TYPE_M825XX 315 -#define MACH_TYPE_M7100 316 -#define MACH_TYPE_NIPC2 317 -#define MACH_TYPE_FU7202 318 -#define MACH_TYPE_ADSAGX 319 -#define MACH_TYPE_PXA_POOH 320 -#define MACH_TYPE_BANDON 321 -#define MACH_TYPE_PCM7210 322 -#define MACH_TYPE_NMS9200 323 -#define MACH_TYPE_LOGODL 324 -#define MACH_TYPE_M7140 325 -#define MACH_TYPE_KOREBOT 326 -#define MACH_TYPE_IQ31244 327 -#define MACH_TYPE_KOAN393 328 -#define MACH_TYPE_INHANDFTIP3 329 -#define MACH_TYPE_GONZO 330 -#define MACH_TYPE_BAST 331 -#define MACH_TYPE_SCANPASS 332 -#define MACH_TYPE_EP7312_POOH 333 -#define MACH_TYPE_TA7S 334 -#define MACH_TYPE_TA7V 335 -#define MACH_TYPE_ICARUS 336 -#define MACH_TYPE_H1900 337 -#define MACH_TYPE_GEMINI 338 -#define MACH_TYPE_AXIM 339 -#define MACH_TYPE_AUDIOTRON 340 -#define MACH_TYPE_H2200 341 -#define MACH_TYPE_LOOX600 342 -#define MACH_TYPE_NIOP 343 -#define MACH_TYPE_DM310 344 -#define MACH_TYPE_SEEDPXA_C2 345 -#define MACH_TYPE_IXP4XX_MGUARD_PCI 346 -#define MACH_TYPE_H1940 347 -#define MACH_TYPE_SCORPIO 348 -#define MACH_TYPE_VIVA 349 -#define MACH_TYPE_PXA_XCARD 350 -#define MACH_TYPE_CSB335 351 -#define MACH_TYPE_IXRD425 352 -#define MACH_TYPE_IQ80315 353 -#define MACH_TYPE_NMP7312 354 -#define MACH_TYPE_CX861XX 355 -#define MACH_TYPE_ENP2611 356 -#define MACH_TYPE_XDA 357 -#define MACH_TYPE_CSIR_IMS 358 -#define MACH_TYPE_IXP421_DNAEETH 359 -#define MACH_TYPE_POCKETSERV9200 360 -#define MACH_TYPE_TOTO 361 -#define MACH_TYPE_S3C2440 362 -#define MACH_TYPE_KS8695P 363 -#define MACH_TYPE_SE4000 364 -#define MACH_TYPE_QUADRICEPS 365 -#define MACH_TYPE_BRONCO 366 -#define MACH_TYPE_ESL_WIRELESS_TAB 367 -#define MACH_TYPE_ESL_SOFCOMP 368 -#define MACH_TYPE_S5C7375 369 -#define MACH_TYPE_SPEARHEAD 370 -#define MACH_TYPE_PANTERA 371 -#define MACH_TYPE_PRAYOGLITE 372 -#define MACH_TYPE_GUMSTIX 373 -#define MACH_TYPE_RCUBE 374 -#define MACH_TYPE_REA_OLV 375 -#define MACH_TYPE_PXA_IPHONE 376 -#define MACH_TYPE_S3C3410 377 -#define MACH_TYPE_ESPD_4510B 378 -#define MACH_TYPE_MP1X 379 -#define MACH_TYPE_AT91RM9200TB 380 -#define MACH_TYPE_ADSVGX 381 -#define MACH_TYPE_OMAP_H2 382 -#define MACH_TYPE_PELEE 383 -#define MACH_TYPE_E740 384 -#define MACH_TYPE_IQ80331 385 -#define MACH_TYPE_VERSATILE_PB 387 -#define MACH_TYPE_KEV7A400 388 -#define MACH_TYPE_LPD7A400 389 -#define MACH_TYPE_LPD7A404 390 -#define MACH_TYPE_FUJITSU_CAMELOT 391 -#define MACH_TYPE_JANUS2M 392 -#define MACH_TYPE_EMBTF 393 -#define MACH_TYPE_HPM 394 -#define MACH_TYPE_SMDK2410TK 395 -#define MACH_TYPE_SMDK2410AJ 396 -#define MACH_TYPE_STREETRACER 397 -#define MACH_TYPE_EFRAME 398 -#define MACH_TYPE_CSB337 399 -#define MACH_TYPE_PXA_LARK 400 -#define MACH_TYPE_PNP2110 401 -#define MACH_TYPE_TCC72X 402 -#define MACH_TYPE_ALTAIR 403 -#define MACH_TYPE_KC3 404 -#define MACH_TYPE_SINTEFTD 405 -#define MACH_TYPE_MAINSTONE 406 -#define MACH_TYPE_ADAY4X 407 -#define MACH_TYPE_LITE300 408 -#define MACH_TYPE_S5C7376 409 -#define MACH_TYPE_MT02 410 -#define MACH_TYPE_MPORT3S 411 -#define MACH_TYPE_RA_ALPHA 412 -#define MACH_TYPE_XCEP 413 -#define MACH_TYPE_ARCOM_VULCAN 414 -#define MACH_TYPE_STARGATE 415 -#define MACH_TYPE_ARMADILLOJ 416 -#define MACH_TYPE_ELROY_JACK 417 -#define MACH_TYPE_BACKEND 418 -#define MACH_TYPE_S5LINBOX 419 -#define MACH_TYPE_NOMADIK 420 -#define MACH_TYPE_IA_CPU_9200 421 -#define MACH_TYPE_AT91_BJA1 422 -#define MACH_TYPE_CORGI 423 -#define MACH_TYPE_POODLE 424 -#define MACH_TYPE_TEN 425 -#define MACH_TYPE_ROVERP5P 426 -#define MACH_TYPE_SC2700 427 -#define MACH_TYPE_EX_EAGLE 428 -#define MACH_TYPE_NX_PXA12 429 -#define MACH_TYPE_NX_PXA5 430 -#define MACH_TYPE_BLACKBOARD2 431 -#define MACH_TYPE_I819 432 -#define MACH_TYPE_IXMB995E 433 -#define MACH_TYPE_SKYRIDER 434 -#define MACH_TYPE_SKYHAWK 435 -#define MACH_TYPE_ENTERPRISE 436 -#define MACH_TYPE_DEP2410 437 -#define MACH_TYPE_ARMCORE 438 -#define MACH_TYPE_HOBBIT 439 -#define MACH_TYPE_H7210 440 -#define MACH_TYPE_PXA_NETDCU5 441 -#define MACH_TYPE_ACC 442 -#define MACH_TYPE_ESL_SARVA 443 -#define MACH_TYPE_XM250 444 -#define MACH_TYPE_T6TC1XB 445 -#define MACH_TYPE_ESS710 446 -#define MACH_TYPE_MX31ADS 447 -#define MACH_TYPE_HIMALAYA 448 -#define MACH_TYPE_BOLFENK 449 -#define MACH_TYPE_AT91RM9200KR 450 -#define MACH_TYPE_EDB9312 451 -#define MACH_TYPE_OMAP_GENERIC 452 -#define MACH_TYPE_AXIMX3 453 -#define MACH_TYPE_EB67XDIP 454 -#define MACH_TYPE_WEBTXS 455 -#define MACH_TYPE_HAWK 456 -#define MACH_TYPE_CCAT91SBC001 457 -#define MACH_TYPE_EXPRESSO 458 -#define MACH_TYPE_H4000 459 -#define MACH_TYPE_DINO 460 -#define MACH_TYPE_ML675K 461 -#define MACH_TYPE_EDB9301 462 -#define MACH_TYPE_EDB9315 463 -#define MACH_TYPE_RECIVA_TT 464 -#define MACH_TYPE_CSTCB01 465 -#define MACH_TYPE_CSTCB1 466 -#define MACH_TYPE_SHADWELL 467 -#define MACH_TYPE_GOEPEL263 468 -#define MACH_TYPE_ACQ100 469 -#define MACH_TYPE_MX1FS2 470 -#define MACH_TYPE_HIPTOP_G1 471 -#define MACH_TYPE_SPARKY 472 -#define MACH_TYPE_NS9750 473 -#define MACH_TYPE_PHOENIX 474 -#define MACH_TYPE_VR1000 475 -#define MACH_TYPE_DEISTERPXA 476 -#define MACH_TYPE_BCM1160 477 -#define MACH_TYPE_PCM022 478 -#define MACH_TYPE_ADSGCX 479 -#define MACH_TYPE_DREADNAUGHT 480 -#define MACH_TYPE_DM320 481 -#define MACH_TYPE_MARKOV 482 -#define MACH_TYPE_COS7A400 483 -#define MACH_TYPE_MILANO 484 -#define MACH_TYPE_UE9328 485 -#define MACH_TYPE_UEX255 486 -#define MACH_TYPE_UE2410 487 -#define MACH_TYPE_A620 488 -#define MACH_TYPE_OCELOT 489 -#define MACH_TYPE_CHEETAH 490 -#define MACH_TYPE_OMAP_PERSEUS2 491 -#define MACH_TYPE_ZVUE 492 -#define MACH_TYPE_ROVERP1 493 -#define MACH_TYPE_ASIDIAL2 494 -#define MACH_TYPE_S3C24A0 495 -#define MACH_TYPE_E800 496 -#define MACH_TYPE_E750 497 -#define MACH_TYPE_S3C5500 498 -#define MACH_TYPE_SMDK5500 499 -#define MACH_TYPE_SIGNALSYNC 500 -#define MACH_TYPE_NBC 501 -#define MACH_TYPE_KODIAK 502 -#define MACH_TYPE_NETBOOKPRO 503 -#define MACH_TYPE_HW90200 504 -#define MACH_TYPE_CONDOR 505 -#define MACH_TYPE_CUP 506 -#define MACH_TYPE_KITE 507 -#define MACH_TYPE_SCB9328 508 -#define MACH_TYPE_OMAP_H3 509 -#define MACH_TYPE_OMAP_H4 510 -#define MACH_TYPE_N10 511 -#define MACH_TYPE_MONTAJADE 512 -#define MACH_TYPE_SG560 513 -#define MACH_TYPE_DP1000 514 -#define MACH_TYPE_OMAP_OSK 515 -#define MACH_TYPE_RG100V3 516 -#define MACH_TYPE_MX2ADS 517 -#define MACH_TYPE_PXA_KILO 518 -#define MACH_TYPE_IXP4XX_EAGLE 519 -#define MACH_TYPE_TOSA 520 -#define MACH_TYPE_MB2520F 521 -#define MACH_TYPE_EMC1000 522 -#define MACH_TYPE_TIDSC25 523 -#define MACH_TYPE_AKCPMXL 524 -#define MACH_TYPE_AV3XX 525 -#define MACH_TYPE_AVILA 526 -#define MACH_TYPE_PXA_MPM10 527 -#define MACH_TYPE_PXA_KYANITE 528 -#define MACH_TYPE_SGOLD 529 -#define MACH_TYPE_OSCAR 530 -#define MACH_TYPE_EPXA4USB2 531 -#define MACH_TYPE_XSENGINE 532 -#define MACH_TYPE_IP600 533 -#define MACH_TYPE_MCAN2 534 -#define MACH_TYPE_DDI_BLUERIDGE 535 -#define MACH_TYPE_SKYMINDER 536 -#define MACH_TYPE_LPD79520 537 -#define MACH_TYPE_EDB9302 538 -#define MACH_TYPE_HW90340 539 -#define MACH_TYPE_CIP_BOX 540 -#define MACH_TYPE_IVPN 541 -#define MACH_TYPE_RSOC2 542 -#define MACH_TYPE_HUSKY 543 -#define MACH_TYPE_BOXER 544 -#define MACH_TYPE_SHEPHERD 545 -#define MACH_TYPE_AML42800AA 546 -#define MACH_TYPE_LPC2294 548 -#define MACH_TYPE_SWITCHGRASS 549 -#define MACH_TYPE_ENS_CMU 550 -#define MACH_TYPE_MM6_SDB 551 -#define MACH_TYPE_SATURN 552 -#define MACH_TYPE_I30030EVB 553 -#define MACH_TYPE_MXC27530EVB 554 -#define MACH_TYPE_SMDK2800 555 -#define MACH_TYPE_MTWILSON 556 -#define MACH_TYPE_ZITI 557 -#define MACH_TYPE_GRANDFATHER 558 -#define MACH_TYPE_TENGINE 559 -#define MACH_TYPE_S3C2460 560 -#define MACH_TYPE_PDM 561 -#define MACH_TYPE_H4700 562 -#define MACH_TYPE_H6300 563 -#define MACH_TYPE_RZ1700 564 -#define MACH_TYPE_A716 565 -#define MACH_TYPE_ESTK2440A 566 -#define MACH_TYPE_ATWIXP425 567 -#define MACH_TYPE_CSB336 568 -#define MACH_TYPE_RIRM2 569 -#define MACH_TYPE_CX23518 570 -#define MACH_TYPE_CX2351X 571 -#define MACH_TYPE_COMPUTIME 572 -#define MACH_TYPE_IZARUS 573 -#define MACH_TYPE_RTS 574 -#define MACH_TYPE_SE5100 575 -#define MACH_TYPE_S3C2510 576 -#define MACH_TYPE_CSB437TL 577 -#define MACH_TYPE_SLAUSON 578 -#define MACH_TYPE_PEARLRIVER 579 -#define MACH_TYPE_TDC_P210 580 -#define MACH_TYPE_SG580 581 -#define MACH_TYPE_WRSBCARM7 582 -#define MACH_TYPE_IPD 583 -#define MACH_TYPE_PXA_DNP2110 584 -#define MACH_TYPE_XAENIAX 585 -#define MACH_TYPE_SOMN4250 586 -#define MACH_TYPE_PLEB2 587 -#define MACH_TYPE_CORNWALLIS 588 -#define MACH_TYPE_GURNEY_DRV 589 -#define MACH_TYPE_CHAFFEE 590 -#define MACH_TYPE_RMS101 591 -#define MACH_TYPE_RX3715 592 -#define MACH_TYPE_SWIFT 593 -#define MACH_TYPE_ROVERP7 594 -#define MACH_TYPE_PR818S 595 -#define MACH_TYPE_TRXPRO 596 -#define MACH_TYPE_NSLU2 597 -#define MACH_TYPE_E400 598 -#define MACH_TYPE_TRAB 599 -#define MACH_TYPE_CMC_PU2 600 -#define MACH_TYPE_FULCRUM 601 -#define MACH_TYPE_NETGATE42X 602 -#define MACH_TYPE_STR710 603 -#define MACH_TYPE_IXDPG425 604 -#define MACH_TYPE_TOMTOMGO 605 -#define MACH_TYPE_VERSATILE_AB 606 -#define MACH_TYPE_EDB9307 607 -#define MACH_TYPE_SG565 608 -#define MACH_TYPE_LPD79524 609 -#define MACH_TYPE_LPD79525 610 -#define MACH_TYPE_RMS100 611 -#define MACH_TYPE_KB9200 612 -#define MACH_TYPE_SX1 613 -#define MACH_TYPE_HMS39C7092 614 -#define MACH_TYPE_ARMADILLO 615 -#define MACH_TYPE_IPCU 616 -#define MACH_TYPE_LOOX720 617 -#define MACH_TYPE_IXDP465 618 -#define MACH_TYPE_IXDP2351 619 -#define MACH_TYPE_ADSVIX 620 -#define MACH_TYPE_DM270 621 -#define MACH_TYPE_SOCLTPLUS 622 -#define MACH_TYPE_ECIA 623 -#define MACH_TYPE_CM4008 624 -#define MACH_TYPE_P2001 625 -#define MACH_TYPE_TWISTER 626 -#define MACH_TYPE_MUDSHARK 627 -#define MACH_TYPE_HB2 628 -#define MACH_TYPE_IQ80332 629 -#define MACH_TYPE_SENDT 630 -#define MACH_TYPE_MX2JAZZ 631 -#define MACH_TYPE_MULTIIO 632 -#define MACH_TYPE_HRDISPLAY 633 -#define MACH_TYPE_MXC27530ADS 634 -#define MACH_TYPE_TRIZEPS3 635 -#define MACH_TYPE_ZEFEERDZA 636 -#define MACH_TYPE_ZEFEERDZB 637 -#define MACH_TYPE_ZEFEERDZG 638 -#define MACH_TYPE_ZEFEERDZN 639 -#define MACH_TYPE_ZEFEERDZQ 640 -#define MACH_TYPE_GTWX5715 641 -#define MACH_TYPE_ASTRO_JACK 643 -#define MACH_TYPE_TIP03 644 -#define MACH_TYPE_A9200EC 645 -#define MACH_TYPE_PNX0105 646 -#define MACH_TYPE_ADCPOECPU 647 -#define MACH_TYPE_CSB637 648 -#define MACH_TYPE_MB9200 650 -#define MACH_TYPE_KULUN 651 -#define MACH_TYPE_SNAPPER 652 -#define MACH_TYPE_OPTIMA 653 -#define MACH_TYPE_DLHSBC 654 -#define MACH_TYPE_X30 655 -#define MACH_TYPE_N30 656 -#define MACH_TYPE_MANGA_KS8695 657 -#define MACH_TYPE_AJAX 658 -#define MACH_TYPE_NEC_MP900 659 -#define MACH_TYPE_VVTK1000 661 -#define MACH_TYPE_KAFA 662 -#define MACH_TYPE_VVTK3000 663 -#define MACH_TYPE_PIMX1 664 -#define MACH_TYPE_OLLIE 665 -#define MACH_TYPE_SKYMAX 666 -#define MACH_TYPE_JAZZ 667 -#define MACH_TYPE_TEL_T3 668 -#define MACH_TYPE_AISINO_FCR255 669 -#define MACH_TYPE_BTWEB 670 -#define MACH_TYPE_DBG_LH79520 671 -#define MACH_TYPE_CM41XX 672 -#define MACH_TYPE_TS72XX 673 -#define MACH_TYPE_NGGPXA 674 -#define MACH_TYPE_CSB535 675 -#define MACH_TYPE_CSB536 676 -#define MACH_TYPE_PXA_TRAKPOD 677 -#define MACH_TYPE_PRAXIS 678 -#define MACH_TYPE_LH75411 679 -#define MACH_TYPE_OTOM 680 -#define MACH_TYPE_NEXCODER_2440 681 -#define MACH_TYPE_LOOX410 682 -#define MACH_TYPE_WESTLAKE 683 -#define MACH_TYPE_NSB 684 -#define MACH_TYPE_ESL_SARVA_STN 685 -#define MACH_TYPE_ESL_SARVA_TFT 686 -#define MACH_TYPE_ESL_SARVA_IAD 687 -#define MACH_TYPE_ESL_SARVA_ACC 688 -#define MACH_TYPE_TYPHOON 689 -#define MACH_TYPE_CNAV 690 -#define MACH_TYPE_A730 691 -#define MACH_TYPE_NETSTAR 692 -#define MACH_TYPE_PHASEFALE_SUPERCON 693 -#define MACH_TYPE_SHIVA1100 694 -#define MACH_TYPE_ETEXSC 695 -#define MACH_TYPE_IXDPG465 696 -#define MACH_TYPE_A9M2410 697 -#define MACH_TYPE_A9M2440 698 -#define MACH_TYPE_A9M9750 699 -#define MACH_TYPE_A9M9360 700 -#define MACH_TYPE_UNC90 701 -#define MACH_TYPE_ECO920 702 -#define MACH_TYPE_SATVIEW 703 -#define MACH_TYPE_ROADRUNNER 704 -#define MACH_TYPE_AT91RM9200EK 705 -#define MACH_TYPE_GP32 706 -#define MACH_TYPE_GEM 707 -#define MACH_TYPE_I858 708 -#define MACH_TYPE_HX2750 709 -#define MACH_TYPE_MXC91131EVB 710 -#define MACH_TYPE_P700 711 -#define MACH_TYPE_CPE 712 -#define MACH_TYPE_SPITZ 713 -#define MACH_TYPE_NIMBRA340 714 -#define MACH_TYPE_LPC22XX 715 -#define MACH_TYPE_COMET3 716 -#define MACH_TYPE_COMET4 717 -#define MACH_TYPE_CSB625 718 -#define MACH_TYPE_FORTUNET2 719 -#define MACH_TYPE_S5H2200 720 -#define MACH_TYPE_OPTORM920 721 -#define MACH_TYPE_ADSBITSYXB 722 -#define MACH_TYPE_ADSSPHERE 723 -#define MACH_TYPE_ADSPORTAL 724 -#define MACH_TYPE_LN2410SBC 725 -#define MACH_TYPE_CB3RUFC 726 -#define MACH_TYPE_MP2USB 727 -#define MACH_TYPE_NTNP425C 728 -#define MACH_TYPE_COLIBRI 729 -#define MACH_TYPE_PCM7220 730 -#define MACH_TYPE_GATEWAY7001 731 -#define MACH_TYPE_PCM027 732 -#define MACH_TYPE_CMPXA 733 -#define MACH_TYPE_ANUBIS 734 -#define MACH_TYPE_ITE8152 735 -#define MACH_TYPE_LPC3XXX 736 -#define MACH_TYPE_PUPPETEER 737 -#define MACH_TYPE_E570 739 -#define MACH_TYPE_X50 740 -#define MACH_TYPE_RECON 741 -#define MACH_TYPE_XBOARDGP8 742 -#define MACH_TYPE_FPIC2 743 -#define MACH_TYPE_AKITA 744 -#define MACH_TYPE_A81 745 -#define MACH_TYPE_SVM_SC25X 746 -#define MACH_TYPE_VADATECH020 747 -#define MACH_TYPE_TLI 748 -#define MACH_TYPE_EDB9315LC 749 -#define MACH_TYPE_PASSEC 750 -#define MACH_TYPE_DS_TIGER 751 -#define MACH_TYPE_E310 752 -#define MACH_TYPE_E330 753 -#define MACH_TYPE_RT3000 754 -#define MACH_TYPE_NOKIA770 755 -#define MACH_TYPE_PNX0106 756 -#define MACH_TYPE_HX21XX 757 -#define MACH_TYPE_FARADAY 758 -#define MACH_TYPE_SBC9312 759 -#define MACH_TYPE_BATMAN 760 -#define MACH_TYPE_JPD201 761 -#define MACH_TYPE_MIPSA 762 -#define MACH_TYPE_KACOM 763 -#define MACH_TYPE_SWARCOCPU 764 -#define MACH_TYPE_SWARCODSL 765 -#define MACH_TYPE_BLUEANGEL 766 -#define MACH_TYPE_HAIRYGRAMA 767 -#define MACH_TYPE_BANFF 768 -#define MACH_TYPE_CARMEVA 769 -#define MACH_TYPE_SAM255 770 -#define MACH_TYPE_PPM10 771 -#define MACH_TYPE_EDB9315A 772 -#define MACH_TYPE_SUNSET 773 -#define MACH_TYPE_STARGATE2 774 -#define MACH_TYPE_INTELMOTE2 775 -#define MACH_TYPE_TRIZEPS4 776 -#define MACH_TYPE_MAINSTONE2 777 -#define MACH_TYPE_EZ_IXP42X 778 -#define MACH_TYPE_TAPWAVE_ZODIAC 779 -#define MACH_TYPE_UNIVERSALMETER 780 -#define MACH_TYPE_HICOARM9 781 -#define MACH_TYPE_PNX4008 782 -#define MACH_TYPE_KWS6000 783 -#define MACH_TYPE_PORTUX920T 784 -#define MACH_TYPE_EZ_X5 785 -#define MACH_TYPE_OMAP_RUDOLPH 786 -#define MACH_TYPE_CPUAT91 787 -#define MACH_TYPE_REA9200 788 -#define MACH_TYPE_ACTS_PUNE_SA1110 789 -#define MACH_TYPE_IXP425 790 -#define MACH_TYPE_I30030ADS 791 -#define MACH_TYPE_PERCH 792 -#define MACH_TYPE_EIS05R1 793 -#define MACH_TYPE_PEPPERPAD 794 -#define MACH_TYPE_SB3010 795 -#define MACH_TYPE_RM9200 796 -#define MACH_TYPE_DMA03 797 -#define MACH_TYPE_ROAD_S101 798 -#define MACH_TYPE_IQ81340SC 799 -#define MACH_TYPE_IQ_NEXTGEN_B 800 -#define MACH_TYPE_IQ81340MC 801 -#define MACH_TYPE_IQ_NEXTGEN_D 802 -#define MACH_TYPE_IQ_NEXTGEN_E 803 -#define MACH_TYPE_MALLOW_AT91 804 -#define MACH_TYPE_CYBERTRACKER_I 805 -#define MACH_TYPE_GESBC931X 806 -#define MACH_TYPE_CENTIPAD 807 -#define MACH_TYPE_ARMSOC 808 -#define MACH_TYPE_SE4200 809 -#define MACH_TYPE_EMS197A 810 -#define MACH_TYPE_MICRO9 811 -#define MACH_TYPE_MICRO9L 812 -#define MACH_TYPE_UC5471DSP 813 -#define MACH_TYPE_SJ5471ENG 814 -#define MACH_TYPE_CMPXA26X 815 -#define MACH_TYPE_NC 816 -#define MACH_TYPE_OMAP_PALMTE 817 -#define MACH_TYPE_AJAX52X 818 -#define MACH_TYPE_SIRIUSTAR 819 -#define MACH_TYPE_IODATA_HDLG 820 -#define MACH_TYPE_AT91RM9200UTL 821 -#define MACH_TYPE_BIOSAFE 822 -#define MACH_TYPE_MP1000 823 -#define MACH_TYPE_PARSY 824 -#define MACH_TYPE_CCXP 825 -#define MACH_TYPE_OMAP_GSAMPLE 826 -#define MACH_TYPE_REALVIEW_EB 827 -#define MACH_TYPE_SAMOA 828 -#define MACH_TYPE_PALMT3 829 -#define MACH_TYPE_I878 830 -#define MACH_TYPE_BORZOI 831 -#define MACH_TYPE_GECKO 832 -#define MACH_TYPE_DS101 833 -#define MACH_TYPE_OMAP_PALMTT2 834 -#define MACH_TYPE_PALMLD 835 -#define MACH_TYPE_CC9C 836 -#define MACH_TYPE_SBC1670 837 -#define MACH_TYPE_IXDP28X5 838 -#define MACH_TYPE_OMAP_PALMTT 839 -#define MACH_TYPE_ML696K 840 -#define MACH_TYPE_ARCOM_ZEUS 841 -#define MACH_TYPE_OSIRIS 842 -#define MACH_TYPE_MAESTRO 843 -#define MACH_TYPE_PALMTE2 844 -#define MACH_TYPE_IXBBM 845 -#define MACH_TYPE_MX27ADS 846 -#define MACH_TYPE_AX8004 847 -#define MACH_TYPE_AT91SAM9261EK 848 -#define MACH_TYPE_LOFT 849 -#define MACH_TYPE_MAGPIE 850 -#define MACH_TYPE_MX21ADS 851 -#define MACH_TYPE_MB87M3400 852 -#define MACH_TYPE_MGUARD_DELTA 853 -#define MACH_TYPE_DAVINCI_DVDP 854 -#define MACH_TYPE_HTCUNIVERSAL 855 -#define MACH_TYPE_TPAD 856 -#define MACH_TYPE_ROVERP3 857 -#define MACH_TYPE_JORNADA928 858 -#define MACH_TYPE_MV88FXX81 859 -#define MACH_TYPE_STMP36XX 860 -#define MACH_TYPE_SXNI79524 861 -#define MACH_TYPE_AMS_DELTA 862 -#define MACH_TYPE_URANIUM 863 -#define MACH_TYPE_UCON 864 -#define MACH_TYPE_NAS100D 865 -#define MACH_TYPE_L083_1000 866 -#define MACH_TYPE_EZX 867 -#define MACH_TYPE_PNX5220 868 -#define MACH_TYPE_BUTTE 869 -#define MACH_TYPE_SRM2 870 -#define MACH_TYPE_DSBR 871 -#define MACH_TYPE_CRYSTALBALL 872 -#define MACH_TYPE_TINYPXA27X 873 -#define MACH_TYPE_HERBIE 874 -#define MACH_TYPE_MAGICIAN 875 -#define MACH_TYPE_CM4002 876 -#define MACH_TYPE_B4 877 -#define MACH_TYPE_MAUI 878 -#define MACH_TYPE_CYBERTRACKER_G 879 -#define MACH_TYPE_NXDKN 880 -#define MACH_TYPE_MIO8390 881 -#define MACH_TYPE_OMI_BOARD 882 -#define MACH_TYPE_MX21CIV 883 -#define MACH_TYPE_MAHI_CDAC 884 -#define MACH_TYPE_PALMTX 885 -#define MACH_TYPE_S3C2413 887 -#define MACH_TYPE_SAMSYS_EP0 888 -#define MACH_TYPE_WG302V1 889 -#define MACH_TYPE_WG302V2 890 -#define MACH_TYPE_EB42X 891 -#define MACH_TYPE_IQ331ES 892 -#define MACH_TYPE_COSYDSP 893 -#define MACH_TYPE_UPLAT7D 894 -#define MACH_TYPE_PTDAVINCI 895 -#define MACH_TYPE_MBUS 896 -#define MACH_TYPE_NADIA2VB 897 -#define MACH_TYPE_R1000 898 -#define MACH_TYPE_HW90250 899 -#define MACH_TYPE_OMAP_2430SDP 900 -#define MACH_TYPE_DAVINCI_EVM 901 -#define MACH_TYPE_OMAP_TORNADO 902 -#define MACH_TYPE_OLOCREEK 903 -#define MACH_TYPE_PALMZ72 904 -#define MACH_TYPE_NXDB500 905 -#define MACH_TYPE_APF9328 906 -#define MACH_TYPE_OMAP_WIPOQ 907 -#define MACH_TYPE_OMAP_TWIP 908 -#define MACH_TYPE_TREO650 909 -#define MACH_TYPE_ACUMEN 910 -#define MACH_TYPE_XP100 911 -#define MACH_TYPE_FS2410 912 -#define MACH_TYPE_PXA270_CERF 913 -#define MACH_TYPE_SQ2FTLPALM 914 -#define MACH_TYPE_BSEMSERVER 915 -#define MACH_TYPE_NETCLIENT 916 -#define MACH_TYPE_PALMT5 917 -#define MACH_TYPE_PALMTC 918 -#define MACH_TYPE_OMAP_APOLLON 919 -#define MACH_TYPE_MXC30030EVB 920 -#define MACH_TYPE_REA_2D 921 -#define MACH_TYPE_TI3E524 922 -#define MACH_TYPE_ATEB9200 923 -#define MACH_TYPE_AUCKLAND 924 -#define MACH_TYPE_AK3320M 925 -#define MACH_TYPE_DURAMAX 926 -#define MACH_TYPE_N35 927 -#define MACH_TYPE_PRONGHORN 928 -#define MACH_TYPE_FUNDY 929 -#define MACH_TYPE_LOGICPD_PXA270 930 -#define MACH_TYPE_CPU777 931 -#define MACH_TYPE_SIMICON9201 932 -#define MACH_TYPE_LEAP2_HPM 933 -#define MACH_TYPE_CM922TXA10 934 -#define MACH_TYPE_PXA 935 -#define MACH_TYPE_SANDGATE2 936 -#define MACH_TYPE_SANDGATE2G 937 -#define MACH_TYPE_SANDGATE2P 938 -#define MACH_TYPE_FRED_JACK 939 -#define MACH_TYPE_TTG_COLOR1 940 -#define MACH_TYPE_NXEB500HMI 941 -#define MACH_TYPE_NETDCU8 942 -#define MACH_TYPE_NG_FVX538 944 -#define MACH_TYPE_NG_FVS338 945 -#define MACH_TYPE_PNX4103 946 -#define MACH_TYPE_HESDB 947 -#define MACH_TYPE_XSILO 948 -#define MACH_TYPE_ESPRESSO 949 -#define MACH_TYPE_EMLC 950 -#define MACH_TYPE_SISTERON 951 -#define MACH_TYPE_RX1950 952 -#define MACH_TYPE_TSC_VENUS 953 -#define MACH_TYPE_DS101J 954 -#define MACH_TYPE_MXC30030ADS 955 -#define MACH_TYPE_FUJITSU_WIMAXSOC 956 -#define MACH_TYPE_DUALPCMODEM 957 -#define MACH_TYPE_GESBC9312 958 -#define MACH_TYPE_HTCAPACHE 959 -#define MACH_TYPE_IXDP435 960 -#define MACH_TYPE_CATPROVT100 961 -#define MACH_TYPE_PICOTUX1XX 962 -#define MACH_TYPE_PICOTUX2XX 963 -#define MACH_TYPE_DSMG600 964 -#define MACH_TYPE_EMPC2 965 -#define MACH_TYPE_VENTURA 966 -#define MACH_TYPE_PHIDGET_SBC 967 -#define MACH_TYPE_IJ3K 968 -#define MACH_TYPE_PISGAH 969 -#define MACH_TYPE_OMAP_FSAMPLE 970 -#define MACH_TYPE_SG720 971 -#define MACH_TYPE_REDFOX 972 -#define MACH_TYPE_MYSH_EP9315_1 973 -#define MACH_TYPE_TPF106 974 -#define MACH_TYPE_AT91RM9200KG 975 -#define MACH_TYPE_SLEDB 976 -#define MACH_TYPE_ONTRACK 977 -#define MACH_TYPE_PM1200 978 -#define MACH_TYPE_ESS24XXX 979 -#define MACH_TYPE_COREMP7 980 -#define MACH_TYPE_NEXCODER_6446 981 -#define MACH_TYPE_STVC8380 982 -#define MACH_TYPE_TEKLYNX 983 -#define MACH_TYPE_CARBONADO 984 -#define MACH_TYPE_SYSMOS_MP730 985 -#define MACH_TYPE_SNAPPER_CL15 986 -#define MACH_TYPE_PGIGIM 987 -#define MACH_TYPE_PTX9160P2 988 -#define MACH_TYPE_DCORE1 989 -#define MACH_TYPE_VICTORPXA 990 -#define MACH_TYPE_MX2DTB 991 -#define MACH_TYPE_PXA_IREX_ER0100 992 -#define MACH_TYPE_OMAP_PALMZ71 993 -#define MACH_TYPE_BARTEC_DEG 994 -#define MACH_TYPE_HW50251 995 -#define MACH_TYPE_IBOX 996 -#define MACH_TYPE_ATLASLH7A404 997 -#define MACH_TYPE_PT2026 998 -#define MACH_TYPE_HTCALPINE 999 -#define MACH_TYPE_BARTEC_VTU 1000 -#define MACH_TYPE_VCOREII 1001 -#define MACH_TYPE_PDNB3 1002 -#define MACH_TYPE_HTCBEETLES 1003 -#define MACH_TYPE_S3C6400 1004 -#define MACH_TYPE_S3C2443 1005 -#define MACH_TYPE_OMAP_LDK 1006 -#define MACH_TYPE_SMDK2460 1007 -#define MACH_TYPE_SMDK2440 1008 -#define MACH_TYPE_SMDK2412 1009 -#define MACH_TYPE_WEBBOX 1010 -#define MACH_TYPE_CWWNDP 1011 -#define MACH_TYPE_DRAGON 1012 -#define MACH_TYPE_OPENDO_CPU_BOARD 1013 -#define MACH_TYPE_CCM2200 1014 -#define MACH_TYPE_ETWARM 1015 -#define MACH_TYPE_M93030 1016 -#define MACH_TYPE_CC7U 1017 -#define MACH_TYPE_MTT_RANGER 1018 -#define MACH_TYPE_NEXUS 1019 -#define MACH_TYPE_DESMAN 1020 -#define MACH_TYPE_BKDE303 1021 -#define MACH_TYPE_SMDK2413 1022 -#define MACH_TYPE_AML_M7200 1023 -#define MACH_TYPE_AML_M5900 1024 -#define MACH_TYPE_SG640 1025 -#define MACH_TYPE_EDG79524 1026 -#define MACH_TYPE_AI2410 1027 -#define MACH_TYPE_IXP465 1028 -#define MACH_TYPE_BALLOON3 1029 -#define MACH_TYPE_HEINS 1030 -#define MACH_TYPE_MPLUSEVA 1031 -#define MACH_TYPE_RT042 1032 -#define MACH_TYPE_CWIEM 1033 -#define MACH_TYPE_CM_X270 1034 -#define MACH_TYPE_CM_X255 1035 -#define MACH_TYPE_ESH_AT91 1036 -#define MACH_TYPE_SANDGATE3 1037 -#define MACH_TYPE_PRIMO 1038 -#define MACH_TYPE_GEMSTONE 1039 -#define MACH_TYPE_PRONGHORNMETRO 1040 -#define MACH_TYPE_SIDEWINDER 1041 -#define MACH_TYPE_PICOMOD1 1042 -#define MACH_TYPE_SG590 1043 -#define MACH_TYPE_AKAI9307 1044 -#define MACH_TYPE_FONTAINE 1045 -#define MACH_TYPE_WOMBAT 1046 -#define MACH_TYPE_ACQ300 1047 -#define MACH_TYPE_MOD_270 1048 -#define MACH_TYPE_VC0820 1049 -#define MACH_TYPE_ANI_AIM 1050 -#define MACH_TYPE_JELLYFISH 1051 -#define MACH_TYPE_AMANITA 1052 -#define MACH_TYPE_VLINK 1053 -#define MACH_TYPE_DEXFLEX 1054 -#define MACH_TYPE_EIGEN_TTQ 1055 -#define MACH_TYPE_ARCOM_TITAN 1056 -#define MACH_TYPE_TABLA 1057 -#define MACH_TYPE_MDIRAC3 1058 -#define MACH_TYPE_MRHFBP2 1059 -#define MACH_TYPE_AT91RM9200RB 1060 -#define MACH_TYPE_ANI_APM 1061 -#define MACH_TYPE_ELLA1 1062 -#define MACH_TYPE_INHAND_PXA27X 1063 -#define MACH_TYPE_INHAND_PXA25X 1064 -#define MACH_TYPE_EMPOS_XM 1065 -#define MACH_TYPE_EMPOS 1066 -#define MACH_TYPE_EMPOS_TINY 1067 -#define MACH_TYPE_EMPOS_SM 1068 -#define MACH_TYPE_EGRET 1069 -#define MACH_TYPE_OSTRICH 1070 -#define MACH_TYPE_N50 1071 -#define MACH_TYPE_ECBAT91 1072 -#define MACH_TYPE_STAREAST 1073 -#define MACH_TYPE_DSPG_DW 1074 -#define MACH_TYPE_ONEARM 1075 -#define MACH_TYPE_MRG110_6 1076 -#define MACH_TYPE_WRT300NV2 1077 -#define MACH_TYPE_XM_BULVERDE 1078 -#define MACH_TYPE_MSM6100 1079 -#define MACH_TYPE_ETI_B1 1080 -#define MACH_TYPE_ZILOG_ZA9L 1081 -#define MACH_TYPE_BIT2440 1082 -#define MACH_TYPE_NBI 1083 -#define MACH_TYPE_SMDK2443 1084 -#define MACH_TYPE_VDAVINCI 1085 -#define MACH_TYPE_ATC6 1086 -#define MACH_TYPE_MULTMDW 1087 -#define MACH_TYPE_MBA2440 1088 -#define MACH_TYPE_ECSD 1089 -#define MACH_TYPE_PALMZ31 1090 -#define MACH_TYPE_FSG 1091 -#define MACH_TYPE_RAZOR101 1092 -#define MACH_TYPE_OPERA_TDM 1093 -#define MACH_TYPE_COMCERTO 1094 -#define MACH_TYPE_TB0319 1095 -#define MACH_TYPE_KWS8000 1096 -#define MACH_TYPE_B2 1097 -#define MACH_TYPE_LCL54 1098 -#define MACH_TYPE_AT91SAM9260EK 1099 -#define MACH_TYPE_GLANTANK 1100 -#define MACH_TYPE_N2100 1101 -#define MACH_TYPE_N4100 1102 -#define MACH_TYPE_VERTICAL_RSC4 1103 -#define MACH_TYPE_SG8100 1104 -#define MACH_TYPE_IM42XX 1105 -#define MACH_TYPE_FTXX 1106 -#define MACH_TYPE_LWFUSION 1107 -#define MACH_TYPE_QT2410 1108 -#define MACH_TYPE_KIXRP435 1109 -#define MACH_TYPE_CCW9C 1110 -#define MACH_TYPE_DABHS 1111 -#define MACH_TYPE_GZMX 1112 -#define MACH_TYPE_IPNW100AP 1113 -#define MACH_TYPE_CC9P9360DEV 1114 -#define MACH_TYPE_CC9P9750DEV 1115 -#define MACH_TYPE_CC9P9360VAL 1116 -#define MACH_TYPE_CC9P9750VAL 1117 -#define MACH_TYPE_NX70V 1118 -#define MACH_TYPE_AT91RM9200DF 1119 -#define MACH_TYPE_SE_PILOT2 1120 -#define MACH_TYPE_MTCN_T800 1121 -#define MACH_TYPE_VCMX212 1122 -#define MACH_TYPE_LYNX 1123 -#define MACH_TYPE_AT91SAM9260ID 1124 -#define MACH_TYPE_HW86052 1125 -#define MACH_TYPE_PILZ_PMI3 1126 -#define MACH_TYPE_EDB9302A 1127 -#define MACH_TYPE_EDB9307A 1128 -#define MACH_TYPE_CT_DFS 1129 -#define MACH_TYPE_PILZ_PMI4 1130 -#define MACH_TYPE_XCEEDNP_IXP 1131 -#define MACH_TYPE_SMDK2442B 1132 -#define MACH_TYPE_XNODE 1133 -#define MACH_TYPE_AIDX270 1134 -#define MACH_TYPE_REMA 1135 -#define MACH_TYPE_BPS1000 1136 -#define MACH_TYPE_HW90350 1137 -#define MACH_TYPE_OMAP_3430SDP 1138 -#define MACH_TYPE_BLUETOUCH 1139 -#define MACH_TYPE_VSTMS 1140 -#define MACH_TYPE_XSBASE270 1141 -#define MACH_TYPE_AT91SAM9260EK_CN 1142 -#define MACH_TYPE_ADSTURBOXB 1143 -#define MACH_TYPE_OTI4110 1144 -#define MACH_TYPE_HME_PXA 1145 -#define MACH_TYPE_DEISTERDCA 1146 -#define MACH_TYPE_CES_SSEM2 1147 -#define MACH_TYPE_CES_MTR 1148 -#define MACH_TYPE_TDS_AVNG_SBC 1149 -#define MACH_TYPE_EVEREST 1150 -#define MACH_TYPE_PNX4010 1151 -#define MACH_TYPE_OXNAS 1152 -#define MACH_TYPE_FIORI 1153 -#define MACH_TYPE_ML1200 1154 -#define MACH_TYPE_PECOS 1155 -#define MACH_TYPE_NB2XXX 1156 -#define MACH_TYPE_HW6900 1157 -#define MACH_TYPE_CDCS_QUOLL 1158 -#define MACH_TYPE_QUICKSILVER 1159 -#define MACH_TYPE_UPLAT926 1160 -#define MACH_TYPE_DEP2410_THOMAS 1161 -#define MACH_TYPE_DTK2410 1162 -#define MACH_TYPE_CHILI 1163 -#define MACH_TYPE_DEMETER 1164 -#define MACH_TYPE_DIONYSUS 1165 -#define MACH_TYPE_AS352X 1166 -#define MACH_TYPE_SERVICE 1167 -#define MACH_TYPE_CS_E9301 1168 -#define MACH_TYPE_MICRO9M 1169 -#define MACH_TYPE_IA_MOSPCK 1170 -#define MACH_TYPE_QL201B 1171 -#define MACH_TYPE_BBM 1174 -#define MACH_TYPE_EXXX 1175 -#define MACH_TYPE_WMA11B 1176 -#define MACH_TYPE_PELCO_ATLAS 1177 -#define MACH_TYPE_G500 1178 -#define MACH_TYPE_BUG 1179 -#define MACH_TYPE_MX33ADS 1180 -#define MACH_TYPE_CHUB 1181 -#define MACH_TYPE_NEO1973_GTA01 1182 -#define MACH_TYPE_W90N740 1183 -#define MACH_TYPE_MEDALLION_SA2410 1184 -#define MACH_TYPE_IA_CPU_9200_2 1185 -#define MACH_TYPE_DIMMRM9200 1186 -#define MACH_TYPE_PM9261 1187 -#define MACH_TYPE_ML7304 1189 -#define MACH_TYPE_UCP250 1190 -#define MACH_TYPE_INTBOARD 1191 -#define MACH_TYPE_GULFSTREAM 1192 -#define MACH_TYPE_LABQUEST 1193 -#define MACH_TYPE_VCMX313 1194 -#define MACH_TYPE_URG200 1195 -#define MACH_TYPE_CPUX255LCDNET 1196 -#define MACH_TYPE_NETDCU9 1197 -#define MACH_TYPE_NETDCU10 1198 -#define MACH_TYPE_DSPG_DGA 1199 -#define MACH_TYPE_DSPG_DVW 1200 -#define MACH_TYPE_SOLOS 1201 -#define MACH_TYPE_AT91SAM9263EK 1202 -#define MACH_TYPE_OSSTBOX 1203 -#define MACH_TYPE_KBAT9261 1204 -#define MACH_TYPE_CT1100 1205 -#define MACH_TYPE_AKCPPXA 1206 -#define MACH_TYPE_OCHAYA1020 1207 -#define MACH_TYPE_HITRACK 1208 -#define MACH_TYPE_SYME1 1209 -#define MACH_TYPE_SYHL1 1210 -#define MACH_TYPE_EMPCA400 1211 -#define MACH_TYPE_EM7210 1212 -#define MACH_TYPE_HTCHERMES 1213 -#define MACH_TYPE_ETI_C1 1214 -#define MACH_TYPE_AC100 1216 -#define MACH_TYPE_SNEETCH 1217 -#define MACH_TYPE_STUDENTMATE 1218 -#define MACH_TYPE_ZIR2410 1219 -#define MACH_TYPE_ZIR2413 1220 -#define MACH_TYPE_DLONIP3 1221 -#define MACH_TYPE_INSTREAM 1222 -#define MACH_TYPE_AMBARELLA 1223 -#define MACH_TYPE_NEVIS 1224 -#define MACH_TYPE_HTC_TRINITY 1225 -#define MACH_TYPE_QL202B 1226 -#define MACH_TYPE_VPAC270 1227 -#define MACH_TYPE_RD129 1228 -#define MACH_TYPE_HTCWIZARD 1229 -#define MACH_TYPE_TREO680 1230 -#define MACH_TYPE_TECON_TMEZON 1231 -#define MACH_TYPE_ZYLONITE 1233 -#define MACH_TYPE_GENE1270 1234 -#define MACH_TYPE_ZIR2412 1235 -#define MACH_TYPE_MX31LITE 1236 -#define MACH_TYPE_T700WX 1237 -#define MACH_TYPE_VF100 1238 -#define MACH_TYPE_NSB2 1239 -#define MACH_TYPE_NXHMI_BB 1240 -#define MACH_TYPE_NXHMI_RE 1241 -#define MACH_TYPE_N4100PRO 1242 -#define MACH_TYPE_SAM9260 1243 -#define MACH_TYPE_OMAP_TREO600 1244 -#define MACH_TYPE_INDY2410 1245 -#define MACH_TYPE_NELT_A 1246 -#define MACH_TYPE_N311 1248 -#define MACH_TYPE_AT91SAM9260VGK 1249 -#define MACH_TYPE_AT91LEPPE 1250 -#define MACH_TYPE_AT91LEPCCN 1251 -#define MACH_TYPE_APC7100 1252 -#define MACH_TYPE_STARGAZER 1253 -#define MACH_TYPE_SONATA 1254 -#define MACH_TYPE_SCHMOOGIE 1255 -#define MACH_TYPE_AZTOOL 1256 -#define MACH_TYPE_MIOA701 1257 -#define MACH_TYPE_SXNI9260 1258 -#define MACH_TYPE_MXC27520EVB 1259 -#define MACH_TYPE_ARMADILLO5X0 1260 -#define MACH_TYPE_MB9260 1261 -#define MACH_TYPE_MB9263 1262 -#define MACH_TYPE_IPAC9302 1263 -#define MACH_TYPE_CC9P9360JS 1264 -#define MACH_TYPE_GALLIUM 1265 -#define MACH_TYPE_MSC2410 1266 -#define MACH_TYPE_GHI270 1267 -#define MACH_TYPE_DAVINCI_LEONARDO 1268 -#define MACH_TYPE_OIAB 1269 -#define MACH_TYPE_SMDK6400 1270 -#define MACH_TYPE_NOKIA_N800 1271 -#define MACH_TYPE_GREENPHONE 1272 -#define MACH_TYPE_COMPEXWP18 1273 -#define MACH_TYPE_XMATE 1274 -#define MACH_TYPE_ENERGIZER 1275 -#define MACH_TYPE_IME1 1276 -#define MACH_TYPE_SWEDATMS 1277 -#define MACH_TYPE_NTNP435C 1278 -#define MACH_TYPE_SPECTRO2 1279 -#define MACH_TYPE_H6039 1280 -#define MACH_TYPE_EP80219 1281 -#define MACH_TYPE_SAMOA_II 1282 -#define MACH_TYPE_CWMXL 1283 -#define MACH_TYPE_AS9200 1284 -#define MACH_TYPE_SFX1149 1285 -#define MACH_TYPE_NAVI010 1286 -#define MACH_TYPE_MULTMDP 1287 -#define MACH_TYPE_SCB9520 1288 -#define MACH_TYPE_HTCATHENA 1289 -#define MACH_TYPE_XP179 1290 -#define MACH_TYPE_H4300 1291 -#define MACH_TYPE_GORAMO_MLR 1292 -#define MACH_TYPE_MXC30020EVB 1293 -#define MACH_TYPE_ADSBITSYG5 1294 -#define MACH_TYPE_ADSPORTALPLUS 1295 -#define MACH_TYPE_MMSP2PLUS 1296 -#define MACH_TYPE_EM_X270 1297 -#define MACH_TYPE_TPP302 1298 -#define MACH_TYPE_TPM104 1299 -#define MACH_TYPE_TPM102 1300 -#define MACH_TYPE_TPM109 1301 -#define MACH_TYPE_FBXO1 1302 -#define MACH_TYPE_HXD8 1303 -#define MACH_TYPE_NEO1973_GTA02 1304 -#define MACH_TYPE_EMTEST 1305 -#define MACH_TYPE_AD6900 1306 -#define MACH_TYPE_EUROPA 1307 -#define MACH_TYPE_METROCONNECT 1308 -#define MACH_TYPE_EZ_S2410 1309 -#define MACH_TYPE_EZ_S2440 1310 -#define MACH_TYPE_EZ_EP9312 1311 -#define MACH_TYPE_EZ_EP9315 1312 -#define MACH_TYPE_EZ_X7 1313 -#define MACH_TYPE_GODOTDB 1314 -#define MACH_TYPE_MISTRAL 1315 -#define MACH_TYPE_MSM 1316 -#define MACH_TYPE_CT5910 1317 -#define MACH_TYPE_CT5912 1318 -#define MACH_TYPE_HYNET_INE 1319 -#define MACH_TYPE_HYNET_APP 1320 -#define MACH_TYPE_MSM7200 1321 -#define MACH_TYPE_MSM7600 1322 -#define MACH_TYPE_CEB255 1323 -#define MACH_TYPE_CIEL 1324 -#define MACH_TYPE_SLM5650 1325 -#define MACH_TYPE_AT91SAM9RLEK 1326 -#define MACH_TYPE_COMTECH_ROUTER 1327 -#define MACH_TYPE_SBC2410X 1328 -#define MACH_TYPE_AT4X0BD 1329 -#define MACH_TYPE_CBIFR 1330 -#define MACH_TYPE_ARCOM_QUANTUM 1331 -#define MACH_TYPE_MATRIX520 1332 -#define MACH_TYPE_MATRIX510 1333 -#define MACH_TYPE_MATRIX500 1334 -#define MACH_TYPE_M501 1335 -#define MACH_TYPE_AAEON1270 1336 -#define MACH_TYPE_MATRIX500EV 1337 -#define MACH_TYPE_PAC500 1338 -#define MACH_TYPE_PNX8181 1339 -#define MACH_TYPE_COLIBRI320 1340 -#define MACH_TYPE_AZTOOLBB 1341 -#define MACH_TYPE_AZTOOLG2 1342 -#define MACH_TYPE_DVLHOST 1343 -#define MACH_TYPE_ZIR9200 1344 -#define MACH_TYPE_ZIR9260 1345 -#define MACH_TYPE_COCOPAH 1346 -#define MACH_TYPE_NDS 1347 -#define MACH_TYPE_ROSENCRANTZ 1348 -#define MACH_TYPE_FTTX_ODSC 1349 -#define MACH_TYPE_CLASSE_R6904 1350 -#define MACH_TYPE_CAM60 1351 -#define MACH_TYPE_MXC30031ADS 1352 -#define MACH_TYPE_DATACALL 1353 -#define MACH_TYPE_AT91EB01 1354 -#define MACH_TYPE_RTY 1355 -#define MACH_TYPE_DWL2100 1356 -#define MACH_TYPE_VINSI 1357 -#define MACH_TYPE_DB88F5281 1358 -#define MACH_TYPE_CSB726 1359 -#define MACH_TYPE_TIK27 1360 -#define MACH_TYPE_MX_UC7420 1361 -#define MACH_TYPE_RIRM3 1362 -#define MACH_TYPE_PELCO_ODYSSEY 1363 -#define MACH_TYPE_ADX_ABOX 1365 -#define MACH_TYPE_ADX_TPID 1366 -#define MACH_TYPE_MINICHECK 1367 -#define MACH_TYPE_IDAM 1368 -#define MACH_TYPE_MARIO_MX 1369 -#define MACH_TYPE_VI1888 1370 -#define MACH_TYPE_ZR4230 1371 -#define MACH_TYPE_T1_IX_BLUE 1372 -#define MACH_TYPE_SYHQ2 1373 -#define MACH_TYPE_COMPUTIME_R3 1374 -#define MACH_TYPE_ORATIS 1375 -#define MACH_TYPE_MIKKO 1376 -#define MACH_TYPE_HOLON 1377 -#define MACH_TYPE_OLIP8 1378 -#define MACH_TYPE_GHI270HG 1379 -#define MACH_TYPE_DAVINCI_DM6467_EVM 1380 -#define MACH_TYPE_DAVINCI_DM355_EVM 1381 -#define MACH_TYPE_BLACKRIVER 1383 -#define MACH_TYPE_SANDGATEWP 1384 -#define MACH_TYPE_CDOTBWSG 1385 -#define MACH_TYPE_QUARK963 1386 -#define MACH_TYPE_CSB735 1387 -#define MACH_TYPE_LITTLETON 1388 -#define MACH_TYPE_MIO_P550 1389 -#define MACH_TYPE_MOTION2440 1390 -#define MACH_TYPE_IMM500 1391 -#define MACH_TYPE_HOMEMATIC 1392 -#define MACH_TYPE_ERMINE 1393 -#define MACH_TYPE_KB9202B 1394 -#define MACH_TYPE_HS1XX 1395 -#define MACH_TYPE_STUDENTMATE2440 1396 -#define MACH_TYPE_ARVOO_L1_Z1 1397 -#define MACH_TYPE_DEP2410K 1398 -#define MACH_TYPE_XXSVIDEO 1399 -#define MACH_TYPE_IM4004 1400 -#define MACH_TYPE_OCHAYA1050 1401 -#define MACH_TYPE_LEP9261 1402 -#define MACH_TYPE_SVENMEB 1403 -#define MACH_TYPE_FORTUNET2NE 1404 -#define MACH_TYPE_NXHX 1406 -#define MACH_TYPE_REALVIEW_PB11MP 1407 -#define MACH_TYPE_IDS500 1408 -#define MACH_TYPE_ORS_N725 1409 -#define MACH_TYPE_HSDARM 1410 -#define MACH_TYPE_SHA_PON003 1411 -#define MACH_TYPE_SHA_PON004 1412 -#define MACH_TYPE_SHA_PON007 1413 -#define MACH_TYPE_SHA_PON011 1414 -#define MACH_TYPE_H6042 1415 -#define MACH_TYPE_H6043 1416 -#define MACH_TYPE_LOOXC550 1417 -#define MACH_TYPE_CNTY_TITAN 1418 -#define MACH_TYPE_APP3XX 1419 -#define MACH_TYPE_SIDEOATSGRAMA 1420 -#define MACH_TYPE_TREO700P 1421 -#define MACH_TYPE_TREO700W 1422 -#define MACH_TYPE_TREO750 1423 -#define MACH_TYPE_TREO755P 1424 -#define MACH_TYPE_EZREGANUT9200 1425 -#define MACH_TYPE_SARGE 1426 -#define MACH_TYPE_A696 1427 -#define MACH_TYPE_TURTLE 1428 -#define MACH_TYPE_MX27_3DS 1430 -#define MACH_TYPE_BISHOP 1431 -#define MACH_TYPE_PXX 1432 -#define MACH_TYPE_REDWOOD 1433 -#define MACH_TYPE_OMAP_2430DLP 1436 -#define MACH_TYPE_OMAP_2430OSK 1437 -#define MACH_TYPE_SARDINE 1438 -#define MACH_TYPE_HALIBUT 1439 -#define MACH_TYPE_TROUT 1440 -#define MACH_TYPE_GOLDFISH 1441 -#define MACH_TYPE_GESBC2440 1442 -#define MACH_TYPE_NOMAD 1443 -#define MACH_TYPE_ROSALIND 1444 -#define MACH_TYPE_CC9P9215 1445 -#define MACH_TYPE_CC9P9210 1446 -#define MACH_TYPE_CC9P9215JS 1447 -#define MACH_TYPE_CC9P9210JS 1448 -#define MACH_TYPE_NASFFE 1449 -#define MACH_TYPE_TN2X0BD 1450 -#define MACH_TYPE_GWMPXA 1451 -#define MACH_TYPE_EXYPLUS 1452 -#define MACH_TYPE_JADOO21 1453 -#define MACH_TYPE_LOOXN560 1454 -#define MACH_TYPE_BONSAI 1455 -#define MACH_TYPE_ADSMILGATO 1456 -#define MACH_TYPE_GBA 1457 -#define MACH_TYPE_H6044 1458 -#define MACH_TYPE_APP 1459 -#define MACH_TYPE_TCT_HAMMER 1460 -#define MACH_TYPE_HERALD 1461 -#define MACH_TYPE_ARTEMIS 1462 -#define MACH_TYPE_HTCTITAN 1463 -#define MACH_TYPE_QRANIUM 1464 -#define MACH_TYPE_ADX_WSC2 1465 -#define MACH_TYPE_ADX_MEDCOM 1466 -#define MACH_TYPE_BBOARD 1467 -#define MACH_TYPE_CAMBRIA 1468 -#define MACH_TYPE_MT7XXX 1469 -#define MACH_TYPE_MATRIX512 1470 -#define MACH_TYPE_MATRIX522 1471 -#define MACH_TYPE_IPAC5010 1472 -#define MACH_TYPE_SAKURA 1473 -#define MACH_TYPE_GROCX 1474 -#define MACH_TYPE_PM9263 1475 -#define MACH_TYPE_SIM_ONE 1476 -#define MACH_TYPE_ACQ132 1477 -#define MACH_TYPE_DATR 1478 -#define MACH_TYPE_ACTUX1 1479 -#define MACH_TYPE_ACTUX2 1480 -#define MACH_TYPE_ACTUX3 1481 -#define MACH_TYPE_FLEXIT 1482 -#define MACH_TYPE_BH2X0BD 1483 -#define MACH_TYPE_ATB2002 1484 -#define MACH_TYPE_XENON 1485 -#define MACH_TYPE_FM607 1486 -#define MACH_TYPE_MATRIX514 1487 -#define MACH_TYPE_MATRIX524 1488 -#define MACH_TYPE_INPOD 1489 -#define MACH_TYPE_JIVE 1490 -#define MACH_TYPE_TLL_MX21 1491 -#define MACH_TYPE_SBC2800 1492 -#define MACH_TYPE_CC7UCAMRY 1493 -#define MACH_TYPE_UBISYS_P9_SC15 1494 -#define MACH_TYPE_UBISYS_P9_SSC2D10 1495 -#define MACH_TYPE_UBISYS_P9_RCU3 1496 -#define MACH_TYPE_AML_M8000 1497 -#define MACH_TYPE_SNAPPER_270 1498 -#define MACH_TYPE_OMAP_BBX 1499 -#define MACH_TYPE_UCN2410 1500 -#define MACH_TYPE_SAM9_L9260 1501 -#define MACH_TYPE_ETI_C2 1502 -#define MACH_TYPE_AVALANCHE 1503 -#define MACH_TYPE_REALVIEW_PB1176 1504 -#define MACH_TYPE_DP1500 1505 -#define MACH_TYPE_APPLE_IPHONE 1506 -#define MACH_TYPE_YL9200 1507 -#define MACH_TYPE_RD88F5182 1508 -#define MACH_TYPE_KUROBOX_PRO 1509 -#define MACH_TYPE_SE_POET 1510 -#define MACH_TYPE_MX31_3DS 1511 -#define MACH_TYPE_R270 1512 -#define MACH_TYPE_ARMOUR21 1513 -#define MACH_TYPE_DT2 1514 -#define MACH_TYPE_VT4 1515 -#define MACH_TYPE_TYCO320 1516 -#define MACH_TYPE_ADMA 1517 -#define MACH_TYPE_WP188 1518 -#define MACH_TYPE_CORSICA 1519 -#define MACH_TYPE_BIGEYE 1520 -#define MACH_TYPE_TLL5000 1522 -#define MACH_TYPE_BEBOT 1523 -#define MACH_TYPE_QONG 1524 -#define MACH_TYPE_TCOMPACT 1525 -#define MACH_TYPE_PUMA5 1526 -#define MACH_TYPE_ELARA 1527 -#define MACH_TYPE_ELLINGTON 1528 -#define MACH_TYPE_XDA_ATOM 1529 -#define MACH_TYPE_ENERGIZER2 1530 -#define MACH_TYPE_ODIN 1531 -#define MACH_TYPE_ACTUX4 1532 -#define MACH_TYPE_ESL_OMAP 1533 -#define MACH_TYPE_OMAP2EVM 1534 -#define MACH_TYPE_OMAP3EVM 1535 -#define MACH_TYPE_ADX_PCU57 1536 -#define MACH_TYPE_MONACO 1537 -#define MACH_TYPE_LEVANTE 1538 -#define MACH_TYPE_TMXIPX425 1539 -#define MACH_TYPE_LEEP 1540 -#define MACH_TYPE_RAAD 1541 -#define MACH_TYPE_DNS323 1542 -#define MACH_TYPE_AP1000 1543 -#define MACH_TYPE_A9SAM6432 1544 -#define MACH_TYPE_SHINY 1545 -#define MACH_TYPE_OMAP3_BEAGLE 1546 -#define MACH_TYPE_CSR_BDB2 1547 -#define MACH_TYPE_NOKIA_N810 1548 -#define MACH_TYPE_C270 1549 -#define MACH_TYPE_SENTRY 1550 -#define MACH_TYPE_PCM038 1551 -#define MACH_TYPE_ANC300 1552 -#define MACH_TYPE_HTCKAISER 1553 -#define MACH_TYPE_SBAT100 1554 -#define MACH_TYPE_MODUNORM 1555 -#define MACH_TYPE_PELOS_TWARM 1556 -#define MACH_TYPE_FLANK 1557 -#define MACH_TYPE_SIRLOIN 1558 -#define MACH_TYPE_BRISKET 1559 -#define MACH_TYPE_CHUCK 1560 -#define MACH_TYPE_OTTER 1561 -#define MACH_TYPE_DAVINCI_LDK 1562 -#define MACH_TYPE_PHREEDOM 1563 -#define MACH_TYPE_SG310 1564 -#define MACH_TYPE_TS209 1565 -#define MACH_TYPE_AT91CAP9ADK 1566 -#define MACH_TYPE_TION9315 1567 -#define MACH_TYPE_MAST 1568 -#define MACH_TYPE_PFW 1569 -#define MACH_TYPE_YL_P2440 1570 -#define MACH_TYPE_ZSBC32 1571 -#define MACH_TYPE_OMAP_PACE2 1572 -#define MACH_TYPE_IMX_PACE2 1573 -#define MACH_TYPE_MX31MOBOARD 1574 -#define MACH_TYPE_MX37_3DS 1575 -#define MACH_TYPE_RCC 1576 -#define MACH_TYPE_ARM9 1577 -#define MACH_TYPE_VISION_EP9307 1578 -#define MACH_TYPE_SCLY1000 1579 -#define MACH_TYPE_FONTEL_EP 1580 -#define MACH_TYPE_VOICEBLUE3G 1581 -#define MACH_TYPE_TT9200 1582 -#define MACH_TYPE_DIGI2410 1583 -#define MACH_TYPE_TERASTATION_PRO2 1584 -#define MACH_TYPE_LINKSTATION_PRO 1585 -#define MACH_TYPE_MOTOROLA_A780 1587 -#define MACH_TYPE_MOTOROLA_E6 1588 -#define MACH_TYPE_MOTOROLA_E2 1589 -#define MACH_TYPE_MOTOROLA_E680 1590 -#define MACH_TYPE_UR2410 1591 -#define MACH_TYPE_TAS9261 1592 -#define MACH_TYPE_HERMES_HD 1593 -#define MACH_TYPE_PERSEO_HD 1594 -#define MACH_TYPE_STARGAZER2 1595 -#define MACH_TYPE_E350 1596 -#define MACH_TYPE_WPCM450 1597 -#define MACH_TYPE_CARTESIO 1598 -#define MACH_TYPE_TOYBOX 1599 -#define MACH_TYPE_TX27 1600 -#define MACH_TYPE_TS409 1601 -#define MACH_TYPE_P300 1602 -#define MACH_TYPE_XDACOMET 1603 -#define MACH_TYPE_DEXFLEX2 1604 -#define MACH_TYPE_OW 1605 -#define MACH_TYPE_ARMEBS3 1606 -#define MACH_TYPE_U3 1607 -#define MACH_TYPE_SMDK2450 1608 -#define MACH_TYPE_RSI_EWS 1609 -#define MACH_TYPE_TNB 1610 -#define MACH_TYPE_TOEPATH 1611 -#define MACH_TYPE_KB9263 1612 -#define MACH_TYPE_MT7108 1613 -#define MACH_TYPE_SMTR2440 1614 -#define MACH_TYPE_MANAO 1615 -#define MACH_TYPE_CM_X300 1616 -#define MACH_TYPE_GULFSTREAM_KP 1617 -#define MACH_TYPE_LANREADYFN522 1618 -#define MACH_TYPE_ARMA37 1619 -#define MACH_TYPE_MENDEL 1620 -#define MACH_TYPE_PELCO_ILIAD 1621 -#define MACH_TYPE_UNIT2P 1622 -#define MACH_TYPE_INC20OTTER 1623 -#define MACH_TYPE_AT91SAM9G20EK 1624 -#define MACH_TYPE_STORCENTER 1625 -#define MACH_TYPE_SMDK6410 1626 -#define MACH_TYPE_U300 1627 -#define MACH_TYPE_U500 1628 -#define MACH_TYPE_DS9260 1629 -#define MACH_TYPE_RIVERROCK 1630 -#define MACH_TYPE_SCIBATH 1631 -#define MACH_TYPE_AT91SAM7SE512EK 1632 -#define MACH_TYPE_WRT350N_V2 1633 -#define MACH_TYPE_MULTIMEDIA 1634 -#define MACH_TYPE_MARVIN 1635 -#define MACH_TYPE_X500 1636 -#define MACH_TYPE_AWLUG4LCU 1637 -#define MACH_TYPE_PALERMOC 1638 -#define MACH_TYPE_OMAP_LDP 1639 -#define MACH_TYPE_IP500 1640 -#define MACH_TYPE_ASE2 1642 -#define MACH_TYPE_MX35EVB 1643 -#define MACH_TYPE_AML_M8050 1644 -#define MACH_TYPE_MX35_3DS 1645 -#define MACH_TYPE_MARS 1646 -#define MACH_TYPE_NEUROS_OSD2 1647 -#define MACH_TYPE_BADGER 1648 -#define MACH_TYPE_TRIZEPS4WL 1649 -#define MACH_TYPE_TRIZEPS5 1650 -#define MACH_TYPE_MARLIN 1651 -#define MACH_TYPE_TS78XX 1652 -#define MACH_TYPE_HPIPAQ214 1653 -#define MACH_TYPE_AT572D940DCM 1654 -#define MACH_TYPE_NE1BOARD 1655 -#define MACH_TYPE_ZANTE 1656 -#define MACH_TYPE_SFFSDR 1657 -#define MACH_TYPE_TW2662 1658 -#define MACH_TYPE_VF10XX 1659 -#define MACH_TYPE_ZORAN43XX 1660 -#define MACH_TYPE_SONIX926 1661 -#define MACH_TYPE_CELESTIALSEMI 1662 -#define MACH_TYPE_CC9M2443JS 1663 -#define MACH_TYPE_TW5334 1664 -#define MACH_TYPE_HTCARTEMIS 1665 -#define MACH_TYPE_NAL_HLITE 1666 -#define MACH_TYPE_HTCVOGUE 1667 -#define MACH_TYPE_SMARTWEB 1668 -#define MACH_TYPE_MV86XX 1669 -#define MACH_TYPE_MV87XX 1670 -#define MACH_TYPE_SONGYOUNGHO 1671 -#define MACH_TYPE_YOUNGHOTEMA 1672 -#define MACH_TYPE_PCM037 1673 -#define MACH_TYPE_MMVP 1674 -#define MACH_TYPE_MMAP 1675 -#define MACH_TYPE_PTID2410 1676 -#define MACH_TYPE_JAMES_926 1677 -#define MACH_TYPE_FM6000 1678 -#define MACH_TYPE_DB88F6281_BP 1680 -#define MACH_TYPE_RD88F6192_NAS 1681 -#define MACH_TYPE_RD88F6281 1682 -#define MACH_TYPE_DB78X00_BP 1683 -#define MACH_TYPE_SMDK2416 1685 -#define MACH_TYPE_OCE_SPIDER_SI 1686 -#define MACH_TYPE_OCE_SPIDER_SK 1687 -#define MACH_TYPE_ROVERN6 1688 -#define MACH_TYPE_PELCO_EVOLUTION 1689 -#define MACH_TYPE_WBD111 1690 -#define MACH_TYPE_ELARACPE 1691 -#define MACH_TYPE_MABV3 1692 -#define MACH_TYPE_MV2120 1693 -#define MACH_TYPE_CSB737 1695 -#define MACH_TYPE_MX51_3DS 1696 -#define MACH_TYPE_G900 1697 -#define MACH_TYPE_APF27 1698 -#define MACH_TYPE_GGUS2000 1699 -#define MACH_TYPE_OMAP_2430_MIMIC 1700 -#define MACH_TYPE_IMX27LITE 1701 -#define MACH_TYPE_ALMEX 1702 -#define MACH_TYPE_CONTROL 1703 -#define MACH_TYPE_MBA2410 1704 -#define MACH_TYPE_VOLCANO 1705 -#define MACH_TYPE_ZENITH 1706 -#define MACH_TYPE_MUCHIP 1707 -#define MACH_TYPE_MAGELLAN 1708 -#define MACH_TYPE_USB_A9260 1709 -#define MACH_TYPE_USB_A9263 1710 -#define MACH_TYPE_QIL_A9260 1711 -#define MACH_TYPE_CME9210 1712 -#define MACH_TYPE_HCZH4 1713 -#define MACH_TYPE_SPEARBASIC 1714 -#define MACH_TYPE_DEP2440 1715 -#define MACH_TYPE_HDL_GXR 1716 -#define MACH_TYPE_HDL_GT 1717 -#define MACH_TYPE_HDL_4G 1718 -#define MACH_TYPE_S3C6000 1719 -#define MACH_TYPE_MMSP2_MDK 1720 -#define MACH_TYPE_MPX220 1721 -#define MACH_TYPE_KZM_ARM11_01 1722 -#define MACH_TYPE_HTC_POLARIS 1723 -#define MACH_TYPE_HTC_KAISER 1724 -#define MACH_TYPE_LG_KS20 1725 -#define MACH_TYPE_HHGPS 1726 -#define MACH_TYPE_NOKIA_N810_WIMAX 1727 -#define MACH_TYPE_INSIGHT 1728 -#define MACH_TYPE_SAPPHIRE 1729 -#define MACH_TYPE_CSB637XO 1730 -#define MACH_TYPE_EVISIONG 1731 -#define MACH_TYPE_STMP37XX 1732 -#define MACH_TYPE_STMP378X 1733 -#define MACH_TYPE_TNT 1734 -#define MACH_TYPE_TBXT 1735 -#define MACH_TYPE_PLAYMATE 1736 -#define MACH_TYPE_PNS10 1737 -#define MACH_TYPE_EZNAVI 1738 -#define MACH_TYPE_PS4000 1739 -#define MACH_TYPE_EZX_A780 1740 -#define MACH_TYPE_EZX_E680 1741 -#define MACH_TYPE_EZX_A1200 1742 -#define MACH_TYPE_EZX_E6 1743 -#define MACH_TYPE_EZX_E2 1744 -#define MACH_TYPE_EZX_A910 1745 -#define MACH_TYPE_CWMX31 1746 -#define MACH_TYPE_SL2312 1747 -#define MACH_TYPE_BLENNY 1748 -#define MACH_TYPE_DS107 1749 -#define MACH_TYPE_DSX07 1750 -#define MACH_TYPE_PICOCOM1 1751 -#define MACH_TYPE_LYNX_WOLVERINE 1752 -#define MACH_TYPE_UBISYS_P9_SC19 1753 -#define MACH_TYPE_KRATOS_LOW 1754 -#define MACH_TYPE_M700 1755 -#define MACH_TYPE_EDMINI_V2 1756 -#define MACH_TYPE_ZIPIT2 1757 -#define MACH_TYPE_HSLFEMTOCELL 1758 -#define MACH_TYPE_DAINTREE_AT91 1759 -#define MACH_TYPE_SG560USB 1760 -#define MACH_TYPE_OMAP3_PANDORA 1761 -#define MACH_TYPE_USR8200 1762 -#define MACH_TYPE_S1S65K 1763 -#define MACH_TYPE_S2S65A 1764 -#define MACH_TYPE_ICORE 1765 -#define MACH_TYPE_MSS2 1766 -#define MACH_TYPE_BELMONT 1767 -#define MACH_TYPE_ASUSP525 1768 -#define MACH_TYPE_LB88RC8480 1769 -#define MACH_TYPE_HIPXA 1770 -#define MACH_TYPE_MX25_3DS 1771 -#define MACH_TYPE_M800 1772 -#define MACH_TYPE_OMAP3530_LV_SOM 1773 -#define MACH_TYPE_PRIMA_EVB 1774 -#define MACH_TYPE_MX31BT1 1775 -#define MACH_TYPE_ATLAS4_EVB 1776 -#define MACH_TYPE_MX31CICADA 1777 -#define MACH_TYPE_MI424WR 1778 -#define MACH_TYPE_AXS_ULTRAX 1779 -#define MACH_TYPE_AT572D940DEB 1780 -#define MACH_TYPE_DAVINCI_DA830_EVM 1781 -#define MACH_TYPE_EP9302 1782 -#define MACH_TYPE_AT572D940HFEB 1783 -#define MACH_TYPE_CYBOOK3 1784 -#define MACH_TYPE_WDG002 1785 -#define MACH_TYPE_SG560ADSL 1786 -#define MACH_TYPE_NEXTIO_N2800_ICA 1787 -#define MACH_TYPE_DOVE_DB 1788 -#define MACH_TYPE_MARVELL_NEWDB 1789 -#define MACH_TYPE_VANDIHUD 1790 -#define MACH_TYPE_MAGX_E8 1791 -#define MACH_TYPE_MAGX_Z6 1792 -#define MACH_TYPE_MAGX_V8 1793 -#define MACH_TYPE_MAGX_U9 1794 -#define MACH_TYPE_TOUGHCF08 1795 -#define MACH_TYPE_ZW4400 1796 -#define MACH_TYPE_MARAT91 1797 -#define MACH_TYPE_OVERO 1798 -#define MACH_TYPE_AT2440EVB 1799 -#define MACH_TYPE_NEOCORE926 1800 -#define MACH_TYPE_WNR854T 1801 -#define MACH_TYPE_IMX27 1802 -#define MACH_TYPE_MOOSE_DB 1803 -#define MACH_TYPE_FAB4 1804 -#define MACH_TYPE_HTCDIAMOND 1805 -#define MACH_TYPE_FIONA 1806 -#define MACH_TYPE_MXC30030_X 1807 -#define MACH_TYPE_BMP1000 1808 -#define MACH_TYPE_LOGI9200 1809 -#define MACH_TYPE_TQMA31 1810 -#define MACH_TYPE_CCW9P9215JS 1811 -#define MACH_TYPE_RD88F5181L_GE 1812 -#define MACH_TYPE_SIFMAIN 1813 -#define MACH_TYPE_SAM9_L9261 1814 -#define MACH_TYPE_CC9M2443 1815 -#define MACH_TYPE_XARIA300 1816 -#define MACH_TYPE_IT9200 1817 -#define MACH_TYPE_RD88F5181L_FXO 1818 -#define MACH_TYPE_KRISS_SENSOR 1819 -#define MACH_TYPE_PILZ_PMI5 1820 -#define MACH_TYPE_JADE 1821 -#define MACH_TYPE_KS8695_SOFTPLC 1822 -#define MACH_TYPE_GPRISC3 1823 -#define MACH_TYPE_STAMP9G20 1824 -#define MACH_TYPE_SMDK6430 1825 -#define MACH_TYPE_SMDKC100 1826 -#define MACH_TYPE_TAVOREVB 1827 -#define MACH_TYPE_SAAR 1828 -#define MACH_TYPE_DEISTER_EYECAM 1829 -#define MACH_TYPE_AT91SAM9M10G45EK 1830 -#define MACH_TYPE_LINKSTATION_PRODUO 1831 -#define MACH_TYPE_HIT_B0 1832 -#define MACH_TYPE_ADX_RMU 1833 -#define MACH_TYPE_XG_CPE_MAIN 1834 -#define MACH_TYPE_EDB9407A 1835 -#define MACH_TYPE_DTB9608 1836 -#define MACH_TYPE_EM104V1 1837 -#define MACH_TYPE_DEMO 1838 -#define MACH_TYPE_LOGI9260 1839 -#define MACH_TYPE_MX31_EXM32 1840 -#define MACH_TYPE_USB_A9G20 1841 -#define MACH_TYPE_PICPROJE2008 1842 -#define MACH_TYPE_CS_E9315 1843 -#define MACH_TYPE_QIL_A9G20 1844 -#define MACH_TYPE_SHA_PON020 1845 -#define MACH_TYPE_NAD 1846 -#define MACH_TYPE_SBC35_A9260 1847 -#define MACH_TYPE_SBC35_A9G20 1848 -#define MACH_TYPE_DAVINCI_BEGINNING 1849 -#define MACH_TYPE_UWC 1850 -#define MACH_TYPE_MXLADS 1851 -#define MACH_TYPE_HTCNIKE 1852 -#define MACH_TYPE_DEISTER_PXA270 1853 -#define MACH_TYPE_CME9210JS 1854 -#define MACH_TYPE_CC9P9360 1855 -#define MACH_TYPE_MOCHA 1856 -#define MACH_TYPE_WAPD170AG 1857 -#define MACH_TYPE_LINKSTATION_MINI 1858 -#define MACH_TYPE_AFEB9260 1859 -#define MACH_TYPE_W90X900 1860 -#define MACH_TYPE_W90X700 1861 -#define MACH_TYPE_KT300IP 1862 -#define MACH_TYPE_KT300IP_G20 1863 -#define MACH_TYPE_SRCM 1864 -#define MACH_TYPE_WLNX_9260 1865 -#define MACH_TYPE_OPENMOKO_GTA03 1866 -#define MACH_TYPE_OSPREY2 1867 -#define MACH_TYPE_KBIO9260 1868 -#define MACH_TYPE_GINZA 1869 -#define MACH_TYPE_A636N 1870 -#define MACH_TYPE_IMX27IPCAM 1871 -#define MACH_TYPE_NEMOC 1872 -#define MACH_TYPE_GENEVA 1873 -#define MACH_TYPE_HTCPHAROS 1874 -#define MACH_TYPE_NEONC 1875 -#define MACH_TYPE_NAS7100 1876 -#define MACH_TYPE_TEUPHONE 1877 -#define MACH_TYPE_ANNAX_ETH2 1878 -#define MACH_TYPE_CSB733 1879 -#define MACH_TYPE_BK3 1880 -#define MACH_TYPE_OMAP_EM32 1881 -#define MACH_TYPE_ET9261CP 1882 -#define MACH_TYPE_JASPERC 1883 -#define MACH_TYPE_ISSI_ARM9 1884 -#define MACH_TYPE_UED 1885 -#define MACH_TYPE_ESIBLADE 1886 -#define MACH_TYPE_EYE02 1887 -#define MACH_TYPE_IMX27KBD 1888 -#define MACH_TYPE_SST61VC010_FPGA 1889 -#define MACH_TYPE_KIXVP435 1890 -#define MACH_TYPE_KIXNP435 1891 -#define MACH_TYPE_AFRICA 1892 -#define MACH_TYPE_NH233 1893 -#define MACH_TYPE_RD88F6183AP_GE 1894 -#define MACH_TYPE_BCM4760 1895 -#define MACH_TYPE_EDDY_V2 1896 -#define MACH_TYPE_REALVIEW_PBA8 1897 -#define MACH_TYPE_HID_A7 1898 -#define MACH_TYPE_HERO 1899 -#define MACH_TYPE_OMAP_POSEIDON 1900 -#define MACH_TYPE_REALVIEW_PBX 1901 -#define MACH_TYPE_MICRO9S 1902 -#define MACH_TYPE_MAKO 1903 -#define MACH_TYPE_XDAFLAME 1904 -#define MACH_TYPE_PHIDGET_SBC2 1905 -#define MACH_TYPE_LIMESTONE 1906 -#define MACH_TYPE_IPROBE_C32 1907 -#define MACH_TYPE_RUT100 1908 -#define MACH_TYPE_ASUSP535 1909 -#define MACH_TYPE_HTCRAPHAEL 1910 -#define MACH_TYPE_SYGDG1 1911 -#define MACH_TYPE_SYGDG2 1912 -#define MACH_TYPE_SEOUL 1913 -#define MACH_TYPE_SALERNO 1914 -#define MACH_TYPE_UCN_S3C64XX 1915 -#define MACH_TYPE_MSM7201A 1916 -#define MACH_TYPE_LPR1 1917 -#define MACH_TYPE_ARMADILLO500FX 1918 -#define MACH_TYPE_G3EVM 1919 -#define MACH_TYPE_Z3_DM355 1920 -#define MACH_TYPE_W90P910EVB 1921 -#define MACH_TYPE_W90P920EVB 1922 -#define MACH_TYPE_W90P950EVB 1923 -#define MACH_TYPE_W90N960EVB 1924 -#define MACH_TYPE_CAMHD 1925 -#define MACH_TYPE_MVC100 1926 -#define MACH_TYPE_ELECTRUM_200 1927 -#define MACH_TYPE_HTCJADE 1928 -#define MACH_TYPE_MEMPHIS 1929 -#define MACH_TYPE_IMX27SBC 1930 -#define MACH_TYPE_LEXTAR 1931 -#define MACH_TYPE_MV88F6281GTW_GE 1932 -#define MACH_TYPE_NCP 1933 -#define MACH_TYPE_Z32AN 1934 -#define MACH_TYPE_TMQ_CAPD 1935 -#define MACH_TYPE_OMAP3_WL 1936 -#define MACH_TYPE_CHUMBY 1937 -#define MACH_TYPE_ATSARM9 1938 -#define MACH_TYPE_DAVINCI_DM365_EVM 1939 -#define MACH_TYPE_BAHAMAS 1940 -#define MACH_TYPE_DAS 1941 -#define MACH_TYPE_MINIDAS 1942 -#define MACH_TYPE_VK1000 1943 -#define MACH_TYPE_CENTRO 1944 -#define MACH_TYPE_CTERA_2BAY 1945 -#define MACH_TYPE_EDGECONNECT 1946 -#define MACH_TYPE_ND27000 1947 -#define MACH_TYPE_GEMALTO_COBRA 1948 -#define MACH_TYPE_INGELABS_COMET 1949 -#define MACH_TYPE_POLLUX_WIZ 1950 -#define MACH_TYPE_BLACKSTONE 1951 -#define MACH_TYPE_TOPAZ 1952 -#define MACH_TYPE_AIXLE 1953 -#define MACH_TYPE_MW998 1954 -#define MACH_TYPE_NOKIA_RX51 1955 -#define MACH_TYPE_VSC5605EV 1956 -#define MACH_TYPE_NT98700DK 1957 -#define MACH_TYPE_ICONTACT 1958 -#define MACH_TYPE_SWARCO_FRCPU 1959 -#define MACH_TYPE_SWARCO_SCPU 1960 -#define MACH_TYPE_BBOX_P16 1961 -#define MACH_TYPE_BSTD 1962 -#define MACH_TYPE_SBC2440II 1963 -#define MACH_TYPE_PCM034 1964 -#define MACH_TYPE_NESO 1965 -#define MACH_TYPE_WLNX_9G20 1966 -#define MACH_TYPE_OMAP_ZOOM2 1967 -#define MACH_TYPE_TOTEMNOVA 1968 -#define MACH_TYPE_C5000 1969 -#define MACH_TYPE_UNIPO_AT91SAM9263 1970 -#define MACH_TYPE_ETHERNUT5 1971 -#define MACH_TYPE_ARM11 1972 -#define MACH_TYPE_CPUAT9260 1973 -#define MACH_TYPE_CPUPXA255 1974 -#define MACH_TYPE_CPUIMX27 1975 -#define MACH_TYPE_CHEFLUX 1976 -#define MACH_TYPE_EB_CPUX9K2 1977 -#define MACH_TYPE_OPCOTEC 1978 -#define MACH_TYPE_YT 1979 -#define MACH_TYPE_MOTOQ 1980 -#define MACH_TYPE_BSB1 1981 -#define MACH_TYPE_ACS5K 1982 -#define MACH_TYPE_MILAN 1983 -#define MACH_TYPE_QUARTZV2 1984 -#define MACH_TYPE_RSVP 1985 -#define MACH_TYPE_RMP200 1986 -#define MACH_TYPE_SNAPPER_9260 1987 -#define MACH_TYPE_DSM320 1988 -#define MACH_TYPE_ADSGCM 1989 -#define MACH_TYPE_ASE2_400 1990 -#define MACH_TYPE_PIZZA 1991 -#define MACH_TYPE_SPOT_NGPL 1992 -#define MACH_TYPE_ARMATA 1993 -#define MACH_TYPE_EXEDA 1994 -#define MACH_TYPE_MX31SF005 1995 -#define MACH_TYPE_F5D8231_4_V2 1996 -#define MACH_TYPE_Q2440 1997 -#define MACH_TYPE_QQ2440 1998 -#define MACH_TYPE_MINI2440 1999 -#define MACH_TYPE_COLIBRI300 2000 -#define MACH_TYPE_JADES 2001 -#define MACH_TYPE_SPARK 2002 -#define MACH_TYPE_BENZINA 2003 -#define MACH_TYPE_BLAZE 2004 -#define MACH_TYPE_LINKSTATION_LS_HGL 2005 -#define MACH_TYPE_HTCKOVSKY 2006 -#define MACH_TYPE_SONY_PRS505 2007 -#define MACH_TYPE_HANLIN_V3 2008 -#define MACH_TYPE_SAPPHIRA 2009 -#define MACH_TYPE_DACK_SDA_01 2010 -#define MACH_TYPE_ARMBOX 2011 -#define MACH_TYPE_HARRIS_RVP 2012 -#define MACH_TYPE_RIBALDO 2013 -#define MACH_TYPE_AGORA 2014 -#define MACH_TYPE_OMAP3_MINI 2015 -#define MACH_TYPE_A9SAM6432_B 2016 -#define MACH_TYPE_USG2410 2017 -#define MACH_TYPE_PC72052_I10_REVB 2018 -#define MACH_TYPE_MX35_EXM32 2019 -#define MACH_TYPE_TOPAS910 2020 -#define MACH_TYPE_HYENA 2021 -#define MACH_TYPE_POSPAX 2022 -#define MACH_TYPE_HDL_GX 2023 -#define MACH_TYPE_CTERA_4BAY 2024 -#define MACH_TYPE_CTERA_PLUG_C 2025 -#define MACH_TYPE_CRWEA_PLUG_I 2026 -#define MACH_TYPE_EGAUGE2 2027 -#define MACH_TYPE_DIDJ 2028 -#define MACH_TYPE_MEISTER 2029 -#define MACH_TYPE_HTCBLACKSTONE 2030 -#define MACH_TYPE_CPUAT9G20 2031 -#define MACH_TYPE_SMDK6440 2032 -#define MACH_TYPE_OMAP_35XX_MVP 2033 -#define MACH_TYPE_CTERA_PLUG_I 2034 -#define MACH_TYPE_PVG610 2035 -#define MACH_TYPE_HPRW6815 2036 -#define MACH_TYPE_OMAP3_OSWALD 2037 -#define MACH_TYPE_NAS4220B 2038 -#define MACH_TYPE_HTCRAPHAEL_CDMA 2039 -#define MACH_TYPE_HTCDIAMOND_CDMA 2040 -#define MACH_TYPE_SCALER 2041 -#define MACH_TYPE_ZYLONITE2 2042 -#define MACH_TYPE_ASPENITE 2043 -#define MACH_TYPE_TETON 2044 -#define MACH_TYPE_TTC_DKB 2045 -#define MACH_TYPE_BISHOP2 2046 -#define MACH_TYPE_IPPV5 2047 -#define MACH_TYPE_FARM926 2048 -#define MACH_TYPE_MMCCPU 2049 -#define MACH_TYPE_SGMSFL 2050 -#define MACH_TYPE_TT8000 2051 -#define MACH_TYPE_ZRN4300LP 2052 -#define MACH_TYPE_MPTC 2053 -#define MACH_TYPE_H6051 2054 -#define MACH_TYPE_PVG610_101 2055 -#define MACH_TYPE_STAMP9261_PC_EVB 2056 -#define MACH_TYPE_PELCO_ODYSSEUS 2057 -#define MACH_TYPE_TNY_A9260 2058 -#define MACH_TYPE_TNY_A9G20 2059 -#define MACH_TYPE_AESOP_MP2530F 2060 -#define MACH_TYPE_DX900 2061 -#define MACH_TYPE_CPODC2 2062 -#define MACH_TYPE_TILT_8925 2063 -#define MACH_TYPE_DAVINCI_DM357_EVM 2064 -#define MACH_TYPE_SWORDFISH 2065 -#define MACH_TYPE_CORVUS 2066 -#define MACH_TYPE_TAURUS 2067 -#define MACH_TYPE_AXM 2068 -#define MACH_TYPE_AXC 2069 -#define MACH_TYPE_BABY 2070 -#define MACH_TYPE_MP200 2071 -#define MACH_TYPE_PCM043 2072 -#define MACH_TYPE_HANLIN_V3C 2073 -#define MACH_TYPE_KBK9G20 2074 -#define MACH_TYPE_ADSTURBOG5 2075 -#define MACH_TYPE_AVENGER_LITE1 2076 -#define MACH_TYPE_SUC 2077 -#define MACH_TYPE_AT91SAM7S256 2078 -#define MACH_TYPE_MENDOZA 2079 -#define MACH_TYPE_KIRA 2080 -#define MACH_TYPE_MX1HBM 2081 -#define MACH_TYPE_QUATRO43XX 2082 -#define MACH_TYPE_QUATRO4230 2083 -#define MACH_TYPE_NSB400 2084 -#define MACH_TYPE_DRP255 2085 -#define MACH_TYPE_THOTH 2086 -#define MACH_TYPE_FIRESTONE 2087 -#define MACH_TYPE_ASUSP750 2088 -#define MACH_TYPE_CTERA_DL 2089 -#define MACH_TYPE_SOCR 2090 -#define MACH_TYPE_HTCOXYGEN 2091 -#define MACH_TYPE_HEROC 2092 -#define MACH_TYPE_ZENO6800 2093 -#define MACH_TYPE_SC2MCS 2094 -#define MACH_TYPE_GENE100 2095 -#define MACH_TYPE_AS353X 2096 -#define MACH_TYPE_SHEEVAPLUG 2097 -#define MACH_TYPE_AT91SAM9G20 2098 -#define MACH_TYPE_MV88F6192GTW_FE 2099 -#define MACH_TYPE_CC9200 2100 -#define MACH_TYPE_SM9200 2101 -#define MACH_TYPE_TP9200 2102 -#define MACH_TYPE_SNAPPERDV 2103 -#define MACH_TYPE_AVENGERS_LITE 2104 -#define MACH_TYPE_AVENGERS_LITE1 2105 -#define MACH_TYPE_OMAP3AXON 2106 -#define MACH_TYPE_MA8XX 2107 -#define MACH_TYPE_MP201EK 2108 -#define MACH_TYPE_DAVINCI_TUX 2109 -#define MACH_TYPE_MPA1600 2110 -#define MACH_TYPE_PELCO_TROY 2111 -#define MACH_TYPE_NSB667 2112 -#define MACH_TYPE_ROVERS5_4MPIX 2113 -#define MACH_TYPE_TWOCOM 2114 -#define MACH_TYPE_UBISYS_P9_RCU3R2 2115 -#define MACH_TYPE_HERO_ESPRESSO 2116 -#define MACH_TYPE_AFEUSB 2117 -#define MACH_TYPE_T830 2118 -#define MACH_TYPE_SPD8020_CC 2119 -#define MACH_TYPE_OM_3D7K 2120 -#define MACH_TYPE_PICOCOM2 2121 -#define MACH_TYPE_UWG4MX27 2122 -#define MACH_TYPE_UWG4MX31 2123 -#define MACH_TYPE_CHERRY 2124 -#define MACH_TYPE_MX51_BABBAGE 2125 -#define MACH_TYPE_S3C2440TURKIYE 2126 -#define MACH_TYPE_TX37 2127 -#define MACH_TYPE_SBC2800_9G20 2128 -#define MACH_TYPE_BENZGLB 2129 -#define MACH_TYPE_BENZTD 2130 -#define MACH_TYPE_CARTESIO_PLUS 2131 -#define MACH_TYPE_SOLRAD_G20 2132 -#define MACH_TYPE_MX27WALLACE 2133 -#define MACH_TYPE_FMZWEBMODUL 2134 -#define MACH_TYPE_RD78X00_MASA 2135 -#define MACH_TYPE_SMALLOGGER 2136 -#define MACH_TYPE_CCW9P9215 2137 -#define MACH_TYPE_DM355_LEOPARD 2138 -#define MACH_TYPE_TS219 2139 -#define MACH_TYPE_TNY_A9263 2140 -#define MACH_TYPE_APOLLO 2141 -#define MACH_TYPE_AT91CAP9STK 2142 -#define MACH_TYPE_SPC300 2143 -#define MACH_TYPE_EKO 2144 -#define MACH_TYPE_CCW9M2443 2145 -#define MACH_TYPE_CCW9M2443JS 2146 -#define MACH_TYPE_M2M_ROUTER_DEVICE 2147 -#define MACH_TYPE_STAR9104NAS 2148 -#define MACH_TYPE_PCA100 2149 -#define MACH_TYPE_Z3_DM365_MOD_01 2150 -#define MACH_TYPE_HIPOX 2151 -#define MACH_TYPE_OMAP3_PITEDS 2152 -#define MACH_TYPE_BM150R 2153 -#define MACH_TYPE_TBONE 2154 -#define MACH_TYPE_MERLIN 2155 -#define MACH_TYPE_FALCON 2156 -#define MACH_TYPE_DAVINCI_DA850_EVM 2157 -#define MACH_TYPE_S5P6440 2158 -#define MACH_TYPE_AT91SAM9G10EK 2159 -#define MACH_TYPE_OMAP_4430SDP 2160 -#define MACH_TYPE_LPC313X 2161 -#define MACH_TYPE_MAGX_ZN5 2162 -#define MACH_TYPE_MAGX_EM30 2163 -#define MACH_TYPE_MAGX_VE66 2164 -#define MACH_TYPE_MEESC 2165 -#define MACH_TYPE_OTC570 2166 -#define MACH_TYPE_BCU2412 2167 -#define MACH_TYPE_BEACON 2168 -#define MACH_TYPE_ACTIA_TGW 2169 -#define MACH_TYPE_E4430 2170 -#define MACH_TYPE_QL300 2171 -#define MACH_TYPE_BTMAVB101 2172 -#define MACH_TYPE_BTMAWB101 2173 -#define MACH_TYPE_SQ201 2174 -#define MACH_TYPE_QUATRO45XX 2175 -#define MACH_TYPE_OPENPAD 2176 -#define MACH_TYPE_TX25 2177 -#define MACH_TYPE_OMAP3_TORPEDO 2178 -#define MACH_TYPE_HTCRAPHAEL_K 2179 -#define MACH_TYPE_LAL43 2181 -#define MACH_TYPE_HTCRAPHAEL_CDMA500 2182 -#define MACH_TYPE_ANW6410 2183 -#define MACH_TYPE_HTCPROPHET 2185 -#define MACH_TYPE_CFA_10022 2186 -#define MACH_TYPE_IMX27_VISSTRIM_M10 2187 -#define MACH_TYPE_PX2IMX27 2188 -#define MACH_TYPE_STM3210E_EVAL 2189 -#define MACH_TYPE_DVS10 2190 -#define MACH_TYPE_PORTUXG20 2191 -#define MACH_TYPE_ARM_SPV 2192 -#define MACH_TYPE_SMDKC110 2193 -#define MACH_TYPE_CABESPRESSO 2194 -#define MACH_TYPE_HMC800 2195 -#define MACH_TYPE_SHOLES 2196 -#define MACH_TYPE_BTMXC31 2197 -#define MACH_TYPE_DT501 2198 -#define MACH_TYPE_KTX 2199 -#define MACH_TYPE_OMAP3517EVM 2200 -#define MACH_TYPE_NETSPACE_V2 2201 -#define MACH_TYPE_NETSPACE_MAX_V2 2202 -#define MACH_TYPE_D2NET_V2 2203 -#define MACH_TYPE_NET2BIG_V2 2204 -#define MACH_TYPE_NET4BIG_V2 2205 -#define MACH_TYPE_NET5BIG_V2 2206 -#define MACH_TYPE_ENDB2443 2207 -#define MACH_TYPE_INETSPACE_V2 2208 -#define MACH_TYPE_TROS 2209 -#define MACH_TYPE_PELCO_HOMER 2210 -#define MACH_TYPE_OFSP8 2211 -#define MACH_TYPE_AT91SAM9G45EKES 2212 -#define MACH_TYPE_GUF_CUPID 2213 -#define MACH_TYPE_EAB1R 2214 -#define MACH_TYPE_DESIREC 2215 -#define MACH_TYPE_CORDOBA 2216 -#define MACH_TYPE_IRVINE 2217 -#define MACH_TYPE_SFF772 2218 -#define MACH_TYPE_PELCO_MILANO 2219 -#define MACH_TYPE_PC7302 2220 -#define MACH_TYPE_BIP6000 2221 -#define MACH_TYPE_SILVERMOON 2222 -#define MACH_TYPE_VC0830 2223 -#define MACH_TYPE_DT430 2224 -#define MACH_TYPE_JI42PF 2225 -#define MACH_TYPE_GNET_KSM 2226 -#define MACH_TYPE_GNET_SGM 2227 -#define MACH_TYPE_GNET_SGR 2228 -#define MACH_TYPE_OMAP3_ICETEKEVM 2229 -#define MACH_TYPE_PNP 2230 -#define MACH_TYPE_CTERA_2BAY_K 2231 -#define MACH_TYPE_CTERA_2BAY_U 2232 -#define MACH_TYPE_SAS_C 2233 -#define MACH_TYPE_VMA2315 2234 -#define MACH_TYPE_VCS 2235 -#define MACH_TYPE_SPEAR600 2236 -#define MACH_TYPE_SPEAR300 2237 -#define MACH_TYPE_SPEAR1300 2238 -#define MACH_TYPE_LILLY1131 2239 -#define MACH_TYPE_ARVOO_AX301 2240 -#define MACH_TYPE_MAPPHONE 2241 -#define MACH_TYPE_LEGEND 2242 -#define MACH_TYPE_SALSA 2243 -#define MACH_TYPE_LOUNGE 2244 -#define MACH_TYPE_VISION 2245 -#define MACH_TYPE_VMB20 2246 -#define MACH_TYPE_HY2410 2247 -#define MACH_TYPE_HY9315 2248 -#define MACH_TYPE_BULLWINKLE 2249 -#define MACH_TYPE_ARM_ULTIMATOR2 2250 -#define MACH_TYPE_VS_V210 2252 -#define MACH_TYPE_VS_V212 2253 -#define MACH_TYPE_HMT 2254 -#define MACH_TYPE_KM_KIRKWOOD 2255 -#define MACH_TYPE_VESPER 2256 -#define MACH_TYPE_STR9 2257 -#define MACH_TYPE_OMAP3_WL_FF 2258 -#define MACH_TYPE_SIMCOM 2259 -#define MACH_TYPE_MCWEBIO 2260 -#define MACH_TYPE_OMAP3_PHRAZER 2261 -#define MACH_TYPE_DARWIN 2262 -#define MACH_TYPE_ORATISCOMU 2263 -#define MACH_TYPE_RTSBC20 2264 -#define MACH_TYPE_I780 2265 -#define MACH_TYPE_GEMINI324 2266 -#define MACH_TYPE_ORATISLAN 2267 -#define MACH_TYPE_ORATISALOG 2268 -#define MACH_TYPE_ORATISMADI 2269 -#define MACH_TYPE_ORATISOT16 2270 -#define MACH_TYPE_ORATISDESK 2271 -#define MACH_TYPE_VEXPRESS 2272 -#define MACH_TYPE_SINTEXO 2273 -#define MACH_TYPE_CM3389 2274 -#define MACH_TYPE_OMAP3_CIO 2275 -#define MACH_TYPE_SGH_I900 2276 -#define MACH_TYPE_BST100 2277 -#define MACH_TYPE_PASSION 2278 -#define MACH_TYPE_INDESIGN_AT91SAM 2279 -#define MACH_TYPE_C4_BADGER 2280 -#define MACH_TYPE_C4_VIPER 2281 -#define MACH_TYPE_D2NET 2282 -#define MACH_TYPE_BIGDISK 2283 -#define MACH_TYPE_NOTALVISION 2284 -#define MACH_TYPE_OMAP3_KBOC 2285 -#define MACH_TYPE_CYCLONE 2286 -#define MACH_TYPE_NINJA 2287 -#define MACH_TYPE_AT91SAM9G20EK_2MMC 2288 -#define MACH_TYPE_BCMRING 2289 -#define MACH_TYPE_RESOL_DL2 2290 -#define MACH_TYPE_IFOSW 2291 -#define MACH_TYPE_HTCRHODIUM 2292 -#define MACH_TYPE_HTCTOPAZ 2293 -#define MACH_TYPE_MATRIX504 2294 -#define MACH_TYPE_MRFSA 2295 -#define MACH_TYPE_SC_P270 2296 -#define MACH_TYPE_ATLAS5_EVB 2297 -#define MACH_TYPE_PELCO_LOBOX 2298 -#define MACH_TYPE_DILAX_PCU200 2299 -#define MACH_TYPE_LEONARDO 2300 -#define MACH_TYPE_ZORAN_APPROACH7 2301 -#define MACH_TYPE_DP6XX 2302 -#define MACH_TYPE_BCM2153_VESPER 2303 -#define MACH_TYPE_MAHIMAHI 2304 -#define MACH_TYPE_CLICKC 2305 -#define MACH_TYPE_ZB_GATEWAY 2306 -#define MACH_TYPE_TAZCARD 2307 -#define MACH_TYPE_TAZDEV 2308 -#define MACH_TYPE_ANNAX_CB_ARM 2309 -#define MACH_TYPE_ANNAX_DM3 2310 -#define MACH_TYPE_CEREBRIC 2311 -#define MACH_TYPE_ORCA 2312 -#define MACH_TYPE_PC9260 2313 -#define MACH_TYPE_EMS285A 2314 -#define MACH_TYPE_GEC2410 2315 -#define MACH_TYPE_GEC2440 2316 -#define MACH_TYPE_ARCH_MW903 2317 -#define MACH_TYPE_MW2440 2318 -#define MACH_TYPE_ECAC2378 2319 -#define MACH_TYPE_TAZKIOSK 2320 -#define MACH_TYPE_WHITERABBIT_MCH 2321 -#define MACH_TYPE_SBOX9263 2322 -#define MACH_TYPE_OREO 2323 -#define MACH_TYPE_SMDK6442 2324 -#define MACH_TYPE_OPENRD_BASE 2325 -#define MACH_TYPE_INCREDIBLE 2326 -#define MACH_TYPE_INCREDIBLEC 2327 -#define MACH_TYPE_HEROCT 2328 -#define MACH_TYPE_MMNET1000 2329 -#define MACH_TYPE_DEVKIT8000 2330 -#define MACH_TYPE_DEVKIT9000 2331 -#define MACH_TYPE_MX31TXTR 2332 -#define MACH_TYPE_U380 2333 -#define MACH_TYPE_HUALU_BOARD 2334 -#define MACH_TYPE_NPCMX50 2335 -#define MACH_TYPE_MX51_EFIKAMX 2336 -#define MACH_TYPE_MX51_LANGE52 2337 -#define MACH_TYPE_RIOM 2338 -#define MACH_TYPE_COMCAS 2339 -#define MACH_TYPE_WSI_MX27 2340 -#define MACH_TYPE_CM_T35 2341 -#define MACH_TYPE_NET2BIG 2342 -#define MACH_TYPE_MOTOROLA_A1600 2343 -#define MACH_TYPE_IGEP0020 2344 -#define MACH_TYPE_IGEP0010 2345 -#define MACH_TYPE_MV6281GTWGE2 2346 -#define MACH_TYPE_SCAT100 2347 -#define MACH_TYPE_SANMINA 2348 -#define MACH_TYPE_MOMENTO 2349 -#define MACH_TYPE_NUC9XX 2350 -#define MACH_TYPE_NUC910EVB 2351 -#define MACH_TYPE_NUC920EVB 2352 -#define MACH_TYPE_NUC950EVB 2353 -#define MACH_TYPE_NUC945EVB 2354 -#define MACH_TYPE_NUC960EVB 2355 -#define MACH_TYPE_NUC932EVB 2356 -#define MACH_TYPE_NUC900 2357 -#define MACH_TYPE_SD1SOC 2358 -#define MACH_TYPE_LN2440BC 2359 -#define MACH_TYPE_RSBC 2360 -#define MACH_TYPE_OPENRD_CLIENT 2361 -#define MACH_TYPE_HPIPAQ11X 2362 -#define MACH_TYPE_WAYLAND 2363 -#define MACH_TYPE_ACNBSX102 2364 -#define MACH_TYPE_HWAT91 2365 -#define MACH_TYPE_AT91SAM9263CS 2366 -#define MACH_TYPE_CSB732 2367 -#define MACH_TYPE_U8500 2368 -#define MACH_TYPE_HUQIU 2369 -#define MACH_TYPE_MX51_EFIKASB 2370 -#define MACH_TYPE_PMT1G 2371 -#define MACH_TYPE_HTCELF 2372 -#define MACH_TYPE_ARMADILLO420 2373 -#define MACH_TYPE_ARMADILLO440 2374 -#define MACH_TYPE_U_CHIP_DUAL_ARM 2375 -#define MACH_TYPE_CSR_BDB3 2376 -#define MACH_TYPE_DOLBY_CAT1018 2377 -#define MACH_TYPE_HY9307 2378 -#define MACH_TYPE_A_ES 2379 -#define MACH_TYPE_DAVINCI_IRIF 2380 -#define MACH_TYPE_AGAMA9263 2381 -#define MACH_TYPE_MARVELL_JASPER 2382 -#define MACH_TYPE_FLINT 2383 -#define MACH_TYPE_TAVOREVB3 2384 -#define MACH_TYPE_SCH_M490 2386 -#define MACH_TYPE_RBL01 2387 -#define MACH_TYPE_OMNIFI 2388 -#define MACH_TYPE_OTAVALO 2389 -#define MACH_TYPE_SIENNA 2390 -#define MACH_TYPE_HTC_EXCALIBUR_S620 2391 -#define MACH_TYPE_HTC_OPAL 2392 -#define MACH_TYPE_TOUCHBOOK 2393 -#define MACH_TYPE_LATTE 2394 -#define MACH_TYPE_XA200 2395 -#define MACH_TYPE_NIMROD 2396 -#define MACH_TYPE_CC9P9215_3G 2397 -#define MACH_TYPE_CC9P9215_3GJS 2398 -#define MACH_TYPE_TK71 2399 -#define MACH_TYPE_COMHAM3525 2400 -#define MACH_TYPE_MX31EREBUS 2401 -#define MACH_TYPE_MCARDMX27 2402 -#define MACH_TYPE_PARADISE 2403 -#define MACH_TYPE_TIDE 2404 -#define MACH_TYPE_WZL2440 2405 -#define MACH_TYPE_SDRDEMO 2406 -#define MACH_TYPE_ETHERCAN2 2407 -#define MACH_TYPE_ECMIMG20 2408 -#define MACH_TYPE_OMAP_DRAGON 2409 -#define MACH_TYPE_HALO 2410 -#define MACH_TYPE_HUANGSHAN 2411 -#define MACH_TYPE_VL_MA2SC 2412 -#define MACH_TYPE_RAUMFELD_RC 2413 -#define MACH_TYPE_RAUMFELD_CONNECTOR 2414 -#define MACH_TYPE_RAUMFELD_SPEAKER 2415 -#define MACH_TYPE_MULTIBUS_MASTER 2416 -#define MACH_TYPE_MULTIBUS_PBK 2417 -#define MACH_TYPE_TNETV107X 2418 -#define MACH_TYPE_SNAKE 2419 -#define MACH_TYPE_CWMX27 2420 -#define MACH_TYPE_SCH_M480 2421 -#define MACH_TYPE_PLATYPUS 2422 -#define MACH_TYPE_PSS2 2423 -#define MACH_TYPE_DAVINCI_APM150 2424 -#define MACH_TYPE_STR9100 2425 -#define MACH_TYPE_NET5BIG 2426 -#define MACH_TYPE_SEABED9263 2427 -#define MACH_TYPE_MX51_M2ID 2428 -#define MACH_TYPE_OCTVOCPLUS_EB 2429 -#define MACH_TYPE_KLK_FIREFOX 2430 -#define MACH_TYPE_KLK_WIRMA_MODULE 2431 -#define MACH_TYPE_KLK_WIRMA_MMI 2432 -#define MACH_TYPE_SUPERSONIC 2433 -#define MACH_TYPE_LIBERTY 2434 -#define MACH_TYPE_MH355 2435 -#define MACH_TYPE_PC7802 2436 -#define MACH_TYPE_GNET_SGC 2437 -#define MACH_TYPE_EINSTEIN15 2438 -#define MACH_TYPE_CMPD 2439 -#define MACH_TYPE_DAVINCI_HASE1 2440 -#define MACH_TYPE_LGEINCITEPHONE 2441 -#define MACH_TYPE_EA313X 2442 -#define MACH_TYPE_FWBD_39064 2443 -#define MACH_TYPE_FWBD_390128 2444 -#define MACH_TYPE_PELCO_MOE 2445 -#define MACH_TYPE_MINIMIX27 2446 -#define MACH_TYPE_OMAP3_THUNDER 2447 -#define MACH_TYPE_PASSIONC 2448 -#define MACH_TYPE_MX27AMATA 2449 -#define MACH_TYPE_BGAT1 2450 -#define MACH_TYPE_BUZZ 2451 -#define MACH_TYPE_MB9G20 2452 -#define MACH_TYPE_YUSHAN 2453 -#define MACH_TYPE_LIZARD 2454 -#define MACH_TYPE_OMAP3POLYCOM 2455 -#define MACH_TYPE_SMDKV210 2456 -#define MACH_TYPE_BRAVO 2457 -#define MACH_TYPE_SIOGENTOO1 2458 -#define MACH_TYPE_SIOGENTOO2 2459 -#define MACH_TYPE_SM3K 2460 -#define MACH_TYPE_ACER_TEMPO_F900 2461 -#define MACH_TYPE_SST61VC010_DEV 2462 -#define MACH_TYPE_GLITTERTIND 2463 -#define MACH_TYPE_OMAP_ZOOM3 2464 -#define MACH_TYPE_OMAP_3630SDP 2465 -#define MACH_TYPE_CYBOOK2440 2466 -#define MACH_TYPE_TORINO_S 2467 -#define MACH_TYPE_HAVANA 2468 -#define MACH_TYPE_BEAUMONT_11 2469 -#define MACH_TYPE_VANGUARD 2470 -#define MACH_TYPE_S5PC110_DRACO 2471 -#define MACH_TYPE_CARTESIO_TWO 2472 -#define MACH_TYPE_ASTER 2473 -#define MACH_TYPE_VOGUESV210 2474 -#define MACH_TYPE_ACM500X 2475 -#define MACH_TYPE_KM9260 2476 -#define MACH_TYPE_NIDEFLEXG1 2477 -#define MACH_TYPE_CTERA_PLUG_IO 2478 -#define MACH_TYPE_SMARTQ7 2479 -#define MACH_TYPE_AT91SAM9G10EK2 2480 -#define MACH_TYPE_ASUSP527 2481 -#define MACH_TYPE_AT91SAM9G20MPM2 2482 -#define MACH_TYPE_TOPASA900 2483 -#define MACH_TYPE_ELECTRUM_100 2484 -#define MACH_TYPE_MX51GRB 2485 -#define MACH_TYPE_XEA300 2486 -#define MACH_TYPE_HTCSTARTREK 2487 -#define MACH_TYPE_LIMA 2488 -#define MACH_TYPE_CSB740 2489 -#define MACH_TYPE_USB_S8815 2490 -#define MACH_TYPE_WATSON_EFM_PLUGIN 2491 -#define MACH_TYPE_MILKYWAY 2492 -#define MACH_TYPE_G4EVM 2493 -#define MACH_TYPE_PICOMOD6 2494 -#define MACH_TYPE_OMAPL138_HAWKBOARD 2495 -#define MACH_TYPE_IP6000 2496 -#define MACH_TYPE_IP6010 2497 -#define MACH_TYPE_UTM400 2498 -#define MACH_TYPE_OMAP3_ZYBEX 2499 -#define MACH_TYPE_WIRELESS_SPACE 2500 -#define MACH_TYPE_SX560 2501 -#define MACH_TYPE_TS41X 2502 -#define MACH_TYPE_ELPHEL10373 2503 -#define MACH_TYPE_RHOBOT 2504 -#define MACH_TYPE_MX51_REFRESH 2505 -#define MACH_TYPE_LS9260 2506 -#define MACH_TYPE_SHANK 2507 -#define MACH_TYPE_QSD8X50_ST1 2508 -#define MACH_TYPE_AT91SAM9M10EKES 2509 -#define MACH_TYPE_HIRAM 2510 -#define MACH_TYPE_PHY3250 2511 -#define MACH_TYPE_EA3250 2512 -#define MACH_TYPE_FDI3250 2513 -#define MACH_TYPE_WHITESTONE 2514 -#define MACH_TYPE_AT91SAM9263NIT 2515 -#define MACH_TYPE_CCMX51 2516 -#define MACH_TYPE_CCMX51JS 2517 -#define MACH_TYPE_CCWMX51 2518 -#define MACH_TYPE_CCWMX51JS 2519 -#define MACH_TYPE_MINI6410 2520 -#define MACH_TYPE_TINY6410 2521 -#define MACH_TYPE_NANO6410 2522 -#define MACH_TYPE_AT572D940HFNLDB 2523 -#define MACH_TYPE_HTCLEO 2524 -#define MACH_TYPE_AVP13 2525 -#define MACH_TYPE_XXSVIDEOD 2526 -#define MACH_TYPE_VPNEXT 2527 -#define MACH_TYPE_SWARCO_ITC3 2528 -#define MACH_TYPE_TX51 2529 -#define MACH_TYPE_DOLBY_CAT1021 2530 -#define MACH_TYPE_MX28EVK 2531 -#define MACH_TYPE_PHOENIX260 2532 -#define MACH_TYPE_UVACA_STORK 2533 -#define MACH_TYPE_SMARTQ5 2534 -#define MACH_TYPE_ALL3078 2535 -#define MACH_TYPE_CTERA_2BAY_DS 2536 -#define MACH_TYPE_SIOGENTOO3 2537 -#define MACH_TYPE_EPB5000 2538 -#define MACH_TYPE_HY9263 2539 -#define MACH_TYPE_ACER_TEMPO_M900 2540 -#define MACH_TYPE_ACER_TEMPO_DX900 2541 -#define MACH_TYPE_ACER_TEMPO_X960 2542 -#define MACH_TYPE_ACER_ETEN_V900 2543 -#define MACH_TYPE_ACER_ETEN_X900 2544 -#define MACH_TYPE_BONNELL 2545 -#define MACH_TYPE_OHT_MX27 2546 -#define MACH_TYPE_HTCQUARTZ 2547 -#define MACH_TYPE_DAVINCI_DM6467TEVM 2548 -#define MACH_TYPE_C3AX03 2549 -#define MACH_TYPE_MXT_TD60 2550 -#define MACH_TYPE_ESYX 2551 -#define MACH_TYPE_DOVE_DB2 2552 -#define MACH_TYPE_BULLDOG 2553 -#define MACH_TYPE_DERELL_ME2000 2554 -#define MACH_TYPE_BCMRING_BASE 2555 -#define MACH_TYPE_BCMRING_EVM 2556 -#define MACH_TYPE_BCMRING_EVM_JAZZ 2557 -#define MACH_TYPE_BCMRING_SP 2558 -#define MACH_TYPE_BCMRING_SV 2559 -#define MACH_TYPE_BCMRING_SV_JAZZ 2560 -#define MACH_TYPE_BCMRING_TABLET 2561 -#define MACH_TYPE_BCMRING_VP 2562 -#define MACH_TYPE_BCMRING_EVM_SEIKOR 2563 -#define MACH_TYPE_BCMRING_SP_WQVGA 2564 -#define MACH_TYPE_BCMRING_CUSTOM 2565 -#define MACH_TYPE_ACER_S200 2566 -#define MACH_TYPE_BT270 2567 -#define MACH_TYPE_ISEO 2568 -#define MACH_TYPE_CEZANNE 2569 -#define MACH_TYPE_LUCCA 2570 -#define MACH_TYPE_SUPERSMART 2571 -#define MACH_TYPE_CS_MISANO 2572 -#define MACH_TYPE_MAGNOLIA2 2573 -#define MACH_TYPE_EMXX 2574 -#define MACH_TYPE_OUTLAW 2575 -#define MACH_TYPE_RIOT_BEI2 2576 -#define MACH_TYPE_RIOT_VOX 2577 -#define MACH_TYPE_RIOT_X37 2578 -#define MACH_TYPE_MEGA25MX 2579 -#define MACH_TYPE_BENZINA2 2580 -#define MACH_TYPE_IGNITE 2581 -#define MACH_TYPE_FOGGIA 2582 -#define MACH_TYPE_AREZZO 2583 -#define MACH_TYPE_LEICA_SKYWALKER 2584 -#define MACH_TYPE_JACINTO2_JAMR 2585 -#define MACH_TYPE_GTS_NOVA 2586 -#define MACH_TYPE_P3600 2587 -#define MACH_TYPE_DLT2 2588 -#define MACH_TYPE_DF3120 2589 -#define MACH_TYPE_ECUCORE_9G20 2590 -#define MACH_TYPE_NAUTEL_LPC3240 2591 -#define MACH_TYPE_GLACIER 2592 -#define MACH_TYPE_PHRAZER_BULLDOG 2593 -#define MACH_TYPE_OMAP3_BULLDOG 2594 -#define MACH_TYPE_PCA101 2595 -#define MACH_TYPE_BUZZC 2596 -#define MACH_TYPE_SASIE2 2597 -#define MACH_TYPE_DAVINCI_CIO 2598 -#define MACH_TYPE_SMARTMETER_DL 2599 -#define MACH_TYPE_WZL6410 2600 -#define MACH_TYPE_WZL6410M 2601 -#define MACH_TYPE_WZL6410F 2602 -#define MACH_TYPE_WZL6410I 2603 -#define MACH_TYPE_SPACECOM1 2604 -#define MACH_TYPE_PINGU920 2605 -#define MACH_TYPE_BRAVOC 2606 -#define MACH_TYPE_CYBO2440 2607 -#define MACH_TYPE_VDSSW 2608 -#define MACH_TYPE_ROMULUS 2609 -#define MACH_TYPE_OMAP_MAGIC 2610 -#define MACH_TYPE_ELTD100 2611 -#define MACH_TYPE_CAPC7117 2612 -#define MACH_TYPE_SWAN 2613 -#define MACH_TYPE_VEU 2614 -#define MACH_TYPE_RM2 2615 -#define MACH_TYPE_TT2100 2616 -#define MACH_TYPE_VENICE 2617 -#define MACH_TYPE_PC7323 2618 -#define MACH_TYPE_MASP 2619 -#define MACH_TYPE_FUJITSU_TVSTBSOC 2620 -#define MACH_TYPE_FUJITSU_TVSTBSOC1 2621 -#define MACH_TYPE_LEXIKON 2622 -#define MACH_TYPE_MINI2440V2 2623 -#define MACH_TYPE_ICONTROL 2624 -#define MACH_TYPE_SHEEVAD 2625 -#define MACH_TYPE_QSD8X50A_ST1_1 2626 -#define MACH_TYPE_QSD8X50A_ST1_5 2627 -#define MACH_TYPE_BEE 2628 -#define MACH_TYPE_MX23EVK 2629 -#define MACH_TYPE_AP4EVB 2630 -#define MACH_TYPE_STOCKHOLM 2631 -#define MACH_TYPE_LPC_H3131 2632 -#define MACH_TYPE_STINGRAY 2633 -#define MACH_TYPE_KRAKEN 2634 -#define MACH_TYPE_GW2388 2635 -#define MACH_TYPE_JADECPU 2636 -#define MACH_TYPE_CARLISLE 2637 -#define MACH_TYPE_LUX_SF9 2638 -#define MACH_TYPE_NEMID_TB 2639 -#define MACH_TYPE_TERRIER 2640 -#define MACH_TYPE_TURBOT 2641 -#define MACH_TYPE_SANDDAB 2642 -#define MACH_TYPE_MX35_CICADA 2643 -#define MACH_TYPE_GHI2703D 2644 -#define MACH_TYPE_LUX_SFX9 2645 -#define MACH_TYPE_LUX_SF9G 2646 -#define MACH_TYPE_LUX_EDK9 2647 -#define MACH_TYPE_HW90240 2648 -#define MACH_TYPE_DM365_LEOPARD 2649 -#define MACH_TYPE_MITYOMAPL138 2650 -#define MACH_TYPE_SCAT110 2651 -#define MACH_TYPE_ACER_A1 2652 -#define MACH_TYPE_CMCONTROL 2653 -#define MACH_TYPE_PELCO_LAMAR 2654 -#define MACH_TYPE_RFP43 2655 -#define MACH_TYPE_SK86R0301 2656 -#define MACH_TYPE_CTPXA 2657 -#define MACH_TYPE_EPB_ARM9_A 2658 -#define MACH_TYPE_GURUPLUG 2659 -#define MACH_TYPE_SPEAR310 2660 -#define MACH_TYPE_SPEAR320 2661 -#define MACH_TYPE_ROBOTX 2662 -#define MACH_TYPE_LSXHL 2663 -#define MACH_TYPE_SMARTLITE 2664 -#define MACH_TYPE_CWS2 2665 -#define MACH_TYPE_M619 2666 -#define MACH_TYPE_SMARTVIEW 2667 -#define MACH_TYPE_LSA_SALSA 2668 -#define MACH_TYPE_KIZBOX 2669 -#define MACH_TYPE_HTCCHARMER 2670 -#define MACH_TYPE_GUF_NESO_LT 2671 -#define MACH_TYPE_PM9G45 2672 -#define MACH_TYPE_HTCPANTHER 2673 -#define MACH_TYPE_HTCPANTHER_CDMA 2674 -#define MACH_TYPE_REB01 2675 -#define MACH_TYPE_AQUILA 2676 -#define MACH_TYPE_SPARK_SLS_HW2 2677 -#define MACH_TYPE_ESATA_SHEEVAPLUG 2678 -#define MACH_TYPE_MSM7X30_SURF 2679 -#define MACH_TYPE_MICRO2440 2680 -#define MACH_TYPE_AM2440 2681 -#define MACH_TYPE_TQ2440 2682 -#define MACH_TYPE_LPC2478OEM 2683 -#define MACH_TYPE_AK880X 2684 -#define MACH_TYPE_COBRA3530 2685 -#define MACH_TYPE_PMPPB 2686 -#define MACH_TYPE_U6715 2687 -#define MACH_TYPE_AXAR1500_SENDER 2688 -#define MACH_TYPE_G30_DVB 2689 -#define MACH_TYPE_VC088X 2690 -#define MACH_TYPE_MIOA702 2691 -#define MACH_TYPE_HPMIN 2692 -#define MACH_TYPE_AK880XAK 2693 -#define MACH_TYPE_ARM926TOMAP850 2694 -#define MACH_TYPE_LKEVM 2695 -#define MACH_TYPE_MW6410 2696 -#define MACH_TYPE_TERASTATION_WXL 2697 -#define MACH_TYPE_CPU8000E 2698 -#define MACH_TYPE_CATANIA 2699 -#define MACH_TYPE_TOKYO 2700 -#define MACH_TYPE_MSM7201A_SURF 2701 -#define MACH_TYPE_MSM7201A_FFA 2702 -#define MACH_TYPE_MSM7X25_SURF 2703 -#define MACH_TYPE_MSM7X25_FFA 2704 -#define MACH_TYPE_MSM7X27_SURF 2705 -#define MACH_TYPE_MSM7X27_FFA 2706 -#define MACH_TYPE_MSM7X30_FFA 2707 -#define MACH_TYPE_QSD8X50_SURF 2708 -#define MACH_TYPE_QSD8X50_COMET 2709 -#define MACH_TYPE_QSD8X50_FFA 2710 -#define MACH_TYPE_QSD8X50A_SURF 2711 -#define MACH_TYPE_QSD8X50A_FFA 2712 -#define MACH_TYPE_ADX_XGCP10 2713 -#define MACH_TYPE_MCGWUMTS2A 2714 -#define MACH_TYPE_MOBIKT 2715 -#define MACH_TYPE_MX53_EVK 2716 -#define MACH_TYPE_IGEP0030 2717 -#define MACH_TYPE_AXELL_H40_H50_CTRL 2718 -#define MACH_TYPE_DTCOMMOD 2719 -#define MACH_TYPE_GOULD 2720 -#define MACH_TYPE_SIBERIA 2721 -#define MACH_TYPE_SBC3530 2722 -#define MACH_TYPE_QARM 2723 -#define MACH_TYPE_MIPS 2724 -#define MACH_TYPE_MX27GRB 2725 -#define MACH_TYPE_SBC8100 2726 -#define MACH_TYPE_SAARB 2727 -#define MACH_TYPE_OMAP3MINI 2728 -#define MACH_TYPE_CNMBOOK7SE 2729 -#define MACH_TYPE_CATAN 2730 -#define MACH_TYPE_HARMONY 2731 -#define MACH_TYPE_TONGA 2732 -#define MACH_TYPE_CYBOOK_ORIZON 2733 -#define MACH_TYPE_HTCRHODIUMCDMA 2734 -#define MACH_TYPE_EPC_G45 2735 -#define MACH_TYPE_EPC_LPC3250 2736 -#define MACH_TYPE_MXC91341EVB 2737 -#define MACH_TYPE_RTW1000 2738 -#define MACH_TYPE_BOBCAT 2739 -#define MACH_TYPE_TRIZEPS6 2740 -#define MACH_TYPE_MSM7X30_FLUID 2741 -#define MACH_TYPE_NEDAP9263 2742 -#define MACH_TYPE_NETGEAR_MS2110 2743 -#define MACH_TYPE_BMX 2744 -#define MACH_TYPE_NETSTREAM 2745 -#define MACH_TYPE_VPNEXT_RCU 2746 -#define MACH_TYPE_VPNEXT_MPU 2747 -#define MACH_TYPE_BCMRING_TABLET_V1 2748 -#define MACH_TYPE_SGARM10 2749 -#define MACH_TYPE_CM_T3517 2750 -#define MACH_TYPE_OMAP3_CPS 2751 -#define MACH_TYPE_AXAR1500_RECEIVER 2752 -#define MACH_TYPE_WBD222 2753 -#define MACH_TYPE_MT65XX 2754 -#define MACH_TYPE_MSM8X60_SURF 2755 -#define MACH_TYPE_MSM8X60_SIM 2756 -#define MACH_TYPE_VMC300 2757 -#define MACH_TYPE_TCC8000_SDK 2758 -#define MACH_TYPE_NANOS 2759 -#define MACH_TYPE_STAMP9G10 2760 -#define MACH_TYPE_STAMP9G45 2761 -#define MACH_TYPE_H6053 2762 -#define MACH_TYPE_SMINT01 2763 -#define MACH_TYPE_PRTLVT2 2764 -#define MACH_TYPE_AP420 2765 -#define MACH_TYPE_HTCSHIFT 2766 -#define MACH_TYPE_DAVINCI_DM365_FC 2767 -#define MACH_TYPE_MSM8X55_SURF 2768 -#define MACH_TYPE_MSM8X55_FFA 2769 -#define MACH_TYPE_ESL_VAMANA 2770 -#define MACH_TYPE_SBC35 2771 -#define MACH_TYPE_MPX6446 2772 -#define MACH_TYPE_OREO_CONTROLLER 2773 -#define MACH_TYPE_KOPIN_MODELS 2774 -#define MACH_TYPE_TTC_VISION2 2775 -#define MACH_TYPE_CNS3420VB 2776 -#define MACH_TYPE_LPC2 2777 -#define MACH_TYPE_OLYMPUS 2778 -#define MACH_TYPE_VORTEX 2779 -#define MACH_TYPE_S5PC200 2780 -#define MACH_TYPE_ECUCORE_9263 2781 -#define MACH_TYPE_SMDKC200 2782 -#define MACH_TYPE_EMSISO_SX27 2783 -#define MACH_TYPE_APX_SOM9G45_EK 2784 -#define MACH_TYPE_SONGSHAN 2785 -#define MACH_TYPE_TIANSHAN 2786 -#define MACH_TYPE_VPX500 2787 -#define MACH_TYPE_AM3517SAM 2788 -#define MACH_TYPE_SKAT91_SIM508 2789 -#define MACH_TYPE_SKAT91_S3E 2790 -#define MACH_TYPE_OMAP4_PANDA 2791 -#define MACH_TYPE_DF7220 2792 -#define MACH_TYPE_NEMINI 2793 -#define MACH_TYPE_T8200 2794 -#define MACH_TYPE_APF51 2795 -#define MACH_TYPE_DR_RC_UNIT 2796 -#define MACH_TYPE_BORDEAUX 2797 -#define MACH_TYPE_CATANIA_B 2798 -#define MACH_TYPE_MX51_OCEAN 2799 -#define MACH_TYPE_TI8168EVM 2800 -#define MACH_TYPE_NEOCOREOMAP 2801 -#define MACH_TYPE_WITHINGS_WBP 2802 -#define MACH_TYPE_DBPS 2803 -#define MACH_TYPE_SBC9261 2804 -#define MACH_TYPE_PCBFP0001 2805 -#define MACH_TYPE_SPEEDY 2806 -#define MACH_TYPE_CHRYSAOR 2807 -#define MACH_TYPE_TANGO 2808 -#define MACH_TYPE_SYNOLOGY_DSX11 2809 -#define MACH_TYPE_HANLIN_V3EXT 2810 -#define MACH_TYPE_HANLIN_V5 2811 -#define MACH_TYPE_HANLIN_V3PLUS 2812 -#define MACH_TYPE_IRIVER_STORY 2813 -#define MACH_TYPE_IREX_ILIAD 2814 -#define MACH_TYPE_IREX_DR1000 2815 -#define MACH_TYPE_TETON_BGA 2816 -#define MACH_TYPE_SNAPPER9G45 2817 -#define MACH_TYPE_TAM3517 2818 -#define MACH_TYPE_PDC100 2819 -#define MACH_TYPE_EUKREA_CPUIMX25 2820 -#define MACH_TYPE_EUKREA_CPUIMX35 2821 -#define MACH_TYPE_EUKREA_CPUIMX51SD 2822 -#define MACH_TYPE_EUKREA_CPUIMX51 2823 -#define MACH_TYPE_P565 2824 -#define MACH_TYPE_ACER_A4 2825 -#define MACH_TYPE_DAVINCI_DM368_BIP 2826 -#define MACH_TYPE_ESHARE 2827 -#define MACH_TYPE_HW_OMAPL138_EUROPA 2828 -#define MACH_TYPE_WLBARGN 2829 -#define MACH_TYPE_BM170 2830 -#define MACH_TYPE_NETSPACE_MINI_V2 2831 -#define MACH_TYPE_NETSPACE_PLUG_V2 2832 -#define MACH_TYPE_SIEMENS_L1 2833 -#define MACH_TYPE_ELV_LCU1 2834 -#define MACH_TYPE_MCU1 2835 -#define MACH_TYPE_OMAP3_TAO3530 2836 -#define MACH_TYPE_OMAP3_PCUTOUCH 2837 -#define MACH_TYPE_SMDKC210 2838 -#define MACH_TYPE_OMAP3_BRAILLO 2839 -#define MACH_TYPE_SPYPLUG 2840 -#define MACH_TYPE_GINGER 2841 -#define MACH_TYPE_TNY_T3530 2842 -#define MACH_TYPE_PCA102 2843 -#define MACH_TYPE_SPADE 2844 -#define MACH_TYPE_MXC25_TOPAZ 2845 -#define MACH_TYPE_T5325 2846 -#define MACH_TYPE_GW2361 2847 -#define MACH_TYPE_ELOG 2848 -#define MACH_TYPE_INCOME 2849 -#define MACH_TYPE_BCM589X 2850 -#define MACH_TYPE_ETNA 2851 -#define MACH_TYPE_HAWKS 2852 -#define MACH_TYPE_MESON 2853 -#define MACH_TYPE_XSBASE255 2854 -#define MACH_TYPE_PVM2030 2855 -#define MACH_TYPE_MIOA502 2856 -#define MACH_TYPE_VVBOX_SDORIG2 2857 -#define MACH_TYPE_VVBOX_SDLITE2 2858 -#define MACH_TYPE_VVBOX_SDPRO4 2859 -#define MACH_TYPE_HTC_SPV_M700 2860 -#define MACH_TYPE_MX257SX 2861 -#define MACH_TYPE_GONI 2862 -#define MACH_TYPE_MSM8X55_SVLTE_FFA 2863 -#define MACH_TYPE_MSM8X55_SVLTE_SURF 2864 -#define MACH_TYPE_QUICKSTEP 2865 -#define MACH_TYPE_DMW96 2866 -#define MACH_TYPE_HAMMERHEAD 2867 -#define MACH_TYPE_TRIDENT 2868 -#define MACH_TYPE_LIGHTNING 2869 -#define MACH_TYPE_ICONNECT 2870 -#define MACH_TYPE_AUTOBOT 2871 -#define MACH_TYPE_COCONUT 2872 -#define MACH_TYPE_DURIAN 2873 -#define MACH_TYPE_CAYENNE 2874 -#define MACH_TYPE_FUJI 2875 -#define MACH_TYPE_SYNOLOGY_6282 2876 -#define MACH_TYPE_EM1SY 2877 -#define MACH_TYPE_M502 2878 -#define MACH_TYPE_MATRIX518 2879 -#define MACH_TYPE_TINY_GURNARD 2880 -#define MACH_TYPE_SPEAR1310 2881 -#define MACH_TYPE_BV07 2882 -#define MACH_TYPE_MXT_TD61 2883 -#define MACH_TYPE_OPENRD_ULTIMATE 2884 -#define MACH_TYPE_DEVIXP 2885 -#define MACH_TYPE_MICCPT 2886 -#define MACH_TYPE_MIC256 2887 -#define MACH_TYPE_AS1167 2888 -#define MACH_TYPE_OMAP3_IBIZA 2889 -#define MACH_TYPE_U5500 2890 -#define MACH_TYPE_DAVINCI_PICTO 2891 -#define MACH_TYPE_MECHA 2892 -#define MACH_TYPE_BUBBA3 2893 -#define MACH_TYPE_PUPITRE 2894 -#define MACH_TYPE_TEGRA_HARMONY 2895 -#define MACH_TYPE_TEGRA_VOGUE 2896 -#define MACH_TYPE_TEGRA_E1165 2897 -#define MACH_TYPE_SIMPLENET 2898 -#define MACH_TYPE_EC4350TBM 2899 -#define MACH_TYPE_PEC_TC 2900 -#define MACH_TYPE_PEC_HC2 2901 -#define MACH_TYPE_ESL_MOBILIS_A 2902 -#define MACH_TYPE_ESL_MOBILIS_B 2903 -#define MACH_TYPE_ESL_WAVE_A 2904 -#define MACH_TYPE_ESL_WAVE_B 2905 -#define MACH_TYPE_UNISENSE_MMM 2906 -#define MACH_TYPE_BLUESHARK 2907 -#define MACH_TYPE_E10 2908 -#define MACH_TYPE_APP3K_ROBIN 2909 -#define MACH_TYPE_POV15HD 2910 -#define MACH_TYPE_STELLA 2911 -#define MACH_TYPE_LINKSTATION_LSCHL 2913 -#define MACH_TYPE_NETWALKER 2914 -#define MACH_TYPE_ACSX106 2915 -#define MACH_TYPE_ATLAS5_C1 2916 -#define MACH_TYPE_NSB3AST 2917 -#define MACH_TYPE_GNET_SLC 2918 -#define MACH_TYPE_AF4000 2919 -#define MACH_TYPE_ARK9431 2920 -#define MACH_TYPE_FS_S5PC100 2921 -#define MACH_TYPE_OMAP3505NOVA8 2922 -#define MACH_TYPE_OMAP3621_EDP1 2923 -#define MACH_TYPE_ORATISAES 2924 -#define MACH_TYPE_SMDKV310 2925 -#define MACH_TYPE_SIEMENS_L0 2926 -#define MACH_TYPE_VENTANA 2927 -#define MACH_TYPE_WM8505_7IN_NETBOOK 2928 -#define MACH_TYPE_EC4350SDB 2929 -#define MACH_TYPE_MIMAS 2930 -#define MACH_TYPE_TITAN 2931 -#define MACH_TYPE_CRANEBOARD 2932 -#define MACH_TYPE_ES2440 2933 -#define MACH_TYPE_NAJAY_A9263 2934 -#define MACH_TYPE_HTCTORNADO 2935 -#define MACH_TYPE_DIMM_MX257 2936 -#define MACH_TYPE_JIGEN 2937 -#define MACH_TYPE_SMDK6450 2938 -#define MACH_TYPE_MENO_QNG 2939 -#define MACH_TYPE_NS2416 2940 -#define MACH_TYPE_RPC353 2941 -#define MACH_TYPE_TQ6410 2942 -#define MACH_TYPE_SKY6410 2943 -#define MACH_TYPE_DYNASTY 2944 -#define MACH_TYPE_VIVO 2945 -#define MACH_TYPE_BURY_BL7582 2946 -#define MACH_TYPE_BURY_BPS5270 2947 -#define MACH_TYPE_BASI 2948 -#define MACH_TYPE_TN200 2949 -#define MACH_TYPE_C2MMI 2950 -#define MACH_TYPE_MESON_6236M 2951 -#define MACH_TYPE_MESON_8626M 2952 -#define MACH_TYPE_TUBE 2953 -#define MACH_TYPE_MESSINA 2954 -#define MACH_TYPE_MX50_ARM2 2955 -#define MACH_TYPE_CETUS9263 2956 -#define MACH_TYPE_BROWNSTONE 2957 -#define MACH_TYPE_VMX25 2958 -#define MACH_TYPE_VMX51 2959 -#define MACH_TYPE_ABACUS 2960 -#define MACH_TYPE_CM4745 2961 -#define MACH_TYPE_ORATISLINK 2962 -#define MACH_TYPE_DAVINCI_DM365_DVR 2963 -#define MACH_TYPE_NETVIZ 2964 -#define MACH_TYPE_FLEXIBITY 2965 -#define MACH_TYPE_WLAN_COMPUTER 2966 -#define MACH_TYPE_LPC24XX 2967 -#define MACH_TYPE_SPICA 2968 -#define MACH_TYPE_GPSDISPLAY 2969 -#define MACH_TYPE_BIPNET 2970 -#define MACH_TYPE_OVERO_CTU_INERTIAL 2971 -#define MACH_TYPE_DAVINCI_DM355_MMM 2972 -#define MACH_TYPE_PC9260_V2 2973 -#define MACH_TYPE_PTX7545 2974 -#define MACH_TYPE_TM_EFDC 2975 -#define MACH_TYPE_OMAP3_WALDO1 2977 -#define MACH_TYPE_FLYER 2978 -#define MACH_TYPE_TORNADO3240 2979 -#define MACH_TYPE_SOLI_01 2980 -#define MACH_TYPE_OMAPL138_EUROPALC 2981 -#define MACH_TYPE_HELIOS_V1 2982 -#define MACH_TYPE_NETSPACE_LITE_V2 2983 -#define MACH_TYPE_SSC 2984 -#define MACH_TYPE_PREMIERWAVE_EN 2985 -#define MACH_TYPE_WASABI 2986 -#define MACH_TYPE_VIVOW 2987 -#define MACH_TYPE_MX50_RDP 2988 -#define MACH_TYPE_UNIVERSAL_C210 2989 -#define MACH_TYPE_REAL6410 2990 -#define MACH_TYPE_SPX_SAKURA 2991 -#define MACH_TYPE_IJ3K_2440 2992 -#define MACH_TYPE_OMAP3_BC10 2993 -#define MACH_TYPE_THEBE 2994 -#define MACH_TYPE_RV082 2995 -#define MACH_TYPE_ARMLGUEST 2996 -#define MACH_TYPE_TJINC1000 2997 -#define MACH_TYPE_DOCKSTAR 2998 -#define MACH_TYPE_AX8008 2999 -#define MACH_TYPE_GNET_SGCE 3000 -#define MACH_TYPE_PXWNAS_500_1000 3001 -#define MACH_TYPE_EA20 3002 -#define MACH_TYPE_AWM2 3003 -#define MACH_TYPE_TI8148EVM 3004 -#define MACH_TYPE_SEABOARD 3005 -#define MACH_TYPE_LINKSTATION_CHLV2 3006 -#define MACH_TYPE_TERA_PRO2_RACK 3007 -#define MACH_TYPE_RUBYS 3008 -#define MACH_TYPE_AQUARIUS 3009 -#define MACH_TYPE_MX53_ARD 3010 -#define MACH_TYPE_MX53_SMD 3011 -#define MACH_TYPE_LSWXL 3012 -#define MACH_TYPE_DOVE_AVNG_V3 3013 -#define MACH_TYPE_SDI_ESS_9263 3014 -#define MACH_TYPE_JOCPU550 3015 -#define MACH_TYPE_MSM8X60_RUMI3 3016 -#define MACH_TYPE_MSM8X60_FFA 3017 -#define MACH_TYPE_YANOMAMI 3018 -#define MACH_TYPE_GTA04 3019 -#define MACH_TYPE_CM_A510 3020 -#define MACH_TYPE_OMAP3_RFS200 3021 -#define MACH_TYPE_KX33XX 3022 -#define MACH_TYPE_PTX7510 3023 -#define MACH_TYPE_TOP9000 3024 -#define MACH_TYPE_TEENOTE 3025 -#define MACH_TYPE_TS3 3026 -#define MACH_TYPE_A0 3027 -#define MACH_TYPE_FSM9XXX_SURF 3028 -#define MACH_TYPE_FSM9XXX_FFA 3029 -#define MACH_TYPE_FRRHWCDMA60W 3030 -#define MACH_TYPE_REMUS 3031 -#define MACH_TYPE_AT91CAP7XDK 3032 -#define MACH_TYPE_AT91CAP7STK 3033 -#define MACH_TYPE_KT_SBC_SAM9_1 3034 -#define MACH_TYPE_ORATISROUTER 3035 -#define MACH_TYPE_ARMADA_XP_DB 3036 -#define MACH_TYPE_SPDM 3037 -#define MACH_TYPE_GTIB 3038 -#define MACH_TYPE_DGM3240 3039 -#define MACH_TYPE_ATLAS_I_LPE 3040 -#define MACH_TYPE_HTCMEGA 3041 -#define MACH_TYPE_TRICORDER 3042 -#define MACH_TYPE_TX28 3043 -#define MACH_TYPE_BSTBRD 3044 -#define MACH_TYPE_PWB3090 3045 -#define MACH_TYPE_IDEA6410 3046 -#define MACH_TYPE_QBC9263 3047 -#define MACH_TYPE_BORABORA 3048 -#define MACH_TYPE_VALDEZ 3049 -#define MACH_TYPE_LS9G20 3050 -#define MACH_TYPE_MIOS_V1 3051 -#define MACH_TYPE_S5PC110_CRESPO 3052 -#define MACH_TYPE_CONTROLTEK9G20 3053 -#define MACH_TYPE_TIN307 3054 -#define MACH_TYPE_TIN510 3055 -#define MACH_TYPE_BLUECHEESE 3057 -#define MACH_TYPE_TEM3X30 3058 -#define MACH_TYPE_HARVEST_DESOTO 3059 -#define MACH_TYPE_MSM8X60_QRDC 3060 -#define MACH_TYPE_SPEAR900 3061 -#define MACH_TYPE_PCONTROL_G20 3062 -#define MACH_TYPE_RDSTOR 3063 -#define MACH_TYPE_USDLOADER 3064 -#define MACH_TYPE_TSOPLOADER 3065 -#define MACH_TYPE_KRONOS 3066 -#define MACH_TYPE_FFCORE 3067 -#define MACH_TYPE_MONE 3068 -#define MACH_TYPE_UNIT2S 3069 -#define MACH_TYPE_ACER_A5 3070 -#define MACH_TYPE_ETHERPRO_ISP 3071 -#define MACH_TYPE_STRETCHS7000 3072 -#define MACH_TYPE_P87_SMARTSIM 3073 -#define MACH_TYPE_TULIP 3074 -#define MACH_TYPE_SUNFLOWER 3075 -#define MACH_TYPE_RIB 3076 -#define MACH_TYPE_CLOD 3077 -#define MACH_TYPE_RUMP 3078 -#define MACH_TYPE_TENDERLOIN 3079 -#define MACH_TYPE_SHORTLOIN 3080 -#define MACH_TYPE_CRESPO 3081 -#define MACH_TYPE_ANTARES 3082 -#define MACH_TYPE_WB40N 3083 -#define MACH_TYPE_HERRING 3084 -#define MACH_TYPE_NAXY400 3085 -#define MACH_TYPE_NAXY1200 3086 -#define MACH_TYPE_VPR200 3087 -#define MACH_TYPE_BUG20 3088 -#define MACH_TYPE_GOFLEXNET 3089 -#define MACH_TYPE_TORBRECK 3090 -#define MACH_TYPE_SAARB_MG1 3091 -#define MACH_TYPE_CALLISTO 3092 -#define MACH_TYPE_MULTHSU 3093 -#define MACH_TYPE_SALUDA 3094 -#define MACH_TYPE_PEMP_OMAP3_APOLLO 3095 -#define MACH_TYPE_VC0718 3096 -#define MACH_TYPE_MVBLX 3097 -#define MACH_TYPE_INHAND_APEIRON 3098 -#define MACH_TYPE_INHAND_FURY 3099 -#define MACH_TYPE_INHAND_SIREN 3100 -#define MACH_TYPE_HDNVP 3101 -#define MACH_TYPE_SOFTWINNER 3102 -#define MACH_TYPE_PRIMA2_EVB 3103 -#define MACH_TYPE_NAS6210 3104 -#define MACH_TYPE_UNISDEV 3105 -#define MACH_TYPE_SBCA11 3106 -#define MACH_TYPE_SAGA 3107 -#define MACH_TYPE_NS_K330 3108 -#define MACH_TYPE_TANNA 3109 -#define MACH_TYPE_IMATE8502 3110 -#define MACH_TYPE_ASPEN 3111 -#define MACH_TYPE_DAINTREE_CWAC 3112 -#define MACH_TYPE_ZMX25 3113 -#define MACH_TYPE_MAPLE1 3114 -#define MACH_TYPE_QSD8X72_SURF 3115 -#define MACH_TYPE_QSD8X72_FFA 3116 -#define MACH_TYPE_ABILENE 3117 -#define MACH_TYPE_EIGEN_TTR 3118 -#define MACH_TYPE_IOMEGA_IX2_200 3119 -#define MACH_TYPE_CORETEC_VCX7400 3120 -#define MACH_TYPE_SANTIAGO 3121 -#define MACH_TYPE_MX257SOL 3122 -#define MACH_TYPE_STRASBOURG 3123 -#define MACH_TYPE_MSM8X60_FLUID 3124 -#define MACH_TYPE_SMARTQV5 3125 -#define MACH_TYPE_SMARTQV3 3126 -#define MACH_TYPE_SMARTQV7 3127 -#define MACH_TYPE_PAZ00 3128 -#define MACH_TYPE_ACMENETUSFOXG20 3129 -#define MACH_TYPE_HTCWILLOW 3130 -#define MACH_TYPE_FWBD_0404 3131 -#define MACH_TYPE_HDGU 3132 -#define MACH_TYPE_PYRAMID 3133 -#define MACH_TYPE_EPIPHAN 3134 -#define MACH_TYPE_OMAP_BENDER 3135 -#define MACH_TYPE_GURNARD 3136 -#define MACH_TYPE_GTL_IT5100 3137 -#define MACH_TYPE_BCM2708 3138 -#define MACH_TYPE_MX51_GGC 3139 -#define MACH_TYPE_SHARESPACE 3140 -#define MACH_TYPE_HABA_KNX_EXPLORER 3141 -#define MACH_TYPE_SIMTEC_KIRKMOD 3142 -#define MACH_TYPE_CRUX 3143 -#define MACH_TYPE_MX51_BRAVO 3144 -#define MACH_TYPE_CHARON 3145 -#define MACH_TYPE_PICOCOM3 3146 -#define MACH_TYPE_PICOCOM4 3147 -#define MACH_TYPE_SERRANO 3148 -#define MACH_TYPE_DOUBLESHOT 3149 -#define MACH_TYPE_EVSY 3150 -#define MACH_TYPE_HUASHAN 3151 -#define MACH_TYPE_LAUSANNE 3152 -#define MACH_TYPE_EMERALD 3153 -#define MACH_TYPE_TQMA35 3154 -#define MACH_TYPE_MARVEL 3155 -#define MACH_TYPE_MANUAE 3156 -#define MACH_TYPE_CHACHA 3157 -#define MACH_TYPE_LEMON 3158 -#define MACH_TYPE_CSC 3159 -#define MACH_TYPE_GIRA_KNXIP_ROUTER 3160 -#define MACH_TYPE_T20 3161 -#define MACH_TYPE_HDMINI 3162 -#define MACH_TYPE_SCIPHONE_G2 3163 -#define MACH_TYPE_EXPRESS 3164 -#define MACH_TYPE_EXPRESS_KT 3165 -#define MACH_TYPE_MAXIMASP 3166 -#define MACH_TYPE_NITROGEN_IMX51 3167 -#define MACH_TYPE_NITROGEN_IMX53 3168 -#define MACH_TYPE_SUNFIRE 3169 -#define MACH_TYPE_AROWANA 3170 -#define MACH_TYPE_TEGRA_DAYTONA 3171 -#define MACH_TYPE_TEGRA_SWORDFISH 3172 -#define MACH_TYPE_EDISON 3173 -#define MACH_TYPE_SVP8500V1 3174 -#define MACH_TYPE_SVP8500V2 3175 -#define MACH_TYPE_SVP5500 3176 -#define MACH_TYPE_B5500 3177 -#define MACH_TYPE_S5500 3178 -#define MACH_TYPE_ICON 3179 -#define MACH_TYPE_ELEPHANT 3180 -#define MACH_TYPE_MSM8X60_FUSION 3181 -#define MACH_TYPE_SHOOTER 3182 -#define MACH_TYPE_SPADE_LTE 3183 -#define MACH_TYPE_PHILHWANI 3184 -#define MACH_TYPE_GSNCOMM 3185 -#define MACH_TYPE_STRASBOURG_A2 3186 -#define MACH_TYPE_MMM 3187 -#define MACH_TYPE_DAVINCI_DM365_BV 3188 -#define MACH_TYPE_AG5EVM 3189 -#define MACH_TYPE_SC575PLC 3190 -#define MACH_TYPE_SC575IPC 3191 -#define MACH_TYPE_OMAP3_TDM3730 3192 -#define MACH_TYPE_G7 3193 -#define MACH_TYPE_TOP9000_EVAL 3194 -#define MACH_TYPE_TOP9000_SU 3195 -#define MACH_TYPE_UTM300 3196 -#define MACH_TYPE_TSUNAGI 3197 -#define MACH_TYPE_TS75XX 3198 -#define MACH_TYPE_MSM8X60_FUSN_FFA 3199 -#define MACH_TYPE_TS47XX 3200 -#define MACH_TYPE_DA850_K5 3201 -#define MACH_TYPE_AX502 3202 -#define MACH_TYPE_IGEP0032 3203 -#define MACH_TYPE_ANTERO 3204 -#define MACH_TYPE_SYNERGY 3205 -#define MACH_TYPE_ICS_IF_VOIP 3206 -#define MACH_TYPE_WLF_CRAGG_6410 3207 -#define MACH_TYPE_PUNICA 3208 -#define MACH_TYPE_TRIMSLICE 3209 -#define MACH_TYPE_MX27_WMULTRA 3210 -#define MACH_TYPE_MACKEREL 3211 -#define MACH_TYPE_FA9X27 3213 -#define MACH_TYPE_NS2816TB 3214 -#define MACH_TYPE_NS2816_NTPAD 3215 -#define MACH_TYPE_NS2816_NTNB 3216 -#define MACH_TYPE_KAEN 3217 -#define MACH_TYPE_NV1000 3218 -#define MACH_TYPE_NUC950TS 3219 -#define MACH_TYPE_NOKIA_RM680 3220 -#define MACH_TYPE_AST2200 3221 -#define MACH_TYPE_LEAD 3222 -#define MACH_TYPE_UNINO1 3223 -#define MACH_TYPE_GREECO 3224 -#define MACH_TYPE_VERDI 3225 -#define MACH_TYPE_DM6446_ADBOX 3226 -#define MACH_TYPE_QUAD_SALSA 3227 -#define MACH_TYPE_ABB_GMA_1_1 3228 -#define MACH_TYPE_SVCID 3229 -#define MACH_TYPE_MSM8960_SIM 3230 -#define MACH_TYPE_MSM8960_RUMI3 3231 -#define MACH_TYPE_ICON_G 3232 -#define MACH_TYPE_MB3 3233 -#define MACH_TYPE_GSIA18S 3234 -#define MACH_TYPE_PIVICC 3235 -#define MACH_TYPE_PCM048 3236 -#define MACH_TYPE_DDS 3237 -#define MACH_TYPE_CHALTEN_XA1 3238 -#define MACH_TYPE_TS48XX 3239 -#define MACH_TYPE_TONGA2_TFTTIMER 3240 -#define MACH_TYPE_WHISTLER 3241 -#define MACH_TYPE_ASL_PHOENIX 3242 -#define MACH_TYPE_AT91SAM9263OTLITE 3243 -#define MACH_TYPE_DDPLUG 3244 -#define MACH_TYPE_D2PLUG 3245 -#define MACH_TYPE_KZM9D 3246 -#define MACH_TYPE_VERDI_LTE 3247 -#define MACH_TYPE_NANOZOOM 3248 -#define MACH_TYPE_DM3730_SOM_LV 3249 -#define MACH_TYPE_DM3730_TORPEDO 3250 -#define MACH_TYPE_ANCHOVY 3251 -#define MACH_TYPE_RE2REV20 3253 -#define MACH_TYPE_RE2REV21 3254 -#define MACH_TYPE_CNS21XX 3255 -#define MACH_TYPE_RIDER 3257 -#define MACH_TYPE_NSK330 3258 -#define MACH_TYPE_CNS2133EVB 3259 -#define MACH_TYPE_Z3_816X_MOD 3260 -#define MACH_TYPE_Z3_814X_MOD 3261 -#define MACH_TYPE_BEECT 3262 -#define MACH_TYPE_DMA_THUNDERBUG 3263 -#define MACH_TYPE_OMN_AT91SAM9G20 3264 -#define MACH_TYPE_MX25_E2S_UC 3265 -#define MACH_TYPE_MIONE 3266 -#define MACH_TYPE_TOP9000_TCU 3267 -#define MACH_TYPE_TOP9000_BSL 3268 -#define MACH_TYPE_KINGDOM 3269 -#define MACH_TYPE_ARMADILLO460 3270 -#define MACH_TYPE_LQ2 3271 -#define MACH_TYPE_SWEDA_TMS2 3272 -#define MACH_TYPE_MX53_LOCO 3273 -#define MACH_TYPE_ACER_A8 3275 -#define MACH_TYPE_ACER_GAUGUIN 3276 -#define MACH_TYPE_GUPPY 3277 -#define MACH_TYPE_MX61_ARD 3278 -#define MACH_TYPE_TX53 3279 -#define MACH_TYPE_OMAPL138_CASE_A3 3280 -#define MACH_TYPE_UEMD 3281 -#define MACH_TYPE_CCWMX51MUT 3282 -#define MACH_TYPE_ROCKHOPPER 3283 -#define MACH_TYPE_NOOKCOLOR 3284 -#define MACH_TYPE_HKDKC100 3285 -#define MACH_TYPE_TS42XX 3286 -#define MACH_TYPE_AEBL 3287 -#define MACH_TYPE_WARIO 3288 -#define MACH_TYPE_GFS_SPM 3289 -#define MACH_TYPE_CM_T3730 3290 -#define MACH_TYPE_ISC3 3291 -#define MACH_TYPE_RASCAL 3292 -#define MACH_TYPE_HREFV60 3293 -#define MACH_TYPE_TPT_2_0 3294 -#define MACH_TYPE_PYRAMID_TD 3295 -#define MACH_TYPE_SPLENDOR 3296 -#define MACH_TYPE_GUF_PLANET 3297 -#define MACH_TYPE_MSM8X60_QT 3298 -#define MACH_TYPE_HTC_HD_MINI 3299 -#define MACH_TYPE_ATHENE 3300 -#define MACH_TYPE_DEEP_R_EK_1 3301 -#define MACH_TYPE_VIVOW_CT 3302 -#define MACH_TYPE_NERY_1000 3303 -#define MACH_TYPE_RFL109145_SSRV 3304 -#define MACH_TYPE_NMH 3305 -#define MACH_TYPE_WN802T 3306 -#define MACH_TYPE_DRAGONET 3307 -#define MACH_TYPE_GENEVA_B 3308 -#define MACH_TYPE_AT91SAM9263DESK16L 3309 -#define MACH_TYPE_BCMHANA_SV 3310 -#define MACH_TYPE_BCMHANA_TABLET 3311 -#define MACH_TYPE_KOI 3312 -#define MACH_TYPE_TS4800 3313 -#define MACH_TYPE_TQMA9263 3314 -#define MACH_TYPE_HOLIDAY 3315 -#define MACH_TYPE_DMA6410 3316 -#define MACH_TYPE_PCATS_OVERLAY 3317 -#define MACH_TYPE_HWGW6410 3318 -#define MACH_TYPE_SHENZHOU 3319 -#define MACH_TYPE_CWME9210 3320 -#define MACH_TYPE_CWME9210JS 3321 -#define MACH_TYPE_PGS_SITARA 3322 -#define MACH_TYPE_COLIBRI_TEGRA2 3323 -#define MACH_TYPE_W21 3324 -#define MACH_TYPE_POLYSAT1 3325 -#define MACH_TYPE_DATAWAY 3326 -#define MACH_TYPE_COBRAL138 3327 -#define MACH_TYPE_ROVERPCS8 3328 -#define MACH_TYPE_MARVELC 3329 -#define MACH_TYPE_NAVEFIHID 3330 -#define MACH_TYPE_DM365_CV100 3331 -#define MACH_TYPE_ABLE 3332 -#define MACH_TYPE_LEGACY 3333 -#define MACH_TYPE_ICONG 3334 -#define MACH_TYPE_ROVER_G8 3335 -#define MACH_TYPE_T5388P 3336 -#define MACH_TYPE_DINGO 3337 -#define MACH_TYPE_GOFLEXHOME 3338 - -#ifdef CONFIG_ARCH_EBSA110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EBSA110 -# endif -# define machine_is_ebsa110() (machine_arch_type == MACH_TYPE_EBSA110) -#else -# define machine_is_ebsa110() (0) -#endif - -#ifdef CONFIG_ARCH_RPC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RISCPC -# endif -# define machine_is_riscpc() (machine_arch_type == MACH_TYPE_RISCPC) -#else -# define machine_is_riscpc() (0) -#endif - -#ifdef CONFIG_ARCH_NEXUSPCI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXUSPCI -# endif -# define machine_is_nexuspci() (machine_arch_type == MACH_TYPE_NEXUSPCI) -#else -# define machine_is_nexuspci() (0) -#endif - -#ifdef CONFIG_ARCH_EBSA285 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EBSA285 -# endif -# define machine_is_ebsa285() (machine_arch_type == MACH_TYPE_EBSA285) -#else -# define machine_is_ebsa285() (0) -#endif - -#ifdef CONFIG_ARCH_NETWINDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETWINDER -# endif -# define machine_is_netwinder() (machine_arch_type == MACH_TYPE_NETWINDER) -#else -# define machine_is_netwinder() (0) -#endif - -#ifdef CONFIG_ARCH_CATS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CATS -# endif -# define machine_is_cats() (machine_arch_type == MACH_TYPE_CATS) -#else -# define machine_is_cats() (0) -#endif - -#ifdef CONFIG_ARCH_TBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TBOX -# endif -# define machine_is_tbox() (machine_arch_type == MACH_TYPE_TBOX) -#else -# define machine_is_tbox() (0) -#endif - -#ifdef CONFIG_ARCH_CO285 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CO285 -# endif -# define machine_is_co285() (machine_arch_type == MACH_TYPE_CO285) -#else -# define machine_is_co285() (0) -#endif - -#ifdef CONFIG_ARCH_CLPS7110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLPS7110 -# endif -# define machine_is_clps7110() (machine_arch_type == MACH_TYPE_CLPS7110) -#else -# define machine_is_clps7110() (0) -#endif - -#ifdef CONFIG_ARCH_ARC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCHIMEDES -# endif -# define machine_is_archimedes() (machine_arch_type == MACH_TYPE_ARCHIMEDES) -#else -# define machine_is_archimedes() (0) -#endif - -#ifdef CONFIG_ARCH_A5K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A5K -# endif -# define machine_is_a5k() (machine_arch_type == MACH_TYPE_A5K) -#else -# define machine_is_a5k() (0) -#endif - -#ifdef CONFIG_ARCH_ETOILE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETOILE -# endif -# define machine_is_etoile() (machine_arch_type == MACH_TYPE_ETOILE) -#else -# define machine_is_etoile() (0) -#endif - -#ifdef CONFIG_ARCH_LACIE_NAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LACIE_NAS -# endif -# define machine_is_lacie_nas() (machine_arch_type == MACH_TYPE_LACIE_NAS) -#else -# define machine_is_lacie_nas() (0) -#endif - -#ifdef CONFIG_ARCH_CLPS7500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLPS7500 -# endif -# define machine_is_clps7500() (machine_arch_type == MACH_TYPE_CLPS7500) -#else -# define machine_is_clps7500() (0) -#endif - -#ifdef CONFIG_ARCH_SHARK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHARK -# endif -# define machine_is_shark() (machine_arch_type == MACH_TYPE_SHARK) -#else -# define machine_is_shark() (0) -#endif - -#ifdef CONFIG_SA1100_BRUTUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRUTUS -# endif -# define machine_is_brutus() (machine_arch_type == MACH_TYPE_BRUTUS) -#else -# define machine_is_brutus() (0) -#endif - -#ifdef CONFIG_ARCH_PERSONAL_SERVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PERSONAL_SERVER -# endif -# define machine_is_personal_server() (machine_arch_type == MACH_TYPE_PERSONAL_SERVER) -#else -# define machine_is_personal_server() (0) -#endif - -#ifdef CONFIG_SA1100_ITSY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ITSY -# endif -# define machine_is_itsy() (machine_arch_type == MACH_TYPE_ITSY) -#else -# define machine_is_itsy() (0) -#endif - -#ifdef CONFIG_ARCH_L7200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_L7200 -# endif -# define machine_is_l7200() (machine_arch_type == MACH_TYPE_L7200) -#else -# define machine_is_l7200() (0) -#endif - -#ifdef CONFIG_SA1100_PLEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PLEB -# endif -# define machine_is_pleb() (machine_arch_type == MACH_TYPE_PLEB) -#else -# define machine_is_pleb() (0) -#endif - -#ifdef CONFIG_ARCH_INTEGRATOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INTEGRATOR -# endif -# define machine_is_integrator() (machine_arch_type == MACH_TYPE_INTEGRATOR) -#else -# define machine_is_integrator() (0) -#endif - -#ifdef CONFIG_SA1100_H3600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H3600 -# endif -# define machine_is_h3600() (machine_arch_type == MACH_TYPE_H3600) -#else -# define machine_is_h3600() (0) -#endif - -#ifdef CONFIG_ARCH_IXP1200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP1200 -# endif -# define machine_is_ixp1200() (machine_arch_type == MACH_TYPE_IXP1200) -#else -# define machine_is_ixp1200() (0) -#endif - -#ifdef CONFIG_ARCH_P720T -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P720T -# endif -# define machine_is_p720t() (machine_arch_type == MACH_TYPE_P720T) -#else -# define machine_is_p720t() (0) -#endif - -#ifdef CONFIG_SA1100_ASSABET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASSABET -# endif -# define machine_is_assabet() (machine_arch_type == MACH_TYPE_ASSABET) -#else -# define machine_is_assabet() (0) -#endif - -#ifdef CONFIG_SA1100_VICTOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VICTOR -# endif -# define machine_is_victor() (machine_arch_type == MACH_TYPE_VICTOR) -#else -# define machine_is_victor() (0) -#endif - -#ifdef CONFIG_SA1100_LART -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LART -# endif -# define machine_is_lart() (machine_arch_type == MACH_TYPE_LART) -#else -# define machine_is_lart() (0) -#endif - -#ifdef CONFIG_SA1100_RANGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RANGER -# endif -# define machine_is_ranger() (machine_arch_type == MACH_TYPE_RANGER) -#else -# define machine_is_ranger() (0) -#endif - -#ifdef CONFIG_SA1100_GRAPHICSCLIENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GRAPHICSCLIENT -# endif -# define machine_is_graphicsclient() (machine_arch_type == MACH_TYPE_GRAPHICSCLIENT) -#else -# define machine_is_graphicsclient() (0) -#endif - -#ifdef CONFIG_SA1100_XP860 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XP860 -# endif -# define machine_is_xp860() (machine_arch_type == MACH_TYPE_XP860) -#else -# define machine_is_xp860() (0) -#endif - -#ifdef CONFIG_SA1100_CERF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CERF -# endif -# define machine_is_cerf() (machine_arch_type == MACH_TYPE_CERF) -#else -# define machine_is_cerf() (0) -#endif - -#ifdef CONFIG_SA1100_NANOENGINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NANOENGINE -# endif -# define machine_is_nanoengine() (machine_arch_type == MACH_TYPE_NANOENGINE) -#else -# define machine_is_nanoengine() (0) -#endif - -#ifdef CONFIG_SA1100_FPIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FPIC -# endif -# define machine_is_fpic() (machine_arch_type == MACH_TYPE_FPIC) -#else -# define machine_is_fpic() (0) -#endif - -#ifdef CONFIG_SA1100_EXTENEX1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXTENEX1 -# endif -# define machine_is_extenex1() (machine_arch_type == MACH_TYPE_EXTENEX1) -#else -# define machine_is_extenex1() (0) -#endif - -#ifdef CONFIG_SA1100_SHERMAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHERMAN -# endif -# define machine_is_sherman() (machine_arch_type == MACH_TYPE_SHERMAN) -#else -# define machine_is_sherman() (0) -#endif - -#ifdef CONFIG_SA1100_ACCELENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACCELENT_SA -# endif -# define machine_is_accelent_sa() (machine_arch_type == MACH_TYPE_ACCELENT_SA) -#else -# define machine_is_accelent_sa() (0) -#endif - -#ifdef CONFIG_ARCH_L7200_ACCELENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACCELENT_L7200 -# endif -# define machine_is_accelent_l7200() (machine_arch_type == MACH_TYPE_ACCELENT_L7200) -#else -# define machine_is_accelent_l7200() (0) -#endif - -#ifdef CONFIG_SA1100_NETPORT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETPORT -# endif -# define machine_is_netport() (machine_arch_type == MACH_TYPE_NETPORT) -#else -# define machine_is_netport() (0) -#endif - -#ifdef CONFIG_SA1100_PANGOLIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PANGOLIN -# endif -# define machine_is_pangolin() (machine_arch_type == MACH_TYPE_PANGOLIN) -#else -# define machine_is_pangolin() (0) -#endif - -#ifdef CONFIG_SA1100_YOPY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YOPY -# endif -# define machine_is_yopy() (machine_arch_type == MACH_TYPE_YOPY) -#else -# define machine_is_yopy() (0) -#endif - -#ifdef CONFIG_SA1100_COOLIDGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COOLIDGE -# endif -# define machine_is_coolidge() (machine_arch_type == MACH_TYPE_COOLIDGE) -#else -# define machine_is_coolidge() (0) -#endif - -#ifdef CONFIG_SA1100_HUW_WEBPANEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUW_WEBPANEL -# endif -# define machine_is_huw_webpanel() (machine_arch_type == MACH_TYPE_HUW_WEBPANEL) -#else -# define machine_is_huw_webpanel() (0) -#endif - -#ifdef CONFIG_ARCH_SPOTME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPOTME -# endif -# define machine_is_spotme() (machine_arch_type == MACH_TYPE_SPOTME) -#else -# define machine_is_spotme() (0) -#endif - -#ifdef CONFIG_ARCH_FREEBIRD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FREEBIRD -# endif -# define machine_is_freebird() (machine_arch_type == MACH_TYPE_FREEBIRD) -#else -# define machine_is_freebird() (0) -#endif - -#ifdef CONFIG_ARCH_TI925 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TI925 -# endif -# define machine_is_ti925() (machine_arch_type == MACH_TYPE_TI925) -#else -# define machine_is_ti925() (0) -#endif - -#ifdef CONFIG_ARCH_RISCSTATION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RISCSTATION -# endif -# define machine_is_riscstation() (machine_arch_type == MACH_TYPE_RISCSTATION) -#else -# define machine_is_riscstation() (0) -#endif - -#ifdef CONFIG_SA1100_CAVY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAVY -# endif -# define machine_is_cavy() (machine_arch_type == MACH_TYPE_CAVY) -#else -# define machine_is_cavy() (0) -#endif - -#ifdef CONFIG_SA1100_JORNADA720 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JORNADA720 -# endif -# define machine_is_jornada720() (machine_arch_type == MACH_TYPE_JORNADA720) -#else -# define machine_is_jornada720() (0) -#endif - -#ifdef CONFIG_SA1100_OMNIMETER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMNIMETER -# endif -# define machine_is_omnimeter() (machine_arch_type == MACH_TYPE_OMNIMETER) -#else -# define machine_is_omnimeter() (0) -#endif - -#ifdef CONFIG_ARCH_EDB7211 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB7211 -# endif -# define machine_is_edb7211() (machine_arch_type == MACH_TYPE_EDB7211) -#else -# define machine_is_edb7211() (0) -#endif - -#ifdef CONFIG_SA1100_CITYGO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CITYGO -# endif -# define machine_is_citygo() (machine_arch_type == MACH_TYPE_CITYGO) -#else -# define machine_is_citygo() (0) -#endif - -#ifdef CONFIG_SA1100_PFS168 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PFS168 -# endif -# define machine_is_pfs168() (machine_arch_type == MACH_TYPE_PFS168) -#else -# define machine_is_pfs168() (0) -#endif - -#ifdef CONFIG_SA1100_SPOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPOT -# endif -# define machine_is_spot() (machine_arch_type == MACH_TYPE_SPOT) -#else -# define machine_is_spot() (0) -#endif - -#ifdef CONFIG_SA1100_FLEXANET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLEXANET -# endif -# define machine_is_flexanet() (machine_arch_type == MACH_TYPE_FLEXANET) -#else -# define machine_is_flexanet() (0) -#endif - -#ifdef CONFIG_ARCH_WEBPAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEBPAL -# endif -# define machine_is_webpal() (machine_arch_type == MACH_TYPE_WEBPAL) -#else -# define machine_is_webpal() (0) -#endif - -#ifdef CONFIG_SA1100_LINPDA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINPDA -# endif -# define machine_is_linpda() (machine_arch_type == MACH_TYPE_LINPDA) -#else -# define machine_is_linpda() (0) -#endif - -#ifdef CONFIG_ARCH_ANAKIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANAKIN -# endif -# define machine_is_anakin() (machine_arch_type == MACH_TYPE_ANAKIN) -#else -# define machine_is_anakin() (0) -#endif - -#ifdef CONFIG_SA1100_MVI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MVI -# endif -# define machine_is_mvi() (machine_arch_type == MACH_TYPE_MVI) -#else -# define machine_is_mvi() (0) -#endif - -#ifdef CONFIG_SA1100_JUPITER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JUPITER -# endif -# define machine_is_jupiter() (machine_arch_type == MACH_TYPE_JUPITER) -#else -# define machine_is_jupiter() (0) -#endif - -#ifdef CONFIG_ARCH_PSIONW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PSIONW -# endif -# define machine_is_psionw() (machine_arch_type == MACH_TYPE_PSIONW) -#else -# define machine_is_psionw() (0) -#endif - -#ifdef CONFIG_SA1100_ALN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALN -# endif -# define machine_is_aln() (machine_arch_type == MACH_TYPE_ALN) -#else -# define machine_is_aln() (0) -#endif - -#ifdef CONFIG_ARCH_CAMELOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAMELOT -# endif -# define machine_is_epxa() (machine_arch_type == MACH_TYPE_CAMELOT) -#else -# define machine_is_epxa() (0) -#endif - -#ifdef CONFIG_SA1100_GDS2200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GDS2200 -# endif -# define machine_is_gds2200() (machine_arch_type == MACH_TYPE_GDS2200) -#else -# define machine_is_gds2200() (0) -#endif - -#ifdef CONFIG_SA1100_PSION_SERIES7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PSION_SERIES7 -# endif -# define machine_is_netbook() (machine_arch_type == MACH_TYPE_PSION_SERIES7) -#else -# define machine_is_netbook() (0) -#endif - -#ifdef CONFIG_SA1100_XFILE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XFILE -# endif -# define machine_is_xfile() (machine_arch_type == MACH_TYPE_XFILE) -#else -# define machine_is_xfile() (0) -#endif - -#ifdef CONFIG_ARCH_ACCELENT_EP9312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACCELENT_EP9312 -# endif -# define machine_is_accelent_ep9312() (machine_arch_type == MACH_TYPE_ACCELENT_EP9312) -#else -# define machine_is_accelent_ep9312() (0) -#endif - -#ifdef CONFIG_ARCH_IC200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IC200 -# endif -# define machine_is_ic200() (machine_arch_type == MACH_TYPE_IC200) -#else -# define machine_is_ic200() (0) -#endif - -#ifdef CONFIG_SA1100_CREDITLART -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CREDITLART -# endif -# define machine_is_creditlart() (machine_arch_type == MACH_TYPE_CREDITLART) -#else -# define machine_is_creditlart() (0) -#endif - -#ifdef CONFIG_SA1100_HTM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTM -# endif -# define machine_is_htm() (machine_arch_type == MACH_TYPE_HTM) -#else -# define machine_is_htm() (0) -#endif - -#ifdef CONFIG_ARCH_IQ80310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ80310 -# endif -# define machine_is_iq80310() (machine_arch_type == MACH_TYPE_IQ80310) -#else -# define machine_is_iq80310() (0) -#endif - -#ifdef CONFIG_SA1100_FREEBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FREEBOT -# endif -# define machine_is_freebot() (machine_arch_type == MACH_TYPE_FREEBOT) -#else -# define machine_is_freebot() (0) -#endif - -#ifdef CONFIG_ARCH_ENTEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENTEL -# endif -# define machine_is_entel() (machine_arch_type == MACH_TYPE_ENTEL) -#else -# define machine_is_entel() (0) -#endif - -#ifdef CONFIG_ARCH_ENP3510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENP3510 -# endif -# define machine_is_enp3510() (machine_arch_type == MACH_TYPE_ENP3510) -#else -# define machine_is_enp3510() (0) -#endif - -#ifdef CONFIG_SA1100_TRIZEPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS -# endif -# define machine_is_trizeps() (machine_arch_type == MACH_TYPE_TRIZEPS) -#else -# define machine_is_trizeps() (0) -#endif - -#ifdef CONFIG_SA1100_NESA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NESA -# endif -# define machine_is_nesa() (machine_arch_type == MACH_TYPE_NESA) -#else -# define machine_is_nesa() (0) -#endif - -#ifdef CONFIG_ARCH_VENUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VENUS -# endif -# define machine_is_venus() (machine_arch_type == MACH_TYPE_VENUS) -#else -# define machine_is_venus() (0) -#endif - -#ifdef CONFIG_ARCH_TARDIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TARDIS -# endif -# define machine_is_tardis() (machine_arch_type == MACH_TYPE_TARDIS) -#else -# define machine_is_tardis() (0) -#endif - -#ifdef CONFIG_ARCH_MERCURY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MERCURY -# endif -# define machine_is_mercury() (machine_arch_type == MACH_TYPE_MERCURY) -#else -# define machine_is_mercury() (0) -#endif - -#ifdef CONFIG_SA1100_EMPEG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPEG -# endif -# define machine_is_empeg() (machine_arch_type == MACH_TYPE_EMPEG) -#else -# define machine_is_empeg() (0) -#endif - -#ifdef CONFIG_ARCH_I80200FCC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I80200FCC -# endif -# define machine_is_adi_evb() (machine_arch_type == MACH_TYPE_I80200FCC) -#else -# define machine_is_adi_evb() (0) -#endif - -#ifdef CONFIG_SA1100_ITT_CPB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ITT_CPB -# endif -# define machine_is_itt_cpb() (machine_arch_type == MACH_TYPE_ITT_CPB) -#else -# define machine_is_itt_cpb() (0) -#endif - -#ifdef CONFIG_SA1100_SVC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVC -# endif -# define machine_is_svc() (machine_arch_type == MACH_TYPE_SVC) -#else -# define machine_is_svc() (0) -#endif - -#ifdef CONFIG_SA1100_ALPHA2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALPHA2 -# endif -# define machine_is_alpha2() (machine_arch_type == MACH_TYPE_ALPHA2) -#else -# define machine_is_alpha2() (0) -#endif - -#ifdef CONFIG_SA1100_ALPHA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALPHA1 -# endif -# define machine_is_alpha1() (machine_arch_type == MACH_TYPE_ALPHA1) -#else -# define machine_is_alpha1() (0) -#endif - -#ifdef CONFIG_ARCH_NETARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETARM -# endif -# define machine_is_netarm() (machine_arch_type == MACH_TYPE_NETARM) -#else -# define machine_is_netarm() (0) -#endif - -#ifdef CONFIG_SA1100_SIMPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMPAD -# endif -# define machine_is_simpad() (machine_arch_type == MACH_TYPE_SIMPAD) -#else -# define machine_is_simpad() (0) -#endif - -#ifdef CONFIG_ARCH_PDA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PDA1 -# endif -# define machine_is_pda1() (machine_arch_type == MACH_TYPE_PDA1) -#else -# define machine_is_pda1() (0) -#endif - -#ifdef CONFIG_ARCH_LUBBOCK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUBBOCK -# endif -# define machine_is_lubbock() (machine_arch_type == MACH_TYPE_LUBBOCK) -#else -# define machine_is_lubbock() (0) -#endif - -#ifdef CONFIG_ARCH_ANIKO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANIKO -# endif -# define machine_is_aniko() (machine_arch_type == MACH_TYPE_ANIKO) -#else -# define machine_is_aniko() (0) -#endif - -#ifdef CONFIG_ARCH_CLEP7212 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLEP7212 -# endif -# define machine_is_clep7212() (machine_arch_type == MACH_TYPE_CLEP7212) -#else -# define machine_is_clep7212() (0) -#endif - -#ifdef CONFIG_ARCH_CS89712 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CS89712 -# endif -# define machine_is_cs89712() (machine_arch_type == MACH_TYPE_CS89712) -#else -# define machine_is_cs89712() (0) -#endif - -#ifdef CONFIG_SA1100_WEARARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEARARM -# endif -# define machine_is_weararm() (machine_arch_type == MACH_TYPE_WEARARM) -#else -# define machine_is_weararm() (0) -#endif - -#ifdef CONFIG_SA1100_POSSIO_PX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POSSIO_PX -# endif -# define machine_is_possio_px() (machine_arch_type == MACH_TYPE_POSSIO_PX) -#else -# define machine_is_possio_px() (0) -#endif - -#ifdef CONFIG_SA1100_SIDEARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIDEARM -# endif -# define machine_is_sidearm() (machine_arch_type == MACH_TYPE_SIDEARM) -#else -# define machine_is_sidearm() (0) -#endif - -#ifdef CONFIG_SA1100_STORK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STORK -# endif -# define machine_is_stork() (machine_arch_type == MACH_TYPE_STORK) -#else -# define machine_is_stork() (0) -#endif - -#ifdef CONFIG_SA1100_SHANNON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHANNON -# endif -# define machine_is_shannon() (machine_arch_type == MACH_TYPE_SHANNON) -#else -# define machine_is_shannon() (0) -#endif - -#ifdef CONFIG_ARCH_ACE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACE -# endif -# define machine_is_ace() (machine_arch_type == MACH_TYPE_ACE) -#else -# define machine_is_ace() (0) -#endif - -#ifdef CONFIG_SA1100_BALLYARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BALLYARM -# endif -# define machine_is_ballyarm() (machine_arch_type == MACH_TYPE_BALLYARM) -#else -# define machine_is_ballyarm() (0) -#endif - -#ifdef CONFIG_SA1100_SIMPUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMPUTER -# endif -# define machine_is_simputer() (machine_arch_type == MACH_TYPE_SIMPUTER) -#else -# define machine_is_simputer() (0) -#endif - -#ifdef CONFIG_SA1100_NEXTERM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXTERM -# endif -# define machine_is_nexterm() (machine_arch_type == MACH_TYPE_NEXTERM) -#else -# define machine_is_nexterm() (0) -#endif - -#ifdef CONFIG_SA1100_SA1100_ELF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SA1100_ELF -# endif -# define machine_is_sa1100_elf() (machine_arch_type == MACH_TYPE_SA1100_ELF) -#else -# define machine_is_sa1100_elf() (0) -#endif - -#ifdef CONFIG_SA1100_GATOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GATOR -# endif -# define machine_is_gator() (machine_arch_type == MACH_TYPE_GATOR) -#else -# define machine_is_gator() (0) -#endif - -#ifdef CONFIG_ARCH_GRANITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GRANITE -# endif -# define machine_is_granite() (machine_arch_type == MACH_TYPE_GRANITE) -#else -# define machine_is_granite() (0) -#endif - -#ifdef CONFIG_SA1100_CONSUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CONSUS -# endif -# define machine_is_consus() (machine_arch_type == MACH_TYPE_CONSUS) -#else -# define machine_is_consus() (0) -#endif - -#ifdef CONFIG_ARCH_AAED2000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AAED2000 -# endif -# define machine_is_aaed2000() (machine_arch_type == MACH_TYPE_AAED2000) -#else -# define machine_is_aaed2000() (0) -#endif - -#ifdef CONFIG_ARCH_CDB89712 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CDB89712 -# endif -# define machine_is_cdb89712() (machine_arch_type == MACH_TYPE_CDB89712) -#else -# define machine_is_cdb89712() (0) -#endif - -#ifdef CONFIG_SA1100_GRAPHICSMASTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GRAPHICSMASTER -# endif -# define machine_is_graphicsmaster() (machine_arch_type == MACH_TYPE_GRAPHICSMASTER) -#else -# define machine_is_graphicsmaster() (0) -#endif - -#ifdef CONFIG_SA1100_ADSBITSY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSBITSY -# endif -# define machine_is_adsbitsy() (machine_arch_type == MACH_TYPE_ADSBITSY) -#else -# define machine_is_adsbitsy() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_IDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_IDP -# endif -# define machine_is_pxa_idp() (machine_arch_type == MACH_TYPE_PXA_IDP) -#else -# define machine_is_pxa_idp() (0) -#endif - -#ifdef CONFIG_ARCH_PLCE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PLCE -# endif -# define machine_is_plce() (machine_arch_type == MACH_TYPE_PLCE) -#else -# define machine_is_plce() (0) -#endif - -#ifdef CONFIG_SA1100_PT_SYSTEM3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PT_SYSTEM3 -# endif -# define machine_is_pt_system3() (machine_arch_type == MACH_TYPE_PT_SYSTEM3) -#else -# define machine_is_pt_system3() (0) -#endif - -#ifdef CONFIG_ARCH_MEDALB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEDALB -# endif -# define machine_is_murphy() (machine_arch_type == MACH_TYPE_MEDALB) -#else -# define machine_is_murphy() (0) -#endif - -#ifdef CONFIG_ARCH_EAGLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EAGLE -# endif -# define machine_is_eagle() (machine_arch_type == MACH_TYPE_EAGLE) -#else -# define machine_is_eagle() (0) -#endif - -#ifdef CONFIG_ARCH_DSC21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSC21 -# endif -# define machine_is_dsc21() (machine_arch_type == MACH_TYPE_DSC21) -#else -# define machine_is_dsc21() (0) -#endif - -#ifdef CONFIG_ARCH_DSC24 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSC24 -# endif -# define machine_is_dsc24() (machine_arch_type == MACH_TYPE_DSC24) -#else -# define machine_is_dsc24() (0) -#endif - -#ifdef CONFIG_ARCH_TI5472 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TI5472 -# endif -# define machine_is_ti5472() (machine_arch_type == MACH_TYPE_TI5472) -#else -# define machine_is_ti5472() (0) -#endif - -#ifdef CONFIG_ARCH_AUTCPU12 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AUTCPU12 -# endif -# define machine_is_autcpu12() (machine_arch_type == MACH_TYPE_AUTCPU12) -#else -# define machine_is_autcpu12() (0) -#endif - -#ifdef CONFIG_ARCH_UENGINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UENGINE -# endif -# define machine_is_uengine() (machine_arch_type == MACH_TYPE_UENGINE) -#else -# define machine_is_uengine() (0) -#endif - -#ifdef CONFIG_SA1100_BLUESTEM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUESTEM -# endif -# define machine_is_bluestem() (machine_arch_type == MACH_TYPE_BLUESTEM) -#else -# define machine_is_bluestem() (0) -#endif - -#ifdef CONFIG_ARCH_XINGU8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XINGU8 -# endif -# define machine_is_xingu8() (machine_arch_type == MACH_TYPE_XINGU8) -#else -# define machine_is_xingu8() (0) -#endif - -#ifdef CONFIG_ARCH_BUSHSTB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUSHSTB -# endif -# define machine_is_bushstb() (machine_arch_type == MACH_TYPE_BUSHSTB) -#else -# define machine_is_bushstb() (0) -#endif - -#ifdef CONFIG_SA1100_EPSILON1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPSILON1 -# endif -# define machine_is_epsilon1() (machine_arch_type == MACH_TYPE_EPSILON1) -#else -# define machine_is_epsilon1() (0) -#endif - -#ifdef CONFIG_SA1100_BALLOON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BALLOON -# endif -# define machine_is_balloon() (machine_arch_type == MACH_TYPE_BALLOON) -#else -# define machine_is_balloon() (0) -#endif - -#ifdef CONFIG_ARCH_PUPPY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PUPPY -# endif -# define machine_is_puppy() (machine_arch_type == MACH_TYPE_PUPPY) -#else -# define machine_is_puppy() (0) -#endif - -#ifdef CONFIG_SA1100_ELROY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELROY -# endif -# define machine_is_elroy() (machine_arch_type == MACH_TYPE_ELROY) -#else -# define machine_is_elroy() (0) -#endif - -#ifdef CONFIG_ARCH_GMS720 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GMS720 -# endif -# define machine_is_gms720() (machine_arch_type == MACH_TYPE_GMS720) -#else -# define machine_is_gms720() (0) -#endif - -#ifdef CONFIG_ARCH_S24X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S24X -# endif -# define machine_is_s24x() (machine_arch_type == MACH_TYPE_S24X) -#else -# define machine_is_s24x() (0) -#endif - -#ifdef CONFIG_ARCH_JTEL_CLEP7312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JTEL_CLEP7312 -# endif -# define machine_is_jtel_clep7312() (machine_arch_type == MACH_TYPE_JTEL_CLEP7312) -#else -# define machine_is_jtel_clep7312() (0) -#endif - -#ifdef CONFIG_ARCH_CX821XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CX821XX -# endif -# define machine_is_cx821xx() (machine_arch_type == MACH_TYPE_CX821XX) -#else -# define machine_is_cx821xx() (0) -#endif - -#ifdef CONFIG_ARCH_EDB7312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB7312 -# endif -# define machine_is_edb7312() (machine_arch_type == MACH_TYPE_EDB7312) -#else -# define machine_is_edb7312() (0) -#endif - -#ifdef CONFIG_SA1100_BSA1110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BSA1110 -# endif -# define machine_is_bsa1110() (machine_arch_type == MACH_TYPE_BSA1110) -#else -# define machine_is_bsa1110() (0) -#endif - -#ifdef CONFIG_ARCH_POWERPIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POWERPIN -# endif -# define machine_is_powerpin() (machine_arch_type == MACH_TYPE_POWERPIN) -#else -# define machine_is_powerpin() (0) -#endif - -#ifdef CONFIG_ARCH_OPENARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENARM -# endif -# define machine_is_openarm() (machine_arch_type == MACH_TYPE_OPENARM) -#else -# define machine_is_openarm() (0) -#endif - -#ifdef CONFIG_SA1100_WHITECHAPEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WHITECHAPEL -# endif -# define machine_is_whitechapel() (machine_arch_type == MACH_TYPE_WHITECHAPEL) -#else -# define machine_is_whitechapel() (0) -#endif - -#ifdef CONFIG_SA1100_H3100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H3100 -# endif -# define machine_is_h3100() (machine_arch_type == MACH_TYPE_H3100) -#else -# define machine_is_h3100() (0) -#endif - -#ifdef CONFIG_SA1100_H3800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H3800 -# endif -# define machine_is_h3800() (machine_arch_type == MACH_TYPE_H3800) -#else -# define machine_is_h3800() (0) -#endif - -#ifdef CONFIG_ARCH_BLUE_V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUE_V1 -# endif -# define machine_is_blue_v1() (machine_arch_type == MACH_TYPE_BLUE_V1) -#else -# define machine_is_blue_v1() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_CERF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_CERF -# endif -# define machine_is_pxa_cerf() (machine_arch_type == MACH_TYPE_PXA_CERF) -#else -# define machine_is_pxa_cerf() (0) -#endif - -#ifdef CONFIG_ARCH_ARM7TEVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM7TEVB -# endif -# define machine_is_arm7tevb() (machine_arch_type == MACH_TYPE_ARM7TEVB) -#else -# define machine_is_arm7tevb() (0) -#endif - -#ifdef CONFIG_SA1100_D7400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_D7400 -# endif -# define machine_is_d7400() (machine_arch_type == MACH_TYPE_D7400) -#else -# define machine_is_d7400() (0) -#endif - -#ifdef CONFIG_ARCH_PIRANHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PIRANHA -# endif -# define machine_is_piranha() (machine_arch_type == MACH_TYPE_PIRANHA) -#else -# define machine_is_piranha() (0) -#endif - -#ifdef CONFIG_SA1100_SBCAMELOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBCAMELOT -# endif -# define machine_is_sbcamelot() (machine_arch_type == MACH_TYPE_SBCAMELOT) -#else -# define machine_is_sbcamelot() (0) -#endif - -#ifdef CONFIG_SA1100_KINGS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KINGS -# endif -# define machine_is_kings() (machine_arch_type == MACH_TYPE_KINGS) -#else -# define machine_is_kings() (0) -#endif - -#ifdef CONFIG_ARCH_SMDK2400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2400 -# endif -# define machine_is_smdk2400() (machine_arch_type == MACH_TYPE_SMDK2400) -#else -# define machine_is_smdk2400() (0) -#endif - -#ifdef CONFIG_SA1100_COLLIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COLLIE -# endif -# define machine_is_collie() (machine_arch_type == MACH_TYPE_COLLIE) -#else -# define machine_is_collie() (0) -#endif - -#ifdef CONFIG_ARCH_IDR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IDR -# endif -# define machine_is_idr() (machine_arch_type == MACH_TYPE_IDR) -#else -# define machine_is_idr() (0) -#endif - -#ifdef CONFIG_SA1100_BADGE4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BADGE4 -# endif -# define machine_is_badge4() (machine_arch_type == MACH_TYPE_BADGE4) -#else -# define machine_is_badge4() (0) -#endif - -#ifdef CONFIG_ARCH_WEBNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEBNET -# endif -# define machine_is_webnet() (machine_arch_type == MACH_TYPE_WEBNET) -#else -# define machine_is_webnet() (0) -#endif - -#ifdef CONFIG_SA1100_D7300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_D7300 -# endif -# define machine_is_d7300() (machine_arch_type == MACH_TYPE_D7300) -#else -# define machine_is_d7300() (0) -#endif - -#ifdef CONFIG_SA1100_CEP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CEP -# endif -# define machine_is_cep() (machine_arch_type == MACH_TYPE_CEP) -#else -# define machine_is_cep() (0) -#endif - -#ifdef CONFIG_ARCH_FORTUNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FORTUNET -# endif -# define machine_is_fortunet() (machine_arch_type == MACH_TYPE_FORTUNET) -#else -# define machine_is_fortunet() (0) -#endif - -#ifdef CONFIG_ARCH_VC547X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VC547X -# endif -# define machine_is_vc547x() (machine_arch_type == MACH_TYPE_VC547X) -#else -# define machine_is_vc547x() (0) -#endif - -#ifdef CONFIG_SA1100_FILEWALKER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FILEWALKER -# endif -# define machine_is_filewalker() (machine_arch_type == MACH_TYPE_FILEWALKER) -#else -# define machine_is_filewalker() (0) -#endif - -#ifdef CONFIG_SA1100_NETGATEWAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETGATEWAY -# endif -# define machine_is_netgateway() (machine_arch_type == MACH_TYPE_NETGATEWAY) -#else -# define machine_is_netgateway() (0) -#endif - -#ifdef CONFIG_SA1100_SYMBOL2800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYMBOL2800 -# endif -# define machine_is_symbol2800() (machine_arch_type == MACH_TYPE_SYMBOL2800) -#else -# define machine_is_symbol2800() (0) -#endif - -#ifdef CONFIG_SA1100_SUNS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUNS -# endif -# define machine_is_suns() (machine_arch_type == MACH_TYPE_SUNS) -#else -# define machine_is_suns() (0) -#endif - -#ifdef CONFIG_SA1100_FRODO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FRODO -# endif -# define machine_is_frodo() (machine_arch_type == MACH_TYPE_FRODO) -#else -# define machine_is_frodo() (0) -#endif - -#ifdef CONFIG_SA1100_MACH_TYTE_MS301 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MACH_TYTE_MS301 -# endif -# define machine_is_ms301() (machine_arch_type == MACH_TYPE_MACH_TYTE_MS301) -#else -# define machine_is_ms301() (0) -#endif - -#ifdef CONFIG_ARCH_MX1ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX1ADS -# endif -# define machine_is_mx1ads() (machine_arch_type == MACH_TYPE_MX1ADS) -#else -# define machine_is_mx1ads() (0) -#endif - -#ifdef CONFIG_ARCH_H7201 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H7201 -# endif -# define machine_is_h7201() (machine_arch_type == MACH_TYPE_H7201) -#else -# define machine_is_h7201() (0) -#endif - -#ifdef CONFIG_ARCH_H7202 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H7202 -# endif -# define machine_is_h7202() (machine_arch_type == MACH_TYPE_H7202) -#else -# define machine_is_h7202() (0) -#endif - -#ifdef CONFIG_ARCH_AMICO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AMICO -# endif -# define machine_is_amico() (machine_arch_type == MACH_TYPE_AMICO) -#else -# define machine_is_amico() (0) -#endif - -#ifdef CONFIG_SA1100_IAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IAM -# endif -# define machine_is_iam() (machine_arch_type == MACH_TYPE_IAM) -#else -# define machine_is_iam() (0) -#endif - -#ifdef CONFIG_SA1100_TT530 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TT530 -# endif -# define machine_is_tt530() (machine_arch_type == MACH_TYPE_TT530) -#else -# define machine_is_tt530() (0) -#endif - -#ifdef CONFIG_ARCH_SAM2400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAM2400 -# endif -# define machine_is_sam2400() (machine_arch_type == MACH_TYPE_SAM2400) -#else -# define machine_is_sam2400() (0) -#endif - -#ifdef CONFIG_SA1100_JORNADA56X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JORNADA56X -# endif -# define machine_is_jornada56x() (machine_arch_type == MACH_TYPE_JORNADA56X) -#else -# define machine_is_jornada56x() (0) -#endif - -#ifdef CONFIG_SA1100_ACTIVE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTIVE -# endif -# define machine_is_active() (machine_arch_type == MACH_TYPE_ACTIVE) -#else -# define machine_is_active() (0) -#endif - -#ifdef CONFIG_ARCH_IQ80321 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ80321 -# endif -# define machine_is_iq80321() (machine_arch_type == MACH_TYPE_IQ80321) -#else -# define machine_is_iq80321() (0) -#endif - -#ifdef CONFIG_SA1100_WID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WID -# endif -# define machine_is_wid() (machine_arch_type == MACH_TYPE_WID) -#else -# define machine_is_wid() (0) -#endif - -#ifdef CONFIG_ARCH_SABINAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SABINAL -# endif -# define machine_is_sabinal() (machine_arch_type == MACH_TYPE_SABINAL) -#else -# define machine_is_sabinal() (0) -#endif - -#ifdef CONFIG_ARCH_IXP425_MATACUMBE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP425_MATACUMBE -# endif -# define machine_is_ixp425_matacumbe() (machine_arch_type == MACH_TYPE_IXP425_MATACUMBE) -#else -# define machine_is_ixp425_matacumbe() (0) -#endif - -#ifdef CONFIG_SA1100_MINIPRINT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINIPRINT -# endif -# define machine_is_miniprint() (machine_arch_type == MACH_TYPE_MINIPRINT) -#else -# define machine_is_miniprint() (0) -#endif - -#ifdef CONFIG_ARCH_ADM510X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADM510X -# endif -# define machine_is_adm510x() (machine_arch_type == MACH_TYPE_ADM510X) -#else -# define machine_is_adm510x() (0) -#endif - -#ifdef CONFIG_SA1100_SVS200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVS200 -# endif -# define machine_is_svs200() (machine_arch_type == MACH_TYPE_SVS200) -#else -# define machine_is_svs200() (0) -#endif - -#ifdef CONFIG_ARCH_ATG_TCU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATG_TCU -# endif -# define machine_is_atg_tcu() (machine_arch_type == MACH_TYPE_ATG_TCU) -#else -# define machine_is_atg_tcu() (0) -#endif - -#ifdef CONFIG_SA1100_JORNADA820 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JORNADA820 -# endif -# define machine_is_jornada820() (machine_arch_type == MACH_TYPE_JORNADA820) -#else -# define machine_is_jornada820() (0) -#endif - -#ifdef CONFIG_ARCH_S3C44B0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C44B0 -# endif -# define machine_is_s3c44b0() (machine_arch_type == MACH_TYPE_S3C44B0) -#else -# define machine_is_s3c44b0() (0) -#endif - -#ifdef CONFIG_ARCH_MARGIS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARGIS2 -# endif -# define machine_is_margis2() (machine_arch_type == MACH_TYPE_MARGIS2) -#else -# define machine_is_margis2() (0) -#endif - -#ifdef CONFIG_ARCH_KS8695 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KS8695 -# endif -# define machine_is_ks8695() (machine_arch_type == MACH_TYPE_KS8695) -#else -# define machine_is_ks8695() (0) -#endif - -#ifdef CONFIG_ARCH_BRH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRH -# endif -# define machine_is_brh() (machine_arch_type == MACH_TYPE_BRH) -#else -# define machine_is_brh() (0) -#endif - -#ifdef CONFIG_ARCH_S3C2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2410 -# endif -# define machine_is_s3c2410() (machine_arch_type == MACH_TYPE_S3C2410) -#else -# define machine_is_s3c2410() (0) -#endif - -#ifdef CONFIG_ARCH_POSSIO_PX30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POSSIO_PX30 -# endif -# define machine_is_possio_px30() (machine_arch_type == MACH_TYPE_POSSIO_PX30) -#else -# define machine_is_possio_px30() (0) -#endif - -#ifdef CONFIG_ARCH_S3C2800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2800 -# endif -# define machine_is_s3c2800() (machine_arch_type == MACH_TYPE_S3C2800) -#else -# define machine_is_s3c2800() (0) -#endif - -#ifdef CONFIG_SA1100_FLEETWOOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLEETWOOD -# endif -# define machine_is_fleetwood() (machine_arch_type == MACH_TYPE_FLEETWOOD) -#else -# define machine_is_fleetwood() (0) -#endif - -#ifdef CONFIG_ARCH_OMAHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAHA -# endif -# define machine_is_omaha() (machine_arch_type == MACH_TYPE_OMAHA) -#else -# define machine_is_omaha() (0) -#endif - -#ifdef CONFIG_ARCH_TA7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TA7 -# endif -# define machine_is_ta7() (machine_arch_type == MACH_TYPE_TA7) -#else -# define machine_is_ta7() (0) -#endif - -#ifdef CONFIG_SA1100_NOVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOVA -# endif -# define machine_is_nova() (machine_arch_type == MACH_TYPE_NOVA) -#else -# define machine_is_nova() (0) -#endif - -#ifdef CONFIG_ARCH_HMK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HMK -# endif -# define machine_is_hmk() (machine_arch_type == MACH_TYPE_HMK) -#else -# define machine_is_hmk() (0) -#endif - -#ifdef CONFIG_ARCH_KARO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KARO -# endif -# define machine_is_karo() (machine_arch_type == MACH_TYPE_KARO) -#else -# define machine_is_karo() (0) -#endif - -#ifdef CONFIG_SA1100_FESTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FESTER -# endif -# define machine_is_fester() (machine_arch_type == MACH_TYPE_FESTER) -#else -# define machine_is_fester() (0) -#endif - -#ifdef CONFIG_ARCH_GPI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GPI -# endif -# define machine_is_gpi() (machine_arch_type == MACH_TYPE_GPI) -#else -# define machine_is_gpi() (0) -#endif - -#ifdef CONFIG_ARCH_SMDK2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2410 -# endif -# define machine_is_smdk2410() (machine_arch_type == MACH_TYPE_SMDK2410) -#else -# define machine_is_smdk2410() (0) -#endif - -#ifdef CONFIG_ARCH_I519 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I519 -# endif -# define machine_is_i519() (machine_arch_type == MACH_TYPE_I519) -#else -# define machine_is_i519() (0) -#endif - -#ifdef CONFIG_SA1100_NEXIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXIO -# endif -# define machine_is_nexio() (machine_arch_type == MACH_TYPE_NEXIO) -#else -# define machine_is_nexio() (0) -#endif - -#ifdef CONFIG_SA1100_BITBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BITBOX -# endif -# define machine_is_bitbox() (machine_arch_type == MACH_TYPE_BITBOX) -#else -# define machine_is_bitbox() (0) -#endif - -#ifdef CONFIG_SA1100_G200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G200 -# endif -# define machine_is_g200() (machine_arch_type == MACH_TYPE_G200) -#else -# define machine_is_g200() (0) -#endif - -#ifdef CONFIG_SA1100_GILL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GILL -# endif -# define machine_is_gill() (machine_arch_type == MACH_TYPE_GILL) -#else -# define machine_is_gill() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_MERCURY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_MERCURY -# endif -# define machine_is_pxa_mercury() (machine_arch_type == MACH_TYPE_PXA_MERCURY) -#else -# define machine_is_pxa_mercury() (0) -#endif - -#ifdef CONFIG_ARCH_CEIVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CEIVA -# endif -# define machine_is_ceiva() (machine_arch_type == MACH_TYPE_CEIVA) -#else -# define machine_is_ceiva() (0) -#endif - -#ifdef CONFIG_SA1100_FRET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FRET -# endif -# define machine_is_fret() (machine_arch_type == MACH_TYPE_FRET) -#else -# define machine_is_fret() (0) -#endif - -#ifdef CONFIG_SA1100_EMAILPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMAILPHONE -# endif -# define machine_is_emailphone() (machine_arch_type == MACH_TYPE_EMAILPHONE) -#else -# define machine_is_emailphone() (0) -#endif - -#ifdef CONFIG_ARCH_H3900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H3900 -# endif -# define machine_is_h3900() (machine_arch_type == MACH_TYPE_H3900) -#else -# define machine_is_h3900() (0) -#endif - -#ifdef CONFIG_ARCH_PXA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA1 -# endif -# define machine_is_pxa1() (machine_arch_type == MACH_TYPE_PXA1) -#else -# define machine_is_pxa1() (0) -#endif - -#ifdef CONFIG_SA1100_KOAN369 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KOAN369 -# endif -# define machine_is_koan369() (machine_arch_type == MACH_TYPE_KOAN369) -#else -# define machine_is_koan369() (0) -#endif - -#ifdef CONFIG_ARCH_COGENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COGENT -# endif -# define machine_is_cogent() (machine_arch_type == MACH_TYPE_COGENT) -#else -# define machine_is_cogent() (0) -#endif - -#ifdef CONFIG_ARCH_ESL_SIMPUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SIMPUTER -# endif -# define machine_is_esl_simputer() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER) -#else -# define machine_is_esl_simputer() (0) -#endif - -#ifdef CONFIG_ARCH_ESL_SIMPUTER_CLR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SIMPUTER_CLR -# endif -# define machine_is_esl_simputer_clr() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER_CLR) -#else -# define machine_is_esl_simputer_clr() (0) -#endif - -#ifdef CONFIG_ARCH_ESL_SIMPUTER_BW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SIMPUTER_BW -# endif -# define machine_is_esl_simputer_bw() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER_BW) -#else -# define machine_is_esl_simputer_bw() (0) -#endif - -#ifdef CONFIG_ARCH_HHP_CRADLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HHP_CRADLE -# endif -# define machine_is_hhp_cradle() (machine_arch_type == MACH_TYPE_HHP_CRADLE) -#else -# define machine_is_hhp_cradle() (0) -#endif - -#ifdef CONFIG_ARCH_HE500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HE500 -# endif -# define machine_is_he500() (machine_arch_type == MACH_TYPE_HE500) -#else -# define machine_is_he500() (0) -#endif - -#ifdef CONFIG_SA1100_INHANDELF2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHANDELF2 -# endif -# define machine_is_inhandelf2() (machine_arch_type == MACH_TYPE_INHANDELF2) -#else -# define machine_is_inhandelf2() (0) -#endif - -#ifdef CONFIG_SA1100_INHANDFTIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHANDFTIP -# endif -# define machine_is_inhandftip() (machine_arch_type == MACH_TYPE_INHANDFTIP) -#else -# define machine_is_inhandftip() (0) -#endif - -#ifdef CONFIG_SA1100_DNP1110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DNP1110 -# endif -# define machine_is_dnp1110() (machine_arch_type == MACH_TYPE_DNP1110) -#else -# define machine_is_dnp1110() (0) -#endif - -#ifdef CONFIG_SA1100_PNP1110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNP1110 -# endif -# define machine_is_pnp1110() (machine_arch_type == MACH_TYPE_PNP1110) -#else -# define machine_is_pnp1110() (0) -#endif - -#ifdef CONFIG_ARCH_CSB226 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB226 -# endif -# define machine_is_csb226() (machine_arch_type == MACH_TYPE_CSB226) -#else -# define machine_is_csb226() (0) -#endif - -#ifdef CONFIG_SA1100_ARNOLD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARNOLD -# endif -# define machine_is_arnold() (machine_arch_type == MACH_TYPE_ARNOLD) -#else -# define machine_is_arnold() (0) -#endif - -#ifdef CONFIG_MACH_VOICEBLUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VOICEBLUE -# endif -# define machine_is_voiceblue() (machine_arch_type == MACH_TYPE_VOICEBLUE) -#else -# define machine_is_voiceblue() (0) -#endif - -#ifdef CONFIG_ARCH_JZ8028 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JZ8028 -# endif -# define machine_is_jz8028() (machine_arch_type == MACH_TYPE_JZ8028) -#else -# define machine_is_jz8028() (0) -#endif - -#ifdef CONFIG_ARCH_H5400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H5400 -# endif -# define machine_is_h5400() (machine_arch_type == MACH_TYPE_H5400) -#else -# define machine_is_h5400() (0) -#endif - -#ifdef CONFIG_SA1100_FORTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FORTE -# endif -# define machine_is_forte() (machine_arch_type == MACH_TYPE_FORTE) -#else -# define machine_is_forte() (0) -#endif - -#ifdef CONFIG_SA1100_ACAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACAM -# endif -# define machine_is_acam() (machine_arch_type == MACH_TYPE_ACAM) -#else -# define machine_is_acam() (0) -#endif - -#ifdef CONFIG_SA1100_ABOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ABOX -# endif -# define machine_is_abox() (machine_arch_type == MACH_TYPE_ABOX) -#else -# define machine_is_abox() (0) -#endif - -#ifdef CONFIG_ARCH_ATMEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATMEL -# endif -# define machine_is_atmel() (machine_arch_type == MACH_TYPE_ATMEL) -#else -# define machine_is_atmel() (0) -#endif - -#ifdef CONFIG_ARCH_SITSANG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SITSANG -# endif -# define machine_is_sitsang() (machine_arch_type == MACH_TYPE_SITSANG) -#else -# define machine_is_sitsang() (0) -#endif - -#ifdef CONFIG_SA1100_CPU1110LCDNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPU1110LCDNET -# endif -# define machine_is_cpu1110lcdnet() (machine_arch_type == MACH_TYPE_CPU1110LCDNET) -#else -# define machine_is_cpu1110lcdnet() (0) -#endif - -#ifdef CONFIG_ARCH_MPL_VCMA9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPL_VCMA9 -# endif -# define machine_is_mpl_vcma9() (machine_arch_type == MACH_TYPE_MPL_VCMA9) -#else -# define machine_is_mpl_vcma9() (0) -#endif - -#ifdef CONFIG_ARCH_OPUS_A1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPUS_A1 -# endif -# define machine_is_opus_a1() (machine_arch_type == MACH_TYPE_OPUS_A1) -#else -# define machine_is_opus_a1() (0) -#endif - -#ifdef CONFIG_ARCH_DAYTONA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAYTONA -# endif -# define machine_is_daytona() (machine_arch_type == MACH_TYPE_DAYTONA) -#else -# define machine_is_daytona() (0) -#endif - -#ifdef CONFIG_SA1100_KILLBEAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KILLBEAR -# endif -# define machine_is_killbear() (machine_arch_type == MACH_TYPE_KILLBEAR) -#else -# define machine_is_killbear() (0) -#endif - -#ifdef CONFIG_ARCH_YOHO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YOHO -# endif -# define machine_is_yoho() (machine_arch_type == MACH_TYPE_YOHO) -#else -# define machine_is_yoho() (0) -#endif - -#ifdef CONFIG_ARCH_JASPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JASPER -# endif -# define machine_is_jasper() (machine_arch_type == MACH_TYPE_JASPER) -#else -# define machine_is_jasper() (0) -#endif - -#ifdef CONFIG_ARCH_DSC25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSC25 -# endif -# define machine_is_dsc25() (machine_arch_type == MACH_TYPE_DSC25) -#else -# define machine_is_dsc25() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_INNOVATOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_INNOVATOR -# endif -# define machine_is_omap_innovator() (machine_arch_type == MACH_TYPE_OMAP_INNOVATOR) -#else -# define machine_is_omap_innovator() (0) -#endif - -#ifdef CONFIG_ARCH_RAMSES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAMSES -# endif -# define machine_is_mnci() (machine_arch_type == MACH_TYPE_RAMSES) -#else -# define machine_is_mnci() (0) -#endif - -#ifdef CONFIG_ARCH_S28X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S28X -# endif -# define machine_is_s28x() (machine_arch_type == MACH_TYPE_S28X) -#else -# define machine_is_s28x() (0) -#endif - -#ifdef CONFIG_ARCH_MPORT3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPORT3 -# endif -# define machine_is_mport3() (machine_arch_type == MACH_TYPE_MPORT3) -#else -# define machine_is_mport3() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_EAGLE250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_EAGLE250 -# endif -# define machine_is_pxa_eagle250() (machine_arch_type == MACH_TYPE_PXA_EAGLE250) -#else -# define machine_is_pxa_eagle250() (0) -#endif - -#ifdef CONFIG_ARCH_PDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PDB -# endif -# define machine_is_pdb() (machine_arch_type == MACH_TYPE_PDB) -#else -# define machine_is_pdb() (0) -#endif - -#ifdef CONFIG_SA1100_BLUE_2G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUE_2G -# endif -# define machine_is_blue_2g() (machine_arch_type == MACH_TYPE_BLUE_2G) -#else -# define machine_is_blue_2g() (0) -#endif - -#ifdef CONFIG_SA1100_BLUEARCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUEARCH -# endif -# define machine_is_bluearch() (machine_arch_type == MACH_TYPE_BLUEARCH) -#else -# define machine_is_bluearch() (0) -#endif - -#ifdef CONFIG_ARCH_IXDP2400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP2400 -# endif -# define machine_is_ixdp2400() (machine_arch_type == MACH_TYPE_IXDP2400) -#else -# define machine_is_ixdp2400() (0) -#endif - -#ifdef CONFIG_ARCH_IXDP2800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP2800 -# endif -# define machine_is_ixdp2800() (machine_arch_type == MACH_TYPE_IXDP2800) -#else -# define machine_is_ixdp2800() (0) -#endif - -#ifdef CONFIG_SA1100_EXPLORER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXPLORER -# endif -# define machine_is_explorer() (machine_arch_type == MACH_TYPE_EXPLORER) -#else -# define machine_is_explorer() (0) -#endif - -#ifdef CONFIG_ARCH_IXDP425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP425 -# endif -# define machine_is_ixdp425() (machine_arch_type == MACH_TYPE_IXDP425) -#else -# define machine_is_ixdp425() (0) -#endif - -#ifdef CONFIG_ARCH_CHIMP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHIMP -# endif -# define machine_is_chimp() (machine_arch_type == MACH_TYPE_CHIMP) -#else -# define machine_is_chimp() (0) -#endif - -#ifdef CONFIG_ARCH_STORK_NEST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STORK_NEST -# endif -# define machine_is_stork_nest() (machine_arch_type == MACH_TYPE_STORK_NEST) -#else -# define machine_is_stork_nest() (0) -#endif - -#ifdef CONFIG_ARCH_STORK_EGG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STORK_EGG -# endif -# define machine_is_stork_egg() (machine_arch_type == MACH_TYPE_STORK_EGG) -#else -# define machine_is_stork_egg() (0) -#endif - -#ifdef CONFIG_SA1100_WISMO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WISMO -# endif -# define machine_is_wismo() (machine_arch_type == MACH_TYPE_WISMO) -#else -# define machine_is_wismo() (0) -#endif - -#ifdef CONFIG_ARCH_EZLINX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZLINX -# endif -# define machine_is_ezlinx() (machine_arch_type == MACH_TYPE_EZLINX) -#else -# define machine_is_ezlinx() (0) -#endif - -#ifdef CONFIG_ARCH_AT91RM9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200 -# endif -# define machine_is_at91rm9200() (machine_arch_type == MACH_TYPE_AT91RM9200) -#else -# define machine_is_at91rm9200() (0) -#endif - -#ifdef CONFIG_ARCH_ADTECH_ORION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADTECH_ORION -# endif -# define machine_is_adtech_orion() (machine_arch_type == MACH_TYPE_ADTECH_ORION) -#else -# define machine_is_adtech_orion() (0) -#endif - -#ifdef CONFIG_ARCH_NEPTUNE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEPTUNE -# endif -# define machine_is_neptune() (machine_arch_type == MACH_TYPE_NEPTUNE) -#else -# define machine_is_neptune() (0) -#endif - -#ifdef CONFIG_SA1100_HACKKIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HACKKIT -# endif -# define machine_is_hackkit() (machine_arch_type == MACH_TYPE_HACKKIT) -#else -# define machine_is_hackkit() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_WINS30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_WINS30 -# endif -# define machine_is_pxa_wins30() (machine_arch_type == MACH_TYPE_PXA_WINS30) -#else -# define machine_is_pxa_wins30() (0) -#endif - -#ifdef CONFIG_SA1100_LAVINNA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LAVINNA -# endif -# define machine_is_lavinna() (machine_arch_type == MACH_TYPE_LAVINNA) -#else -# define machine_is_lavinna() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_UENGINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_UENGINE -# endif -# define machine_is_pxa_uengine() (machine_arch_type == MACH_TYPE_PXA_UENGINE) -#else -# define machine_is_pxa_uengine() (0) -#endif - -#ifdef CONFIG_ARCH_INNOKOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INNOKOM -# endif -# define machine_is_innokom() (machine_arch_type == MACH_TYPE_INNOKOM) -#else -# define machine_is_innokom() (0) -#endif - -#ifdef CONFIG_ARCH_BMS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BMS -# endif -# define machine_is_bms() (machine_arch_type == MACH_TYPE_BMS) -#else -# define machine_is_bms() (0) -#endif - -#ifdef CONFIG_ARCH_IXCDP1100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXCDP1100 -# endif -# define machine_is_ixcdp1100() (machine_arch_type == MACH_TYPE_IXCDP1100) -#else -# define machine_is_ixcdp1100() (0) -#endif - -#ifdef CONFIG_ARCH_PRPMC1100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRPMC1100 -# endif -# define machine_is_prpmc1100() (machine_arch_type == MACH_TYPE_PRPMC1100) -#else -# define machine_is_prpmc1100() (0) -#endif - -#ifdef CONFIG_ARCH_AT91RM9200DK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200DK -# endif -# define machine_is_at91rm9200dk() (machine_arch_type == MACH_TYPE_AT91RM9200DK) -#else -# define machine_is_at91rm9200dk() (0) -#endif - -#ifdef CONFIG_ARCH_ARMSTICK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMSTICK -# endif -# define machine_is_armstick() (machine_arch_type == MACH_TYPE_ARMSTICK) -#else -# define machine_is_armstick() (0) -#endif - -#ifdef CONFIG_ARCH_ARMONIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMONIE -# endif -# define machine_is_armonie() (machine_arch_type == MACH_TYPE_ARMONIE) -#else -# define machine_is_armonie() (0) -#endif - -#ifdef CONFIG_ARCH_MPORT1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPORT1 -# endif -# define machine_is_mport1() (machine_arch_type == MACH_TYPE_MPORT1) -#else -# define machine_is_mport1() (0) -#endif - -#ifdef CONFIG_ARCH_S3C5410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C5410 -# endif -# define machine_is_s3c5410() (machine_arch_type == MACH_TYPE_S3C5410) -#else -# define machine_is_s3c5410() (0) -#endif - -#ifdef CONFIG_ARCH_ZCP320A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZCP320A -# endif -# define machine_is_zcp320a() (machine_arch_type == MACH_TYPE_ZCP320A) -#else -# define machine_is_zcp320a() (0) -#endif - -#ifdef CONFIG_ARCH_I_BOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I_BOX -# endif -# define machine_is_i_box() (machine_arch_type == MACH_TYPE_I_BOX) -#else -# define machine_is_i_box() (0) -#endif - -#ifdef CONFIG_ARCH_STLC1502 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STLC1502 -# endif -# define machine_is_stlc1502() (machine_arch_type == MACH_TYPE_STLC1502) -#else -# define machine_is_stlc1502() (0) -#endif - -#ifdef CONFIG_ARCH_SIREN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIREN -# endif -# define machine_is_siren() (machine_arch_type == MACH_TYPE_SIREN) -#else -# define machine_is_siren() (0) -#endif - -#ifdef CONFIG_ARCH_GREENLAKE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GREENLAKE -# endif -# define machine_is_greenlake() (machine_arch_type == MACH_TYPE_GREENLAKE) -#else -# define machine_is_greenlake() (0) -#endif - -#ifdef CONFIG_ARCH_ARGUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARGUS -# endif -# define machine_is_argus() (machine_arch_type == MACH_TYPE_ARGUS) -#else -# define machine_is_argus() (0) -#endif - -#ifdef CONFIG_SA1100_COMBADGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMBADGE -# endif -# define machine_is_combadge() (machine_arch_type == MACH_TYPE_COMBADGE) -#else -# define machine_is_combadge() (0) -#endif - -#ifdef CONFIG_ARCH_ROKEPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROKEPXA -# endif -# define machine_is_rokepxa() (machine_arch_type == MACH_TYPE_ROKEPXA) -#else -# define machine_is_rokepxa() (0) -#endif - -#ifdef CONFIG_ARCH_CINTEGRATOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CINTEGRATOR -# endif -# define machine_is_cintegrator() (machine_arch_type == MACH_TYPE_CINTEGRATOR) -#else -# define machine_is_cintegrator() (0) -#endif - -#ifdef CONFIG_ARCH_GUIDEA07 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUIDEA07 -# endif -# define machine_is_guidea07() (machine_arch_type == MACH_TYPE_GUIDEA07) -#else -# define machine_is_guidea07() (0) -#endif - -#ifdef CONFIG_ARCH_TAT257 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAT257 -# endif -# define machine_is_tat257() (machine_arch_type == MACH_TYPE_TAT257) -#else -# define machine_is_tat257() (0) -#endif - -#ifdef CONFIG_ARCH_IGP2425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGP2425 -# endif -# define machine_is_igp2425() (machine_arch_type == MACH_TYPE_IGP2425) -#else -# define machine_is_igp2425() (0) -#endif - -#ifdef CONFIG_ARCH_BLUEGRAMMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUEGRAMMA -# endif -# define machine_is_bluegrama() (machine_arch_type == MACH_TYPE_BLUEGRAMMA) -#else -# define machine_is_bluegrama() (0) -#endif - -#ifdef CONFIG_ARCH_IPOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPOD -# endif -# define machine_is_ipod() (machine_arch_type == MACH_TYPE_IPOD) -#else -# define machine_is_ipod() (0) -#endif - -#ifdef CONFIG_ARCH_ADSBITSYX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSBITSYX -# endif -# define machine_is_adsbitsyx() (machine_arch_type == MACH_TYPE_ADSBITSYX) -#else -# define machine_is_adsbitsyx() (0) -#endif - -#ifdef CONFIG_ARCH_TRIZEPS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS2 -# endif -# define machine_is_trizeps2() (machine_arch_type == MACH_TYPE_TRIZEPS2) -#else -# define machine_is_trizeps2() (0) -#endif - -#ifdef CONFIG_ARCH_VIPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VIPER -# endif -# define machine_is_viper() (machine_arch_type == MACH_TYPE_VIPER) -#else -# define machine_is_viper() (0) -#endif - -#ifdef CONFIG_SA1100_ADSBITSYPLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSBITSYPLUS -# endif -# define machine_is_adsbitsyplus() (machine_arch_type == MACH_TYPE_ADSBITSYPLUS) -#else -# define machine_is_adsbitsyplus() (0) -#endif - -#ifdef CONFIG_SA1100_ADSAGC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSAGC -# endif -# define machine_is_adsagc() (machine_arch_type == MACH_TYPE_ADSAGC) -#else -# define machine_is_adsagc() (0) -#endif - -#ifdef CONFIG_ARCH_STP7312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STP7312 -# endif -# define machine_is_stp7312() (machine_arch_type == MACH_TYPE_STP7312) -#else -# define machine_is_stp7312() (0) -#endif - -#ifdef CONFIG_MACH_NX_PHNX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NX_PHNX -# endif -# define machine_is_nx_phnx() (machine_arch_type == MACH_TYPE_NX_PHNX) -#else -# define machine_is_nx_phnx() (0) -#endif - -#ifdef CONFIG_ARCH_WEP_EP250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEP_EP250 -# endif -# define machine_is_wep_ep250() (machine_arch_type == MACH_TYPE_WEP_EP250) -#else -# define machine_is_wep_ep250() (0) -#endif - -#ifdef CONFIG_ARCH_INHANDELF3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHANDELF3 -# endif -# define machine_is_inhandelf3() (machine_arch_type == MACH_TYPE_INHANDELF3) -#else -# define machine_is_inhandelf3() (0) -#endif - -#ifdef CONFIG_ARCH_ADI_COYOTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADI_COYOTE -# endif -# define machine_is_adi_coyote() (machine_arch_type == MACH_TYPE_ADI_COYOTE) -#else -# define machine_is_adi_coyote() (0) -#endif - -#ifdef CONFIG_ARCH_IYONIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IYONIX -# endif -# define machine_is_iyonix() (machine_arch_type == MACH_TYPE_IYONIX) -#else -# define machine_is_iyonix() (0) -#endif - -#ifdef CONFIG_ARCH_DAMICAM_SA1110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAMICAM_SA1110 -# endif -# define machine_is_damicam1() (machine_arch_type == MACH_TYPE_DAMICAM_SA1110) -#else -# define machine_is_damicam1() (0) -#endif - -#ifdef CONFIG_ARCH_MEG03 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEG03 -# endif -# define machine_is_meg03() (machine_arch_type == MACH_TYPE_MEG03) -#else -# define machine_is_meg03() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_WHITECHAPEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_WHITECHAPEL -# endif -# define machine_is_pxa_whitechapel() (machine_arch_type == MACH_TYPE_PXA_WHITECHAPEL) -#else -# define machine_is_pxa_whitechapel() (0) -#endif - -#ifdef CONFIG_ARCH_NWSC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NWSC -# endif -# define machine_is_nwsc() (machine_arch_type == MACH_TYPE_NWSC) -#else -# define machine_is_nwsc() (0) -#endif - -#ifdef CONFIG_ARCH_NWLARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NWLARM -# endif -# define machine_is_nwlarm() (machine_arch_type == MACH_TYPE_NWLARM) -#else -# define machine_is_nwlarm() (0) -#endif - -#ifdef CONFIG_ARCH_IXP425_MGUARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP425_MGUARD -# endif -# define machine_is_ixp425_mguard() (machine_arch_type == MACH_TYPE_IXP425_MGUARD) -#else -# define machine_is_ixp425_mguard() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_NETDCU4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_NETDCU4 -# endif -# define machine_is_pxa_netdcu4() (machine_arch_type == MACH_TYPE_PXA_NETDCU4) -#else -# define machine_is_pxa_netdcu4() (0) -#endif - -#ifdef CONFIG_ARCH_IXDP2401 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP2401 -# endif -# define machine_is_ixdp2401() (machine_arch_type == MACH_TYPE_IXDP2401) -#else -# define machine_is_ixdp2401() (0) -#endif - -#ifdef CONFIG_ARCH_IXDP2801 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP2801 -# endif -# define machine_is_ixdp2801() (machine_arch_type == MACH_TYPE_IXDP2801) -#else -# define machine_is_ixdp2801() (0) -#endif - -#ifdef CONFIG_ARCH_ZODIAC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZODIAC -# endif -# define machine_is_zodiac() (machine_arch_type == MACH_TYPE_ZODIAC) -#else -# define machine_is_zodiac() (0) -#endif - -#ifdef CONFIG_ARCH_ARMMODUL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMMODUL -# endif -# define machine_is_armmodul() (machine_arch_type == MACH_TYPE_ARMMODUL) -#else -# define machine_is_armmodul() (0) -#endif - -#ifdef CONFIG_SA1100_KETOP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KETOP -# endif -# define machine_is_ketop() (machine_arch_type == MACH_TYPE_KETOP) -#else -# define machine_is_ketop() (0) -#endif - -#ifdef CONFIG_ARCH_AV7200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AV7200 -# endif -# define machine_is_av7200() (machine_arch_type == MACH_TYPE_AV7200) -#else -# define machine_is_av7200() (0) -#endif - -#ifdef CONFIG_ARCH_ARCH_TI925 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCH_TI925 -# endif -# define machine_is_arch_ti925() (machine_arch_type == MACH_TYPE_ARCH_TI925) -#else -# define machine_is_arch_ti925() (0) -#endif - -#ifdef CONFIG_ARCH_ACQ200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACQ200 -# endif -# define machine_is_acq200() (machine_arch_type == MACH_TYPE_ACQ200) -#else -# define machine_is_acq200() (0) -#endif - -#ifdef CONFIG_SA1100_PT_DAFIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PT_DAFIT -# endif -# define machine_is_pt_dafit() (machine_arch_type == MACH_TYPE_PT_DAFIT) -#else -# define machine_is_pt_dafit() (0) -#endif - -#ifdef CONFIG_ARCH_IHBA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IHBA -# endif -# define machine_is_ihba() (machine_arch_type == MACH_TYPE_IHBA) -#else -# define machine_is_ihba() (0) -#endif - -#ifdef CONFIG_ARCH_QUINQUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUINQUE -# endif -# define machine_is_quinque() (machine_arch_type == MACH_TYPE_QUINQUE) -#else -# define machine_is_quinque() (0) -#endif - -#ifdef CONFIG_ARCH_NIMBRAONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIMBRAONE -# endif -# define machine_is_nimbraone() (machine_arch_type == MACH_TYPE_NIMBRAONE) -#else -# define machine_is_nimbraone() (0) -#endif - -#ifdef CONFIG_ARCH_NIMBRA29X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIMBRA29X -# endif -# define machine_is_nimbra29x() (machine_arch_type == MACH_TYPE_NIMBRA29X) -#else -# define machine_is_nimbra29x() (0) -#endif - -#ifdef CONFIG_ARCH_NIMBRA210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIMBRA210 -# endif -# define machine_is_nimbra210() (machine_arch_type == MACH_TYPE_NIMBRA210) -#else -# define machine_is_nimbra210() (0) -#endif - -#ifdef CONFIG_ARCH_HHP_D95XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HHP_D95XX -# endif -# define machine_is_hhp_d95xx() (machine_arch_type == MACH_TYPE_HHP_D95XX) -#else -# define machine_is_hhp_d95xx() (0) -#endif - -#ifdef CONFIG_ARCH_LABARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LABARM -# endif -# define machine_is_labarm() (machine_arch_type == MACH_TYPE_LABARM) -#else -# define machine_is_labarm() (0) -#endif - -#ifdef CONFIG_ARCH_M825XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M825XX -# endif -# define machine_is_m825xx() (machine_arch_type == MACH_TYPE_M825XX) -#else -# define machine_is_m825xx() (0) -#endif - -#ifdef CONFIG_SA1100_M7100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M7100 -# endif -# define machine_is_m7100() (machine_arch_type == MACH_TYPE_M7100) -#else -# define machine_is_m7100() (0) -#endif - -#ifdef CONFIG_ARCH_NIPC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIPC2 -# endif -# define machine_is_nipc2() (machine_arch_type == MACH_TYPE_NIPC2) -#else -# define machine_is_nipc2() (0) -#endif - -#ifdef CONFIG_ARCH_FU7202 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FU7202 -# endif -# define machine_is_fu7202() (machine_arch_type == MACH_TYPE_FU7202) -#else -# define machine_is_fu7202() (0) -#endif - -#ifdef CONFIG_ARCH_ADSAGX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSAGX -# endif -# define machine_is_adsagx() (machine_arch_type == MACH_TYPE_ADSAGX) -#else -# define machine_is_adsagx() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_POOH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_POOH -# endif -# define machine_is_pxa_pooh() (machine_arch_type == MACH_TYPE_PXA_POOH) -#else -# define machine_is_pxa_pooh() (0) -#endif - -#ifdef CONFIG_ARCH_BANDON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BANDON -# endif -# define machine_is_bandon() (machine_arch_type == MACH_TYPE_BANDON) -#else -# define machine_is_bandon() (0) -#endif - -#ifdef CONFIG_ARCH_PCM7210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM7210 -# endif -# define machine_is_pcm7210() (machine_arch_type == MACH_TYPE_PCM7210) -#else -# define machine_is_pcm7210() (0) -#endif - -#ifdef CONFIG_ARCH_NMS9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NMS9200 -# endif -# define machine_is_nms9200() (machine_arch_type == MACH_TYPE_NMS9200) -#else -# define machine_is_nms9200() (0) -#endif - -#ifdef CONFIG_ARCH_LOGODL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOGODL -# endif -# define machine_is_logodl() (machine_arch_type == MACH_TYPE_LOGODL) -#else -# define machine_is_logodl() (0) -#endif - -#ifdef CONFIG_SA1100_M7140 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M7140 -# endif -# define machine_is_m7140() (machine_arch_type == MACH_TYPE_M7140) -#else -# define machine_is_m7140() (0) -#endif - -#ifdef CONFIG_ARCH_KOREBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KOREBOT -# endif -# define machine_is_korebot() (machine_arch_type == MACH_TYPE_KOREBOT) -#else -# define machine_is_korebot() (0) -#endif - -#ifdef CONFIG_ARCH_IQ31244 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ31244 -# endif -# define machine_is_iq31244() (machine_arch_type == MACH_TYPE_IQ31244) -#else -# define machine_is_iq31244() (0) -#endif - -#ifdef CONFIG_SA1100_KOAN393 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KOAN393 -# endif -# define machine_is_koan393() (machine_arch_type == MACH_TYPE_KOAN393) -#else -# define machine_is_koan393() (0) -#endif - -#ifdef CONFIG_ARCH_INHANDFTIP3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHANDFTIP3 -# endif -# define machine_is_inhandftip3() (machine_arch_type == MACH_TYPE_INHANDFTIP3) -#else -# define machine_is_inhandftip3() (0) -#endif - -#ifdef CONFIG_ARCH_GONZO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GONZO -# endif -# define machine_is_gonzo() (machine_arch_type == MACH_TYPE_GONZO) -#else -# define machine_is_gonzo() (0) -#endif - -#ifdef CONFIG_ARCH_BAST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BAST -# endif -# define machine_is_bast() (machine_arch_type == MACH_TYPE_BAST) -#else -# define machine_is_bast() (0) -#endif - -#ifdef CONFIG_ARCH_SCANPASS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCANPASS -# endif -# define machine_is_scanpass() (machine_arch_type == MACH_TYPE_SCANPASS) -#else -# define machine_is_scanpass() (0) -#endif - -#ifdef CONFIG_ARCH_EP7312_POOH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EP7312_POOH -# endif -# define machine_is_ep7312_pooh() (machine_arch_type == MACH_TYPE_EP7312_POOH) -#else -# define machine_is_ep7312_pooh() (0) -#endif - -#ifdef CONFIG_ARCH_TA7S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TA7S -# endif -# define machine_is_ta7s() (machine_arch_type == MACH_TYPE_TA7S) -#else -# define machine_is_ta7s() (0) -#endif - -#ifdef CONFIG_ARCH_TA7V -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TA7V -# endif -# define machine_is_ta7v() (machine_arch_type == MACH_TYPE_TA7V) -#else -# define machine_is_ta7v() (0) -#endif - -#ifdef CONFIG_SA1100_ICARUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICARUS -# endif -# define machine_is_icarus() (machine_arch_type == MACH_TYPE_ICARUS) -#else -# define machine_is_icarus() (0) -#endif - -#ifdef CONFIG_ARCH_H1900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H1900 -# endif -# define machine_is_h1900() (machine_arch_type == MACH_TYPE_H1900) -#else -# define machine_is_h1900() (0) -#endif - -#ifdef CONFIG_SA1100_GEMINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEMINI -# endif -# define machine_is_gemini() (machine_arch_type == MACH_TYPE_GEMINI) -#else -# define machine_is_gemini() (0) -#endif - -#ifdef CONFIG_ARCH_AXIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXIM -# endif -# define machine_is_axim() (machine_arch_type == MACH_TYPE_AXIM) -#else -# define machine_is_axim() (0) -#endif - -#ifdef CONFIG_ARCH_AUDIOTRON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AUDIOTRON -# endif -# define machine_is_audiotron() (machine_arch_type == MACH_TYPE_AUDIOTRON) -#else -# define machine_is_audiotron() (0) -#endif - -#ifdef CONFIG_ARCH_H2200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H2200 -# endif -# define machine_is_h2200() (machine_arch_type == MACH_TYPE_H2200) -#else -# define machine_is_h2200() (0) -#endif - -#ifdef CONFIG_ARCH_LOOX600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOOX600 -# endif -# define machine_is_loox600() (machine_arch_type == MACH_TYPE_LOOX600) -#else -# define machine_is_loox600() (0) -#endif - -#ifdef CONFIG_ARCH_NIOP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIOP -# endif -# define machine_is_niop() (machine_arch_type == MACH_TYPE_NIOP) -#else -# define machine_is_niop() (0) -#endif - -#ifdef CONFIG_ARCH_DM310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM310 -# endif -# define machine_is_dm310() (machine_arch_type == MACH_TYPE_DM310) -#else -# define machine_is_dm310() (0) -#endif - -#ifdef CONFIG_ARCH_SEEDPXA_C2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SEEDPXA_C2 -# endif -# define machine_is_seedpxa_c2() (machine_arch_type == MACH_TYPE_SEEDPXA_C2) -#else -# define machine_is_seedpxa_c2() (0) -#endif - -#ifdef CONFIG_ARCH_IXP4XX_MGUARD_PCI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP4XX_MGUARD_PCI -# endif -# define machine_is_ixp4xx_mguardpci() (machine_arch_type == MACH_TYPE_IXP4XX_MGUARD_PCI) -#else -# define machine_is_ixp4xx_mguardpci() (0) -#endif - -#ifdef CONFIG_ARCH_H1940 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H1940 -# endif -# define machine_is_h1940() (machine_arch_type == MACH_TYPE_H1940) -#else -# define machine_is_h1940() (0) -#endif - -#ifdef CONFIG_ARCH_SCORPIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCORPIO -# endif -# define machine_is_scorpio() (machine_arch_type == MACH_TYPE_SCORPIO) -#else -# define machine_is_scorpio() (0) -#endif - -#ifdef CONFIG_ARCH_VIVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VIVA -# endif -# define machine_is_viva() (machine_arch_type == MACH_TYPE_VIVA) -#else -# define machine_is_viva() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_XCARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_XCARD -# endif -# define machine_is_pxa_xcard() (machine_arch_type == MACH_TYPE_PXA_XCARD) -#else -# define machine_is_pxa_xcard() (0) -#endif - -#ifdef CONFIG_ARCH_CSB335 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB335 -# endif -# define machine_is_csb335() (machine_arch_type == MACH_TYPE_CSB335) -#else -# define machine_is_csb335() (0) -#endif - -#ifdef CONFIG_ARCH_IXRD425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXRD425 -# endif -# define machine_is_ixrd425() (machine_arch_type == MACH_TYPE_IXRD425) -#else -# define machine_is_ixrd425() (0) -#endif - -#ifdef CONFIG_ARCH_IQ80315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ80315 -# endif -# define machine_is_iq80315() (machine_arch_type == MACH_TYPE_IQ80315) -#else -# define machine_is_iq80315() (0) -#endif - -#ifdef CONFIG_ARCH_NMP7312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NMP7312 -# endif -# define machine_is_nmp7312() (machine_arch_type == MACH_TYPE_NMP7312) -#else -# define machine_is_nmp7312() (0) -#endif - -#ifdef CONFIG_ARCH_CX861XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CX861XX -# endif -# define machine_is_cx861xx() (machine_arch_type == MACH_TYPE_CX861XX) -#else -# define machine_is_cx861xx() (0) -#endif - -#ifdef CONFIG_ARCH_ENP2611 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENP2611 -# endif -# define machine_is_enp2611() (machine_arch_type == MACH_TYPE_ENP2611) -#else -# define machine_is_enp2611() (0) -#endif - -#ifdef CONFIG_SA1100_XDA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XDA -# endif -# define machine_is_xda() (machine_arch_type == MACH_TYPE_XDA) -#else -# define machine_is_xda() (0) -#endif - -#ifdef CONFIG_ARCH_CSIR_IMS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSIR_IMS -# endif -# define machine_is_csir_ims() (machine_arch_type == MACH_TYPE_CSIR_IMS) -#else -# define machine_is_csir_ims() (0) -#endif - -#ifdef CONFIG_ARCH_IXP421_DNAEETH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP421_DNAEETH -# endif -# define machine_is_ixp421_dnaeeth() (machine_arch_type == MACH_TYPE_IXP421_DNAEETH) -#else -# define machine_is_ixp421_dnaeeth() (0) -#endif - -#ifdef CONFIG_ARCH_POCKETSERV9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POCKETSERV9200 -# endif -# define machine_is_pocketserv9200() (machine_arch_type == MACH_TYPE_POCKETSERV9200) -#else -# define machine_is_pocketserv9200() (0) -#endif - -#ifdef CONFIG_ARCH_TOTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOTO -# endif -# define machine_is_toto() (machine_arch_type == MACH_TYPE_TOTO) -#else -# define machine_is_toto() (0) -#endif - -#ifdef CONFIG_ARCH_S3C2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2440 -# endif -# define machine_is_s3c2440() (machine_arch_type == MACH_TYPE_S3C2440) -#else -# define machine_is_s3c2440() (0) -#endif - -#ifdef CONFIG_ARCH_KS8695P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KS8695P -# endif -# define machine_is_ks8695p() (machine_arch_type == MACH_TYPE_KS8695P) -#else -# define machine_is_ks8695p() (0) -#endif - -#ifdef CONFIG_ARCH_SE4000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SE4000 -# endif -# define machine_is_se4000() (machine_arch_type == MACH_TYPE_SE4000) -#else -# define machine_is_se4000() (0) -#endif - -#ifdef CONFIG_ARCH_QUADRICEPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUADRICEPS -# endif -# define machine_is_quadriceps() (machine_arch_type == MACH_TYPE_QUADRICEPS) -#else -# define machine_is_quadriceps() (0) -#endif - -#ifdef CONFIG_ARCH_BRONCO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRONCO -# endif -# define machine_is_bronco() (machine_arch_type == MACH_TYPE_BRONCO) -#else -# define machine_is_bronco() (0) -#endif - -#ifdef CONFIG_ARCH_ESL_WIRELESS_TAB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_WIRELESS_TAB -# endif -# define machine_is_esl_wireless_tab() (machine_arch_type == MACH_TYPE_ESL_WIRELESS_TAB) -#else -# define machine_is_esl_wireless_tab() (0) -#endif - -#ifdef CONFIG_ARCH_ESL_SOFCOMP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SOFCOMP -# endif -# define machine_is_esl_sofcomp() (machine_arch_type == MACH_TYPE_ESL_SOFCOMP) -#else -# define machine_is_esl_sofcomp() (0) -#endif - -#ifdef CONFIG_ARCH_S5C7375 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5C7375 -# endif -# define machine_is_s5c7375() (machine_arch_type == MACH_TYPE_S5C7375) -#else -# define machine_is_s5c7375() (0) -#endif - -#ifdef CONFIG_ARCH_SPEARHEAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEARHEAD -# endif -# define machine_is_spearhead() (machine_arch_type == MACH_TYPE_SPEARHEAD) -#else -# define machine_is_spearhead() (0) -#endif - -#ifdef CONFIG_ARCH_PANTERA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PANTERA -# endif -# define machine_is_pantera() (machine_arch_type == MACH_TYPE_PANTERA) -#else -# define machine_is_pantera() (0) -#endif - -#ifdef CONFIG_ARCH_PRAYOGLITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRAYOGLITE -# endif -# define machine_is_prayoglite() (machine_arch_type == MACH_TYPE_PRAYOGLITE) -#else -# define machine_is_prayoglite() (0) -#endif - -#ifdef CONFIG_ARCH_GUMSTIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUMSTIX -# endif -# define machine_is_gumstix() (machine_arch_type == MACH_TYPE_GUMSTIX) -#else -# define machine_is_gumstix() (0) -#endif - -#ifdef CONFIG_ARCH_RCUBE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RCUBE -# endif -# define machine_is_rcube() (machine_arch_type == MACH_TYPE_RCUBE) -#else -# define machine_is_rcube() (0) -#endif - -#ifdef CONFIG_ARCH_REA_OLV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REA_OLV -# endif -# define machine_is_rea_olv() (machine_arch_type == MACH_TYPE_REA_OLV) -#else -# define machine_is_rea_olv() (0) -#endif - -#ifdef CONFIG_ARCH_PXA_IPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_IPHONE -# endif -# define machine_is_pxa_iphone() (machine_arch_type == MACH_TYPE_PXA_IPHONE) -#else -# define machine_is_pxa_iphone() (0) -#endif - -#ifdef CONFIG_ARCH_S3C3410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C3410 -# endif -# define machine_is_s3c3410() (machine_arch_type == MACH_TYPE_S3C3410) -#else -# define machine_is_s3c3410() (0) -#endif - -#ifdef CONFIG_ARCH_ESPD_4510B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESPD_4510B -# endif -# define machine_is_espd_4510b() (machine_arch_type == MACH_TYPE_ESPD_4510B) -#else -# define machine_is_espd_4510b() (0) -#endif - -#ifdef CONFIG_ARCH_MP1X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MP1X -# endif -# define machine_is_mp1x() (machine_arch_type == MACH_TYPE_MP1X) -#else -# define machine_is_mp1x() (0) -#endif - -#ifdef CONFIG_ARCH_AT91RM9200TB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200TB -# endif -# define machine_is_at91rm9200tb() (machine_arch_type == MACH_TYPE_AT91RM9200TB) -#else -# define machine_is_at91rm9200tb() (0) -#endif - -#ifdef CONFIG_ARCH_ADSVGX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSVGX -# endif -# define machine_is_adsvgx() (machine_arch_type == MACH_TYPE_ADSVGX) -#else -# define machine_is_adsvgx() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_H2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_H2 -# endif -# define machine_is_omap_h2() (machine_arch_type == MACH_TYPE_OMAP_H2) -#else -# define machine_is_omap_h2() (0) -#endif - -#ifdef CONFIG_ARCH_PELEE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELEE -# endif -# define machine_is_pelee() (machine_arch_type == MACH_TYPE_PELEE) -#else -# define machine_is_pelee() (0) -#endif - -#ifdef CONFIG_MACH_E740 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E740 -# endif -# define machine_is_e740() (machine_arch_type == MACH_TYPE_E740) -#else -# define machine_is_e740() (0) -#endif - -#ifdef CONFIG_ARCH_IQ80331 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ80331 -# endif -# define machine_is_iq80331() (machine_arch_type == MACH_TYPE_IQ80331) -#else -# define machine_is_iq80331() (0) -#endif - -#ifdef CONFIG_ARCH_VERSATILE_PB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VERSATILE_PB -# endif -# define machine_is_versatile_pb() (machine_arch_type == MACH_TYPE_VERSATILE_PB) -#else -# define machine_is_versatile_pb() (0) -#endif - -#ifdef CONFIG_MACH_KEV7A400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KEV7A400 -# endif -# define machine_is_kev7a400() (machine_arch_type == MACH_TYPE_KEV7A400) -#else -# define machine_is_kev7a400() (0) -#endif - -#ifdef CONFIG_MACH_LPD7A400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPD7A400 -# endif -# define machine_is_lpd7a400() (machine_arch_type == MACH_TYPE_LPD7A400) -#else -# define machine_is_lpd7a400() (0) -#endif - -#ifdef CONFIG_MACH_LPD7A404 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPD7A404 -# endif -# define machine_is_lpd7a404() (machine_arch_type == MACH_TYPE_LPD7A404) -#else -# define machine_is_lpd7a404() (0) -#endif - -#ifdef CONFIG_ARCH_FUJITSU_CAMELOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUJITSU_CAMELOT -# endif -# define machine_is_fujitsu_camelot() (machine_arch_type == MACH_TYPE_FUJITSU_CAMELOT) -#else -# define machine_is_fujitsu_camelot() (0) -#endif - -#ifdef CONFIG_ARCH_JANUS2M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JANUS2M -# endif -# define machine_is_janus2m() (machine_arch_type == MACH_TYPE_JANUS2M) -#else -# define machine_is_janus2m() (0) -#endif - -#ifdef CONFIG_MACH_EMBTF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMBTF -# endif -# define machine_is_embtf() (machine_arch_type == MACH_TYPE_EMBTF) -#else -# define machine_is_embtf() (0) -#endif - -#ifdef CONFIG_MACH_HPM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HPM -# endif -# define machine_is_hpm() (machine_arch_type == MACH_TYPE_HPM) -#else -# define machine_is_hpm() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2410TK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2410TK -# endif -# define machine_is_smdk2410tk() (machine_arch_type == MACH_TYPE_SMDK2410TK) -#else -# define machine_is_smdk2410tk() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2410AJ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2410AJ -# endif -# define machine_is_smdk2410aj() (machine_arch_type == MACH_TYPE_SMDK2410AJ) -#else -# define machine_is_smdk2410aj() (0) -#endif - -#ifdef CONFIG_MACH_STREETRACER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STREETRACER -# endif -# define machine_is_streetracer() (machine_arch_type == MACH_TYPE_STREETRACER) -#else -# define machine_is_streetracer() (0) -#endif - -#ifdef CONFIG_MACH_EFRAME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EFRAME -# endif -# define machine_is_eframe() (machine_arch_type == MACH_TYPE_EFRAME) -#else -# define machine_is_eframe() (0) -#endif - -#ifdef CONFIG_MACH_CSB337 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB337 -# endif -# define machine_is_csb337() (machine_arch_type == MACH_TYPE_CSB337) -#else -# define machine_is_csb337() (0) -#endif - -#ifdef CONFIG_MACH_PXA_LARK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_LARK -# endif -# define machine_is_pxa_lark() (machine_arch_type == MACH_TYPE_PXA_LARK) -#else -# define machine_is_pxa_lark() (0) -#endif - -#ifdef CONFIG_MACH_PNP2110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNP2110 -# endif -# define machine_is_pxa_pnp2110() (machine_arch_type == MACH_TYPE_PNP2110) -#else -# define machine_is_pxa_pnp2110() (0) -#endif - -#ifdef CONFIG_MACH_TCC72X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TCC72X -# endif -# define machine_is_tcc72x() (machine_arch_type == MACH_TYPE_TCC72X) -#else -# define machine_is_tcc72x() (0) -#endif - -#ifdef CONFIG_MACH_ALTAIR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALTAIR -# endif -# define machine_is_altair() (machine_arch_type == MACH_TYPE_ALTAIR) -#else -# define machine_is_altair() (0) -#endif - -#ifdef CONFIG_MACH_KC3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KC3 -# endif -# define machine_is_kc3() (machine_arch_type == MACH_TYPE_KC3) -#else -# define machine_is_kc3() (0) -#endif - -#ifdef CONFIG_MACH_SINTEFTD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SINTEFTD -# endif -# define machine_is_sinteftd() (machine_arch_type == MACH_TYPE_SINTEFTD) -#else -# define machine_is_sinteftd() (0) -#endif - -#ifdef CONFIG_MACH_MAINSTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAINSTONE -# endif -# define machine_is_mainstone() (machine_arch_type == MACH_TYPE_MAINSTONE) -#else -# define machine_is_mainstone() (0) -#endif - -#ifdef CONFIG_MACH_ADAY4X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADAY4X -# endif -# define machine_is_aday4x() (machine_arch_type == MACH_TYPE_ADAY4X) -#else -# define machine_is_aday4x() (0) -#endif - -#ifdef CONFIG_MACH_LITE300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LITE300 -# endif -# define machine_is_lite300() (machine_arch_type == MACH_TYPE_LITE300) -#else -# define machine_is_lite300() (0) -#endif - -#ifdef CONFIG_MACH_S5C7376 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5C7376 -# endif -# define machine_is_s5c7376() (machine_arch_type == MACH_TYPE_S5C7376) -#else -# define machine_is_s5c7376() (0) -#endif - -#ifdef CONFIG_MACH_MT02 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MT02 -# endif -# define machine_is_mt02() (machine_arch_type == MACH_TYPE_MT02) -#else -# define machine_is_mt02() (0) -#endif - -#ifdef CONFIG_MACH_MPORT3S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPORT3S -# endif -# define machine_is_mport3s() (machine_arch_type == MACH_TYPE_MPORT3S) -#else -# define machine_is_mport3s() (0) -#endif - -#ifdef CONFIG_MACH_RA_ALPHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RA_ALPHA -# endif -# define machine_is_ra_alpha() (machine_arch_type == MACH_TYPE_RA_ALPHA) -#else -# define machine_is_ra_alpha() (0) -#endif - -#ifdef CONFIG_MACH_XCEP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XCEP -# endif -# define machine_is_xcep() (machine_arch_type == MACH_TYPE_XCEP) -#else -# define machine_is_xcep() (0) -#endif - -#ifdef CONFIG_MACH_ARCOM_VULCAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCOM_VULCAN -# endif -# define machine_is_arcom_vulcan() (machine_arch_type == MACH_TYPE_ARCOM_VULCAN) -#else -# define machine_is_arcom_vulcan() (0) -#endif - -#ifdef CONFIG_MACH_STARGATE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STARGATE -# endif -# define machine_is_stargate() (machine_arch_type == MACH_TYPE_STARGATE) -#else -# define machine_is_stargate() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLOJ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLOJ -# endif -# define machine_is_armadilloj() (machine_arch_type == MACH_TYPE_ARMADILLOJ) -#else -# define machine_is_armadilloj() (0) -#endif - -#ifdef CONFIG_MACH_ELROY_JACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELROY_JACK -# endif -# define machine_is_elroy_jack() (machine_arch_type == MACH_TYPE_ELROY_JACK) -#else -# define machine_is_elroy_jack() (0) -#endif - -#ifdef CONFIG_MACH_BACKEND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BACKEND -# endif -# define machine_is_backend() (machine_arch_type == MACH_TYPE_BACKEND) -#else -# define machine_is_backend() (0) -#endif - -#ifdef CONFIG_MACH_S5LINBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5LINBOX -# endif -# define machine_is_s5linbox() (machine_arch_type == MACH_TYPE_S5LINBOX) -#else -# define machine_is_s5linbox() (0) -#endif - -#ifdef CONFIG_MACH_NOMADIK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOMADIK -# endif -# define machine_is_nomadik() (machine_arch_type == MACH_TYPE_NOMADIK) -#else -# define machine_is_nomadik() (0) -#endif - -#ifdef CONFIG_MACH_IA_CPU_9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IA_CPU_9200 -# endif -# define machine_is_ia_cpu_9200() (machine_arch_type == MACH_TYPE_IA_CPU_9200) -#else -# define machine_is_ia_cpu_9200() (0) -#endif - -#ifdef CONFIG_MACH_AT91_BJA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91_BJA1 -# endif -# define machine_is_at91_bja1() (machine_arch_type == MACH_TYPE_AT91_BJA1) -#else -# define machine_is_at91_bja1() (0) -#endif - -#ifdef CONFIG_MACH_CORGI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORGI -# endif -# define machine_is_corgi() (machine_arch_type == MACH_TYPE_CORGI) -#else -# define machine_is_corgi() (0) -#endif - -#ifdef CONFIG_MACH_POODLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POODLE -# endif -# define machine_is_poodle() (machine_arch_type == MACH_TYPE_POODLE) -#else -# define machine_is_poodle() (0) -#endif - -#ifdef CONFIG_MACH_TEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEN -# endif -# define machine_is_ten() (machine_arch_type == MACH_TYPE_TEN) -#else -# define machine_is_ten() (0) -#endif - -#ifdef CONFIG_MACH_ROVERP5P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERP5P -# endif -# define machine_is_roverp5p() (machine_arch_type == MACH_TYPE_ROVERP5P) -#else -# define machine_is_roverp5p() (0) -#endif - -#ifdef CONFIG_MACH_SC2700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SC2700 -# endif -# define machine_is_sc2700() (machine_arch_type == MACH_TYPE_SC2700) -#else -# define machine_is_sc2700() (0) -#endif - -#ifdef CONFIG_MACH_EX_EAGLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EX_EAGLE -# endif -# define machine_is_ex_eagle() (machine_arch_type == MACH_TYPE_EX_EAGLE) -#else -# define machine_is_ex_eagle() (0) -#endif - -#ifdef CONFIG_MACH_NX_PXA12 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NX_PXA12 -# endif -# define machine_is_nx_pxa12() (machine_arch_type == MACH_TYPE_NX_PXA12) -#else -# define machine_is_nx_pxa12() (0) -#endif - -#ifdef CONFIG_MACH_NX_PXA5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NX_PXA5 -# endif -# define machine_is_nx_pxa5() (machine_arch_type == MACH_TYPE_NX_PXA5) -#else -# define machine_is_nx_pxa5() (0) -#endif - -#ifdef CONFIG_MACH_BLACKBOARD2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLACKBOARD2 -# endif -# define machine_is_blackboard2() (machine_arch_type == MACH_TYPE_BLACKBOARD2) -#else -# define machine_is_blackboard2() (0) -#endif - -#ifdef CONFIG_MACH_I819 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I819 -# endif -# define machine_is_i819() (machine_arch_type == MACH_TYPE_I819) -#else -# define machine_is_i819() (0) -#endif - -#ifdef CONFIG_MACH_IXMB995E -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXMB995E -# endif -# define machine_is_ixmb995e() (machine_arch_type == MACH_TYPE_IXMB995E) -#else -# define machine_is_ixmb995e() (0) -#endif - -#ifdef CONFIG_MACH_SKYRIDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKYRIDER -# endif -# define machine_is_skyrider() (machine_arch_type == MACH_TYPE_SKYRIDER) -#else -# define machine_is_skyrider() (0) -#endif - -#ifdef CONFIG_MACH_SKYHAWK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKYHAWK -# endif -# define machine_is_skyhawk() (machine_arch_type == MACH_TYPE_SKYHAWK) -#else -# define machine_is_skyhawk() (0) -#endif - -#ifdef CONFIG_MACH_ENTERPRISE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENTERPRISE -# endif -# define machine_is_enterprise() (machine_arch_type == MACH_TYPE_ENTERPRISE) -#else -# define machine_is_enterprise() (0) -#endif - -#ifdef CONFIG_MACH_DEP2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEP2410 -# endif -# define machine_is_dep2410() (machine_arch_type == MACH_TYPE_DEP2410) -#else -# define machine_is_dep2410() (0) -#endif - -#ifdef CONFIG_MACH_ARMCORE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMCORE -# endif -# define machine_is_armcore() (machine_arch_type == MACH_TYPE_ARMCORE) -#else -# define machine_is_armcore() (0) -#endif - -#ifdef CONFIG_MACH_HOBBIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HOBBIT -# endif -# define machine_is_hobbit() (machine_arch_type == MACH_TYPE_HOBBIT) -#else -# define machine_is_hobbit() (0) -#endif - -#ifdef CONFIG_MACH_H7210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H7210 -# endif -# define machine_is_h7210() (machine_arch_type == MACH_TYPE_H7210) -#else -# define machine_is_h7210() (0) -#endif - -#ifdef CONFIG_MACH_PXA_NETDCU5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_NETDCU5 -# endif -# define machine_is_pxa_netdcu5() (machine_arch_type == MACH_TYPE_PXA_NETDCU5) -#else -# define machine_is_pxa_netdcu5() (0) -#endif - -#ifdef CONFIG_MACH_ACC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACC -# endif -# define machine_is_acc() (machine_arch_type == MACH_TYPE_ACC) -#else -# define machine_is_acc() (0) -#endif - -#ifdef CONFIG_MACH_ESL_SARVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SARVA -# endif -# define machine_is_esl_sarva() (machine_arch_type == MACH_TYPE_ESL_SARVA) -#else -# define machine_is_esl_sarva() (0) -#endif - -#ifdef CONFIG_MACH_XM250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XM250 -# endif -# define machine_is_xm250() (machine_arch_type == MACH_TYPE_XM250) -#else -# define machine_is_xm250() (0) -#endif - -#ifdef CONFIG_MACH_T6TC1XB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T6TC1XB -# endif -# define machine_is_t6tc1xb() (machine_arch_type == MACH_TYPE_T6TC1XB) -#else -# define machine_is_t6tc1xb() (0) -#endif - -#ifdef CONFIG_MACH_ESS710 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESS710 -# endif -# define machine_is_ess710() (machine_arch_type == MACH_TYPE_ESS710) -#else -# define machine_is_ess710() (0) -#endif - -#ifdef CONFIG_MACH_MX31ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31ADS -# endif -# define machine_is_mx31ads() (machine_arch_type == MACH_TYPE_MX31ADS) -#else -# define machine_is_mx31ads() (0) -#endif - -#ifdef CONFIG_MACH_HIMALAYA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIMALAYA -# endif -# define machine_is_himalaya() (machine_arch_type == MACH_TYPE_HIMALAYA) -#else -# define machine_is_himalaya() (0) -#endif - -#ifdef CONFIG_MACH_BOLFENK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BOLFENK -# endif -# define machine_is_bolfenk() (machine_arch_type == MACH_TYPE_BOLFENK) -#else -# define machine_is_bolfenk() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200KR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200KR -# endif -# define machine_is_at91rm9200kr() (machine_arch_type == MACH_TYPE_AT91RM9200KR) -#else -# define machine_is_at91rm9200kr() (0) -#endif - -#ifdef CONFIG_MACH_EDB9312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9312 -# endif -# define machine_is_edb9312() (machine_arch_type == MACH_TYPE_EDB9312) -#else -# define machine_is_edb9312() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_GENERIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_GENERIC -# endif -# define machine_is_omap_generic() (machine_arch_type == MACH_TYPE_OMAP_GENERIC) -#else -# define machine_is_omap_generic() (0) -#endif - -#ifdef CONFIG_MACH_AXIMX3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXIMX3 -# endif -# define machine_is_aximx3() (machine_arch_type == MACH_TYPE_AXIMX3) -#else -# define machine_is_aximx3() (0) -#endif - -#ifdef CONFIG_MACH_EB67XDIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EB67XDIP -# endif -# define machine_is_eb67xdip() (machine_arch_type == MACH_TYPE_EB67XDIP) -#else -# define machine_is_eb67xdip() (0) -#endif - -#ifdef CONFIG_MACH_WEBTXS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEBTXS -# endif -# define machine_is_webtxs() (machine_arch_type == MACH_TYPE_WEBTXS) -#else -# define machine_is_webtxs() (0) -#endif - -#ifdef CONFIG_MACH_HAWK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HAWK -# endif -# define machine_is_hawk() (machine_arch_type == MACH_TYPE_HAWK) -#else -# define machine_is_hawk() (0) -#endif - -#ifdef CONFIG_MACH_CCAT91SBC001 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCAT91SBC001 -# endif -# define machine_is_ccat91sbc001() (machine_arch_type == MACH_TYPE_CCAT91SBC001) -#else -# define machine_is_ccat91sbc001() (0) -#endif - -#ifdef CONFIG_MACH_EXPRESSO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXPRESSO -# endif -# define machine_is_expresso() (machine_arch_type == MACH_TYPE_EXPRESSO) -#else -# define machine_is_expresso() (0) -#endif - -#ifdef CONFIG_MACH_H4000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H4000 -# endif -# define machine_is_h4000() (machine_arch_type == MACH_TYPE_H4000) -#else -# define machine_is_h4000() (0) -#endif - -#ifdef CONFIG_MACH_DINO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DINO -# endif -# define machine_is_dino() (machine_arch_type == MACH_TYPE_DINO) -#else -# define machine_is_dino() (0) -#endif - -#ifdef CONFIG_MACH_ML675K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ML675K -# endif -# define machine_is_ml675k() (machine_arch_type == MACH_TYPE_ML675K) -#else -# define machine_is_ml675k() (0) -#endif - -#ifdef CONFIG_MACH_EDB9301 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9301 -# endif -# define machine_is_edb9301() (machine_arch_type == MACH_TYPE_EDB9301) -#else -# define machine_is_edb9301() (0) -#endif - -#ifdef CONFIG_MACH_EDB9315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9315 -# endif -# define machine_is_edb9315() (machine_arch_type == MACH_TYPE_EDB9315) -#else -# define machine_is_edb9315() (0) -#endif - -#ifdef CONFIG_MACH_RECIVA_TT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RECIVA_TT -# endif -# define machine_is_reciva_tt() (machine_arch_type == MACH_TYPE_RECIVA_TT) -#else -# define machine_is_reciva_tt() (0) -#endif - -#ifdef CONFIG_MACH_CSTCB01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSTCB01 -# endif -# define machine_is_cstcb01() (machine_arch_type == MACH_TYPE_CSTCB01) -#else -# define machine_is_cstcb01() (0) -#endif - -#ifdef CONFIG_MACH_CSTCB1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSTCB1 -# endif -# define machine_is_cstcb1() (machine_arch_type == MACH_TYPE_CSTCB1) -#else -# define machine_is_cstcb1() (0) -#endif - -#ifdef CONFIG_MACH_SHADWELL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHADWELL -# endif -# define machine_is_shadwell() (machine_arch_type == MACH_TYPE_SHADWELL) -#else -# define machine_is_shadwell() (0) -#endif - -#ifdef CONFIG_MACH_GOEPEL263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GOEPEL263 -# endif -# define machine_is_goepel263() (machine_arch_type == MACH_TYPE_GOEPEL263) -#else -# define machine_is_goepel263() (0) -#endif - -#ifdef CONFIG_MACH_ACQ100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACQ100 -# endif -# define machine_is_acq100() (machine_arch_type == MACH_TYPE_ACQ100) -#else -# define machine_is_acq100() (0) -#endif - -#ifdef CONFIG_MACH_MX1FS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX1FS2 -# endif -# define machine_is_mx1fs2() (machine_arch_type == MACH_TYPE_MX1FS2) -#else -# define machine_is_mx1fs2() (0) -#endif - -#ifdef CONFIG_MACH_HIPTOP_G1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIPTOP_G1 -# endif -# define machine_is_hiptop_g1() (machine_arch_type == MACH_TYPE_HIPTOP_G1) -#else -# define machine_is_hiptop_g1() (0) -#endif - -#ifdef CONFIG_MACH_SPARKY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPARKY -# endif -# define machine_is_sparky() (machine_arch_type == MACH_TYPE_SPARKY) -#else -# define machine_is_sparky() (0) -#endif - -#ifdef CONFIG_MACH_NS9750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS9750 -# endif -# define machine_is_ns9750() (machine_arch_type == MACH_TYPE_NS9750) -#else -# define machine_is_ns9750() (0) -#endif - -#ifdef CONFIG_MACH_PHOENIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHOENIX -# endif -# define machine_is_phoenix() (machine_arch_type == MACH_TYPE_PHOENIX) -#else -# define machine_is_phoenix() (0) -#endif - -#ifdef CONFIG_MACH_VR1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VR1000 -# endif -# define machine_is_vr1000() (machine_arch_type == MACH_TYPE_VR1000) -#else -# define machine_is_vr1000() (0) -#endif - -#ifdef CONFIG_MACH_DEISTERPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEISTERPXA -# endif -# define machine_is_deisterpxa() (machine_arch_type == MACH_TYPE_DEISTERPXA) -#else -# define machine_is_deisterpxa() (0) -#endif - -#ifdef CONFIG_MACH_BCM1160 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCM1160 -# endif -# define machine_is_bcm1160() (machine_arch_type == MACH_TYPE_BCM1160) -#else -# define machine_is_bcm1160() (0) -#endif - -#ifdef CONFIG_MACH_PCM022 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM022 -# endif -# define machine_is_pcm022() (machine_arch_type == MACH_TYPE_PCM022) -#else -# define machine_is_pcm022() (0) -#endif - -#ifdef CONFIG_MACH_ADSGCX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSGCX -# endif -# define machine_is_adsgcx() (machine_arch_type == MACH_TYPE_ADSGCX) -#else -# define machine_is_adsgcx() (0) -#endif - -#ifdef CONFIG_MACH_DREADNAUGHT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DREADNAUGHT -# endif -# define machine_is_dreadnaught() (machine_arch_type == MACH_TYPE_DREADNAUGHT) -#else -# define machine_is_dreadnaught() (0) -#endif - -#ifdef CONFIG_MACH_DM320 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM320 -# endif -# define machine_is_dm320() (machine_arch_type == MACH_TYPE_DM320) -#else -# define machine_is_dm320() (0) -#endif - -#ifdef CONFIG_MACH_MARKOV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARKOV -# endif -# define machine_is_markov() (machine_arch_type == MACH_TYPE_MARKOV) -#else -# define machine_is_markov() (0) -#endif - -#ifdef CONFIG_MACH_COS7A400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COS7A400 -# endif -# define machine_is_cos7a400() (machine_arch_type == MACH_TYPE_COS7A400) -#else -# define machine_is_cos7a400() (0) -#endif - -#ifdef CONFIG_MACH_MILANO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MILANO -# endif -# define machine_is_milano() (machine_arch_type == MACH_TYPE_MILANO) -#else -# define machine_is_milano() (0) -#endif - -#ifdef CONFIG_MACH_UE9328 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UE9328 -# endif -# define machine_is_ue9328() (machine_arch_type == MACH_TYPE_UE9328) -#else -# define machine_is_ue9328() (0) -#endif - -#ifdef CONFIG_MACH_UEX255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UEX255 -# endif -# define machine_is_uex255() (machine_arch_type == MACH_TYPE_UEX255) -#else -# define machine_is_uex255() (0) -#endif - -#ifdef CONFIG_MACH_UE2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UE2410 -# endif -# define machine_is_ue2410() (machine_arch_type == MACH_TYPE_UE2410) -#else -# define machine_is_ue2410() (0) -#endif - -#ifdef CONFIG_MACH_A620 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A620 -# endif -# define machine_is_a620() (machine_arch_type == MACH_TYPE_A620) -#else -# define machine_is_a620() (0) -#endif - -#ifdef CONFIG_MACH_OCELOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCELOT -# endif -# define machine_is_ocelot() (machine_arch_type == MACH_TYPE_OCELOT) -#else -# define machine_is_ocelot() (0) -#endif - -#ifdef CONFIG_MACH_CHEETAH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHEETAH -# endif -# define machine_is_cheetah() (machine_arch_type == MACH_TYPE_CHEETAH) -#else -# define machine_is_cheetah() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PERSEUS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PERSEUS2 -# endif -# define machine_is_omap_perseus2() (machine_arch_type == MACH_TYPE_OMAP_PERSEUS2) -#else -# define machine_is_omap_perseus2() (0) -#endif - -#ifdef CONFIG_MACH_ZVUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZVUE -# endif -# define machine_is_zvue() (machine_arch_type == MACH_TYPE_ZVUE) -#else -# define machine_is_zvue() (0) -#endif - -#ifdef CONFIG_MACH_ROVERP1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERP1 -# endif -# define machine_is_roverp1() (machine_arch_type == MACH_TYPE_ROVERP1) -#else -# define machine_is_roverp1() (0) -#endif - -#ifdef CONFIG_MACH_ASIDIAL2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASIDIAL2 -# endif -# define machine_is_asidial2() (machine_arch_type == MACH_TYPE_ASIDIAL2) -#else -# define machine_is_asidial2() (0) -#endif - -#ifdef CONFIG_MACH_S3C24A0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C24A0 -# endif -# define machine_is_s3c24a0() (machine_arch_type == MACH_TYPE_S3C24A0) -#else -# define machine_is_s3c24a0() (0) -#endif - -#ifdef CONFIG_MACH_E800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E800 -# endif -# define machine_is_e800() (machine_arch_type == MACH_TYPE_E800) -#else -# define machine_is_e800() (0) -#endif - -#ifdef CONFIG_MACH_E750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E750 -# endif -# define machine_is_e750() (machine_arch_type == MACH_TYPE_E750) -#else -# define machine_is_e750() (0) -#endif - -#ifdef CONFIG_MACH_S3C5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C5500 -# endif -# define machine_is_s3c5500() (machine_arch_type == MACH_TYPE_S3C5500) -#else -# define machine_is_s3c5500() (0) -#endif - -#ifdef CONFIG_MACH_SMDK5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK5500 -# endif -# define machine_is_smdk5500() (machine_arch_type == MACH_TYPE_SMDK5500) -#else -# define machine_is_smdk5500() (0) -#endif - -#ifdef CONFIG_MACH_SIGNALSYNC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIGNALSYNC -# endif -# define machine_is_signalsync() (machine_arch_type == MACH_TYPE_SIGNALSYNC) -#else -# define machine_is_signalsync() (0) -#endif - -#ifdef CONFIG_MACH_NBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NBC -# endif -# define machine_is_nbc() (machine_arch_type == MACH_TYPE_NBC) -#else -# define machine_is_nbc() (0) -#endif - -#ifdef CONFIG_MACH_KODIAK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KODIAK -# endif -# define machine_is_kodiak() (machine_arch_type == MACH_TYPE_KODIAK) -#else -# define machine_is_kodiak() (0) -#endif - -#ifdef CONFIG_MACH_NETBOOKPRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETBOOKPRO -# endif -# define machine_is_netbookpro() (machine_arch_type == MACH_TYPE_NETBOOKPRO) -#else -# define machine_is_netbookpro() (0) -#endif - -#ifdef CONFIG_MACH_HW90200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW90200 -# endif -# define machine_is_hw90200() (machine_arch_type == MACH_TYPE_HW90200) -#else -# define machine_is_hw90200() (0) -#endif - -#ifdef CONFIG_MACH_CONDOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CONDOR -# endif -# define machine_is_condor() (machine_arch_type == MACH_TYPE_CONDOR) -#else -# define machine_is_condor() (0) -#endif - -#ifdef CONFIG_MACH_CUP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CUP -# endif -# define machine_is_cup() (machine_arch_type == MACH_TYPE_CUP) -#else -# define machine_is_cup() (0) -#endif - -#ifdef CONFIG_MACH_KITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KITE -# endif -# define machine_is_kite() (machine_arch_type == MACH_TYPE_KITE) -#else -# define machine_is_kite() (0) -#endif - -#ifdef CONFIG_MACH_SCB9328 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCB9328 -# endif -# define machine_is_scb9328() (machine_arch_type == MACH_TYPE_SCB9328) -#else -# define machine_is_scb9328() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_H3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_H3 -# endif -# define machine_is_omap_h3() (machine_arch_type == MACH_TYPE_OMAP_H3) -#else -# define machine_is_omap_h3() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_H4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_H4 -# endif -# define machine_is_omap_h4() (machine_arch_type == MACH_TYPE_OMAP_H4) -#else -# define machine_is_omap_h4() (0) -#endif - -#ifdef CONFIG_MACH_N10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N10 -# endif -# define machine_is_n10() (machine_arch_type == MACH_TYPE_N10) -#else -# define machine_is_n10() (0) -#endif - -#ifdef CONFIG_MACH_MONTAJADE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MONTAJADE -# endif -# define machine_is_montejade() (machine_arch_type == MACH_TYPE_MONTAJADE) -#else -# define machine_is_montejade() (0) -#endif - -#ifdef CONFIG_MACH_SG560 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG560 -# endif -# define machine_is_sg560() (machine_arch_type == MACH_TYPE_SG560) -#else -# define machine_is_sg560() (0) -#endif - -#ifdef CONFIG_MACH_DP1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DP1000 -# endif -# define machine_is_dp1000() (machine_arch_type == MACH_TYPE_DP1000) -#else -# define machine_is_dp1000() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_OSK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_OSK -# endif -# define machine_is_omap_osk() (machine_arch_type == MACH_TYPE_OMAP_OSK) -#else -# define machine_is_omap_osk() (0) -#endif - -#ifdef CONFIG_MACH_RG100V3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RG100V3 -# endif -# define machine_is_rg100v3() (machine_arch_type == MACH_TYPE_RG100V3) -#else -# define machine_is_rg100v3() (0) -#endif - -#ifdef CONFIG_MACH_MX2ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX2ADS -# endif -# define machine_is_mx2ads() (machine_arch_type == MACH_TYPE_MX2ADS) -#else -# define machine_is_mx2ads() (0) -#endif - -#ifdef CONFIG_MACH_PXA_KILO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_KILO -# endif -# define machine_is_pxa_kilo() (machine_arch_type == MACH_TYPE_PXA_KILO) -#else -# define machine_is_pxa_kilo() (0) -#endif - -#ifdef CONFIG_MACH_IXP4XX_EAGLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP4XX_EAGLE -# endif -# define machine_is_ixp4xx_eagle() (machine_arch_type == MACH_TYPE_IXP4XX_EAGLE) -#else -# define machine_is_ixp4xx_eagle() (0) -#endif - -#ifdef CONFIG_MACH_TOSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOSA -# endif -# define machine_is_tosa() (machine_arch_type == MACH_TYPE_TOSA) -#else -# define machine_is_tosa() (0) -#endif - -#ifdef CONFIG_MACH_MB2520F -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB2520F -# endif -# define machine_is_mb2520f() (machine_arch_type == MACH_TYPE_MB2520F) -#else -# define machine_is_mb2520f() (0) -#endif - -#ifdef CONFIG_MACH_EMC1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMC1000 -# endif -# define machine_is_emc1000() (machine_arch_type == MACH_TYPE_EMC1000) -#else -# define machine_is_emc1000() (0) -#endif - -#ifdef CONFIG_MACH_TIDSC25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIDSC25 -# endif -# define machine_is_tidsc25() (machine_arch_type == MACH_TYPE_TIDSC25) -#else -# define machine_is_tidsc25() (0) -#endif - -#ifdef CONFIG_MACH_AKCPMXL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AKCPMXL -# endif -# define machine_is_akcpmxl() (machine_arch_type == MACH_TYPE_AKCPMXL) -#else -# define machine_is_akcpmxl() (0) -#endif - -#ifdef CONFIG_MACH_AV3XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AV3XX -# endif -# define machine_is_av3xx() (machine_arch_type == MACH_TYPE_AV3XX) -#else -# define machine_is_av3xx() (0) -#endif - -#ifdef CONFIG_MACH_AVILA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVILA -# endif -# define machine_is_avila() (machine_arch_type == MACH_TYPE_AVILA) -#else -# define machine_is_avila() (0) -#endif - -#ifdef CONFIG_MACH_PXA_MPM10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_MPM10 -# endif -# define machine_is_pxa_mpm10() (machine_arch_type == MACH_TYPE_PXA_MPM10) -#else -# define machine_is_pxa_mpm10() (0) -#endif - -#ifdef CONFIG_MACH_PXA_KYANITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_KYANITE -# endif -# define machine_is_pxa_kyanite() (machine_arch_type == MACH_TYPE_PXA_KYANITE) -#else -# define machine_is_pxa_kyanite() (0) -#endif - -#ifdef CONFIG_MACH_SGOLD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SGOLD -# endif -# define machine_is_sgold() (machine_arch_type == MACH_TYPE_SGOLD) -#else -# define machine_is_sgold() (0) -#endif - -#ifdef CONFIG_MACH_OSCAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OSCAR -# endif -# define machine_is_oscar() (machine_arch_type == MACH_TYPE_OSCAR) -#else -# define machine_is_oscar() (0) -#endif - -#ifdef CONFIG_MACH_EPXA4USB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPXA4USB2 -# endif -# define machine_is_epxa4usb2() (machine_arch_type == MACH_TYPE_EPXA4USB2) -#else -# define machine_is_epxa4usb2() (0) -#endif - -#ifdef CONFIG_MACH_XSENGINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XSENGINE -# endif -# define machine_is_xsengine() (machine_arch_type == MACH_TYPE_XSENGINE) -#else -# define machine_is_xsengine() (0) -#endif - -#ifdef CONFIG_MACH_IP600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IP600 -# endif -# define machine_is_ip600() (machine_arch_type == MACH_TYPE_IP600) -#else -# define machine_is_ip600() (0) -#endif - -#ifdef CONFIG_MACH_MCAN2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MCAN2 -# endif -# define machine_is_mcan2() (machine_arch_type == MACH_TYPE_MCAN2) -#else -# define machine_is_mcan2() (0) -#endif - -#ifdef CONFIG_MACH_DDI_BLUERIDGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DDI_BLUERIDGE -# endif -# define machine_is_ddi_blueridge() (machine_arch_type == MACH_TYPE_DDI_BLUERIDGE) -#else -# define machine_is_ddi_blueridge() (0) -#endif - -#ifdef CONFIG_MACH_SKYMINDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKYMINDER -# endif -# define machine_is_skyminder() (machine_arch_type == MACH_TYPE_SKYMINDER) -#else -# define machine_is_skyminder() (0) -#endif - -#ifdef CONFIG_MACH_LPD79520 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPD79520 -# endif -# define machine_is_lpd79520() (machine_arch_type == MACH_TYPE_LPD79520) -#else -# define machine_is_lpd79520() (0) -#endif - -#ifdef CONFIG_MACH_EDB9302 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9302 -# endif -# define machine_is_edb9302() (machine_arch_type == MACH_TYPE_EDB9302) -#else -# define machine_is_edb9302() (0) -#endif - -#ifdef CONFIG_MACH_HW90340 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW90340 -# endif -# define machine_is_hw90340() (machine_arch_type == MACH_TYPE_HW90340) -#else -# define machine_is_hw90340() (0) -#endif - -#ifdef CONFIG_MACH_CIP_BOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CIP_BOX -# endif -# define machine_is_cip_box() (machine_arch_type == MACH_TYPE_CIP_BOX) -#else -# define machine_is_cip_box() (0) -#endif - -#ifdef CONFIG_MACH_IVPN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IVPN -# endif -# define machine_is_ivpn() (machine_arch_type == MACH_TYPE_IVPN) -#else -# define machine_is_ivpn() (0) -#endif - -#ifdef CONFIG_MACH_RSOC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RSOC2 -# endif -# define machine_is_rsoc2() (machine_arch_type == MACH_TYPE_RSOC2) -#else -# define machine_is_rsoc2() (0) -#endif - -#ifdef CONFIG_MACH_HUSKY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUSKY -# endif -# define machine_is_husky() (machine_arch_type == MACH_TYPE_HUSKY) -#else -# define machine_is_husky() (0) -#endif - -#ifdef CONFIG_MACH_BOXER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BOXER -# endif -# define machine_is_boxer() (machine_arch_type == MACH_TYPE_BOXER) -#else -# define machine_is_boxer() (0) -#endif - -#ifdef CONFIG_MACH_SHEPHERD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHEPHERD -# endif -# define machine_is_shepherd() (machine_arch_type == MACH_TYPE_SHEPHERD) -#else -# define machine_is_shepherd() (0) -#endif - -#ifdef CONFIG_MACH_AML42800AA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AML42800AA -# endif -# define machine_is_aml42800aa() (machine_arch_type == MACH_TYPE_AML42800AA) -#else -# define machine_is_aml42800aa() (0) -#endif - -#ifdef CONFIG_MACH_LPC2294 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC2294 -# endif -# define machine_is_lpc2294() (machine_arch_type == MACH_TYPE_LPC2294) -#else -# define machine_is_lpc2294() (0) -#endif - -#ifdef CONFIG_MACH_SWITCHGRASS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWITCHGRASS -# endif -# define machine_is_switchgrass() (machine_arch_type == MACH_TYPE_SWITCHGRASS) -#else -# define machine_is_switchgrass() (0) -#endif - -#ifdef CONFIG_MACH_ENS_CMU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENS_CMU -# endif -# define machine_is_ens_cmu() (machine_arch_type == MACH_TYPE_ENS_CMU) -#else -# define machine_is_ens_cmu() (0) -#endif - -#ifdef CONFIG_MACH_MM6_SDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MM6_SDB -# endif -# define machine_is_mm6_sdb() (machine_arch_type == MACH_TYPE_MM6_SDB) -#else -# define machine_is_mm6_sdb() (0) -#endif - -#ifdef CONFIG_MACH_SATURN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SATURN -# endif -# define machine_is_saturn() (machine_arch_type == MACH_TYPE_SATURN) -#else -# define machine_is_saturn() (0) -#endif - -#ifdef CONFIG_MACH_I30030EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I30030EVB -# endif -# define machine_is_i30030evb() (machine_arch_type == MACH_TYPE_I30030EVB) -#else -# define machine_is_i30030evb() (0) -#endif - -#ifdef CONFIG_MACH_MXC27530EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC27530EVB -# endif -# define machine_is_mxc27530evb() (machine_arch_type == MACH_TYPE_MXC27530EVB) -#else -# define machine_is_mxc27530evb() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2800 -# endif -# define machine_is_smdk2800() (machine_arch_type == MACH_TYPE_SMDK2800) -#else -# define machine_is_smdk2800() (0) -#endif - -#ifdef CONFIG_MACH_MTWILSON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MTWILSON -# endif -# define machine_is_mtwilson() (machine_arch_type == MACH_TYPE_MTWILSON) -#else -# define machine_is_mtwilson() (0) -#endif - -#ifdef CONFIG_MACH_ZITI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZITI -# endif -# define machine_is_ziti() (machine_arch_type == MACH_TYPE_ZITI) -#else -# define machine_is_ziti() (0) -#endif - -#ifdef CONFIG_MACH_GRANDFATHER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GRANDFATHER -# endif -# define machine_is_grandfather() (machine_arch_type == MACH_TYPE_GRANDFATHER) -#else -# define machine_is_grandfather() (0) -#endif - -#ifdef CONFIG_MACH_TENGINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TENGINE -# endif -# define machine_is_tengine() (machine_arch_type == MACH_TYPE_TENGINE) -#else -# define machine_is_tengine() (0) -#endif - -#ifdef CONFIG_MACH_S3C2460 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2460 -# endif -# define machine_is_s3c2460() (machine_arch_type == MACH_TYPE_S3C2460) -#else -# define machine_is_s3c2460() (0) -#endif - -#ifdef CONFIG_MACH_PDM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PDM -# endif -# define machine_is_pdm() (machine_arch_type == MACH_TYPE_PDM) -#else -# define machine_is_pdm() (0) -#endif - -#ifdef CONFIG_MACH_H4700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H4700 -# endif -# define machine_is_h4700() (machine_arch_type == MACH_TYPE_H4700) -#else -# define machine_is_h4700() (0) -#endif - -#ifdef CONFIG_MACH_H6300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6300 -# endif -# define machine_is_h6300() (machine_arch_type == MACH_TYPE_H6300) -#else -# define machine_is_h6300() (0) -#endif - -#ifdef CONFIG_MACH_RZ1700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RZ1700 -# endif -# define machine_is_rz1700() (machine_arch_type == MACH_TYPE_RZ1700) -#else -# define machine_is_rz1700() (0) -#endif - -#ifdef CONFIG_MACH_A716 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A716 -# endif -# define machine_is_a716() (machine_arch_type == MACH_TYPE_A716) -#else -# define machine_is_a716() (0) -#endif - -#ifdef CONFIG_MACH_ESTK2440A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESTK2440A -# endif -# define machine_is_estk2440a() (machine_arch_type == MACH_TYPE_ESTK2440A) -#else -# define machine_is_estk2440a() (0) -#endif - -#ifdef CONFIG_MACH_ATWIXP425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATWIXP425 -# endif -# define machine_is_atwixp425() (machine_arch_type == MACH_TYPE_ATWIXP425) -#else -# define machine_is_atwixp425() (0) -#endif - -#ifdef CONFIG_MACH_CSB336 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB336 -# endif -# define machine_is_csb336() (machine_arch_type == MACH_TYPE_CSB336) -#else -# define machine_is_csb336() (0) -#endif - -#ifdef CONFIG_MACH_RIRM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIRM2 -# endif -# define machine_is_rirm2() (machine_arch_type == MACH_TYPE_RIRM2) -#else -# define machine_is_rirm2() (0) -#endif - -#ifdef CONFIG_MACH_CX23518 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CX23518 -# endif -# define machine_is_cx23518() (machine_arch_type == MACH_TYPE_CX23518) -#else -# define machine_is_cx23518() (0) -#endif - -#ifdef CONFIG_MACH_CX2351X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CX2351X -# endif -# define machine_is_cx2351x() (machine_arch_type == MACH_TYPE_CX2351X) -#else -# define machine_is_cx2351x() (0) -#endif - -#ifdef CONFIG_MACH_COMPUTIME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMPUTIME -# endif -# define machine_is_computime() (machine_arch_type == MACH_TYPE_COMPUTIME) -#else -# define machine_is_computime() (0) -#endif - -#ifdef CONFIG_MACH_IZARUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IZARUS -# endif -# define machine_is_izarus() (machine_arch_type == MACH_TYPE_IZARUS) -#else -# define machine_is_izarus() (0) -#endif - -#ifdef CONFIG_MACH_RTS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RTS -# endif -# define machine_is_pxa_rts() (machine_arch_type == MACH_TYPE_RTS) -#else -# define machine_is_pxa_rts() (0) -#endif - -#ifdef CONFIG_MACH_SE5100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SE5100 -# endif -# define machine_is_se5100() (machine_arch_type == MACH_TYPE_SE5100) -#else -# define machine_is_se5100() (0) -#endif - -#ifdef CONFIG_MACH_S3C2510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2510 -# endif -# define machine_is_s3c2510() (machine_arch_type == MACH_TYPE_S3C2510) -#else -# define machine_is_s3c2510() (0) -#endif - -#ifdef CONFIG_MACH_CSB437TL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB437TL -# endif -# define machine_is_csb437tl() (machine_arch_type == MACH_TYPE_CSB437TL) -#else -# define machine_is_csb437tl() (0) -#endif - -#ifdef CONFIG_MACH_SLAUSON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SLAUSON -# endif -# define machine_is_slauson() (machine_arch_type == MACH_TYPE_SLAUSON) -#else -# define machine_is_slauson() (0) -#endif - -#ifdef CONFIG_MACH_PEARLRIVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PEARLRIVER -# endif -# define machine_is_pearlriver() (machine_arch_type == MACH_TYPE_PEARLRIVER) -#else -# define machine_is_pearlriver() (0) -#endif - -#ifdef CONFIG_MACH_TDC_P210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TDC_P210 -# endif -# define machine_is_tdc_p210() (machine_arch_type == MACH_TYPE_TDC_P210) -#else -# define machine_is_tdc_p210() (0) -#endif - -#ifdef CONFIG_MACH_SG580 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG580 -# endif -# define machine_is_sg580() (machine_arch_type == MACH_TYPE_SG580) -#else -# define machine_is_sg580() (0) -#endif - -#ifdef CONFIG_MACH_WRSBCARM7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WRSBCARM7 -# endif -# define machine_is_wrsbcarm7() (machine_arch_type == MACH_TYPE_WRSBCARM7) -#else -# define machine_is_wrsbcarm7() (0) -#endif - -#ifdef CONFIG_MACH_IPD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPD -# endif -# define machine_is_ipd() (machine_arch_type == MACH_TYPE_IPD) -#else -# define machine_is_ipd() (0) -#endif - -#ifdef CONFIG_MACH_PXA_DNP2110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_DNP2110 -# endif -# define machine_is_pxa_dnp2110() (machine_arch_type == MACH_TYPE_PXA_DNP2110) -#else -# define machine_is_pxa_dnp2110() (0) -#endif - -#ifdef CONFIG_MACH_XAENIAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XAENIAX -# endif -# define machine_is_xaeniax() (machine_arch_type == MACH_TYPE_XAENIAX) -#else -# define machine_is_xaeniax() (0) -#endif - -#ifdef CONFIG_MACH_SOMN4250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOMN4250 -# endif -# define machine_is_somn4250() (machine_arch_type == MACH_TYPE_SOMN4250) -#else -# define machine_is_somn4250() (0) -#endif - -#ifdef CONFIG_MACH_PLEB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PLEB2 -# endif -# define machine_is_pleb2() (machine_arch_type == MACH_TYPE_PLEB2) -#else -# define machine_is_pleb2() (0) -#endif - -#ifdef CONFIG_MACH_CORNWALLIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORNWALLIS -# endif -# define machine_is_cornwallis() (machine_arch_type == MACH_TYPE_CORNWALLIS) -#else -# define machine_is_cornwallis() (0) -#endif - -#ifdef CONFIG_MACH_GURNEY_DRV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GURNEY_DRV -# endif -# define machine_is_gurney_drv() (machine_arch_type == MACH_TYPE_GURNEY_DRV) -#else -# define machine_is_gurney_drv() (0) -#endif - -#ifdef CONFIG_MACH_CHAFFEE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHAFFEE -# endif -# define machine_is_chaffee() (machine_arch_type == MACH_TYPE_CHAFFEE) -#else -# define machine_is_chaffee() (0) -#endif - -#ifdef CONFIG_MACH_RMS101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RMS101 -# endif -# define machine_is_rms101() (machine_arch_type == MACH_TYPE_RMS101) -#else -# define machine_is_rms101() (0) -#endif - -#ifdef CONFIG_MACH_RX3715 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RX3715 -# endif -# define machine_is_rx3715() (machine_arch_type == MACH_TYPE_RX3715) -#else -# define machine_is_rx3715() (0) -#endif - -#ifdef CONFIG_MACH_SWIFT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWIFT -# endif -# define machine_is_swift() (machine_arch_type == MACH_TYPE_SWIFT) -#else -# define machine_is_swift() (0) -#endif - -#ifdef CONFIG_MACH_ROVERP7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERP7 -# endif -# define machine_is_roverp7() (machine_arch_type == MACH_TYPE_ROVERP7) -#else -# define machine_is_roverp7() (0) -#endif - -#ifdef CONFIG_MACH_PR818S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PR818S -# endif -# define machine_is_pr818s() (machine_arch_type == MACH_TYPE_PR818S) -#else -# define machine_is_pr818s() (0) -#endif - -#ifdef CONFIG_MACH_TRXPRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRXPRO -# endif -# define machine_is_trxpro() (machine_arch_type == MACH_TYPE_TRXPRO) -#else -# define machine_is_trxpro() (0) -#endif - -#ifdef CONFIG_MACH_NSLU2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSLU2 -# endif -# define machine_is_nslu2() (machine_arch_type == MACH_TYPE_NSLU2) -#else -# define machine_is_nslu2() (0) -#endif - -#ifdef CONFIG_MACH_E400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E400 -# endif -# define machine_is_e400() (machine_arch_type == MACH_TYPE_E400) -#else -# define machine_is_e400() (0) -#endif - -#ifdef CONFIG_MACH_TRAB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRAB -# endif -# define machine_is_trab() (machine_arch_type == MACH_TYPE_TRAB) -#else -# define machine_is_trab() (0) -#endif - -#ifdef CONFIG_MACH_CMC_PU2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CMC_PU2 -# endif -# define machine_is_cmc_pu2() (machine_arch_type == MACH_TYPE_CMC_PU2) -#else -# define machine_is_cmc_pu2() (0) -#endif - -#ifdef CONFIG_MACH_FULCRUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FULCRUM -# endif -# define machine_is_fulcrum() (machine_arch_type == MACH_TYPE_FULCRUM) -#else -# define machine_is_fulcrum() (0) -#endif - -#ifdef CONFIG_MACH_NETGATE42X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETGATE42X -# endif -# define machine_is_netgate42x() (machine_arch_type == MACH_TYPE_NETGATE42X) -#else -# define machine_is_netgate42x() (0) -#endif - -#ifdef CONFIG_MACH_STR710 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STR710 -# endif -# define machine_is_str710() (machine_arch_type == MACH_TYPE_STR710) -#else -# define machine_is_str710() (0) -#endif - -#ifdef CONFIG_MACH_IXDPG425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDPG425 -# endif -# define machine_is_ixdpg425() (machine_arch_type == MACH_TYPE_IXDPG425) -#else -# define machine_is_ixdpg425() (0) -#endif - -#ifdef CONFIG_MACH_TOMTOMGO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOMTOMGO -# endif -# define machine_is_tomtomgo() (machine_arch_type == MACH_TYPE_TOMTOMGO) -#else -# define machine_is_tomtomgo() (0) -#endif - -#ifdef CONFIG_MACH_VERSATILE_AB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VERSATILE_AB -# endif -# define machine_is_versatile_ab() (machine_arch_type == MACH_TYPE_VERSATILE_AB) -#else -# define machine_is_versatile_ab() (0) -#endif - -#ifdef CONFIG_MACH_EDB9307 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9307 -# endif -# define machine_is_edb9307() (machine_arch_type == MACH_TYPE_EDB9307) -#else -# define machine_is_edb9307() (0) -#endif - -#ifdef CONFIG_MACH_SG565 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG565 -# endif -# define machine_is_sg565() (machine_arch_type == MACH_TYPE_SG565) -#else -# define machine_is_sg565() (0) -#endif - -#ifdef CONFIG_MACH_LPD79524 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPD79524 -# endif -# define machine_is_lpd79524() (machine_arch_type == MACH_TYPE_LPD79524) -#else -# define machine_is_lpd79524() (0) -#endif - -#ifdef CONFIG_MACH_LPD79525 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPD79525 -# endif -# define machine_is_lpd79525() (machine_arch_type == MACH_TYPE_LPD79525) -#else -# define machine_is_lpd79525() (0) -#endif - -#ifdef CONFIG_MACH_RMS100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RMS100 -# endif -# define machine_is_rms100() (machine_arch_type == MACH_TYPE_RMS100) -#else -# define machine_is_rms100() (0) -#endif - -#ifdef CONFIG_MACH_KB9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KB9200 -# endif -# define machine_is_kb9200() (machine_arch_type == MACH_TYPE_KB9200) -#else -# define machine_is_kb9200() (0) -#endif - -#ifdef CONFIG_MACH_SX1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SX1 -# endif -# define machine_is_sx1() (machine_arch_type == MACH_TYPE_SX1) -#else -# define machine_is_sx1() (0) -#endif - -#ifdef CONFIG_MACH_HMS39C7092 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HMS39C7092 -# endif -# define machine_is_hms39c7092() (machine_arch_type == MACH_TYPE_HMS39C7092) -#else -# define machine_is_hms39c7092() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO -# endif -# define machine_is_armadillo() (machine_arch_type == MACH_TYPE_ARMADILLO) -#else -# define machine_is_armadillo() (0) -#endif - -#ifdef CONFIG_MACH_IPCU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPCU -# endif -# define machine_is_ipcu() (machine_arch_type == MACH_TYPE_IPCU) -#else -# define machine_is_ipcu() (0) -#endif - -#ifdef CONFIG_MACH_LOOX720 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOOX720 -# endif -# define machine_is_loox720() (machine_arch_type == MACH_TYPE_LOOX720) -#else -# define machine_is_loox720() (0) -#endif - -#ifdef CONFIG_MACH_IXDP465 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP465 -# endif -# define machine_is_ixdp465() (machine_arch_type == MACH_TYPE_IXDP465) -#else -# define machine_is_ixdp465() (0) -#endif - -#ifdef CONFIG_MACH_IXDP2351 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP2351 -# endif -# define machine_is_ixdp2351() (machine_arch_type == MACH_TYPE_IXDP2351) -#else -# define machine_is_ixdp2351() (0) -#endif - -#ifdef CONFIG_MACH_ADSVIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSVIX -# endif -# define machine_is_adsvix() (machine_arch_type == MACH_TYPE_ADSVIX) -#else -# define machine_is_adsvix() (0) -#endif - -#ifdef CONFIG_MACH_DM270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM270 -# endif -# define machine_is_dm270() (machine_arch_type == MACH_TYPE_DM270) -#else -# define machine_is_dm270() (0) -#endif - -#ifdef CONFIG_MACH_SOCLTPLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOCLTPLUS -# endif -# define machine_is_socltplus() (machine_arch_type == MACH_TYPE_SOCLTPLUS) -#else -# define machine_is_socltplus() (0) -#endif - -#ifdef CONFIG_MACH_ECIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECIA -# endif -# define machine_is_ecia() (machine_arch_type == MACH_TYPE_ECIA) -#else -# define machine_is_ecia() (0) -#endif - -#ifdef CONFIG_MACH_CM4008 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM4008 -# endif -# define machine_is_cm4008() (machine_arch_type == MACH_TYPE_CM4008) -#else -# define machine_is_cm4008() (0) -#endif - -#ifdef CONFIG_MACH_P2001 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P2001 -# endif -# define machine_is_p2001() (machine_arch_type == MACH_TYPE_P2001) -#else -# define machine_is_p2001() (0) -#endif - -#ifdef CONFIG_MACH_TWISTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TWISTER -# endif -# define machine_is_twister() (machine_arch_type == MACH_TYPE_TWISTER) -#else -# define machine_is_twister() (0) -#endif - -#ifdef CONFIG_MACH_MUDSHARK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MUDSHARK -# endif -# define machine_is_mudshark() (machine_arch_type == MACH_TYPE_MUDSHARK) -#else -# define machine_is_mudshark() (0) -#endif - -#ifdef CONFIG_MACH_HB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HB2 -# endif -# define machine_is_hb2() (machine_arch_type == MACH_TYPE_HB2) -#else -# define machine_is_hb2() (0) -#endif - -#ifdef CONFIG_MACH_IQ80332 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ80332 -# endif -# define machine_is_iq80332() (machine_arch_type == MACH_TYPE_IQ80332) -#else -# define machine_is_iq80332() (0) -#endif - -#ifdef CONFIG_MACH_SENDT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SENDT -# endif -# define machine_is_sendt() (machine_arch_type == MACH_TYPE_SENDT) -#else -# define machine_is_sendt() (0) -#endif - -#ifdef CONFIG_MACH_MX2JAZZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX2JAZZ -# endif -# define machine_is_mx2jazz() (machine_arch_type == MACH_TYPE_MX2JAZZ) -#else -# define machine_is_mx2jazz() (0) -#endif - -#ifdef CONFIG_MACH_MULTIIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTIIO -# endif -# define machine_is_multiio() (machine_arch_type == MACH_TYPE_MULTIIO) -#else -# define machine_is_multiio() (0) -#endif - -#ifdef CONFIG_MACH_HRDISPLAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HRDISPLAY -# endif -# define machine_is_hrdisplay() (machine_arch_type == MACH_TYPE_HRDISPLAY) -#else -# define machine_is_hrdisplay() (0) -#endif - -#ifdef CONFIG_MACH_MXC27530ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC27530ADS -# endif -# define machine_is_mxc27530ads() (machine_arch_type == MACH_TYPE_MXC27530ADS) -#else -# define machine_is_mxc27530ads() (0) -#endif - -#ifdef CONFIG_MACH_TRIZEPS3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS3 -# endif -# define machine_is_trizeps3() (machine_arch_type == MACH_TYPE_TRIZEPS3) -#else -# define machine_is_trizeps3() (0) -#endif - -#ifdef CONFIG_MACH_ZEFEERDZA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZEFEERDZA -# endif -# define machine_is_zefeerdza() (machine_arch_type == MACH_TYPE_ZEFEERDZA) -#else -# define machine_is_zefeerdza() (0) -#endif - -#ifdef CONFIG_MACH_ZEFEERDZB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZEFEERDZB -# endif -# define machine_is_zefeerdzb() (machine_arch_type == MACH_TYPE_ZEFEERDZB) -#else -# define machine_is_zefeerdzb() (0) -#endif - -#ifdef CONFIG_MACH_ZEFEERDZG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZEFEERDZG -# endif -# define machine_is_zefeerdzg() (machine_arch_type == MACH_TYPE_ZEFEERDZG) -#else -# define machine_is_zefeerdzg() (0) -#endif - -#ifdef CONFIG_MACH_ZEFEERDZN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZEFEERDZN -# endif -# define machine_is_zefeerdzn() (machine_arch_type == MACH_TYPE_ZEFEERDZN) -#else -# define machine_is_zefeerdzn() (0) -#endif - -#ifdef CONFIG_MACH_ZEFEERDZQ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZEFEERDZQ -# endif -# define machine_is_zefeerdzq() (machine_arch_type == MACH_TYPE_ZEFEERDZQ) -#else -# define machine_is_zefeerdzq() (0) -#endif - -#ifdef CONFIG_MACH_GTWX5715 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GTWX5715 -# endif -# define machine_is_gtwx5715() (machine_arch_type == MACH_TYPE_GTWX5715) -#else -# define machine_is_gtwx5715() (0) -#endif - -#ifdef CONFIG_MACH_ASTRO_JACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASTRO_JACK -# endif -# define machine_is_astro_jack() (machine_arch_type == MACH_TYPE_ASTRO_JACK) -#else -# define machine_is_astro_jack() (0) -#endif - -#ifdef CONFIG_MACH_TIP03 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIP03 -# endif -# define machine_is_tip03() (machine_arch_type == MACH_TYPE_TIP03) -#else -# define machine_is_tip03() (0) -#endif - -#ifdef CONFIG_MACH_A9200EC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9200EC -# endif -# define machine_is_a9200ec() (machine_arch_type == MACH_TYPE_A9200EC) -#else -# define machine_is_a9200ec() (0) -#endif - -#ifdef CONFIG_MACH_PNX0105 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX0105 -# endif -# define machine_is_pnx0105() (machine_arch_type == MACH_TYPE_PNX0105) -#else -# define machine_is_pnx0105() (0) -#endif - -#ifdef CONFIG_MACH_ADCPOECPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADCPOECPU -# endif -# define machine_is_adcpoecpu() (machine_arch_type == MACH_TYPE_ADCPOECPU) -#else -# define machine_is_adcpoecpu() (0) -#endif - -#ifdef CONFIG_MACH_CSB637 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB637 -# endif -# define machine_is_csb637() (machine_arch_type == MACH_TYPE_CSB637) -#else -# define machine_is_csb637() (0) -#endif - -#ifdef CONFIG_MACH_MB9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB9200 -# endif -# define machine_is_mb9200() (machine_arch_type == MACH_TYPE_MB9200) -#else -# define machine_is_mb9200() (0) -#endif - -#ifdef CONFIG_MACH_KULUN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KULUN -# endif -# define machine_is_kulun() (machine_arch_type == MACH_TYPE_KULUN) -#else -# define machine_is_kulun() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPER -# endif -# define machine_is_snapper() (machine_arch_type == MACH_TYPE_SNAPPER) -#else -# define machine_is_snapper() (0) -#endif - -#ifdef CONFIG_MACH_OPTIMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPTIMA -# endif -# define machine_is_optima() (machine_arch_type == MACH_TYPE_OPTIMA) -#else -# define machine_is_optima() (0) -#endif - -#ifdef CONFIG_MACH_DLHSBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DLHSBC -# endif -# define machine_is_dlhsbc() (machine_arch_type == MACH_TYPE_DLHSBC) -#else -# define machine_is_dlhsbc() (0) -#endif - -#ifdef CONFIG_MACH_X30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_X30 -# endif -# define machine_is_x30() (machine_arch_type == MACH_TYPE_X30) -#else -# define machine_is_x30() (0) -#endif - -#ifdef CONFIG_MACH_N30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N30 -# endif -# define machine_is_n30() (machine_arch_type == MACH_TYPE_N30) -#else -# define machine_is_n30() (0) -#endif - -#ifdef CONFIG_MACH_MANGA_KS8695 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MANGA_KS8695 -# endif -# define machine_is_manga_ks8695() (machine_arch_type == MACH_TYPE_MANGA_KS8695) -#else -# define machine_is_manga_ks8695() (0) -#endif - -#ifdef CONFIG_MACH_AJAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AJAX -# endif -# define machine_is_ajax() (machine_arch_type == MACH_TYPE_AJAX) -#else -# define machine_is_ajax() (0) -#endif - -#ifdef CONFIG_MACH_NEC_MP900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEC_MP900 -# endif -# define machine_is_nec_mp900() (machine_arch_type == MACH_TYPE_NEC_MP900) -#else -# define machine_is_nec_mp900() (0) -#endif - -#ifdef CONFIG_MACH_VVTK1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VVTK1000 -# endif -# define machine_is_vvtk1000() (machine_arch_type == MACH_TYPE_VVTK1000) -#else -# define machine_is_vvtk1000() (0) -#endif - -#ifdef CONFIG_MACH_KAFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KAFA -# endif -# define machine_is_kafa() (machine_arch_type == MACH_TYPE_KAFA) -#else -# define machine_is_kafa() (0) -#endif - -#ifdef CONFIG_MACH_VVTK3000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VVTK3000 -# endif -# define machine_is_vvtk3000() (machine_arch_type == MACH_TYPE_VVTK3000) -#else -# define machine_is_vvtk3000() (0) -#endif - -#ifdef CONFIG_MACH_PIMX1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PIMX1 -# endif -# define machine_is_pimx1() (machine_arch_type == MACH_TYPE_PIMX1) -#else -# define machine_is_pimx1() (0) -#endif - -#ifdef CONFIG_MACH_OLLIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OLLIE -# endif -# define machine_is_ollie() (machine_arch_type == MACH_TYPE_OLLIE) -#else -# define machine_is_ollie() (0) -#endif - -#ifdef CONFIG_MACH_SKYMAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKYMAX -# endif -# define machine_is_skymax() (machine_arch_type == MACH_TYPE_SKYMAX) -#else -# define machine_is_skymax() (0) -#endif - -#ifdef CONFIG_MACH_JAZZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JAZZ -# endif -# define machine_is_jazz() (machine_arch_type == MACH_TYPE_JAZZ) -#else -# define machine_is_jazz() (0) -#endif - -#ifdef CONFIG_MACH_TEL_T3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEL_T3 -# endif -# define machine_is_tel_t3() (machine_arch_type == MACH_TYPE_TEL_T3) -#else -# define machine_is_tel_t3() (0) -#endif - -#ifdef CONFIG_MACH_AISINO_FCR255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AISINO_FCR255 -# endif -# define machine_is_aisino_fcr255() (machine_arch_type == MACH_TYPE_AISINO_FCR255) -#else -# define machine_is_aisino_fcr255() (0) -#endif - -#ifdef CONFIG_MACH_BTWEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BTWEB -# endif -# define machine_is_btweb() (machine_arch_type == MACH_TYPE_BTWEB) -#else -# define machine_is_btweb() (0) -#endif - -#ifdef CONFIG_MACH_DBG_LH79520 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DBG_LH79520 -# endif -# define machine_is_dbg_lh79520() (machine_arch_type == MACH_TYPE_DBG_LH79520) -#else -# define machine_is_dbg_lh79520() (0) -#endif - -#ifdef CONFIG_MACH_CM41XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM41XX -# endif -# define machine_is_cm41xx() (machine_arch_type == MACH_TYPE_CM41XX) -#else -# define machine_is_cm41xx() (0) -#endif - -#ifdef CONFIG_MACH_TS72XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS72XX -# endif -# define machine_is_ts72xx() (machine_arch_type == MACH_TYPE_TS72XX) -#else -# define machine_is_ts72xx() (0) -#endif - -#ifdef CONFIG_MACH_NGGPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NGGPXA -# endif -# define machine_is_nggpxa() (machine_arch_type == MACH_TYPE_NGGPXA) -#else -# define machine_is_nggpxa() (0) -#endif - -#ifdef CONFIG_MACH_CSB535 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB535 -# endif -# define machine_is_csb535() (machine_arch_type == MACH_TYPE_CSB535) -#else -# define machine_is_csb535() (0) -#endif - -#ifdef CONFIG_MACH_CSB536 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB536 -# endif -# define machine_is_csb536() (machine_arch_type == MACH_TYPE_CSB536) -#else -# define machine_is_csb536() (0) -#endif - -#ifdef CONFIG_MACH_PXA_TRAKPOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_TRAKPOD -# endif -# define machine_is_pxa_trakpod() (machine_arch_type == MACH_TYPE_PXA_TRAKPOD) -#else -# define machine_is_pxa_trakpod() (0) -#endif - -#ifdef CONFIG_MACH_PRAXIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRAXIS -# endif -# define machine_is_praxis() (machine_arch_type == MACH_TYPE_PRAXIS) -#else -# define machine_is_praxis() (0) -#endif - -#ifdef CONFIG_MACH_LH75411 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LH75411 -# endif -# define machine_is_lh75411() (machine_arch_type == MACH_TYPE_LH75411) -#else -# define machine_is_lh75411() (0) -#endif - -#ifdef CONFIG_MACH_OTOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OTOM -# endif -# define machine_is_otom() (machine_arch_type == MACH_TYPE_OTOM) -#else -# define machine_is_otom() (0) -#endif - -#ifdef CONFIG_MACH_NEXCODER_2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXCODER_2440 -# endif -# define machine_is_nexcoder_2440() (machine_arch_type == MACH_TYPE_NEXCODER_2440) -#else -# define machine_is_nexcoder_2440() (0) -#endif - -#ifdef CONFIG_MACH_LOOX410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOOX410 -# endif -# define machine_is_loox410() (machine_arch_type == MACH_TYPE_LOOX410) -#else -# define machine_is_loox410() (0) -#endif - -#ifdef CONFIG_MACH_WESTLAKE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WESTLAKE -# endif -# define machine_is_westlake() (machine_arch_type == MACH_TYPE_WESTLAKE) -#else -# define machine_is_westlake() (0) -#endif - -#ifdef CONFIG_MACH_NSB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSB -# endif -# define machine_is_nsb() (machine_arch_type == MACH_TYPE_NSB) -#else -# define machine_is_nsb() (0) -#endif - -#ifdef CONFIG_MACH_ESL_SARVA_STN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SARVA_STN -# endif -# define machine_is_esl_sarva_stn() (machine_arch_type == MACH_TYPE_ESL_SARVA_STN) -#else -# define machine_is_esl_sarva_stn() (0) -#endif - -#ifdef CONFIG_MACH_ESL_SARVA_TFT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SARVA_TFT -# endif -# define machine_is_esl_sarva_tft() (machine_arch_type == MACH_TYPE_ESL_SARVA_TFT) -#else -# define machine_is_esl_sarva_tft() (0) -#endif - -#ifdef CONFIG_MACH_ESL_SARVA_IAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SARVA_IAD -# endif -# define machine_is_esl_sarva_iad() (machine_arch_type == MACH_TYPE_ESL_SARVA_IAD) -#else -# define machine_is_esl_sarva_iad() (0) -#endif - -#ifdef CONFIG_MACH_ESL_SARVA_ACC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_SARVA_ACC -# endif -# define machine_is_esl_sarva_acc() (machine_arch_type == MACH_TYPE_ESL_SARVA_ACC) -#else -# define machine_is_esl_sarva_acc() (0) -#endif - -#ifdef CONFIG_MACH_TYPHOON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TYPHOON -# endif -# define machine_is_typhoon() (machine_arch_type == MACH_TYPE_TYPHOON) -#else -# define machine_is_typhoon() (0) -#endif - -#ifdef CONFIG_MACH_CNAV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNAV -# endif -# define machine_is_cnav() (machine_arch_type == MACH_TYPE_CNAV) -#else -# define machine_is_cnav() (0) -#endif - -#ifdef CONFIG_MACH_A730 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A730 -# endif -# define machine_is_a730() (machine_arch_type == MACH_TYPE_A730) -#else -# define machine_is_a730() (0) -#endif - -#ifdef CONFIG_MACH_NETSTAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSTAR -# endif -# define machine_is_netstar() (machine_arch_type == MACH_TYPE_NETSTAR) -#else -# define machine_is_netstar() (0) -#endif - -#ifdef CONFIG_MACH_PHASEFALE_SUPERCON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHASEFALE_SUPERCON -# endif -# define machine_is_supercon() (machine_arch_type == MACH_TYPE_PHASEFALE_SUPERCON) -#else -# define machine_is_supercon() (0) -#endif - -#ifdef CONFIG_MACH_SHIVA1100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHIVA1100 -# endif -# define machine_is_shiva1100() (machine_arch_type == MACH_TYPE_SHIVA1100) -#else -# define machine_is_shiva1100() (0) -#endif - -#ifdef CONFIG_MACH_ETEXSC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETEXSC -# endif -# define machine_is_etexsc() (machine_arch_type == MACH_TYPE_ETEXSC) -#else -# define machine_is_etexsc() (0) -#endif - -#ifdef CONFIG_MACH_IXDPG465 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDPG465 -# endif -# define machine_is_ixdpg465() (machine_arch_type == MACH_TYPE_IXDPG465) -#else -# define machine_is_ixdpg465() (0) -#endif - -#ifdef CONFIG_MACH_A9M2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9M2410 -# endif -# define machine_is_a9m2410() (machine_arch_type == MACH_TYPE_A9M2410) -#else -# define machine_is_a9m2410() (0) -#endif - -#ifdef CONFIG_MACH_A9M2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9M2440 -# endif -# define machine_is_a9m2440() (machine_arch_type == MACH_TYPE_A9M2440) -#else -# define machine_is_a9m2440() (0) -#endif - -#ifdef CONFIG_MACH_A9M9750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9M9750 -# endif -# define machine_is_a9m9750() (machine_arch_type == MACH_TYPE_A9M9750) -#else -# define machine_is_a9m9750() (0) -#endif - -#ifdef CONFIG_MACH_A9M9360 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9M9360 -# endif -# define machine_is_a9m9360() (machine_arch_type == MACH_TYPE_A9M9360) -#else -# define machine_is_a9m9360() (0) -#endif - -#ifdef CONFIG_MACH_UNC90 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNC90 -# endif -# define machine_is_unc90() (machine_arch_type == MACH_TYPE_UNC90) -#else -# define machine_is_unc90() (0) -#endif - -#ifdef CONFIG_MACH_ECO920 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECO920 -# endif -# define machine_is_eco920() (machine_arch_type == MACH_TYPE_ECO920) -#else -# define machine_is_eco920() (0) -#endif - -#ifdef CONFIG_MACH_SATVIEW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SATVIEW -# endif -# define machine_is_satview() (machine_arch_type == MACH_TYPE_SATVIEW) -#else -# define machine_is_satview() (0) -#endif - -#ifdef CONFIG_MACH_ROADRUNNER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROADRUNNER -# endif -# define machine_is_roadrunner() (machine_arch_type == MACH_TYPE_ROADRUNNER) -#else -# define machine_is_roadrunner() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200EK -# endif -# define machine_is_at91rm9200ek() (machine_arch_type == MACH_TYPE_AT91RM9200EK) -#else -# define machine_is_at91rm9200ek() (0) -#endif - -#ifdef CONFIG_MACH_GP32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GP32 -# endif -# define machine_is_gp32() (machine_arch_type == MACH_TYPE_GP32) -#else -# define machine_is_gp32() (0) -#endif - -#ifdef CONFIG_MACH_GEM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEM -# endif -# define machine_is_gem() (machine_arch_type == MACH_TYPE_GEM) -#else -# define machine_is_gem() (0) -#endif - -#ifdef CONFIG_MACH_I858 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I858 -# endif -# define machine_is_i858() (machine_arch_type == MACH_TYPE_I858) -#else -# define machine_is_i858() (0) -#endif - -#ifdef CONFIG_MACH_HX2750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HX2750 -# endif -# define machine_is_hx2750() (machine_arch_type == MACH_TYPE_HX2750) -#else -# define machine_is_hx2750() (0) -#endif - -#ifdef CONFIG_MACH_MXC91131EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC91131EVB -# endif -# define machine_is_mxc91131evb() (machine_arch_type == MACH_TYPE_MXC91131EVB) -#else -# define machine_is_mxc91131evb() (0) -#endif - -#ifdef CONFIG_MACH_P700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P700 -# endif -# define machine_is_p700() (machine_arch_type == MACH_TYPE_P700) -#else -# define machine_is_p700() (0) -#endif - -#ifdef CONFIG_MACH_CPE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPE -# endif -# define machine_is_cpe() (machine_arch_type == MACH_TYPE_CPE) -#else -# define machine_is_cpe() (0) -#endif - -#ifdef CONFIG_MACH_SPITZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPITZ -# endif -# define machine_is_spitz() (machine_arch_type == MACH_TYPE_SPITZ) -#else -# define machine_is_spitz() (0) -#endif - -#ifdef CONFIG_MACH_NIMBRA340 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIMBRA340 -# endif -# define machine_is_nimbra340() (machine_arch_type == MACH_TYPE_NIMBRA340) -#else -# define machine_is_nimbra340() (0) -#endif - -#ifdef CONFIG_MACH_LPC22XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC22XX -# endif -# define machine_is_lpc22xx() (machine_arch_type == MACH_TYPE_LPC22XX) -#else -# define machine_is_lpc22xx() (0) -#endif - -#ifdef CONFIG_MACH_COMET3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMET3 -# endif -# define machine_is_omap_comet3() (machine_arch_type == MACH_TYPE_COMET3) -#else -# define machine_is_omap_comet3() (0) -#endif - -#ifdef CONFIG_MACH_COMET4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMET4 -# endif -# define machine_is_omap_comet4() (machine_arch_type == MACH_TYPE_COMET4) -#else -# define machine_is_omap_comet4() (0) -#endif - -#ifdef CONFIG_MACH_CSB625 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB625 -# endif -# define machine_is_csb625() (machine_arch_type == MACH_TYPE_CSB625) -#else -# define machine_is_csb625() (0) -#endif - -#ifdef CONFIG_MACH_FORTUNET2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FORTUNET2 -# endif -# define machine_is_fortunet2() (machine_arch_type == MACH_TYPE_FORTUNET2) -#else -# define machine_is_fortunet2() (0) -#endif - -#ifdef CONFIG_MACH_S5H2200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5H2200 -# endif -# define machine_is_s5h2200() (machine_arch_type == MACH_TYPE_S5H2200) -#else -# define machine_is_s5h2200() (0) -#endif - -#ifdef CONFIG_MACH_OPTORM920 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPTORM920 -# endif -# define machine_is_optorm920() (machine_arch_type == MACH_TYPE_OPTORM920) -#else -# define machine_is_optorm920() (0) -#endif - -#ifdef CONFIG_MACH_ADSBITSYXB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSBITSYXB -# endif -# define machine_is_adsbitsyxb() (machine_arch_type == MACH_TYPE_ADSBITSYXB) -#else -# define machine_is_adsbitsyxb() (0) -#endif - -#ifdef CONFIG_MACH_ADSSPHERE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSSPHERE -# endif -# define machine_is_adssphere() (machine_arch_type == MACH_TYPE_ADSSPHERE) -#else -# define machine_is_adssphere() (0) -#endif - -#ifdef CONFIG_MACH_ADSPORTAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSPORTAL -# endif -# define machine_is_adsportal() (machine_arch_type == MACH_TYPE_ADSPORTAL) -#else -# define machine_is_adsportal() (0) -#endif - -#ifdef CONFIG_MACH_LN2410SBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LN2410SBC -# endif -# define machine_is_ln2410sbc() (machine_arch_type == MACH_TYPE_LN2410SBC) -#else -# define machine_is_ln2410sbc() (0) -#endif - -#ifdef CONFIG_MACH_CB3RUFC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CB3RUFC -# endif -# define machine_is_cb3rufc() (machine_arch_type == MACH_TYPE_CB3RUFC) -#else -# define machine_is_cb3rufc() (0) -#endif - -#ifdef CONFIG_MACH_MP2USB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MP2USB -# endif -# define machine_is_mp2usb() (machine_arch_type == MACH_TYPE_MP2USB) -#else -# define machine_is_mp2usb() (0) -#endif - -#ifdef CONFIG_MACH_NTNP425C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NTNP425C -# endif -# define machine_is_ntnp425c() (machine_arch_type == MACH_TYPE_NTNP425C) -#else -# define machine_is_ntnp425c() (0) -#endif - -#ifdef CONFIG_MACH_COLIBRI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COLIBRI -# endif -# define machine_is_colibri() (machine_arch_type == MACH_TYPE_COLIBRI) -#else -# define machine_is_colibri() (0) -#endif - -#ifdef CONFIG_MACH_PCM7220 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM7220 -# endif -# define machine_is_pcm7220() (machine_arch_type == MACH_TYPE_PCM7220) -#else -# define machine_is_pcm7220() (0) -#endif - -#ifdef CONFIG_MACH_GATEWAY7001 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GATEWAY7001 -# endif -# define machine_is_gateway7001() (machine_arch_type == MACH_TYPE_GATEWAY7001) -#else -# define machine_is_gateway7001() (0) -#endif - -#ifdef CONFIG_MACH_PCM027 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM027 -# endif -# define machine_is_pcm027() (machine_arch_type == MACH_TYPE_PCM027) -#else -# define machine_is_pcm027() (0) -#endif - -#ifdef CONFIG_MACH_CMPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CMPXA -# endif -# define machine_is_cmpxa() (machine_arch_type == MACH_TYPE_CMPXA) -#else -# define machine_is_cmpxa() (0) -#endif - -#ifdef CONFIG_MACH_ANUBIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANUBIS -# endif -# define machine_is_anubis() (machine_arch_type == MACH_TYPE_ANUBIS) -#else -# define machine_is_anubis() (0) -#endif - -#ifdef CONFIG_MACH_ITE8152 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ITE8152 -# endif -# define machine_is_ite8152() (machine_arch_type == MACH_TYPE_ITE8152) -#else -# define machine_is_ite8152() (0) -#endif - -#ifdef CONFIG_MACH_LPC3XXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC3XXX -# endif -# define machine_is_lpc3xxx() (machine_arch_type == MACH_TYPE_LPC3XXX) -#else -# define machine_is_lpc3xxx() (0) -#endif - -#ifdef CONFIG_MACH_PUPPETEER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PUPPETEER -# endif -# define machine_is_puppeteer() (machine_arch_type == MACH_TYPE_PUPPETEER) -#else -# define machine_is_puppeteer() (0) -#endif - -#ifdef CONFIG_MACH_E570 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E570 -# endif -# define machine_is_e570() (machine_arch_type == MACH_TYPE_E570) -#else -# define machine_is_e570() (0) -#endif - -#ifdef CONFIG_MACH_X50 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_X50 -# endif -# define machine_is_x50() (machine_arch_type == MACH_TYPE_X50) -#else -# define machine_is_x50() (0) -#endif - -#ifdef CONFIG_MACH_RECON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RECON -# endif -# define machine_is_recon() (machine_arch_type == MACH_TYPE_RECON) -#else -# define machine_is_recon() (0) -#endif - -#ifdef CONFIG_MACH_XBOARDGP8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XBOARDGP8 -# endif -# define machine_is_xboardgp8() (machine_arch_type == MACH_TYPE_XBOARDGP8) -#else -# define machine_is_xboardgp8() (0) -#endif - -#ifdef CONFIG_MACH_FPIC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FPIC2 -# endif -# define machine_is_fpic2() (machine_arch_type == MACH_TYPE_FPIC2) -#else -# define machine_is_fpic2() (0) -#endif - -#ifdef CONFIG_MACH_AKITA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AKITA -# endif -# define machine_is_akita() (machine_arch_type == MACH_TYPE_AKITA) -#else -# define machine_is_akita() (0) -#endif - -#ifdef CONFIG_MACH_A81 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A81 -# endif -# define machine_is_a81() (machine_arch_type == MACH_TYPE_A81) -#else -# define machine_is_a81() (0) -#endif - -#ifdef CONFIG_MACH_SVM_SC25X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVM_SC25X -# endif -# define machine_is_svm_sc25x() (machine_arch_type == MACH_TYPE_SVM_SC25X) -#else -# define machine_is_svm_sc25x() (0) -#endif - -#ifdef CONFIG_MACH_VADATECH020 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VADATECH020 -# endif -# define machine_is_vt020() (machine_arch_type == MACH_TYPE_VADATECH020) -#else -# define machine_is_vt020() (0) -#endif - -#ifdef CONFIG_MACH_TLI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TLI -# endif -# define machine_is_tli() (machine_arch_type == MACH_TYPE_TLI) -#else -# define machine_is_tli() (0) -#endif - -#ifdef CONFIG_MACH_EDB9315LC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9315LC -# endif -# define machine_is_edb9315lc() (machine_arch_type == MACH_TYPE_EDB9315LC) -#else -# define machine_is_edb9315lc() (0) -#endif - -#ifdef CONFIG_MACH_PASSEC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PASSEC -# endif -# define machine_is_passec() (machine_arch_type == MACH_TYPE_PASSEC) -#else -# define machine_is_passec() (0) -#endif - -#ifdef CONFIG_MACH_DS_TIGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DS_TIGER -# endif -# define machine_is_ds_tiger() (machine_arch_type == MACH_TYPE_DS_TIGER) -#else -# define machine_is_ds_tiger() (0) -#endif - -#ifdef CONFIG_MACH_E310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E310 -# endif -# define machine_is_e310() (machine_arch_type == MACH_TYPE_E310) -#else -# define machine_is_e310() (0) -#endif - -#ifdef CONFIG_MACH_E330 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E330 -# endif -# define machine_is_e330() (machine_arch_type == MACH_TYPE_E330) -#else -# define machine_is_e330() (0) -#endif - -#ifdef CONFIG_MACH_RT3000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RT3000 -# endif -# define machine_is_rt3000() (machine_arch_type == MACH_TYPE_RT3000) -#else -# define machine_is_rt3000() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA770 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA770 -# endif -# define machine_is_nokia770() (machine_arch_type == MACH_TYPE_NOKIA770) -#else -# define machine_is_nokia770() (0) -#endif - -#ifdef CONFIG_MACH_PNX0106 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX0106 -# endif -# define machine_is_pnx0106() (machine_arch_type == MACH_TYPE_PNX0106) -#else -# define machine_is_pnx0106() (0) -#endif - -#ifdef CONFIG_MACH_HX21XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HX21XX -# endif -# define machine_is_hx21xx() (machine_arch_type == MACH_TYPE_HX21XX) -#else -# define machine_is_hx21xx() (0) -#endif - -#ifdef CONFIG_MACH_FARADAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FARADAY -# endif -# define machine_is_faraday() (machine_arch_type == MACH_TYPE_FARADAY) -#else -# define machine_is_faraday() (0) -#endif - -#ifdef CONFIG_MACH_SBC9312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC9312 -# endif -# define machine_is_sbc9312() (machine_arch_type == MACH_TYPE_SBC9312) -#else -# define machine_is_sbc9312() (0) -#endif - -#ifdef CONFIG_MACH_BATMAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BATMAN -# endif -# define machine_is_batman() (machine_arch_type == MACH_TYPE_BATMAN) -#else -# define machine_is_batman() (0) -#endif - -#ifdef CONFIG_MACH_JPD201 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JPD201 -# endif -# define machine_is_jpd201() (machine_arch_type == MACH_TYPE_JPD201) -#else -# define machine_is_jpd201() (0) -#endif - -#ifdef CONFIG_MACH_MIPSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIPSA -# endif -# define machine_is_mipsa() (machine_arch_type == MACH_TYPE_MIPSA) -#else -# define machine_is_mipsa() (0) -#endif - -#ifdef CONFIG_MACH_KACOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KACOM -# endif -# define machine_is_kacom() (machine_arch_type == MACH_TYPE_KACOM) -#else -# define machine_is_kacom() (0) -#endif - -#ifdef CONFIG_MACH_SWARCOCPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWARCOCPU -# endif -# define machine_is_swarcocpu() (machine_arch_type == MACH_TYPE_SWARCOCPU) -#else -# define machine_is_swarcocpu() (0) -#endif - -#ifdef CONFIG_MACH_SWARCODSL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWARCODSL -# endif -# define machine_is_swarcodsl() (machine_arch_type == MACH_TYPE_SWARCODSL) -#else -# define machine_is_swarcodsl() (0) -#endif - -#ifdef CONFIG_MACH_BLUEANGEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUEANGEL -# endif -# define machine_is_blueangel() (machine_arch_type == MACH_TYPE_BLUEANGEL) -#else -# define machine_is_blueangel() (0) -#endif - -#ifdef CONFIG_MACH_HAIRYGRAMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HAIRYGRAMA -# endif -# define machine_is_hairygrama() (machine_arch_type == MACH_TYPE_HAIRYGRAMA) -#else -# define machine_is_hairygrama() (0) -#endif - -#ifdef CONFIG_MACH_BANFF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BANFF -# endif -# define machine_is_banff() (machine_arch_type == MACH_TYPE_BANFF) -#else -# define machine_is_banff() (0) -#endif - -#ifdef CONFIG_MACH_CARMEVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARMEVA -# endif -# define machine_is_carmeva() (machine_arch_type == MACH_TYPE_CARMEVA) -#else -# define machine_is_carmeva() (0) -#endif - -#ifdef CONFIG_MACH_SAM255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAM255 -# endif -# define machine_is_sam255() (machine_arch_type == MACH_TYPE_SAM255) -#else -# define machine_is_sam255() (0) -#endif - -#ifdef CONFIG_MACH_PPM10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PPM10 -# endif -# define machine_is_ppm10() (machine_arch_type == MACH_TYPE_PPM10) -#else -# define machine_is_ppm10() (0) -#endif - -#ifdef CONFIG_MACH_EDB9315A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9315A -# endif -# define machine_is_edb9315a() (machine_arch_type == MACH_TYPE_EDB9315A) -#else -# define machine_is_edb9315a() (0) -#endif - -#ifdef CONFIG_MACH_SUNSET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUNSET -# endif -# define machine_is_sunset() (machine_arch_type == MACH_TYPE_SUNSET) -#else -# define machine_is_sunset() (0) -#endif - -#ifdef CONFIG_MACH_STARGATE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STARGATE2 -# endif -# define machine_is_stargate2() (machine_arch_type == MACH_TYPE_STARGATE2) -#else -# define machine_is_stargate2() (0) -#endif - -#ifdef CONFIG_MACH_INTELMOTE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INTELMOTE2 -# endif -# define machine_is_intelmote2() (machine_arch_type == MACH_TYPE_INTELMOTE2) -#else -# define machine_is_intelmote2() (0) -#endif - -#ifdef CONFIG_MACH_TRIZEPS4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS4 -# endif -# define machine_is_trizeps4() (machine_arch_type == MACH_TYPE_TRIZEPS4) -#else -# define machine_is_trizeps4() (0) -#endif - -#ifdef CONFIG_MACH_MAINSTONE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAINSTONE2 -# endif -# define machine_is_mainstone2() (machine_arch_type == MACH_TYPE_MAINSTONE2) -#else -# define machine_is_mainstone2() (0) -#endif - -#ifdef CONFIG_MACH_EZ_IXP42X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_IXP42X -# endif -# define machine_is_ez_ixp42x() (machine_arch_type == MACH_TYPE_EZ_IXP42X) -#else -# define machine_is_ez_ixp42x() (0) -#endif - -#ifdef CONFIG_MACH_TAPWAVE_ZODIAC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAPWAVE_ZODIAC -# endif -# define machine_is_tapwave_zodiac() (machine_arch_type == MACH_TYPE_TAPWAVE_ZODIAC) -#else -# define machine_is_tapwave_zodiac() (0) -#endif - -#ifdef CONFIG_MACH_UNIVERSALMETER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNIVERSALMETER -# endif -# define machine_is_universalmeter() (machine_arch_type == MACH_TYPE_UNIVERSALMETER) -#else -# define machine_is_universalmeter() (0) -#endif - -#ifdef CONFIG_MACH_HICOARM9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HICOARM9 -# endif -# define machine_is_hicoarm9() (machine_arch_type == MACH_TYPE_HICOARM9) -#else -# define machine_is_hicoarm9() (0) -#endif - -#ifdef CONFIG_MACH_PNX4008 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX4008 -# endif -# define machine_is_pnx4008() (machine_arch_type == MACH_TYPE_PNX4008) -#else -# define machine_is_pnx4008() (0) -#endif - -#ifdef CONFIG_MACH_KWS6000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KWS6000 -# endif -# define machine_is_kws6000() (machine_arch_type == MACH_TYPE_KWS6000) -#else -# define machine_is_kws6000() (0) -#endif - -#ifdef CONFIG_MACH_PORTUX920T -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PORTUX920T -# endif -# define machine_is_portux920t() (machine_arch_type == MACH_TYPE_PORTUX920T) -#else -# define machine_is_portux920t() (0) -#endif - -#ifdef CONFIG_MACH_EZ_X5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_X5 -# endif -# define machine_is_ez_x5() (machine_arch_type == MACH_TYPE_EZ_X5) -#else -# define machine_is_ez_x5() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_RUDOLPH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_RUDOLPH -# endif -# define machine_is_omap_rudolph() (machine_arch_type == MACH_TYPE_OMAP_RUDOLPH) -#else -# define machine_is_omap_rudolph() (0) -#endif - -#ifdef CONFIG_MACH_CPUAT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUAT91 -# endif -# define machine_is_cpuat91() (machine_arch_type == MACH_TYPE_CPUAT91) -#else -# define machine_is_cpuat91() (0) -#endif - -#ifdef CONFIG_MACH_REA9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REA9200 -# endif -# define machine_is_rea9200() (machine_arch_type == MACH_TYPE_REA9200) -#else -# define machine_is_rea9200() (0) -#endif - -#ifdef CONFIG_MACH_ACTS_PUNE_SA1110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTS_PUNE_SA1110 -# endif -# define machine_is_acts_pune_sa1110() (machine_arch_type == MACH_TYPE_ACTS_PUNE_SA1110) -#else -# define machine_is_acts_pune_sa1110() (0) -#endif - -#ifdef CONFIG_MACH_IXP425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP425 -# endif -# define machine_is_ixp425() (machine_arch_type == MACH_TYPE_IXP425) -#else -# define machine_is_ixp425() (0) -#endif - -#ifdef CONFIG_MACH_I30030ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I30030ADS -# endif -# define machine_is_i30030ads() (machine_arch_type == MACH_TYPE_I30030ADS) -#else -# define machine_is_i30030ads() (0) -#endif - -#ifdef CONFIG_MACH_PERCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PERCH -# endif -# define machine_is_perch() (machine_arch_type == MACH_TYPE_PERCH) -#else -# define machine_is_perch() (0) -#endif - -#ifdef CONFIG_MACH_EIS05R1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EIS05R1 -# endif -# define machine_is_eis05r1() (machine_arch_type == MACH_TYPE_EIS05R1) -#else -# define machine_is_eis05r1() (0) -#endif - -#ifdef CONFIG_MACH_PEPPERPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PEPPERPAD -# endif -# define machine_is_pepperpad() (machine_arch_type == MACH_TYPE_PEPPERPAD) -#else -# define machine_is_pepperpad() (0) -#endif - -#ifdef CONFIG_MACH_SB3010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SB3010 -# endif -# define machine_is_sb3010() (machine_arch_type == MACH_TYPE_SB3010) -#else -# define machine_is_sb3010() (0) -#endif - -#ifdef CONFIG_MACH_RM9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RM9200 -# endif -# define machine_is_rm9200() (machine_arch_type == MACH_TYPE_RM9200) -#else -# define machine_is_rm9200() (0) -#endif - -#ifdef CONFIG_MACH_DMA03 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DMA03 -# endif -# define machine_is_dma03() (machine_arch_type == MACH_TYPE_DMA03) -#else -# define machine_is_dma03() (0) -#endif - -#ifdef CONFIG_MACH_ROAD_S101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROAD_S101 -# endif -# define machine_is_road_s101() (machine_arch_type == MACH_TYPE_ROAD_S101) -#else -# define machine_is_road_s101() (0) -#endif - -#ifdef CONFIG_MACH_IQ81340SC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ81340SC -# endif -# define machine_is_iq81340sc() (machine_arch_type == MACH_TYPE_IQ81340SC) -#else -# define machine_is_iq81340sc() (0) -#endif - -#ifdef CONFIG_MACH_IQ_NEXTGEN_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_B -# endif -# define machine_is_iq_nextgen_b() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_B) -#else -# define machine_is_iq_nextgen_b() (0) -#endif - -#ifdef CONFIG_MACH_IQ81340MC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ81340MC -# endif -# define machine_is_iq81340mc() (machine_arch_type == MACH_TYPE_IQ81340MC) -#else -# define machine_is_iq81340mc() (0) -#endif - -#ifdef CONFIG_MACH_IQ_NEXTGEN_D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_D -# endif -# define machine_is_iq_nextgen_d() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_D) -#else -# define machine_is_iq_nextgen_d() (0) -#endif - -#ifdef CONFIG_MACH_IQ_NEXTGEN_E -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_E -# endif -# define machine_is_iq_nextgen_e() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_E) -#else -# define machine_is_iq_nextgen_e() (0) -#endif - -#ifdef CONFIG_MACH_MALLOW_AT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MALLOW_AT91 -# endif -# define machine_is_mallow_at91() (machine_arch_type == MACH_TYPE_MALLOW_AT91) -#else -# define machine_is_mallow_at91() (0) -#endif - -#ifdef CONFIG_MACH_CYBERTRACKER_I -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBERTRACKER_I -# endif -# define machine_is_cybertracker_i() (machine_arch_type == MACH_TYPE_CYBERTRACKER_I) -#else -# define machine_is_cybertracker_i() (0) -#endif - -#ifdef CONFIG_MACH_GESBC931X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GESBC931X -# endif -# define machine_is_gesbc931x() (machine_arch_type == MACH_TYPE_GESBC931X) -#else -# define machine_is_gesbc931x() (0) -#endif - -#ifdef CONFIG_MACH_CENTIPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CENTIPAD -# endif -# define machine_is_centipad() (machine_arch_type == MACH_TYPE_CENTIPAD) -#else -# define machine_is_centipad() (0) -#endif - -#ifdef CONFIG_MACH_ARMSOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMSOC -# endif -# define machine_is_armsoc() (machine_arch_type == MACH_TYPE_ARMSOC) -#else -# define machine_is_armsoc() (0) -#endif - -#ifdef CONFIG_MACH_SE4200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SE4200 -# endif -# define machine_is_se4200() (machine_arch_type == MACH_TYPE_SE4200) -#else -# define machine_is_se4200() (0) -#endif - -#ifdef CONFIG_MACH_EMS197A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMS197A -# endif -# define machine_is_ems197a() (machine_arch_type == MACH_TYPE_EMS197A) -#else -# define machine_is_ems197a() (0) -#endif - -#ifdef CONFIG_MACH_MICRO9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICRO9 -# endif -# define machine_is_micro9() (machine_arch_type == MACH_TYPE_MICRO9) -#else -# define machine_is_micro9() (0) -#endif - -#ifdef CONFIG_MACH_MICRO9L -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICRO9L -# endif -# define machine_is_micro9l() (machine_arch_type == MACH_TYPE_MICRO9L) -#else -# define machine_is_micro9l() (0) -#endif - -#ifdef CONFIG_MACH_UC5471DSP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UC5471DSP -# endif -# define machine_is_uc5471dsp() (machine_arch_type == MACH_TYPE_UC5471DSP) -#else -# define machine_is_uc5471dsp() (0) -#endif - -#ifdef CONFIG_MACH_SJ5471ENG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SJ5471ENG -# endif -# define machine_is_sj5471eng() (machine_arch_type == MACH_TYPE_SJ5471ENG) -#else -# define machine_is_sj5471eng() (0) -#endif - -#ifdef CONFIG_MACH_CMPXA26X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CMPXA26X -# endif -# define machine_is_none() (machine_arch_type == MACH_TYPE_CMPXA26X) -#else -# define machine_is_none() (0) -#endif - -#ifdef CONFIG_MACH_NC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NC -# endif -# define machine_is_nc1() (machine_arch_type == MACH_TYPE_NC) -#else -# define machine_is_nc1() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PALMTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PALMTE -# endif -# define machine_is_omap_palmte() (machine_arch_type == MACH_TYPE_OMAP_PALMTE) -#else -# define machine_is_omap_palmte() (0) -#endif - -#ifdef CONFIG_MACH_AJAX52X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AJAX52X -# endif -# define machine_is_ajax52x() (machine_arch_type == MACH_TYPE_AJAX52X) -#else -# define machine_is_ajax52x() (0) -#endif - -#ifdef CONFIG_MACH_SIRIUSTAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIRIUSTAR -# endif -# define machine_is_siriustar() (machine_arch_type == MACH_TYPE_SIRIUSTAR) -#else -# define machine_is_siriustar() (0) -#endif - -#ifdef CONFIG_MACH_IODATA_HDLG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IODATA_HDLG -# endif -# define machine_is_iodata_hdlg() (machine_arch_type == MACH_TYPE_IODATA_HDLG) -#else -# define machine_is_iodata_hdlg() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200UTL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200UTL -# endif -# define machine_is_at91rm9200utl() (machine_arch_type == MACH_TYPE_AT91RM9200UTL) -#else -# define machine_is_at91rm9200utl() (0) -#endif - -#ifdef CONFIG_MACH_BIOSAFE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIOSAFE -# endif -# define machine_is_biosafe() (machine_arch_type == MACH_TYPE_BIOSAFE) -#else -# define machine_is_biosafe() (0) -#endif - -#ifdef CONFIG_MACH_MP1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MP1000 -# endif -# define machine_is_mp1000() (machine_arch_type == MACH_TYPE_MP1000) -#else -# define machine_is_mp1000() (0) -#endif - -#ifdef CONFIG_MACH_PARSY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PARSY -# endif -# define machine_is_parsy() (machine_arch_type == MACH_TYPE_PARSY) -#else -# define machine_is_parsy() (0) -#endif - -#ifdef CONFIG_MACH_CCXP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCXP -# endif -# define machine_is_ccxp270() (machine_arch_type == MACH_TYPE_CCXP) -#else -# define machine_is_ccxp270() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_GSAMPLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_GSAMPLE -# endif -# define machine_is_omap_gsample() (machine_arch_type == MACH_TYPE_OMAP_GSAMPLE) -#else -# define machine_is_omap_gsample() (0) -#endif - -#ifdef CONFIG_MACH_REALVIEW_EB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REALVIEW_EB -# endif -# define machine_is_realview_eb() (machine_arch_type == MACH_TYPE_REALVIEW_EB) -#else -# define machine_is_realview_eb() (0) -#endif - -#ifdef CONFIG_MACH_SAMOA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAMOA -# endif -# define machine_is_samoa() (machine_arch_type == MACH_TYPE_SAMOA) -#else -# define machine_is_samoa() (0) -#endif - -#ifdef CONFIG_MACH_PALMT3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMT3 -# endif -# define machine_is_palmt3() (machine_arch_type == MACH_TYPE_PALMT3) -#else -# define machine_is_palmt3() (0) -#endif - -#ifdef CONFIG_MACH_I878 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I878 -# endif -# define machine_is_i878() (machine_arch_type == MACH_TYPE_I878) -#else -# define machine_is_i878() (0) -#endif - -#ifdef CONFIG_MACH_BORZOI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BORZOI -# endif -# define machine_is_borzoi() (machine_arch_type == MACH_TYPE_BORZOI) -#else -# define machine_is_borzoi() (0) -#endif - -#ifdef CONFIG_MACH_GECKO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GECKO -# endif -# define machine_is_gecko() (machine_arch_type == MACH_TYPE_GECKO) -#else -# define machine_is_gecko() (0) -#endif - -#ifdef CONFIG_MACH_DS101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DS101 -# endif -# define machine_is_ds101() (machine_arch_type == MACH_TYPE_DS101) -#else -# define machine_is_ds101() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PALMTT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PALMTT2 -# endif -# define machine_is_omap_palmtt2() (machine_arch_type == MACH_TYPE_OMAP_PALMTT2) -#else -# define machine_is_omap_palmtt2() (0) -#endif - -#ifdef CONFIG_MACH_PALMLD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMLD -# endif -# define machine_is_palmld() (machine_arch_type == MACH_TYPE_PALMLD) -#else -# define machine_is_palmld() (0) -#endif - -#ifdef CONFIG_MACH_CC9C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9C -# endif -# define machine_is_cc9c() (machine_arch_type == MACH_TYPE_CC9C) -#else -# define machine_is_cc9c() (0) -#endif - -#ifdef CONFIG_MACH_SBC1670 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC1670 -# endif -# define machine_is_sbc1670() (machine_arch_type == MACH_TYPE_SBC1670) -#else -# define machine_is_sbc1670() (0) -#endif - -#ifdef CONFIG_MACH_IXDP28X5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP28X5 -# endif -# define machine_is_ixdp28x5() (machine_arch_type == MACH_TYPE_IXDP28X5) -#else -# define machine_is_ixdp28x5() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PALMTT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PALMTT -# endif -# define machine_is_omap_palmtt() (machine_arch_type == MACH_TYPE_OMAP_PALMTT) -#else -# define machine_is_omap_palmtt() (0) -#endif - -#ifdef CONFIG_MACH_ML696K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ML696K -# endif -# define machine_is_ml696k() (machine_arch_type == MACH_TYPE_ML696K) -#else -# define machine_is_ml696k() (0) -#endif - -#ifdef CONFIG_MACH_ARCOM_ZEUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCOM_ZEUS -# endif -# define machine_is_arcom_zeus() (machine_arch_type == MACH_TYPE_ARCOM_ZEUS) -#else -# define machine_is_arcom_zeus() (0) -#endif - -#ifdef CONFIG_MACH_OSIRIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OSIRIS -# endif -# define machine_is_osiris() (machine_arch_type == MACH_TYPE_OSIRIS) -#else -# define machine_is_osiris() (0) -#endif - -#ifdef CONFIG_MACH_MAESTRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAESTRO -# endif -# define machine_is_maestro() (machine_arch_type == MACH_TYPE_MAESTRO) -#else -# define machine_is_maestro() (0) -#endif - -#ifdef CONFIG_MACH_PALMTE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMTE2 -# endif -# define machine_is_palmte2() (machine_arch_type == MACH_TYPE_PALMTE2) -#else -# define machine_is_palmte2() (0) -#endif - -#ifdef CONFIG_MACH_IXBBM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXBBM -# endif -# define machine_is_ixbbm() (machine_arch_type == MACH_TYPE_IXBBM) -#else -# define machine_is_ixbbm() (0) -#endif - -#ifdef CONFIG_MACH_MX27ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27ADS -# endif -# define machine_is_mx27ads() (machine_arch_type == MACH_TYPE_MX27ADS) -#else -# define machine_is_mx27ads() (0) -#endif - -#ifdef CONFIG_MACH_AX8004 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AX8004 -# endif -# define machine_is_ax8004() (machine_arch_type == MACH_TYPE_AX8004) -#else -# define machine_is_ax8004() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9261EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9261EK -# endif -# define machine_is_at91sam9261ek() (machine_arch_type == MACH_TYPE_AT91SAM9261EK) -#else -# define machine_is_at91sam9261ek() (0) -#endif - -#ifdef CONFIG_MACH_LOFT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOFT -# endif -# define machine_is_loft() (machine_arch_type == MACH_TYPE_LOFT) -#else -# define machine_is_loft() (0) -#endif - -#ifdef CONFIG_MACH_MAGPIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGPIE -# endif -# define machine_is_magpie() (machine_arch_type == MACH_TYPE_MAGPIE) -#else -# define machine_is_magpie() (0) -#endif - -#ifdef CONFIG_MACH_MX21ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX21ADS -# endif -# define machine_is_mx21ads() (machine_arch_type == MACH_TYPE_MX21ADS) -#else -# define machine_is_mx21ads() (0) -#endif - -#ifdef CONFIG_MACH_MB87M3400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB87M3400 -# endif -# define machine_is_mb87m3400() (machine_arch_type == MACH_TYPE_MB87M3400) -#else -# define machine_is_mb87m3400() (0) -#endif - -#ifdef CONFIG_MACH_MGUARD_DELTA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MGUARD_DELTA -# endif -# define machine_is_mguard_delta() (machine_arch_type == MACH_TYPE_MGUARD_DELTA) -#else -# define machine_is_mguard_delta() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DVDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DVDP -# endif -# define machine_is_davinci_dvdp() (machine_arch_type == MACH_TYPE_DAVINCI_DVDP) -#else -# define machine_is_davinci_dvdp() (0) -#endif - -#ifdef CONFIG_MACH_HTCUNIVERSAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCUNIVERSAL -# endif -# define machine_is_htcuniversal() (machine_arch_type == MACH_TYPE_HTCUNIVERSAL) -#else -# define machine_is_htcuniversal() (0) -#endif - -#ifdef CONFIG_MACH_TPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPAD -# endif -# define machine_is_tpad() (machine_arch_type == MACH_TYPE_TPAD) -#else -# define machine_is_tpad() (0) -#endif - -#ifdef CONFIG_MACH_ROVERP3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERP3 -# endif -# define machine_is_roverp3() (machine_arch_type == MACH_TYPE_ROVERP3) -#else -# define machine_is_roverp3() (0) -#endif - -#ifdef CONFIG_MACH_JORNADA928 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JORNADA928 -# endif -# define machine_is_jornada928() (machine_arch_type == MACH_TYPE_JORNADA928) -#else -# define machine_is_jornada928() (0) -#endif - -#ifdef CONFIG_MACH_MV88FXX81 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV88FXX81 -# endif -# define machine_is_mv88fxx81() (machine_arch_type == MACH_TYPE_MV88FXX81) -#else -# define machine_is_mv88fxx81() (0) -#endif - -#ifdef CONFIG_MACH_STMP36XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STMP36XX -# endif -# define machine_is_stmp36xx() (machine_arch_type == MACH_TYPE_STMP36XX) -#else -# define machine_is_stmp36xx() (0) -#endif - -#ifdef CONFIG_MACH_SXNI79524 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SXNI79524 -# endif -# define machine_is_sxni79524() (machine_arch_type == MACH_TYPE_SXNI79524) -#else -# define machine_is_sxni79524() (0) -#endif - -#ifdef CONFIG_MACH_AMS_DELTA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AMS_DELTA -# endif -# define machine_is_ams_delta() (machine_arch_type == MACH_TYPE_AMS_DELTA) -#else -# define machine_is_ams_delta() (0) -#endif - -#ifdef CONFIG_MACH_URANIUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_URANIUM -# endif -# define machine_is_uranium() (machine_arch_type == MACH_TYPE_URANIUM) -#else -# define machine_is_uranium() (0) -#endif - -#ifdef CONFIG_MACH_UCON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UCON -# endif -# define machine_is_ucon() (machine_arch_type == MACH_TYPE_UCON) -#else -# define machine_is_ucon() (0) -#endif - -#ifdef CONFIG_MACH_NAS100D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAS100D -# endif -# define machine_is_nas100d() (machine_arch_type == MACH_TYPE_NAS100D) -#else -# define machine_is_nas100d() (0) -#endif - -#ifdef CONFIG_MACH_L083_1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_L083_1000 -# endif -# define machine_is_l083() (machine_arch_type == MACH_TYPE_L083_1000) -#else -# define machine_is_l083() (0) -#endif - -#ifdef CONFIG_MACH_EZX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX -# endif -# define machine_is_ezx() (machine_arch_type == MACH_TYPE_EZX) -#else -# define machine_is_ezx() (0) -#endif - -#ifdef CONFIG_MACH_PNX5220 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX5220 -# endif -# define machine_is_pnx5220() (machine_arch_type == MACH_TYPE_PNX5220) -#else -# define machine_is_pnx5220() (0) -#endif - -#ifdef CONFIG_MACH_BUTTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUTTE -# endif -# define machine_is_butte() (machine_arch_type == MACH_TYPE_BUTTE) -#else -# define machine_is_butte() (0) -#endif - -#ifdef CONFIG_MACH_SRM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SRM2 -# endif -# define machine_is_srm2() (machine_arch_type == MACH_TYPE_SRM2) -#else -# define machine_is_srm2() (0) -#endif - -#ifdef CONFIG_MACH_DSBR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSBR -# endif -# define machine_is_dsbr() (machine_arch_type == MACH_TYPE_DSBR) -#else -# define machine_is_dsbr() (0) -#endif - -#ifdef CONFIG_MACH_CRYSTALBALL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CRYSTALBALL -# endif -# define machine_is_crystalball() (machine_arch_type == MACH_TYPE_CRYSTALBALL) -#else -# define machine_is_crystalball() (0) -#endif - -#ifdef CONFIG_MACH_TINYPXA27X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TINYPXA27X -# endif -# define machine_is_tinypxa27x() (machine_arch_type == MACH_TYPE_TINYPXA27X) -#else -# define machine_is_tinypxa27x() (0) -#endif - -#ifdef CONFIG_MACH_HERBIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERBIE -# endif -# define machine_is_herbie() (machine_arch_type == MACH_TYPE_HERBIE) -#else -# define machine_is_herbie() (0) -#endif - -#ifdef CONFIG_MACH_MAGICIAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGICIAN -# endif -# define machine_is_magician() (machine_arch_type == MACH_TYPE_MAGICIAN) -#else -# define machine_is_magician() (0) -#endif - -#ifdef CONFIG_MACH_CM4002 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM4002 -# endif -# define machine_is_cm4002() (machine_arch_type == MACH_TYPE_CM4002) -#else -# define machine_is_cm4002() (0) -#endif - -#ifdef CONFIG_MACH_B4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_B4 -# endif -# define machine_is_b4() (machine_arch_type == MACH_TYPE_B4) -#else -# define machine_is_b4() (0) -#endif - -#ifdef CONFIG_MACH_MAUI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAUI -# endif -# define machine_is_maui() (machine_arch_type == MACH_TYPE_MAUI) -#else -# define machine_is_maui() (0) -#endif - -#ifdef CONFIG_MACH_CYBERTRACKER_G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBERTRACKER_G -# endif -# define machine_is_cybertracker_g() (machine_arch_type == MACH_TYPE_CYBERTRACKER_G) -#else -# define machine_is_cybertracker_g() (0) -#endif - -#ifdef CONFIG_MACH_NXDKN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXDKN -# endif -# define machine_is_nxdkn() (machine_arch_type == MACH_TYPE_NXDKN) -#else -# define machine_is_nxdkn() (0) -#endif - -#ifdef CONFIG_MACH_MIO8390 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIO8390 -# endif -# define machine_is_mio8390() (machine_arch_type == MACH_TYPE_MIO8390) -#else -# define machine_is_mio8390() (0) -#endif - -#ifdef CONFIG_MACH_OMI_BOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMI_BOARD -# endif -# define machine_is_omi_board() (machine_arch_type == MACH_TYPE_OMI_BOARD) -#else -# define machine_is_omi_board() (0) -#endif - -#ifdef CONFIG_MACH_MX21CIV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX21CIV -# endif -# define machine_is_mx21civ() (machine_arch_type == MACH_TYPE_MX21CIV) -#else -# define machine_is_mx21civ() (0) -#endif - -#ifdef CONFIG_MACH_MAHI_CDAC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAHI_CDAC -# endif -# define machine_is_mahi_cdac() (machine_arch_type == MACH_TYPE_MAHI_CDAC) -#else -# define machine_is_mahi_cdac() (0) -#endif - -#ifdef CONFIG_MACH_PALMTX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMTX -# endif -# define machine_is_palmtx() (machine_arch_type == MACH_TYPE_PALMTX) -#else -# define machine_is_palmtx() (0) -#endif - -#ifdef CONFIG_MACH_S3C2413 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2413 -# endif -# define machine_is_s3c2413() (machine_arch_type == MACH_TYPE_S3C2413) -#else -# define machine_is_s3c2413() (0) -#endif - -#ifdef CONFIG_MACH_SAMSYS_EP0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAMSYS_EP0 -# endif -# define machine_is_samsys_ep0() (machine_arch_type == MACH_TYPE_SAMSYS_EP0) -#else -# define machine_is_samsys_ep0() (0) -#endif - -#ifdef CONFIG_MACH_WG302V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WG302V1 -# endif -# define machine_is_wg302v1() (machine_arch_type == MACH_TYPE_WG302V1) -#else -# define machine_is_wg302v1() (0) -#endif - -#ifdef CONFIG_MACH_WG302V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WG302V2 -# endif -# define machine_is_wg302v2() (machine_arch_type == MACH_TYPE_WG302V2) -#else -# define machine_is_wg302v2() (0) -#endif - -#ifdef CONFIG_MACH_EB42X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EB42X -# endif -# define machine_is_eb42x() (machine_arch_type == MACH_TYPE_EB42X) -#else -# define machine_is_eb42x() (0) -#endif - -#ifdef CONFIG_MACH_IQ331ES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IQ331ES -# endif -# define machine_is_iq331es() (machine_arch_type == MACH_TYPE_IQ331ES) -#else -# define machine_is_iq331es() (0) -#endif - -#ifdef CONFIG_MACH_COSYDSP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COSYDSP -# endif -# define machine_is_cosydsp() (machine_arch_type == MACH_TYPE_COSYDSP) -#else -# define machine_is_cosydsp() (0) -#endif - -#ifdef CONFIG_MACH_UPLAT7D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UPLAT7D -# endif -# define machine_is_uplat7d_proto() (machine_arch_type == MACH_TYPE_UPLAT7D) -#else -# define machine_is_uplat7d_proto() (0) -#endif - -#ifdef CONFIG_MACH_PTDAVINCI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PTDAVINCI -# endif -# define machine_is_ptdavinci() (machine_arch_type == MACH_TYPE_PTDAVINCI) -#else -# define machine_is_ptdavinci() (0) -#endif - -#ifdef CONFIG_MACH_MBUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MBUS -# endif -# define machine_is_mbus() (machine_arch_type == MACH_TYPE_MBUS) -#else -# define machine_is_mbus() (0) -#endif - -#ifdef CONFIG_MACH_NADIA2VB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NADIA2VB -# endif -# define machine_is_nadia2vb() (machine_arch_type == MACH_TYPE_NADIA2VB) -#else -# define machine_is_nadia2vb() (0) -#endif - -#ifdef CONFIG_MACH_R1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_R1000 -# endif -# define machine_is_r1000() (machine_arch_type == MACH_TYPE_R1000) -#else -# define machine_is_r1000() (0) -#endif - -#ifdef CONFIG_MACH_HW90250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW90250 -# endif -# define machine_is_hw90250() (machine_arch_type == MACH_TYPE_HW90250) -#else -# define machine_is_hw90250() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_2430SDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_2430SDP -# endif -# define machine_is_omap_2430sdp() (machine_arch_type == MACH_TYPE_OMAP_2430SDP) -#else -# define machine_is_omap_2430sdp() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_EVM -# endif -# define machine_is_davinci_evm() (machine_arch_type == MACH_TYPE_DAVINCI_EVM) -#else -# define machine_is_davinci_evm() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_TORNADO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_TORNADO -# endif -# define machine_is_omap_tornado() (machine_arch_type == MACH_TYPE_OMAP_TORNADO) -#else -# define machine_is_omap_tornado() (0) -#endif - -#ifdef CONFIG_MACH_OLOCREEK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OLOCREEK -# endif -# define machine_is_olocreek() (machine_arch_type == MACH_TYPE_OLOCREEK) -#else -# define machine_is_olocreek() (0) -#endif - -#ifdef CONFIG_MACH_PALMZ72 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMZ72 -# endif -# define machine_is_palmz72() (machine_arch_type == MACH_TYPE_PALMZ72) -#else -# define machine_is_palmz72() (0) -#endif - -#ifdef CONFIG_MACH_NXDB500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXDB500 -# endif -# define machine_is_nxdb500() (machine_arch_type == MACH_TYPE_NXDB500) -#else -# define machine_is_nxdb500() (0) -#endif - -#ifdef CONFIG_MACH_APF9328 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APF9328 -# endif -# define machine_is_apf9328() (machine_arch_type == MACH_TYPE_APF9328) -#else -# define machine_is_apf9328() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_WIPOQ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_WIPOQ -# endif -# define machine_is_omap_wipoq() (machine_arch_type == MACH_TYPE_OMAP_WIPOQ) -#else -# define machine_is_omap_wipoq() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_TWIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_TWIP -# endif -# define machine_is_omap_twip() (machine_arch_type == MACH_TYPE_OMAP_TWIP) -#else -# define machine_is_omap_twip() (0) -#endif - -#ifdef CONFIG_MACH_TREO650 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO650 -# endif -# define machine_is_treo650() (machine_arch_type == MACH_TYPE_TREO650) -#else -# define machine_is_treo650() (0) -#endif - -#ifdef CONFIG_MACH_ACUMEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACUMEN -# endif -# define machine_is_acumen() (machine_arch_type == MACH_TYPE_ACUMEN) -#else -# define machine_is_acumen() (0) -#endif - -#ifdef CONFIG_MACH_XP100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XP100 -# endif -# define machine_is_xp100() (machine_arch_type == MACH_TYPE_XP100) -#else -# define machine_is_xp100() (0) -#endif - -#ifdef CONFIG_MACH_FS2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FS2410 -# endif -# define machine_is_fs2410() (machine_arch_type == MACH_TYPE_FS2410) -#else -# define machine_is_fs2410() (0) -#endif - -#ifdef CONFIG_MACH_PXA270_CERF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA270_CERF -# endif -# define machine_is_pxa270_cerf() (machine_arch_type == MACH_TYPE_PXA270_CERF) -#else -# define machine_is_pxa270_cerf() (0) -#endif - -#ifdef CONFIG_MACH_SQ2FTLPALM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SQ2FTLPALM -# endif -# define machine_is_sq2ftlpalm() (machine_arch_type == MACH_TYPE_SQ2FTLPALM) -#else -# define machine_is_sq2ftlpalm() (0) -#endif - -#ifdef CONFIG_MACH_BSEMSERVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BSEMSERVER -# endif -# define machine_is_bsemserver() (machine_arch_type == MACH_TYPE_BSEMSERVER) -#else -# define machine_is_bsemserver() (0) -#endif - -#ifdef CONFIG_MACH_NETCLIENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETCLIENT -# endif -# define machine_is_netclient() (machine_arch_type == MACH_TYPE_NETCLIENT) -#else -# define machine_is_netclient() (0) -#endif - -#ifdef CONFIG_MACH_PALMT5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMT5 -# endif -# define machine_is_palmt5() (machine_arch_type == MACH_TYPE_PALMT5) -#else -# define machine_is_palmt5() (0) -#endif - -#ifdef CONFIG_MACH_PALMTC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMTC -# endif -# define machine_is_palmtc() (machine_arch_type == MACH_TYPE_PALMTC) -#else -# define machine_is_palmtc() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_APOLLON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_APOLLON -# endif -# define machine_is_omap_apollon() (machine_arch_type == MACH_TYPE_OMAP_APOLLON) -#else -# define machine_is_omap_apollon() (0) -#endif - -#ifdef CONFIG_MACH_MXC30030EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC30030EVB -# endif -# define machine_is_mxc30030evb() (machine_arch_type == MACH_TYPE_MXC30030EVB) -#else -# define machine_is_mxc30030evb() (0) -#endif - -#ifdef CONFIG_MACH_REA_2D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REA_2D -# endif -# define machine_is_rea_cpu2() (machine_arch_type == MACH_TYPE_REA_2D) -#else -# define machine_is_rea_cpu2() (0) -#endif - -#ifdef CONFIG_MACH_TI3E524 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TI3E524 -# endif -# define machine_is_eti3e524() (machine_arch_type == MACH_TYPE_TI3E524) -#else -# define machine_is_eti3e524() (0) -#endif - -#ifdef CONFIG_MACH_ATEB9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATEB9200 -# endif -# define machine_is_ateb9200() (machine_arch_type == MACH_TYPE_ATEB9200) -#else -# define machine_is_ateb9200() (0) -#endif - -#ifdef CONFIG_MACH_AUCKLAND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AUCKLAND -# endif -# define machine_is_auckland() (machine_arch_type == MACH_TYPE_AUCKLAND) -#else -# define machine_is_auckland() (0) -#endif - -#ifdef CONFIG_MACH_AK3320M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AK3320M -# endif -# define machine_is_ak3220m() (machine_arch_type == MACH_TYPE_AK3320M) -#else -# define machine_is_ak3220m() (0) -#endif - -#ifdef CONFIG_MACH_DURAMAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DURAMAX -# endif -# define machine_is_duramax() (machine_arch_type == MACH_TYPE_DURAMAX) -#else -# define machine_is_duramax() (0) -#endif - -#ifdef CONFIG_MACH_N35 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N35 -# endif -# define machine_is_n35() (machine_arch_type == MACH_TYPE_N35) -#else -# define machine_is_n35() (0) -#endif - -#ifdef CONFIG_MACH_PRONGHORN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRONGHORN -# endif -# define machine_is_pronghorn() (machine_arch_type == MACH_TYPE_PRONGHORN) -#else -# define machine_is_pronghorn() (0) -#endif - -#ifdef CONFIG_MACH_FUNDY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUNDY -# endif -# define machine_is_fundy() (machine_arch_type == MACH_TYPE_FUNDY) -#else -# define machine_is_fundy() (0) -#endif - -#ifdef CONFIG_MACH_LOGICPD_PXA270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOGICPD_PXA270 -# endif -# define machine_is_logicpd_pxa270() (machine_arch_type == MACH_TYPE_LOGICPD_PXA270) -#else -# define machine_is_logicpd_pxa270() (0) -#endif - -#ifdef CONFIG_MACH_CPU777 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPU777 -# endif -# define machine_is_cpu777() (machine_arch_type == MACH_TYPE_CPU777) -#else -# define machine_is_cpu777() (0) -#endif - -#ifdef CONFIG_MACH_SIMICON9201 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMICON9201 -# endif -# define machine_is_simicon9201() (machine_arch_type == MACH_TYPE_SIMICON9201) -#else -# define machine_is_simicon9201() (0) -#endif - -#ifdef CONFIG_MACH_LEAP2_HPM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEAP2_HPM -# endif -# define machine_is_leap2_hpm() (machine_arch_type == MACH_TYPE_LEAP2_HPM) -#else -# define machine_is_leap2_hpm() (0) -#endif - -#ifdef CONFIG_MACH_CM922TXA10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM922TXA10 -# endif -# define machine_is_cm922txa10() (machine_arch_type == MACH_TYPE_CM922TXA10) -#else -# define machine_is_cm922txa10() (0) -#endif - -#ifdef CONFIG_MACH_PXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA -# endif -# define machine_is_sandgate() (machine_arch_type == MACH_TYPE_PXA) -#else -# define machine_is_sandgate() (0) -#endif - -#ifdef CONFIG_MACH_SANDGATE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDGATE2 -# endif -# define machine_is_sandgate2() (machine_arch_type == MACH_TYPE_SANDGATE2) -#else -# define machine_is_sandgate2() (0) -#endif - -#ifdef CONFIG_MACH_SANDGATE2G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDGATE2G -# endif -# define machine_is_sandgate2g() (machine_arch_type == MACH_TYPE_SANDGATE2G) -#else -# define machine_is_sandgate2g() (0) -#endif - -#ifdef CONFIG_MACH_SANDGATE2P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDGATE2P -# endif -# define machine_is_sandgate2p() (machine_arch_type == MACH_TYPE_SANDGATE2P) -#else -# define machine_is_sandgate2p() (0) -#endif - -#ifdef CONFIG_MACH_FRED_JACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FRED_JACK -# endif -# define machine_is_fred_jack() (machine_arch_type == MACH_TYPE_FRED_JACK) -#else -# define machine_is_fred_jack() (0) -#endif - -#ifdef CONFIG_MACH_TTG_COLOR1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TTG_COLOR1 -# endif -# define machine_is_ttg_color1() (machine_arch_type == MACH_TYPE_TTG_COLOR1) -#else -# define machine_is_ttg_color1() (0) -#endif - -#ifdef CONFIG_MACH_NXEB500HMI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXEB500HMI -# endif -# define machine_is_nxeb500hmi() (machine_arch_type == MACH_TYPE_NXEB500HMI) -#else -# define machine_is_nxeb500hmi() (0) -#endif - -#ifdef CONFIG_MACH_NETDCU8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETDCU8 -# endif -# define machine_is_netdcu8() (machine_arch_type == MACH_TYPE_NETDCU8) -#else -# define machine_is_netdcu8() (0) -#endif - -#ifdef CONFIG_MACH_NG_FVX538 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NG_FVX538 -# endif -# define machine_is_ng_fvx538() (machine_arch_type == MACH_TYPE_NG_FVX538) -#else -# define machine_is_ng_fvx538() (0) -#endif - -#ifdef CONFIG_MACH_NG_FVS338 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NG_FVS338 -# endif -# define machine_is_ng_fvs338() (machine_arch_type == MACH_TYPE_NG_FVS338) -#else -# define machine_is_ng_fvs338() (0) -#endif - -#ifdef CONFIG_MACH_PNX4103 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX4103 -# endif -# define machine_is_pnx4103() (machine_arch_type == MACH_TYPE_PNX4103) -#else -# define machine_is_pnx4103() (0) -#endif - -#ifdef CONFIG_MACH_HESDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HESDB -# endif -# define machine_is_hesdb() (machine_arch_type == MACH_TYPE_HESDB) -#else -# define machine_is_hesdb() (0) -#endif - -#ifdef CONFIG_MACH_XSILO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XSILO -# endif -# define machine_is_xsilo() (machine_arch_type == MACH_TYPE_XSILO) -#else -# define machine_is_xsilo() (0) -#endif - -#ifdef CONFIG_MACH_ESPRESSO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESPRESSO -# endif -# define machine_is_espresso() (machine_arch_type == MACH_TYPE_ESPRESSO) -#else -# define machine_is_espresso() (0) -#endif - -#ifdef CONFIG_MACH_EMLC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMLC -# endif -# define machine_is_emlc() (machine_arch_type == MACH_TYPE_EMLC) -#else -# define machine_is_emlc() (0) -#endif - -#ifdef CONFIG_MACH_SISTERON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SISTERON -# endif -# define machine_is_sisteron() (machine_arch_type == MACH_TYPE_SISTERON) -#else -# define machine_is_sisteron() (0) -#endif - -#ifdef CONFIG_MACH_RX1950 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RX1950 -# endif -# define machine_is_rx1950() (machine_arch_type == MACH_TYPE_RX1950) -#else -# define machine_is_rx1950() (0) -#endif - -#ifdef CONFIG_MACH_TSC_VENUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TSC_VENUS -# endif -# define machine_is_tsc_venus() (machine_arch_type == MACH_TYPE_TSC_VENUS) -#else -# define machine_is_tsc_venus() (0) -#endif - -#ifdef CONFIG_MACH_DS101J -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DS101J -# endif -# define machine_is_ds101j() (machine_arch_type == MACH_TYPE_DS101J) -#else -# define machine_is_ds101j() (0) -#endif - -#ifdef CONFIG_MACH_MXC30030ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC30030ADS -# endif -# define machine_is_mxc30030ads() (machine_arch_type == MACH_TYPE_MXC30030ADS) -#else -# define machine_is_mxc30030ads() (0) -#endif - -#ifdef CONFIG_MACH_FUJITSU_WIMAXSOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUJITSU_WIMAXSOC -# endif -# define machine_is_fujitsu_wimaxsoc() (machine_arch_type == MACH_TYPE_FUJITSU_WIMAXSOC) -#else -# define machine_is_fujitsu_wimaxsoc() (0) -#endif - -#ifdef CONFIG_MACH_DUALPCMODEM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DUALPCMODEM -# endif -# define machine_is_dualpcmodem() (machine_arch_type == MACH_TYPE_DUALPCMODEM) -#else -# define machine_is_dualpcmodem() (0) -#endif - -#ifdef CONFIG_MACH_GESBC9312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GESBC9312 -# endif -# define machine_is_gesbc9312() (machine_arch_type == MACH_TYPE_GESBC9312) -#else -# define machine_is_gesbc9312() (0) -#endif - -#ifdef CONFIG_MACH_HTCAPACHE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCAPACHE -# endif -# define machine_is_htcapache() (machine_arch_type == MACH_TYPE_HTCAPACHE) -#else -# define machine_is_htcapache() (0) -#endif - -#ifdef CONFIG_MACH_IXDP435 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXDP435 -# endif -# define machine_is_ixdp435() (machine_arch_type == MACH_TYPE_IXDP435) -#else -# define machine_is_ixdp435() (0) -#endif - -#ifdef CONFIG_MACH_CATPROVT100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CATPROVT100 -# endif -# define machine_is_catprovt100() (machine_arch_type == MACH_TYPE_CATPROVT100) -#else -# define machine_is_catprovt100() (0) -#endif - -#ifdef CONFIG_MACH_PICOTUX1XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOTUX1XX -# endif -# define machine_is_picotux1xx() (machine_arch_type == MACH_TYPE_PICOTUX1XX) -#else -# define machine_is_picotux1xx() (0) -#endif - -#ifdef CONFIG_MACH_PICOTUX2XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOTUX2XX -# endif -# define machine_is_picotux2xx() (machine_arch_type == MACH_TYPE_PICOTUX2XX) -#else -# define machine_is_picotux2xx() (0) -#endif - -#ifdef CONFIG_MACH_DSMG600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSMG600 -# endif -# define machine_is_dsmg600() (machine_arch_type == MACH_TYPE_DSMG600) -#else -# define machine_is_dsmg600() (0) -#endif - -#ifdef CONFIG_MACH_EMPC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPC2 -# endif -# define machine_is_empc2() (machine_arch_type == MACH_TYPE_EMPC2) -#else -# define machine_is_empc2() (0) -#endif - -#ifdef CONFIG_MACH_VENTURA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VENTURA -# endif -# define machine_is_ventura() (machine_arch_type == MACH_TYPE_VENTURA) -#else -# define machine_is_ventura() (0) -#endif - -#ifdef CONFIG_MACH_PHIDGET_SBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHIDGET_SBC -# endif -# define machine_is_phidget_sbc() (machine_arch_type == MACH_TYPE_PHIDGET_SBC) -#else -# define machine_is_phidget_sbc() (0) -#endif - -#ifdef CONFIG_MACH_IJ3K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IJ3K -# endif -# define machine_is_ij3k() (machine_arch_type == MACH_TYPE_IJ3K) -#else -# define machine_is_ij3k() (0) -#endif - -#ifdef CONFIG_MACH_PISGAH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PISGAH -# endif -# define machine_is_pisgah() (machine_arch_type == MACH_TYPE_PISGAH) -#else -# define machine_is_pisgah() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_FSAMPLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_FSAMPLE -# endif -# define machine_is_omap_fsample() (machine_arch_type == MACH_TYPE_OMAP_FSAMPLE) -#else -# define machine_is_omap_fsample() (0) -#endif - -#ifdef CONFIG_MACH_SG720 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG720 -# endif -# define machine_is_sg720() (machine_arch_type == MACH_TYPE_SG720) -#else -# define machine_is_sg720() (0) -#endif - -#ifdef CONFIG_MACH_REDFOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REDFOX -# endif -# define machine_is_redfox() (machine_arch_type == MACH_TYPE_REDFOX) -#else -# define machine_is_redfox() (0) -#endif - -#ifdef CONFIG_MACH_MYSH_EP9315_1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MYSH_EP9315_1 -# endif -# define machine_is_mysh_ep9315_1() (machine_arch_type == MACH_TYPE_MYSH_EP9315_1) -#else -# define machine_is_mysh_ep9315_1() (0) -#endif - -#ifdef CONFIG_MACH_TPF106 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPF106 -# endif -# define machine_is_tpf106() (machine_arch_type == MACH_TYPE_TPF106) -#else -# define machine_is_tpf106() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200KG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200KG -# endif -# define machine_is_at91rm9200kg() (machine_arch_type == MACH_TYPE_AT91RM9200KG) -#else -# define machine_is_at91rm9200kg() (0) -#endif - -#ifdef CONFIG_MACH_SLEDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SLEDB -# endif -# define machine_is_rcmt2() (machine_arch_type == MACH_TYPE_SLEDB) -#else -# define machine_is_rcmt2() (0) -#endif - -#ifdef CONFIG_MACH_ONTRACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ONTRACK -# endif -# define machine_is_ontrack() (machine_arch_type == MACH_TYPE_ONTRACK) -#else -# define machine_is_ontrack() (0) -#endif - -#ifdef CONFIG_MACH_PM1200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PM1200 -# endif -# define machine_is_pm1200() (machine_arch_type == MACH_TYPE_PM1200) -#else -# define machine_is_pm1200() (0) -#endif - -#ifdef CONFIG_MACH_ESS24XXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESS24XXX -# endif -# define machine_is_ess24562() (machine_arch_type == MACH_TYPE_ESS24XXX) -#else -# define machine_is_ess24562() (0) -#endif - -#ifdef CONFIG_MACH_COREMP7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COREMP7 -# endif -# define machine_is_coremp7() (machine_arch_type == MACH_TYPE_COREMP7) -#else -# define machine_is_coremp7() (0) -#endif - -#ifdef CONFIG_MACH_NEXCODER_6446 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXCODER_6446 -# endif -# define machine_is_nexcoder_6446() (machine_arch_type == MACH_TYPE_NEXCODER_6446) -#else -# define machine_is_nexcoder_6446() (0) -#endif - -#ifdef CONFIG_MACH_STVC8380 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STVC8380 -# endif -# define machine_is_stvc8380() (machine_arch_type == MACH_TYPE_STVC8380) -#else -# define machine_is_stvc8380() (0) -#endif - -#ifdef CONFIG_MACH_TEKLYNX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEKLYNX -# endif -# define machine_is_teklynx() (machine_arch_type == MACH_TYPE_TEKLYNX) -#else -# define machine_is_teklynx() (0) -#endif - -#ifdef CONFIG_MACH_CARBONADO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARBONADO -# endif -# define machine_is_carbonado() (machine_arch_type == MACH_TYPE_CARBONADO) -#else -# define machine_is_carbonado() (0) -#endif - -#ifdef CONFIG_MACH_SYSMOS_MP730 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYSMOS_MP730 -# endif -# define machine_is_sysmos_mp730() (machine_arch_type == MACH_TYPE_SYSMOS_MP730) -#else -# define machine_is_sysmos_mp730() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPER_CL15 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPER_CL15 -# endif -# define machine_is_snapper_cl15() (machine_arch_type == MACH_TYPE_SNAPPER_CL15) -#else -# define machine_is_snapper_cl15() (0) -#endif - -#ifdef CONFIG_MACH_PGIGIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PGIGIM -# endif -# define machine_is_pgigim() (machine_arch_type == MACH_TYPE_PGIGIM) -#else -# define machine_is_pgigim() (0) -#endif - -#ifdef CONFIG_MACH_PTX9160P2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PTX9160P2 -# endif -# define machine_is_ptx9160p2() (machine_arch_type == MACH_TYPE_PTX9160P2) -#else -# define machine_is_ptx9160p2() (0) -#endif - -#ifdef CONFIG_MACH_DCORE1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DCORE1 -# endif -# define machine_is_dcore1() (machine_arch_type == MACH_TYPE_DCORE1) -#else -# define machine_is_dcore1() (0) -#endif - -#ifdef CONFIG_MACH_VICTORPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VICTORPXA -# endif -# define machine_is_victorpxa() (machine_arch_type == MACH_TYPE_VICTORPXA) -#else -# define machine_is_victorpxa() (0) -#endif - -#ifdef CONFIG_MACH_MX2DTB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX2DTB -# endif -# define machine_is_mx2dtb() (machine_arch_type == MACH_TYPE_MX2DTB) -#else -# define machine_is_mx2dtb() (0) -#endif - -#ifdef CONFIG_MACH_PXA_IREX_ER0100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXA_IREX_ER0100 -# endif -# define machine_is_pxa_irex_er0100() (machine_arch_type == MACH_TYPE_PXA_IREX_ER0100) -#else -# define machine_is_pxa_irex_er0100() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PALMZ71 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PALMZ71 -# endif -# define machine_is_omap_palmz71() (machine_arch_type == MACH_TYPE_OMAP_PALMZ71) -#else -# define machine_is_omap_palmz71() (0) -#endif - -#ifdef CONFIG_MACH_BARTEC_DEG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BARTEC_DEG -# endif -# define machine_is_bartec_deg() (machine_arch_type == MACH_TYPE_BARTEC_DEG) -#else -# define machine_is_bartec_deg() (0) -#endif - -#ifdef CONFIG_MACH_HW50251 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW50251 -# endif -# define machine_is_hw50251() (machine_arch_type == MACH_TYPE_HW50251) -#else -# define machine_is_hw50251() (0) -#endif - -#ifdef CONFIG_MACH_IBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IBOX -# endif -# define machine_is_ibox() (machine_arch_type == MACH_TYPE_IBOX) -#else -# define machine_is_ibox() (0) -#endif - -#ifdef CONFIG_MACH_ATLASLH7A404 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATLASLH7A404 -# endif -# define machine_is_atlaslh7a404() (machine_arch_type == MACH_TYPE_ATLASLH7A404) -#else -# define machine_is_atlaslh7a404() (0) -#endif - -#ifdef CONFIG_MACH_PT2026 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PT2026 -# endif -# define machine_is_pt2026() (machine_arch_type == MACH_TYPE_PT2026) -#else -# define machine_is_pt2026() (0) -#endif - -#ifdef CONFIG_MACH_HTCALPINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCALPINE -# endif -# define machine_is_htcalpine() (machine_arch_type == MACH_TYPE_HTCALPINE) -#else -# define machine_is_htcalpine() (0) -#endif - -#ifdef CONFIG_MACH_BARTEC_VTU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BARTEC_VTU -# endif -# define machine_is_bartec_vtu() (machine_arch_type == MACH_TYPE_BARTEC_VTU) -#else -# define machine_is_bartec_vtu() (0) -#endif - -#ifdef CONFIG_MACH_VCOREII -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VCOREII -# endif -# define machine_is_vcoreii() (machine_arch_type == MACH_TYPE_VCOREII) -#else -# define machine_is_vcoreii() (0) -#endif - -#ifdef CONFIG_MACH_PDNB3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PDNB3 -# endif -# define machine_is_pdnb3() (machine_arch_type == MACH_TYPE_PDNB3) -#else -# define machine_is_pdnb3() (0) -#endif - -#ifdef CONFIG_MACH_HTCBEETLES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCBEETLES -# endif -# define machine_is_htcbeetles() (machine_arch_type == MACH_TYPE_HTCBEETLES) -#else -# define machine_is_htcbeetles() (0) -#endif - -#ifdef CONFIG_MACH_S3C6400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C6400 -# endif -# define machine_is_s3c6400() (machine_arch_type == MACH_TYPE_S3C6400) -#else -# define machine_is_s3c6400() (0) -#endif - -#ifdef CONFIG_MACH_S3C2443 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2443 -# endif -# define machine_is_s3c2443() (machine_arch_type == MACH_TYPE_S3C2443) -#else -# define machine_is_s3c2443() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_LDK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_LDK -# endif -# define machine_is_omap_ldk() (machine_arch_type == MACH_TYPE_OMAP_LDK) -#else -# define machine_is_omap_ldk() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2460 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2460 -# endif -# define machine_is_smdk2460() (machine_arch_type == MACH_TYPE_SMDK2460) -#else -# define machine_is_smdk2460() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2440 -# endif -# define machine_is_smdk2440() (machine_arch_type == MACH_TYPE_SMDK2440) -#else -# define machine_is_smdk2440() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2412 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2412 -# endif -# define machine_is_smdk2412() (machine_arch_type == MACH_TYPE_SMDK2412) -#else -# define machine_is_smdk2412() (0) -#endif - -#ifdef CONFIG_MACH_WEBBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WEBBOX -# endif -# define machine_is_webbox() (machine_arch_type == MACH_TYPE_WEBBOX) -#else -# define machine_is_webbox() (0) -#endif - -#ifdef CONFIG_MACH_CWWNDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWWNDP -# endif -# define machine_is_cwwndp() (machine_arch_type == MACH_TYPE_CWWNDP) -#else -# define machine_is_cwwndp() (0) -#endif - -#ifdef CONFIG_MACH_DRAGON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DRAGON -# endif -# define machine_is_i839() (machine_arch_type == MACH_TYPE_DRAGON) -#else -# define machine_is_i839() (0) -#endif - -#ifdef CONFIG_MACH_OPENDO_CPU_BOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENDO_CPU_BOARD -# endif -# define machine_is_opendo_cpu_board() (machine_arch_type == MACH_TYPE_OPENDO_CPU_BOARD) -#else -# define machine_is_opendo_cpu_board() (0) -#endif - -#ifdef CONFIG_MACH_CCM2200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCM2200 -# endif -# define machine_is_ccm2200() (machine_arch_type == MACH_TYPE_CCM2200) -#else -# define machine_is_ccm2200() (0) -#endif - -#ifdef CONFIG_MACH_ETWARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETWARM -# endif -# define machine_is_etwarm() (machine_arch_type == MACH_TYPE_ETWARM) -#else -# define machine_is_etwarm() (0) -#endif - -#ifdef CONFIG_MACH_M93030 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M93030 -# endif -# define machine_is_m93030() (machine_arch_type == MACH_TYPE_M93030) -#else -# define machine_is_m93030() (0) -#endif - -#ifdef CONFIG_MACH_CC7U -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC7U -# endif -# define machine_is_cc7u() (machine_arch_type == MACH_TYPE_CC7U) -#else -# define machine_is_cc7u() (0) -#endif - -#ifdef CONFIG_MACH_MTT_RANGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MTT_RANGER -# endif -# define machine_is_mtt_ranger() (machine_arch_type == MACH_TYPE_MTT_RANGER) -#else -# define machine_is_mtt_ranger() (0) -#endif - -#ifdef CONFIG_MACH_NEXUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXUS -# endif -# define machine_is_nexus() (machine_arch_type == MACH_TYPE_NEXUS) -#else -# define machine_is_nexus() (0) -#endif - -#ifdef CONFIG_MACH_DESMAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DESMAN -# endif -# define machine_is_desman() (machine_arch_type == MACH_TYPE_DESMAN) -#else -# define machine_is_desman() (0) -#endif - -#ifdef CONFIG_MACH_BKDE303 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BKDE303 -# endif -# define machine_is_bkde303() (machine_arch_type == MACH_TYPE_BKDE303) -#else -# define machine_is_bkde303() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2413 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2413 -# endif -# define machine_is_smdk2413() (machine_arch_type == MACH_TYPE_SMDK2413) -#else -# define machine_is_smdk2413() (0) -#endif - -#ifdef CONFIG_MACH_AML_M7200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AML_M7200 -# endif -# define machine_is_aml_m7200() (machine_arch_type == MACH_TYPE_AML_M7200) -#else -# define machine_is_aml_m7200() (0) -#endif - -#ifdef CONFIG_MACH_AML_M5900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AML_M5900 -# endif -# define machine_is_aml_m5900() (machine_arch_type == MACH_TYPE_AML_M5900) -#else -# define machine_is_aml_m5900() (0) -#endif - -#ifdef CONFIG_MACH_SG640 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG640 -# endif -# define machine_is_sg640() (machine_arch_type == MACH_TYPE_SG640) -#else -# define machine_is_sg640() (0) -#endif - -#ifdef CONFIG_MACH_EDG79524 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDG79524 -# endif -# define machine_is_edg79524() (machine_arch_type == MACH_TYPE_EDG79524) -#else -# define machine_is_edg79524() (0) -#endif - -#ifdef CONFIG_MACH_AI2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AI2410 -# endif -# define machine_is_ai2410() (machine_arch_type == MACH_TYPE_AI2410) -#else -# define machine_is_ai2410() (0) -#endif - -#ifdef CONFIG_MACH_IXP465 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IXP465 -# endif -# define machine_is_ixp465() (machine_arch_type == MACH_TYPE_IXP465) -#else -# define machine_is_ixp465() (0) -#endif - -#ifdef CONFIG_MACH_BALLOON3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BALLOON3 -# endif -# define machine_is_balloon3() (machine_arch_type == MACH_TYPE_BALLOON3) -#else -# define machine_is_balloon3() (0) -#endif - -#ifdef CONFIG_MACH_HEINS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HEINS -# endif -# define machine_is_heins() (machine_arch_type == MACH_TYPE_HEINS) -#else -# define machine_is_heins() (0) -#endif - -#ifdef CONFIG_MACH_MPLUSEVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPLUSEVA -# endif -# define machine_is_mpluseva() (machine_arch_type == MACH_TYPE_MPLUSEVA) -#else -# define machine_is_mpluseva() (0) -#endif - -#ifdef CONFIG_MACH_RT042 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RT042 -# endif -# define machine_is_rt042() (machine_arch_type == MACH_TYPE_RT042) -#else -# define machine_is_rt042() (0) -#endif - -#ifdef CONFIG_MACH_CWIEM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWIEM -# endif -# define machine_is_cwiem() (machine_arch_type == MACH_TYPE_CWIEM) -#else -# define machine_is_cwiem() (0) -#endif - -#ifdef CONFIG_MACH_CM_X270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_X270 -# endif -# define machine_is_cm_x270() (machine_arch_type == MACH_TYPE_CM_X270) -#else -# define machine_is_cm_x270() (0) -#endif - -#ifdef CONFIG_MACH_CM_X255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_X255 -# endif -# define machine_is_cm_x255() (machine_arch_type == MACH_TYPE_CM_X255) -#else -# define machine_is_cm_x255() (0) -#endif - -#ifdef CONFIG_MACH_ESH_AT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESH_AT91 -# endif -# define machine_is_esh_at91() (machine_arch_type == MACH_TYPE_ESH_AT91) -#else -# define machine_is_esh_at91() (0) -#endif - -#ifdef CONFIG_MACH_SANDGATE3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDGATE3 -# endif -# define machine_is_sandgate3() (machine_arch_type == MACH_TYPE_SANDGATE3) -#else -# define machine_is_sandgate3() (0) -#endif - -#ifdef CONFIG_MACH_PRIMO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRIMO -# endif -# define machine_is_primo() (machine_arch_type == MACH_TYPE_PRIMO) -#else -# define machine_is_primo() (0) -#endif - -#ifdef CONFIG_MACH_GEMSTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEMSTONE -# endif -# define machine_is_gemstone() (machine_arch_type == MACH_TYPE_GEMSTONE) -#else -# define machine_is_gemstone() (0) -#endif - -#ifdef CONFIG_MACH_PRONGHORNMETRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRONGHORNMETRO -# endif -# define machine_is_pronghorn_metro() (machine_arch_type == MACH_TYPE_PRONGHORNMETRO) -#else -# define machine_is_pronghorn_metro() (0) -#endif - -#ifdef CONFIG_MACH_SIDEWINDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIDEWINDER -# endif -# define machine_is_sidewinder() (machine_arch_type == MACH_TYPE_SIDEWINDER) -#else -# define machine_is_sidewinder() (0) -#endif - -#ifdef CONFIG_MACH_PICOMOD1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOMOD1 -# endif -# define machine_is_picomod1() (machine_arch_type == MACH_TYPE_PICOMOD1) -#else -# define machine_is_picomod1() (0) -#endif - -#ifdef CONFIG_MACH_SG590 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG590 -# endif -# define machine_is_sg590() (machine_arch_type == MACH_TYPE_SG590) -#else -# define machine_is_sg590() (0) -#endif - -#ifdef CONFIG_MACH_AKAI9307 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AKAI9307 -# endif -# define machine_is_akai9307() (machine_arch_type == MACH_TYPE_AKAI9307) -#else -# define machine_is_akai9307() (0) -#endif - -#ifdef CONFIG_MACH_FONTAINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FONTAINE -# endif -# define machine_is_fontaine() (machine_arch_type == MACH_TYPE_FONTAINE) -#else -# define machine_is_fontaine() (0) -#endif - -#ifdef CONFIG_MACH_WOMBAT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WOMBAT -# endif -# define machine_is_wombat() (machine_arch_type == MACH_TYPE_WOMBAT) -#else -# define machine_is_wombat() (0) -#endif - -#ifdef CONFIG_MACH_ACQ300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACQ300 -# endif -# define machine_is_acq300() (machine_arch_type == MACH_TYPE_ACQ300) -#else -# define machine_is_acq300() (0) -#endif - -#ifdef CONFIG_MACH_MOD_270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOD_270 -# endif -# define machine_is_mod272() (machine_arch_type == MACH_TYPE_MOD_270) -#else -# define machine_is_mod272() (0) -#endif - -#ifdef CONFIG_MACH_VC0820 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VC0820 -# endif -# define machine_is_vmc_vc0820() (machine_arch_type == MACH_TYPE_VC0820) -#else -# define machine_is_vmc_vc0820() (0) -#endif - -#ifdef CONFIG_MACH_ANI_AIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANI_AIM -# endif -# define machine_is_ani_aim() (machine_arch_type == MACH_TYPE_ANI_AIM) -#else -# define machine_is_ani_aim() (0) -#endif - -#ifdef CONFIG_MACH_JELLYFISH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JELLYFISH -# endif -# define machine_is_jellyfish() (machine_arch_type == MACH_TYPE_JELLYFISH) -#else -# define machine_is_jellyfish() (0) -#endif - -#ifdef CONFIG_MACH_AMANITA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AMANITA -# endif -# define machine_is_amanita() (machine_arch_type == MACH_TYPE_AMANITA) -#else -# define machine_is_amanita() (0) -#endif - -#ifdef CONFIG_MACH_VLINK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VLINK -# endif -# define machine_is_vlink() (machine_arch_type == MACH_TYPE_VLINK) -#else -# define machine_is_vlink() (0) -#endif - -#ifdef CONFIG_MACH_DEXFLEX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEXFLEX -# endif -# define machine_is_dexflex() (machine_arch_type == MACH_TYPE_DEXFLEX) -#else -# define machine_is_dexflex() (0) -#endif - -#ifdef CONFIG_MACH_EIGEN_TTQ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EIGEN_TTQ -# endif -# define machine_is_eigen_ttq() (machine_arch_type == MACH_TYPE_EIGEN_TTQ) -#else -# define machine_is_eigen_ttq() (0) -#endif - -#ifdef CONFIG_MACH_ARCOM_TITAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCOM_TITAN -# endif -# define machine_is_arcom_titan() (machine_arch_type == MACH_TYPE_ARCOM_TITAN) -#else -# define machine_is_arcom_titan() (0) -#endif - -#ifdef CONFIG_MACH_TABLA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TABLA -# endif -# define machine_is_tabla() (machine_arch_type == MACH_TYPE_TABLA) -#else -# define machine_is_tabla() (0) -#endif - -#ifdef CONFIG_MACH_MDIRAC3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MDIRAC3 -# endif -# define machine_is_mdirac3() (machine_arch_type == MACH_TYPE_MDIRAC3) -#else -# define machine_is_mdirac3() (0) -#endif - -#ifdef CONFIG_MACH_MRHFBP2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MRHFBP2 -# endif -# define machine_is_mrhfbp2() (machine_arch_type == MACH_TYPE_MRHFBP2) -#else -# define machine_is_mrhfbp2() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200RB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200RB -# endif -# define machine_is_at91rm9200rb() (machine_arch_type == MACH_TYPE_AT91RM9200RB) -#else -# define machine_is_at91rm9200rb() (0) -#endif - -#ifdef CONFIG_MACH_ANI_APM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANI_APM -# endif -# define machine_is_ani_apm() (machine_arch_type == MACH_TYPE_ANI_APM) -#else -# define machine_is_ani_apm() (0) -#endif - -#ifdef CONFIG_MACH_ELLA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELLA1 -# endif -# define machine_is_ella1() (machine_arch_type == MACH_TYPE_ELLA1) -#else -# define machine_is_ella1() (0) -#endif - -#ifdef CONFIG_MACH_INHAND_PXA27X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHAND_PXA27X -# endif -# define machine_is_inhand_pxa27x() (machine_arch_type == MACH_TYPE_INHAND_PXA27X) -#else -# define machine_is_inhand_pxa27x() (0) -#endif - -#ifdef CONFIG_MACH_INHAND_PXA25X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHAND_PXA25X -# endif -# define machine_is_inhand_pxa25x() (machine_arch_type == MACH_TYPE_INHAND_PXA25X) -#else -# define machine_is_inhand_pxa25x() (0) -#endif - -#ifdef CONFIG_MACH_EMPOS_XM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPOS_XM -# endif -# define machine_is_empos_xm() (machine_arch_type == MACH_TYPE_EMPOS_XM) -#else -# define machine_is_empos_xm() (0) -#endif - -#ifdef CONFIG_MACH_EMPOS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPOS -# endif -# define machine_is_empos() (machine_arch_type == MACH_TYPE_EMPOS) -#else -# define machine_is_empos() (0) -#endif - -#ifdef CONFIG_MACH_EMPOS_TINY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPOS_TINY -# endif -# define machine_is_empos_tiny() (machine_arch_type == MACH_TYPE_EMPOS_TINY) -#else -# define machine_is_empos_tiny() (0) -#endif - -#ifdef CONFIG_MACH_EMPOS_SM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPOS_SM -# endif -# define machine_is_empos_sm() (machine_arch_type == MACH_TYPE_EMPOS_SM) -#else -# define machine_is_empos_sm() (0) -#endif - -#ifdef CONFIG_MACH_EGRET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EGRET -# endif -# define machine_is_egret() (machine_arch_type == MACH_TYPE_EGRET) -#else -# define machine_is_egret() (0) -#endif - -#ifdef CONFIG_MACH_OSTRICH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OSTRICH -# endif -# define machine_is_ostrich() (machine_arch_type == MACH_TYPE_OSTRICH) -#else -# define machine_is_ostrich() (0) -#endif - -#ifdef CONFIG_MACH_N50 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N50 -# endif -# define machine_is_n50() (machine_arch_type == MACH_TYPE_N50) -#else -# define machine_is_n50() (0) -#endif - -#ifdef CONFIG_MACH_ECBAT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECBAT91 -# endif -# define machine_is_ecbat91() (machine_arch_type == MACH_TYPE_ECBAT91) -#else -# define machine_is_ecbat91() (0) -#endif - -#ifdef CONFIG_MACH_STAREAST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAREAST -# endif -# define machine_is_stareast() (machine_arch_type == MACH_TYPE_STAREAST) -#else -# define machine_is_stareast() (0) -#endif - -#ifdef CONFIG_MACH_DSPG_DW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSPG_DW -# endif -# define machine_is_dspg_dw() (machine_arch_type == MACH_TYPE_DSPG_DW) -#else -# define machine_is_dspg_dw() (0) -#endif - -#ifdef CONFIG_MACH_ONEARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ONEARM -# endif -# define machine_is_onearm() (machine_arch_type == MACH_TYPE_ONEARM) -#else -# define machine_is_onearm() (0) -#endif - -#ifdef CONFIG_MACH_MRG110_6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MRG110_6 -# endif -# define machine_is_mrg110_6() (machine_arch_type == MACH_TYPE_MRG110_6) -#else -# define machine_is_mrg110_6() (0) -#endif - -#ifdef CONFIG_MACH_WRT300NV2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WRT300NV2 -# endif -# define machine_is_wrt300nv2() (machine_arch_type == MACH_TYPE_WRT300NV2) -#else -# define machine_is_wrt300nv2() (0) -#endif - -#ifdef CONFIG_MACH_XM_BULVERDE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XM_BULVERDE -# endif -# define machine_is_xm_bulverde() (machine_arch_type == MACH_TYPE_XM_BULVERDE) -#else -# define machine_is_xm_bulverde() (0) -#endif - -#ifdef CONFIG_MACH_MSM6100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM6100 -# endif -# define machine_is_msm6100() (machine_arch_type == MACH_TYPE_MSM6100) -#else -# define machine_is_msm6100() (0) -#endif - -#ifdef CONFIG_MACH_ETI_B1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETI_B1 -# endif -# define machine_is_eti_b1() (machine_arch_type == MACH_TYPE_ETI_B1) -#else -# define machine_is_eti_b1() (0) -#endif - -#ifdef CONFIG_MACH_ZILOG_ZA9L -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZILOG_ZA9L -# endif -# define machine_is_za9l_series() (machine_arch_type == MACH_TYPE_ZILOG_ZA9L) -#else -# define machine_is_za9l_series() (0) -#endif - -#ifdef CONFIG_MACH_BIT2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIT2440 -# endif -# define machine_is_bit2440() (machine_arch_type == MACH_TYPE_BIT2440) -#else -# define machine_is_bit2440() (0) -#endif - -#ifdef CONFIG_MACH_NBI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NBI -# endif -# define machine_is_nbi() (machine_arch_type == MACH_TYPE_NBI) -#else -# define machine_is_nbi() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2443 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2443 -# endif -# define machine_is_smdk2443() (machine_arch_type == MACH_TYPE_SMDK2443) -#else -# define machine_is_smdk2443() (0) -#endif - -#ifdef CONFIG_MACH_VDAVINCI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VDAVINCI -# endif -# define machine_is_vdavinci() (machine_arch_type == MACH_TYPE_VDAVINCI) -#else -# define machine_is_vdavinci() (0) -#endif - -#ifdef CONFIG_MACH_ATC6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATC6 -# endif -# define machine_is_atc6() (machine_arch_type == MACH_TYPE_ATC6) -#else -# define machine_is_atc6() (0) -#endif - -#ifdef CONFIG_MACH_MULTMDW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTMDW -# endif -# define machine_is_multmdw() (machine_arch_type == MACH_TYPE_MULTMDW) -#else -# define machine_is_multmdw() (0) -#endif - -#ifdef CONFIG_MACH_MBA2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MBA2440 -# endif -# define machine_is_mba2440() (machine_arch_type == MACH_TYPE_MBA2440) -#else -# define machine_is_mba2440() (0) -#endif - -#ifdef CONFIG_MACH_ECSD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECSD -# endif -# define machine_is_ecsd() (machine_arch_type == MACH_TYPE_ECSD) -#else -# define machine_is_ecsd() (0) -#endif - -#ifdef CONFIG_MACH_PALMZ31 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALMZ31 -# endif -# define machine_is_palmz31() (machine_arch_type == MACH_TYPE_PALMZ31) -#else -# define machine_is_palmz31() (0) -#endif - -#ifdef CONFIG_MACH_FSG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FSG -# endif -# define machine_is_fsg() (machine_arch_type == MACH_TYPE_FSG) -#else -# define machine_is_fsg() (0) -#endif - -#ifdef CONFIG_MACH_RAZOR101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAZOR101 -# endif -# define machine_is_razor101() (machine_arch_type == MACH_TYPE_RAZOR101) -#else -# define machine_is_razor101() (0) -#endif - -#ifdef CONFIG_MACH_OPERA_TDM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPERA_TDM -# endif -# define machine_is_opera_tdm() (machine_arch_type == MACH_TYPE_OPERA_TDM) -#else -# define machine_is_opera_tdm() (0) -#endif - -#ifdef CONFIG_MACH_COMCERTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMCERTO -# endif -# define machine_is_comcerto() (machine_arch_type == MACH_TYPE_COMCERTO) -#else -# define machine_is_comcerto() (0) -#endif - -#ifdef CONFIG_MACH_TB0319 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TB0319 -# endif -# define machine_is_tb0319() (machine_arch_type == MACH_TYPE_TB0319) -#else -# define machine_is_tb0319() (0) -#endif - -#ifdef CONFIG_MACH_KWS8000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KWS8000 -# endif -# define machine_is_kws8000() (machine_arch_type == MACH_TYPE_KWS8000) -#else -# define machine_is_kws8000() (0) -#endif - -#ifdef CONFIG_MACH_B2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_B2 -# endif -# define machine_is_b2() (machine_arch_type == MACH_TYPE_B2) -#else -# define machine_is_b2() (0) -#endif - -#ifdef CONFIG_MACH_LCL54 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LCL54 -# endif -# define machine_is_lcl54() (machine_arch_type == MACH_TYPE_LCL54) -#else -# define machine_is_lcl54() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9260EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9260EK -# endif -# define machine_is_at91sam9260ek() (machine_arch_type == MACH_TYPE_AT91SAM9260EK) -#else -# define machine_is_at91sam9260ek() (0) -#endif - -#ifdef CONFIG_MACH_GLANTANK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GLANTANK -# endif -# define machine_is_glantank() (machine_arch_type == MACH_TYPE_GLANTANK) -#else -# define machine_is_glantank() (0) -#endif - -#ifdef CONFIG_MACH_N2100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N2100 -# endif -# define machine_is_n2100() (machine_arch_type == MACH_TYPE_N2100) -#else -# define machine_is_n2100() (0) -#endif - -#ifdef CONFIG_MACH_N4100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N4100 -# endif -# define machine_is_n4100() (machine_arch_type == MACH_TYPE_N4100) -#else -# define machine_is_n4100() (0) -#endif - -#ifdef CONFIG_MACH_VERTICAL_RSC4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VERTICAL_RSC4 -# endif -# define machine_is_rsc4() (machine_arch_type == MACH_TYPE_VERTICAL_RSC4) -#else -# define machine_is_rsc4() (0) -#endif - -#ifdef CONFIG_MACH_SG8100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG8100 -# endif -# define machine_is_sg8100() (machine_arch_type == MACH_TYPE_SG8100) -#else -# define machine_is_sg8100() (0) -#endif - -#ifdef CONFIG_MACH_IM42XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IM42XX -# endif -# define machine_is_im42xx() (machine_arch_type == MACH_TYPE_IM42XX) -#else -# define machine_is_im42xx() (0) -#endif - -#ifdef CONFIG_MACH_FTXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FTXX -# endif -# define machine_is_ftxx() (machine_arch_type == MACH_TYPE_FTXX) -#else -# define machine_is_ftxx() (0) -#endif - -#ifdef CONFIG_MACH_LWFUSION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LWFUSION -# endif -# define machine_is_lwfusion() (machine_arch_type == MACH_TYPE_LWFUSION) -#else -# define machine_is_lwfusion() (0) -#endif - -#ifdef CONFIG_MACH_QT2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QT2410 -# endif -# define machine_is_qt2410() (machine_arch_type == MACH_TYPE_QT2410) -#else -# define machine_is_qt2410() (0) -#endif - -#ifdef CONFIG_MACH_KIXRP435 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KIXRP435 -# endif -# define machine_is_kixrp435() (machine_arch_type == MACH_TYPE_KIXRP435) -#else -# define machine_is_kixrp435() (0) -#endif - -#ifdef CONFIG_MACH_CCW9C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCW9C -# endif -# define machine_is_ccw9c() (machine_arch_type == MACH_TYPE_CCW9C) -#else -# define machine_is_ccw9c() (0) -#endif - -#ifdef CONFIG_MACH_DABHS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DABHS -# endif -# define machine_is_dabhs() (machine_arch_type == MACH_TYPE_DABHS) -#else -# define machine_is_dabhs() (0) -#endif - -#ifdef CONFIG_MACH_GZMX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GZMX -# endif -# define machine_is_gzmx() (machine_arch_type == MACH_TYPE_GZMX) -#else -# define machine_is_gzmx() (0) -#endif - -#ifdef CONFIG_MACH_IPNW100AP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPNW100AP -# endif -# define machine_is_ipnw100ap() (machine_arch_type == MACH_TYPE_IPNW100AP) -#else -# define machine_is_ipnw100ap() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9360DEV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9360DEV -# endif -# define machine_is_cc9p9360dev() (machine_arch_type == MACH_TYPE_CC9P9360DEV) -#else -# define machine_is_cc9p9360dev() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9750DEV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9750DEV -# endif -# define machine_is_cc9p9750dev() (machine_arch_type == MACH_TYPE_CC9P9750DEV) -#else -# define machine_is_cc9p9750dev() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9360VAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9360VAL -# endif -# define machine_is_cc9p9360val() (machine_arch_type == MACH_TYPE_CC9P9360VAL) -#else -# define machine_is_cc9p9360val() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9750VAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9750VAL -# endif -# define machine_is_cc9p9750val() (machine_arch_type == MACH_TYPE_CC9P9750VAL) -#else -# define machine_is_cc9p9750val() (0) -#endif - -#ifdef CONFIG_MACH_NX70V -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NX70V -# endif -# define machine_is_nx70v() (machine_arch_type == MACH_TYPE_NX70V) -#else -# define machine_is_nx70v() (0) -#endif - -#ifdef CONFIG_MACH_AT91RM9200DF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91RM9200DF -# endif -# define machine_is_at91rm9200df() (machine_arch_type == MACH_TYPE_AT91RM9200DF) -#else -# define machine_is_at91rm9200df() (0) -#endif - -#ifdef CONFIG_MACH_SE_PILOT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SE_PILOT2 -# endif -# define machine_is_se_pilot2() (machine_arch_type == MACH_TYPE_SE_PILOT2) -#else -# define machine_is_se_pilot2() (0) -#endif - -#ifdef CONFIG_MACH_MTCN_T800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MTCN_T800 -# endif -# define machine_is_mtcn_t800() (machine_arch_type == MACH_TYPE_MTCN_T800) -#else -# define machine_is_mtcn_t800() (0) -#endif - -#ifdef CONFIG_MACH_VCMX212 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VCMX212 -# endif -# define machine_is_vcmx212() (machine_arch_type == MACH_TYPE_VCMX212) -#else -# define machine_is_vcmx212() (0) -#endif - -#ifdef CONFIG_MACH_LYNX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LYNX -# endif -# define machine_is_lynx() (machine_arch_type == MACH_TYPE_LYNX) -#else -# define machine_is_lynx() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9260ID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9260ID -# endif -# define machine_is_at91sam9260id() (machine_arch_type == MACH_TYPE_AT91SAM9260ID) -#else -# define machine_is_at91sam9260id() (0) -#endif - -#ifdef CONFIG_MACH_HW86052 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW86052 -# endif -# define machine_is_hw86052() (machine_arch_type == MACH_TYPE_HW86052) -#else -# define machine_is_hw86052() (0) -#endif - -#ifdef CONFIG_MACH_PILZ_PMI3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PILZ_PMI3 -# endif -# define machine_is_pilz_pmi3() (machine_arch_type == MACH_TYPE_PILZ_PMI3) -#else -# define machine_is_pilz_pmi3() (0) -#endif - -#ifdef CONFIG_MACH_EDB9302A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9302A -# endif -# define machine_is_edb9302a() (machine_arch_type == MACH_TYPE_EDB9302A) -#else -# define machine_is_edb9302a() (0) -#endif - -#ifdef CONFIG_MACH_EDB9307A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9307A -# endif -# define machine_is_edb9307a() (machine_arch_type == MACH_TYPE_EDB9307A) -#else -# define machine_is_edb9307a() (0) -#endif - -#ifdef CONFIG_MACH_CT_DFS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CT_DFS -# endif -# define machine_is_ct_dfs() (machine_arch_type == MACH_TYPE_CT_DFS) -#else -# define machine_is_ct_dfs() (0) -#endif - -#ifdef CONFIG_MACH_PILZ_PMI4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PILZ_PMI4 -# endif -# define machine_is_pilz_pmi4() (machine_arch_type == MACH_TYPE_PILZ_PMI4) -#else -# define machine_is_pilz_pmi4() (0) -#endif - -#ifdef CONFIG_MACH_XCEEDNP_IXP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XCEEDNP_IXP -# endif -# define machine_is_xceednp_ixp() (machine_arch_type == MACH_TYPE_XCEEDNP_IXP) -#else -# define machine_is_xceednp_ixp() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2442B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2442B -# endif -# define machine_is_smdk2442b() (machine_arch_type == MACH_TYPE_SMDK2442B) -#else -# define machine_is_smdk2442b() (0) -#endif - -#ifdef CONFIG_MACH_XNODE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XNODE -# endif -# define machine_is_xnode() (machine_arch_type == MACH_TYPE_XNODE) -#else -# define machine_is_xnode() (0) -#endif - -#ifdef CONFIG_MACH_AIDX270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AIDX270 -# endif -# define machine_is_aidx270() (machine_arch_type == MACH_TYPE_AIDX270) -#else -# define machine_is_aidx270() (0) -#endif - -#ifdef CONFIG_MACH_REMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REMA -# endif -# define machine_is_rema() (machine_arch_type == MACH_TYPE_REMA) -#else -# define machine_is_rema() (0) -#endif - -#ifdef CONFIG_MACH_BPS1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BPS1000 -# endif -# define machine_is_bps1000() (machine_arch_type == MACH_TYPE_BPS1000) -#else -# define machine_is_bps1000() (0) -#endif - -#ifdef CONFIG_MACH_HW90350 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW90350 -# endif -# define machine_is_hw90350() (machine_arch_type == MACH_TYPE_HW90350) -#else -# define machine_is_hw90350() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_3430SDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_3430SDP -# endif -# define machine_is_omap_3430sdp() (machine_arch_type == MACH_TYPE_OMAP_3430SDP) -#else -# define machine_is_omap_3430sdp() (0) -#endif - -#ifdef CONFIG_MACH_BLUETOUCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUETOUCH -# endif -# define machine_is_bluetouch() (machine_arch_type == MACH_TYPE_BLUETOUCH) -#else -# define machine_is_bluetouch() (0) -#endif - -#ifdef CONFIG_MACH_VSTMS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VSTMS -# endif -# define machine_is_vstms() (machine_arch_type == MACH_TYPE_VSTMS) -#else -# define machine_is_vstms() (0) -#endif - -#ifdef CONFIG_MACH_XSBASE270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XSBASE270 -# endif -# define machine_is_xsbase270() (machine_arch_type == MACH_TYPE_XSBASE270) -#else -# define machine_is_xsbase270() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9260EK_CN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9260EK_CN -# endif -# define machine_is_at91sam9260ek_cn() (machine_arch_type == MACH_TYPE_AT91SAM9260EK_CN) -#else -# define machine_is_at91sam9260ek_cn() (0) -#endif - -#ifdef CONFIG_MACH_ADSTURBOXB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSTURBOXB -# endif -# define machine_is_adsturboxb() (machine_arch_type == MACH_TYPE_ADSTURBOXB) -#else -# define machine_is_adsturboxb() (0) -#endif - -#ifdef CONFIG_MACH_OTI4110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OTI4110 -# endif -# define machine_is_oti4110() (machine_arch_type == MACH_TYPE_OTI4110) -#else -# define machine_is_oti4110() (0) -#endif - -#ifdef CONFIG_MACH_HME_PXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HME_PXA -# endif -# define machine_is_hme_pxa() (machine_arch_type == MACH_TYPE_HME_PXA) -#else -# define machine_is_hme_pxa() (0) -#endif - -#ifdef CONFIG_MACH_DEISTERDCA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEISTERDCA -# endif -# define machine_is_deisterdca() (machine_arch_type == MACH_TYPE_DEISTERDCA) -#else -# define machine_is_deisterdca() (0) -#endif - -#ifdef CONFIG_MACH_CES_SSEM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CES_SSEM2 -# endif -# define machine_is_ces_ssem2() (machine_arch_type == MACH_TYPE_CES_SSEM2) -#else -# define machine_is_ces_ssem2() (0) -#endif - -#ifdef CONFIG_MACH_CES_MTR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CES_MTR -# endif -# define machine_is_ces_mtr() (machine_arch_type == MACH_TYPE_CES_MTR) -#else -# define machine_is_ces_mtr() (0) -#endif - -#ifdef CONFIG_MACH_TDS_AVNG_SBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TDS_AVNG_SBC -# endif -# define machine_is_tds_avng_sbc() (machine_arch_type == MACH_TYPE_TDS_AVNG_SBC) -#else -# define machine_is_tds_avng_sbc() (0) -#endif - -#ifdef CONFIG_MACH_EVEREST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EVEREST -# endif -# define machine_is_everest() (machine_arch_type == MACH_TYPE_EVEREST) -#else -# define machine_is_everest() (0) -#endif - -#ifdef CONFIG_MACH_PNX4010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX4010 -# endif -# define machine_is_pnx4010() (machine_arch_type == MACH_TYPE_PNX4010) -#else -# define machine_is_pnx4010() (0) -#endif - -#ifdef CONFIG_MACH_OXNAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OXNAS -# endif -# define machine_is_oxnas() (machine_arch_type == MACH_TYPE_OXNAS) -#else -# define machine_is_oxnas() (0) -#endif - -#ifdef CONFIG_MACH_FIORI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FIORI -# endif -# define machine_is_fiori() (machine_arch_type == MACH_TYPE_FIORI) -#else -# define machine_is_fiori() (0) -#endif - -#ifdef CONFIG_MACH_ML1200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ML1200 -# endif -# define machine_is_ml1200() (machine_arch_type == MACH_TYPE_ML1200) -#else -# define machine_is_ml1200() (0) -#endif - -#ifdef CONFIG_MACH_PECOS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PECOS -# endif -# define machine_is_pecos() (machine_arch_type == MACH_TYPE_PECOS) -#else -# define machine_is_pecos() (0) -#endif - -#ifdef CONFIG_MACH_NB2XXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NB2XXX -# endif -# define machine_is_nb2xxx() (machine_arch_type == MACH_TYPE_NB2XXX) -#else -# define machine_is_nb2xxx() (0) -#endif - -#ifdef CONFIG_MACH_HW6900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW6900 -# endif -# define machine_is_hw6900() (machine_arch_type == MACH_TYPE_HW6900) -#else -# define machine_is_hw6900() (0) -#endif - -#ifdef CONFIG_MACH_CDCS_QUOLL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CDCS_QUOLL -# endif -# define machine_is_cdcs_quoll() (machine_arch_type == MACH_TYPE_CDCS_QUOLL) -#else -# define machine_is_cdcs_quoll() (0) -#endif - -#ifdef CONFIG_MACH_QUICKSILVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUICKSILVER -# endif -# define machine_is_quicksilver() (machine_arch_type == MACH_TYPE_QUICKSILVER) -#else -# define machine_is_quicksilver() (0) -#endif - -#ifdef CONFIG_MACH_UPLAT926 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UPLAT926 -# endif -# define machine_is_uplat926() (machine_arch_type == MACH_TYPE_UPLAT926) -#else -# define machine_is_uplat926() (0) -#endif - -#ifdef CONFIG_MACH_DEP2410_THOMAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEP2410_THOMAS -# endif -# define machine_is_dep2410_dep2410() (machine_arch_type == MACH_TYPE_DEP2410_THOMAS) -#else -# define machine_is_dep2410_dep2410() (0) -#endif - -#ifdef CONFIG_MACH_DTK2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DTK2410 -# endif -# define machine_is_dtk2410() (machine_arch_type == MACH_TYPE_DTK2410) -#else -# define machine_is_dtk2410() (0) -#endif - -#ifdef CONFIG_MACH_CHILI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHILI -# endif -# define machine_is_chili() (machine_arch_type == MACH_TYPE_CHILI) -#else -# define machine_is_chili() (0) -#endif - -#ifdef CONFIG_MACH_DEMETER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEMETER -# endif -# define machine_is_demeter() (machine_arch_type == MACH_TYPE_DEMETER) -#else -# define machine_is_demeter() (0) -#endif - -#ifdef CONFIG_MACH_DIONYSUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DIONYSUS -# endif -# define machine_is_dionysus() (machine_arch_type == MACH_TYPE_DIONYSUS) -#else -# define machine_is_dionysus() (0) -#endif - -#ifdef CONFIG_MACH_AS352X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AS352X -# endif -# define machine_is_as352x() (machine_arch_type == MACH_TYPE_AS352X) -#else -# define machine_is_as352x() (0) -#endif - -#ifdef CONFIG_MACH_SERVICE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SERVICE -# endif -# define machine_is_service() (machine_arch_type == MACH_TYPE_SERVICE) -#else -# define machine_is_service() (0) -#endif - -#ifdef CONFIG_MACH_CS_E9301 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CS_E9301 -# endif -# define machine_is_cs_e9301() (machine_arch_type == MACH_TYPE_CS_E9301) -#else -# define machine_is_cs_e9301() (0) -#endif - -#ifdef CONFIG_MACH_MICRO9M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICRO9M -# endif -# define machine_is_micro9m() (machine_arch_type == MACH_TYPE_MICRO9M) -#else -# define machine_is_micro9m() (0) -#endif - -#ifdef CONFIG_MACH_IA_MOSPCK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IA_MOSPCK -# endif -# define machine_is_ia_mospck() (machine_arch_type == MACH_TYPE_IA_MOSPCK) -#else -# define machine_is_ia_mospck() (0) -#endif - -#ifdef CONFIG_MACH_QL201B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QL201B -# endif -# define machine_is_ql201b() (machine_arch_type == MACH_TYPE_QL201B) -#else -# define machine_is_ql201b() (0) -#endif - -#ifdef CONFIG_MACH_BBM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BBM -# endif -# define machine_is_bbm() (machine_arch_type == MACH_TYPE_BBM) -#else -# define machine_is_bbm() (0) -#endif - -#ifdef CONFIG_MACH_EXXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXXX -# endif -# define machine_is_exxx() (machine_arch_type == MACH_TYPE_EXXX) -#else -# define machine_is_exxx() (0) -#endif - -#ifdef CONFIG_MACH_WMA11B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WMA11B -# endif -# define machine_is_wma11b() (machine_arch_type == MACH_TYPE_WMA11B) -#else -# define machine_is_wma11b() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_ATLAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_ATLAS -# endif -# define machine_is_pelco_atlas() (machine_arch_type == MACH_TYPE_PELCO_ATLAS) -#else -# define machine_is_pelco_atlas() (0) -#endif - -#ifdef CONFIG_MACH_G500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G500 -# endif -# define machine_is_g500() (machine_arch_type == MACH_TYPE_G500) -#else -# define machine_is_g500() (0) -#endif - -#ifdef CONFIG_MACH_BUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUG -# endif -# define machine_is_bug() (machine_arch_type == MACH_TYPE_BUG) -#else -# define machine_is_bug() (0) -#endif - -#ifdef CONFIG_MACH_MX33ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX33ADS -# endif -# define machine_is_mx33ads() (machine_arch_type == MACH_TYPE_MX33ADS) -#else -# define machine_is_mx33ads() (0) -#endif - -#ifdef CONFIG_MACH_CHUB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHUB -# endif -# define machine_is_chub() (machine_arch_type == MACH_TYPE_CHUB) -#else -# define machine_is_chub() (0) -#endif - -#ifdef CONFIG_MACH_NEO1973_GTA01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEO1973_GTA01 -# endif -# define machine_is_neo1973_gta01() (machine_arch_type == MACH_TYPE_NEO1973_GTA01) -#else -# define machine_is_neo1973_gta01() (0) -#endif - -#ifdef CONFIG_MACH_W90N740 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90N740 -# endif -# define machine_is_w90n740() (machine_arch_type == MACH_TYPE_W90N740) -#else -# define machine_is_w90n740() (0) -#endif - -#ifdef CONFIG_MACH_MEDALLION_SA2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEDALLION_SA2410 -# endif -# define machine_is_medallion_sa2410() (machine_arch_type == MACH_TYPE_MEDALLION_SA2410) -#else -# define machine_is_medallion_sa2410() (0) -#endif - -#ifdef CONFIG_MACH_IA_CPU_9200_2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IA_CPU_9200_2 -# endif -# define machine_is_ia_cpu_9200_2() (machine_arch_type == MACH_TYPE_IA_CPU_9200_2) -#else -# define machine_is_ia_cpu_9200_2() (0) -#endif - -#ifdef CONFIG_MACH_DIMMRM9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DIMMRM9200 -# endif -# define machine_is_dimmrm9200() (machine_arch_type == MACH_TYPE_DIMMRM9200) -#else -# define machine_is_dimmrm9200() (0) -#endif - -#ifdef CONFIG_MACH_PM9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PM9261 -# endif -# define machine_is_pm9261() (machine_arch_type == MACH_TYPE_PM9261) -#else -# define machine_is_pm9261() (0) -#endif - -#ifdef CONFIG_MACH_ML7304 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ML7304 -# endif -# define machine_is_ml7304() (machine_arch_type == MACH_TYPE_ML7304) -#else -# define machine_is_ml7304() (0) -#endif - -#ifdef CONFIG_MACH_UCP250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UCP250 -# endif -# define machine_is_ucp250() (machine_arch_type == MACH_TYPE_UCP250) -#else -# define machine_is_ucp250() (0) -#endif - -#ifdef CONFIG_MACH_INTBOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INTBOARD -# endif -# define machine_is_intboard() (machine_arch_type == MACH_TYPE_INTBOARD) -#else -# define machine_is_intboard() (0) -#endif - -#ifdef CONFIG_MACH_GULFSTREAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GULFSTREAM -# endif -# define machine_is_gulfstream() (machine_arch_type == MACH_TYPE_GULFSTREAM) -#else -# define machine_is_gulfstream() (0) -#endif - -#ifdef CONFIG_MACH_LABQUEST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LABQUEST -# endif -# define machine_is_labquest() (machine_arch_type == MACH_TYPE_LABQUEST) -#else -# define machine_is_labquest() (0) -#endif - -#ifdef CONFIG_MACH_VCMX313 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VCMX313 -# endif -# define machine_is_vcmx313() (machine_arch_type == MACH_TYPE_VCMX313) -#else -# define machine_is_vcmx313() (0) -#endif - -#ifdef CONFIG_MACH_URG200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_URG200 -# endif -# define machine_is_urg200() (machine_arch_type == MACH_TYPE_URG200) -#else -# define machine_is_urg200() (0) -#endif - -#ifdef CONFIG_MACH_CPUX255LCDNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUX255LCDNET -# endif -# define machine_is_cpux255lcdnet() (machine_arch_type == MACH_TYPE_CPUX255LCDNET) -#else -# define machine_is_cpux255lcdnet() (0) -#endif - -#ifdef CONFIG_MACH_NETDCU9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETDCU9 -# endif -# define machine_is_netdcu9() (machine_arch_type == MACH_TYPE_NETDCU9) -#else -# define machine_is_netdcu9() (0) -#endif - -#ifdef CONFIG_MACH_NETDCU10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETDCU10 -# endif -# define machine_is_netdcu10() (machine_arch_type == MACH_TYPE_NETDCU10) -#else -# define machine_is_netdcu10() (0) -#endif - -#ifdef CONFIG_MACH_DSPG_DGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSPG_DGA -# endif -# define machine_is_dspg_dga() (machine_arch_type == MACH_TYPE_DSPG_DGA) -#else -# define machine_is_dspg_dga() (0) -#endif - -#ifdef CONFIG_MACH_DSPG_DVW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSPG_DVW -# endif -# define machine_is_dspg_dvw() (machine_arch_type == MACH_TYPE_DSPG_DVW) -#else -# define machine_is_dspg_dvw() (0) -#endif - -#ifdef CONFIG_MACH_SOLOS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOLOS -# endif -# define machine_is_solos() (machine_arch_type == MACH_TYPE_SOLOS) -#else -# define machine_is_solos() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9263EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9263EK -# endif -# define machine_is_at91sam9263ek() (machine_arch_type == MACH_TYPE_AT91SAM9263EK) -#else -# define machine_is_at91sam9263ek() (0) -#endif - -#ifdef CONFIG_MACH_OSSTBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OSSTBOX -# endif -# define machine_is_osstbox() (machine_arch_type == MACH_TYPE_OSSTBOX) -#else -# define machine_is_osstbox() (0) -#endif - -#ifdef CONFIG_MACH_KBAT9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KBAT9261 -# endif -# define machine_is_kbat9261() (machine_arch_type == MACH_TYPE_KBAT9261) -#else -# define machine_is_kbat9261() (0) -#endif - -#ifdef CONFIG_MACH_CT1100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CT1100 -# endif -# define machine_is_ct1100() (machine_arch_type == MACH_TYPE_CT1100) -#else -# define machine_is_ct1100() (0) -#endif - -#ifdef CONFIG_MACH_AKCPPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AKCPPXA -# endif -# define machine_is_akcppxa() (machine_arch_type == MACH_TYPE_AKCPPXA) -#else -# define machine_is_akcppxa() (0) -#endif - -#ifdef CONFIG_MACH_OCHAYA1020 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCHAYA1020 -# endif -# define machine_is_ochaya1020() (machine_arch_type == MACH_TYPE_OCHAYA1020) -#else -# define machine_is_ochaya1020() (0) -#endif - -#ifdef CONFIG_MACH_HITRACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HITRACK -# endif -# define machine_is_hitrack() (machine_arch_type == MACH_TYPE_HITRACK) -#else -# define machine_is_hitrack() (0) -#endif - -#ifdef CONFIG_MACH_SYME1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYME1 -# endif -# define machine_is_syme1() (machine_arch_type == MACH_TYPE_SYME1) -#else -# define machine_is_syme1() (0) -#endif - -#ifdef CONFIG_MACH_SYHL1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYHL1 -# endif -# define machine_is_syhl1() (machine_arch_type == MACH_TYPE_SYHL1) -#else -# define machine_is_syhl1() (0) -#endif - -#ifdef CONFIG_MACH_EMPCA400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMPCA400 -# endif -# define machine_is_empca400() (machine_arch_type == MACH_TYPE_EMPCA400) -#else -# define machine_is_empca400() (0) -#endif - -#ifdef CONFIG_MACH_EM7210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EM7210 -# endif -# define machine_is_em7210() (machine_arch_type == MACH_TYPE_EM7210) -#else -# define machine_is_em7210() (0) -#endif - -#ifdef CONFIG_MACH_HTCHERMES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCHERMES -# endif -# define machine_is_htchermes() (machine_arch_type == MACH_TYPE_HTCHERMES) -#else -# define machine_is_htchermes() (0) -#endif - -#ifdef CONFIG_MACH_ETI_C1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETI_C1 -# endif -# define machine_is_eti_c1() (machine_arch_type == MACH_TYPE_ETI_C1) -#else -# define machine_is_eti_c1() (0) -#endif - -#ifdef CONFIG_MACH_AC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AC100 -# endif -# define machine_is_ac100() (machine_arch_type == MACH_TYPE_AC100) -#else -# define machine_is_ac100() (0) -#endif - -#ifdef CONFIG_MACH_SNEETCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNEETCH -# endif -# define machine_is_sneetch() (machine_arch_type == MACH_TYPE_SNEETCH) -#else -# define machine_is_sneetch() (0) -#endif - -#ifdef CONFIG_MACH_STUDENTMATE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STUDENTMATE -# endif -# define machine_is_studentmate() (machine_arch_type == MACH_TYPE_STUDENTMATE) -#else -# define machine_is_studentmate() (0) -#endif - -#ifdef CONFIG_MACH_ZIR2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIR2410 -# endif -# define machine_is_zir2410() (machine_arch_type == MACH_TYPE_ZIR2410) -#else -# define machine_is_zir2410() (0) -#endif - -#ifdef CONFIG_MACH_ZIR2413 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIR2413 -# endif -# define machine_is_zir2413() (machine_arch_type == MACH_TYPE_ZIR2413) -#else -# define machine_is_zir2413() (0) -#endif - -#ifdef CONFIG_MACH_DLONIP3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DLONIP3 -# endif -# define machine_is_dlonip3() (machine_arch_type == MACH_TYPE_DLONIP3) -#else -# define machine_is_dlonip3() (0) -#endif - -#ifdef CONFIG_MACH_INSTREAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INSTREAM -# endif -# define machine_is_instream() (machine_arch_type == MACH_TYPE_INSTREAM) -#else -# define machine_is_instream() (0) -#endif - -#ifdef CONFIG_MACH_AMBARELLA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AMBARELLA -# endif -# define machine_is_ambarella() (machine_arch_type == MACH_TYPE_AMBARELLA) -#else -# define machine_is_ambarella() (0) -#endif - -#ifdef CONFIG_MACH_NEVIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEVIS -# endif -# define machine_is_nevis() (machine_arch_type == MACH_TYPE_NEVIS) -#else -# define machine_is_nevis() (0) -#endif - -#ifdef CONFIG_MACH_HTC_TRINITY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_TRINITY -# endif -# define machine_is_htc_trinity() (machine_arch_type == MACH_TYPE_HTC_TRINITY) -#else -# define machine_is_htc_trinity() (0) -#endif - -#ifdef CONFIG_MACH_QL202B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QL202B -# endif -# define machine_is_ql202b() (machine_arch_type == MACH_TYPE_QL202B) -#else -# define machine_is_ql202b() (0) -#endif - -#ifdef CONFIG_MACH_VPAC270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPAC270 -# endif -# define machine_is_vpac270() (machine_arch_type == MACH_TYPE_VPAC270) -#else -# define machine_is_vpac270() (0) -#endif - -#ifdef CONFIG_MACH_RD129 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD129 -# endif -# define machine_is_rd129() (machine_arch_type == MACH_TYPE_RD129) -#else -# define machine_is_rd129() (0) -#endif - -#ifdef CONFIG_MACH_HTCWIZARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCWIZARD -# endif -# define machine_is_htcwizard() (machine_arch_type == MACH_TYPE_HTCWIZARD) -#else -# define machine_is_htcwizard() (0) -#endif - -#ifdef CONFIG_MACH_TREO680 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO680 -# endif -# define machine_is_treo680() (machine_arch_type == MACH_TYPE_TREO680) -#else -# define machine_is_treo680() (0) -#endif - -#ifdef CONFIG_MACH_TECON_TMEZON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TECON_TMEZON -# endif -# define machine_is_tecon_tmezon() (machine_arch_type == MACH_TYPE_TECON_TMEZON) -#else -# define machine_is_tecon_tmezon() (0) -#endif - -#ifdef CONFIG_MACH_ZYLONITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZYLONITE -# endif -# define machine_is_zylonite() (machine_arch_type == MACH_TYPE_ZYLONITE) -#else -# define machine_is_zylonite() (0) -#endif - -#ifdef CONFIG_MACH_GENE1270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GENE1270 -# endif -# define machine_is_gene1270() (machine_arch_type == MACH_TYPE_GENE1270) -#else -# define machine_is_gene1270() (0) -#endif - -#ifdef CONFIG_MACH_ZIR2412 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIR2412 -# endif -# define machine_is_zir2412() (machine_arch_type == MACH_TYPE_ZIR2412) -#else -# define machine_is_zir2412() (0) -#endif - -#ifdef CONFIG_MACH_MX31LITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31LITE -# endif -# define machine_is_mx31lite() (machine_arch_type == MACH_TYPE_MX31LITE) -#else -# define machine_is_mx31lite() (0) -#endif - -#ifdef CONFIG_MACH_T700WX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T700WX -# endif -# define machine_is_t700wx() (machine_arch_type == MACH_TYPE_T700WX) -#else -# define machine_is_t700wx() (0) -#endif - -#ifdef CONFIG_MACH_VF100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VF100 -# endif -# define machine_is_vf100() (machine_arch_type == MACH_TYPE_VF100) -#else -# define machine_is_vf100() (0) -#endif - -#ifdef CONFIG_MACH_NSB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSB2 -# endif -# define machine_is_nsb2() (machine_arch_type == MACH_TYPE_NSB2) -#else -# define machine_is_nsb2() (0) -#endif - -#ifdef CONFIG_MACH_NXHMI_BB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXHMI_BB -# endif -# define machine_is_nxhmi_bb() (machine_arch_type == MACH_TYPE_NXHMI_BB) -#else -# define machine_is_nxhmi_bb() (0) -#endif - -#ifdef CONFIG_MACH_NXHMI_RE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXHMI_RE -# endif -# define machine_is_nxhmi_re() (machine_arch_type == MACH_TYPE_NXHMI_RE) -#else -# define machine_is_nxhmi_re() (0) -#endif - -#ifdef CONFIG_MACH_N4100PRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N4100PRO -# endif -# define machine_is_n4100pro() (machine_arch_type == MACH_TYPE_N4100PRO) -#else -# define machine_is_n4100pro() (0) -#endif - -#ifdef CONFIG_MACH_SAM9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAM9260 -# endif -# define machine_is_sam9260() (machine_arch_type == MACH_TYPE_SAM9260) -#else -# define machine_is_sam9260() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_TREO600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_TREO600 -# endif -# define machine_is_omap_treo600() (machine_arch_type == MACH_TYPE_OMAP_TREO600) -#else -# define machine_is_omap_treo600() (0) -#endif - -#ifdef CONFIG_MACH_INDY2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INDY2410 -# endif -# define machine_is_indy2410() (machine_arch_type == MACH_TYPE_INDY2410) -#else -# define machine_is_indy2410() (0) -#endif - -#ifdef CONFIG_MACH_NELT_A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NELT_A -# endif -# define machine_is_nelt_a() (machine_arch_type == MACH_TYPE_NELT_A) -#else -# define machine_is_nelt_a() (0) -#endif - -#ifdef CONFIG_MACH_N311 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_N311 -# endif -# define machine_is_n311() (machine_arch_type == MACH_TYPE_N311) -#else -# define machine_is_n311() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9260VGK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9260VGK -# endif -# define machine_is_at91sam9260vgk() (machine_arch_type == MACH_TYPE_AT91SAM9260VGK) -#else -# define machine_is_at91sam9260vgk() (0) -#endif - -#ifdef CONFIG_MACH_AT91LEPPE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91LEPPE -# endif -# define machine_is_at91leppe() (machine_arch_type == MACH_TYPE_AT91LEPPE) -#else -# define machine_is_at91leppe() (0) -#endif - -#ifdef CONFIG_MACH_AT91LEPCCN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91LEPCCN -# endif -# define machine_is_at91lepccn() (machine_arch_type == MACH_TYPE_AT91LEPCCN) -#else -# define machine_is_at91lepccn() (0) -#endif - -#ifdef CONFIG_MACH_APC7100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APC7100 -# endif -# define machine_is_apc7100() (machine_arch_type == MACH_TYPE_APC7100) -#else -# define machine_is_apc7100() (0) -#endif - -#ifdef CONFIG_MACH_STARGAZER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STARGAZER -# endif -# define machine_is_stargazer() (machine_arch_type == MACH_TYPE_STARGAZER) -#else -# define machine_is_stargazer() (0) -#endif - -#ifdef CONFIG_MACH_SONATA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SONATA -# endif -# define machine_is_sonata() (machine_arch_type == MACH_TYPE_SONATA) -#else -# define machine_is_sonata() (0) -#endif - -#ifdef CONFIG_MACH_SCHMOOGIE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCHMOOGIE -# endif -# define machine_is_schmoogie() (machine_arch_type == MACH_TYPE_SCHMOOGIE) -#else -# define machine_is_schmoogie() (0) -#endif - -#ifdef CONFIG_MACH_AZTOOL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AZTOOL -# endif -# define machine_is_aztool() (machine_arch_type == MACH_TYPE_AZTOOL) -#else -# define machine_is_aztool() (0) -#endif - -#ifdef CONFIG_MACH_MIOA701 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIOA701 -# endif -# define machine_is_mioa701() (machine_arch_type == MACH_TYPE_MIOA701) -#else -# define machine_is_mioa701() (0) -#endif - -#ifdef CONFIG_MACH_SXNI9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SXNI9260 -# endif -# define machine_is_sxni9260() (machine_arch_type == MACH_TYPE_SXNI9260) -#else -# define machine_is_sxni9260() (0) -#endif - -#ifdef CONFIG_MACH_MXC27520EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC27520EVB -# endif -# define machine_is_mxc27520evb() (machine_arch_type == MACH_TYPE_MXC27520EVB) -#else -# define machine_is_mxc27520evb() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO5X0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO5X0 -# endif -# define machine_is_armadillo5x0() (machine_arch_type == MACH_TYPE_ARMADILLO5X0) -#else -# define machine_is_armadillo5x0() (0) -#endif - -#ifdef CONFIG_MACH_MB9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB9260 -# endif -# define machine_is_mb9260() (machine_arch_type == MACH_TYPE_MB9260) -#else -# define machine_is_mb9260() (0) -#endif - -#ifdef CONFIG_MACH_MB9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB9263 -# endif -# define machine_is_mb9263() (machine_arch_type == MACH_TYPE_MB9263) -#else -# define machine_is_mb9263() (0) -#endif - -#ifdef CONFIG_MACH_IPAC9302 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPAC9302 -# endif -# define machine_is_ipac9302() (machine_arch_type == MACH_TYPE_IPAC9302) -#else -# define machine_is_ipac9302() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9360JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9360JS -# endif -# define machine_is_cc9p9360js() (machine_arch_type == MACH_TYPE_CC9P9360JS) -#else -# define machine_is_cc9p9360js() (0) -#endif - -#ifdef CONFIG_MACH_GALLIUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GALLIUM -# endif -# define machine_is_gallium() (machine_arch_type == MACH_TYPE_GALLIUM) -#else -# define machine_is_gallium() (0) -#endif - -#ifdef CONFIG_MACH_MSC2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSC2410 -# endif -# define machine_is_msc2410() (machine_arch_type == MACH_TYPE_MSC2410) -#else -# define machine_is_msc2410() (0) -#endif - -#ifdef CONFIG_MACH_GHI270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GHI270 -# endif -# define machine_is_ghi270() (machine_arch_type == MACH_TYPE_GHI270) -#else -# define machine_is_ghi270() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_LEONARDO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_LEONARDO -# endif -# define machine_is_davinci_leonardo() (machine_arch_type == MACH_TYPE_DAVINCI_LEONARDO) -#else -# define machine_is_davinci_leonardo() (0) -#endif - -#ifdef CONFIG_MACH_OIAB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OIAB -# endif -# define machine_is_oiab() (machine_arch_type == MACH_TYPE_OIAB) -#else -# define machine_is_oiab() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6400 -# endif -# define machine_is_smdk6400() (machine_arch_type == MACH_TYPE_SMDK6400) -#else -# define machine_is_smdk6400() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA_N800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA_N800 -# endif -# define machine_is_nokia_n800() (machine_arch_type == MACH_TYPE_NOKIA_N800) -#else -# define machine_is_nokia_n800() (0) -#endif - -#ifdef CONFIG_MACH_GREENPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GREENPHONE -# endif -# define machine_is_greenphone() (machine_arch_type == MACH_TYPE_GREENPHONE) -#else -# define machine_is_greenphone() (0) -#endif - -#ifdef CONFIG_MACH_COMPEXWP18 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMPEXWP18 -# endif -# define machine_is_compex42x() (machine_arch_type == MACH_TYPE_COMPEXWP18) -#else -# define machine_is_compex42x() (0) -#endif - -#ifdef CONFIG_MACH_XMATE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XMATE -# endif -# define machine_is_xmate() (machine_arch_type == MACH_TYPE_XMATE) -#else -# define machine_is_xmate() (0) -#endif - -#ifdef CONFIG_MACH_ENERGIZER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENERGIZER -# endif -# define machine_is_energizer() (machine_arch_type == MACH_TYPE_ENERGIZER) -#else -# define machine_is_energizer() (0) -#endif - -#ifdef CONFIG_MACH_IME1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IME1 -# endif -# define machine_is_ime1() (machine_arch_type == MACH_TYPE_IME1) -#else -# define machine_is_ime1() (0) -#endif - -#ifdef CONFIG_MACH_SWEDATMS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWEDATMS -# endif -# define machine_is_sweda_tms() (machine_arch_type == MACH_TYPE_SWEDATMS) -#else -# define machine_is_sweda_tms() (0) -#endif - -#ifdef CONFIG_MACH_NTNP435C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NTNP435C -# endif -# define machine_is_ntnp435c() (machine_arch_type == MACH_TYPE_NTNP435C) -#else -# define machine_is_ntnp435c() (0) -#endif - -#ifdef CONFIG_MACH_SPECTRO2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPECTRO2 -# endif -# define machine_is_spectro2() (machine_arch_type == MACH_TYPE_SPECTRO2) -#else -# define machine_is_spectro2() (0) -#endif - -#ifdef CONFIG_MACH_H6039 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6039 -# endif -# define machine_is_h6039() (machine_arch_type == MACH_TYPE_H6039) -#else -# define machine_is_h6039() (0) -#endif - -#ifdef CONFIG_MACH_EP80219 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EP80219 -# endif -# define machine_is_ep80219() (machine_arch_type == MACH_TYPE_EP80219) -#else -# define machine_is_ep80219() (0) -#endif - -#ifdef CONFIG_MACH_SAMOA_II -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAMOA_II -# endif -# define machine_is_samoa_ii() (machine_arch_type == MACH_TYPE_SAMOA_II) -#else -# define machine_is_samoa_ii() (0) -#endif - -#ifdef CONFIG_MACH_CWMXL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWMXL -# endif -# define machine_is_cwmxl() (machine_arch_type == MACH_TYPE_CWMXL) -#else -# define machine_is_cwmxl() (0) -#endif - -#ifdef CONFIG_MACH_AS9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AS9200 -# endif -# define machine_is_as9200() (machine_arch_type == MACH_TYPE_AS9200) -#else -# define machine_is_as9200() (0) -#endif - -#ifdef CONFIG_MACH_SFX1149 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SFX1149 -# endif -# define machine_is_sfx1149() (machine_arch_type == MACH_TYPE_SFX1149) -#else -# define machine_is_sfx1149() (0) -#endif - -#ifdef CONFIG_MACH_NAVI010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAVI010 -# endif -# define machine_is_navi010() (machine_arch_type == MACH_TYPE_NAVI010) -#else -# define machine_is_navi010() (0) -#endif - -#ifdef CONFIG_MACH_MULTMDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTMDP -# endif -# define machine_is_multmdp() (machine_arch_type == MACH_TYPE_MULTMDP) -#else -# define machine_is_multmdp() (0) -#endif - -#ifdef CONFIG_MACH_SCB9520 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCB9520 -# endif -# define machine_is_scb9520() (machine_arch_type == MACH_TYPE_SCB9520) -#else -# define machine_is_scb9520() (0) -#endif - -#ifdef CONFIG_MACH_HTCATHENA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCATHENA -# endif -# define machine_is_htcathena() (machine_arch_type == MACH_TYPE_HTCATHENA) -#else -# define machine_is_htcathena() (0) -#endif - -#ifdef CONFIG_MACH_XP179 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XP179 -# endif -# define machine_is_xp179() (machine_arch_type == MACH_TYPE_XP179) -#else -# define machine_is_xp179() (0) -#endif - -#ifdef CONFIG_MACH_H4300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H4300 -# endif -# define machine_is_h4300() (machine_arch_type == MACH_TYPE_H4300) -#else -# define machine_is_h4300() (0) -#endif - -#ifdef CONFIG_MACH_GORAMO_MLR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GORAMO_MLR -# endif -# define machine_is_goramo_mlr() (machine_arch_type == MACH_TYPE_GORAMO_MLR) -#else -# define machine_is_goramo_mlr() (0) -#endif - -#ifdef CONFIG_MACH_MXC30020EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC30020EVB -# endif -# define machine_is_mxc30020evb() (machine_arch_type == MACH_TYPE_MXC30020EVB) -#else -# define machine_is_mxc30020evb() (0) -#endif - -#ifdef CONFIG_MACH_ADSBITSYG5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSBITSYG5 -# endif -# define machine_is_adsbitsyg5() (machine_arch_type == MACH_TYPE_ADSBITSYG5) -#else -# define machine_is_adsbitsyg5() (0) -#endif - -#ifdef CONFIG_MACH_ADSPORTALPLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSPORTALPLUS -# endif -# define machine_is_adsportalplus() (machine_arch_type == MACH_TYPE_ADSPORTALPLUS) -#else -# define machine_is_adsportalplus() (0) -#endif - -#ifdef CONFIG_MACH_MMSP2PLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMSP2PLUS -# endif -# define machine_is_mmsp2plus() (machine_arch_type == MACH_TYPE_MMSP2PLUS) -#else -# define machine_is_mmsp2plus() (0) -#endif - -#ifdef CONFIG_MACH_EM_X270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EM_X270 -# endif -# define machine_is_em_x270() (machine_arch_type == MACH_TYPE_EM_X270) -#else -# define machine_is_em_x270() (0) -#endif - -#ifdef CONFIG_MACH_TPP302 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPP302 -# endif -# define machine_is_tpp302() (machine_arch_type == MACH_TYPE_TPP302) -#else -# define machine_is_tpp302() (0) -#endif - -#ifdef CONFIG_MACH_TPM104 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPM104 -# endif -# define machine_is_tpp104() (machine_arch_type == MACH_TYPE_TPM104) -#else -# define machine_is_tpp104() (0) -#endif - -#ifdef CONFIG_MACH_TPM102 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPM102 -# endif -# define machine_is_tpm102() (machine_arch_type == MACH_TYPE_TPM102) -#else -# define machine_is_tpm102() (0) -#endif - -#ifdef CONFIG_MACH_TPM109 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPM109 -# endif -# define machine_is_tpm109() (machine_arch_type == MACH_TYPE_TPM109) -#else -# define machine_is_tpm109() (0) -#endif - -#ifdef CONFIG_MACH_FBXO1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FBXO1 -# endif -# define machine_is_fbxo1() (machine_arch_type == MACH_TYPE_FBXO1) -#else -# define machine_is_fbxo1() (0) -#endif - -#ifdef CONFIG_MACH_HXD8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HXD8 -# endif -# define machine_is_hxd8() (machine_arch_type == MACH_TYPE_HXD8) -#else -# define machine_is_hxd8() (0) -#endif - -#ifdef CONFIG_MACH_NEO1973_GTA02 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEO1973_GTA02 -# endif -# define machine_is_neo1973_gta02() (machine_arch_type == MACH_TYPE_NEO1973_GTA02) -#else -# define machine_is_neo1973_gta02() (0) -#endif - -#ifdef CONFIG_MACH_EMTEST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMTEST -# endif -# define machine_is_emtest() (machine_arch_type == MACH_TYPE_EMTEST) -#else -# define machine_is_emtest() (0) -#endif - -#ifdef CONFIG_MACH_AD6900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AD6900 -# endif -# define machine_is_ad6900() (machine_arch_type == MACH_TYPE_AD6900) -#else -# define machine_is_ad6900() (0) -#endif - -#ifdef CONFIG_MACH_EUROPA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EUROPA -# endif -# define machine_is_europa() (machine_arch_type == MACH_TYPE_EUROPA) -#else -# define machine_is_europa() (0) -#endif - -#ifdef CONFIG_MACH_METROCONNECT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_METROCONNECT -# endif -# define machine_is_metroconnect() (machine_arch_type == MACH_TYPE_METROCONNECT) -#else -# define machine_is_metroconnect() (0) -#endif - -#ifdef CONFIG_MACH_EZ_S2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_S2410 -# endif -# define machine_is_ez_s2410() (machine_arch_type == MACH_TYPE_EZ_S2410) -#else -# define machine_is_ez_s2410() (0) -#endif - -#ifdef CONFIG_MACH_EZ_S2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_S2440 -# endif -# define machine_is_ez_s2440() (machine_arch_type == MACH_TYPE_EZ_S2440) -#else -# define machine_is_ez_s2440() (0) -#endif - -#ifdef CONFIG_MACH_EZ_EP9312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_EP9312 -# endif -# define machine_is_ez_ep9312() (machine_arch_type == MACH_TYPE_EZ_EP9312) -#else -# define machine_is_ez_ep9312() (0) -#endif - -#ifdef CONFIG_MACH_EZ_EP9315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_EP9315 -# endif -# define machine_is_ez_ep9315() (machine_arch_type == MACH_TYPE_EZ_EP9315) -#else -# define machine_is_ez_ep9315() (0) -#endif - -#ifdef CONFIG_MACH_EZ_X7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZ_X7 -# endif -# define machine_is_ez_x7() (machine_arch_type == MACH_TYPE_EZ_X7) -#else -# define machine_is_ez_x7() (0) -#endif - -#ifdef CONFIG_MACH_GODOTDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GODOTDB -# endif -# define machine_is_godotdb() (machine_arch_type == MACH_TYPE_GODOTDB) -#else -# define machine_is_godotdb() (0) -#endif - -#ifdef CONFIG_MACH_MISTRAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MISTRAL -# endif -# define machine_is_mistral() (machine_arch_type == MACH_TYPE_MISTRAL) -#else -# define machine_is_mistral() (0) -#endif - -#ifdef CONFIG_MACH_MSM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM -# endif -# define machine_is_msm() (machine_arch_type == MACH_TYPE_MSM) -#else -# define machine_is_msm() (0) -#endif - -#ifdef CONFIG_MACH_CT5910 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CT5910 -# endif -# define machine_is_ct5910() (machine_arch_type == MACH_TYPE_CT5910) -#else -# define machine_is_ct5910() (0) -#endif - -#ifdef CONFIG_MACH_CT5912 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CT5912 -# endif -# define machine_is_ct5912() (machine_arch_type == MACH_TYPE_CT5912) -#else -# define machine_is_ct5912() (0) -#endif - -#ifdef CONFIG_MACH_HYNET_INE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HYNET_INE -# endif -# define machine_is_hynet_ine() (machine_arch_type == MACH_TYPE_HYNET_INE) -#else -# define machine_is_hynet_ine() (0) -#endif - -#ifdef CONFIG_MACH_HYNET_APP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HYNET_APP -# endif -# define machine_is_hynet_app() (machine_arch_type == MACH_TYPE_HYNET_APP) -#else -# define machine_is_hynet_app() (0) -#endif - -#ifdef CONFIG_MACH_MSM7200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7200 -# endif -# define machine_is_msm7200() (machine_arch_type == MACH_TYPE_MSM7200) -#else -# define machine_is_msm7200() (0) -#endif - -#ifdef CONFIG_MACH_MSM7600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7600 -# endif -# define machine_is_msm7600() (machine_arch_type == MACH_TYPE_MSM7600) -#else -# define machine_is_msm7600() (0) -#endif - -#ifdef CONFIG_MACH_CEB255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CEB255 -# endif -# define machine_is_ceb255() (machine_arch_type == MACH_TYPE_CEB255) -#else -# define machine_is_ceb255() (0) -#endif - -#ifdef CONFIG_MACH_CIEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CIEL -# endif -# define machine_is_ciel() (machine_arch_type == MACH_TYPE_CIEL) -#else -# define machine_is_ciel() (0) -#endif - -#ifdef CONFIG_MACH_SLM5650 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SLM5650 -# endif -# define machine_is_slm5650() (machine_arch_type == MACH_TYPE_SLM5650) -#else -# define machine_is_slm5650() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9RLEK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9RLEK -# endif -# define machine_is_at91sam9rlek() (machine_arch_type == MACH_TYPE_AT91SAM9RLEK) -#else -# define machine_is_at91sam9rlek() (0) -#endif - -#ifdef CONFIG_MACH_COMTECH_ROUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMTECH_ROUTER -# endif -# define machine_is_comtech_router() (machine_arch_type == MACH_TYPE_COMTECH_ROUTER) -#else -# define machine_is_comtech_router() (0) -#endif - -#ifdef CONFIG_MACH_SBC2410X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC2410X -# endif -# define machine_is_sbc2410x() (machine_arch_type == MACH_TYPE_SBC2410X) -#else -# define machine_is_sbc2410x() (0) -#endif - -#ifdef CONFIG_MACH_AT4X0BD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT4X0BD -# endif -# define machine_is_at4x0bd() (machine_arch_type == MACH_TYPE_AT4X0BD) -#else -# define machine_is_at4x0bd() (0) -#endif - -#ifdef CONFIG_MACH_CBIFR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CBIFR -# endif -# define machine_is_cbifr() (machine_arch_type == MACH_TYPE_CBIFR) -#else -# define machine_is_cbifr() (0) -#endif - -#ifdef CONFIG_MACH_ARCOM_QUANTUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCOM_QUANTUM -# endif -# define machine_is_arcom_quantum() (machine_arch_type == MACH_TYPE_ARCOM_QUANTUM) -#else -# define machine_is_arcom_quantum() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX520 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX520 -# endif -# define machine_is_matrix520() (machine_arch_type == MACH_TYPE_MATRIX520) -#else -# define machine_is_matrix520() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX510 -# endif -# define machine_is_matrix510() (machine_arch_type == MACH_TYPE_MATRIX510) -#else -# define machine_is_matrix510() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX500 -# endif -# define machine_is_matrix500() (machine_arch_type == MACH_TYPE_MATRIX500) -#else -# define machine_is_matrix500() (0) -#endif - -#ifdef CONFIG_MACH_M501 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M501 -# endif -# define machine_is_m501() (machine_arch_type == MACH_TYPE_M501) -#else -# define machine_is_m501() (0) -#endif - -#ifdef CONFIG_MACH_AAEON1270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AAEON1270 -# endif -# define machine_is_aaeon1270() (machine_arch_type == MACH_TYPE_AAEON1270) -#else -# define machine_is_aaeon1270() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX500EV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX500EV -# endif -# define machine_is_matrix500ev() (machine_arch_type == MACH_TYPE_MATRIX500EV) -#else -# define machine_is_matrix500ev() (0) -#endif - -#ifdef CONFIG_MACH_PAC500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PAC500 -# endif -# define machine_is_pac500() (machine_arch_type == MACH_TYPE_PAC500) -#else -# define machine_is_pac500() (0) -#endif - -#ifdef CONFIG_MACH_PNX8181 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNX8181 -# endif -# define machine_is_pnx8181() (machine_arch_type == MACH_TYPE_PNX8181) -#else -# define machine_is_pnx8181() (0) -#endif - -#ifdef CONFIG_MACH_COLIBRI320 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COLIBRI320 -# endif -# define machine_is_colibri320() (machine_arch_type == MACH_TYPE_COLIBRI320) -#else -# define machine_is_colibri320() (0) -#endif - -#ifdef CONFIG_MACH_AZTOOLBB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AZTOOLBB -# endif -# define machine_is_aztoolbb() (machine_arch_type == MACH_TYPE_AZTOOLBB) -#else -# define machine_is_aztoolbb() (0) -#endif - -#ifdef CONFIG_MACH_AZTOOLG2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AZTOOLG2 -# endif -# define machine_is_aztoolg2() (machine_arch_type == MACH_TYPE_AZTOOLG2) -#else -# define machine_is_aztoolg2() (0) -#endif - -#ifdef CONFIG_MACH_DVLHOST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DVLHOST -# endif -# define machine_is_dvlhost() (machine_arch_type == MACH_TYPE_DVLHOST) -#else -# define machine_is_dvlhost() (0) -#endif - -#ifdef CONFIG_MACH_ZIR9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIR9200 -# endif -# define machine_is_zir9200() (machine_arch_type == MACH_TYPE_ZIR9200) -#else -# define machine_is_zir9200() (0) -#endif - -#ifdef CONFIG_MACH_ZIR9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIR9260 -# endif -# define machine_is_zir9260() (machine_arch_type == MACH_TYPE_ZIR9260) -#else -# define machine_is_zir9260() (0) -#endif - -#ifdef CONFIG_MACH_COCOPAH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COCOPAH -# endif -# define machine_is_cocopah() (machine_arch_type == MACH_TYPE_COCOPAH) -#else -# define machine_is_cocopah() (0) -#endif - -#ifdef CONFIG_MACH_NDS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NDS -# endif -# define machine_is_nds() (machine_arch_type == MACH_TYPE_NDS) -#else -# define machine_is_nds() (0) -#endif - -#ifdef CONFIG_MACH_ROSENCRANTZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROSENCRANTZ -# endif -# define machine_is_rosencrantz() (machine_arch_type == MACH_TYPE_ROSENCRANTZ) -#else -# define machine_is_rosencrantz() (0) -#endif - -#ifdef CONFIG_MACH_FTTX_ODSC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FTTX_ODSC -# endif -# define machine_is_fttx_odsc() (machine_arch_type == MACH_TYPE_FTTX_ODSC) -#else -# define machine_is_fttx_odsc() (0) -#endif - -#ifdef CONFIG_MACH_CLASSE_R6904 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLASSE_R6904 -# endif -# define machine_is_classe_r6904() (machine_arch_type == MACH_TYPE_CLASSE_R6904) -#else -# define machine_is_classe_r6904() (0) -#endif - -#ifdef CONFIG_MACH_CAM60 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAM60 -# endif -# define machine_is_cam60() (machine_arch_type == MACH_TYPE_CAM60) -#else -# define machine_is_cam60() (0) -#endif - -#ifdef CONFIG_MACH_MXC30031ADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC30031ADS -# endif -# define machine_is_mxc30031ads() (machine_arch_type == MACH_TYPE_MXC30031ADS) -#else -# define machine_is_mxc30031ads() (0) -#endif - -#ifdef CONFIG_MACH_DATACALL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DATACALL -# endif -# define machine_is_datacall() (machine_arch_type == MACH_TYPE_DATACALL) -#else -# define machine_is_datacall() (0) -#endif - -#ifdef CONFIG_MACH_AT91EB01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91EB01 -# endif -# define machine_is_at91eb01() (machine_arch_type == MACH_TYPE_AT91EB01) -#else -# define machine_is_at91eb01() (0) -#endif - -#ifdef CONFIG_MACH_RTY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RTY -# endif -# define machine_is_rty() (machine_arch_type == MACH_TYPE_RTY) -#else -# define machine_is_rty() (0) -#endif - -#ifdef CONFIG_MACH_DWL2100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DWL2100 -# endif -# define machine_is_dwl2100() (machine_arch_type == MACH_TYPE_DWL2100) -#else -# define machine_is_dwl2100() (0) -#endif - -#ifdef CONFIG_MACH_VINSI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VINSI -# endif -# define machine_is_vinsi() (machine_arch_type == MACH_TYPE_VINSI) -#else -# define machine_is_vinsi() (0) -#endif - -#ifdef CONFIG_MACH_DB88F5281 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DB88F5281 -# endif -# define machine_is_db88f5281() (machine_arch_type == MACH_TYPE_DB88F5281) -#else -# define machine_is_db88f5281() (0) -#endif - -#ifdef CONFIG_MACH_CSB726 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB726 -# endif -# define machine_is_csb726() (machine_arch_type == MACH_TYPE_CSB726) -#else -# define machine_is_csb726() (0) -#endif - -#ifdef CONFIG_MACH_TIK27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIK27 -# endif -# define machine_is_tik27() (machine_arch_type == MACH_TYPE_TIK27) -#else -# define machine_is_tik27() (0) -#endif - -#ifdef CONFIG_MACH_MX_UC7420 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX_UC7420 -# endif -# define machine_is_mx_uc7420() (machine_arch_type == MACH_TYPE_MX_UC7420) -#else -# define machine_is_mx_uc7420() (0) -#endif - -#ifdef CONFIG_MACH_RIRM3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIRM3 -# endif -# define machine_is_rirm3() (machine_arch_type == MACH_TYPE_RIRM3) -#else -# define machine_is_rirm3() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_ODYSSEY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_ODYSSEY -# endif -# define machine_is_pelco_odyssey() (machine_arch_type == MACH_TYPE_PELCO_ODYSSEY) -#else -# define machine_is_pelco_odyssey() (0) -#endif - -#ifdef CONFIG_MACH_ADX_ABOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_ABOX -# endif -# define machine_is_adx_abox() (machine_arch_type == MACH_TYPE_ADX_ABOX) -#else -# define machine_is_adx_abox() (0) -#endif - -#ifdef CONFIG_MACH_ADX_TPID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_TPID -# endif -# define machine_is_adx_tpid() (machine_arch_type == MACH_TYPE_ADX_TPID) -#else -# define machine_is_adx_tpid() (0) -#endif - -#ifdef CONFIG_MACH_MINICHECK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINICHECK -# endif -# define machine_is_minicheck() (machine_arch_type == MACH_TYPE_MINICHECK) -#else -# define machine_is_minicheck() (0) -#endif - -#ifdef CONFIG_MACH_IDAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IDAM -# endif -# define machine_is_idam() (machine_arch_type == MACH_TYPE_IDAM) -#else -# define machine_is_idam() (0) -#endif - -#ifdef CONFIG_MACH_MARIO_MX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARIO_MX -# endif -# define machine_is_mario_mx() (machine_arch_type == MACH_TYPE_MARIO_MX) -#else -# define machine_is_mario_mx() (0) -#endif - -#ifdef CONFIG_MACH_VI1888 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VI1888 -# endif -# define machine_is_vi1888() (machine_arch_type == MACH_TYPE_VI1888) -#else -# define machine_is_vi1888() (0) -#endif - -#ifdef CONFIG_MACH_ZR4230 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZR4230 -# endif -# define machine_is_zr4230() (machine_arch_type == MACH_TYPE_ZR4230) -#else -# define machine_is_zr4230() (0) -#endif - -#ifdef CONFIG_MACH_T1_IX_BLUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T1_IX_BLUE -# endif -# define machine_is_t1_ix_blue() (machine_arch_type == MACH_TYPE_T1_IX_BLUE) -#else -# define machine_is_t1_ix_blue() (0) -#endif - -#ifdef CONFIG_MACH_SYHQ2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYHQ2 -# endif -# define machine_is_syhq2() (machine_arch_type == MACH_TYPE_SYHQ2) -#else -# define machine_is_syhq2() (0) -#endif - -#ifdef CONFIG_MACH_COMPUTIME_R3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMPUTIME_R3 -# endif -# define machine_is_computime_r3() (machine_arch_type == MACH_TYPE_COMPUTIME_R3) -#else -# define machine_is_computime_r3() (0) -#endif - -#ifdef CONFIG_MACH_ORATIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATIS -# endif -# define machine_is_oratis() (machine_arch_type == MACH_TYPE_ORATIS) -#else -# define machine_is_oratis() (0) -#endif - -#ifdef CONFIG_MACH_MIKKO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIKKO -# endif -# define machine_is_mikko() (machine_arch_type == MACH_TYPE_MIKKO) -#else -# define machine_is_mikko() (0) -#endif - -#ifdef CONFIG_MACH_HOLON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HOLON -# endif -# define machine_is_holon() (machine_arch_type == MACH_TYPE_HOLON) -#else -# define machine_is_holon() (0) -#endif - -#ifdef CONFIG_MACH_OLIP8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OLIP8 -# endif -# define machine_is_olip8() (machine_arch_type == MACH_TYPE_OLIP8) -#else -# define machine_is_olip8() (0) -#endif - -#ifdef CONFIG_MACH_GHI270HG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GHI270HG -# endif -# define machine_is_ghi270hg() (machine_arch_type == MACH_TYPE_GHI270HG) -#else -# define machine_is_ghi270hg() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM6467_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM6467_EVM -# endif -# define machine_is_davinci_dm6467_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM6467_EVM) -#else -# define machine_is_davinci_dm6467_evm() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM355_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM355_EVM -# endif -# define machine_is_davinci_dm355_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM355_EVM) -#else -# define machine_is_davinci_dm355_evm() (0) -#endif - -#ifdef CONFIG_MACH_BLACKRIVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLACKRIVER -# endif -# define machine_is_blackriver() (machine_arch_type == MACH_TYPE_BLACKRIVER) -#else -# define machine_is_blackriver() (0) -#endif - -#ifdef CONFIG_MACH_SANDGATEWP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDGATEWP -# endif -# define machine_is_sandgate_wp() (machine_arch_type == MACH_TYPE_SANDGATEWP) -#else -# define machine_is_sandgate_wp() (0) -#endif - -#ifdef CONFIG_MACH_CDOTBWSG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CDOTBWSG -# endif -# define machine_is_cdotbwsg() (machine_arch_type == MACH_TYPE_CDOTBWSG) -#else -# define machine_is_cdotbwsg() (0) -#endif - -#ifdef CONFIG_MACH_QUARK963 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUARK963 -# endif -# define machine_is_quark963() (machine_arch_type == MACH_TYPE_QUARK963) -#else -# define machine_is_quark963() (0) -#endif - -#ifdef CONFIG_MACH_CSB735 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB735 -# endif -# define machine_is_csb735() (machine_arch_type == MACH_TYPE_CSB735) -#else -# define machine_is_csb735() (0) -#endif - -#ifdef CONFIG_MACH_LITTLETON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LITTLETON -# endif -# define machine_is_littleton() (machine_arch_type == MACH_TYPE_LITTLETON) -#else -# define machine_is_littleton() (0) -#endif - -#ifdef CONFIG_MACH_MIO_P550 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIO_P550 -# endif -# define machine_is_mio_p550() (machine_arch_type == MACH_TYPE_MIO_P550) -#else -# define machine_is_mio_p550() (0) -#endif - -#ifdef CONFIG_MACH_MOTION2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTION2440 -# endif -# define machine_is_motion2440() (machine_arch_type == MACH_TYPE_MOTION2440) -#else -# define machine_is_motion2440() (0) -#endif - -#ifdef CONFIG_MACH_IMM500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMM500 -# endif -# define machine_is_imm500() (machine_arch_type == MACH_TYPE_IMM500) -#else -# define machine_is_imm500() (0) -#endif - -#ifdef CONFIG_MACH_HOMEMATIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HOMEMATIC -# endif -# define machine_is_homematic() (machine_arch_type == MACH_TYPE_HOMEMATIC) -#else -# define machine_is_homematic() (0) -#endif - -#ifdef CONFIG_MACH_ERMINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ERMINE -# endif -# define machine_is_ermine() (machine_arch_type == MACH_TYPE_ERMINE) -#else -# define machine_is_ermine() (0) -#endif - -#ifdef CONFIG_MACH_KB9202B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KB9202B -# endif -# define machine_is_kb9202b() (machine_arch_type == MACH_TYPE_KB9202B) -#else -# define machine_is_kb9202b() (0) -#endif - -#ifdef CONFIG_MACH_HS1XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HS1XX -# endif -# define machine_is_hs1xx() (machine_arch_type == MACH_TYPE_HS1XX) -#else -# define machine_is_hs1xx() (0) -#endif - -#ifdef CONFIG_MACH_STUDENTMATE2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STUDENTMATE2440 -# endif -# define machine_is_studentmate2440() (machine_arch_type == MACH_TYPE_STUDENTMATE2440) -#else -# define machine_is_studentmate2440() (0) -#endif - -#ifdef CONFIG_MACH_ARVOO_L1_Z1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARVOO_L1_Z1 -# endif -# define machine_is_arvoo_l1_z1() (machine_arch_type == MACH_TYPE_ARVOO_L1_Z1) -#else -# define machine_is_arvoo_l1_z1() (0) -#endif - -#ifdef CONFIG_MACH_DEP2410K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEP2410K -# endif -# define machine_is_dep2410k() (machine_arch_type == MACH_TYPE_DEP2410K) -#else -# define machine_is_dep2410k() (0) -#endif - -#ifdef CONFIG_MACH_XXSVIDEO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XXSVIDEO -# endif -# define machine_is_xxsvideo() (machine_arch_type == MACH_TYPE_XXSVIDEO) -#else -# define machine_is_xxsvideo() (0) -#endif - -#ifdef CONFIG_MACH_IM4004 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IM4004 -# endif -# define machine_is_im4004() (machine_arch_type == MACH_TYPE_IM4004) -#else -# define machine_is_im4004() (0) -#endif - -#ifdef CONFIG_MACH_OCHAYA1050 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCHAYA1050 -# endif -# define machine_is_ochaya1050() (machine_arch_type == MACH_TYPE_OCHAYA1050) -#else -# define machine_is_ochaya1050() (0) -#endif - -#ifdef CONFIG_MACH_LEP9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEP9261 -# endif -# define machine_is_lep9261() (machine_arch_type == MACH_TYPE_LEP9261) -#else -# define machine_is_lep9261() (0) -#endif - -#ifdef CONFIG_MACH_SVENMEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVENMEB -# endif -# define machine_is_svenmeb() (machine_arch_type == MACH_TYPE_SVENMEB) -#else -# define machine_is_svenmeb() (0) -#endif - -#ifdef CONFIG_MACH_FORTUNET2NE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FORTUNET2NE -# endif -# define machine_is_fortunet2ne() (machine_arch_type == MACH_TYPE_FORTUNET2NE) -#else -# define machine_is_fortunet2ne() (0) -#endif - -#ifdef CONFIG_MACH_NXHX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NXHX -# endif -# define machine_is_nxhx() (machine_arch_type == MACH_TYPE_NXHX) -#else -# define machine_is_nxhx() (0) -#endif - -#ifdef CONFIG_MACH_REALVIEW_PB11MP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REALVIEW_PB11MP -# endif -# define machine_is_realview_pb11mp() (machine_arch_type == MACH_TYPE_REALVIEW_PB11MP) -#else -# define machine_is_realview_pb11mp() (0) -#endif - -#ifdef CONFIG_MACH_IDS500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IDS500 -# endif -# define machine_is_ids500() (machine_arch_type == MACH_TYPE_IDS500) -#else -# define machine_is_ids500() (0) -#endif - -#ifdef CONFIG_MACH_ORS_N725 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORS_N725 -# endif -# define machine_is_ors_n725() (machine_arch_type == MACH_TYPE_ORS_N725) -#else -# define machine_is_ors_n725() (0) -#endif - -#ifdef CONFIG_MACH_HSDARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HSDARM -# endif -# define machine_is_hsdarm() (machine_arch_type == MACH_TYPE_HSDARM) -#else -# define machine_is_hsdarm() (0) -#endif - -#ifdef CONFIG_MACH_SHA_PON003 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHA_PON003 -# endif -# define machine_is_sha_pon003() (machine_arch_type == MACH_TYPE_SHA_PON003) -#else -# define machine_is_sha_pon003() (0) -#endif - -#ifdef CONFIG_MACH_SHA_PON004 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHA_PON004 -# endif -# define machine_is_sha_pon004() (machine_arch_type == MACH_TYPE_SHA_PON004) -#else -# define machine_is_sha_pon004() (0) -#endif - -#ifdef CONFIG_MACH_SHA_PON007 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHA_PON007 -# endif -# define machine_is_sha_pon007() (machine_arch_type == MACH_TYPE_SHA_PON007) -#else -# define machine_is_sha_pon007() (0) -#endif - -#ifdef CONFIG_MACH_SHA_PON011 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHA_PON011 -# endif -# define machine_is_sha_pon011() (machine_arch_type == MACH_TYPE_SHA_PON011) -#else -# define machine_is_sha_pon011() (0) -#endif - -#ifdef CONFIG_MACH_H6042 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6042 -# endif -# define machine_is_h6042() (machine_arch_type == MACH_TYPE_H6042) -#else -# define machine_is_h6042() (0) -#endif - -#ifdef CONFIG_MACH_H6043 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6043 -# endif -# define machine_is_h6043() (machine_arch_type == MACH_TYPE_H6043) -#else -# define machine_is_h6043() (0) -#endif - -#ifdef CONFIG_MACH_LOOXC550 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOOXC550 -# endif -# define machine_is_looxc550() (machine_arch_type == MACH_TYPE_LOOXC550) -#else -# define machine_is_looxc550() (0) -#endif - -#ifdef CONFIG_MACH_CNTY_TITAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNTY_TITAN -# endif -# define machine_is_cnty_titan() (machine_arch_type == MACH_TYPE_CNTY_TITAN) -#else -# define machine_is_cnty_titan() (0) -#endif - -#ifdef CONFIG_MACH_APP3XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APP3XX -# endif -# define machine_is_app3xx() (machine_arch_type == MACH_TYPE_APP3XX) -#else -# define machine_is_app3xx() (0) -#endif - -#ifdef CONFIG_MACH_SIDEOATSGRAMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIDEOATSGRAMA -# endif -# define machine_is_sideoatsgrama() (machine_arch_type == MACH_TYPE_SIDEOATSGRAMA) -#else -# define machine_is_sideoatsgrama() (0) -#endif - -#ifdef CONFIG_MACH_TREO700P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO700P -# endif -# define machine_is_treo700p() (machine_arch_type == MACH_TYPE_TREO700P) -#else -# define machine_is_treo700p() (0) -#endif - -#ifdef CONFIG_MACH_TREO700W -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO700W -# endif -# define machine_is_treo700w() (machine_arch_type == MACH_TYPE_TREO700W) -#else -# define machine_is_treo700w() (0) -#endif - -#ifdef CONFIG_MACH_TREO750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO750 -# endif -# define machine_is_treo750() (machine_arch_type == MACH_TYPE_TREO750) -#else -# define machine_is_treo750() (0) -#endif - -#ifdef CONFIG_MACH_TREO755P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TREO755P -# endif -# define machine_is_treo755p() (machine_arch_type == MACH_TYPE_TREO755P) -#else -# define machine_is_treo755p() (0) -#endif - -#ifdef CONFIG_MACH_EZREGANUT9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZREGANUT9200 -# endif -# define machine_is_ezreganut9200() (machine_arch_type == MACH_TYPE_EZREGANUT9200) -#else -# define machine_is_ezreganut9200() (0) -#endif - -#ifdef CONFIG_MACH_SARGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SARGE -# endif -# define machine_is_sarge() (machine_arch_type == MACH_TYPE_SARGE) -#else -# define machine_is_sarge() (0) -#endif - -#ifdef CONFIG_MACH_A696 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A696 -# endif -# define machine_is_a696() (machine_arch_type == MACH_TYPE_A696) -#else -# define machine_is_a696() (0) -#endif - -#ifdef CONFIG_MACH_TURTLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TURTLE -# endif -# define machine_is_turtle1916() (machine_arch_type == MACH_TYPE_TURTLE) -#else -# define machine_is_turtle1916() (0) -#endif - -#ifdef CONFIG_MACH_MX27_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27_3DS -# endif -# define machine_is_mx27_3ds() (machine_arch_type == MACH_TYPE_MX27_3DS) -#else -# define machine_is_mx27_3ds() (0) -#endif - -#ifdef CONFIG_MACH_BISHOP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BISHOP -# endif -# define machine_is_bishop() (machine_arch_type == MACH_TYPE_BISHOP) -#else -# define machine_is_bishop() (0) -#endif - -#ifdef CONFIG_MACH_PXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXX -# endif -# define machine_is_pxx() (machine_arch_type == MACH_TYPE_PXX) -#else -# define machine_is_pxx() (0) -#endif - -#ifdef CONFIG_MACH_REDWOOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REDWOOD -# endif -# define machine_is_redwood() (machine_arch_type == MACH_TYPE_REDWOOD) -#else -# define machine_is_redwood() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_2430DLP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_2430DLP -# endif -# define machine_is_omap_2430dlp() (machine_arch_type == MACH_TYPE_OMAP_2430DLP) -#else -# define machine_is_omap_2430dlp() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_2430OSK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_2430OSK -# endif -# define machine_is_omap_2430osk() (machine_arch_type == MACH_TYPE_OMAP_2430OSK) -#else -# define machine_is_omap_2430osk() (0) -#endif - -#ifdef CONFIG_MACH_SARDINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SARDINE -# endif -# define machine_is_sardine() (machine_arch_type == MACH_TYPE_SARDINE) -#else -# define machine_is_sardine() (0) -#endif - -#ifdef CONFIG_MACH_HALIBUT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HALIBUT -# endif -# define machine_is_halibut() (machine_arch_type == MACH_TYPE_HALIBUT) -#else -# define machine_is_halibut() (0) -#endif - -#ifdef CONFIG_MACH_TROUT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TROUT -# endif -# define machine_is_trout() (machine_arch_type == MACH_TYPE_TROUT) -#else -# define machine_is_trout() (0) -#endif - -#ifdef CONFIG_MACH_GOLDFISH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GOLDFISH -# endif -# define machine_is_goldfish() (machine_arch_type == MACH_TYPE_GOLDFISH) -#else -# define machine_is_goldfish() (0) -#endif - -#ifdef CONFIG_MACH_GESBC2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GESBC2440 -# endif -# define machine_is_gesbc2440() (machine_arch_type == MACH_TYPE_GESBC2440) -#else -# define machine_is_gesbc2440() (0) -#endif - -#ifdef CONFIG_MACH_NOMAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOMAD -# endif -# define machine_is_nomad() (machine_arch_type == MACH_TYPE_NOMAD) -#else -# define machine_is_nomad() (0) -#endif - -#ifdef CONFIG_MACH_ROSALIND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROSALIND -# endif -# define machine_is_rosalind() (machine_arch_type == MACH_TYPE_ROSALIND) -#else -# define machine_is_rosalind() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9215 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9215 -# endif -# define machine_is_cc9p9215() (machine_arch_type == MACH_TYPE_CC9P9215) -#else -# define machine_is_cc9p9215() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9210 -# endif -# define machine_is_cc9p9210() (machine_arch_type == MACH_TYPE_CC9P9210) -#else -# define machine_is_cc9p9210() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9215JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9215JS -# endif -# define machine_is_cc9p9215js() (machine_arch_type == MACH_TYPE_CC9P9215JS) -#else -# define machine_is_cc9p9215js() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9210JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9210JS -# endif -# define machine_is_cc9p9210js() (machine_arch_type == MACH_TYPE_CC9P9210JS) -#else -# define machine_is_cc9p9210js() (0) -#endif - -#ifdef CONFIG_MACH_NASFFE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NASFFE -# endif -# define machine_is_nasffe() (machine_arch_type == MACH_TYPE_NASFFE) -#else -# define machine_is_nasffe() (0) -#endif - -#ifdef CONFIG_MACH_TN2X0BD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TN2X0BD -# endif -# define machine_is_tn2x0bd() (machine_arch_type == MACH_TYPE_TN2X0BD) -#else -# define machine_is_tn2x0bd() (0) -#endif - -#ifdef CONFIG_MACH_GWMPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GWMPXA -# endif -# define machine_is_gwmpxa() (machine_arch_type == MACH_TYPE_GWMPXA) -#else -# define machine_is_gwmpxa() (0) -#endif - -#ifdef CONFIG_MACH_EXYPLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXYPLUS -# endif -# define machine_is_exyplus() (machine_arch_type == MACH_TYPE_EXYPLUS) -#else -# define machine_is_exyplus() (0) -#endif - -#ifdef CONFIG_MACH_JADOO21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JADOO21 -# endif -# define machine_is_jadoo21() (machine_arch_type == MACH_TYPE_JADOO21) -#else -# define machine_is_jadoo21() (0) -#endif - -#ifdef CONFIG_MACH_LOOXN560 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOOXN560 -# endif -# define machine_is_looxn560() (machine_arch_type == MACH_TYPE_LOOXN560) -#else -# define machine_is_looxn560() (0) -#endif - -#ifdef CONFIG_MACH_BONSAI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BONSAI -# endif -# define machine_is_bonsai() (machine_arch_type == MACH_TYPE_BONSAI) -#else -# define machine_is_bonsai() (0) -#endif - -#ifdef CONFIG_MACH_ADSMILGATO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSMILGATO -# endif -# define machine_is_adsmilgato() (machine_arch_type == MACH_TYPE_ADSMILGATO) -#else -# define machine_is_adsmilgato() (0) -#endif - -#ifdef CONFIG_MACH_GBA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GBA -# endif -# define machine_is_gba() (machine_arch_type == MACH_TYPE_GBA) -#else -# define machine_is_gba() (0) -#endif - -#ifdef CONFIG_MACH_H6044 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6044 -# endif -# define machine_is_h6044() (machine_arch_type == MACH_TYPE_H6044) -#else -# define machine_is_h6044() (0) -#endif - -#ifdef CONFIG_MACH_APP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APP -# endif -# define machine_is_app() (machine_arch_type == MACH_TYPE_APP) -#else -# define machine_is_app() (0) -#endif - -#ifdef CONFIG_MACH_TCT_HAMMER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TCT_HAMMER -# endif -# define machine_is_tct_hammer() (machine_arch_type == MACH_TYPE_TCT_HAMMER) -#else -# define machine_is_tct_hammer() (0) -#endif - -#ifdef CONFIG_MACH_HERALD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERALD -# endif -# define machine_is_herald() (machine_arch_type == MACH_TYPE_HERALD) -#else -# define machine_is_herald() (0) -#endif - -#ifdef CONFIG_MACH_ARTEMIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARTEMIS -# endif -# define machine_is_artemis() (machine_arch_type == MACH_TYPE_ARTEMIS) -#else -# define machine_is_artemis() (0) -#endif - -#ifdef CONFIG_MACH_HTCTITAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCTITAN -# endif -# define machine_is_htctitan() (machine_arch_type == MACH_TYPE_HTCTITAN) -#else -# define machine_is_htctitan() (0) -#endif - -#ifdef CONFIG_MACH_QRANIUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QRANIUM -# endif -# define machine_is_qranium() (machine_arch_type == MACH_TYPE_QRANIUM) -#else -# define machine_is_qranium() (0) -#endif - -#ifdef CONFIG_MACH_ADX_WSC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_WSC2 -# endif -# define machine_is_adx_wsc2() (machine_arch_type == MACH_TYPE_ADX_WSC2) -#else -# define machine_is_adx_wsc2() (0) -#endif - -#ifdef CONFIG_MACH_ADX_MEDCOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_MEDCOM -# endif -# define machine_is_adx_medcom() (machine_arch_type == MACH_TYPE_ADX_MEDCOM) -#else -# define machine_is_adx_medcom() (0) -#endif - -#ifdef CONFIG_MACH_BBOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BBOARD -# endif -# define machine_is_bboard() (machine_arch_type == MACH_TYPE_BBOARD) -#else -# define machine_is_bboard() (0) -#endif - -#ifdef CONFIG_MACH_CAMBRIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAMBRIA -# endif -# define machine_is_cambria() (machine_arch_type == MACH_TYPE_CAMBRIA) -#else -# define machine_is_cambria() (0) -#endif - -#ifdef CONFIG_MACH_MT7XXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MT7XXX -# endif -# define machine_is_mt7xxx() (machine_arch_type == MACH_TYPE_MT7XXX) -#else -# define machine_is_mt7xxx() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX512 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX512 -# endif -# define machine_is_matrix512() (machine_arch_type == MACH_TYPE_MATRIX512) -#else -# define machine_is_matrix512() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX522 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX522 -# endif -# define machine_is_matrix522() (machine_arch_type == MACH_TYPE_MATRIX522) -#else -# define machine_is_matrix522() (0) -#endif - -#ifdef CONFIG_MACH_IPAC5010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPAC5010 -# endif -# define machine_is_ipac5010() (machine_arch_type == MACH_TYPE_IPAC5010) -#else -# define machine_is_ipac5010() (0) -#endif - -#ifdef CONFIG_MACH_SAKURA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAKURA -# endif -# define machine_is_sakura() (machine_arch_type == MACH_TYPE_SAKURA) -#else -# define machine_is_sakura() (0) -#endif - -#ifdef CONFIG_MACH_GROCX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GROCX -# endif -# define machine_is_grocx() (machine_arch_type == MACH_TYPE_GROCX) -#else -# define machine_is_grocx() (0) -#endif - -#ifdef CONFIG_MACH_PM9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PM9263 -# endif -# define machine_is_pm9263() (machine_arch_type == MACH_TYPE_PM9263) -#else -# define machine_is_pm9263() (0) -#endif - -#ifdef CONFIG_MACH_SIM_ONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIM_ONE -# endif -# define machine_is_sim_one() (machine_arch_type == MACH_TYPE_SIM_ONE) -#else -# define machine_is_sim_one() (0) -#endif - -#ifdef CONFIG_MACH_ACQ132 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACQ132 -# endif -# define machine_is_acq132() (machine_arch_type == MACH_TYPE_ACQ132) -#else -# define machine_is_acq132() (0) -#endif - -#ifdef CONFIG_MACH_DATR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DATR -# endif -# define machine_is_datr() (machine_arch_type == MACH_TYPE_DATR) -#else -# define machine_is_datr() (0) -#endif - -#ifdef CONFIG_MACH_ACTUX1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTUX1 -# endif -# define machine_is_actux1() (machine_arch_type == MACH_TYPE_ACTUX1) -#else -# define machine_is_actux1() (0) -#endif - -#ifdef CONFIG_MACH_ACTUX2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTUX2 -# endif -# define machine_is_actux2() (machine_arch_type == MACH_TYPE_ACTUX2) -#else -# define machine_is_actux2() (0) -#endif - -#ifdef CONFIG_MACH_ACTUX3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTUX3 -# endif -# define machine_is_actux3() (machine_arch_type == MACH_TYPE_ACTUX3) -#else -# define machine_is_actux3() (0) -#endif - -#ifdef CONFIG_MACH_FLEXIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLEXIT -# endif -# define machine_is_flexit() (machine_arch_type == MACH_TYPE_FLEXIT) -#else -# define machine_is_flexit() (0) -#endif - -#ifdef CONFIG_MACH_BH2X0BD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BH2X0BD -# endif -# define machine_is_bh2x0bd() (machine_arch_type == MACH_TYPE_BH2X0BD) -#else -# define machine_is_bh2x0bd() (0) -#endif - -#ifdef CONFIG_MACH_ATB2002 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATB2002 -# endif -# define machine_is_atb2002() (machine_arch_type == MACH_TYPE_ATB2002) -#else -# define machine_is_atb2002() (0) -#endif - -#ifdef CONFIG_MACH_XENON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XENON -# endif -# define machine_is_xenon() (machine_arch_type == MACH_TYPE_XENON) -#else -# define machine_is_xenon() (0) -#endif - -#ifdef CONFIG_MACH_FM607 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FM607 -# endif -# define machine_is_fm607() (machine_arch_type == MACH_TYPE_FM607) -#else -# define machine_is_fm607() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX514 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX514 -# endif -# define machine_is_matrix514() (machine_arch_type == MACH_TYPE_MATRIX514) -#else -# define machine_is_matrix514() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX524 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX524 -# endif -# define machine_is_matrix524() (machine_arch_type == MACH_TYPE_MATRIX524) -#else -# define machine_is_matrix524() (0) -#endif - -#ifdef CONFIG_MACH_INPOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INPOD -# endif -# define machine_is_inpod() (machine_arch_type == MACH_TYPE_INPOD) -#else -# define machine_is_inpod() (0) -#endif - -#ifdef CONFIG_MACH_JIVE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JIVE -# endif -# define machine_is_jive() (machine_arch_type == MACH_TYPE_JIVE) -#else -# define machine_is_jive() (0) -#endif - -#ifdef CONFIG_MACH_TLL_MX21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TLL_MX21 -# endif -# define machine_is_tll_mx21() (machine_arch_type == MACH_TYPE_TLL_MX21) -#else -# define machine_is_tll_mx21() (0) -#endif - -#ifdef CONFIG_MACH_SBC2800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC2800 -# endif -# define machine_is_sbc2800() (machine_arch_type == MACH_TYPE_SBC2800) -#else -# define machine_is_sbc2800() (0) -#endif - -#ifdef CONFIG_MACH_CC7UCAMRY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC7UCAMRY -# endif -# define machine_is_cc7ucamry() (machine_arch_type == MACH_TYPE_CC7UCAMRY) -#else -# define machine_is_cc7ucamry() (0) -#endif - -#ifdef CONFIG_MACH_UBISYS_P9_SC15 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UBISYS_P9_SC15 -# endif -# define machine_is_ubisys_p9_sc15() (machine_arch_type == MACH_TYPE_UBISYS_P9_SC15) -#else -# define machine_is_ubisys_p9_sc15() (0) -#endif - -#ifdef CONFIG_MACH_UBISYS_P9_SSC2D10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UBISYS_P9_SSC2D10 -# endif -# define machine_is_ubisys_p9_ssc2d10() (machine_arch_type == MACH_TYPE_UBISYS_P9_SSC2D10) -#else -# define machine_is_ubisys_p9_ssc2d10() (0) -#endif - -#ifdef CONFIG_MACH_UBISYS_P9_RCU3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UBISYS_P9_RCU3 -# endif -# define machine_is_ubisys_p9_rcu3() (machine_arch_type == MACH_TYPE_UBISYS_P9_RCU3) -#else -# define machine_is_ubisys_p9_rcu3() (0) -#endif - -#ifdef CONFIG_MACH_AML_M8000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AML_M8000 -# endif -# define machine_is_aml_m8000() (machine_arch_type == MACH_TYPE_AML_M8000) -#else -# define machine_is_aml_m8000() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPER_270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPER_270 -# endif -# define machine_is_snapper_270() (machine_arch_type == MACH_TYPE_SNAPPER_270) -#else -# define machine_is_snapper_270() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_BBX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_BBX -# endif -# define machine_is_omap_bbx() (machine_arch_type == MACH_TYPE_OMAP_BBX) -#else -# define machine_is_omap_bbx() (0) -#endif - -#ifdef CONFIG_MACH_UCN2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UCN2410 -# endif -# define machine_is_ucn2410() (machine_arch_type == MACH_TYPE_UCN2410) -#else -# define machine_is_ucn2410() (0) -#endif - -#ifdef CONFIG_MACH_SAM9_L9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAM9_L9260 -# endif -# define machine_is_sam9_l9260() (machine_arch_type == MACH_TYPE_SAM9_L9260) -#else -# define machine_is_sam9_l9260() (0) -#endif - -#ifdef CONFIG_MACH_ETI_C2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETI_C2 -# endif -# define machine_is_eti_c2() (machine_arch_type == MACH_TYPE_ETI_C2) -#else -# define machine_is_eti_c2() (0) -#endif - -#ifdef CONFIG_MACH_AVALANCHE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVALANCHE -# endif -# define machine_is_avalanche() (machine_arch_type == MACH_TYPE_AVALANCHE) -#else -# define machine_is_avalanche() (0) -#endif - -#ifdef CONFIG_MACH_REALVIEW_PB1176 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REALVIEW_PB1176 -# endif -# define machine_is_realview_pb1176() (machine_arch_type == MACH_TYPE_REALVIEW_PB1176) -#else -# define machine_is_realview_pb1176() (0) -#endif - -#ifdef CONFIG_MACH_DP1500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DP1500 -# endif -# define machine_is_dp1500() (machine_arch_type == MACH_TYPE_DP1500) -#else -# define machine_is_dp1500() (0) -#endif - -#ifdef CONFIG_MACH_APPLE_IPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APPLE_IPHONE -# endif -# define machine_is_apple_iphone() (machine_arch_type == MACH_TYPE_APPLE_IPHONE) -#else -# define machine_is_apple_iphone() (0) -#endif - -#ifdef CONFIG_MACH_YL9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YL9200 -# endif -# define machine_is_yl9200() (machine_arch_type == MACH_TYPE_YL9200) -#else -# define machine_is_yl9200() (0) -#endif - -#ifdef CONFIG_MACH_RD88F5182 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F5182 -# endif -# define machine_is_rd88f5182() (machine_arch_type == MACH_TYPE_RD88F5182) -#else -# define machine_is_rd88f5182() (0) -#endif - -#ifdef CONFIG_MACH_KUROBOX_PRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KUROBOX_PRO -# endif -# define machine_is_kurobox_pro() (machine_arch_type == MACH_TYPE_KUROBOX_PRO) -#else -# define machine_is_kurobox_pro() (0) -#endif - -#ifdef CONFIG_MACH_SE_POET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SE_POET -# endif -# define machine_is_se_poet() (machine_arch_type == MACH_TYPE_SE_POET) -#else -# define machine_is_se_poet() (0) -#endif - -#ifdef CONFIG_MACH_MX31_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31_3DS -# endif -# define machine_is_mx31_3ds() (machine_arch_type == MACH_TYPE_MX31_3DS) -#else -# define machine_is_mx31_3ds() (0) -#endif - -#ifdef CONFIG_MACH_R270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_R270 -# endif -# define machine_is_r270() (machine_arch_type == MACH_TYPE_R270) -#else -# define machine_is_r270() (0) -#endif - -#ifdef CONFIG_MACH_ARMOUR21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMOUR21 -# endif -# define machine_is_armour21() (machine_arch_type == MACH_TYPE_ARMOUR21) -#else -# define machine_is_armour21() (0) -#endif - -#ifdef CONFIG_MACH_DT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DT2 -# endif -# define machine_is_dt2() (machine_arch_type == MACH_TYPE_DT2) -#else -# define machine_is_dt2() (0) -#endif - -#ifdef CONFIG_MACH_VT4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VT4 -# endif -# define machine_is_vt4() (machine_arch_type == MACH_TYPE_VT4) -#else -# define machine_is_vt4() (0) -#endif - -#ifdef CONFIG_MACH_TYCO320 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TYCO320 -# endif -# define machine_is_tyco320() (machine_arch_type == MACH_TYPE_TYCO320) -#else -# define machine_is_tyco320() (0) -#endif - -#ifdef CONFIG_MACH_ADMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADMA -# endif -# define machine_is_adma() (machine_arch_type == MACH_TYPE_ADMA) -#else -# define machine_is_adma() (0) -#endif - -#ifdef CONFIG_MACH_WP188 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WP188 -# endif -# define machine_is_wp188() (machine_arch_type == MACH_TYPE_WP188) -#else -# define machine_is_wp188() (0) -#endif - -#ifdef CONFIG_MACH_CORSICA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORSICA -# endif -# define machine_is_corsica() (machine_arch_type == MACH_TYPE_CORSICA) -#else -# define machine_is_corsica() (0) -#endif - -#ifdef CONFIG_MACH_BIGEYE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIGEYE -# endif -# define machine_is_bigeye() (machine_arch_type == MACH_TYPE_BIGEYE) -#else -# define machine_is_bigeye() (0) -#endif - -#ifdef CONFIG_MACH_TLL5000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TLL5000 -# endif -# define machine_is_tll5000() (machine_arch_type == MACH_TYPE_TLL5000) -#else -# define machine_is_tll5000() (0) -#endif - -#ifdef CONFIG_MACH_BEBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BEBOT -# endif -# define machine_is_bebot() (machine_arch_type == MACH_TYPE_BEBOT) -#else -# define machine_is_bebot() (0) -#endif - -#ifdef CONFIG_MACH_QONG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QONG -# endif -# define machine_is_qong() (machine_arch_type == MACH_TYPE_QONG) -#else -# define machine_is_qong() (0) -#endif - -#ifdef CONFIG_MACH_TCOMPACT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TCOMPACT -# endif -# define machine_is_tcompact() (machine_arch_type == MACH_TYPE_TCOMPACT) -#else -# define machine_is_tcompact() (0) -#endif - -#ifdef CONFIG_MACH_PUMA5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PUMA5 -# endif -# define machine_is_puma5() (machine_arch_type == MACH_TYPE_PUMA5) -#else -# define machine_is_puma5() (0) -#endif - -#ifdef CONFIG_MACH_ELARA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELARA -# endif -# define machine_is_elara() (machine_arch_type == MACH_TYPE_ELARA) -#else -# define machine_is_elara() (0) -#endif - -#ifdef CONFIG_MACH_ELLINGTON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELLINGTON -# endif -# define machine_is_ellington() (machine_arch_type == MACH_TYPE_ELLINGTON) -#else -# define machine_is_ellington() (0) -#endif - -#ifdef CONFIG_MACH_XDA_ATOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XDA_ATOM -# endif -# define machine_is_xda_atom() (machine_arch_type == MACH_TYPE_XDA_ATOM) -#else -# define machine_is_xda_atom() (0) -#endif - -#ifdef CONFIG_MACH_ENERGIZER2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENERGIZER2 -# endif -# define machine_is_energizer2() (machine_arch_type == MACH_TYPE_ENERGIZER2) -#else -# define machine_is_energizer2() (0) -#endif - -#ifdef CONFIG_MACH_ODIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ODIN -# endif -# define machine_is_odin() (machine_arch_type == MACH_TYPE_ODIN) -#else -# define machine_is_odin() (0) -#endif - -#ifdef CONFIG_MACH_ACTUX4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTUX4 -# endif -# define machine_is_actux4() (machine_arch_type == MACH_TYPE_ACTUX4) -#else -# define machine_is_actux4() (0) -#endif - -#ifdef CONFIG_MACH_ESL_OMAP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_OMAP -# endif -# define machine_is_esl_omap() (machine_arch_type == MACH_TYPE_ESL_OMAP) -#else -# define machine_is_esl_omap() (0) -#endif - -#ifdef CONFIG_MACH_OMAP2EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP2EVM -# endif -# define machine_is_omap2evm() (machine_arch_type == MACH_TYPE_OMAP2EVM) -#else -# define machine_is_omap2evm() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3EVM -# endif -# define machine_is_omap3evm() (machine_arch_type == MACH_TYPE_OMAP3EVM) -#else -# define machine_is_omap3evm() (0) -#endif - -#ifdef CONFIG_MACH_ADX_PCU57 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_PCU57 -# endif -# define machine_is_adx_pcu57() (machine_arch_type == MACH_TYPE_ADX_PCU57) -#else -# define machine_is_adx_pcu57() (0) -#endif - -#ifdef CONFIG_MACH_MONACO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MONACO -# endif -# define machine_is_monaco() (machine_arch_type == MACH_TYPE_MONACO) -#else -# define machine_is_monaco() (0) -#endif - -#ifdef CONFIG_MACH_LEVANTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEVANTE -# endif -# define machine_is_levante() (machine_arch_type == MACH_TYPE_LEVANTE) -#else -# define machine_is_levante() (0) -#endif - -#ifdef CONFIG_MACH_TMXIPX425 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TMXIPX425 -# endif -# define machine_is_tmxipx425() (machine_arch_type == MACH_TYPE_TMXIPX425) -#else -# define machine_is_tmxipx425() (0) -#endif - -#ifdef CONFIG_MACH_LEEP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEEP -# endif -# define machine_is_leep() (machine_arch_type == MACH_TYPE_LEEP) -#else -# define machine_is_leep() (0) -#endif - -#ifdef CONFIG_MACH_RAAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAAD -# endif -# define machine_is_raad() (machine_arch_type == MACH_TYPE_RAAD) -#else -# define machine_is_raad() (0) -#endif - -#ifdef CONFIG_MACH_DNS323 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DNS323 -# endif -# define machine_is_dns323() (machine_arch_type == MACH_TYPE_DNS323) -#else -# define machine_is_dns323() (0) -#endif - -#ifdef CONFIG_MACH_AP1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AP1000 -# endif -# define machine_is_ap1000() (machine_arch_type == MACH_TYPE_AP1000) -#else -# define machine_is_ap1000() (0) -#endif - -#ifdef CONFIG_MACH_A9SAM6432 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9SAM6432 -# endif -# define machine_is_a9sam6432() (machine_arch_type == MACH_TYPE_A9SAM6432) -#else -# define machine_is_a9sam6432() (0) -#endif - -#ifdef CONFIG_MACH_SHINY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHINY -# endif -# define machine_is_shiny() (machine_arch_type == MACH_TYPE_SHINY) -#else -# define machine_is_shiny() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_BEAGLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_BEAGLE -# endif -# define machine_is_omap3_beagle() (machine_arch_type == MACH_TYPE_OMAP3_BEAGLE) -#else -# define machine_is_omap3_beagle() (0) -#endif - -#ifdef CONFIG_MACH_CSR_BDB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSR_BDB2 -# endif -# define machine_is_csr_bdb2() (machine_arch_type == MACH_TYPE_CSR_BDB2) -#else -# define machine_is_csr_bdb2() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA_N810 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA_N810 -# endif -# define machine_is_nokia_n810() (machine_arch_type == MACH_TYPE_NOKIA_N810) -#else -# define machine_is_nokia_n810() (0) -#endif - -#ifdef CONFIG_MACH_C270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C270 -# endif -# define machine_is_c270() (machine_arch_type == MACH_TYPE_C270) -#else -# define machine_is_c270() (0) -#endif - -#ifdef CONFIG_MACH_SENTRY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SENTRY -# endif -# define machine_is_sentry() (machine_arch_type == MACH_TYPE_SENTRY) -#else -# define machine_is_sentry() (0) -#endif - -#ifdef CONFIG_MACH_PCM038 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM038 -# endif -# define machine_is_pcm038() (machine_arch_type == MACH_TYPE_PCM038) -#else -# define machine_is_pcm038() (0) -#endif - -#ifdef CONFIG_MACH_ANC300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANC300 -# endif -# define machine_is_anc300() (machine_arch_type == MACH_TYPE_ANC300) -#else -# define machine_is_anc300() (0) -#endif - -#ifdef CONFIG_MACH_HTCKAISER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCKAISER -# endif -# define machine_is_htckaiser() (machine_arch_type == MACH_TYPE_HTCKAISER) -#else -# define machine_is_htckaiser() (0) -#endif - -#ifdef CONFIG_MACH_SBAT100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBAT100 -# endif -# define machine_is_sbat100() (machine_arch_type == MACH_TYPE_SBAT100) -#else -# define machine_is_sbat100() (0) -#endif - -#ifdef CONFIG_MACH_MODUNORM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MODUNORM -# endif -# define machine_is_modunorm() (machine_arch_type == MACH_TYPE_MODUNORM) -#else -# define machine_is_modunorm() (0) -#endif - -#ifdef CONFIG_MACH_PELOS_TWARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELOS_TWARM -# endif -# define machine_is_pelos_twarm() (machine_arch_type == MACH_TYPE_PELOS_TWARM) -#else -# define machine_is_pelos_twarm() (0) -#endif - -#ifdef CONFIG_MACH_FLANK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLANK -# endif -# define machine_is_flank() (machine_arch_type == MACH_TYPE_FLANK) -#else -# define machine_is_flank() (0) -#endif - -#ifdef CONFIG_MACH_SIRLOIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIRLOIN -# endif -# define machine_is_sirloin() (machine_arch_type == MACH_TYPE_SIRLOIN) -#else -# define machine_is_sirloin() (0) -#endif - -#ifdef CONFIG_MACH_BRISKET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRISKET -# endif -# define machine_is_brisket() (machine_arch_type == MACH_TYPE_BRISKET) -#else -# define machine_is_brisket() (0) -#endif - -#ifdef CONFIG_MACH_CHUCK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHUCK -# endif -# define machine_is_chuck() (machine_arch_type == MACH_TYPE_CHUCK) -#else -# define machine_is_chuck() (0) -#endif - -#ifdef CONFIG_MACH_OTTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OTTER -# endif -# define machine_is_otter() (machine_arch_type == MACH_TYPE_OTTER) -#else -# define machine_is_otter() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_LDK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_LDK -# endif -# define machine_is_davinci_ldk() (machine_arch_type == MACH_TYPE_DAVINCI_LDK) -#else -# define machine_is_davinci_ldk() (0) -#endif - -#ifdef CONFIG_MACH_PHREEDOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHREEDOM -# endif -# define machine_is_phreedom() (machine_arch_type == MACH_TYPE_PHREEDOM) -#else -# define machine_is_phreedom() (0) -#endif - -#ifdef CONFIG_MACH_SG310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG310 -# endif -# define machine_is_sg310() (machine_arch_type == MACH_TYPE_SG310) -#else -# define machine_is_sg310() (0) -#endif - -#ifdef CONFIG_MACH_TS209 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS209 -# endif -# define machine_is_ts_x09() (machine_arch_type == MACH_TYPE_TS209) -#else -# define machine_is_ts_x09() (0) -#endif - -#ifdef CONFIG_MACH_AT91CAP9ADK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91CAP9ADK -# endif -# define machine_is_at91cap9adk() (machine_arch_type == MACH_TYPE_AT91CAP9ADK) -#else -# define machine_is_at91cap9adk() (0) -#endif - -#ifdef CONFIG_MACH_TION9315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TION9315 -# endif -# define machine_is_tion9315() (machine_arch_type == MACH_TYPE_TION9315) -#else -# define machine_is_tion9315() (0) -#endif - -#ifdef CONFIG_MACH_MAST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAST -# endif -# define machine_is_mast() (machine_arch_type == MACH_TYPE_MAST) -#else -# define machine_is_mast() (0) -#endif - -#ifdef CONFIG_MACH_PFW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PFW -# endif -# define machine_is_pfw() (machine_arch_type == MACH_TYPE_PFW) -#else -# define machine_is_pfw() (0) -#endif - -#ifdef CONFIG_MACH_YL_P2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YL_P2440 -# endif -# define machine_is_yl_p2440() (machine_arch_type == MACH_TYPE_YL_P2440) -#else -# define machine_is_yl_p2440() (0) -#endif - -#ifdef CONFIG_MACH_ZSBC32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZSBC32 -# endif -# define machine_is_zsbc32() (machine_arch_type == MACH_TYPE_ZSBC32) -#else -# define machine_is_zsbc32() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_PACE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_PACE2 -# endif -# define machine_is_omap_pace2() (machine_arch_type == MACH_TYPE_OMAP_PACE2) -#else -# define machine_is_omap_pace2() (0) -#endif - -#ifdef CONFIG_MACH_IMX_PACE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX_PACE2 -# endif -# define machine_is_imx_pace2() (machine_arch_type == MACH_TYPE_IMX_PACE2) -#else -# define machine_is_imx_pace2() (0) -#endif - -#ifdef CONFIG_MACH_MX31MOBOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31MOBOARD -# endif -# define machine_is_mx31moboard() (machine_arch_type == MACH_TYPE_MX31MOBOARD) -#else -# define machine_is_mx31moboard() (0) -#endif - -#ifdef CONFIG_MACH_MX37_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX37_3DS -# endif -# define machine_is_mx37_3ds() (machine_arch_type == MACH_TYPE_MX37_3DS) -#else -# define machine_is_mx37_3ds() (0) -#endif - -#ifdef CONFIG_MACH_RCC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RCC -# endif -# define machine_is_rcc() (machine_arch_type == MACH_TYPE_RCC) -#else -# define machine_is_rcc() (0) -#endif - -#ifdef CONFIG_MACH_ARM9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM9 -# endif -# define machine_is_dmp() (machine_arch_type == MACH_TYPE_ARM9) -#else -# define machine_is_dmp() (0) -#endif - -#ifdef CONFIG_MACH_VISION_EP9307 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VISION_EP9307 -# endif -# define machine_is_vision_ep9307() (machine_arch_type == MACH_TYPE_VISION_EP9307) -#else -# define machine_is_vision_ep9307() (0) -#endif - -#ifdef CONFIG_MACH_SCLY1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCLY1000 -# endif -# define machine_is_scly1000() (machine_arch_type == MACH_TYPE_SCLY1000) -#else -# define machine_is_scly1000() (0) -#endif - -#ifdef CONFIG_MACH_FONTEL_EP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FONTEL_EP -# endif -# define machine_is_fontel_ep() (machine_arch_type == MACH_TYPE_FONTEL_EP) -#else -# define machine_is_fontel_ep() (0) -#endif - -#ifdef CONFIG_MACH_VOICEBLUE3G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VOICEBLUE3G -# endif -# define machine_is_voiceblue3g() (machine_arch_type == MACH_TYPE_VOICEBLUE3G) -#else -# define machine_is_voiceblue3g() (0) -#endif - -#ifdef CONFIG_MACH_TT9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TT9200 -# endif -# define machine_is_tt9200() (machine_arch_type == MACH_TYPE_TT9200) -#else -# define machine_is_tt9200() (0) -#endif - -#ifdef CONFIG_MACH_DIGI2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DIGI2410 -# endif -# define machine_is_digi2410() (machine_arch_type == MACH_TYPE_DIGI2410) -#else -# define machine_is_digi2410() (0) -#endif - -#ifdef CONFIG_MACH_TERASTATION_PRO2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TERASTATION_PRO2 -# endif -# define machine_is_terastation_pro2() (machine_arch_type == MACH_TYPE_TERASTATION_PRO2) -#else -# define machine_is_terastation_pro2() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_PRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_PRO -# endif -# define machine_is_linkstation_pro() (machine_arch_type == MACH_TYPE_LINKSTATION_PRO) -#else -# define machine_is_linkstation_pro() (0) -#endif - -#ifdef CONFIG_MACH_MOTOROLA_A780 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOROLA_A780 -# endif -# define machine_is_motorola_a780() (machine_arch_type == MACH_TYPE_MOTOROLA_A780) -#else -# define machine_is_motorola_a780() (0) -#endif - -#ifdef CONFIG_MACH_MOTOROLA_E6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOROLA_E6 -# endif -# define machine_is_motorola_e6() (machine_arch_type == MACH_TYPE_MOTOROLA_E6) -#else -# define machine_is_motorola_e6() (0) -#endif - -#ifdef CONFIG_MACH_MOTOROLA_E2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOROLA_E2 -# endif -# define machine_is_motorola_e2() (machine_arch_type == MACH_TYPE_MOTOROLA_E2) -#else -# define machine_is_motorola_e2() (0) -#endif - -#ifdef CONFIG_MACH_MOTOROLA_E680 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOROLA_E680 -# endif -# define machine_is_motorola_e680() (machine_arch_type == MACH_TYPE_MOTOROLA_E680) -#else -# define machine_is_motorola_e680() (0) -#endif - -#ifdef CONFIG_MACH_UR2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UR2410 -# endif -# define machine_is_ur2410() (machine_arch_type == MACH_TYPE_UR2410) -#else -# define machine_is_ur2410() (0) -#endif - -#ifdef CONFIG_MACH_TAS9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAS9261 -# endif -# define machine_is_tas9261() (machine_arch_type == MACH_TYPE_TAS9261) -#else -# define machine_is_tas9261() (0) -#endif - -#ifdef CONFIG_MACH_HERMES_HD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERMES_HD -# endif -# define machine_is_davinci_hermes_hd() (machine_arch_type == MACH_TYPE_HERMES_HD) -#else -# define machine_is_davinci_hermes_hd() (0) -#endif - -#ifdef CONFIG_MACH_PERSEO_HD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PERSEO_HD -# endif -# define machine_is_davinci_perseo_hd() (machine_arch_type == MACH_TYPE_PERSEO_HD) -#else -# define machine_is_davinci_perseo_hd() (0) -#endif - -#ifdef CONFIG_MACH_STARGAZER2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STARGAZER2 -# endif -# define machine_is_stargazer2() (machine_arch_type == MACH_TYPE_STARGAZER2) -#else -# define machine_is_stargazer2() (0) -#endif - -#ifdef CONFIG_MACH_E350 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E350 -# endif -# define machine_is_e350() (machine_arch_type == MACH_TYPE_E350) -#else -# define machine_is_e350() (0) -#endif - -#ifdef CONFIG_MACH_WPCM450 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WPCM450 -# endif -# define machine_is_wpcm450() (machine_arch_type == MACH_TYPE_WPCM450) -#else -# define machine_is_wpcm450() (0) -#endif - -#ifdef CONFIG_MACH_CARTESIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARTESIO -# endif -# define machine_is_cartesio() (machine_arch_type == MACH_TYPE_CARTESIO) -#else -# define machine_is_cartesio() (0) -#endif - -#ifdef CONFIG_MACH_TOYBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOYBOX -# endif -# define machine_is_toybox() (machine_arch_type == MACH_TYPE_TOYBOX) -#else -# define machine_is_toybox() (0) -#endif - -#ifdef CONFIG_MACH_TX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX27 -# endif -# define machine_is_tx27() (machine_arch_type == MACH_TYPE_TX27) -#else -# define machine_is_tx27() (0) -#endif - -#ifdef CONFIG_MACH_TS409 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS409 -# endif -# define machine_is_ts409() (machine_arch_type == MACH_TYPE_TS409) -#else -# define machine_is_ts409() (0) -#endif - -#ifdef CONFIG_MACH_P300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P300 -# endif -# define machine_is_p300() (machine_arch_type == MACH_TYPE_P300) -#else -# define machine_is_p300() (0) -#endif - -#ifdef CONFIG_MACH_XDACOMET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XDACOMET -# endif -# define machine_is_xdacomet() (machine_arch_type == MACH_TYPE_XDACOMET) -#else -# define machine_is_xdacomet() (0) -#endif - -#ifdef CONFIG_MACH_DEXFLEX2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEXFLEX2 -# endif -# define machine_is_dexflex2() (machine_arch_type == MACH_TYPE_DEXFLEX2) -#else -# define machine_is_dexflex2() (0) -#endif - -#ifdef CONFIG_MACH_OW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OW -# endif -# define machine_is_ow() (machine_arch_type == MACH_TYPE_OW) -#else -# define machine_is_ow() (0) -#endif - -#ifdef CONFIG_MACH_ARMEBS3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMEBS3 -# endif -# define machine_is_armebs3() (machine_arch_type == MACH_TYPE_ARMEBS3) -#else -# define machine_is_armebs3() (0) -#endif - -#ifdef CONFIG_MACH_U3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U3 -# endif -# define machine_is_u3() (machine_arch_type == MACH_TYPE_U3) -#else -# define machine_is_u3() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2450 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2450 -# endif -# define machine_is_smdk2450() (machine_arch_type == MACH_TYPE_SMDK2450) -#else -# define machine_is_smdk2450() (0) -#endif - -#ifdef CONFIG_MACH_RSI_EWS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RSI_EWS -# endif -# define machine_is_rsi_ews() (machine_arch_type == MACH_TYPE_RSI_EWS) -#else -# define machine_is_rsi_ews() (0) -#endif - -#ifdef CONFIG_MACH_TNB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNB -# endif -# define machine_is_tnb() (machine_arch_type == MACH_TYPE_TNB) -#else -# define machine_is_tnb() (0) -#endif - -#ifdef CONFIG_MACH_TOEPATH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOEPATH -# endif -# define machine_is_toepath() (machine_arch_type == MACH_TYPE_TOEPATH) -#else -# define machine_is_toepath() (0) -#endif - -#ifdef CONFIG_MACH_KB9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KB9263 -# endif -# define machine_is_kb9263() (machine_arch_type == MACH_TYPE_KB9263) -#else -# define machine_is_kb9263() (0) -#endif - -#ifdef CONFIG_MACH_MT7108 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MT7108 -# endif -# define machine_is_mt7108() (machine_arch_type == MACH_TYPE_MT7108) -#else -# define machine_is_mt7108() (0) -#endif - -#ifdef CONFIG_MACH_SMTR2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMTR2440 -# endif -# define machine_is_smtr2440() (machine_arch_type == MACH_TYPE_SMTR2440) -#else -# define machine_is_smtr2440() (0) -#endif - -#ifdef CONFIG_MACH_MANAO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MANAO -# endif -# define machine_is_manao() (machine_arch_type == MACH_TYPE_MANAO) -#else -# define machine_is_manao() (0) -#endif - -#ifdef CONFIG_MACH_CM_X300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_X300 -# endif -# define machine_is_cm_x300() (machine_arch_type == MACH_TYPE_CM_X300) -#else -# define machine_is_cm_x300() (0) -#endif - -#ifdef CONFIG_MACH_GULFSTREAM_KP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GULFSTREAM_KP -# endif -# define machine_is_gulfstream_kp() (machine_arch_type == MACH_TYPE_GULFSTREAM_KP) -#else -# define machine_is_gulfstream_kp() (0) -#endif - -#ifdef CONFIG_MACH_LANREADYFN522 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LANREADYFN522 -# endif -# define machine_is_lanreadyfn522() (machine_arch_type == MACH_TYPE_LANREADYFN522) -#else -# define machine_is_lanreadyfn522() (0) -#endif - -#ifdef CONFIG_MACH_ARMA37 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMA37 -# endif -# define machine_is_arma37() (machine_arch_type == MACH_TYPE_ARMA37) -#else -# define machine_is_arma37() (0) -#endif - -#ifdef CONFIG_MACH_MENDEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MENDEL -# endif -# define machine_is_mendel() (machine_arch_type == MACH_TYPE_MENDEL) -#else -# define machine_is_mendel() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_ILIAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_ILIAD -# endif -# define machine_is_pelco_iliad() (machine_arch_type == MACH_TYPE_PELCO_ILIAD) -#else -# define machine_is_pelco_iliad() (0) -#endif - -#ifdef CONFIG_MACH_UNIT2P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNIT2P -# endif -# define machine_is_unit2p() (machine_arch_type == MACH_TYPE_UNIT2P) -#else -# define machine_is_unit2p() (0) -#endif - -#ifdef CONFIG_MACH_INC20OTTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INC20OTTER -# endif -# define machine_is_inc20otter() (machine_arch_type == MACH_TYPE_INC20OTTER) -#else -# define machine_is_inc20otter() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G20EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G20EK -# endif -# define machine_is_at91sam9g20ek() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK) -#else -# define machine_is_at91sam9g20ek() (0) -#endif - -#ifdef CONFIG_MACH_STORCENTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STORCENTER -# endif -# define machine_is_sc_ge2() (machine_arch_type == MACH_TYPE_STORCENTER) -#else -# define machine_is_sc_ge2() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6410 -# endif -# define machine_is_smdk6410() (machine_arch_type == MACH_TYPE_SMDK6410) -#else -# define machine_is_smdk6410() (0) -#endif - -#ifdef CONFIG_MACH_U300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U300 -# endif -# define machine_is_u300() (machine_arch_type == MACH_TYPE_U300) -#else -# define machine_is_u300() (0) -#endif - -#ifdef CONFIG_MACH_U500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U500 -# endif -# define machine_is_u500() (machine_arch_type == MACH_TYPE_U500) -#else -# define machine_is_u500() (0) -#endif - -#ifdef CONFIG_MACH_DS9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DS9260 -# endif -# define machine_is_ds9260() (machine_arch_type == MACH_TYPE_DS9260) -#else -# define machine_is_ds9260() (0) -#endif - -#ifdef CONFIG_MACH_RIVERROCK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIVERROCK -# endif -# define machine_is_riverrock() (machine_arch_type == MACH_TYPE_RIVERROCK) -#else -# define machine_is_riverrock() (0) -#endif - -#ifdef CONFIG_MACH_SCIBATH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCIBATH -# endif -# define machine_is_scibath() (machine_arch_type == MACH_TYPE_SCIBATH) -#else -# define machine_is_scibath() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM7SE512EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM7SE512EK -# endif -# define machine_is_at91sam7se() (machine_arch_type == MACH_TYPE_AT91SAM7SE512EK) -#else -# define machine_is_at91sam7se() (0) -#endif - -#ifdef CONFIG_MACH_WRT350N_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WRT350N_V2 -# endif -# define machine_is_wrt350n_v2() (machine_arch_type == MACH_TYPE_WRT350N_V2) -#else -# define machine_is_wrt350n_v2() (0) -#endif - -#ifdef CONFIG_MACH_MULTIMEDIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTIMEDIA -# endif -# define machine_is_multimedia() (machine_arch_type == MACH_TYPE_MULTIMEDIA) -#else -# define machine_is_multimedia() (0) -#endif - -#ifdef CONFIG_MACH_MARVIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARVIN -# endif -# define machine_is_marvin() (machine_arch_type == MACH_TYPE_MARVIN) -#else -# define machine_is_marvin() (0) -#endif - -#ifdef CONFIG_MACH_X500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_X500 -# endif -# define machine_is_x500() (machine_arch_type == MACH_TYPE_X500) -#else -# define machine_is_x500() (0) -#endif - -#ifdef CONFIG_MACH_AWLUG4LCU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AWLUG4LCU -# endif -# define machine_is_awlug4lcu() (machine_arch_type == MACH_TYPE_AWLUG4LCU) -#else -# define machine_is_awlug4lcu() (0) -#endif - -#ifdef CONFIG_MACH_PALERMOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PALERMOC -# endif -# define machine_is_palermoc() (machine_arch_type == MACH_TYPE_PALERMOC) -#else -# define machine_is_palermoc() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_LDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_LDP -# endif -# define machine_is_omap_ldp() (machine_arch_type == MACH_TYPE_OMAP_LDP) -#else -# define machine_is_omap_ldp() (0) -#endif - -#ifdef CONFIG_MACH_IP500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IP500 -# endif -# define machine_is_ip500() (machine_arch_type == MACH_TYPE_IP500) -#else -# define machine_is_ip500() (0) -#endif - -#ifdef CONFIG_MACH_ASE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASE2 -# endif -# define machine_is_ase2() (machine_arch_type == MACH_TYPE_ASE2) -#else -# define machine_is_ase2() (0) -#endif - -#ifdef CONFIG_MACH_MX35EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX35EVB -# endif -# define machine_is_mx35evb() (machine_arch_type == MACH_TYPE_MX35EVB) -#else -# define machine_is_mx35evb() (0) -#endif - -#ifdef CONFIG_MACH_AML_M8050 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AML_M8050 -# endif -# define machine_is_aml_m8050() (machine_arch_type == MACH_TYPE_AML_M8050) -#else -# define machine_is_aml_m8050() (0) -#endif - -#ifdef CONFIG_MACH_MX35_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX35_3DS -# endif -# define machine_is_mx35_3ds() (machine_arch_type == MACH_TYPE_MX35_3DS) -#else -# define machine_is_mx35_3ds() (0) -#endif - -#ifdef CONFIG_MACH_MARS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARS -# endif -# define machine_is_mars() (machine_arch_type == MACH_TYPE_MARS) -#else -# define machine_is_mars() (0) -#endif - -#ifdef CONFIG_MACH_NEUROS_OSD2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEUROS_OSD2 -# endif -# define machine_is_neuros_osd2() (machine_arch_type == MACH_TYPE_NEUROS_OSD2) -#else -# define machine_is_neuros_osd2() (0) -#endif - -#ifdef CONFIG_MACH_BADGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BADGER -# endif -# define machine_is_badger() (machine_arch_type == MACH_TYPE_BADGER) -#else -# define machine_is_badger() (0) -#endif - -#ifdef CONFIG_MACH_TRIZEPS4WL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS4WL -# endif -# define machine_is_trizeps4wl() (machine_arch_type == MACH_TYPE_TRIZEPS4WL) -#else -# define machine_is_trizeps4wl() (0) -#endif - -#ifdef CONFIG_MACH_TRIZEPS5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS5 -# endif -# define machine_is_trizeps5() (machine_arch_type == MACH_TYPE_TRIZEPS5) -#else -# define machine_is_trizeps5() (0) -#endif - -#ifdef CONFIG_MACH_MARLIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARLIN -# endif -# define machine_is_marlin() (machine_arch_type == MACH_TYPE_MARLIN) -#else -# define machine_is_marlin() (0) -#endif - -#ifdef CONFIG_MACH_TS78XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS78XX -# endif -# define machine_is_ts78xx() (machine_arch_type == MACH_TYPE_TS78XX) -#else -# define machine_is_ts78xx() (0) -#endif - -#ifdef CONFIG_MACH_HPIPAQ214 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HPIPAQ214 -# endif -# define machine_is_hpipaq214() (machine_arch_type == MACH_TYPE_HPIPAQ214) -#else -# define machine_is_hpipaq214() (0) -#endif - -#ifdef CONFIG_MACH_AT572D940DCM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT572D940DCM -# endif -# define machine_is_at572d940dcm() (machine_arch_type == MACH_TYPE_AT572D940DCM) -#else -# define machine_is_at572d940dcm() (0) -#endif - -#ifdef CONFIG_MACH_NE1BOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NE1BOARD -# endif -# define machine_is_ne1board() (machine_arch_type == MACH_TYPE_NE1BOARD) -#else -# define machine_is_ne1board() (0) -#endif - -#ifdef CONFIG_MACH_ZANTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZANTE -# endif -# define machine_is_zante() (machine_arch_type == MACH_TYPE_ZANTE) -#else -# define machine_is_zante() (0) -#endif - -#ifdef CONFIG_MACH_SFFSDR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SFFSDR -# endif -# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR) -#else -# define machine_is_sffsdr() (0) -#endif - -#ifdef CONFIG_MACH_TW2662 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TW2662 -# endif -# define machine_is_tw2662() (machine_arch_type == MACH_TYPE_TW2662) -#else -# define machine_is_tw2662() (0) -#endif - -#ifdef CONFIG_MACH_VF10XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VF10XX -# endif -# define machine_is_vf10xx() (machine_arch_type == MACH_TYPE_VF10XX) -#else -# define machine_is_vf10xx() (0) -#endif - -#ifdef CONFIG_MACH_ZORAN43XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZORAN43XX -# endif -# define machine_is_zoran43xx() (machine_arch_type == MACH_TYPE_ZORAN43XX) -#else -# define machine_is_zoran43xx() (0) -#endif - -#ifdef CONFIG_MACH_SONIX926 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SONIX926 -# endif -# define machine_is_sonix926() (machine_arch_type == MACH_TYPE_SONIX926) -#else -# define machine_is_sonix926() (0) -#endif - -#ifdef CONFIG_MACH_CELESTIALSEMI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CELESTIALSEMI -# endif -# define machine_is_celestialsemi() (machine_arch_type == MACH_TYPE_CELESTIALSEMI) -#else -# define machine_is_celestialsemi() (0) -#endif - -#ifdef CONFIG_MACH_CC9M2443JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9M2443JS -# endif -# define machine_is_cc9m2443js() (machine_arch_type == MACH_TYPE_CC9M2443JS) -#else -# define machine_is_cc9m2443js() (0) -#endif - -#ifdef CONFIG_MACH_TW5334 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TW5334 -# endif -# define machine_is_tw5334() (machine_arch_type == MACH_TYPE_TW5334) -#else -# define machine_is_tw5334() (0) -#endif - -#ifdef CONFIG_MACH_HTCARTEMIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCARTEMIS -# endif -# define machine_is_omap_htcartemis() (machine_arch_type == MACH_TYPE_HTCARTEMIS) -#else -# define machine_is_omap_htcartemis() (0) -#endif - -#ifdef CONFIG_MACH_NAL_HLITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAL_HLITE -# endif -# define machine_is_nal_hlite() (machine_arch_type == MACH_TYPE_NAL_HLITE) -#else -# define machine_is_nal_hlite() (0) -#endif - -#ifdef CONFIG_MACH_HTCVOGUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCVOGUE -# endif -# define machine_is_htcvogue() (machine_arch_type == MACH_TYPE_HTCVOGUE) -#else -# define machine_is_htcvogue() (0) -#endif - -#ifdef CONFIG_MACH_SMARTWEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTWEB -# endif -# define machine_is_smartweb() (machine_arch_type == MACH_TYPE_SMARTWEB) -#else -# define machine_is_smartweb() (0) -#endif - -#ifdef CONFIG_MACH_MV86XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV86XX -# endif -# define machine_is_mv86xx() (machine_arch_type == MACH_TYPE_MV86XX) -#else -# define machine_is_mv86xx() (0) -#endif - -#ifdef CONFIG_MACH_MV87XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV87XX -# endif -# define machine_is_mv87xx() (machine_arch_type == MACH_TYPE_MV87XX) -#else -# define machine_is_mv87xx() (0) -#endif - -#ifdef CONFIG_MACH_SONGYOUNGHO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SONGYOUNGHO -# endif -# define machine_is_songyoungho() (machine_arch_type == MACH_TYPE_SONGYOUNGHO) -#else -# define machine_is_songyoungho() (0) -#endif - -#ifdef CONFIG_MACH_YOUNGHOTEMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YOUNGHOTEMA -# endif -# define machine_is_younghotema() (machine_arch_type == MACH_TYPE_YOUNGHOTEMA) -#else -# define machine_is_younghotema() (0) -#endif - -#ifdef CONFIG_MACH_PCM037 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM037 -# endif -# define machine_is_pcm037() (machine_arch_type == MACH_TYPE_PCM037) -#else -# define machine_is_pcm037() (0) -#endif - -#ifdef CONFIG_MACH_MMVP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMVP -# endif -# define machine_is_mmvp() (machine_arch_type == MACH_TYPE_MMVP) -#else -# define machine_is_mmvp() (0) -#endif - -#ifdef CONFIG_MACH_MMAP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMAP -# endif -# define machine_is_mmap() (machine_arch_type == MACH_TYPE_MMAP) -#else -# define machine_is_mmap() (0) -#endif - -#ifdef CONFIG_MACH_PTID2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PTID2410 -# endif -# define machine_is_ptid2410() (machine_arch_type == MACH_TYPE_PTID2410) -#else -# define machine_is_ptid2410() (0) -#endif - -#ifdef CONFIG_MACH_JAMES_926 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JAMES_926 -# endif -# define machine_is_james_926() (machine_arch_type == MACH_TYPE_JAMES_926) -#else -# define machine_is_james_926() (0) -#endif - -#ifdef CONFIG_MACH_FM6000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FM6000 -# endif -# define machine_is_fm6000() (machine_arch_type == MACH_TYPE_FM6000) -#else -# define machine_is_fm6000() (0) -#endif - -#ifdef CONFIG_MACH_DB88F6281_BP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DB88F6281_BP -# endif -# define machine_is_db88f6281_bp() (machine_arch_type == MACH_TYPE_DB88F6281_BP) -#else -# define machine_is_db88f6281_bp() (0) -#endif - -#ifdef CONFIG_MACH_RD88F6192_NAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F6192_NAS -# endif -# define machine_is_rd88f6192_nas() (machine_arch_type == MACH_TYPE_RD88F6192_NAS) -#else -# define machine_is_rd88f6192_nas() (0) -#endif - -#ifdef CONFIG_MACH_RD88F6281 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F6281 -# endif -# define machine_is_rd88f6281() (machine_arch_type == MACH_TYPE_RD88F6281) -#else -# define machine_is_rd88f6281() (0) -#endif - -#ifdef CONFIG_MACH_DB78X00_BP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DB78X00_BP -# endif -# define machine_is_db78x00_bp() (machine_arch_type == MACH_TYPE_DB78X00_BP) -#else -# define machine_is_db78x00_bp() (0) -#endif - -#ifdef CONFIG_MACH_SMDK2416 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK2416 -# endif -# define machine_is_smdk2416() (machine_arch_type == MACH_TYPE_SMDK2416) -#else -# define machine_is_smdk2416() (0) -#endif - -#ifdef CONFIG_MACH_OCE_SPIDER_SI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCE_SPIDER_SI -# endif -# define machine_is_oce_spider_si() (machine_arch_type == MACH_TYPE_OCE_SPIDER_SI) -#else -# define machine_is_oce_spider_si() (0) -#endif - -#ifdef CONFIG_MACH_OCE_SPIDER_SK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCE_SPIDER_SK -# endif -# define machine_is_oce_spider_sk() (machine_arch_type == MACH_TYPE_OCE_SPIDER_SK) -#else -# define machine_is_oce_spider_sk() (0) -#endif - -#ifdef CONFIG_MACH_ROVERN6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERN6 -# endif -# define machine_is_rovern6() (machine_arch_type == MACH_TYPE_ROVERN6) -#else -# define machine_is_rovern6() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_EVOLUTION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_EVOLUTION -# endif -# define machine_is_pelco_evolution() (machine_arch_type == MACH_TYPE_PELCO_EVOLUTION) -#else -# define machine_is_pelco_evolution() (0) -#endif - -#ifdef CONFIG_MACH_WBD111 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WBD111 -# endif -# define machine_is_wbd111() (machine_arch_type == MACH_TYPE_WBD111) -#else -# define machine_is_wbd111() (0) -#endif - -#ifdef CONFIG_MACH_ELARACPE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELARACPE -# endif -# define machine_is_elaracpe() (machine_arch_type == MACH_TYPE_ELARACPE) -#else -# define machine_is_elaracpe() (0) -#endif - -#ifdef CONFIG_MACH_MABV3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MABV3 -# endif -# define machine_is_mabv3() (machine_arch_type == MACH_TYPE_MABV3) -#else -# define machine_is_mabv3() (0) -#endif - -#ifdef CONFIG_MACH_MV2120 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV2120 -# endif -# define machine_is_mv2120() (machine_arch_type == MACH_TYPE_MV2120) -#else -# define machine_is_mv2120() (0) -#endif - -#ifdef CONFIG_MACH_CSB737 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB737 -# endif -# define machine_is_csb737() (machine_arch_type == MACH_TYPE_CSB737) -#else -# define machine_is_csb737() (0) -#endif - -#ifdef CONFIG_MACH_MX51_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_3DS -# endif -# define machine_is_mx51_3ds() (machine_arch_type == MACH_TYPE_MX51_3DS) -#else -# define machine_is_mx51_3ds() (0) -#endif - -#ifdef CONFIG_MACH_G900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G900 -# endif -# define machine_is_g900() (machine_arch_type == MACH_TYPE_G900) -#else -# define machine_is_g900() (0) -#endif - -#ifdef CONFIG_MACH_APF27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APF27 -# endif -# define machine_is_apf27() (machine_arch_type == MACH_TYPE_APF27) -#else -# define machine_is_apf27() (0) -#endif - -#ifdef CONFIG_MACH_GGUS2000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GGUS2000 -# endif -# define machine_is_ggus2000() (machine_arch_type == MACH_TYPE_GGUS2000) -#else -# define machine_is_ggus2000() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_2430_MIMIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_2430_MIMIC -# endif -# define machine_is_omap_2430_mimic() (machine_arch_type == MACH_TYPE_OMAP_2430_MIMIC) -#else -# define machine_is_omap_2430_mimic() (0) -#endif - -#ifdef CONFIG_MACH_IMX27LITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27LITE -# endif -# define machine_is_imx27lite() (machine_arch_type == MACH_TYPE_IMX27LITE) -#else -# define machine_is_imx27lite() (0) -#endif - -#ifdef CONFIG_MACH_ALMEX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALMEX -# endif -# define machine_is_almex() (machine_arch_type == MACH_TYPE_ALMEX) -#else -# define machine_is_almex() (0) -#endif - -#ifdef CONFIG_MACH_CONTROL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CONTROL -# endif -# define machine_is_control() (machine_arch_type == MACH_TYPE_CONTROL) -#else -# define machine_is_control() (0) -#endif - -#ifdef CONFIG_MACH_MBA2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MBA2410 -# endif -# define machine_is_mba2410() (machine_arch_type == MACH_TYPE_MBA2410) -#else -# define machine_is_mba2410() (0) -#endif - -#ifdef CONFIG_MACH_VOLCANO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VOLCANO -# endif -# define machine_is_volcano() (machine_arch_type == MACH_TYPE_VOLCANO) -#else -# define machine_is_volcano() (0) -#endif - -#ifdef CONFIG_MACH_ZENITH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZENITH -# endif -# define machine_is_zenith() (machine_arch_type == MACH_TYPE_ZENITH) -#else -# define machine_is_zenith() (0) -#endif - -#ifdef CONFIG_MACH_MUCHIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MUCHIP -# endif -# define machine_is_muchip() (machine_arch_type == MACH_TYPE_MUCHIP) -#else -# define machine_is_muchip() (0) -#endif - -#ifdef CONFIG_MACH_MAGELLAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGELLAN -# endif -# define machine_is_magellan() (machine_arch_type == MACH_TYPE_MAGELLAN) -#else -# define machine_is_magellan() (0) -#endif - -#ifdef CONFIG_MACH_USB_A9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USB_A9260 -# endif -# define machine_is_usb_a9260() (machine_arch_type == MACH_TYPE_USB_A9260) -#else -# define machine_is_usb_a9260() (0) -#endif - -#ifdef CONFIG_MACH_USB_A9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USB_A9263 -# endif -# define machine_is_usb_a9263() (machine_arch_type == MACH_TYPE_USB_A9263) -#else -# define machine_is_usb_a9263() (0) -#endif - -#ifdef CONFIG_MACH_QIL_A9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QIL_A9260 -# endif -# define machine_is_qil_a9260() (machine_arch_type == MACH_TYPE_QIL_A9260) -#else -# define machine_is_qil_a9260() (0) -#endif - -#ifdef CONFIG_MACH_CME9210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CME9210 -# endif -# define machine_is_cme9210() (machine_arch_type == MACH_TYPE_CME9210) -#else -# define machine_is_cme9210() (0) -#endif - -#ifdef CONFIG_MACH_HCZH4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HCZH4 -# endif -# define machine_is_hczh4() (machine_arch_type == MACH_TYPE_HCZH4) -#else -# define machine_is_hczh4() (0) -#endif - -#ifdef CONFIG_MACH_SPEARBASIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEARBASIC -# endif -# define machine_is_spearbasic() (machine_arch_type == MACH_TYPE_SPEARBASIC) -#else -# define machine_is_spearbasic() (0) -#endif - -#ifdef CONFIG_MACH_DEP2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEP2440 -# endif -# define machine_is_dep2440() (machine_arch_type == MACH_TYPE_DEP2440) -#else -# define machine_is_dep2440() (0) -#endif - -#ifdef CONFIG_MACH_HDL_GXR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDL_GXR -# endif -# define machine_is_hdl_gxr() (machine_arch_type == MACH_TYPE_HDL_GXR) -#else -# define machine_is_hdl_gxr() (0) -#endif - -#ifdef CONFIG_MACH_HDL_GT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDL_GT -# endif -# define machine_is_hdl_gt() (machine_arch_type == MACH_TYPE_HDL_GT) -#else -# define machine_is_hdl_gt() (0) -#endif - -#ifdef CONFIG_MACH_HDL_4G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDL_4G -# endif -# define machine_is_hdl_4g() (machine_arch_type == MACH_TYPE_HDL_4G) -#else -# define machine_is_hdl_4g() (0) -#endif - -#ifdef CONFIG_MACH_S3C6000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C6000 -# endif -# define machine_is_s3c6000() (machine_arch_type == MACH_TYPE_S3C6000) -#else -# define machine_is_s3c6000() (0) -#endif - -#ifdef CONFIG_MACH_MMSP2_MDK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMSP2_MDK -# endif -# define machine_is_mmsp2_mdk() (machine_arch_type == MACH_TYPE_MMSP2_MDK) -#else -# define machine_is_mmsp2_mdk() (0) -#endif - -#ifdef CONFIG_MACH_MPX220 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPX220 -# endif -# define machine_is_mpx220() (machine_arch_type == MACH_TYPE_MPX220) -#else -# define machine_is_mpx220() (0) -#endif - -#ifdef CONFIG_MACH_KZM_ARM11_01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KZM_ARM11_01 -# endif -# define machine_is_kzm_arm11_01() (machine_arch_type == MACH_TYPE_KZM_ARM11_01) -#else -# define machine_is_kzm_arm11_01() (0) -#endif - -#ifdef CONFIG_MACH_HTC_POLARIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_POLARIS -# endif -# define machine_is_htc_polaris() (machine_arch_type == MACH_TYPE_HTC_POLARIS) -#else -# define machine_is_htc_polaris() (0) -#endif - -#ifdef CONFIG_MACH_HTC_KAISER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_KAISER -# endif -# define machine_is_htc_kaiser() (machine_arch_type == MACH_TYPE_HTC_KAISER) -#else -# define machine_is_htc_kaiser() (0) -#endif - -#ifdef CONFIG_MACH_LG_KS20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LG_KS20 -# endif -# define machine_is_lg_ks20() (machine_arch_type == MACH_TYPE_LG_KS20) -#else -# define machine_is_lg_ks20() (0) -#endif - -#ifdef CONFIG_MACH_HHGPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HHGPS -# endif -# define machine_is_hhgps() (machine_arch_type == MACH_TYPE_HHGPS) -#else -# define machine_is_hhgps() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA_N810_WIMAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA_N810_WIMAX -# endif -# define machine_is_nokia_n810_wimax() (machine_arch_type == MACH_TYPE_NOKIA_N810_WIMAX) -#else -# define machine_is_nokia_n810_wimax() (0) -#endif - -#ifdef CONFIG_MACH_INSIGHT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INSIGHT -# endif -# define machine_is_insight() (machine_arch_type == MACH_TYPE_INSIGHT) -#else -# define machine_is_insight() (0) -#endif - -#ifdef CONFIG_MACH_SAPPHIRE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAPPHIRE -# endif -# define machine_is_sapphire() (machine_arch_type == MACH_TYPE_SAPPHIRE) -#else -# define machine_is_sapphire() (0) -#endif - -#ifdef CONFIG_MACH_CSB637XO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB637XO -# endif -# define machine_is_csb637xo() (machine_arch_type == MACH_TYPE_CSB637XO) -#else -# define machine_is_csb637xo() (0) -#endif - -#ifdef CONFIG_MACH_EVISIONG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EVISIONG -# endif -# define machine_is_evisiong() (machine_arch_type == MACH_TYPE_EVISIONG) -#else -# define machine_is_evisiong() (0) -#endif - -#ifdef CONFIG_MACH_STMP37XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STMP37XX -# endif -# define machine_is_stmp37xx() (machine_arch_type == MACH_TYPE_STMP37XX) -#else -# define machine_is_stmp37xx() (0) -#endif - -#ifdef CONFIG_MACH_STMP378X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STMP378X -# endif -# define machine_is_stmp378x() (machine_arch_type == MACH_TYPE_STMP378X) -#else -# define machine_is_stmp378x() (0) -#endif - -#ifdef CONFIG_MACH_TNT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNT -# endif -# define machine_is_tnt() (machine_arch_type == MACH_TYPE_TNT) -#else -# define machine_is_tnt() (0) -#endif - -#ifdef CONFIG_MACH_TBXT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TBXT -# endif -# define machine_is_tbxt() (machine_arch_type == MACH_TYPE_TBXT) -#else -# define machine_is_tbxt() (0) -#endif - -#ifdef CONFIG_MACH_PLAYMATE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PLAYMATE -# endif -# define machine_is_playmate() (machine_arch_type == MACH_TYPE_PLAYMATE) -#else -# define machine_is_playmate() (0) -#endif - -#ifdef CONFIG_MACH_PNS10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNS10 -# endif -# define machine_is_pns10() (machine_arch_type == MACH_TYPE_PNS10) -#else -# define machine_is_pns10() (0) -#endif - -#ifdef CONFIG_MACH_EZNAVI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZNAVI -# endif -# define machine_is_eznavi() (machine_arch_type == MACH_TYPE_EZNAVI) -#else -# define machine_is_eznavi() (0) -#endif - -#ifdef CONFIG_MACH_PS4000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PS4000 -# endif -# define machine_is_ps4000() (machine_arch_type == MACH_TYPE_PS4000) -#else -# define machine_is_ps4000() (0) -#endif - -#ifdef CONFIG_MACH_EZX_A780 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_A780 -# endif -# define machine_is_ezx_a780() (machine_arch_type == MACH_TYPE_EZX_A780) -#else -# define machine_is_ezx_a780() (0) -#endif - -#ifdef CONFIG_MACH_EZX_E680 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_E680 -# endif -# define machine_is_ezx_e680() (machine_arch_type == MACH_TYPE_EZX_E680) -#else -# define machine_is_ezx_e680() (0) -#endif - -#ifdef CONFIG_MACH_EZX_A1200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_A1200 -# endif -# define machine_is_ezx_a1200() (machine_arch_type == MACH_TYPE_EZX_A1200) -#else -# define machine_is_ezx_a1200() (0) -#endif - -#ifdef CONFIG_MACH_EZX_E6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_E6 -# endif -# define machine_is_ezx_e6() (machine_arch_type == MACH_TYPE_EZX_E6) -#else -# define machine_is_ezx_e6() (0) -#endif - -#ifdef CONFIG_MACH_EZX_E2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_E2 -# endif -# define machine_is_ezx_e2() (machine_arch_type == MACH_TYPE_EZX_E2) -#else -# define machine_is_ezx_e2() (0) -#endif - -#ifdef CONFIG_MACH_EZX_A910 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EZX_A910 -# endif -# define machine_is_ezx_a910() (machine_arch_type == MACH_TYPE_EZX_A910) -#else -# define machine_is_ezx_a910() (0) -#endif - -#ifdef CONFIG_MACH_CWMX31 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWMX31 -# endif -# define machine_is_cwmx31() (machine_arch_type == MACH_TYPE_CWMX31) -#else -# define machine_is_cwmx31() (0) -#endif - -#ifdef CONFIG_MACH_SL2312 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SL2312 -# endif -# define machine_is_sl2312() (machine_arch_type == MACH_TYPE_SL2312) -#else -# define machine_is_sl2312() (0) -#endif - -#ifdef CONFIG_MACH_BLENNY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLENNY -# endif -# define machine_is_blenny() (machine_arch_type == MACH_TYPE_BLENNY) -#else -# define machine_is_blenny() (0) -#endif - -#ifdef CONFIG_MACH_DS107 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DS107 -# endif -# define machine_is_ds107() (machine_arch_type == MACH_TYPE_DS107) -#else -# define machine_is_ds107() (0) -#endif - -#ifdef CONFIG_MACH_DSX07 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSX07 -# endif -# define machine_is_dsx07() (machine_arch_type == MACH_TYPE_DSX07) -#else -# define machine_is_dsx07() (0) -#endif - -#ifdef CONFIG_MACH_PICOCOM1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOCOM1 -# endif -# define machine_is_picocom1() (machine_arch_type == MACH_TYPE_PICOCOM1) -#else -# define machine_is_picocom1() (0) -#endif - -#ifdef CONFIG_MACH_LYNX_WOLVERINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LYNX_WOLVERINE -# endif -# define machine_is_lynx_wolverine() (machine_arch_type == MACH_TYPE_LYNX_WOLVERINE) -#else -# define machine_is_lynx_wolverine() (0) -#endif - -#ifdef CONFIG_MACH_UBISYS_P9_SC19 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UBISYS_P9_SC19 -# endif -# define machine_is_ubisys_p9_sc19() (machine_arch_type == MACH_TYPE_UBISYS_P9_SC19) -#else -# define machine_is_ubisys_p9_sc19() (0) -#endif - -#ifdef CONFIG_MACH_KRATOS_LOW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KRATOS_LOW -# endif -# define machine_is_kratos_low() (machine_arch_type == MACH_TYPE_KRATOS_LOW) -#else -# define machine_is_kratos_low() (0) -#endif - -#ifdef CONFIG_MACH_M700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M700 -# endif -# define machine_is_m700() (machine_arch_type == MACH_TYPE_M700) -#else -# define machine_is_m700() (0) -#endif - -#ifdef CONFIG_MACH_EDMINI_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDMINI_V2 -# endif -# define machine_is_edmini_v2() (machine_arch_type == MACH_TYPE_EDMINI_V2) -#else -# define machine_is_edmini_v2() (0) -#endif - -#ifdef CONFIG_MACH_ZIPIT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZIPIT2 -# endif -# define machine_is_zipit2() (machine_arch_type == MACH_TYPE_ZIPIT2) -#else -# define machine_is_zipit2() (0) -#endif - -#ifdef CONFIG_MACH_HSLFEMTOCELL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HSLFEMTOCELL -# endif -# define machine_is_hslfemtocell() (machine_arch_type == MACH_TYPE_HSLFEMTOCELL) -#else -# define machine_is_hslfemtocell() (0) -#endif - -#ifdef CONFIG_MACH_DAINTREE_AT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAINTREE_AT91 -# endif -# define machine_is_daintree_at91() (machine_arch_type == MACH_TYPE_DAINTREE_AT91) -#else -# define machine_is_daintree_at91() (0) -#endif - -#ifdef CONFIG_MACH_SG560USB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG560USB -# endif -# define machine_is_sg560usb() (machine_arch_type == MACH_TYPE_SG560USB) -#else -# define machine_is_sg560usb() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_PANDORA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_PANDORA -# endif -# define machine_is_omap3_pandora() (machine_arch_type == MACH_TYPE_OMAP3_PANDORA) -#else -# define machine_is_omap3_pandora() (0) -#endif - -#ifdef CONFIG_MACH_USR8200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USR8200 -# endif -# define machine_is_usr8200() (machine_arch_type == MACH_TYPE_USR8200) -#else -# define machine_is_usr8200() (0) -#endif - -#ifdef CONFIG_MACH_S1S65K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S1S65K -# endif -# define machine_is_s1s65k() (machine_arch_type == MACH_TYPE_S1S65K) -#else -# define machine_is_s1s65k() (0) -#endif - -#ifdef CONFIG_MACH_S2S65A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S2S65A -# endif -# define machine_is_s2s65a() (machine_arch_type == MACH_TYPE_S2S65A) -#else -# define machine_is_s2s65a() (0) -#endif - -#ifdef CONFIG_MACH_ICORE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICORE -# endif -# define machine_is_icore() (machine_arch_type == MACH_TYPE_ICORE) -#else -# define machine_is_icore() (0) -#endif - -#ifdef CONFIG_MACH_MSS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSS2 -# endif -# define machine_is_mss2() (machine_arch_type == MACH_TYPE_MSS2) -#else -# define machine_is_mss2() (0) -#endif - -#ifdef CONFIG_MACH_BELMONT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BELMONT -# endif -# define machine_is_belmont() (machine_arch_type == MACH_TYPE_BELMONT) -#else -# define machine_is_belmont() (0) -#endif - -#ifdef CONFIG_MACH_ASUSP525 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASUSP525 -# endif -# define machine_is_asusp525() (machine_arch_type == MACH_TYPE_ASUSP525) -#else -# define machine_is_asusp525() (0) -#endif - -#ifdef CONFIG_MACH_LB88RC8480 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LB88RC8480 -# endif -# define machine_is_lb88rc8480() (machine_arch_type == MACH_TYPE_LB88RC8480) -#else -# define machine_is_lb88rc8480() (0) -#endif - -#ifdef CONFIG_MACH_HIPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIPXA -# endif -# define machine_is_hipxa() (machine_arch_type == MACH_TYPE_HIPXA) -#else -# define machine_is_hipxa() (0) -#endif - -#ifdef CONFIG_MACH_MX25_3DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX25_3DS -# endif -# define machine_is_mx25_3ds() (machine_arch_type == MACH_TYPE_MX25_3DS) -#else -# define machine_is_mx25_3ds() (0) -#endif - -#ifdef CONFIG_MACH_M800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M800 -# endif -# define machine_is_m800() (machine_arch_type == MACH_TYPE_M800) -#else -# define machine_is_m800() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3530_LV_SOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3530_LV_SOM -# endif -# define machine_is_omap3530_lv_som() (machine_arch_type == MACH_TYPE_OMAP3530_LV_SOM) -#else -# define machine_is_omap3530_lv_som() (0) -#endif - -#ifdef CONFIG_MACH_PRIMA_EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRIMA_EVB -# endif -# define machine_is_prima_evb() (machine_arch_type == MACH_TYPE_PRIMA_EVB) -#else -# define machine_is_prima_evb() (0) -#endif - -#ifdef CONFIG_MACH_MX31BT1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31BT1 -# endif -# define machine_is_mx31bt1() (machine_arch_type == MACH_TYPE_MX31BT1) -#else -# define machine_is_mx31bt1() (0) -#endif - -#ifdef CONFIG_MACH_ATLAS4_EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATLAS4_EVB -# endif -# define machine_is_atlas4_evb() (machine_arch_type == MACH_TYPE_ATLAS4_EVB) -#else -# define machine_is_atlas4_evb() (0) -#endif - -#ifdef CONFIG_MACH_MX31CICADA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31CICADA -# endif -# define machine_is_mx31cicada() (machine_arch_type == MACH_TYPE_MX31CICADA) -#else -# define machine_is_mx31cicada() (0) -#endif - -#ifdef CONFIG_MACH_MI424WR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MI424WR -# endif -# define machine_is_mi424wr() (machine_arch_type == MACH_TYPE_MI424WR) -#else -# define machine_is_mi424wr() (0) -#endif - -#ifdef CONFIG_MACH_AXS_ULTRAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXS_ULTRAX -# endif -# define machine_is_axs_ultrax() (machine_arch_type == MACH_TYPE_AXS_ULTRAX) -#else -# define machine_is_axs_ultrax() (0) -#endif - -#ifdef CONFIG_MACH_AT572D940DEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT572D940DEB -# endif -# define machine_is_at572d940deb() (machine_arch_type == MACH_TYPE_AT572D940DEB) -#else -# define machine_is_at572d940deb() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DA830_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DA830_EVM -# endif -# define machine_is_davinci_da830_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DA830_EVM) -#else -# define machine_is_davinci_da830_evm() (0) -#endif - -#ifdef CONFIG_MACH_EP9302 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EP9302 -# endif -# define machine_is_ep9302() (machine_arch_type == MACH_TYPE_EP9302) -#else -# define machine_is_ep9302() (0) -#endif - -#ifdef CONFIG_MACH_AT572D940HFEB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT572D940HFEB -# endif -# define machine_is_at572d940hfek() (machine_arch_type == MACH_TYPE_AT572D940HFEB) -#else -# define machine_is_at572d940hfek() (0) -#endif - -#ifdef CONFIG_MACH_CYBOOK3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBOOK3 -# endif -# define machine_is_cybook3() (machine_arch_type == MACH_TYPE_CYBOOK3) -#else -# define machine_is_cybook3() (0) -#endif - -#ifdef CONFIG_MACH_WDG002 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WDG002 -# endif -# define machine_is_wdg002() (machine_arch_type == MACH_TYPE_WDG002) -#else -# define machine_is_wdg002() (0) -#endif - -#ifdef CONFIG_MACH_SG560ADSL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SG560ADSL -# endif -# define machine_is_sg560adsl() (machine_arch_type == MACH_TYPE_SG560ADSL) -#else -# define machine_is_sg560adsl() (0) -#endif - -#ifdef CONFIG_MACH_NEXTIO_N2800_ICA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEXTIO_N2800_ICA -# endif -# define machine_is_nextio_n2800_ica() (machine_arch_type == MACH_TYPE_NEXTIO_N2800_ICA) -#else -# define machine_is_nextio_n2800_ica() (0) -#endif - -#ifdef CONFIG_MACH_DOVE_DB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOVE_DB -# endif -# define machine_is_dove_db() (machine_arch_type == MACH_TYPE_DOVE_DB) -#else -# define machine_is_dove_db() (0) -#endif - -#ifdef CONFIG_MACH_MARVELL_NEWDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARVELL_NEWDB -# endif -# define machine_is_marvell_newdb() (machine_arch_type == MACH_TYPE_MARVELL_NEWDB) -#else -# define machine_is_marvell_newdb() (0) -#endif - -#ifdef CONFIG_MACH_VANDIHUD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VANDIHUD -# endif -# define machine_is_vandihud() (machine_arch_type == MACH_TYPE_VANDIHUD) -#else -# define machine_is_vandihud() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_E8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_E8 -# endif -# define machine_is_magx_e8() (machine_arch_type == MACH_TYPE_MAGX_E8) -#else -# define machine_is_magx_e8() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_Z6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_Z6 -# endif -# define machine_is_magx_z6() (machine_arch_type == MACH_TYPE_MAGX_Z6) -#else -# define machine_is_magx_z6() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_V8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_V8 -# endif -# define machine_is_magx_v8() (machine_arch_type == MACH_TYPE_MAGX_V8) -#else -# define machine_is_magx_v8() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_U9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_U9 -# endif -# define machine_is_magx_u9() (machine_arch_type == MACH_TYPE_MAGX_U9) -#else -# define machine_is_magx_u9() (0) -#endif - -#ifdef CONFIG_MACH_TOUGHCF08 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOUGHCF08 -# endif -# define machine_is_toughcf08() (machine_arch_type == MACH_TYPE_TOUGHCF08) -#else -# define machine_is_toughcf08() (0) -#endif - -#ifdef CONFIG_MACH_ZW4400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZW4400 -# endif -# define machine_is_zw4400() (machine_arch_type == MACH_TYPE_ZW4400) -#else -# define machine_is_zw4400() (0) -#endif - -#ifdef CONFIG_MACH_MARAT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARAT91 -# endif -# define machine_is_marat91() (machine_arch_type == MACH_TYPE_MARAT91) -#else -# define machine_is_marat91() (0) -#endif - -#ifdef CONFIG_MACH_OVERO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OVERO -# endif -# define machine_is_overo() (machine_arch_type == MACH_TYPE_OVERO) -#else -# define machine_is_overo() (0) -#endif - -#ifdef CONFIG_MACH_AT2440EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT2440EVB -# endif -# define machine_is_at2440evb() (machine_arch_type == MACH_TYPE_AT2440EVB) -#else -# define machine_is_at2440evb() (0) -#endif - -#ifdef CONFIG_MACH_NEOCORE926 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEOCORE926 -# endif -# define machine_is_neocore926() (machine_arch_type == MACH_TYPE_NEOCORE926) -#else -# define machine_is_neocore926() (0) -#endif - -#ifdef CONFIG_MACH_WNR854T -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WNR854T -# endif -# define machine_is_wnr854t() (machine_arch_type == MACH_TYPE_WNR854T) -#else -# define machine_is_wnr854t() (0) -#endif - -#ifdef CONFIG_MACH_IMX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27 -# endif -# define machine_is_imx27() (machine_arch_type == MACH_TYPE_IMX27) -#else -# define machine_is_imx27() (0) -#endif - -#ifdef CONFIG_MACH_MOOSE_DB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOOSE_DB -# endif -# define machine_is_moose_db() (machine_arch_type == MACH_TYPE_MOOSE_DB) -#else -# define machine_is_moose_db() (0) -#endif - -#ifdef CONFIG_MACH_FAB4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FAB4 -# endif -# define machine_is_fab4() (machine_arch_type == MACH_TYPE_FAB4) -#else -# define machine_is_fab4() (0) -#endif - -#ifdef CONFIG_MACH_HTCDIAMOND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCDIAMOND -# endif -# define machine_is_htcdiamond() (machine_arch_type == MACH_TYPE_HTCDIAMOND) -#else -# define machine_is_htcdiamond() (0) -#endif - -#ifdef CONFIG_MACH_FIONA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FIONA -# endif -# define machine_is_fiona() (machine_arch_type == MACH_TYPE_FIONA) -#else -# define machine_is_fiona() (0) -#endif - -#ifdef CONFIG_MACH_MXC30030_X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC30030_X -# endif -# define machine_is_mxc30030_x() (machine_arch_type == MACH_TYPE_MXC30030_X) -#else -# define machine_is_mxc30030_x() (0) -#endif - -#ifdef CONFIG_MACH_BMP1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BMP1000 -# endif -# define machine_is_bmp1000() (machine_arch_type == MACH_TYPE_BMP1000) -#else -# define machine_is_bmp1000() (0) -#endif - -#ifdef CONFIG_MACH_LOGI9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOGI9200 -# endif -# define machine_is_logi9200() (machine_arch_type == MACH_TYPE_LOGI9200) -#else -# define machine_is_logi9200() (0) -#endif - -#ifdef CONFIG_MACH_TQMA31 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TQMA31 -# endif -# define machine_is_tqma31() (machine_arch_type == MACH_TYPE_TQMA31) -#else -# define machine_is_tqma31() (0) -#endif - -#ifdef CONFIG_MACH_CCW9P9215JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCW9P9215JS -# endif -# define machine_is_ccw9p9215js() (machine_arch_type == MACH_TYPE_CCW9P9215JS) -#else -# define machine_is_ccw9p9215js() (0) -#endif - -#ifdef CONFIG_MACH_RD88F5181L_GE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F5181L_GE -# endif -# define machine_is_rd88f5181l_ge() (machine_arch_type == MACH_TYPE_RD88F5181L_GE) -#else -# define machine_is_rd88f5181l_ge() (0) -#endif - -#ifdef CONFIG_MACH_SIFMAIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIFMAIN -# endif -# define machine_is_sifmain() (machine_arch_type == MACH_TYPE_SIFMAIN) -#else -# define machine_is_sifmain() (0) -#endif - -#ifdef CONFIG_MACH_SAM9_L9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAM9_L9261 -# endif -# define machine_is_sam9_l9261() (machine_arch_type == MACH_TYPE_SAM9_L9261) -#else -# define machine_is_sam9_l9261() (0) -#endif - -#ifdef CONFIG_MACH_CC9M2443 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9M2443 -# endif -# define machine_is_cc9m2443() (machine_arch_type == MACH_TYPE_CC9M2443) -#else -# define machine_is_cc9m2443() (0) -#endif - -#ifdef CONFIG_MACH_XARIA300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XARIA300 -# endif -# define machine_is_xaria300() (machine_arch_type == MACH_TYPE_XARIA300) -#else -# define machine_is_xaria300() (0) -#endif - -#ifdef CONFIG_MACH_IT9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IT9200 -# endif -# define machine_is_it9200() (machine_arch_type == MACH_TYPE_IT9200) -#else -# define machine_is_it9200() (0) -#endif - -#ifdef CONFIG_MACH_RD88F5181L_FXO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F5181L_FXO -# endif -# define machine_is_rd88f5181l_fxo() (machine_arch_type == MACH_TYPE_RD88F5181L_FXO) -#else -# define machine_is_rd88f5181l_fxo() (0) -#endif - -#ifdef CONFIG_MACH_KRISS_SENSOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KRISS_SENSOR -# endif -# define machine_is_kriss_sensor() (machine_arch_type == MACH_TYPE_KRISS_SENSOR) -#else -# define machine_is_kriss_sensor() (0) -#endif - -#ifdef CONFIG_MACH_PILZ_PMI5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PILZ_PMI5 -# endif -# define machine_is_pilz_pmi5() (machine_arch_type == MACH_TYPE_PILZ_PMI5) -#else -# define machine_is_pilz_pmi5() (0) -#endif - -#ifdef CONFIG_MACH_JADE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JADE -# endif -# define machine_is_jade() (machine_arch_type == MACH_TYPE_JADE) -#else -# define machine_is_jade() (0) -#endif - -#ifdef CONFIG_MACH_KS8695_SOFTPLC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KS8695_SOFTPLC -# endif -# define machine_is_ks8695_softplc() (machine_arch_type == MACH_TYPE_KS8695_SOFTPLC) -#else -# define machine_is_ks8695_softplc() (0) -#endif - -#ifdef CONFIG_MACH_GPRISC3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GPRISC3 -# endif -# define machine_is_gprisc3() (machine_arch_type == MACH_TYPE_GPRISC3) -#else -# define machine_is_gprisc3() (0) -#endif - -#ifdef CONFIG_MACH_STAMP9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAMP9G20 -# endif -# define machine_is_stamp9g20() (machine_arch_type == MACH_TYPE_STAMP9G20) -#else -# define machine_is_stamp9g20() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6430 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6430 -# endif -# define machine_is_smdk6430() (machine_arch_type == MACH_TYPE_SMDK6430) -#else -# define machine_is_smdk6430() (0) -#endif - -#ifdef CONFIG_MACH_SMDKC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKC100 -# endif -# define machine_is_smdkc100() (machine_arch_type == MACH_TYPE_SMDKC100) -#else -# define machine_is_smdkc100() (0) -#endif - -#ifdef CONFIG_MACH_TAVOREVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAVOREVB -# endif -# define machine_is_tavorevb() (machine_arch_type == MACH_TYPE_TAVOREVB) -#else -# define machine_is_tavorevb() (0) -#endif - -#ifdef CONFIG_MACH_SAAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAAR -# endif -# define machine_is_saar() (machine_arch_type == MACH_TYPE_SAAR) -#else -# define machine_is_saar() (0) -#endif - -#ifdef CONFIG_MACH_DEISTER_EYECAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEISTER_EYECAM -# endif -# define machine_is_deister_eyecam() (machine_arch_type == MACH_TYPE_DEISTER_EYECAM) -#else -# define machine_is_deister_eyecam() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9M10G45EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9M10G45EK -# endif -# define machine_is_at91sam9m10g45ek() (machine_arch_type == MACH_TYPE_AT91SAM9M10G45EK) -#else -# define machine_is_at91sam9m10g45ek() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_PRODUO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_PRODUO -# endif -# define machine_is_linkstation_produo() (machine_arch_type == MACH_TYPE_LINKSTATION_PRODUO) -#else -# define machine_is_linkstation_produo() (0) -#endif - -#ifdef CONFIG_MACH_HIT_B0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIT_B0 -# endif -# define machine_is_hit_b0() (machine_arch_type == MACH_TYPE_HIT_B0) -#else -# define machine_is_hit_b0() (0) -#endif - -#ifdef CONFIG_MACH_ADX_RMU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_RMU -# endif -# define machine_is_adx_rmu() (machine_arch_type == MACH_TYPE_ADX_RMU) -#else -# define machine_is_adx_rmu() (0) -#endif - -#ifdef CONFIG_MACH_XG_CPE_MAIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XG_CPE_MAIN -# endif -# define machine_is_xg_cpe_main() (machine_arch_type == MACH_TYPE_XG_CPE_MAIN) -#else -# define machine_is_xg_cpe_main() (0) -#endif - -#ifdef CONFIG_MACH_EDB9407A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDB9407A -# endif -# define machine_is_edb9407a() (machine_arch_type == MACH_TYPE_EDB9407A) -#else -# define machine_is_edb9407a() (0) -#endif - -#ifdef CONFIG_MACH_DTB9608 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DTB9608 -# endif -# define machine_is_dtb9608() (machine_arch_type == MACH_TYPE_DTB9608) -#else -# define machine_is_dtb9608() (0) -#endif - -#ifdef CONFIG_MACH_EM104V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EM104V1 -# endif -# define machine_is_em104v1() (machine_arch_type == MACH_TYPE_EM104V1) -#else -# define machine_is_em104v1() (0) -#endif - -#ifdef CONFIG_MACH_DEMO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEMO -# endif -# define machine_is_demo() (machine_arch_type == MACH_TYPE_DEMO) -#else -# define machine_is_demo() (0) -#endif - -#ifdef CONFIG_MACH_LOGI9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOGI9260 -# endif -# define machine_is_logi9260() (machine_arch_type == MACH_TYPE_LOGI9260) -#else -# define machine_is_logi9260() (0) -#endif - -#ifdef CONFIG_MACH_MX31_EXM32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31_EXM32 -# endif -# define machine_is_mx31_exm32() (machine_arch_type == MACH_TYPE_MX31_EXM32) -#else -# define machine_is_mx31_exm32() (0) -#endif - -#ifdef CONFIG_MACH_USB_A9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USB_A9G20 -# endif -# define machine_is_usb_a9g20() (machine_arch_type == MACH_TYPE_USB_A9G20) -#else -# define machine_is_usb_a9g20() (0) -#endif - -#ifdef CONFIG_MACH_PICPROJE2008 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICPROJE2008 -# endif -# define machine_is_picproje2008() (machine_arch_type == MACH_TYPE_PICPROJE2008) -#else -# define machine_is_picproje2008() (0) -#endif - -#ifdef CONFIG_MACH_CS_E9315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CS_E9315 -# endif -# define machine_is_cs_e9315() (machine_arch_type == MACH_TYPE_CS_E9315) -#else -# define machine_is_cs_e9315() (0) -#endif - -#ifdef CONFIG_MACH_QIL_A9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QIL_A9G20 -# endif -# define machine_is_qil_a9g20() (machine_arch_type == MACH_TYPE_QIL_A9G20) -#else -# define machine_is_qil_a9g20() (0) -#endif - -#ifdef CONFIG_MACH_SHA_PON020 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHA_PON020 -# endif -# define machine_is_sha_pon020() (machine_arch_type == MACH_TYPE_SHA_PON020) -#else -# define machine_is_sha_pon020() (0) -#endif - -#ifdef CONFIG_MACH_NAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAD -# endif -# define machine_is_nad() (machine_arch_type == MACH_TYPE_NAD) -#else -# define machine_is_nad() (0) -#endif - -#ifdef CONFIG_MACH_SBC35_A9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC35_A9260 -# endif -# define machine_is_sbc35_a9260() (machine_arch_type == MACH_TYPE_SBC35_A9260) -#else -# define machine_is_sbc35_a9260() (0) -#endif - -#ifdef CONFIG_MACH_SBC35_A9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC35_A9G20 -# endif -# define machine_is_sbc35_a9g20() (machine_arch_type == MACH_TYPE_SBC35_A9G20) -#else -# define machine_is_sbc35_a9g20() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_BEGINNING -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_BEGINNING -# endif -# define machine_is_davinci_beginning() (machine_arch_type == MACH_TYPE_DAVINCI_BEGINNING) -#else -# define machine_is_davinci_beginning() (0) -#endif - -#ifdef CONFIG_MACH_UWC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UWC -# endif -# define machine_is_uwc() (machine_arch_type == MACH_TYPE_UWC) -#else -# define machine_is_uwc() (0) -#endif - -#ifdef CONFIG_MACH_MXLADS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXLADS -# endif -# define machine_is_mxlads() (machine_arch_type == MACH_TYPE_MXLADS) -#else -# define machine_is_mxlads() (0) -#endif - -#ifdef CONFIG_MACH_HTCNIKE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCNIKE -# endif -# define machine_is_htcnike() (machine_arch_type == MACH_TYPE_HTCNIKE) -#else -# define machine_is_htcnike() (0) -#endif - -#ifdef CONFIG_MACH_DEISTER_PXA270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEISTER_PXA270 -# endif -# define machine_is_deister_pxa270() (machine_arch_type == MACH_TYPE_DEISTER_PXA270) -#else -# define machine_is_deister_pxa270() (0) -#endif - -#ifdef CONFIG_MACH_CME9210JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CME9210JS -# endif -# define machine_is_cme9210js() (machine_arch_type == MACH_TYPE_CME9210JS) -#else -# define machine_is_cme9210js() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9360 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9360 -# endif -# define machine_is_cc9p9360() (machine_arch_type == MACH_TYPE_CC9P9360) -#else -# define machine_is_cc9p9360() (0) -#endif - -#ifdef CONFIG_MACH_MOCHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOCHA -# endif -# define machine_is_mocha() (machine_arch_type == MACH_TYPE_MOCHA) -#else -# define machine_is_mocha() (0) -#endif - -#ifdef CONFIG_MACH_WAPD170AG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WAPD170AG -# endif -# define machine_is_wapd170ag() (machine_arch_type == MACH_TYPE_WAPD170AG) -#else -# define machine_is_wapd170ag() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_MINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_MINI -# endif -# define machine_is_linkstation_mini() (machine_arch_type == MACH_TYPE_LINKSTATION_MINI) -#else -# define machine_is_linkstation_mini() (0) -#endif - -#ifdef CONFIG_MACH_AFEB9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AFEB9260 -# endif -# define machine_is_afeb9260() (machine_arch_type == MACH_TYPE_AFEB9260) -#else -# define machine_is_afeb9260() (0) -#endif - -#ifdef CONFIG_MACH_W90X900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90X900 -# endif -# define machine_is_w90x900() (machine_arch_type == MACH_TYPE_W90X900) -#else -# define machine_is_w90x900() (0) -#endif - -#ifdef CONFIG_MACH_W90X700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90X700 -# endif -# define machine_is_w90x700() (machine_arch_type == MACH_TYPE_W90X700) -#else -# define machine_is_w90x700() (0) -#endif - -#ifdef CONFIG_MACH_KT300IP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KT300IP -# endif -# define machine_is_kt300ip() (machine_arch_type == MACH_TYPE_KT300IP) -#else -# define machine_is_kt300ip() (0) -#endif - -#ifdef CONFIG_MACH_KT300IP_G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KT300IP_G20 -# endif -# define machine_is_kt300ip_g20() (machine_arch_type == MACH_TYPE_KT300IP_G20) -#else -# define machine_is_kt300ip_g20() (0) -#endif - -#ifdef CONFIG_MACH_SRCM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SRCM -# endif -# define machine_is_srcm() (machine_arch_type == MACH_TYPE_SRCM) -#else -# define machine_is_srcm() (0) -#endif - -#ifdef CONFIG_MACH_WLNX_9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WLNX_9260 -# endif -# define machine_is_wlnx_9260() (machine_arch_type == MACH_TYPE_WLNX_9260) -#else -# define machine_is_wlnx_9260() (0) -#endif - -#ifdef CONFIG_MACH_OPENMOKO_GTA03 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENMOKO_GTA03 -# endif -# define machine_is_openmoko_gta03() (machine_arch_type == MACH_TYPE_OPENMOKO_GTA03) -#else -# define machine_is_openmoko_gta03() (0) -#endif - -#ifdef CONFIG_MACH_OSPREY2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OSPREY2 -# endif -# define machine_is_osprey2() (machine_arch_type == MACH_TYPE_OSPREY2) -#else -# define machine_is_osprey2() (0) -#endif - -#ifdef CONFIG_MACH_KBIO9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KBIO9260 -# endif -# define machine_is_kbio9260() (machine_arch_type == MACH_TYPE_KBIO9260) -#else -# define machine_is_kbio9260() (0) -#endif - -#ifdef CONFIG_MACH_GINZA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GINZA -# endif -# define machine_is_ginza() (machine_arch_type == MACH_TYPE_GINZA) -#else -# define machine_is_ginza() (0) -#endif - -#ifdef CONFIG_MACH_A636N -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A636N -# endif -# define machine_is_a636n() (machine_arch_type == MACH_TYPE_A636N) -#else -# define machine_is_a636n() (0) -#endif - -#ifdef CONFIG_MACH_IMX27IPCAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27IPCAM -# endif -# define machine_is_imx27ipcam() (machine_arch_type == MACH_TYPE_IMX27IPCAM) -#else -# define machine_is_imx27ipcam() (0) -#endif - -#ifdef CONFIG_MACH_NEMOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEMOC -# endif -# define machine_is_nemoc() (machine_arch_type == MACH_TYPE_NEMOC) -#else -# define machine_is_nemoc() (0) -#endif - -#ifdef CONFIG_MACH_GENEVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GENEVA -# endif -# define machine_is_geneva() (machine_arch_type == MACH_TYPE_GENEVA) -#else -# define machine_is_geneva() (0) -#endif - -#ifdef CONFIG_MACH_HTCPHAROS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCPHAROS -# endif -# define machine_is_htcpharos() (machine_arch_type == MACH_TYPE_HTCPHAROS) -#else -# define machine_is_htcpharos() (0) -#endif - -#ifdef CONFIG_MACH_NEONC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEONC -# endif -# define machine_is_neonc() (machine_arch_type == MACH_TYPE_NEONC) -#else -# define machine_is_neonc() (0) -#endif - -#ifdef CONFIG_MACH_NAS7100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAS7100 -# endif -# define machine_is_nas7100() (machine_arch_type == MACH_TYPE_NAS7100) -#else -# define machine_is_nas7100() (0) -#endif - -#ifdef CONFIG_MACH_TEUPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEUPHONE -# endif -# define machine_is_teuphone() (machine_arch_type == MACH_TYPE_TEUPHONE) -#else -# define machine_is_teuphone() (0) -#endif - -#ifdef CONFIG_MACH_ANNAX_ETH2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANNAX_ETH2 -# endif -# define machine_is_annax_eth2() (machine_arch_type == MACH_TYPE_ANNAX_ETH2) -#else -# define machine_is_annax_eth2() (0) -#endif - -#ifdef CONFIG_MACH_CSB733 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB733 -# endif -# define machine_is_csb733() (machine_arch_type == MACH_TYPE_CSB733) -#else -# define machine_is_csb733() (0) -#endif - -#ifdef CONFIG_MACH_BK3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BK3 -# endif -# define machine_is_bk3() (machine_arch_type == MACH_TYPE_BK3) -#else -# define machine_is_bk3() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_EM32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_EM32 -# endif -# define machine_is_omap_em32() (machine_arch_type == MACH_TYPE_OMAP_EM32) -#else -# define machine_is_omap_em32() (0) -#endif - -#ifdef CONFIG_MACH_ET9261CP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ET9261CP -# endif -# define machine_is_et9261cp() (machine_arch_type == MACH_TYPE_ET9261CP) -#else -# define machine_is_et9261cp() (0) -#endif - -#ifdef CONFIG_MACH_JASPERC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JASPERC -# endif -# define machine_is_jasperc() (machine_arch_type == MACH_TYPE_JASPERC) -#else -# define machine_is_jasperc() (0) -#endif - -#ifdef CONFIG_MACH_ISSI_ARM9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ISSI_ARM9 -# endif -# define machine_is_issi_arm9() (machine_arch_type == MACH_TYPE_ISSI_ARM9) -#else -# define machine_is_issi_arm9() (0) -#endif - -#ifdef CONFIG_MACH_UED -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UED -# endif -# define machine_is_ued() (machine_arch_type == MACH_TYPE_UED) -#else -# define machine_is_ued() (0) -#endif - -#ifdef CONFIG_MACH_ESIBLADE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESIBLADE -# endif -# define machine_is_esiblade() (machine_arch_type == MACH_TYPE_ESIBLADE) -#else -# define machine_is_esiblade() (0) -#endif - -#ifdef CONFIG_MACH_EYE02 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EYE02 -# endif -# define machine_is_eye02() (machine_arch_type == MACH_TYPE_EYE02) -#else -# define machine_is_eye02() (0) -#endif - -#ifdef CONFIG_MACH_IMX27KBD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27KBD -# endif -# define machine_is_imx27kbd() (machine_arch_type == MACH_TYPE_IMX27KBD) -#else -# define machine_is_imx27kbd() (0) -#endif - -#ifdef CONFIG_MACH_SST61VC010_FPGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SST61VC010_FPGA -# endif -# define machine_is_sst61vc010_fpga() (machine_arch_type == MACH_TYPE_SST61VC010_FPGA) -#else -# define machine_is_sst61vc010_fpga() (0) -#endif - -#ifdef CONFIG_MACH_KIXVP435 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KIXVP435 -# endif -# define machine_is_kixvp435() (machine_arch_type == MACH_TYPE_KIXVP435) -#else -# define machine_is_kixvp435() (0) -#endif - -#ifdef CONFIG_MACH_KIXNP435 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KIXNP435 -# endif -# define machine_is_kixnp435() (machine_arch_type == MACH_TYPE_KIXNP435) -#else -# define machine_is_kixnp435() (0) -#endif - -#ifdef CONFIG_MACH_AFRICA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AFRICA -# endif -# define machine_is_africa() (machine_arch_type == MACH_TYPE_AFRICA) -#else -# define machine_is_africa() (0) -#endif - -#ifdef CONFIG_MACH_NH233 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NH233 -# endif -# define machine_is_nh233() (machine_arch_type == MACH_TYPE_NH233) -#else -# define machine_is_nh233() (0) -#endif - -#ifdef CONFIG_MACH_RD88F6183AP_GE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD88F6183AP_GE -# endif -# define machine_is_rd88f6183ap_ge() (machine_arch_type == MACH_TYPE_RD88F6183AP_GE) -#else -# define machine_is_rd88f6183ap_ge() (0) -#endif - -#ifdef CONFIG_MACH_BCM4760 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCM4760 -# endif -# define machine_is_bcm4760() (machine_arch_type == MACH_TYPE_BCM4760) -#else -# define machine_is_bcm4760() (0) -#endif - -#ifdef CONFIG_MACH_EDDY_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDDY_V2 -# endif -# define machine_is_eddy_v2() (machine_arch_type == MACH_TYPE_EDDY_V2) -#else -# define machine_is_eddy_v2() (0) -#endif - -#ifdef CONFIG_MACH_REALVIEW_PBA8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REALVIEW_PBA8 -# endif -# define machine_is_realview_pba8() (machine_arch_type == MACH_TYPE_REALVIEW_PBA8) -#else -# define machine_is_realview_pba8() (0) -#endif - -#ifdef CONFIG_MACH_HID_A7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HID_A7 -# endif -# define machine_is_hid_a7() (machine_arch_type == MACH_TYPE_HID_A7) -#else -# define machine_is_hid_a7() (0) -#endif - -#ifdef CONFIG_MACH_HERO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERO -# endif -# define machine_is_hero() (machine_arch_type == MACH_TYPE_HERO) -#else -# define machine_is_hero() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_POSEIDON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_POSEIDON -# endif -# define machine_is_omap_poseidon() (machine_arch_type == MACH_TYPE_OMAP_POSEIDON) -#else -# define machine_is_omap_poseidon() (0) -#endif - -#ifdef CONFIG_MACH_REALVIEW_PBX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REALVIEW_PBX -# endif -# define machine_is_realview_pbx() (machine_arch_type == MACH_TYPE_REALVIEW_PBX) -#else -# define machine_is_realview_pbx() (0) -#endif - -#ifdef CONFIG_MACH_MICRO9S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICRO9S -# endif -# define machine_is_micro9s() (machine_arch_type == MACH_TYPE_MICRO9S) -#else -# define machine_is_micro9s() (0) -#endif - -#ifdef CONFIG_MACH_MAKO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAKO -# endif -# define machine_is_mako() (machine_arch_type == MACH_TYPE_MAKO) -#else -# define machine_is_mako() (0) -#endif - -#ifdef CONFIG_MACH_XDAFLAME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XDAFLAME -# endif -# define machine_is_xdaflame() (machine_arch_type == MACH_TYPE_XDAFLAME) -#else -# define machine_is_xdaflame() (0) -#endif - -#ifdef CONFIG_MACH_PHIDGET_SBC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHIDGET_SBC2 -# endif -# define machine_is_phidget_sbc2() (machine_arch_type == MACH_TYPE_PHIDGET_SBC2) -#else -# define machine_is_phidget_sbc2() (0) -#endif - -#ifdef CONFIG_MACH_LIMESTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LIMESTONE -# endif -# define machine_is_limestone() (machine_arch_type == MACH_TYPE_LIMESTONE) -#else -# define machine_is_limestone() (0) -#endif - -#ifdef CONFIG_MACH_IPROBE_C32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPROBE_C32 -# endif -# define machine_is_iprobe_c32() (machine_arch_type == MACH_TYPE_IPROBE_C32) -#else -# define machine_is_iprobe_c32() (0) -#endif - -#ifdef CONFIG_MACH_RUT100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RUT100 -# endif -# define machine_is_rut100() (machine_arch_type == MACH_TYPE_RUT100) -#else -# define machine_is_rut100() (0) -#endif - -#ifdef CONFIG_MACH_ASUSP535 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASUSP535 -# endif -# define machine_is_asusp535() (machine_arch_type == MACH_TYPE_ASUSP535) -#else -# define machine_is_asusp535() (0) -#endif - -#ifdef CONFIG_MACH_HTCRAPHAEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRAPHAEL -# endif -# define machine_is_htcraphael() (machine_arch_type == MACH_TYPE_HTCRAPHAEL) -#else -# define machine_is_htcraphael() (0) -#endif - -#ifdef CONFIG_MACH_SYGDG1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYGDG1 -# endif -# define machine_is_sygdg1() (machine_arch_type == MACH_TYPE_SYGDG1) -#else -# define machine_is_sygdg1() (0) -#endif - -#ifdef CONFIG_MACH_SYGDG2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYGDG2 -# endif -# define machine_is_sygdg2() (machine_arch_type == MACH_TYPE_SYGDG2) -#else -# define machine_is_sygdg2() (0) -#endif - -#ifdef CONFIG_MACH_SEOUL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SEOUL -# endif -# define machine_is_seoul() (machine_arch_type == MACH_TYPE_SEOUL) -#else -# define machine_is_seoul() (0) -#endif - -#ifdef CONFIG_MACH_SALERNO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SALERNO -# endif -# define machine_is_salerno() (machine_arch_type == MACH_TYPE_SALERNO) -#else -# define machine_is_salerno() (0) -#endif - -#ifdef CONFIG_MACH_UCN_S3C64XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UCN_S3C64XX -# endif -# define machine_is_ucn_s3c64xx() (machine_arch_type == MACH_TYPE_UCN_S3C64XX) -#else -# define machine_is_ucn_s3c64xx() (0) -#endif - -#ifdef CONFIG_MACH_MSM7201A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7201A -# endif -# define machine_is_msm7201a() (machine_arch_type == MACH_TYPE_MSM7201A) -#else -# define machine_is_msm7201a() (0) -#endif - -#ifdef CONFIG_MACH_LPR1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPR1 -# endif -# define machine_is_lpr1() (machine_arch_type == MACH_TYPE_LPR1) -#else -# define machine_is_lpr1() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO500FX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO500FX -# endif -# define machine_is_armadillo500fx() (machine_arch_type == MACH_TYPE_ARMADILLO500FX) -#else -# define machine_is_armadillo500fx() (0) -#endif - -#ifdef CONFIG_MACH_G3EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G3EVM -# endif -# define machine_is_g3evm() (machine_arch_type == MACH_TYPE_G3EVM) -#else -# define machine_is_g3evm() (0) -#endif - -#ifdef CONFIG_MACH_Z3_DM355 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Z3_DM355 -# endif -# define machine_is_z3_dm355() (machine_arch_type == MACH_TYPE_Z3_DM355) -#else -# define machine_is_z3_dm355() (0) -#endif - -#ifdef CONFIG_MACH_W90P910EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90P910EVB -# endif -# define machine_is_w90p910evb() (machine_arch_type == MACH_TYPE_W90P910EVB) -#else -# define machine_is_w90p910evb() (0) -#endif - -#ifdef CONFIG_MACH_W90P920EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90P920EVB -# endif -# define machine_is_w90p920evb() (machine_arch_type == MACH_TYPE_W90P920EVB) -#else -# define machine_is_w90p920evb() (0) -#endif - -#ifdef CONFIG_MACH_W90P950EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90P950EVB -# endif -# define machine_is_w90p950evb() (machine_arch_type == MACH_TYPE_W90P950EVB) -#else -# define machine_is_w90p950evb() (0) -#endif - -#ifdef CONFIG_MACH_W90N960EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W90N960EVB -# endif -# define machine_is_w90n960evb() (machine_arch_type == MACH_TYPE_W90N960EVB) -#else -# define machine_is_w90n960evb() (0) -#endif - -#ifdef CONFIG_MACH_CAMHD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAMHD -# endif -# define machine_is_camhd() (machine_arch_type == MACH_TYPE_CAMHD) -#else -# define machine_is_camhd() (0) -#endif - -#ifdef CONFIG_MACH_MVC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MVC100 -# endif -# define machine_is_mvc100() (machine_arch_type == MACH_TYPE_MVC100) -#else -# define machine_is_mvc100() (0) -#endif - -#ifdef CONFIG_MACH_ELECTRUM_200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELECTRUM_200 -# endif -# define machine_is_electrum_200() (machine_arch_type == MACH_TYPE_ELECTRUM_200) -#else -# define machine_is_electrum_200() (0) -#endif - -#ifdef CONFIG_MACH_HTCJADE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCJADE -# endif -# define machine_is_htcjade() (machine_arch_type == MACH_TYPE_HTCJADE) -#else -# define machine_is_htcjade() (0) -#endif - -#ifdef CONFIG_MACH_MEMPHIS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEMPHIS -# endif -# define machine_is_memphis() (machine_arch_type == MACH_TYPE_MEMPHIS) -#else -# define machine_is_memphis() (0) -#endif - -#ifdef CONFIG_MACH_IMX27SBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27SBC -# endif -# define machine_is_imx27sbc() (machine_arch_type == MACH_TYPE_IMX27SBC) -#else -# define machine_is_imx27sbc() (0) -#endif - -#ifdef CONFIG_MACH_LEXTAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEXTAR -# endif -# define machine_is_lextar() (machine_arch_type == MACH_TYPE_LEXTAR) -#else -# define machine_is_lextar() (0) -#endif - -#ifdef CONFIG_MACH_MV88F6281GTW_GE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV88F6281GTW_GE -# endif -# define machine_is_mv88f6281gtw_ge() (machine_arch_type == MACH_TYPE_MV88F6281GTW_GE) -#else -# define machine_is_mv88f6281gtw_ge() (0) -#endif - -#ifdef CONFIG_MACH_NCP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NCP -# endif -# define machine_is_ncp() (machine_arch_type == MACH_TYPE_NCP) -#else -# define machine_is_ncp() (0) -#endif - -#ifdef CONFIG_MACH_Z32AN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Z32AN -# endif -# define machine_is_z32an_series() (machine_arch_type == MACH_TYPE_Z32AN) -#else -# define machine_is_z32an_series() (0) -#endif - -#ifdef CONFIG_MACH_TMQ_CAPD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TMQ_CAPD -# endif -# define machine_is_tmq_capd() (machine_arch_type == MACH_TYPE_TMQ_CAPD) -#else -# define machine_is_tmq_capd() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_WL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_WL -# endif -# define machine_is_omap3_wl() (machine_arch_type == MACH_TYPE_OMAP3_WL) -#else -# define machine_is_omap3_wl() (0) -#endif - -#ifdef CONFIG_MACH_CHUMBY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHUMBY -# endif -# define machine_is_chumby() (machine_arch_type == MACH_TYPE_CHUMBY) -#else -# define machine_is_chumby() (0) -#endif - -#ifdef CONFIG_MACH_ATSARM9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATSARM9 -# endif -# define machine_is_atsarm9() (machine_arch_type == MACH_TYPE_ATSARM9) -#else -# define machine_is_atsarm9() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM365_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM365_EVM -# endif -# define machine_is_davinci_dm365_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_EVM) -#else -# define machine_is_davinci_dm365_evm() (0) -#endif - -#ifdef CONFIG_MACH_BAHAMAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BAHAMAS -# endif -# define machine_is_bahamas() (machine_arch_type == MACH_TYPE_BAHAMAS) -#else -# define machine_is_bahamas() (0) -#endif - -#ifdef CONFIG_MACH_DAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAS -# endif -# define machine_is_das() (machine_arch_type == MACH_TYPE_DAS) -#else -# define machine_is_das() (0) -#endif - -#ifdef CONFIG_MACH_MINIDAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINIDAS -# endif -# define machine_is_minidas() (machine_arch_type == MACH_TYPE_MINIDAS) -#else -# define machine_is_minidas() (0) -#endif - -#ifdef CONFIG_MACH_VK1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VK1000 -# endif -# define machine_is_vk1000() (machine_arch_type == MACH_TYPE_VK1000) -#else -# define machine_is_vk1000() (0) -#endif - -#ifdef CONFIG_MACH_CENTRO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CENTRO -# endif -# define machine_is_centro() (machine_arch_type == MACH_TYPE_CENTRO) -#else -# define machine_is_centro() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_2BAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_2BAY -# endif -# define machine_is_ctera_2bay() (machine_arch_type == MACH_TYPE_CTERA_2BAY) -#else -# define machine_is_ctera_2bay() (0) -#endif - -#ifdef CONFIG_MACH_EDGECONNECT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDGECONNECT -# endif -# define machine_is_edgeconnect() (machine_arch_type == MACH_TYPE_EDGECONNECT) -#else -# define machine_is_edgeconnect() (0) -#endif - -#ifdef CONFIG_MACH_ND27000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ND27000 -# endif -# define machine_is_nd27000() (machine_arch_type == MACH_TYPE_ND27000) -#else -# define machine_is_nd27000() (0) -#endif - -#ifdef CONFIG_MACH_GEMALTO_COBRA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEMALTO_COBRA -# endif -# define machine_is_cobra() (machine_arch_type == MACH_TYPE_GEMALTO_COBRA) -#else -# define machine_is_cobra() (0) -#endif - -#ifdef CONFIG_MACH_INGELABS_COMET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INGELABS_COMET -# endif -# define machine_is_ingelabs_comet() (machine_arch_type == MACH_TYPE_INGELABS_COMET) -#else -# define machine_is_ingelabs_comet() (0) -#endif - -#ifdef CONFIG_MACH_POLLUX_WIZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POLLUX_WIZ -# endif -# define machine_is_pollux_wiz() (machine_arch_type == MACH_TYPE_POLLUX_WIZ) -#else -# define machine_is_pollux_wiz() (0) -#endif - -#ifdef CONFIG_MACH_BLACKSTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLACKSTONE -# endif -# define machine_is_blackstone() (machine_arch_type == MACH_TYPE_BLACKSTONE) -#else -# define machine_is_blackstone() (0) -#endif - -#ifdef CONFIG_MACH_TOPAZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOPAZ -# endif -# define machine_is_topaz() (machine_arch_type == MACH_TYPE_TOPAZ) -#else -# define machine_is_topaz() (0) -#endif - -#ifdef CONFIG_MACH_AIXLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AIXLE -# endif -# define machine_is_aixle() (machine_arch_type == MACH_TYPE_AIXLE) -#else -# define machine_is_aixle() (0) -#endif - -#ifdef CONFIG_MACH_MW998 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MW998 -# endif -# define machine_is_mw998() (machine_arch_type == MACH_TYPE_MW998) -#else -# define machine_is_mw998() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA_RX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA_RX51 -# endif -# define machine_is_nokia_rx51() (machine_arch_type == MACH_TYPE_NOKIA_RX51) -#else -# define machine_is_nokia_rx51() (0) -#endif - -#ifdef CONFIG_MACH_VSC5605EV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VSC5605EV -# endif -# define machine_is_vsc5605ev() (machine_arch_type == MACH_TYPE_VSC5605EV) -#else -# define machine_is_vsc5605ev() (0) -#endif - -#ifdef CONFIG_MACH_NT98700DK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NT98700DK -# endif -# define machine_is_nt98700dk() (machine_arch_type == MACH_TYPE_NT98700DK) -#else -# define machine_is_nt98700dk() (0) -#endif - -#ifdef CONFIG_MACH_ICONTACT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICONTACT -# endif -# define machine_is_icontact() (machine_arch_type == MACH_TYPE_ICONTACT) -#else -# define machine_is_icontact() (0) -#endif - -#ifdef CONFIG_MACH_SWARCO_FRCPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWARCO_FRCPU -# endif -# define machine_is_swarco_frcpu() (machine_arch_type == MACH_TYPE_SWARCO_FRCPU) -#else -# define machine_is_swarco_frcpu() (0) -#endif - -#ifdef CONFIG_MACH_SWARCO_SCPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWARCO_SCPU -# endif -# define machine_is_swarco_scpu() (machine_arch_type == MACH_TYPE_SWARCO_SCPU) -#else -# define machine_is_swarco_scpu() (0) -#endif - -#ifdef CONFIG_MACH_BBOX_P16 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BBOX_P16 -# endif -# define machine_is_bbox_p16() (machine_arch_type == MACH_TYPE_BBOX_P16) -#else -# define machine_is_bbox_p16() (0) -#endif - -#ifdef CONFIG_MACH_BSTD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BSTD -# endif -# define machine_is_bstd() (machine_arch_type == MACH_TYPE_BSTD) -#else -# define machine_is_bstd() (0) -#endif - -#ifdef CONFIG_MACH_SBC2440II -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC2440II -# endif -# define machine_is_sbc2440ii() (machine_arch_type == MACH_TYPE_SBC2440II) -#else -# define machine_is_sbc2440ii() (0) -#endif - -#ifdef CONFIG_MACH_PCM034 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM034 -# endif -# define machine_is_pcm034() (machine_arch_type == MACH_TYPE_PCM034) -#else -# define machine_is_pcm034() (0) -#endif - -#ifdef CONFIG_MACH_NESO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NESO -# endif -# define machine_is_neso() (machine_arch_type == MACH_TYPE_NESO) -#else -# define machine_is_neso() (0) -#endif - -#ifdef CONFIG_MACH_WLNX_9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WLNX_9G20 -# endif -# define machine_is_wlnx_9g20() (machine_arch_type == MACH_TYPE_WLNX_9G20) -#else -# define machine_is_wlnx_9g20() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_ZOOM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_ZOOM2 -# endif -# define machine_is_omap_zoom2() (machine_arch_type == MACH_TYPE_OMAP_ZOOM2) -#else -# define machine_is_omap_zoom2() (0) -#endif - -#ifdef CONFIG_MACH_TOTEMNOVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOTEMNOVA -# endif -# define machine_is_totemnova() (machine_arch_type == MACH_TYPE_TOTEMNOVA) -#else -# define machine_is_totemnova() (0) -#endif - -#ifdef CONFIG_MACH_C5000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C5000 -# endif -# define machine_is_c5000() (machine_arch_type == MACH_TYPE_C5000) -#else -# define machine_is_c5000() (0) -#endif - -#ifdef CONFIG_MACH_UNIPO_AT91SAM9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNIPO_AT91SAM9263 -# endif -# define machine_is_unipo_at91sam9263() (machine_arch_type == MACH_TYPE_UNIPO_AT91SAM9263) -#else -# define machine_is_unipo_at91sam9263() (0) -#endif - -#ifdef CONFIG_MACH_ETHERNUT5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETHERNUT5 -# endif -# define machine_is_ethernut5() (machine_arch_type == MACH_TYPE_ETHERNUT5) -#else -# define machine_is_ethernut5() (0) -#endif - -#ifdef CONFIG_MACH_ARM11 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM11 -# endif -# define machine_is_arm11() (machine_arch_type == MACH_TYPE_ARM11) -#else -# define machine_is_arm11() (0) -#endif - -#ifdef CONFIG_MACH_CPUAT9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUAT9260 -# endif -# define machine_is_cpuat9260() (machine_arch_type == MACH_TYPE_CPUAT9260) -#else -# define machine_is_cpuat9260() (0) -#endif - -#ifdef CONFIG_MACH_CPUPXA255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUPXA255 -# endif -# define machine_is_cpupxa255() (machine_arch_type == MACH_TYPE_CPUPXA255) -#else -# define machine_is_cpupxa255() (0) -#endif - -#ifdef CONFIG_MACH_CPUIMX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUIMX27 -# endif -# define machine_is_eukrea_cpuimx27() (machine_arch_type == MACH_TYPE_CPUIMX27) -#else -# define machine_is_eukrea_cpuimx27() (0) -#endif - -#ifdef CONFIG_MACH_CHEFLUX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHEFLUX -# endif -# define machine_is_cheflux() (machine_arch_type == MACH_TYPE_CHEFLUX) -#else -# define machine_is_cheflux() (0) -#endif - -#ifdef CONFIG_MACH_EB_CPUX9K2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EB_CPUX9K2 -# endif -# define machine_is_eb_cpux9k2() (machine_arch_type == MACH_TYPE_EB_CPUX9K2) -#else -# define machine_is_eb_cpux9k2() (0) -#endif - -#ifdef CONFIG_MACH_OPCOTEC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPCOTEC -# endif -# define machine_is_opcotec() (machine_arch_type == MACH_TYPE_OPCOTEC) -#else -# define machine_is_opcotec() (0) -#endif - -#ifdef CONFIG_MACH_YT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YT -# endif -# define machine_is_yt() (machine_arch_type == MACH_TYPE_YT) -#else -# define machine_is_yt() (0) -#endif - -#ifdef CONFIG_MACH_MOTOQ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOQ -# endif -# define machine_is_motoq() (machine_arch_type == MACH_TYPE_MOTOQ) -#else -# define machine_is_motoq() (0) -#endif - -#ifdef CONFIG_MACH_BSB1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BSB1 -# endif -# define machine_is_bsb1() (machine_arch_type == MACH_TYPE_BSB1) -#else -# define machine_is_bsb1() (0) -#endif - -#ifdef CONFIG_MACH_ACS5K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACS5K -# endif -# define machine_is_acs5k() (machine_arch_type == MACH_TYPE_ACS5K) -#else -# define machine_is_acs5k() (0) -#endif - -#ifdef CONFIG_MACH_MILAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MILAN -# endif -# define machine_is_milan() (machine_arch_type == MACH_TYPE_MILAN) -#else -# define machine_is_milan() (0) -#endif - -#ifdef CONFIG_MACH_QUARTZV2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUARTZV2 -# endif -# define machine_is_quartzv2() (machine_arch_type == MACH_TYPE_QUARTZV2) -#else -# define machine_is_quartzv2() (0) -#endif - -#ifdef CONFIG_MACH_RSVP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RSVP -# endif -# define machine_is_rsvp() (machine_arch_type == MACH_TYPE_RSVP) -#else -# define machine_is_rsvp() (0) -#endif - -#ifdef CONFIG_MACH_RMP200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RMP200 -# endif -# define machine_is_rmp200() (machine_arch_type == MACH_TYPE_RMP200) -#else -# define machine_is_rmp200() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPER_9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPER_9260 -# endif -# define machine_is_snapper_9260() (machine_arch_type == MACH_TYPE_SNAPPER_9260) -#else -# define machine_is_snapper_9260() (0) -#endif - -#ifdef CONFIG_MACH_DSM320 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DSM320 -# endif -# define machine_is_dsm320() (machine_arch_type == MACH_TYPE_DSM320) -#else -# define machine_is_dsm320() (0) -#endif - -#ifdef CONFIG_MACH_ADSGCM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSGCM -# endif -# define machine_is_adsgcm() (machine_arch_type == MACH_TYPE_ADSGCM) -#else -# define machine_is_adsgcm() (0) -#endif - -#ifdef CONFIG_MACH_ASE2_400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASE2_400 -# endif -# define machine_is_ase2_400() (machine_arch_type == MACH_TYPE_ASE2_400) -#else -# define machine_is_ase2_400() (0) -#endif - -#ifdef CONFIG_MACH_PIZZA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PIZZA -# endif -# define machine_is_pizza() (machine_arch_type == MACH_TYPE_PIZZA) -#else -# define machine_is_pizza() (0) -#endif - -#ifdef CONFIG_MACH_SPOT_NGPL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPOT_NGPL -# endif -# define machine_is_spot_ngpl() (machine_arch_type == MACH_TYPE_SPOT_NGPL) -#else -# define machine_is_spot_ngpl() (0) -#endif - -#ifdef CONFIG_MACH_ARMATA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMATA -# endif -# define machine_is_armata() (machine_arch_type == MACH_TYPE_ARMATA) -#else -# define machine_is_armata() (0) -#endif - -#ifdef CONFIG_MACH_EXEDA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXEDA -# endif -# define machine_is_exeda() (machine_arch_type == MACH_TYPE_EXEDA) -#else -# define machine_is_exeda() (0) -#endif - -#ifdef CONFIG_MACH_MX31SF005 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31SF005 -# endif -# define machine_is_mx31sf005() (machine_arch_type == MACH_TYPE_MX31SF005) -#else -# define machine_is_mx31sf005() (0) -#endif - -#ifdef CONFIG_MACH_F5D8231_4_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_F5D8231_4_V2 -# endif -# define machine_is_f5d8231_4_v2() (machine_arch_type == MACH_TYPE_F5D8231_4_V2) -#else -# define machine_is_f5d8231_4_v2() (0) -#endif - -#ifdef CONFIG_MACH_Q2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Q2440 -# endif -# define machine_is_q2440() (machine_arch_type == MACH_TYPE_Q2440) -#else -# define machine_is_q2440() (0) -#endif - -#ifdef CONFIG_MACH_QQ2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QQ2440 -# endif -# define machine_is_qq2440() (machine_arch_type == MACH_TYPE_QQ2440) -#else -# define machine_is_qq2440() (0) -#endif - -#ifdef CONFIG_MACH_MINI2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINI2440 -# endif -# define machine_is_mini2440() (machine_arch_type == MACH_TYPE_MINI2440) -#else -# define machine_is_mini2440() (0) -#endif - -#ifdef CONFIG_MACH_COLIBRI300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COLIBRI300 -# endif -# define machine_is_colibri300() (machine_arch_type == MACH_TYPE_COLIBRI300) -#else -# define machine_is_colibri300() (0) -#endif - -#ifdef CONFIG_MACH_JADES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JADES -# endif -# define machine_is_jades() (machine_arch_type == MACH_TYPE_JADES) -#else -# define machine_is_jades() (0) -#endif - -#ifdef CONFIG_MACH_SPARK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPARK -# endif -# define machine_is_spark() (machine_arch_type == MACH_TYPE_SPARK) -#else -# define machine_is_spark() (0) -#endif - -#ifdef CONFIG_MACH_BENZINA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BENZINA -# endif -# define machine_is_benzina() (machine_arch_type == MACH_TYPE_BENZINA) -#else -# define machine_is_benzina() (0) -#endif - -#ifdef CONFIG_MACH_BLAZE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLAZE -# endif -# define machine_is_blaze() (machine_arch_type == MACH_TYPE_BLAZE) -#else -# define machine_is_blaze() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_LS_HGL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_LS_HGL -# endif -# define machine_is_linkstation_ls_hgl() (machine_arch_type == MACH_TYPE_LINKSTATION_LS_HGL) -#else -# define machine_is_linkstation_ls_hgl() (0) -#endif - -#ifdef CONFIG_MACH_HTCKOVSKY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCKOVSKY -# endif -# define machine_is_htckovsky() (machine_arch_type == MACH_TYPE_HTCKOVSKY) -#else -# define machine_is_htckovsky() (0) -#endif - -#ifdef CONFIG_MACH_SONY_PRS505 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SONY_PRS505 -# endif -# define machine_is_sony_prs505() (machine_arch_type == MACH_TYPE_SONY_PRS505) -#else -# define machine_is_sony_prs505() (0) -#endif - -#ifdef CONFIG_MACH_HANLIN_V3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HANLIN_V3 -# endif -# define machine_is_hanlin_v3() (machine_arch_type == MACH_TYPE_HANLIN_V3) -#else -# define machine_is_hanlin_v3() (0) -#endif - -#ifdef CONFIG_MACH_SAPPHIRA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAPPHIRA -# endif -# define machine_is_sapphira() (machine_arch_type == MACH_TYPE_SAPPHIRA) -#else -# define machine_is_sapphira() (0) -#endif - -#ifdef CONFIG_MACH_DACK_SDA_01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DACK_SDA_01 -# endif -# define machine_is_dack_sda_01() (machine_arch_type == MACH_TYPE_DACK_SDA_01) -#else -# define machine_is_dack_sda_01() (0) -#endif - -#ifdef CONFIG_MACH_ARMBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMBOX -# endif -# define machine_is_armbox() (machine_arch_type == MACH_TYPE_ARMBOX) -#else -# define machine_is_armbox() (0) -#endif - -#ifdef CONFIG_MACH_HARRIS_RVP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HARRIS_RVP -# endif -# define machine_is_harris_rvp() (machine_arch_type == MACH_TYPE_HARRIS_RVP) -#else -# define machine_is_harris_rvp() (0) -#endif - -#ifdef CONFIG_MACH_RIBALDO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIBALDO -# endif -# define machine_is_ribaldo() (machine_arch_type == MACH_TYPE_RIBALDO) -#else -# define machine_is_ribaldo() (0) -#endif - -#ifdef CONFIG_MACH_AGORA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AGORA -# endif -# define machine_is_agora() (machine_arch_type == MACH_TYPE_AGORA) -#else -# define machine_is_agora() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_MINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_MINI -# endif -# define machine_is_omap3_mini() (machine_arch_type == MACH_TYPE_OMAP3_MINI) -#else -# define machine_is_omap3_mini() (0) -#endif - -#ifdef CONFIG_MACH_A9SAM6432_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A9SAM6432_B -# endif -# define machine_is_a9sam6432_b() (machine_arch_type == MACH_TYPE_A9SAM6432_B) -#else -# define machine_is_a9sam6432_b() (0) -#endif - -#ifdef CONFIG_MACH_USG2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USG2410 -# endif -# define machine_is_usg2410() (machine_arch_type == MACH_TYPE_USG2410) -#else -# define machine_is_usg2410() (0) -#endif - -#ifdef CONFIG_MACH_PC72052_I10_REVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC72052_I10_REVB -# endif -# define machine_is_pc72052_i10_revb() (machine_arch_type == MACH_TYPE_PC72052_I10_REVB) -#else -# define machine_is_pc72052_i10_revb() (0) -#endif - -#ifdef CONFIG_MACH_MX35_EXM32 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX35_EXM32 -# endif -# define machine_is_mx35_exm32() (machine_arch_type == MACH_TYPE_MX35_EXM32) -#else -# define machine_is_mx35_exm32() (0) -#endif - -#ifdef CONFIG_MACH_TOPAS910 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOPAS910 -# endif -# define machine_is_topas910() (machine_arch_type == MACH_TYPE_TOPAS910) -#else -# define machine_is_topas910() (0) -#endif - -#ifdef CONFIG_MACH_HYENA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HYENA -# endif -# define machine_is_hyena() (machine_arch_type == MACH_TYPE_HYENA) -#else -# define machine_is_hyena() (0) -#endif - -#ifdef CONFIG_MACH_POSPAX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POSPAX -# endif -# define machine_is_pospax() (machine_arch_type == MACH_TYPE_POSPAX) -#else -# define machine_is_pospax() (0) -#endif - -#ifdef CONFIG_MACH_HDL_GX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDL_GX -# endif -# define machine_is_hdl_gx() (machine_arch_type == MACH_TYPE_HDL_GX) -#else -# define machine_is_hdl_gx() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_4BAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_4BAY -# endif -# define machine_is_ctera_4bay() (machine_arch_type == MACH_TYPE_CTERA_4BAY) -#else -# define machine_is_ctera_4bay() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_PLUG_C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_PLUG_C -# endif -# define machine_is_ctera_plug_c() (machine_arch_type == MACH_TYPE_CTERA_PLUG_C) -#else -# define machine_is_ctera_plug_c() (0) -#endif - -#ifdef CONFIG_MACH_CRWEA_PLUG_I -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CRWEA_PLUG_I -# endif -# define machine_is_crwea_plug_i() (machine_arch_type == MACH_TYPE_CRWEA_PLUG_I) -#else -# define machine_is_crwea_plug_i() (0) -#endif - -#ifdef CONFIG_MACH_EGAUGE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EGAUGE2 -# endif -# define machine_is_egauge2() (machine_arch_type == MACH_TYPE_EGAUGE2) -#else -# define machine_is_egauge2() (0) -#endif - -#ifdef CONFIG_MACH_DIDJ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DIDJ -# endif -# define machine_is_didj() (machine_arch_type == MACH_TYPE_DIDJ) -#else -# define machine_is_didj() (0) -#endif - -#ifdef CONFIG_MACH_MEISTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEISTER -# endif -# define machine_is_m_s3c2443() (machine_arch_type == MACH_TYPE_MEISTER) -#else -# define machine_is_m_s3c2443() (0) -#endif - -#ifdef CONFIG_MACH_HTCBLACKSTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCBLACKSTONE -# endif -# define machine_is_htcblackstone() (machine_arch_type == MACH_TYPE_HTCBLACKSTONE) -#else -# define machine_is_htcblackstone() (0) -#endif - -#ifdef CONFIG_MACH_CPUAT9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPUAT9G20 -# endif -# define machine_is_cpuat9g20() (machine_arch_type == MACH_TYPE_CPUAT9G20) -#else -# define machine_is_cpuat9g20() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6440 -# endif -# define machine_is_smdk6440() (machine_arch_type == MACH_TYPE_SMDK6440) -#else -# define machine_is_smdk6440() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_35XX_MVP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_35XX_MVP -# endif -# define machine_is_omap_35xx_mvp() (machine_arch_type == MACH_TYPE_OMAP_35XX_MVP) -#else -# define machine_is_omap_35xx_mvp() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_PLUG_I -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_PLUG_I -# endif -# define machine_is_ctera_plug_i() (machine_arch_type == MACH_TYPE_CTERA_PLUG_I) -#else -# define machine_is_ctera_plug_i() (0) -#endif - -#ifdef CONFIG_MACH_PVG610 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PVG610 -# endif -# define machine_is_pvg610_100() (machine_arch_type == MACH_TYPE_PVG610) -#else -# define machine_is_pvg610_100() (0) -#endif - -#ifdef CONFIG_MACH_HPRW6815 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HPRW6815 -# endif -# define machine_is_hprw6815() (machine_arch_type == MACH_TYPE_HPRW6815) -#else -# define machine_is_hprw6815() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_OSWALD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_OSWALD -# endif -# define machine_is_omap3_oswald() (machine_arch_type == MACH_TYPE_OMAP3_OSWALD) -#else -# define machine_is_omap3_oswald() (0) -#endif - -#ifdef CONFIG_MACH_NAS4220B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAS4220B -# endif -# define machine_is_nas4220b() (machine_arch_type == MACH_TYPE_NAS4220B) -#else -# define machine_is_nas4220b() (0) -#endif - -#ifdef CONFIG_MACH_HTCRAPHAEL_CDMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRAPHAEL_CDMA -# endif -# define machine_is_htcraphael_cdma() (machine_arch_type == MACH_TYPE_HTCRAPHAEL_CDMA) -#else -# define machine_is_htcraphael_cdma() (0) -#endif - -#ifdef CONFIG_MACH_HTCDIAMOND_CDMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCDIAMOND_CDMA -# endif -# define machine_is_htcdiamond_cdma() (machine_arch_type == MACH_TYPE_HTCDIAMOND_CDMA) -#else -# define machine_is_htcdiamond_cdma() (0) -#endif - -#ifdef CONFIG_MACH_SCALER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCALER -# endif -# define machine_is_scaler() (machine_arch_type == MACH_TYPE_SCALER) -#else -# define machine_is_scaler() (0) -#endif - -#ifdef CONFIG_MACH_ZYLONITE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZYLONITE2 -# endif -# define machine_is_zylonite2() (machine_arch_type == MACH_TYPE_ZYLONITE2) -#else -# define machine_is_zylonite2() (0) -#endif - -#ifdef CONFIG_MACH_ASPENITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASPENITE -# endif -# define machine_is_aspenite() (machine_arch_type == MACH_TYPE_ASPENITE) -#else -# define machine_is_aspenite() (0) -#endif - -#ifdef CONFIG_MACH_TETON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TETON -# endif -# define machine_is_teton() (machine_arch_type == MACH_TYPE_TETON) -#else -# define machine_is_teton() (0) -#endif - -#ifdef CONFIG_MACH_TTC_DKB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TTC_DKB -# endif -# define machine_is_ttc_dkb() (machine_arch_type == MACH_TYPE_TTC_DKB) -#else -# define machine_is_ttc_dkb() (0) -#endif - -#ifdef CONFIG_MACH_BISHOP2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BISHOP2 -# endif -# define machine_is_bishop2() (machine_arch_type == MACH_TYPE_BISHOP2) -#else -# define machine_is_bishop2() (0) -#endif - -#ifdef CONFIG_MACH_IPPV5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IPPV5 -# endif -# define machine_is_ippv5() (machine_arch_type == MACH_TYPE_IPPV5) -#else -# define machine_is_ippv5() (0) -#endif - -#ifdef CONFIG_MACH_FARM926 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FARM926 -# endif -# define machine_is_farm926() (machine_arch_type == MACH_TYPE_FARM926) -#else -# define machine_is_farm926() (0) -#endif - -#ifdef CONFIG_MACH_MMCCPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMCCPU -# endif -# define machine_is_mmccpu() (machine_arch_type == MACH_TYPE_MMCCPU) -#else -# define machine_is_mmccpu() (0) -#endif - -#ifdef CONFIG_MACH_SGMSFL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SGMSFL -# endif -# define machine_is_sgmsfl() (machine_arch_type == MACH_TYPE_SGMSFL) -#else -# define machine_is_sgmsfl() (0) -#endif - -#ifdef CONFIG_MACH_TT8000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TT8000 -# endif -# define machine_is_tt8000() (machine_arch_type == MACH_TYPE_TT8000) -#else -# define machine_is_tt8000() (0) -#endif - -#ifdef CONFIG_MACH_ZRN4300LP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZRN4300LP -# endif -# define machine_is_zrn4300lp() (machine_arch_type == MACH_TYPE_ZRN4300LP) -#else -# define machine_is_zrn4300lp() (0) -#endif - -#ifdef CONFIG_MACH_MPTC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPTC -# endif -# define machine_is_mptc() (machine_arch_type == MACH_TYPE_MPTC) -#else -# define machine_is_mptc() (0) -#endif - -#ifdef CONFIG_MACH_H6051 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6051 -# endif -# define machine_is_h6051() (machine_arch_type == MACH_TYPE_H6051) -#else -# define machine_is_h6051() (0) -#endif - -#ifdef CONFIG_MACH_PVG610_101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PVG610_101 -# endif -# define machine_is_pvg610_101() (machine_arch_type == MACH_TYPE_PVG610_101) -#else -# define machine_is_pvg610_101() (0) -#endif - -#ifdef CONFIG_MACH_STAMP9261_PC_EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAMP9261_PC_EVB -# endif -# define machine_is_stamp9261_pc_evb() (machine_arch_type == MACH_TYPE_STAMP9261_PC_EVB) -#else -# define machine_is_stamp9261_pc_evb() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_ODYSSEUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_ODYSSEUS -# endif -# define machine_is_pelco_odysseus() (machine_arch_type == MACH_TYPE_PELCO_ODYSSEUS) -#else -# define machine_is_pelco_odysseus() (0) -#endif - -#ifdef CONFIG_MACH_TNY_A9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNY_A9260 -# endif -# define machine_is_tny_a9260() (machine_arch_type == MACH_TYPE_TNY_A9260) -#else -# define machine_is_tny_a9260() (0) -#endif - -#ifdef CONFIG_MACH_TNY_A9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNY_A9G20 -# endif -# define machine_is_tny_a9g20() (machine_arch_type == MACH_TYPE_TNY_A9G20) -#else -# define machine_is_tny_a9g20() (0) -#endif - -#ifdef CONFIG_MACH_AESOP_MP2530F -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AESOP_MP2530F -# endif -# define machine_is_aesop_mp2530f() (machine_arch_type == MACH_TYPE_AESOP_MP2530F) -#else -# define machine_is_aesop_mp2530f() (0) -#endif - -#ifdef CONFIG_MACH_DX900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DX900 -# endif -# define machine_is_dx900() (machine_arch_type == MACH_TYPE_DX900) -#else -# define machine_is_dx900() (0) -#endif - -#ifdef CONFIG_MACH_CPODC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPODC2 -# endif -# define machine_is_cpodc2() (machine_arch_type == MACH_TYPE_CPODC2) -#else -# define machine_is_cpodc2() (0) -#endif - -#ifdef CONFIG_MACH_TILT_8925 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TILT_8925 -# endif -# define machine_is_tilt_8925() (machine_arch_type == MACH_TYPE_TILT_8925) -#else -# define machine_is_tilt_8925() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM357_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM357_EVM -# endif -# define machine_is_davinci_dm357_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM357_EVM) -#else -# define machine_is_davinci_dm357_evm() (0) -#endif - -#ifdef CONFIG_MACH_SWORDFISH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWORDFISH -# endif -# define machine_is_swordfish() (machine_arch_type == MACH_TYPE_SWORDFISH) -#else -# define machine_is_swordfish() (0) -#endif - -#ifdef CONFIG_MACH_CORVUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORVUS -# endif -# define machine_is_corvus() (machine_arch_type == MACH_TYPE_CORVUS) -#else -# define machine_is_corvus() (0) -#endif - -#ifdef CONFIG_MACH_TAURUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAURUS -# endif -# define machine_is_taurus() (machine_arch_type == MACH_TYPE_TAURUS) -#else -# define machine_is_taurus() (0) -#endif - -#ifdef CONFIG_MACH_AXM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXM -# endif -# define machine_is_axm() (machine_arch_type == MACH_TYPE_AXM) -#else -# define machine_is_axm() (0) -#endif - -#ifdef CONFIG_MACH_AXC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXC -# endif -# define machine_is_axc() (machine_arch_type == MACH_TYPE_AXC) -#else -# define machine_is_axc() (0) -#endif - -#ifdef CONFIG_MACH_BABY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BABY -# endif -# define machine_is_baby() (machine_arch_type == MACH_TYPE_BABY) -#else -# define machine_is_baby() (0) -#endif - -#ifdef CONFIG_MACH_MP200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MP200 -# endif -# define machine_is_mp200() (machine_arch_type == MACH_TYPE_MP200) -#else -# define machine_is_mp200() (0) -#endif - -#ifdef CONFIG_MACH_PCM043 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM043 -# endif -# define machine_is_pcm043() (machine_arch_type == MACH_TYPE_PCM043) -#else -# define machine_is_pcm043() (0) -#endif - -#ifdef CONFIG_MACH_HANLIN_V3C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HANLIN_V3C -# endif -# define machine_is_hanlin_v3c() (machine_arch_type == MACH_TYPE_HANLIN_V3C) -#else -# define machine_is_hanlin_v3c() (0) -#endif - -#ifdef CONFIG_MACH_KBK9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KBK9G20 -# endif -# define machine_is_kbk9g20() (machine_arch_type == MACH_TYPE_KBK9G20) -#else -# define machine_is_kbk9g20() (0) -#endif - -#ifdef CONFIG_MACH_ADSTURBOG5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADSTURBOG5 -# endif -# define machine_is_adsturbog5() (machine_arch_type == MACH_TYPE_ADSTURBOG5) -#else -# define machine_is_adsturbog5() (0) -#endif - -#ifdef CONFIG_MACH_AVENGER_LITE1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVENGER_LITE1 -# endif -# define machine_is_avenger_lite1() (machine_arch_type == MACH_TYPE_AVENGER_LITE1) -#else -# define machine_is_avenger_lite1() (0) -#endif - -#ifdef CONFIG_MACH_SUC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUC -# endif -# define machine_is_suc82x() (machine_arch_type == MACH_TYPE_SUC) -#else -# define machine_is_suc82x() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM7S256 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM7S256 -# endif -# define machine_is_at91sam7s256() (machine_arch_type == MACH_TYPE_AT91SAM7S256) -#else -# define machine_is_at91sam7s256() (0) -#endif - -#ifdef CONFIG_MACH_MENDOZA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MENDOZA -# endif -# define machine_is_mendoza() (machine_arch_type == MACH_TYPE_MENDOZA) -#else -# define machine_is_mendoza() (0) -#endif - -#ifdef CONFIG_MACH_KIRA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KIRA -# endif -# define machine_is_kira() (machine_arch_type == MACH_TYPE_KIRA) -#else -# define machine_is_kira() (0) -#endif - -#ifdef CONFIG_MACH_MX1HBM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX1HBM -# endif -# define machine_is_mx1hbm() (machine_arch_type == MACH_TYPE_MX1HBM) -#else -# define machine_is_mx1hbm() (0) -#endif - -#ifdef CONFIG_MACH_QUATRO43XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUATRO43XX -# endif -# define machine_is_quatro43xx() (machine_arch_type == MACH_TYPE_QUATRO43XX) -#else -# define machine_is_quatro43xx() (0) -#endif - -#ifdef CONFIG_MACH_QUATRO4230 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUATRO4230 -# endif -# define machine_is_quatro4230() (machine_arch_type == MACH_TYPE_QUATRO4230) -#else -# define machine_is_quatro4230() (0) -#endif - -#ifdef CONFIG_MACH_NSB400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSB400 -# endif -# define machine_is_nsb400() (machine_arch_type == MACH_TYPE_NSB400) -#else -# define machine_is_nsb400() (0) -#endif - -#ifdef CONFIG_MACH_DRP255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DRP255 -# endif -# define machine_is_drp255() (machine_arch_type == MACH_TYPE_DRP255) -#else -# define machine_is_drp255() (0) -#endif - -#ifdef CONFIG_MACH_THOTH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_THOTH -# endif -# define machine_is_thoth() (machine_arch_type == MACH_TYPE_THOTH) -#else -# define machine_is_thoth() (0) -#endif - -#ifdef CONFIG_MACH_FIRESTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FIRESTONE -# endif -# define machine_is_firestone() (machine_arch_type == MACH_TYPE_FIRESTONE) -#else -# define machine_is_firestone() (0) -#endif - -#ifdef CONFIG_MACH_ASUSP750 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASUSP750 -# endif -# define machine_is_asusp750() (machine_arch_type == MACH_TYPE_ASUSP750) -#else -# define machine_is_asusp750() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_DL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_DL -# endif -# define machine_is_ctera_dl() (machine_arch_type == MACH_TYPE_CTERA_DL) -#else -# define machine_is_ctera_dl() (0) -#endif - -#ifdef CONFIG_MACH_SOCR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOCR -# endif -# define machine_is_socr() (machine_arch_type == MACH_TYPE_SOCR) -#else -# define machine_is_socr() (0) -#endif - -#ifdef CONFIG_MACH_HTCOXYGEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCOXYGEN -# endif -# define machine_is_htcoxygen() (machine_arch_type == MACH_TYPE_HTCOXYGEN) -#else -# define machine_is_htcoxygen() (0) -#endif - -#ifdef CONFIG_MACH_HEROC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HEROC -# endif -# define machine_is_heroc() (machine_arch_type == MACH_TYPE_HEROC) -#else -# define machine_is_heroc() (0) -#endif - -#ifdef CONFIG_MACH_ZENO6800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZENO6800 -# endif -# define machine_is_zeno6800() (machine_arch_type == MACH_TYPE_ZENO6800) -#else -# define machine_is_zeno6800() (0) -#endif - -#ifdef CONFIG_MACH_SC2MCS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SC2MCS -# endif -# define machine_is_sc2mcs() (machine_arch_type == MACH_TYPE_SC2MCS) -#else -# define machine_is_sc2mcs() (0) -#endif - -#ifdef CONFIG_MACH_GENE100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GENE100 -# endif -# define machine_is_gene100() (machine_arch_type == MACH_TYPE_GENE100) -#else -# define machine_is_gene100() (0) -#endif - -#ifdef CONFIG_MACH_AS353X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AS353X -# endif -# define machine_is_as353x() (machine_arch_type == MACH_TYPE_AS353X) -#else -# define machine_is_as353x() (0) -#endif - -#ifdef CONFIG_MACH_SHEEVAPLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHEEVAPLUG -# endif -# define machine_is_sheevaplug() (machine_arch_type == MACH_TYPE_SHEEVAPLUG) -#else -# define machine_is_sheevaplug() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G20 -# endif -# define machine_is_at91sam9g20() (machine_arch_type == MACH_TYPE_AT91SAM9G20) -#else -# define machine_is_at91sam9g20() (0) -#endif - -#ifdef CONFIG_MACH_MV88F6192GTW_FE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV88F6192GTW_FE -# endif -# define machine_is_mv88f6192gtw_fe() (machine_arch_type == MACH_TYPE_MV88F6192GTW_FE) -#else -# define machine_is_mv88f6192gtw_fe() (0) -#endif - -#ifdef CONFIG_MACH_CC9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9200 -# endif -# define machine_is_cc9200() (machine_arch_type == MACH_TYPE_CC9200) -#else -# define machine_is_cc9200() (0) -#endif - -#ifdef CONFIG_MACH_SM9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SM9200 -# endif -# define machine_is_sm9200() (machine_arch_type == MACH_TYPE_SM9200) -#else -# define machine_is_sm9200() (0) -#endif - -#ifdef CONFIG_MACH_TP9200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TP9200 -# endif -# define machine_is_tp9200() (machine_arch_type == MACH_TYPE_TP9200) -#else -# define machine_is_tp9200() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPERDV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPERDV -# endif -# define machine_is_snapperdv() (machine_arch_type == MACH_TYPE_SNAPPERDV) -#else -# define machine_is_snapperdv() (0) -#endif - -#ifdef CONFIG_MACH_AVENGERS_LITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVENGERS_LITE -# endif -# define machine_is_avengers_lite() (machine_arch_type == MACH_TYPE_AVENGERS_LITE) -#else -# define machine_is_avengers_lite() (0) -#endif - -#ifdef CONFIG_MACH_AVENGERS_LITE1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVENGERS_LITE1 -# endif -# define machine_is_avengers_lite1() (machine_arch_type == MACH_TYPE_AVENGERS_LITE1) -#else -# define machine_is_avengers_lite1() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3AXON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3AXON -# endif -# define machine_is_omap3axon() (machine_arch_type == MACH_TYPE_OMAP3AXON) -#else -# define machine_is_omap3axon() (0) -#endif - -#ifdef CONFIG_MACH_MA8XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MA8XX -# endif -# define machine_is_ma8xx() (machine_arch_type == MACH_TYPE_MA8XX) -#else -# define machine_is_ma8xx() (0) -#endif - -#ifdef CONFIG_MACH_MP201EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MP201EK -# endif -# define machine_is_mp201ek() (machine_arch_type == MACH_TYPE_MP201EK) -#else -# define machine_is_mp201ek() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_TUX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_TUX -# endif -# define machine_is_davinci_tux() (machine_arch_type == MACH_TYPE_DAVINCI_TUX) -#else -# define machine_is_davinci_tux() (0) -#endif - -#ifdef CONFIG_MACH_MPA1600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPA1600 -# endif -# define machine_is_mpa1600() (machine_arch_type == MACH_TYPE_MPA1600) -#else -# define machine_is_mpa1600() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_TROY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_TROY -# endif -# define machine_is_pelco_troy() (machine_arch_type == MACH_TYPE_PELCO_TROY) -#else -# define machine_is_pelco_troy() (0) -#endif - -#ifdef CONFIG_MACH_NSB667 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSB667 -# endif -# define machine_is_nsb667() (machine_arch_type == MACH_TYPE_NSB667) -#else -# define machine_is_nsb667() (0) -#endif - -#ifdef CONFIG_MACH_ROVERS5_4MPIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERS5_4MPIX -# endif -# define machine_is_rovers5_4mpix() (machine_arch_type == MACH_TYPE_ROVERS5_4MPIX) -#else -# define machine_is_rovers5_4mpix() (0) -#endif - -#ifdef CONFIG_MACH_TWOCOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TWOCOM -# endif -# define machine_is_twocom() (machine_arch_type == MACH_TYPE_TWOCOM) -#else -# define machine_is_twocom() (0) -#endif - -#ifdef CONFIG_MACH_UBISYS_P9_RCU3R2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UBISYS_P9_RCU3R2 -# endif -# define machine_is_ubisys_p9_rcu3r2() (machine_arch_type == MACH_TYPE_UBISYS_P9_RCU3R2) -#else -# define machine_is_ubisys_p9_rcu3r2() (0) -#endif - -#ifdef CONFIG_MACH_HERO_ESPRESSO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERO_ESPRESSO -# endif -# define machine_is_hero_espresso() (machine_arch_type == MACH_TYPE_HERO_ESPRESSO) -#else -# define machine_is_hero_espresso() (0) -#endif - -#ifdef CONFIG_MACH_AFEUSB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AFEUSB -# endif -# define machine_is_afeusb() (machine_arch_type == MACH_TYPE_AFEUSB) -#else -# define machine_is_afeusb() (0) -#endif - -#ifdef CONFIG_MACH_T830 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T830 -# endif -# define machine_is_t830() (machine_arch_type == MACH_TYPE_T830) -#else -# define machine_is_t830() (0) -#endif - -#ifdef CONFIG_MACH_SPD8020_CC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPD8020_CC -# endif -# define machine_is_spd8020_cc() (machine_arch_type == MACH_TYPE_SPD8020_CC) -#else -# define machine_is_spd8020_cc() (0) -#endif - -#ifdef CONFIG_MACH_OM_3D7K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OM_3D7K -# endif -# define machine_is_om_3d7k() (machine_arch_type == MACH_TYPE_OM_3D7K) -#else -# define machine_is_om_3d7k() (0) -#endif - -#ifdef CONFIG_MACH_PICOCOM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOCOM2 -# endif -# define machine_is_picocom2() (machine_arch_type == MACH_TYPE_PICOCOM2) -#else -# define machine_is_picocom2() (0) -#endif - -#ifdef CONFIG_MACH_UWG4MX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UWG4MX27 -# endif -# define machine_is_uwg4mx27() (machine_arch_type == MACH_TYPE_UWG4MX27) -#else -# define machine_is_uwg4mx27() (0) -#endif - -#ifdef CONFIG_MACH_UWG4MX31 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UWG4MX31 -# endif -# define machine_is_uwg4mx31() (machine_arch_type == MACH_TYPE_UWG4MX31) -#else -# define machine_is_uwg4mx31() (0) -#endif - -#ifdef CONFIG_MACH_CHERRY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHERRY -# endif -# define machine_is_cherry() (machine_arch_type == MACH_TYPE_CHERRY) -#else -# define machine_is_cherry() (0) -#endif - -#ifdef CONFIG_MACH_MX51_BABBAGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_BABBAGE -# endif -# define machine_is_mx51_babbage() (machine_arch_type == MACH_TYPE_MX51_BABBAGE) -#else -# define machine_is_mx51_babbage() (0) -#endif - -#ifdef CONFIG_MACH_S3C2440TURKIYE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S3C2440TURKIYE -# endif -# define machine_is_s3c2440turkiye() (machine_arch_type == MACH_TYPE_S3C2440TURKIYE) -#else -# define machine_is_s3c2440turkiye() (0) -#endif - -#ifdef CONFIG_MACH_TX37 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX37 -# endif -# define machine_is_tx37() (machine_arch_type == MACH_TYPE_TX37) -#else -# define machine_is_tx37() (0) -#endif - -#ifdef CONFIG_MACH_SBC2800_9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC2800_9G20 -# endif -# define machine_is_sbc2800_9g20() (machine_arch_type == MACH_TYPE_SBC2800_9G20) -#else -# define machine_is_sbc2800_9g20() (0) -#endif - -#ifdef CONFIG_MACH_BENZGLB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BENZGLB -# endif -# define machine_is_benzglb() (machine_arch_type == MACH_TYPE_BENZGLB) -#else -# define machine_is_benzglb() (0) -#endif - -#ifdef CONFIG_MACH_BENZTD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BENZTD -# endif -# define machine_is_benztd() (machine_arch_type == MACH_TYPE_BENZTD) -#else -# define machine_is_benztd() (0) -#endif - -#ifdef CONFIG_MACH_CARTESIO_PLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARTESIO_PLUS -# endif -# define machine_is_cartesio_plus() (machine_arch_type == MACH_TYPE_CARTESIO_PLUS) -#else -# define machine_is_cartesio_plus() (0) -#endif - -#ifdef CONFIG_MACH_SOLRAD_G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOLRAD_G20 -# endif -# define machine_is_solrad_g20() (machine_arch_type == MACH_TYPE_SOLRAD_G20) -#else -# define machine_is_solrad_g20() (0) -#endif - -#ifdef CONFIG_MACH_MX27WALLACE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27WALLACE -# endif -# define machine_is_mx27wallace() (machine_arch_type == MACH_TYPE_MX27WALLACE) -#else -# define machine_is_mx27wallace() (0) -#endif - -#ifdef CONFIG_MACH_FMZWEBMODUL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FMZWEBMODUL -# endif -# define machine_is_fmzwebmodul() (machine_arch_type == MACH_TYPE_FMZWEBMODUL) -#else -# define machine_is_fmzwebmodul() (0) -#endif - -#ifdef CONFIG_MACH_RD78X00_MASA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RD78X00_MASA -# endif -# define machine_is_rd78x00_masa() (machine_arch_type == MACH_TYPE_RD78X00_MASA) -#else -# define machine_is_rd78x00_masa() (0) -#endif - -#ifdef CONFIG_MACH_SMALLOGGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMALLOGGER -# endif -# define machine_is_smallogger() (machine_arch_type == MACH_TYPE_SMALLOGGER) -#else -# define machine_is_smallogger() (0) -#endif - -#ifdef CONFIG_MACH_CCW9P9215 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCW9P9215 -# endif -# define machine_is_ccw9p9215() (machine_arch_type == MACH_TYPE_CCW9P9215) -#else -# define machine_is_ccw9p9215() (0) -#endif - -#ifdef CONFIG_MACH_DM355_LEOPARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM355_LEOPARD -# endif -# define machine_is_dm355_leopard() (machine_arch_type == MACH_TYPE_DM355_LEOPARD) -#else -# define machine_is_dm355_leopard() (0) -#endif - -#ifdef CONFIG_MACH_TS219 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS219 -# endif -# define machine_is_ts219() (machine_arch_type == MACH_TYPE_TS219) -#else -# define machine_is_ts219() (0) -#endif - -#ifdef CONFIG_MACH_TNY_A9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNY_A9263 -# endif -# define machine_is_tny_a9263() (machine_arch_type == MACH_TYPE_TNY_A9263) -#else -# define machine_is_tny_a9263() (0) -#endif - -#ifdef CONFIG_MACH_APOLLO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APOLLO -# endif -# define machine_is_apollo() (machine_arch_type == MACH_TYPE_APOLLO) -#else -# define machine_is_apollo() (0) -#endif - -#ifdef CONFIG_MACH_AT91CAP9STK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91CAP9STK -# endif -# define machine_is_at91cap9stk() (machine_arch_type == MACH_TYPE_AT91CAP9STK) -#else -# define machine_is_at91cap9stk() (0) -#endif - -#ifdef CONFIG_MACH_SPC300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPC300 -# endif -# define machine_is_spc300() (machine_arch_type == MACH_TYPE_SPC300) -#else -# define machine_is_spc300() (0) -#endif - -#ifdef CONFIG_MACH_EKO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EKO -# endif -# define machine_is_eko() (machine_arch_type == MACH_TYPE_EKO) -#else -# define machine_is_eko() (0) -#endif - -#ifdef CONFIG_MACH_CCW9M2443 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCW9M2443 -# endif -# define machine_is_ccw9m2443() (machine_arch_type == MACH_TYPE_CCW9M2443) -#else -# define machine_is_ccw9m2443() (0) -#endif - -#ifdef CONFIG_MACH_CCW9M2443JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCW9M2443JS -# endif -# define machine_is_ccw9m2443js() (machine_arch_type == MACH_TYPE_CCW9M2443JS) -#else -# define machine_is_ccw9m2443js() (0) -#endif - -#ifdef CONFIG_MACH_M2M_ROUTER_DEVICE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M2M_ROUTER_DEVICE -# endif -# define machine_is_m2m_router_device() (machine_arch_type == MACH_TYPE_M2M_ROUTER_DEVICE) -#else -# define machine_is_m2m_router_device() (0) -#endif - -#ifdef CONFIG_MACH_STAR9104NAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAR9104NAS -# endif -# define machine_is_str9104nas() (machine_arch_type == MACH_TYPE_STAR9104NAS) -#else -# define machine_is_str9104nas() (0) -#endif - -#ifdef CONFIG_MACH_PCA100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCA100 -# endif -# define machine_is_pca100() (machine_arch_type == MACH_TYPE_PCA100) -#else -# define machine_is_pca100() (0) -#endif - -#ifdef CONFIG_MACH_Z3_DM365_MOD_01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Z3_DM365_MOD_01 -# endif -# define machine_is_z3_dm365_mod_01() (machine_arch_type == MACH_TYPE_Z3_DM365_MOD_01) -#else -# define machine_is_z3_dm365_mod_01() (0) -#endif - -#ifdef CONFIG_MACH_HIPOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIPOX -# endif -# define machine_is_hipox() (machine_arch_type == MACH_TYPE_HIPOX) -#else -# define machine_is_hipox() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_PITEDS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_PITEDS -# endif -# define machine_is_omap3_piteds() (machine_arch_type == MACH_TYPE_OMAP3_PITEDS) -#else -# define machine_is_omap3_piteds() (0) -#endif - -#ifdef CONFIG_MACH_BM150R -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BM150R -# endif -# define machine_is_bm150r() (machine_arch_type == MACH_TYPE_BM150R) -#else -# define machine_is_bm150r() (0) -#endif - -#ifdef CONFIG_MACH_TBONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TBONE -# endif -# define machine_is_tbone() (machine_arch_type == MACH_TYPE_TBONE) -#else -# define machine_is_tbone() (0) -#endif - -#ifdef CONFIG_MACH_MERLIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MERLIN -# endif -# define machine_is_merlin() (machine_arch_type == MACH_TYPE_MERLIN) -#else -# define machine_is_merlin() (0) -#endif - -#ifdef CONFIG_MACH_FALCON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FALCON -# endif -# define machine_is_falcon() (machine_arch_type == MACH_TYPE_FALCON) -#else -# define machine_is_falcon() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DA850_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DA850_EVM -# endif -# define machine_is_davinci_da850_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DA850_EVM) -#else -# define machine_is_davinci_da850_evm() (0) -#endif - -#ifdef CONFIG_MACH_S5P6440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5P6440 -# endif -# define machine_is_s5p6440() (machine_arch_type == MACH_TYPE_S5P6440) -#else -# define machine_is_s5p6440() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G10EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G10EK -# endif -# define machine_is_at91sam9g10ek() (machine_arch_type == MACH_TYPE_AT91SAM9G10EK) -#else -# define machine_is_at91sam9g10ek() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_4430SDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_4430SDP -# endif -# define machine_is_omap_4430sdp() (machine_arch_type == MACH_TYPE_OMAP_4430SDP) -#else -# define machine_is_omap_4430sdp() (0) -#endif - -#ifdef CONFIG_MACH_LPC313X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC313X -# endif -# define machine_is_lpc313x() (machine_arch_type == MACH_TYPE_LPC313X) -#else -# define machine_is_lpc313x() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_ZN5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_ZN5 -# endif -# define machine_is_magx_zn5() (machine_arch_type == MACH_TYPE_MAGX_ZN5) -#else -# define machine_is_magx_zn5() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_EM30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_EM30 -# endif -# define machine_is_magx_em30() (machine_arch_type == MACH_TYPE_MAGX_EM30) -#else -# define machine_is_magx_em30() (0) -#endif - -#ifdef CONFIG_MACH_MAGX_VE66 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGX_VE66 -# endif -# define machine_is_magx_ve66() (machine_arch_type == MACH_TYPE_MAGX_VE66) -#else -# define machine_is_magx_ve66() (0) -#endif - -#ifdef CONFIG_MACH_MEESC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEESC -# endif -# define machine_is_meesc() (machine_arch_type == MACH_TYPE_MEESC) -#else -# define machine_is_meesc() (0) -#endif - -#ifdef CONFIG_MACH_OTC570 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OTC570 -# endif -# define machine_is_otc570() (machine_arch_type == MACH_TYPE_OTC570) -#else -# define machine_is_otc570() (0) -#endif - -#ifdef CONFIG_MACH_BCU2412 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCU2412 -# endif -# define machine_is_bcu2412() (machine_arch_type == MACH_TYPE_BCU2412) -#else -# define machine_is_bcu2412() (0) -#endif - -#ifdef CONFIG_MACH_BEACON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BEACON -# endif -# define machine_is_beacon() (machine_arch_type == MACH_TYPE_BEACON) -#else -# define machine_is_beacon() (0) -#endif - -#ifdef CONFIG_MACH_ACTIA_TGW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACTIA_TGW -# endif -# define machine_is_actia_tgw() (machine_arch_type == MACH_TYPE_ACTIA_TGW) -#else -# define machine_is_actia_tgw() (0) -#endif - -#ifdef CONFIG_MACH_E4430 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E4430 -# endif -# define machine_is_e4430() (machine_arch_type == MACH_TYPE_E4430) -#else -# define machine_is_e4430() (0) -#endif - -#ifdef CONFIG_MACH_QL300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QL300 -# endif -# define machine_is_ql300() (machine_arch_type == MACH_TYPE_QL300) -#else -# define machine_is_ql300() (0) -#endif - -#ifdef CONFIG_MACH_BTMAVB101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BTMAVB101 -# endif -# define machine_is_btmavb101() (machine_arch_type == MACH_TYPE_BTMAVB101) -#else -# define machine_is_btmavb101() (0) -#endif - -#ifdef CONFIG_MACH_BTMAWB101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BTMAWB101 -# endif -# define machine_is_btmawb101() (machine_arch_type == MACH_TYPE_BTMAWB101) -#else -# define machine_is_btmawb101() (0) -#endif - -#ifdef CONFIG_MACH_SQ201 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SQ201 -# endif -# define machine_is_sq201() (machine_arch_type == MACH_TYPE_SQ201) -#else -# define machine_is_sq201() (0) -#endif - -#ifdef CONFIG_MACH_QUATRO45XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUATRO45XX -# endif -# define machine_is_quatro45xx() (machine_arch_type == MACH_TYPE_QUATRO45XX) -#else -# define machine_is_quatro45xx() (0) -#endif - -#ifdef CONFIG_MACH_OPENPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENPAD -# endif -# define machine_is_openpad() (machine_arch_type == MACH_TYPE_OPENPAD) -#else -# define machine_is_openpad() (0) -#endif - -#ifdef CONFIG_MACH_TX25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX25 -# endif -# define machine_is_tx25() (machine_arch_type == MACH_TYPE_TX25) -#else -# define machine_is_tx25() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_TORPEDO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_TORPEDO -# endif -# define machine_is_omap3_torpedo() (machine_arch_type == MACH_TYPE_OMAP3_TORPEDO) -#else -# define machine_is_omap3_torpedo() (0) -#endif - -#ifdef CONFIG_MACH_HTCRAPHAEL_K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRAPHAEL_K -# endif -# define machine_is_htcraphael_k() (machine_arch_type == MACH_TYPE_HTCRAPHAEL_K) -#else -# define machine_is_htcraphael_k() (0) -#endif - -#ifdef CONFIG_MACH_LAL43 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LAL43 -# endif -# define machine_is_lal43() (machine_arch_type == MACH_TYPE_LAL43) -#else -# define machine_is_lal43() (0) -#endif - -#ifdef CONFIG_MACH_HTCRAPHAEL_CDMA500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRAPHAEL_CDMA500 -# endif -# define machine_is_htcraphael_cdma500() (machine_arch_type == MACH_TYPE_HTCRAPHAEL_CDMA500) -#else -# define machine_is_htcraphael_cdma500() (0) -#endif - -#ifdef CONFIG_MACH_ANW6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANW6410 -# endif -# define machine_is_anw6410() (machine_arch_type == MACH_TYPE_ANW6410) -#else -# define machine_is_anw6410() (0) -#endif - -#ifdef CONFIG_MACH_HTCPROPHET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCPROPHET -# endif -# define machine_is_htcprophet() (machine_arch_type == MACH_TYPE_HTCPROPHET) -#else -# define machine_is_htcprophet() (0) -#endif - -#ifdef CONFIG_MACH_CFA_10022 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CFA_10022 -# endif -# define machine_is_cfa_10022() (machine_arch_type == MACH_TYPE_CFA_10022) -#else -# define machine_is_cfa_10022() (0) -#endif - -#ifdef CONFIG_MACH_IMX27_VISSTRIM_M10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMX27_VISSTRIM_M10 -# endif -# define machine_is_imx27_visstrim_m10() (machine_arch_type == MACH_TYPE_IMX27_VISSTRIM_M10) -#else -# define machine_is_imx27_visstrim_m10() (0) -#endif - -#ifdef CONFIG_MACH_PX2IMX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PX2IMX27 -# endif -# define machine_is_px2imx27() (machine_arch_type == MACH_TYPE_PX2IMX27) -#else -# define machine_is_px2imx27() (0) -#endif - -#ifdef CONFIG_MACH_STM3210E_EVAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STM3210E_EVAL -# endif -# define machine_is_stm3210e_eval() (machine_arch_type == MACH_TYPE_STM3210E_EVAL) -#else -# define machine_is_stm3210e_eval() (0) -#endif - -#ifdef CONFIG_MACH_DVS10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DVS10 -# endif -# define machine_is_dvs10() (machine_arch_type == MACH_TYPE_DVS10) -#else -# define machine_is_dvs10() (0) -#endif - -#ifdef CONFIG_MACH_PORTUXG20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PORTUXG20 -# endif -# define machine_is_portuxg20() (machine_arch_type == MACH_TYPE_PORTUXG20) -#else -# define machine_is_portuxg20() (0) -#endif - -#ifdef CONFIG_MACH_ARM_SPV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM_SPV -# endif -# define machine_is_arm_spv() (machine_arch_type == MACH_TYPE_ARM_SPV) -#else -# define machine_is_arm_spv() (0) -#endif - -#ifdef CONFIG_MACH_SMDKC110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKC110 -# endif -# define machine_is_smdkc110() (machine_arch_type == MACH_TYPE_SMDKC110) -#else -# define machine_is_smdkc110() (0) -#endif - -#ifdef CONFIG_MACH_CABESPRESSO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CABESPRESSO -# endif -# define machine_is_cabespresso() (machine_arch_type == MACH_TYPE_CABESPRESSO) -#else -# define machine_is_cabespresso() (0) -#endif - -#ifdef CONFIG_MACH_HMC800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HMC800 -# endif -# define machine_is_hmc800() (machine_arch_type == MACH_TYPE_HMC800) -#else -# define machine_is_hmc800() (0) -#endif - -#ifdef CONFIG_MACH_SHOLES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHOLES -# endif -# define machine_is_sholes() (machine_arch_type == MACH_TYPE_SHOLES) -#else -# define machine_is_sholes() (0) -#endif - -#ifdef CONFIG_MACH_BTMXC31 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BTMXC31 -# endif -# define machine_is_btmxc31() (machine_arch_type == MACH_TYPE_BTMXC31) -#else -# define machine_is_btmxc31() (0) -#endif - -#ifdef CONFIG_MACH_DT501 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DT501 -# endif -# define machine_is_dt501() (machine_arch_type == MACH_TYPE_DT501) -#else -# define machine_is_dt501() (0) -#endif - -#ifdef CONFIG_MACH_KTX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KTX -# endif -# define machine_is_ktx() (machine_arch_type == MACH_TYPE_KTX) -#else -# define machine_is_ktx() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3517EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3517EVM -# endif -# define machine_is_omap3517evm() (machine_arch_type == MACH_TYPE_OMAP3517EVM) -#else -# define machine_is_omap3517evm() (0) -#endif - -#ifdef CONFIG_MACH_NETSPACE_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSPACE_V2 -# endif -# define machine_is_netspace_v2() (machine_arch_type == MACH_TYPE_NETSPACE_V2) -#else -# define machine_is_netspace_v2() (0) -#endif - -#ifdef CONFIG_MACH_NETSPACE_MAX_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSPACE_MAX_V2 -# endif -# define machine_is_netspace_max_v2() (machine_arch_type == MACH_TYPE_NETSPACE_MAX_V2) -#else -# define machine_is_netspace_max_v2() (0) -#endif - -#ifdef CONFIG_MACH_D2NET_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_D2NET_V2 -# endif -# define machine_is_d2net_v2() (machine_arch_type == MACH_TYPE_D2NET_V2) -#else -# define machine_is_d2net_v2() (0) -#endif - -#ifdef CONFIG_MACH_NET2BIG_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NET2BIG_V2 -# endif -# define machine_is_net2big_v2() (machine_arch_type == MACH_TYPE_NET2BIG_V2) -#else -# define machine_is_net2big_v2() (0) -#endif - -#ifdef CONFIG_MACH_NET4BIG_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NET4BIG_V2 -# endif -# define machine_is_net4big_v2() (machine_arch_type == MACH_TYPE_NET4BIG_V2) -#else -# define machine_is_net4big_v2() (0) -#endif - -#ifdef CONFIG_MACH_NET5BIG_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NET5BIG_V2 -# endif -# define machine_is_net5big_v2() (machine_arch_type == MACH_TYPE_NET5BIG_V2) -#else -# define machine_is_net5big_v2() (0) -#endif - -#ifdef CONFIG_MACH_ENDB2443 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ENDB2443 -# endif -# define machine_is_endb2443() (machine_arch_type == MACH_TYPE_ENDB2443) -#else -# define machine_is_endb2443() (0) -#endif - -#ifdef CONFIG_MACH_INETSPACE_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INETSPACE_V2 -# endif -# define machine_is_inetspace_v2() (machine_arch_type == MACH_TYPE_INETSPACE_V2) -#else -# define machine_is_inetspace_v2() (0) -#endif - -#ifdef CONFIG_MACH_TROS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TROS -# endif -# define machine_is_tros() (machine_arch_type == MACH_TYPE_TROS) -#else -# define machine_is_tros() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_HOMER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_HOMER -# endif -# define machine_is_pelco_homer() (machine_arch_type == MACH_TYPE_PELCO_HOMER) -#else -# define machine_is_pelco_homer() (0) -#endif - -#ifdef CONFIG_MACH_OFSP8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OFSP8 -# endif -# define machine_is_ofsp8() (machine_arch_type == MACH_TYPE_OFSP8) -#else -# define machine_is_ofsp8() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G45EKES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G45EKES -# endif -# define machine_is_at91sam9g45ekes() (machine_arch_type == MACH_TYPE_AT91SAM9G45EKES) -#else -# define machine_is_at91sam9g45ekes() (0) -#endif - -#ifdef CONFIG_MACH_GUF_CUPID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUF_CUPID -# endif -# define machine_is_guf_cupid() (machine_arch_type == MACH_TYPE_GUF_CUPID) -#else -# define machine_is_guf_cupid() (0) -#endif - -#ifdef CONFIG_MACH_EAB1R -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EAB1R -# endif -# define machine_is_eab1r() (machine_arch_type == MACH_TYPE_EAB1R) -#else -# define machine_is_eab1r() (0) -#endif - -#ifdef CONFIG_MACH_DESIREC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DESIREC -# endif -# define machine_is_desirec() (machine_arch_type == MACH_TYPE_DESIREC) -#else -# define machine_is_desirec() (0) -#endif - -#ifdef CONFIG_MACH_CORDOBA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORDOBA -# endif -# define machine_is_cordoba() (machine_arch_type == MACH_TYPE_CORDOBA) -#else -# define machine_is_cordoba() (0) -#endif - -#ifdef CONFIG_MACH_IRVINE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IRVINE -# endif -# define machine_is_irvine() (machine_arch_type == MACH_TYPE_IRVINE) -#else -# define machine_is_irvine() (0) -#endif - -#ifdef CONFIG_MACH_SFF772 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SFF772 -# endif -# define machine_is_sff772() (machine_arch_type == MACH_TYPE_SFF772) -#else -# define machine_is_sff772() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_MILANO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_MILANO -# endif -# define machine_is_pelco_milano() (machine_arch_type == MACH_TYPE_PELCO_MILANO) -#else -# define machine_is_pelco_milano() (0) -#endif - -#ifdef CONFIG_MACH_PC7302 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC7302 -# endif -# define machine_is_pc7302() (machine_arch_type == MACH_TYPE_PC7302) -#else -# define machine_is_pc7302() (0) -#endif - -#ifdef CONFIG_MACH_BIP6000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIP6000 -# endif -# define machine_is_bip6000() (machine_arch_type == MACH_TYPE_BIP6000) -#else -# define machine_is_bip6000() (0) -#endif - -#ifdef CONFIG_MACH_SILVERMOON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SILVERMOON -# endif -# define machine_is_silvermoon() (machine_arch_type == MACH_TYPE_SILVERMOON) -#else -# define machine_is_silvermoon() (0) -#endif - -#ifdef CONFIG_MACH_VC0830 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VC0830 -# endif -# define machine_is_vc0830() (machine_arch_type == MACH_TYPE_VC0830) -#else -# define machine_is_vc0830() (0) -#endif - -#ifdef CONFIG_MACH_DT430 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DT430 -# endif -# define machine_is_dt430() (machine_arch_type == MACH_TYPE_DT430) -#else -# define machine_is_dt430() (0) -#endif - -#ifdef CONFIG_MACH_JI42PF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JI42PF -# endif -# define machine_is_ji42pf() (machine_arch_type == MACH_TYPE_JI42PF) -#else -# define machine_is_ji42pf() (0) -#endif - -#ifdef CONFIG_MACH_GNET_KSM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_KSM -# endif -# define machine_is_gnet_ksm() (machine_arch_type == MACH_TYPE_GNET_KSM) -#else -# define machine_is_gnet_ksm() (0) -#endif - -#ifdef CONFIG_MACH_GNET_SGM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_SGM -# endif -# define machine_is_gnet_sgm() (machine_arch_type == MACH_TYPE_GNET_SGM) -#else -# define machine_is_gnet_sgm() (0) -#endif - -#ifdef CONFIG_MACH_GNET_SGR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_SGR -# endif -# define machine_is_gnet_sgr() (machine_arch_type == MACH_TYPE_GNET_SGR) -#else -# define machine_is_gnet_sgr() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_ICETEKEVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_ICETEKEVM -# endif -# define machine_is_omap3_icetekevm() (machine_arch_type == MACH_TYPE_OMAP3_ICETEKEVM) -#else -# define machine_is_omap3_icetekevm() (0) -#endif - -#ifdef CONFIG_MACH_PNP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PNP -# endif -# define machine_is_pnp() (machine_arch_type == MACH_TYPE_PNP) -#else -# define machine_is_pnp() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_2BAY_K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_2BAY_K -# endif -# define machine_is_ctera_2bay_k() (machine_arch_type == MACH_TYPE_CTERA_2BAY_K) -#else -# define machine_is_ctera_2bay_k() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_2BAY_U -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_2BAY_U -# endif -# define machine_is_ctera_2bay_u() (machine_arch_type == MACH_TYPE_CTERA_2BAY_U) -#else -# define machine_is_ctera_2bay_u() (0) -#endif - -#ifdef CONFIG_MACH_SAS_C -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAS_C -# endif -# define machine_is_sas_c() (machine_arch_type == MACH_TYPE_SAS_C) -#else -# define machine_is_sas_c() (0) -#endif - -#ifdef CONFIG_MACH_VMA2315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VMA2315 -# endif -# define machine_is_vma2315() (machine_arch_type == MACH_TYPE_VMA2315) -#else -# define machine_is_vma2315() (0) -#endif - -#ifdef CONFIG_MACH_VCS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VCS -# endif -# define machine_is_vcs() (machine_arch_type == MACH_TYPE_VCS) -#else -# define machine_is_vcs() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR600 -# endif -# define machine_is_spear600() (machine_arch_type == MACH_TYPE_SPEAR600) -#else -# define machine_is_spear600() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR300 -# endif -# define machine_is_spear300() (machine_arch_type == MACH_TYPE_SPEAR300) -#else -# define machine_is_spear300() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR1300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR1300 -# endif -# define machine_is_spear1300() (machine_arch_type == MACH_TYPE_SPEAR1300) -#else -# define machine_is_spear1300() (0) -#endif - -#ifdef CONFIG_MACH_LILLY1131 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LILLY1131 -# endif -# define machine_is_lilly1131() (machine_arch_type == MACH_TYPE_LILLY1131) -#else -# define machine_is_lilly1131() (0) -#endif - -#ifdef CONFIG_MACH_ARVOO_AX301 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARVOO_AX301 -# endif -# define machine_is_arvoo_ax301() (machine_arch_type == MACH_TYPE_ARVOO_AX301) -#else -# define machine_is_arvoo_ax301() (0) -#endif - -#ifdef CONFIG_MACH_MAPPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAPPHONE -# endif -# define machine_is_mapphone() (machine_arch_type == MACH_TYPE_MAPPHONE) -#else -# define machine_is_mapphone() (0) -#endif - -#ifdef CONFIG_MACH_LEGEND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEGEND -# endif -# define machine_is_legend() (machine_arch_type == MACH_TYPE_LEGEND) -#else -# define machine_is_legend() (0) -#endif - -#ifdef CONFIG_MACH_SALSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SALSA -# endif -# define machine_is_salsa() (machine_arch_type == MACH_TYPE_SALSA) -#else -# define machine_is_salsa() (0) -#endif - -#ifdef CONFIG_MACH_LOUNGE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LOUNGE -# endif -# define machine_is_lounge() (machine_arch_type == MACH_TYPE_LOUNGE) -#else -# define machine_is_lounge() (0) -#endif - -#ifdef CONFIG_MACH_VISION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VISION -# endif -# define machine_is_vision() (machine_arch_type == MACH_TYPE_VISION) -#else -# define machine_is_vision() (0) -#endif - -#ifdef CONFIG_MACH_VMB20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VMB20 -# endif -# define machine_is_vmb20() (machine_arch_type == MACH_TYPE_VMB20) -#else -# define machine_is_vmb20() (0) -#endif - -#ifdef CONFIG_MACH_HY2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HY2410 -# endif -# define machine_is_hy2410() (machine_arch_type == MACH_TYPE_HY2410) -#else -# define machine_is_hy2410() (0) -#endif - -#ifdef CONFIG_MACH_HY9315 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HY9315 -# endif -# define machine_is_hy9315() (machine_arch_type == MACH_TYPE_HY9315) -#else -# define machine_is_hy9315() (0) -#endif - -#ifdef CONFIG_MACH_BULLWINKLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BULLWINKLE -# endif -# define machine_is_bullwinkle() (machine_arch_type == MACH_TYPE_BULLWINKLE) -#else -# define machine_is_bullwinkle() (0) -#endif - -#ifdef CONFIG_MACH_ARM_ULTIMATOR2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM_ULTIMATOR2 -# endif -# define machine_is_arm_ultimator2() (machine_arch_type == MACH_TYPE_ARM_ULTIMATOR2) -#else -# define machine_is_arm_ultimator2() (0) -#endif - -#ifdef CONFIG_MACH_VS_V210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VS_V210 -# endif -# define machine_is_vs_v210() (machine_arch_type == MACH_TYPE_VS_V210) -#else -# define machine_is_vs_v210() (0) -#endif - -#ifdef CONFIG_MACH_VS_V212 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VS_V212 -# endif -# define machine_is_vs_v212() (machine_arch_type == MACH_TYPE_VS_V212) -#else -# define machine_is_vs_v212() (0) -#endif - -#ifdef CONFIG_MACH_HMT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HMT -# endif -# define machine_is_hmt() (machine_arch_type == MACH_TYPE_HMT) -#else -# define machine_is_hmt() (0) -#endif - -#ifdef CONFIG_MACH_KM_KIRKWOOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KM_KIRKWOOD -# endif -# define machine_is_km_kirkwood() (machine_arch_type == MACH_TYPE_KM_KIRKWOOD) -#else -# define machine_is_km_kirkwood() (0) -#endif - -#ifdef CONFIG_MACH_VESPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VESPER -# endif -# define machine_is_vesper() (machine_arch_type == MACH_TYPE_VESPER) -#else -# define machine_is_vesper() (0) -#endif - -#ifdef CONFIG_MACH_STR9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STR9 -# endif -# define machine_is_str9() (machine_arch_type == MACH_TYPE_STR9) -#else -# define machine_is_str9() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_WL_FF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_WL_FF -# endif -# define machine_is_omap3_wl_ff() (machine_arch_type == MACH_TYPE_OMAP3_WL_FF) -#else -# define machine_is_omap3_wl_ff() (0) -#endif - -#ifdef CONFIG_MACH_SIMCOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMCOM -# endif -# define machine_is_simcom() (machine_arch_type == MACH_TYPE_SIMCOM) -#else -# define machine_is_simcom() (0) -#endif - -#ifdef CONFIG_MACH_MCWEBIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MCWEBIO -# endif -# define machine_is_mcwebio() (machine_arch_type == MACH_TYPE_MCWEBIO) -#else -# define machine_is_mcwebio() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_PHRAZER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_PHRAZER -# endif -# define machine_is_omap3_phrazer() (machine_arch_type == MACH_TYPE_OMAP3_PHRAZER) -#else -# define machine_is_omap3_phrazer() (0) -#endif - -#ifdef CONFIG_MACH_DARWIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DARWIN -# endif -# define machine_is_darwin() (machine_arch_type == MACH_TYPE_DARWIN) -#else -# define machine_is_darwin() (0) -#endif - -#ifdef CONFIG_MACH_ORATISCOMU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISCOMU -# endif -# define machine_is_oratiscomu() (machine_arch_type == MACH_TYPE_ORATISCOMU) -#else -# define machine_is_oratiscomu() (0) -#endif - -#ifdef CONFIG_MACH_RTSBC20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RTSBC20 -# endif -# define machine_is_rtsbc20() (machine_arch_type == MACH_TYPE_RTSBC20) -#else -# define machine_is_rtsbc20() (0) -#endif - -#ifdef CONFIG_MACH_I780 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_I780 -# endif -# define machine_is_sgh_i780() (machine_arch_type == MACH_TYPE_I780) -#else -# define machine_is_sgh_i780() (0) -#endif - -#ifdef CONFIG_MACH_GEMINI324 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEMINI324 -# endif -# define machine_is_gemini324() (machine_arch_type == MACH_TYPE_GEMINI324) -#else -# define machine_is_gemini324() (0) -#endif - -#ifdef CONFIG_MACH_ORATISLAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISLAN -# endif -# define machine_is_oratislan() (machine_arch_type == MACH_TYPE_ORATISLAN) -#else -# define machine_is_oratislan() (0) -#endif - -#ifdef CONFIG_MACH_ORATISALOG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISALOG -# endif -# define machine_is_oratisalog() (machine_arch_type == MACH_TYPE_ORATISALOG) -#else -# define machine_is_oratisalog() (0) -#endif - -#ifdef CONFIG_MACH_ORATISMADI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISMADI -# endif -# define machine_is_oratismadi() (machine_arch_type == MACH_TYPE_ORATISMADI) -#else -# define machine_is_oratismadi() (0) -#endif - -#ifdef CONFIG_MACH_ORATISOT16 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISOT16 -# endif -# define machine_is_oratisot16() (machine_arch_type == MACH_TYPE_ORATISOT16) -#else -# define machine_is_oratisot16() (0) -#endif - -#ifdef CONFIG_MACH_ORATISDESK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISDESK -# endif -# define machine_is_oratisdesk() (machine_arch_type == MACH_TYPE_ORATISDESK) -#else -# define machine_is_oratisdesk() (0) -#endif - -#ifdef CONFIG_MACH_VEXPRESS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VEXPRESS -# endif -# define machine_is_vexpress() (machine_arch_type == MACH_TYPE_VEXPRESS) -#else -# define machine_is_vexpress() (0) -#endif - -#ifdef CONFIG_MACH_SINTEXO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SINTEXO -# endif -# define machine_is_sintexo() (machine_arch_type == MACH_TYPE_SINTEXO) -#else -# define machine_is_sintexo() (0) -#endif - -#ifdef CONFIG_MACH_CM3389 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM3389 -# endif -# define machine_is_cm3389() (machine_arch_type == MACH_TYPE_CM3389) -#else -# define machine_is_cm3389() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_CIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_CIO -# endif -# define machine_is_omap3_cio() (machine_arch_type == MACH_TYPE_OMAP3_CIO) -#else -# define machine_is_omap3_cio() (0) -#endif - -#ifdef CONFIG_MACH_SGH_I900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SGH_I900 -# endif -# define machine_is_sgh_i900() (machine_arch_type == MACH_TYPE_SGH_I900) -#else -# define machine_is_sgh_i900() (0) -#endif - -#ifdef CONFIG_MACH_BST100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BST100 -# endif -# define machine_is_bst100() (machine_arch_type == MACH_TYPE_BST100) -#else -# define machine_is_bst100() (0) -#endif - -#ifdef CONFIG_MACH_PASSION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PASSION -# endif -# define machine_is_passion() (machine_arch_type == MACH_TYPE_PASSION) -#else -# define machine_is_passion() (0) -#endif - -#ifdef CONFIG_MACH_INDESIGN_AT91SAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INDESIGN_AT91SAM -# endif -# define machine_is_indesign_at91sam() (machine_arch_type == MACH_TYPE_INDESIGN_AT91SAM) -#else -# define machine_is_indesign_at91sam() (0) -#endif - -#ifdef CONFIG_MACH_C4_BADGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C4_BADGER -# endif -# define machine_is_c4_badger() (machine_arch_type == MACH_TYPE_C4_BADGER) -#else -# define machine_is_c4_badger() (0) -#endif - -#ifdef CONFIG_MACH_C4_VIPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C4_VIPER -# endif -# define machine_is_c4_viper() (machine_arch_type == MACH_TYPE_C4_VIPER) -#else -# define machine_is_c4_viper() (0) -#endif - -#ifdef CONFIG_MACH_D2NET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_D2NET -# endif -# define machine_is_d2net() (machine_arch_type == MACH_TYPE_D2NET) -#else -# define machine_is_d2net() (0) -#endif - -#ifdef CONFIG_MACH_BIGDISK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIGDISK -# endif -# define machine_is_bigdisk() (machine_arch_type == MACH_TYPE_BIGDISK) -#else -# define machine_is_bigdisk() (0) -#endif - -#ifdef CONFIG_MACH_NOTALVISION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOTALVISION -# endif -# define machine_is_notalvision() (machine_arch_type == MACH_TYPE_NOTALVISION) -#else -# define machine_is_notalvision() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_KBOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_KBOC -# endif -# define machine_is_omap3_kboc() (machine_arch_type == MACH_TYPE_OMAP3_KBOC) -#else -# define machine_is_omap3_kboc() (0) -#endif - -#ifdef CONFIG_MACH_CYCLONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYCLONE -# endif -# define machine_is_cyclone() (machine_arch_type == MACH_TYPE_CYCLONE) -#else -# define machine_is_cyclone() (0) -#endif - -#ifdef CONFIG_MACH_NINJA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NINJA -# endif -# define machine_is_ninja() (machine_arch_type == MACH_TYPE_NINJA) -#else -# define machine_is_ninja() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G20EK_2MMC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G20EK_2MMC -# endif -# define machine_is_at91sam9g20ek_2mmc() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK_2MMC) -#else -# define machine_is_at91sam9g20ek_2mmc() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING -# endif -# define machine_is_bcmring() (machine_arch_type == MACH_TYPE_BCMRING) -#else -# define machine_is_bcmring() (0) -#endif - -#ifdef CONFIG_MACH_RESOL_DL2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RESOL_DL2 -# endif -# define machine_is_resol_dl2() (machine_arch_type == MACH_TYPE_RESOL_DL2) -#else -# define machine_is_resol_dl2() (0) -#endif - -#ifdef CONFIG_MACH_IFOSW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IFOSW -# endif -# define machine_is_ifosw() (machine_arch_type == MACH_TYPE_IFOSW) -#else -# define machine_is_ifosw() (0) -#endif - -#ifdef CONFIG_MACH_HTCRHODIUM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRHODIUM -# endif -# define machine_is_htcrhodium() (machine_arch_type == MACH_TYPE_HTCRHODIUM) -#else -# define machine_is_htcrhodium() (0) -#endif - -#ifdef CONFIG_MACH_HTCTOPAZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCTOPAZ -# endif -# define machine_is_htctopaz() (machine_arch_type == MACH_TYPE_HTCTOPAZ) -#else -# define machine_is_htctopaz() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX504 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX504 -# endif -# define machine_is_matrix504() (machine_arch_type == MACH_TYPE_MATRIX504) -#else -# define machine_is_matrix504() (0) -#endif - -#ifdef CONFIG_MACH_MRFSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MRFSA -# endif -# define machine_is_mrfsa() (machine_arch_type == MACH_TYPE_MRFSA) -#else -# define machine_is_mrfsa() (0) -#endif - -#ifdef CONFIG_MACH_SC_P270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SC_P270 -# endif -# define machine_is_sc_p270() (machine_arch_type == MACH_TYPE_SC_P270) -#else -# define machine_is_sc_p270() (0) -#endif - -#ifdef CONFIG_MACH_ATLAS5_EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATLAS5_EVB -# endif -# define machine_is_atlas5_evb() (machine_arch_type == MACH_TYPE_ATLAS5_EVB) -#else -# define machine_is_atlas5_evb() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_LOBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_LOBOX -# endif -# define machine_is_pelco_lobox() (machine_arch_type == MACH_TYPE_PELCO_LOBOX) -#else -# define machine_is_pelco_lobox() (0) -#endif - -#ifdef CONFIG_MACH_DILAX_PCU200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DILAX_PCU200 -# endif -# define machine_is_dilax_pcu200() (machine_arch_type == MACH_TYPE_DILAX_PCU200) -#else -# define machine_is_dilax_pcu200() (0) -#endif - -#ifdef CONFIG_MACH_LEONARDO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEONARDO -# endif -# define machine_is_leonardo() (machine_arch_type == MACH_TYPE_LEONARDO) -#else -# define machine_is_leonardo() (0) -#endif - -#ifdef CONFIG_MACH_ZORAN_APPROACH7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZORAN_APPROACH7 -# endif -# define machine_is_zoran_approach7() (machine_arch_type == MACH_TYPE_ZORAN_APPROACH7) -#else -# define machine_is_zoran_approach7() (0) -#endif - -#ifdef CONFIG_MACH_DP6XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DP6XX -# endif -# define machine_is_dp6xx() (machine_arch_type == MACH_TYPE_DP6XX) -#else -# define machine_is_dp6xx() (0) -#endif - -#ifdef CONFIG_MACH_BCM2153_VESPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCM2153_VESPER -# endif -# define machine_is_bcm2153_vesper() (machine_arch_type == MACH_TYPE_BCM2153_VESPER) -#else -# define machine_is_bcm2153_vesper() (0) -#endif - -#ifdef CONFIG_MACH_MAHIMAHI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAHIMAHI -# endif -# define machine_is_mahimahi() (machine_arch_type == MACH_TYPE_MAHIMAHI) -#else -# define machine_is_mahimahi() (0) -#endif - -#ifdef CONFIG_MACH_CLICKC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLICKC -# endif -# define machine_is_clickc() (machine_arch_type == MACH_TYPE_CLICKC) -#else -# define machine_is_clickc() (0) -#endif - -#ifdef CONFIG_MACH_ZB_GATEWAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZB_GATEWAY -# endif -# define machine_is_zb_gateway() (machine_arch_type == MACH_TYPE_ZB_GATEWAY) -#else -# define machine_is_zb_gateway() (0) -#endif - -#ifdef CONFIG_MACH_TAZCARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAZCARD -# endif -# define machine_is_tazcard() (machine_arch_type == MACH_TYPE_TAZCARD) -#else -# define machine_is_tazcard() (0) -#endif - -#ifdef CONFIG_MACH_TAZDEV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAZDEV -# endif -# define machine_is_tazdev() (machine_arch_type == MACH_TYPE_TAZDEV) -#else -# define machine_is_tazdev() (0) -#endif - -#ifdef CONFIG_MACH_ANNAX_CB_ARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANNAX_CB_ARM -# endif -# define machine_is_annax_cb_arm() (machine_arch_type == MACH_TYPE_ANNAX_CB_ARM) -#else -# define machine_is_annax_cb_arm() (0) -#endif - -#ifdef CONFIG_MACH_ANNAX_DM3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANNAX_DM3 -# endif -# define machine_is_annax_dm3() (machine_arch_type == MACH_TYPE_ANNAX_DM3) -#else -# define machine_is_annax_dm3() (0) -#endif - -#ifdef CONFIG_MACH_CEREBRIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CEREBRIC -# endif -# define machine_is_cerebric() (machine_arch_type == MACH_TYPE_CEREBRIC) -#else -# define machine_is_cerebric() (0) -#endif - -#ifdef CONFIG_MACH_ORCA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORCA -# endif -# define machine_is_orca() (machine_arch_type == MACH_TYPE_ORCA) -#else -# define machine_is_orca() (0) -#endif - -#ifdef CONFIG_MACH_PC9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC9260 -# endif -# define machine_is_pc9260() (machine_arch_type == MACH_TYPE_PC9260) -#else -# define machine_is_pc9260() (0) -#endif - -#ifdef CONFIG_MACH_EMS285A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMS285A -# endif -# define machine_is_ems285a() (machine_arch_type == MACH_TYPE_EMS285A) -#else -# define machine_is_ems285a() (0) -#endif - -#ifdef CONFIG_MACH_GEC2410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEC2410 -# endif -# define machine_is_gec2410() (machine_arch_type == MACH_TYPE_GEC2410) -#else -# define machine_is_gec2410() (0) -#endif - -#ifdef CONFIG_MACH_GEC2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GEC2440 -# endif -# define machine_is_gec2440() (machine_arch_type == MACH_TYPE_GEC2440) -#else -# define machine_is_gec2440() (0) -#endif - -#ifdef CONFIG_MACH_ARCH_MW903 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARCH_MW903 -# endif -# define machine_is_mw903() (machine_arch_type == MACH_TYPE_ARCH_MW903) -#else -# define machine_is_mw903() (0) -#endif - -#ifdef CONFIG_MACH_MW2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MW2440 -# endif -# define machine_is_mw2440() (machine_arch_type == MACH_TYPE_MW2440) -#else -# define machine_is_mw2440() (0) -#endif - -#ifdef CONFIG_MACH_ECAC2378 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECAC2378 -# endif -# define machine_is_ecac2378() (machine_arch_type == MACH_TYPE_ECAC2378) -#else -# define machine_is_ecac2378() (0) -#endif - -#ifdef CONFIG_MACH_TAZKIOSK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAZKIOSK -# endif -# define machine_is_tazkiosk() (machine_arch_type == MACH_TYPE_TAZKIOSK) -#else -# define machine_is_tazkiosk() (0) -#endif - -#ifdef CONFIG_MACH_WHITERABBIT_MCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WHITERABBIT_MCH -# endif -# define machine_is_whiterabbit_mch() (machine_arch_type == MACH_TYPE_WHITERABBIT_MCH) -#else -# define machine_is_whiterabbit_mch() (0) -#endif - -#ifdef CONFIG_MACH_SBOX9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBOX9263 -# endif -# define machine_is_sbox9263() (machine_arch_type == MACH_TYPE_SBOX9263) -#else -# define machine_is_sbox9263() (0) -#endif - -#ifdef CONFIG_MACH_OREO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OREO -# endif -# define machine_is_oreo() (machine_arch_type == MACH_TYPE_OREO) -#else -# define machine_is_oreo() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6442 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6442 -# endif -# define machine_is_smdk6442() (machine_arch_type == MACH_TYPE_SMDK6442) -#else -# define machine_is_smdk6442() (0) -#endif - -#ifdef CONFIG_MACH_OPENRD_BASE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENRD_BASE -# endif -# define machine_is_openrd_base() (machine_arch_type == MACH_TYPE_OPENRD_BASE) -#else -# define machine_is_openrd_base() (0) -#endif - -#ifdef CONFIG_MACH_INCREDIBLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INCREDIBLE -# endif -# define machine_is_incredible() (machine_arch_type == MACH_TYPE_INCREDIBLE) -#else -# define machine_is_incredible() (0) -#endif - -#ifdef CONFIG_MACH_INCREDIBLEC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INCREDIBLEC -# endif -# define machine_is_incrediblec() (machine_arch_type == MACH_TYPE_INCREDIBLEC) -#else -# define machine_is_incrediblec() (0) -#endif - -#ifdef CONFIG_MACH_HEROCT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HEROCT -# endif -# define machine_is_heroct() (machine_arch_type == MACH_TYPE_HEROCT) -#else -# define machine_is_heroct() (0) -#endif - -#ifdef CONFIG_MACH_MMNET1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMNET1000 -# endif -# define machine_is_mmnet1000() (machine_arch_type == MACH_TYPE_MMNET1000) -#else -# define machine_is_mmnet1000() (0) -#endif - -#ifdef CONFIG_MACH_DEVKIT8000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEVKIT8000 -# endif -# define machine_is_devkit8000() (machine_arch_type == MACH_TYPE_DEVKIT8000) -#else -# define machine_is_devkit8000() (0) -#endif - -#ifdef CONFIG_MACH_DEVKIT9000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEVKIT9000 -# endif -# define machine_is_devkit9000() (machine_arch_type == MACH_TYPE_DEVKIT9000) -#else -# define machine_is_devkit9000() (0) -#endif - -#ifdef CONFIG_MACH_MX31TXTR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31TXTR -# endif -# define machine_is_mx31txtr() (machine_arch_type == MACH_TYPE_MX31TXTR) -#else -# define machine_is_mx31txtr() (0) -#endif - -#ifdef CONFIG_MACH_U380 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U380 -# endif -# define machine_is_u380() (machine_arch_type == MACH_TYPE_U380) -#else -# define machine_is_u380() (0) -#endif - -#ifdef CONFIG_MACH_HUALU_BOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUALU_BOARD -# endif -# define machine_is_oamp3_hualu() (machine_arch_type == MACH_TYPE_HUALU_BOARD) -#else -# define machine_is_oamp3_hualu() (0) -#endif - -#ifdef CONFIG_MACH_NPCMX50 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NPCMX50 -# endif -# define machine_is_npcmx50() (machine_arch_type == MACH_TYPE_NPCMX50) -#else -# define machine_is_npcmx50() (0) -#endif - -#ifdef CONFIG_MACH_MX51_EFIKAMX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_EFIKAMX -# endif -# define machine_is_mx51_efikamx() (machine_arch_type == MACH_TYPE_MX51_EFIKAMX) -#else -# define machine_is_mx51_efikamx() (0) -#endif - -#ifdef CONFIG_MACH_MX51_LANGE52 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_LANGE52 -# endif -# define machine_is_mx51_lange52() (machine_arch_type == MACH_TYPE_MX51_LANGE52) -#else -# define machine_is_mx51_lange52() (0) -#endif - -#ifdef CONFIG_MACH_RIOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIOM -# endif -# define machine_is_riom() (machine_arch_type == MACH_TYPE_RIOM) -#else -# define machine_is_riom() (0) -#endif - -#ifdef CONFIG_MACH_COMCAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMCAS -# endif -# define machine_is_comcas() (machine_arch_type == MACH_TYPE_COMCAS) -#else -# define machine_is_comcas() (0) -#endif - -#ifdef CONFIG_MACH_WSI_MX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WSI_MX27 -# endif -# define machine_is_wsi_mx27() (machine_arch_type == MACH_TYPE_WSI_MX27) -#else -# define machine_is_wsi_mx27() (0) -#endif - -#ifdef CONFIG_MACH_CM_T35 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_T35 -# endif -# define machine_is_cm_t35() (machine_arch_type == MACH_TYPE_CM_T35) -#else -# define machine_is_cm_t35() (0) -#endif - -#ifdef CONFIG_MACH_NET2BIG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NET2BIG -# endif -# define machine_is_net2big() (machine_arch_type == MACH_TYPE_NET2BIG) -#else -# define machine_is_net2big() (0) -#endif - -#ifdef CONFIG_MACH_MOTOROLA_A1600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOTOROLA_A1600 -# endif -# define machine_is_motorola_a1600() (machine_arch_type == MACH_TYPE_MOTOROLA_A1600) -#else -# define machine_is_motorola_a1600() (0) -#endif - -#ifdef CONFIG_MACH_IGEP0020 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGEP0020 -# endif -# define machine_is_igep0020() (machine_arch_type == MACH_TYPE_IGEP0020) -#else -# define machine_is_igep0020() (0) -#endif - -#ifdef CONFIG_MACH_IGEP0010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGEP0010 -# endif -# define machine_is_igep0010() (machine_arch_type == MACH_TYPE_IGEP0010) -#else -# define machine_is_igep0010() (0) -#endif - -#ifdef CONFIG_MACH_MV6281GTWGE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MV6281GTWGE2 -# endif -# define machine_is_mv6281gtwge2() (machine_arch_type == MACH_TYPE_MV6281GTWGE2) -#else -# define machine_is_mv6281gtwge2() (0) -#endif - -#ifdef CONFIG_MACH_SCAT100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCAT100 -# endif -# define machine_is_scat100() (machine_arch_type == MACH_TYPE_SCAT100) -#else -# define machine_is_scat100() (0) -#endif - -#ifdef CONFIG_MACH_SANMINA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANMINA -# endif -# define machine_is_sanmina() (machine_arch_type == MACH_TYPE_SANMINA) -#else -# define machine_is_sanmina() (0) -#endif - -#ifdef CONFIG_MACH_MOMENTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOMENTO -# endif -# define machine_is_momento() (machine_arch_type == MACH_TYPE_MOMENTO) -#else -# define machine_is_momento() (0) -#endif - -#ifdef CONFIG_MACH_NUC9XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC9XX -# endif -# define machine_is_nuc9xx() (machine_arch_type == MACH_TYPE_NUC9XX) -#else -# define machine_is_nuc9xx() (0) -#endif - -#ifdef CONFIG_MACH_NUC910EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC910EVB -# endif -# define machine_is_nuc910evb() (machine_arch_type == MACH_TYPE_NUC910EVB) -#else -# define machine_is_nuc910evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC920EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC920EVB -# endif -# define machine_is_nuc920evb() (machine_arch_type == MACH_TYPE_NUC920EVB) -#else -# define machine_is_nuc920evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC950EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC950EVB -# endif -# define machine_is_nuc950evb() (machine_arch_type == MACH_TYPE_NUC950EVB) -#else -# define machine_is_nuc950evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC945EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC945EVB -# endif -# define machine_is_nuc945evb() (machine_arch_type == MACH_TYPE_NUC945EVB) -#else -# define machine_is_nuc945evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC960EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC960EVB -# endif -# define machine_is_nuc960evb() (machine_arch_type == MACH_TYPE_NUC960EVB) -#else -# define machine_is_nuc960evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC932EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC932EVB -# endif -# define machine_is_nuc932evb() (machine_arch_type == MACH_TYPE_NUC932EVB) -#else -# define machine_is_nuc932evb() (0) -#endif - -#ifdef CONFIG_MACH_NUC900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC900 -# endif -# define machine_is_nuc900() (machine_arch_type == MACH_TYPE_NUC900) -#else -# define machine_is_nuc900() (0) -#endif - -#ifdef CONFIG_MACH_SD1SOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SD1SOC -# endif -# define machine_is_sd1soc() (machine_arch_type == MACH_TYPE_SD1SOC) -#else -# define machine_is_sd1soc() (0) -#endif - -#ifdef CONFIG_MACH_LN2440BC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LN2440BC -# endif -# define machine_is_ln2440bc() (machine_arch_type == MACH_TYPE_LN2440BC) -#else -# define machine_is_ln2440bc() (0) -#endif - -#ifdef CONFIG_MACH_RSBC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RSBC -# endif -# define machine_is_rsbc() (machine_arch_type == MACH_TYPE_RSBC) -#else -# define machine_is_rsbc() (0) -#endif - -#ifdef CONFIG_MACH_OPENRD_CLIENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENRD_CLIENT -# endif -# define machine_is_openrd_client() (machine_arch_type == MACH_TYPE_OPENRD_CLIENT) -#else -# define machine_is_openrd_client() (0) -#endif - -#ifdef CONFIG_MACH_HPIPAQ11X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HPIPAQ11X -# endif -# define machine_is_hpipaq11x() (machine_arch_type == MACH_TYPE_HPIPAQ11X) -#else -# define machine_is_hpipaq11x() (0) -#endif - -#ifdef CONFIG_MACH_WAYLAND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WAYLAND -# endif -# define machine_is_wayland() (machine_arch_type == MACH_TYPE_WAYLAND) -#else -# define machine_is_wayland() (0) -#endif - -#ifdef CONFIG_MACH_ACNBSX102 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACNBSX102 -# endif -# define machine_is_acnbsx102() (machine_arch_type == MACH_TYPE_ACNBSX102) -#else -# define machine_is_acnbsx102() (0) -#endif - -#ifdef CONFIG_MACH_HWAT91 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HWAT91 -# endif -# define machine_is_hwat91() (machine_arch_type == MACH_TYPE_HWAT91) -#else -# define machine_is_hwat91() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9263CS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9263CS -# endif -# define machine_is_at91sam9263cs() (machine_arch_type == MACH_TYPE_AT91SAM9263CS) -#else -# define machine_is_at91sam9263cs() (0) -#endif - -#ifdef CONFIG_MACH_CSB732 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB732 -# endif -# define machine_is_csb732() (machine_arch_type == MACH_TYPE_CSB732) -#else -# define machine_is_csb732() (0) -#endif - -#ifdef CONFIG_MACH_U8500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U8500 -# endif -# define machine_is_u8500() (machine_arch_type == MACH_TYPE_U8500) -#else -# define machine_is_u8500() (0) -#endif - -#ifdef CONFIG_MACH_HUQIU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUQIU -# endif -# define machine_is_huqiu() (machine_arch_type == MACH_TYPE_HUQIU) -#else -# define machine_is_huqiu() (0) -#endif - -#ifdef CONFIG_MACH_MX51_EFIKASB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_EFIKASB -# endif -# define machine_is_mx51_efikasb() (machine_arch_type == MACH_TYPE_MX51_EFIKASB) -#else -# define machine_is_mx51_efikasb() (0) -#endif - -#ifdef CONFIG_MACH_PMT1G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PMT1G -# endif -# define machine_is_pmt1g() (machine_arch_type == MACH_TYPE_PMT1G) -#else -# define machine_is_pmt1g() (0) -#endif - -#ifdef CONFIG_MACH_HTCELF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCELF -# endif -# define machine_is_htcelf() (machine_arch_type == MACH_TYPE_HTCELF) -#else -# define machine_is_htcelf() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO420 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO420 -# endif -# define machine_is_armadillo420() (machine_arch_type == MACH_TYPE_ARMADILLO420) -#else -# define machine_is_armadillo420() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO440 -# endif -# define machine_is_armadillo440() (machine_arch_type == MACH_TYPE_ARMADILLO440) -#else -# define machine_is_armadillo440() (0) -#endif - -#ifdef CONFIG_MACH_U_CHIP_DUAL_ARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U_CHIP_DUAL_ARM -# endif -# define machine_is_u_chip_dual_arm() (machine_arch_type == MACH_TYPE_U_CHIP_DUAL_ARM) -#else -# define machine_is_u_chip_dual_arm() (0) -#endif - -#ifdef CONFIG_MACH_CSR_BDB3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSR_BDB3 -# endif -# define machine_is_csr_bdb3() (machine_arch_type == MACH_TYPE_CSR_BDB3) -#else -# define machine_is_csr_bdb3() (0) -#endif - -#ifdef CONFIG_MACH_DOLBY_CAT1018 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOLBY_CAT1018 -# endif -# define machine_is_dolby_cat1018() (machine_arch_type == MACH_TYPE_DOLBY_CAT1018) -#else -# define machine_is_dolby_cat1018() (0) -#endif - -#ifdef CONFIG_MACH_HY9307 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HY9307 -# endif -# define machine_is_hy9307() (machine_arch_type == MACH_TYPE_HY9307) -#else -# define machine_is_hy9307() (0) -#endif - -#ifdef CONFIG_MACH_A_ES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A_ES -# endif -# define machine_is_aspire_easystore() (machine_arch_type == MACH_TYPE_A_ES) -#else -# define machine_is_aspire_easystore() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_IRIF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_IRIF -# endif -# define machine_is_davinci_irif() (machine_arch_type == MACH_TYPE_DAVINCI_IRIF) -#else -# define machine_is_davinci_irif() (0) -#endif - -#ifdef CONFIG_MACH_AGAMA9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AGAMA9263 -# endif -# define machine_is_agama9263() (machine_arch_type == MACH_TYPE_AGAMA9263) -#else -# define machine_is_agama9263() (0) -#endif - -#ifdef CONFIG_MACH_MARVELL_JASPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARVELL_JASPER -# endif -# define machine_is_marvell_jasper() (machine_arch_type == MACH_TYPE_MARVELL_JASPER) -#else -# define machine_is_marvell_jasper() (0) -#endif - -#ifdef CONFIG_MACH_FLINT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLINT -# endif -# define machine_is_flint() (machine_arch_type == MACH_TYPE_FLINT) -#else -# define machine_is_flint() (0) -#endif - -#ifdef CONFIG_MACH_TAVOREVB3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAVOREVB3 -# endif -# define machine_is_tavorevb3() (machine_arch_type == MACH_TYPE_TAVOREVB3) -#else -# define machine_is_tavorevb3() (0) -#endif - -#ifdef CONFIG_MACH_SCH_M490 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCH_M490 -# endif -# define machine_is_sch_m490() (machine_arch_type == MACH_TYPE_SCH_M490) -#else -# define machine_is_sch_m490() (0) -#endif - -#ifdef CONFIG_MACH_RBL01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RBL01 -# endif -# define machine_is_rbl01() (machine_arch_type == MACH_TYPE_RBL01) -#else -# define machine_is_rbl01() (0) -#endif - -#ifdef CONFIG_MACH_OMNIFI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMNIFI -# endif -# define machine_is_omnifi() (machine_arch_type == MACH_TYPE_OMNIFI) -#else -# define machine_is_omnifi() (0) -#endif - -#ifdef CONFIG_MACH_OTAVALO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OTAVALO -# endif -# define machine_is_otavalo() (machine_arch_type == MACH_TYPE_OTAVALO) -#else -# define machine_is_otavalo() (0) -#endif - -#ifdef CONFIG_MACH_SIENNA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIENNA -# endif -# define machine_is_sienna() (machine_arch_type == MACH_TYPE_SIENNA) -#else -# define machine_is_sienna() (0) -#endif - -#ifdef CONFIG_MACH_HTC_EXCALIBUR_S620 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_EXCALIBUR_S620 -# endif -# define machine_is_htc_excalibur_s620() (machine_arch_type == MACH_TYPE_HTC_EXCALIBUR_S620) -#else -# define machine_is_htc_excalibur_s620() (0) -#endif - -#ifdef CONFIG_MACH_HTC_OPAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_OPAL -# endif -# define machine_is_htc_opal() (machine_arch_type == MACH_TYPE_HTC_OPAL) -#else -# define machine_is_htc_opal() (0) -#endif - -#ifdef CONFIG_MACH_TOUCHBOOK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOUCHBOOK -# endif -# define machine_is_touchbook() (machine_arch_type == MACH_TYPE_TOUCHBOOK) -#else -# define machine_is_touchbook() (0) -#endif - -#ifdef CONFIG_MACH_LATTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LATTE -# endif -# define machine_is_latte() (machine_arch_type == MACH_TYPE_LATTE) -#else -# define machine_is_latte() (0) -#endif - -#ifdef CONFIG_MACH_XA200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XA200 -# endif -# define machine_is_xa200() (machine_arch_type == MACH_TYPE_XA200) -#else -# define machine_is_xa200() (0) -#endif - -#ifdef CONFIG_MACH_NIMROD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIMROD -# endif -# define machine_is_nimrod() (machine_arch_type == MACH_TYPE_NIMROD) -#else -# define machine_is_nimrod() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9215_3G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9215_3G -# endif -# define machine_is_cc9p9215_3g() (machine_arch_type == MACH_TYPE_CC9P9215_3G) -#else -# define machine_is_cc9p9215_3g() (0) -#endif - -#ifdef CONFIG_MACH_CC9P9215_3GJS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CC9P9215_3GJS -# endif -# define machine_is_cc9p9215_3gjs() (machine_arch_type == MACH_TYPE_CC9P9215_3GJS) -#else -# define machine_is_cc9p9215_3gjs() (0) -#endif - -#ifdef CONFIG_MACH_TK71 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TK71 -# endif -# define machine_is_tk71() (machine_arch_type == MACH_TYPE_TK71) -#else -# define machine_is_tk71() (0) -#endif - -#ifdef CONFIG_MACH_COMHAM3525 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COMHAM3525 -# endif -# define machine_is_comham3525() (machine_arch_type == MACH_TYPE_COMHAM3525) -#else -# define machine_is_comham3525() (0) -#endif - -#ifdef CONFIG_MACH_MX31EREBUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX31EREBUS -# endif -# define machine_is_mx31erebus() (machine_arch_type == MACH_TYPE_MX31EREBUS) -#else -# define machine_is_mx31erebus() (0) -#endif - -#ifdef CONFIG_MACH_MCARDMX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MCARDMX27 -# endif -# define machine_is_mcardmx27() (machine_arch_type == MACH_TYPE_MCARDMX27) -#else -# define machine_is_mcardmx27() (0) -#endif - -#ifdef CONFIG_MACH_PARADISE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PARADISE -# endif -# define machine_is_paradise() (machine_arch_type == MACH_TYPE_PARADISE) -#else -# define machine_is_paradise() (0) -#endif - -#ifdef CONFIG_MACH_TIDE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIDE -# endif -# define machine_is_tide() (machine_arch_type == MACH_TYPE_TIDE) -#else -# define machine_is_tide() (0) -#endif - -#ifdef CONFIG_MACH_WZL2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WZL2440 -# endif -# define machine_is_wzl2440() (machine_arch_type == MACH_TYPE_WZL2440) -#else -# define machine_is_wzl2440() (0) -#endif - -#ifdef CONFIG_MACH_SDRDEMO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SDRDEMO -# endif -# define machine_is_sdrdemo() (machine_arch_type == MACH_TYPE_SDRDEMO) -#else -# define machine_is_sdrdemo() (0) -#endif - -#ifdef CONFIG_MACH_ETHERCAN2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETHERCAN2 -# endif -# define machine_is_ethercan2() (machine_arch_type == MACH_TYPE_ETHERCAN2) -#else -# define machine_is_ethercan2() (0) -#endif - -#ifdef CONFIG_MACH_ECMIMG20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECMIMG20 -# endif -# define machine_is_ecmimg20() (machine_arch_type == MACH_TYPE_ECMIMG20) -#else -# define machine_is_ecmimg20() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_DRAGON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_DRAGON -# endif -# define machine_is_omap_dragon() (machine_arch_type == MACH_TYPE_OMAP_DRAGON) -#else -# define machine_is_omap_dragon() (0) -#endif - -#ifdef CONFIG_MACH_HALO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HALO -# endif -# define machine_is_halo() (machine_arch_type == MACH_TYPE_HALO) -#else -# define machine_is_halo() (0) -#endif - -#ifdef CONFIG_MACH_HUANGSHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUANGSHAN -# endif -# define machine_is_huangshan() (machine_arch_type == MACH_TYPE_HUANGSHAN) -#else -# define machine_is_huangshan() (0) -#endif - -#ifdef CONFIG_MACH_VL_MA2SC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VL_MA2SC -# endif -# define machine_is_vl_ma2sc() (machine_arch_type == MACH_TYPE_VL_MA2SC) -#else -# define machine_is_vl_ma2sc() (0) -#endif - -#ifdef CONFIG_MACH_RAUMFELD_RC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAUMFELD_RC -# endif -# define machine_is_raumfeld_rc() (machine_arch_type == MACH_TYPE_RAUMFELD_RC) -#else -# define machine_is_raumfeld_rc() (0) -#endif - -#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAUMFELD_CONNECTOR -# endif -# define machine_is_raumfeld_connector() (machine_arch_type == MACH_TYPE_RAUMFELD_CONNECTOR) -#else -# define machine_is_raumfeld_connector() (0) -#endif - -#ifdef CONFIG_MACH_RAUMFELD_SPEAKER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RAUMFELD_SPEAKER -# endif -# define machine_is_raumfeld_speaker() (machine_arch_type == MACH_TYPE_RAUMFELD_SPEAKER) -#else -# define machine_is_raumfeld_speaker() (0) -#endif - -#ifdef CONFIG_MACH_MULTIBUS_MASTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTIBUS_MASTER -# endif -# define machine_is_multibus_master() (machine_arch_type == MACH_TYPE_MULTIBUS_MASTER) -#else -# define machine_is_multibus_master() (0) -#endif - -#ifdef CONFIG_MACH_MULTIBUS_PBK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTIBUS_PBK -# endif -# define machine_is_multibus_pbk() (machine_arch_type == MACH_TYPE_MULTIBUS_PBK) -#else -# define machine_is_multibus_pbk() (0) -#endif - -#ifdef CONFIG_MACH_TNETV107X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNETV107X -# endif -# define machine_is_tnetv107x() (machine_arch_type == MACH_TYPE_TNETV107X) -#else -# define machine_is_tnetv107x() (0) -#endif - -#ifdef CONFIG_MACH_SNAKE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAKE -# endif -# define machine_is_snake() (machine_arch_type == MACH_TYPE_SNAKE) -#else -# define machine_is_snake() (0) -#endif - -#ifdef CONFIG_MACH_CWMX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWMX27 -# endif -# define machine_is_cwmx27() (machine_arch_type == MACH_TYPE_CWMX27) -#else -# define machine_is_cwmx27() (0) -#endif - -#ifdef CONFIG_MACH_SCH_M480 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCH_M480 -# endif -# define machine_is_sch_m480() (machine_arch_type == MACH_TYPE_SCH_M480) -#else -# define machine_is_sch_m480() (0) -#endif - -#ifdef CONFIG_MACH_PLATYPUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PLATYPUS -# endif -# define machine_is_platypus() (machine_arch_type == MACH_TYPE_PLATYPUS) -#else -# define machine_is_platypus() (0) -#endif - -#ifdef CONFIG_MACH_PSS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PSS2 -# endif -# define machine_is_pss2() (machine_arch_type == MACH_TYPE_PSS2) -#else -# define machine_is_pss2() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_APM150 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_APM150 -# endif -# define machine_is_davinci_apm150() (machine_arch_type == MACH_TYPE_DAVINCI_APM150) -#else -# define machine_is_davinci_apm150() (0) -#endif - -#ifdef CONFIG_MACH_STR9100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STR9100 -# endif -# define machine_is_str9100() (machine_arch_type == MACH_TYPE_STR9100) -#else -# define machine_is_str9100() (0) -#endif - -#ifdef CONFIG_MACH_NET5BIG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NET5BIG -# endif -# define machine_is_net5big() (machine_arch_type == MACH_TYPE_NET5BIG) -#else -# define machine_is_net5big() (0) -#endif - -#ifdef CONFIG_MACH_SEABED9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SEABED9263 -# endif -# define machine_is_seabed9263() (machine_arch_type == MACH_TYPE_SEABED9263) -#else -# define machine_is_seabed9263() (0) -#endif - -#ifdef CONFIG_MACH_MX51_M2ID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_M2ID -# endif -# define machine_is_mx51_m2id() (machine_arch_type == MACH_TYPE_MX51_M2ID) -#else -# define machine_is_mx51_m2id() (0) -#endif - -#ifdef CONFIG_MACH_OCTVOCPLUS_EB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OCTVOCPLUS_EB -# endif -# define machine_is_octvocplus_eb() (machine_arch_type == MACH_TYPE_OCTVOCPLUS_EB) -#else -# define machine_is_octvocplus_eb() (0) -#endif - -#ifdef CONFIG_MACH_KLK_FIREFOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KLK_FIREFOX -# endif -# define machine_is_klk_firefox() (machine_arch_type == MACH_TYPE_KLK_FIREFOX) -#else -# define machine_is_klk_firefox() (0) -#endif - -#ifdef CONFIG_MACH_KLK_WIRMA_MODULE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KLK_WIRMA_MODULE -# endif -# define machine_is_klk_wirma_module() (machine_arch_type == MACH_TYPE_KLK_WIRMA_MODULE) -#else -# define machine_is_klk_wirma_module() (0) -#endif - -#ifdef CONFIG_MACH_KLK_WIRMA_MMI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KLK_WIRMA_MMI -# endif -# define machine_is_klk_wirma_mmi() (machine_arch_type == MACH_TYPE_KLK_WIRMA_MMI) -#else -# define machine_is_klk_wirma_mmi() (0) -#endif - -#ifdef CONFIG_MACH_SUPERSONIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUPERSONIC -# endif -# define machine_is_supersonic() (machine_arch_type == MACH_TYPE_SUPERSONIC) -#else -# define machine_is_supersonic() (0) -#endif - -#ifdef CONFIG_MACH_LIBERTY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LIBERTY -# endif -# define machine_is_liberty() (machine_arch_type == MACH_TYPE_LIBERTY) -#else -# define machine_is_liberty() (0) -#endif - -#ifdef CONFIG_MACH_MH355 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MH355 -# endif -# define machine_is_mh355() (machine_arch_type == MACH_TYPE_MH355) -#else -# define machine_is_mh355() (0) -#endif - -#ifdef CONFIG_MACH_PC7802 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC7802 -# endif -# define machine_is_pc7802() (machine_arch_type == MACH_TYPE_PC7802) -#else -# define machine_is_pc7802() (0) -#endif - -#ifdef CONFIG_MACH_GNET_SGC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_SGC -# endif -# define machine_is_gnet_sgc() (machine_arch_type == MACH_TYPE_GNET_SGC) -#else -# define machine_is_gnet_sgc() (0) -#endif - -#ifdef CONFIG_MACH_EINSTEIN15 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EINSTEIN15 -# endif -# define machine_is_einstein15() (machine_arch_type == MACH_TYPE_EINSTEIN15) -#else -# define machine_is_einstein15() (0) -#endif - -#ifdef CONFIG_MACH_CMPD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CMPD -# endif -# define machine_is_cmpd() (machine_arch_type == MACH_TYPE_CMPD) -#else -# define machine_is_cmpd() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_HASE1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_HASE1 -# endif -# define machine_is_davinci_hase1() (machine_arch_type == MACH_TYPE_DAVINCI_HASE1) -#else -# define machine_is_davinci_hase1() (0) -#endif - -#ifdef CONFIG_MACH_LGEINCITEPHONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LGEINCITEPHONE -# endif -# define machine_is_lgeincitephone() (machine_arch_type == MACH_TYPE_LGEINCITEPHONE) -#else -# define machine_is_lgeincitephone() (0) -#endif - -#ifdef CONFIG_MACH_EA313X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EA313X -# endif -# define machine_is_ea313x() (machine_arch_type == MACH_TYPE_EA313X) -#else -# define machine_is_ea313x() (0) -#endif - -#ifdef CONFIG_MACH_FWBD_39064 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FWBD_39064 -# endif -# define machine_is_fwbd_39064() (machine_arch_type == MACH_TYPE_FWBD_39064) -#else -# define machine_is_fwbd_39064() (0) -#endif - -#ifdef CONFIG_MACH_FWBD_390128 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FWBD_390128 -# endif -# define machine_is_fwbd_390128() (machine_arch_type == MACH_TYPE_FWBD_390128) -#else -# define machine_is_fwbd_390128() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_MOE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_MOE -# endif -# define machine_is_pelco_moe() (machine_arch_type == MACH_TYPE_PELCO_MOE) -#else -# define machine_is_pelco_moe() (0) -#endif - -#ifdef CONFIG_MACH_MINIMIX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINIMIX27 -# endif -# define machine_is_minimix27() (machine_arch_type == MACH_TYPE_MINIMIX27) -#else -# define machine_is_minimix27() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_THUNDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_THUNDER -# endif -# define machine_is_omap3_thunder() (machine_arch_type == MACH_TYPE_OMAP3_THUNDER) -#else -# define machine_is_omap3_thunder() (0) -#endif - -#ifdef CONFIG_MACH_PASSIONC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PASSIONC -# endif -# define machine_is_passionc() (machine_arch_type == MACH_TYPE_PASSIONC) -#else -# define machine_is_passionc() (0) -#endif - -#ifdef CONFIG_MACH_MX27AMATA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27AMATA -# endif -# define machine_is_mx27amata() (machine_arch_type == MACH_TYPE_MX27AMATA) -#else -# define machine_is_mx27amata() (0) -#endif - -#ifdef CONFIG_MACH_BGAT1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BGAT1 -# endif -# define machine_is_bgat1() (machine_arch_type == MACH_TYPE_BGAT1) -#else -# define machine_is_bgat1() (0) -#endif - -#ifdef CONFIG_MACH_BUZZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUZZ -# endif -# define machine_is_buzz() (machine_arch_type == MACH_TYPE_BUZZ) -#else -# define machine_is_buzz() (0) -#endif - -#ifdef CONFIG_MACH_MB9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB9G20 -# endif -# define machine_is_mb9g20() (machine_arch_type == MACH_TYPE_MB9G20) -#else -# define machine_is_mb9g20() (0) -#endif - -#ifdef CONFIG_MACH_YUSHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YUSHAN -# endif -# define machine_is_yushan() (machine_arch_type == MACH_TYPE_YUSHAN) -#else -# define machine_is_yushan() (0) -#endif - -#ifdef CONFIG_MACH_LIZARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LIZARD -# endif -# define machine_is_lizard() (machine_arch_type == MACH_TYPE_LIZARD) -#else -# define machine_is_lizard() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3POLYCOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3POLYCOM -# endif -# define machine_is_omap3polycom() (machine_arch_type == MACH_TYPE_OMAP3POLYCOM) -#else -# define machine_is_omap3polycom() (0) -#endif - -#ifdef CONFIG_MACH_SMDKV210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKV210 -# endif -# define machine_is_smdkv210() (machine_arch_type == MACH_TYPE_SMDKV210) -#else -# define machine_is_smdkv210() (0) -#endif - -#ifdef CONFIG_MACH_BRAVO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRAVO -# endif -# define machine_is_bravo() (machine_arch_type == MACH_TYPE_BRAVO) -#else -# define machine_is_bravo() (0) -#endif - -#ifdef CONFIG_MACH_SIOGENTOO1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIOGENTOO1 -# endif -# define machine_is_siogentoo1() (machine_arch_type == MACH_TYPE_SIOGENTOO1) -#else -# define machine_is_siogentoo1() (0) -#endif - -#ifdef CONFIG_MACH_SIOGENTOO2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIOGENTOO2 -# endif -# define machine_is_siogentoo2() (machine_arch_type == MACH_TYPE_SIOGENTOO2) -#else -# define machine_is_siogentoo2() (0) -#endif - -#ifdef CONFIG_MACH_SM3K -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SM3K -# endif -# define machine_is_sm3k() (machine_arch_type == MACH_TYPE_SM3K) -#else -# define machine_is_sm3k() (0) -#endif - -#ifdef CONFIG_MACH_ACER_TEMPO_F900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_TEMPO_F900 -# endif -# define machine_is_acer_tempo_f900() (machine_arch_type == MACH_TYPE_ACER_TEMPO_F900) -#else -# define machine_is_acer_tempo_f900() (0) -#endif - -#ifdef CONFIG_MACH_SST61VC010_DEV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SST61VC010_DEV -# endif -# define machine_is_sst61vc010_dev() (machine_arch_type == MACH_TYPE_SST61VC010_DEV) -#else -# define machine_is_sst61vc010_dev() (0) -#endif - -#ifdef CONFIG_MACH_GLITTERTIND -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GLITTERTIND -# endif -# define machine_is_glittertind() (machine_arch_type == MACH_TYPE_GLITTERTIND) -#else -# define machine_is_glittertind() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_ZOOM3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_ZOOM3 -# endif -# define machine_is_omap_zoom3() (machine_arch_type == MACH_TYPE_OMAP_ZOOM3) -#else -# define machine_is_omap_zoom3() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_3630SDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_3630SDP -# endif -# define machine_is_omap_3630sdp() (machine_arch_type == MACH_TYPE_OMAP_3630SDP) -#else -# define machine_is_omap_3630sdp() (0) -#endif - -#ifdef CONFIG_MACH_CYBOOK2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBOOK2440 -# endif -# define machine_is_cybook2440() (machine_arch_type == MACH_TYPE_CYBOOK2440) -#else -# define machine_is_cybook2440() (0) -#endif - -#ifdef CONFIG_MACH_TORINO_S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TORINO_S -# endif -# define machine_is_torino_s() (machine_arch_type == MACH_TYPE_TORINO_S) -#else -# define machine_is_torino_s() (0) -#endif - -#ifdef CONFIG_MACH_HAVANA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HAVANA -# endif -# define machine_is_havana() (machine_arch_type == MACH_TYPE_HAVANA) -#else -# define machine_is_havana() (0) -#endif - -#ifdef CONFIG_MACH_BEAUMONT_11 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BEAUMONT_11 -# endif -# define machine_is_beaumont_11() (machine_arch_type == MACH_TYPE_BEAUMONT_11) -#else -# define machine_is_beaumont_11() (0) -#endif - -#ifdef CONFIG_MACH_VANGUARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VANGUARD -# endif -# define machine_is_vanguard() (machine_arch_type == MACH_TYPE_VANGUARD) -#else -# define machine_is_vanguard() (0) -#endif - -#ifdef CONFIG_MACH_S5PC110_DRACO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5PC110_DRACO -# endif -# define machine_is_s5pc110_draco() (machine_arch_type == MACH_TYPE_S5PC110_DRACO) -#else -# define machine_is_s5pc110_draco() (0) -#endif - -#ifdef CONFIG_MACH_CARTESIO_TWO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARTESIO_TWO -# endif -# define machine_is_cartesio_two() (machine_arch_type == MACH_TYPE_CARTESIO_TWO) -#else -# define machine_is_cartesio_two() (0) -#endif - -#ifdef CONFIG_MACH_ASTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASTER -# endif -# define machine_is_aster() (machine_arch_type == MACH_TYPE_ASTER) -#else -# define machine_is_aster() (0) -#endif - -#ifdef CONFIG_MACH_VOGUESV210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VOGUESV210 -# endif -# define machine_is_voguesv210() (machine_arch_type == MACH_TYPE_VOGUESV210) -#else -# define machine_is_voguesv210() (0) -#endif - -#ifdef CONFIG_MACH_ACM500X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACM500X -# endif -# define machine_is_acm500x() (machine_arch_type == MACH_TYPE_ACM500X) -#else -# define machine_is_acm500x() (0) -#endif - -#ifdef CONFIG_MACH_KM9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KM9260 -# endif -# define machine_is_km9260() (machine_arch_type == MACH_TYPE_KM9260) -#else -# define machine_is_km9260() (0) -#endif - -#ifdef CONFIG_MACH_NIDEFLEXG1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NIDEFLEXG1 -# endif -# define machine_is_nideflexg1() (machine_arch_type == MACH_TYPE_NIDEFLEXG1) -#else -# define machine_is_nideflexg1() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_PLUG_IO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_PLUG_IO -# endif -# define machine_is_ctera_plug_io() (machine_arch_type == MACH_TYPE_CTERA_PLUG_IO) -#else -# define machine_is_ctera_plug_io() (0) -#endif - -#ifdef CONFIG_MACH_SMARTQ7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTQ7 -# endif -# define machine_is_smartq7() (machine_arch_type == MACH_TYPE_SMARTQ7) -#else -# define machine_is_smartq7() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G10EK2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G10EK2 -# endif -# define machine_is_at91sam9g10ek2() (machine_arch_type == MACH_TYPE_AT91SAM9G10EK2) -#else -# define machine_is_at91sam9g10ek2() (0) -#endif - -#ifdef CONFIG_MACH_ASUSP527 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASUSP527 -# endif -# define machine_is_asusp527() (machine_arch_type == MACH_TYPE_ASUSP527) -#else -# define machine_is_asusp527() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9G20MPM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9G20MPM2 -# endif -# define machine_is_at91sam9g20mpm2() (machine_arch_type == MACH_TYPE_AT91SAM9G20MPM2) -#else -# define machine_is_at91sam9g20mpm2() (0) -#endif - -#ifdef CONFIG_MACH_TOPASA900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOPASA900 -# endif -# define machine_is_topasa900() (machine_arch_type == MACH_TYPE_TOPASA900) -#else -# define machine_is_topasa900() (0) -#endif - -#ifdef CONFIG_MACH_ELECTRUM_100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELECTRUM_100 -# endif -# define machine_is_electrum_100() (machine_arch_type == MACH_TYPE_ELECTRUM_100) -#else -# define machine_is_electrum_100() (0) -#endif - -#ifdef CONFIG_MACH_MX51GRB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51GRB -# endif -# define machine_is_mx51grb() (machine_arch_type == MACH_TYPE_MX51GRB) -#else -# define machine_is_mx51grb() (0) -#endif - -#ifdef CONFIG_MACH_XEA300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XEA300 -# endif -# define machine_is_xea300() (machine_arch_type == MACH_TYPE_XEA300) -#else -# define machine_is_xea300() (0) -#endif - -#ifdef CONFIG_MACH_HTCSTARTREK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCSTARTREK -# endif -# define machine_is_htcstartrek() (machine_arch_type == MACH_TYPE_HTCSTARTREK) -#else -# define machine_is_htcstartrek() (0) -#endif - -#ifdef CONFIG_MACH_LIMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LIMA -# endif -# define machine_is_lima() (machine_arch_type == MACH_TYPE_LIMA) -#else -# define machine_is_lima() (0) -#endif - -#ifdef CONFIG_MACH_CSB740 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSB740 -# endif -# define machine_is_csb740() (machine_arch_type == MACH_TYPE_CSB740) -#else -# define machine_is_csb740() (0) -#endif - -#ifdef CONFIG_MACH_USB_S8815 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USB_S8815 -# endif -# define machine_is_usb_s8815() (machine_arch_type == MACH_TYPE_USB_S8815) -#else -# define machine_is_usb_s8815() (0) -#endif - -#ifdef CONFIG_MACH_WATSON_EFM_PLUGIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WATSON_EFM_PLUGIN -# endif -# define machine_is_watson_efm_plugin() (machine_arch_type == MACH_TYPE_WATSON_EFM_PLUGIN) -#else -# define machine_is_watson_efm_plugin() (0) -#endif - -#ifdef CONFIG_MACH_MILKYWAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MILKYWAY -# endif -# define machine_is_milkyway() (machine_arch_type == MACH_TYPE_MILKYWAY) -#else -# define machine_is_milkyway() (0) -#endif - -#ifdef CONFIG_MACH_G4EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G4EVM -# endif -# define machine_is_g4evm() (machine_arch_type == MACH_TYPE_G4EVM) -#else -# define machine_is_g4evm() (0) -#endif - -#ifdef CONFIG_MACH_PICOMOD6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOMOD6 -# endif -# define machine_is_picomod6() (machine_arch_type == MACH_TYPE_PICOMOD6) -#else -# define machine_is_picomod6() (0) -#endif - -#ifdef CONFIG_MACH_OMAPL138_HAWKBOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAPL138_HAWKBOARD -# endif -# define machine_is_omapl138_hawkboard() (machine_arch_type == MACH_TYPE_OMAPL138_HAWKBOARD) -#else -# define machine_is_omapl138_hawkboard() (0) -#endif - -#ifdef CONFIG_MACH_IP6000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IP6000 -# endif -# define machine_is_ip6000() (machine_arch_type == MACH_TYPE_IP6000) -#else -# define machine_is_ip6000() (0) -#endif - -#ifdef CONFIG_MACH_IP6010 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IP6010 -# endif -# define machine_is_ip6010() (machine_arch_type == MACH_TYPE_IP6010) -#else -# define machine_is_ip6010() (0) -#endif - -#ifdef CONFIG_MACH_UTM400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UTM400 -# endif -# define machine_is_utm400() (machine_arch_type == MACH_TYPE_UTM400) -#else -# define machine_is_utm400() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_ZYBEX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_ZYBEX -# endif -# define machine_is_omap3_zybex() (machine_arch_type == MACH_TYPE_OMAP3_ZYBEX) -#else -# define machine_is_omap3_zybex() (0) -#endif - -#ifdef CONFIG_MACH_WIRELESS_SPACE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WIRELESS_SPACE -# endif -# define machine_is_wireless_space() (machine_arch_type == MACH_TYPE_WIRELESS_SPACE) -#else -# define machine_is_wireless_space() (0) -#endif - -#ifdef CONFIG_MACH_SX560 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SX560 -# endif -# define machine_is_sx560() (machine_arch_type == MACH_TYPE_SX560) -#else -# define machine_is_sx560() (0) -#endif - -#ifdef CONFIG_MACH_TS41X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS41X -# endif -# define machine_is_ts41x() (machine_arch_type == MACH_TYPE_TS41X) -#else -# define machine_is_ts41x() (0) -#endif - -#ifdef CONFIG_MACH_ELPHEL10373 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELPHEL10373 -# endif -# define machine_is_elphel10373() (machine_arch_type == MACH_TYPE_ELPHEL10373) -#else -# define machine_is_elphel10373() (0) -#endif - -#ifdef CONFIG_MACH_RHOBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RHOBOT -# endif -# define machine_is_rhobot() (machine_arch_type == MACH_TYPE_RHOBOT) -#else -# define machine_is_rhobot() (0) -#endif - -#ifdef CONFIG_MACH_MX51_REFRESH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_REFRESH -# endif -# define machine_is_mx51_refresh() (machine_arch_type == MACH_TYPE_MX51_REFRESH) -#else -# define machine_is_mx51_refresh() (0) -#endif - -#ifdef CONFIG_MACH_LS9260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LS9260 -# endif -# define machine_is_ls9260() (machine_arch_type == MACH_TYPE_LS9260) -#else -# define machine_is_ls9260() (0) -#endif - -#ifdef CONFIG_MACH_SHANK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHANK -# endif -# define machine_is_shank() (machine_arch_type == MACH_TYPE_SHANK) -#else -# define machine_is_shank() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50_ST1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50_ST1 -# endif -# define machine_is_qsd8x50_st1() (machine_arch_type == MACH_TYPE_QSD8X50_ST1) -#else -# define machine_is_qsd8x50_st1() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9M10EKES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9M10EKES -# endif -# define machine_is_at91sam9m10ekes() (machine_arch_type == MACH_TYPE_AT91SAM9M10EKES) -#else -# define machine_is_at91sam9m10ekes() (0) -#endif - -#ifdef CONFIG_MACH_HIRAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HIRAM -# endif -# define machine_is_hiram() (machine_arch_type == MACH_TYPE_HIRAM) -#else -# define machine_is_hiram() (0) -#endif - -#ifdef CONFIG_MACH_PHY3250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHY3250 -# endif -# define machine_is_phy3250() (machine_arch_type == MACH_TYPE_PHY3250) -#else -# define machine_is_phy3250() (0) -#endif - -#ifdef CONFIG_MACH_EA3250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EA3250 -# endif -# define machine_is_ea3250() (machine_arch_type == MACH_TYPE_EA3250) -#else -# define machine_is_ea3250() (0) -#endif - -#ifdef CONFIG_MACH_FDI3250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FDI3250 -# endif -# define machine_is_fdi3250() (machine_arch_type == MACH_TYPE_FDI3250) -#else -# define machine_is_fdi3250() (0) -#endif - -#ifdef CONFIG_MACH_WHITESTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WHITESTONE -# endif -# define machine_is_whitestone() (machine_arch_type == MACH_TYPE_WHITESTONE) -#else -# define machine_is_whitestone() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9263NIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9263NIT -# endif -# define machine_is_at91sam9263nit() (machine_arch_type == MACH_TYPE_AT91SAM9263NIT) -#else -# define machine_is_at91sam9263nit() (0) -#endif - -#ifdef CONFIG_MACH_CCMX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCMX51 -# endif -# define machine_is_ccmx51() (machine_arch_type == MACH_TYPE_CCMX51) -#else -# define machine_is_ccmx51() (0) -#endif - -#ifdef CONFIG_MACH_CCMX51JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCMX51JS -# endif -# define machine_is_ccmx51js() (machine_arch_type == MACH_TYPE_CCMX51JS) -#else -# define machine_is_ccmx51js() (0) -#endif - -#ifdef CONFIG_MACH_CCWMX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCWMX51 -# endif -# define machine_is_ccwmx51() (machine_arch_type == MACH_TYPE_CCWMX51) -#else -# define machine_is_ccwmx51() (0) -#endif - -#ifdef CONFIG_MACH_CCWMX51JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCWMX51JS -# endif -# define machine_is_ccwmx51js() (machine_arch_type == MACH_TYPE_CCWMX51JS) -#else -# define machine_is_ccwmx51js() (0) -#endif - -#ifdef CONFIG_MACH_MINI6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINI6410 -# endif -# define machine_is_mini6410() (machine_arch_type == MACH_TYPE_MINI6410) -#else -# define machine_is_mini6410() (0) -#endif - -#ifdef CONFIG_MACH_TINY6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TINY6410 -# endif -# define machine_is_tiny6410() (machine_arch_type == MACH_TYPE_TINY6410) -#else -# define machine_is_tiny6410() (0) -#endif - -#ifdef CONFIG_MACH_NANO6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NANO6410 -# endif -# define machine_is_nano6410() (machine_arch_type == MACH_TYPE_NANO6410) -#else -# define machine_is_nano6410() (0) -#endif - -#ifdef CONFIG_MACH_AT572D940HFNLDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT572D940HFNLDB -# endif -# define machine_is_at572d940hfnldb() (machine_arch_type == MACH_TYPE_AT572D940HFNLDB) -#else -# define machine_is_at572d940hfnldb() (0) -#endif - -#ifdef CONFIG_MACH_HTCLEO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCLEO -# endif -# define machine_is_htcleo() (machine_arch_type == MACH_TYPE_HTCLEO) -#else -# define machine_is_htcleo() (0) -#endif - -#ifdef CONFIG_MACH_AVP13 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AVP13 -# endif -# define machine_is_avp13() (machine_arch_type == MACH_TYPE_AVP13) -#else -# define machine_is_avp13() (0) -#endif - -#ifdef CONFIG_MACH_XXSVIDEOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XXSVIDEOD -# endif -# define machine_is_xxsvideod() (machine_arch_type == MACH_TYPE_XXSVIDEOD) -#else -# define machine_is_xxsvideod() (0) -#endif - -#ifdef CONFIG_MACH_VPNEXT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPNEXT -# endif -# define machine_is_vpnext() (machine_arch_type == MACH_TYPE_VPNEXT) -#else -# define machine_is_vpnext() (0) -#endif - -#ifdef CONFIG_MACH_SWARCO_ITC3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWARCO_ITC3 -# endif -# define machine_is_swarco_itc3() (machine_arch_type == MACH_TYPE_SWARCO_ITC3) -#else -# define machine_is_swarco_itc3() (0) -#endif - -#ifdef CONFIG_MACH_TX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX51 -# endif -# define machine_is_tx51() (machine_arch_type == MACH_TYPE_TX51) -#else -# define machine_is_tx51() (0) -#endif - -#ifdef CONFIG_MACH_DOLBY_CAT1021 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOLBY_CAT1021 -# endif -# define machine_is_dolby_cat1021() (machine_arch_type == MACH_TYPE_DOLBY_CAT1021) -#else -# define machine_is_dolby_cat1021() (0) -#endif - -#ifdef CONFIG_MACH_MX28EVK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX28EVK -# endif -# define machine_is_mx28evk() (machine_arch_type == MACH_TYPE_MX28EVK) -#else -# define machine_is_mx28evk() (0) -#endif - -#ifdef CONFIG_MACH_PHOENIX260 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHOENIX260 -# endif -# define machine_is_phoenix260() (machine_arch_type == MACH_TYPE_PHOENIX260) -#else -# define machine_is_phoenix260() (0) -#endif - -#ifdef CONFIG_MACH_UVACA_STORK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UVACA_STORK -# endif -# define machine_is_uvaca_stork() (machine_arch_type == MACH_TYPE_UVACA_STORK) -#else -# define machine_is_uvaca_stork() (0) -#endif - -#ifdef CONFIG_MACH_SMARTQ5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTQ5 -# endif -# define machine_is_smartq5() (machine_arch_type == MACH_TYPE_SMARTQ5) -#else -# define machine_is_smartq5() (0) -#endif - -#ifdef CONFIG_MACH_ALL3078 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ALL3078 -# endif -# define machine_is_all3078() (machine_arch_type == MACH_TYPE_ALL3078) -#else -# define machine_is_all3078() (0) -#endif - -#ifdef CONFIG_MACH_CTERA_2BAY_DS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTERA_2BAY_DS -# endif -# define machine_is_ctera_2bay_ds() (machine_arch_type == MACH_TYPE_CTERA_2BAY_DS) -#else -# define machine_is_ctera_2bay_ds() (0) -#endif - -#ifdef CONFIG_MACH_SIOGENTOO3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIOGENTOO3 -# endif -# define machine_is_siogentoo3() (machine_arch_type == MACH_TYPE_SIOGENTOO3) -#else -# define machine_is_siogentoo3() (0) -#endif - -#ifdef CONFIG_MACH_EPB5000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPB5000 -# endif -# define machine_is_epb5000() (machine_arch_type == MACH_TYPE_EPB5000) -#else -# define machine_is_epb5000() (0) -#endif - -#ifdef CONFIG_MACH_HY9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HY9263 -# endif -# define machine_is_hy9263() (machine_arch_type == MACH_TYPE_HY9263) -#else -# define machine_is_hy9263() (0) -#endif - -#ifdef CONFIG_MACH_ACER_TEMPO_M900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_TEMPO_M900 -# endif -# define machine_is_acer_tempo_m900() (machine_arch_type == MACH_TYPE_ACER_TEMPO_M900) -#else -# define machine_is_acer_tempo_m900() (0) -#endif - -#ifdef CONFIG_MACH_ACER_TEMPO_DX900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_TEMPO_DX900 -# endif -# define machine_is_acer_tempo_dx650() (machine_arch_type == MACH_TYPE_ACER_TEMPO_DX900) -#else -# define machine_is_acer_tempo_dx650() (0) -#endif - -#ifdef CONFIG_MACH_ACER_TEMPO_X960 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_TEMPO_X960 -# endif -# define machine_is_acer_tempo_x960() (machine_arch_type == MACH_TYPE_ACER_TEMPO_X960) -#else -# define machine_is_acer_tempo_x960() (0) -#endif - -#ifdef CONFIG_MACH_ACER_ETEN_V900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_ETEN_V900 -# endif -# define machine_is_acer_eten_v900() (machine_arch_type == MACH_TYPE_ACER_ETEN_V900) -#else -# define machine_is_acer_eten_v900() (0) -#endif - -#ifdef CONFIG_MACH_ACER_ETEN_X900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_ETEN_X900 -# endif -# define machine_is_acer_eten_x900() (machine_arch_type == MACH_TYPE_ACER_ETEN_X900) -#else -# define machine_is_acer_eten_x900() (0) -#endif - -#ifdef CONFIG_MACH_BONNELL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BONNELL -# endif -# define machine_is_bonnell() (machine_arch_type == MACH_TYPE_BONNELL) -#else -# define machine_is_bonnell() (0) -#endif - -#ifdef CONFIG_MACH_OHT_MX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OHT_MX27 -# endif -# define machine_is_oht_mx27() (machine_arch_type == MACH_TYPE_OHT_MX27) -#else -# define machine_is_oht_mx27() (0) -#endif - -#ifdef CONFIG_MACH_HTCQUARTZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCQUARTZ -# endif -# define machine_is_htcquartz() (machine_arch_type == MACH_TYPE_HTCQUARTZ) -#else -# define machine_is_htcquartz() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM6467TEVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM6467TEVM -# endif -# define machine_is_davinci_dm6467tevm() (machine_arch_type == MACH_TYPE_DAVINCI_DM6467TEVM) -#else -# define machine_is_davinci_dm6467tevm() (0) -#endif - -#ifdef CONFIG_MACH_C3AX03 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C3AX03 -# endif -# define machine_is_c3ax03() (machine_arch_type == MACH_TYPE_C3AX03) -#else -# define machine_is_c3ax03() (0) -#endif - -#ifdef CONFIG_MACH_MXT_TD60 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXT_TD60 -# endif -# define machine_is_mxt_td60() (machine_arch_type == MACH_TYPE_MXT_TD60) -#else -# define machine_is_mxt_td60() (0) -#endif - -#ifdef CONFIG_MACH_ESYX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESYX -# endif -# define machine_is_esyx() (machine_arch_type == MACH_TYPE_ESYX) -#else -# define machine_is_esyx() (0) -#endif - -#ifdef CONFIG_MACH_DOVE_DB2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOVE_DB2 -# endif -# define machine_is_dove_db2() (machine_arch_type == MACH_TYPE_DOVE_DB2) -#else -# define machine_is_dove_db2() (0) -#endif - -#ifdef CONFIG_MACH_BULLDOG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BULLDOG -# endif -# define machine_is_bulldog() (machine_arch_type == MACH_TYPE_BULLDOG) -#else -# define machine_is_bulldog() (0) -#endif - -#ifdef CONFIG_MACH_DERELL_ME2000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DERELL_ME2000 -# endif -# define machine_is_derell_me2000() (machine_arch_type == MACH_TYPE_DERELL_ME2000) -#else -# define machine_is_derell_me2000() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_BASE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_BASE -# endif -# define machine_is_bcmring_base() (machine_arch_type == MACH_TYPE_BCMRING_BASE) -#else -# define machine_is_bcmring_base() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_EVM -# endif -# define machine_is_bcmring_evm() (machine_arch_type == MACH_TYPE_BCMRING_EVM) -#else -# define machine_is_bcmring_evm() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_EVM_JAZZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_EVM_JAZZ -# endif -# define machine_is_bcmring_evm_jazz() (machine_arch_type == MACH_TYPE_BCMRING_EVM_JAZZ) -#else -# define machine_is_bcmring_evm_jazz() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_SP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_SP -# endif -# define machine_is_bcmring_sp() (machine_arch_type == MACH_TYPE_BCMRING_SP) -#else -# define machine_is_bcmring_sp() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_SV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_SV -# endif -# define machine_is_bcmring_sv() (machine_arch_type == MACH_TYPE_BCMRING_SV) -#else -# define machine_is_bcmring_sv() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_SV_JAZZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_SV_JAZZ -# endif -# define machine_is_bcmring_sv_jazz() (machine_arch_type == MACH_TYPE_BCMRING_SV_JAZZ) -#else -# define machine_is_bcmring_sv_jazz() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_TABLET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_TABLET -# endif -# define machine_is_bcmring_tablet() (machine_arch_type == MACH_TYPE_BCMRING_TABLET) -#else -# define machine_is_bcmring_tablet() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_VP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_VP -# endif -# define machine_is_bcmring_vp() (machine_arch_type == MACH_TYPE_BCMRING_VP) -#else -# define machine_is_bcmring_vp() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_EVM_SEIKOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_EVM_SEIKOR -# endif -# define machine_is_bcmring_evm_seikor() (machine_arch_type == MACH_TYPE_BCMRING_EVM_SEIKOR) -#else -# define machine_is_bcmring_evm_seikor() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_SP_WQVGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_SP_WQVGA -# endif -# define machine_is_bcmring_sp_wqvga() (machine_arch_type == MACH_TYPE_BCMRING_SP_WQVGA) -#else -# define machine_is_bcmring_sp_wqvga() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_CUSTOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_CUSTOM -# endif -# define machine_is_bcmring_custom() (machine_arch_type == MACH_TYPE_BCMRING_CUSTOM) -#else -# define machine_is_bcmring_custom() (0) -#endif - -#ifdef CONFIG_MACH_ACER_S200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_S200 -# endif -# define machine_is_acer_s200() (machine_arch_type == MACH_TYPE_ACER_S200) -#else -# define machine_is_acer_s200() (0) -#endif - -#ifdef CONFIG_MACH_BT270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BT270 -# endif -# define machine_is_bt270() (machine_arch_type == MACH_TYPE_BT270) -#else -# define machine_is_bt270() (0) -#endif - -#ifdef CONFIG_MACH_ISEO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ISEO -# endif -# define machine_is_iseo() (machine_arch_type == MACH_TYPE_ISEO) -#else -# define machine_is_iseo() (0) -#endif - -#ifdef CONFIG_MACH_CEZANNE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CEZANNE -# endif -# define machine_is_cezanne() (machine_arch_type == MACH_TYPE_CEZANNE) -#else -# define machine_is_cezanne() (0) -#endif - -#ifdef CONFIG_MACH_LUCCA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUCCA -# endif -# define machine_is_lucca() (machine_arch_type == MACH_TYPE_LUCCA) -#else -# define machine_is_lucca() (0) -#endif - -#ifdef CONFIG_MACH_SUPERSMART -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUPERSMART -# endif -# define machine_is_supersmart() (machine_arch_type == MACH_TYPE_SUPERSMART) -#else -# define machine_is_supersmart() (0) -#endif - -#ifdef CONFIG_MACH_CS_MISANO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CS_MISANO -# endif -# define machine_is_arm11_board() (machine_arch_type == MACH_TYPE_CS_MISANO) -#else -# define machine_is_arm11_board() (0) -#endif - -#ifdef CONFIG_MACH_MAGNOLIA2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAGNOLIA2 -# endif -# define machine_is_magnolia2() (machine_arch_type == MACH_TYPE_MAGNOLIA2) -#else -# define machine_is_magnolia2() (0) -#endif - -#ifdef CONFIG_MACH_EMXX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMXX -# endif -# define machine_is_emxx() (machine_arch_type == MACH_TYPE_EMXX) -#else -# define machine_is_emxx() (0) -#endif - -#ifdef CONFIG_MACH_OUTLAW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OUTLAW -# endif -# define machine_is_outlaw() (machine_arch_type == MACH_TYPE_OUTLAW) -#else -# define machine_is_outlaw() (0) -#endif - -#ifdef CONFIG_MACH_RIOT_BEI2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIOT_BEI2 -# endif -# define machine_is_riot_bei2() (machine_arch_type == MACH_TYPE_RIOT_BEI2) -#else -# define machine_is_riot_bei2() (0) -#endif - -#ifdef CONFIG_MACH_RIOT_VOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIOT_VOX -# endif -# define machine_is_riot_vox() (machine_arch_type == MACH_TYPE_RIOT_VOX) -#else -# define machine_is_riot_vox() (0) -#endif - -#ifdef CONFIG_MACH_RIOT_X37 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIOT_X37 -# endif -# define machine_is_riot_x37() (machine_arch_type == MACH_TYPE_RIOT_X37) -#else -# define machine_is_riot_x37() (0) -#endif - -#ifdef CONFIG_MACH_MEGA25MX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MEGA25MX -# endif -# define machine_is_mega25mx() (machine_arch_type == MACH_TYPE_MEGA25MX) -#else -# define machine_is_mega25mx() (0) -#endif - -#ifdef CONFIG_MACH_BENZINA2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BENZINA2 -# endif -# define machine_is_benzina2() (machine_arch_type == MACH_TYPE_BENZINA2) -#else -# define machine_is_benzina2() (0) -#endif - -#ifdef CONFIG_MACH_IGNITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGNITE -# endif -# define machine_is_ignite() (machine_arch_type == MACH_TYPE_IGNITE) -#else -# define machine_is_ignite() (0) -#endif - -#ifdef CONFIG_MACH_FOGGIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FOGGIA -# endif -# define machine_is_foggia() (machine_arch_type == MACH_TYPE_FOGGIA) -#else -# define machine_is_foggia() (0) -#endif - -#ifdef CONFIG_MACH_AREZZO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AREZZO -# endif -# define machine_is_arezzo() (machine_arch_type == MACH_TYPE_AREZZO) -#else -# define machine_is_arezzo() (0) -#endif - -#ifdef CONFIG_MACH_LEICA_SKYWALKER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEICA_SKYWALKER -# endif -# define machine_is_leica_skywalker() (machine_arch_type == MACH_TYPE_LEICA_SKYWALKER) -#else -# define machine_is_leica_skywalker() (0) -#endif - -#ifdef CONFIG_MACH_JACINTO2_JAMR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JACINTO2_JAMR -# endif -# define machine_is_jacinto2_jamr() (machine_arch_type == MACH_TYPE_JACINTO2_JAMR) -#else -# define machine_is_jacinto2_jamr() (0) -#endif - -#ifdef CONFIG_MACH_GTS_NOVA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GTS_NOVA -# endif -# define machine_is_gts_nova() (machine_arch_type == MACH_TYPE_GTS_NOVA) -#else -# define machine_is_gts_nova() (0) -#endif - -#ifdef CONFIG_MACH_P3600 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P3600 -# endif -# define machine_is_p3600() (machine_arch_type == MACH_TYPE_P3600) -#else -# define machine_is_p3600() (0) -#endif - -#ifdef CONFIG_MACH_DLT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DLT2 -# endif -# define machine_is_dlt2() (machine_arch_type == MACH_TYPE_DLT2) -#else -# define machine_is_dlt2() (0) -#endif - -#ifdef CONFIG_MACH_DF3120 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DF3120 -# endif -# define machine_is_df3120() (machine_arch_type == MACH_TYPE_DF3120) -#else -# define machine_is_df3120() (0) -#endif - -#ifdef CONFIG_MACH_ECUCORE_9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECUCORE_9G20 -# endif -# define machine_is_ecucore_9g20() (machine_arch_type == MACH_TYPE_ECUCORE_9G20) -#else -# define machine_is_ecucore_9g20() (0) -#endif - -#ifdef CONFIG_MACH_NAUTEL_LPC3240 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAUTEL_LPC3240 -# endif -# define machine_is_nautel_lpc3240() (machine_arch_type == MACH_TYPE_NAUTEL_LPC3240) -#else -# define machine_is_nautel_lpc3240() (0) -#endif - -#ifdef CONFIG_MACH_GLACIER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GLACIER -# endif -# define machine_is_glacier() (machine_arch_type == MACH_TYPE_GLACIER) -#else -# define machine_is_glacier() (0) -#endif - -#ifdef CONFIG_MACH_PHRAZER_BULLDOG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHRAZER_BULLDOG -# endif -# define machine_is_phrazer_bulldog() (machine_arch_type == MACH_TYPE_PHRAZER_BULLDOG) -#else -# define machine_is_phrazer_bulldog() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_BULLDOG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_BULLDOG -# endif -# define machine_is_omap3_bulldog() (machine_arch_type == MACH_TYPE_OMAP3_BULLDOG) -#else -# define machine_is_omap3_bulldog() (0) -#endif - -#ifdef CONFIG_MACH_PCA101 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCA101 -# endif -# define machine_is_pca101() (machine_arch_type == MACH_TYPE_PCA101) -#else -# define machine_is_pca101() (0) -#endif - -#ifdef CONFIG_MACH_BUZZC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUZZC -# endif -# define machine_is_buzzc() (machine_arch_type == MACH_TYPE_BUZZC) -#else -# define machine_is_buzzc() (0) -#endif - -#ifdef CONFIG_MACH_SASIE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SASIE2 -# endif -# define machine_is_sasie2() (machine_arch_type == MACH_TYPE_SASIE2) -#else -# define machine_is_sasie2() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_CIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_CIO -# endif -# define machine_is_davinci_cio() (machine_arch_type == MACH_TYPE_DAVINCI_CIO) -#else -# define machine_is_davinci_cio() (0) -#endif - -#ifdef CONFIG_MACH_SMARTMETER_DL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTMETER_DL -# endif -# define machine_is_smartmeter_dl() (machine_arch_type == MACH_TYPE_SMARTMETER_DL) -#else -# define machine_is_smartmeter_dl() (0) -#endif - -#ifdef CONFIG_MACH_WZL6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WZL6410 -# endif -# define machine_is_wzl6410() (machine_arch_type == MACH_TYPE_WZL6410) -#else -# define machine_is_wzl6410() (0) -#endif - -#ifdef CONFIG_MACH_WZL6410M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WZL6410M -# endif -# define machine_is_wzl6410m() (machine_arch_type == MACH_TYPE_WZL6410M) -#else -# define machine_is_wzl6410m() (0) -#endif - -#ifdef CONFIG_MACH_WZL6410F -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WZL6410F -# endif -# define machine_is_wzl6410f() (machine_arch_type == MACH_TYPE_WZL6410F) -#else -# define machine_is_wzl6410f() (0) -#endif - -#ifdef CONFIG_MACH_WZL6410I -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WZL6410I -# endif -# define machine_is_wzl6410i() (machine_arch_type == MACH_TYPE_WZL6410I) -#else -# define machine_is_wzl6410i() (0) -#endif - -#ifdef CONFIG_MACH_SPACECOM1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPACECOM1 -# endif -# define machine_is_spacecom1() (machine_arch_type == MACH_TYPE_SPACECOM1) -#else -# define machine_is_spacecom1() (0) -#endif - -#ifdef CONFIG_MACH_PINGU920 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PINGU920 -# endif -# define machine_is_pingu920() (machine_arch_type == MACH_TYPE_PINGU920) -#else -# define machine_is_pingu920() (0) -#endif - -#ifdef CONFIG_MACH_BRAVOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BRAVOC -# endif -# define machine_is_bravoc() (machine_arch_type == MACH_TYPE_BRAVOC) -#else -# define machine_is_bravoc() (0) -#endif - -#ifdef CONFIG_MACH_CYBO2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBO2440 -# endif -# define machine_is_cybo2440() (machine_arch_type == MACH_TYPE_CYBO2440) -#else -# define machine_is_cybo2440() (0) -#endif - -#ifdef CONFIG_MACH_VDSSW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VDSSW -# endif -# define machine_is_vdssw() (machine_arch_type == MACH_TYPE_VDSSW) -#else -# define machine_is_vdssw() (0) -#endif - -#ifdef CONFIG_MACH_ROMULUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROMULUS -# endif -# define machine_is_romulus() (machine_arch_type == MACH_TYPE_ROMULUS) -#else -# define machine_is_romulus() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_MAGIC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_MAGIC -# endif -# define machine_is_omap_magic() (machine_arch_type == MACH_TYPE_OMAP_MAGIC) -#else -# define machine_is_omap_magic() (0) -#endif - -#ifdef CONFIG_MACH_ELTD100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELTD100 -# endif -# define machine_is_eltd100() (machine_arch_type == MACH_TYPE_ELTD100) -#else -# define machine_is_eltd100() (0) -#endif - -#ifdef CONFIG_MACH_CAPC7117 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAPC7117 -# endif -# define machine_is_capc7117() (machine_arch_type == MACH_TYPE_CAPC7117) -#else -# define machine_is_capc7117() (0) -#endif - -#ifdef CONFIG_MACH_SWAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWAN -# endif -# define machine_is_swan() (machine_arch_type == MACH_TYPE_SWAN) -#else -# define machine_is_swan() (0) -#endif - -#ifdef CONFIG_MACH_VEU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VEU -# endif -# define machine_is_veu() (machine_arch_type == MACH_TYPE_VEU) -#else -# define machine_is_veu() (0) -#endif - -#ifdef CONFIG_MACH_RM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RM2 -# endif -# define machine_is_rm2() (machine_arch_type == MACH_TYPE_RM2) -#else -# define machine_is_rm2() (0) -#endif - -#ifdef CONFIG_MACH_TT2100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TT2100 -# endif -# define machine_is_tt2100() (machine_arch_type == MACH_TYPE_TT2100) -#else -# define machine_is_tt2100() (0) -#endif - -#ifdef CONFIG_MACH_VENICE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VENICE -# endif -# define machine_is_venice() (machine_arch_type == MACH_TYPE_VENICE) -#else -# define machine_is_venice() (0) -#endif - -#ifdef CONFIG_MACH_PC7323 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC7323 -# endif -# define machine_is_pc7323() (machine_arch_type == MACH_TYPE_PC7323) -#else -# define machine_is_pc7323() (0) -#endif - -#ifdef CONFIG_MACH_MASP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MASP -# endif -# define machine_is_masp() (machine_arch_type == MACH_TYPE_MASP) -#else -# define machine_is_masp() (0) -#endif - -#ifdef CONFIG_MACH_FUJITSU_TVSTBSOC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUJITSU_TVSTBSOC -# endif -# define machine_is_fujitsu_tvstbsoc0() (machine_arch_type == MACH_TYPE_FUJITSU_TVSTBSOC) -#else -# define machine_is_fujitsu_tvstbsoc0() (0) -#endif - -#ifdef CONFIG_MACH_FUJITSU_TVSTBSOC1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUJITSU_TVSTBSOC1 -# endif -# define machine_is_fujitsu_tvstbsoc1() (machine_arch_type == MACH_TYPE_FUJITSU_TVSTBSOC1) -#else -# define machine_is_fujitsu_tvstbsoc1() (0) -#endif - -#ifdef CONFIG_MACH_LEXIKON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEXIKON -# endif -# define machine_is_lexikon() (machine_arch_type == MACH_TYPE_LEXIKON) -#else -# define machine_is_lexikon() (0) -#endif - -#ifdef CONFIG_MACH_MINI2440V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MINI2440V2 -# endif -# define machine_is_mini2440v2() (machine_arch_type == MACH_TYPE_MINI2440V2) -#else -# define machine_is_mini2440v2() (0) -#endif - -#ifdef CONFIG_MACH_ICONTROL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICONTROL -# endif -# define machine_is_icontrol() (machine_arch_type == MACH_TYPE_ICONTROL) -#else -# define machine_is_icontrol() (0) -#endif - -#ifdef CONFIG_MACH_SHEEVAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHEEVAD -# endif -# define machine_is_gplugd() (machine_arch_type == MACH_TYPE_SHEEVAD) -#else -# define machine_is_gplugd() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50A_ST1_1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50A_ST1_1 -# endif -# define machine_is_qsd8x50a_st1_1() (machine_arch_type == MACH_TYPE_QSD8X50A_ST1_1) -#else -# define machine_is_qsd8x50a_st1_1() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50A_ST1_5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50A_ST1_5 -# endif -# define machine_is_qsd8x50a_st1_5() (machine_arch_type == MACH_TYPE_QSD8X50A_ST1_5) -#else -# define machine_is_qsd8x50a_st1_5() (0) -#endif - -#ifdef CONFIG_MACH_BEE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BEE -# endif -# define machine_is_bee() (machine_arch_type == MACH_TYPE_BEE) -#else -# define machine_is_bee() (0) -#endif - -#ifdef CONFIG_MACH_MX23EVK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX23EVK -# endif -# define machine_is_mx23evk() (machine_arch_type == MACH_TYPE_MX23EVK) -#else -# define machine_is_mx23evk() (0) -#endif - -#ifdef CONFIG_MACH_AP4EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AP4EVB -# endif -# define machine_is_ap4evb() (machine_arch_type == MACH_TYPE_AP4EVB) -#else -# define machine_is_ap4evb() (0) -#endif - -#ifdef CONFIG_MACH_STOCKHOLM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STOCKHOLM -# endif -# define machine_is_stockholm() (machine_arch_type == MACH_TYPE_STOCKHOLM) -#else -# define machine_is_stockholm() (0) -#endif - -#ifdef CONFIG_MACH_LPC_H3131 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC_H3131 -# endif -# define machine_is_lpc_h3131() (machine_arch_type == MACH_TYPE_LPC_H3131) -#else -# define machine_is_lpc_h3131() (0) -#endif - -#ifdef CONFIG_MACH_STINGRAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STINGRAY -# endif -# define machine_is_stingray() (machine_arch_type == MACH_TYPE_STINGRAY) -#else -# define machine_is_stingray() (0) -#endif - -#ifdef CONFIG_MACH_KRAKEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KRAKEN -# endif -# define machine_is_kraken() (machine_arch_type == MACH_TYPE_KRAKEN) -#else -# define machine_is_kraken() (0) -#endif - -#ifdef CONFIG_MACH_GW2388 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GW2388 -# endif -# define machine_is_gw2388() (machine_arch_type == MACH_TYPE_GW2388) -#else -# define machine_is_gw2388() (0) -#endif - -#ifdef CONFIG_MACH_JADECPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JADECPU -# endif -# define machine_is_jadecpu() (machine_arch_type == MACH_TYPE_JADECPU) -#else -# define machine_is_jadecpu() (0) -#endif - -#ifdef CONFIG_MACH_CARLISLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CARLISLE -# endif -# define machine_is_carlisle() (machine_arch_type == MACH_TYPE_CARLISLE) -#else -# define machine_is_carlisle() (0) -#endif - -#ifdef CONFIG_MACH_LUX_SF9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUX_SF9 -# endif -# define machine_is_lux_sf9() (machine_arch_type == MACH_TYPE_LUX_SF9) -#else -# define machine_is_lux_sf9() (0) -#endif - -#ifdef CONFIG_MACH_NEMID_TB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEMID_TB -# endif -# define machine_is_nemid_tb() (machine_arch_type == MACH_TYPE_NEMID_TB) -#else -# define machine_is_nemid_tb() (0) -#endif - -#ifdef CONFIG_MACH_TERRIER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TERRIER -# endif -# define machine_is_terrier() (machine_arch_type == MACH_TYPE_TERRIER) -#else -# define machine_is_terrier() (0) -#endif - -#ifdef CONFIG_MACH_TURBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TURBOT -# endif -# define machine_is_turbot() (machine_arch_type == MACH_TYPE_TURBOT) -#else -# define machine_is_turbot() (0) -#endif - -#ifdef CONFIG_MACH_SANDDAB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANDDAB -# endif -# define machine_is_sanddab() (machine_arch_type == MACH_TYPE_SANDDAB) -#else -# define machine_is_sanddab() (0) -#endif - -#ifdef CONFIG_MACH_MX35_CICADA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX35_CICADA -# endif -# define machine_is_mx35_cicada() (machine_arch_type == MACH_TYPE_MX35_CICADA) -#else -# define machine_is_mx35_cicada() (0) -#endif - -#ifdef CONFIG_MACH_GHI2703D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GHI2703D -# endif -# define machine_is_ghi2703d() (machine_arch_type == MACH_TYPE_GHI2703D) -#else -# define machine_is_ghi2703d() (0) -#endif - -#ifdef CONFIG_MACH_LUX_SFX9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUX_SFX9 -# endif -# define machine_is_lux_sfx9() (machine_arch_type == MACH_TYPE_LUX_SFX9) -#else -# define machine_is_lux_sfx9() (0) -#endif - -#ifdef CONFIG_MACH_LUX_SF9G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUX_SF9G -# endif -# define machine_is_lux_sf9g() (machine_arch_type == MACH_TYPE_LUX_SF9G) -#else -# define machine_is_lux_sf9g() (0) -#endif - -#ifdef CONFIG_MACH_LUX_EDK9 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LUX_EDK9 -# endif -# define machine_is_lux_edk9() (machine_arch_type == MACH_TYPE_LUX_EDK9) -#else -# define machine_is_lux_edk9() (0) -#endif - -#ifdef CONFIG_MACH_HW90240 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW90240 -# endif -# define machine_is_hw90240() (machine_arch_type == MACH_TYPE_HW90240) -#else -# define machine_is_hw90240() (0) -#endif - -#ifdef CONFIG_MACH_DM365_LEOPARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM365_LEOPARD -# endif -# define machine_is_dm365_leopard() (machine_arch_type == MACH_TYPE_DM365_LEOPARD) -#else -# define machine_is_dm365_leopard() (0) -#endif - -#ifdef CONFIG_MACH_MITYOMAPL138 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MITYOMAPL138 -# endif -# define machine_is_mityomapl138() (machine_arch_type == MACH_TYPE_MITYOMAPL138) -#else -# define machine_is_mityomapl138() (0) -#endif - -#ifdef CONFIG_MACH_SCAT110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCAT110 -# endif -# define machine_is_scat110() (machine_arch_type == MACH_TYPE_SCAT110) -#else -# define machine_is_scat110() (0) -#endif - -#ifdef CONFIG_MACH_ACER_A1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_A1 -# endif -# define machine_is_acer_a1() (machine_arch_type == MACH_TYPE_ACER_A1) -#else -# define machine_is_acer_a1() (0) -#endif - -#ifdef CONFIG_MACH_CMCONTROL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CMCONTROL -# endif -# define machine_is_cmcontrol() (machine_arch_type == MACH_TYPE_CMCONTROL) -#else -# define machine_is_cmcontrol() (0) -#endif - -#ifdef CONFIG_MACH_PELCO_LAMAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PELCO_LAMAR -# endif -# define machine_is_pelco_lamar() (machine_arch_type == MACH_TYPE_PELCO_LAMAR) -#else -# define machine_is_pelco_lamar() (0) -#endif - -#ifdef CONFIG_MACH_RFP43 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RFP43 -# endif -# define machine_is_rfp43() (machine_arch_type == MACH_TYPE_RFP43) -#else -# define machine_is_rfp43() (0) -#endif - -#ifdef CONFIG_MACH_SK86R0301 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SK86R0301 -# endif -# define machine_is_sk86r0301() (machine_arch_type == MACH_TYPE_SK86R0301) -#else -# define machine_is_sk86r0301() (0) -#endif - -#ifdef CONFIG_MACH_CTPXA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CTPXA -# endif -# define machine_is_ctpxa() (machine_arch_type == MACH_TYPE_CTPXA) -#else -# define machine_is_ctpxa() (0) -#endif - -#ifdef CONFIG_MACH_EPB_ARM9_A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPB_ARM9_A -# endif -# define machine_is_epb_arm9_a() (machine_arch_type == MACH_TYPE_EPB_ARM9_A) -#else -# define machine_is_epb_arm9_a() (0) -#endif - -#ifdef CONFIG_MACH_GURUPLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GURUPLUG -# endif -# define machine_is_guruplug() (machine_arch_type == MACH_TYPE_GURUPLUG) -#else -# define machine_is_guruplug() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR310 -# endif -# define machine_is_spear310() (machine_arch_type == MACH_TYPE_SPEAR310) -#else -# define machine_is_spear310() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR320 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR320 -# endif -# define machine_is_spear320() (machine_arch_type == MACH_TYPE_SPEAR320) -#else -# define machine_is_spear320() (0) -#endif - -#ifdef CONFIG_MACH_ROBOTX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROBOTX -# endif -# define machine_is_robotx() (machine_arch_type == MACH_TYPE_ROBOTX) -#else -# define machine_is_robotx() (0) -#endif - -#ifdef CONFIG_MACH_LSXHL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LSXHL -# endif -# define machine_is_lsxhl() (machine_arch_type == MACH_TYPE_LSXHL) -#else -# define machine_is_lsxhl() (0) -#endif - -#ifdef CONFIG_MACH_SMARTLITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTLITE -# endif -# define machine_is_smartlite() (machine_arch_type == MACH_TYPE_SMARTLITE) -#else -# define machine_is_smartlite() (0) -#endif - -#ifdef CONFIG_MACH_CWS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWS2 -# endif -# define machine_is_cws2() (machine_arch_type == MACH_TYPE_CWS2) -#else -# define machine_is_cws2() (0) -#endif - -#ifdef CONFIG_MACH_M619 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M619 -# endif -# define machine_is_m619() (machine_arch_type == MACH_TYPE_M619) -#else -# define machine_is_m619() (0) -#endif - -#ifdef CONFIG_MACH_SMARTVIEW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTVIEW -# endif -# define machine_is_smartview() (machine_arch_type == MACH_TYPE_SMARTVIEW) -#else -# define machine_is_smartview() (0) -#endif - -#ifdef CONFIG_MACH_LSA_SALSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LSA_SALSA -# endif -# define machine_is_lsa_salsa() (machine_arch_type == MACH_TYPE_LSA_SALSA) -#else -# define machine_is_lsa_salsa() (0) -#endif - -#ifdef CONFIG_MACH_KIZBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KIZBOX -# endif -# define machine_is_kizbox() (machine_arch_type == MACH_TYPE_KIZBOX) -#else -# define machine_is_kizbox() (0) -#endif - -#ifdef CONFIG_MACH_HTCCHARMER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCCHARMER -# endif -# define machine_is_htccharmer() (machine_arch_type == MACH_TYPE_HTCCHARMER) -#else -# define machine_is_htccharmer() (0) -#endif - -#ifdef CONFIG_MACH_GUF_NESO_LT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUF_NESO_LT -# endif -# define machine_is_guf_neso_lt() (machine_arch_type == MACH_TYPE_GUF_NESO_LT) -#else -# define machine_is_guf_neso_lt() (0) -#endif - -#ifdef CONFIG_MACH_PM9G45 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PM9G45 -# endif -# define machine_is_pm9g45() (machine_arch_type == MACH_TYPE_PM9G45) -#else -# define machine_is_pm9g45() (0) -#endif - -#ifdef CONFIG_MACH_HTCPANTHER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCPANTHER -# endif -# define machine_is_htcpanther() (machine_arch_type == MACH_TYPE_HTCPANTHER) -#else -# define machine_is_htcpanther() (0) -#endif - -#ifdef CONFIG_MACH_HTCPANTHER_CDMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCPANTHER_CDMA -# endif -# define machine_is_htcpanther_cdma() (machine_arch_type == MACH_TYPE_HTCPANTHER_CDMA) -#else -# define machine_is_htcpanther_cdma() (0) -#endif - -#ifdef CONFIG_MACH_REB01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REB01 -# endif -# define machine_is_reb01() (machine_arch_type == MACH_TYPE_REB01) -#else -# define machine_is_reb01() (0) -#endif - -#ifdef CONFIG_MACH_AQUILA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AQUILA -# endif -# define machine_is_aquila() (machine_arch_type == MACH_TYPE_AQUILA) -#else -# define machine_is_aquila() (0) -#endif - -#ifdef CONFIG_MACH_SPARK_SLS_HW2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPARK_SLS_HW2 -# endif -# define machine_is_spark_sls_hw2() (machine_arch_type == MACH_TYPE_SPARK_SLS_HW2) -#else -# define machine_is_spark_sls_hw2() (0) -#endif - -#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESATA_SHEEVAPLUG -# endif -# define machine_is_sheeva_esata() (machine_arch_type == MACH_TYPE_ESATA_SHEEVAPLUG) -#else -# define machine_is_sheeva_esata() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X30_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X30_SURF -# endif -# define machine_is_msm7x30_surf() (machine_arch_type == MACH_TYPE_MSM7X30_SURF) -#else -# define machine_is_msm7x30_surf() (0) -#endif - -#ifdef CONFIG_MACH_MICRO2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICRO2440 -# endif -# define machine_is_micro2440() (machine_arch_type == MACH_TYPE_MICRO2440) -#else -# define machine_is_micro2440() (0) -#endif - -#ifdef CONFIG_MACH_AM2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AM2440 -# endif -# define machine_is_am2440() (machine_arch_type == MACH_TYPE_AM2440) -#else -# define machine_is_am2440() (0) -#endif - -#ifdef CONFIG_MACH_TQ2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TQ2440 -# endif -# define machine_is_tq2440() (machine_arch_type == MACH_TYPE_TQ2440) -#else -# define machine_is_tq2440() (0) -#endif - -#ifdef CONFIG_MACH_LPC2478OEM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC2478OEM -# endif -# define machine_is_lpc2478oem() (machine_arch_type == MACH_TYPE_LPC2478OEM) -#else -# define machine_is_lpc2478oem() (0) -#endif - -#ifdef CONFIG_MACH_AK880X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AK880X -# endif -# define machine_is_ak880x() (machine_arch_type == MACH_TYPE_AK880X) -#else -# define machine_is_ak880x() (0) -#endif - -#ifdef CONFIG_MACH_COBRA3530 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COBRA3530 -# endif -# define machine_is_cobra3530() (machine_arch_type == MACH_TYPE_COBRA3530) -#else -# define machine_is_cobra3530() (0) -#endif - -#ifdef CONFIG_MACH_PMPPB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PMPPB -# endif -# define machine_is_pmppb() (machine_arch_type == MACH_TYPE_PMPPB) -#else -# define machine_is_pmppb() (0) -#endif - -#ifdef CONFIG_MACH_U6715 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U6715 -# endif -# define machine_is_u6715() (machine_arch_type == MACH_TYPE_U6715) -#else -# define machine_is_u6715() (0) -#endif - -#ifdef CONFIG_MACH_AXAR1500_SENDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXAR1500_SENDER -# endif -# define machine_is_axar1500_sender() (machine_arch_type == MACH_TYPE_AXAR1500_SENDER) -#else -# define machine_is_axar1500_sender() (0) -#endif - -#ifdef CONFIG_MACH_G30_DVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G30_DVB -# endif -# define machine_is_g30_dvb() (machine_arch_type == MACH_TYPE_G30_DVB) -#else -# define machine_is_g30_dvb() (0) -#endif - -#ifdef CONFIG_MACH_VC088X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VC088X -# endif -# define machine_is_vc088x() (machine_arch_type == MACH_TYPE_VC088X) -#else -# define machine_is_vc088x() (0) -#endif - -#ifdef CONFIG_MACH_MIOA702 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIOA702 -# endif -# define machine_is_mioa702() (machine_arch_type == MACH_TYPE_MIOA702) -#else -# define machine_is_mioa702() (0) -#endif - -#ifdef CONFIG_MACH_HPMIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HPMIN -# endif -# define machine_is_hpmin() (machine_arch_type == MACH_TYPE_HPMIN) -#else -# define machine_is_hpmin() (0) -#endif - -#ifdef CONFIG_MACH_AK880XAK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AK880XAK -# endif -# define machine_is_ak880xak() (machine_arch_type == MACH_TYPE_AK880XAK) -#else -# define machine_is_ak880xak() (0) -#endif - -#ifdef CONFIG_MACH_ARM926TOMAP850 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARM926TOMAP850 -# endif -# define machine_is_arm926tomap850() (machine_arch_type == MACH_TYPE_ARM926TOMAP850) -#else -# define machine_is_arm926tomap850() (0) -#endif - -#ifdef CONFIG_MACH_LKEVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LKEVM -# endif -# define machine_is_lkevm() (machine_arch_type == MACH_TYPE_LKEVM) -#else -# define machine_is_lkevm() (0) -#endif - -#ifdef CONFIG_MACH_MW6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MW6410 -# endif -# define machine_is_mw6410() (machine_arch_type == MACH_TYPE_MW6410) -#else -# define machine_is_mw6410() (0) -#endif - -#ifdef CONFIG_MACH_TERASTATION_WXL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TERASTATION_WXL -# endif -# define machine_is_terastation_wxl() (machine_arch_type == MACH_TYPE_TERASTATION_WXL) -#else -# define machine_is_terastation_wxl() (0) -#endif - -#ifdef CONFIG_MACH_CPU8000E -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CPU8000E -# endif -# define machine_is_cpu8000e() (machine_arch_type == MACH_TYPE_CPU8000E) -#else -# define machine_is_cpu8000e() (0) -#endif - -#ifdef CONFIG_MACH_CATANIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CATANIA -# endif -# define machine_is_catania() (machine_arch_type == MACH_TYPE_CATANIA) -#else -# define machine_is_catania() (0) -#endif - -#ifdef CONFIG_MACH_TOKYO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOKYO -# endif -# define machine_is_tokyo() (machine_arch_type == MACH_TYPE_TOKYO) -#else -# define machine_is_tokyo() (0) -#endif - -#ifdef CONFIG_MACH_MSM7201A_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7201A_SURF -# endif -# define machine_is_msm7201a_surf() (machine_arch_type == MACH_TYPE_MSM7201A_SURF) -#else -# define machine_is_msm7201a_surf() (0) -#endif - -#ifdef CONFIG_MACH_MSM7201A_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7201A_FFA -# endif -# define machine_is_msm7201a_ffa() (machine_arch_type == MACH_TYPE_MSM7201A_FFA) -#else -# define machine_is_msm7201a_ffa() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X25_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X25_SURF -# endif -# define machine_is_msm7x25_surf() (machine_arch_type == MACH_TYPE_MSM7X25_SURF) -#else -# define machine_is_msm7x25_surf() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X25_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X25_FFA -# endif -# define machine_is_msm7x25_ffa() (machine_arch_type == MACH_TYPE_MSM7X25_FFA) -#else -# define machine_is_msm7x25_ffa() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X27_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X27_SURF -# endif -# define machine_is_msm7x27_surf() (machine_arch_type == MACH_TYPE_MSM7X27_SURF) -#else -# define machine_is_msm7x27_surf() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X27_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X27_FFA -# endif -# define machine_is_msm7x27_ffa() (machine_arch_type == MACH_TYPE_MSM7X27_FFA) -#else -# define machine_is_msm7x27_ffa() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X30_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X30_FFA -# endif -# define machine_is_msm7x30_ffa() (machine_arch_type == MACH_TYPE_MSM7X30_FFA) -#else -# define machine_is_msm7x30_ffa() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50_SURF -# endif -# define machine_is_qsd8x50_surf() (machine_arch_type == MACH_TYPE_QSD8X50_SURF) -#else -# define machine_is_qsd8x50_surf() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50_COMET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50_COMET -# endif -# define machine_is_qsd8x50_comet() (machine_arch_type == MACH_TYPE_QSD8X50_COMET) -#else -# define machine_is_qsd8x50_comet() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50_FFA -# endif -# define machine_is_qsd8x50_ffa() (machine_arch_type == MACH_TYPE_QSD8X50_FFA) -#else -# define machine_is_qsd8x50_ffa() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50A_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50A_SURF -# endif -# define machine_is_qsd8x50a_surf() (machine_arch_type == MACH_TYPE_QSD8X50A_SURF) -#else -# define machine_is_qsd8x50a_surf() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X50A_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X50A_FFA -# endif -# define machine_is_qsd8x50a_ffa() (machine_arch_type == MACH_TYPE_QSD8X50A_FFA) -#else -# define machine_is_qsd8x50a_ffa() (0) -#endif - -#ifdef CONFIG_MACH_ADX_XGCP10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ADX_XGCP10 -# endif -# define machine_is_adx_xgcp10() (machine_arch_type == MACH_TYPE_ADX_XGCP10) -#else -# define machine_is_adx_xgcp10() (0) -#endif - -#ifdef CONFIG_MACH_MCGWUMTS2A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MCGWUMTS2A -# endif -# define machine_is_mcgwumts2a() (machine_arch_type == MACH_TYPE_MCGWUMTS2A) -#else -# define machine_is_mcgwumts2a() (0) -#endif - -#ifdef CONFIG_MACH_MOBIKT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MOBIKT -# endif -# define machine_is_mobikt() (machine_arch_type == MACH_TYPE_MOBIKT) -#else -# define machine_is_mobikt() (0) -#endif - -#ifdef CONFIG_MACH_MX53_EVK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX53_EVK -# endif -# define machine_is_mx53_evk() (machine_arch_type == MACH_TYPE_MX53_EVK) -#else -# define machine_is_mx53_evk() (0) -#endif - -#ifdef CONFIG_MACH_IGEP0030 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGEP0030 -# endif -# define machine_is_igep0030() (machine_arch_type == MACH_TYPE_IGEP0030) -#else -# define machine_is_igep0030() (0) -#endif - -#ifdef CONFIG_MACH_AXELL_H40_H50_CTRL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXELL_H40_H50_CTRL -# endif -# define machine_is_axell_h40_h50_ctrl() (machine_arch_type == MACH_TYPE_AXELL_H40_H50_CTRL) -#else -# define machine_is_axell_h40_h50_ctrl() (0) -#endif - -#ifdef CONFIG_MACH_DTCOMMOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DTCOMMOD -# endif -# define machine_is_dtcommod() (machine_arch_type == MACH_TYPE_DTCOMMOD) -#else -# define machine_is_dtcommod() (0) -#endif - -#ifdef CONFIG_MACH_GOULD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GOULD -# endif -# define machine_is_gould() (machine_arch_type == MACH_TYPE_GOULD) -#else -# define machine_is_gould() (0) -#endif - -#ifdef CONFIG_MACH_SIBERIA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIBERIA -# endif -# define machine_is_siberia() (machine_arch_type == MACH_TYPE_SIBERIA) -#else -# define machine_is_siberia() (0) -#endif - -#ifdef CONFIG_MACH_SBC3530 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC3530 -# endif -# define machine_is_sbc3530() (machine_arch_type == MACH_TYPE_SBC3530) -#else -# define machine_is_sbc3530() (0) -#endif - -#ifdef CONFIG_MACH_QARM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QARM -# endif -# define machine_is_qarm() (machine_arch_type == MACH_TYPE_QARM) -#else -# define machine_is_qarm() (0) -#endif - -#ifdef CONFIG_MACH_MIPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIPS -# endif -# define machine_is_mips() (machine_arch_type == MACH_TYPE_MIPS) -#else -# define machine_is_mips() (0) -#endif - -#ifdef CONFIG_MACH_MX27GRB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27GRB -# endif -# define machine_is_mx27grb() (machine_arch_type == MACH_TYPE_MX27GRB) -#else -# define machine_is_mx27grb() (0) -#endif - -#ifdef CONFIG_MACH_SBC8100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC8100 -# endif -# define machine_is_sbc8100() (machine_arch_type == MACH_TYPE_SBC8100) -#else -# define machine_is_sbc8100() (0) -#endif - -#ifdef CONFIG_MACH_SAARB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAARB -# endif -# define machine_is_saarb() (machine_arch_type == MACH_TYPE_SAARB) -#else -# define machine_is_saarb() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3MINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3MINI -# endif -# define machine_is_omap3mini() (machine_arch_type == MACH_TYPE_OMAP3MINI) -#else -# define machine_is_omap3mini() (0) -#endif - -#ifdef CONFIG_MACH_CNMBOOK7SE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNMBOOK7SE -# endif -# define machine_is_cnmbook7se() (machine_arch_type == MACH_TYPE_CNMBOOK7SE) -#else -# define machine_is_cnmbook7se() (0) -#endif - -#ifdef CONFIG_MACH_CATAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CATAN -# endif -# define machine_is_catan() (machine_arch_type == MACH_TYPE_CATAN) -#else -# define machine_is_catan() (0) -#endif - -#ifdef CONFIG_MACH_HARMONY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HARMONY -# endif -# define machine_is_harmony() (machine_arch_type == MACH_TYPE_HARMONY) -#else -# define machine_is_harmony() (0) -#endif - -#ifdef CONFIG_MACH_TONGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TONGA -# endif -# define machine_is_tonga() (machine_arch_type == MACH_TYPE_TONGA) -#else -# define machine_is_tonga() (0) -#endif - -#ifdef CONFIG_MACH_CYBOOK_ORIZON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CYBOOK_ORIZON -# endif -# define machine_is_cybook_orizon() (machine_arch_type == MACH_TYPE_CYBOOK_ORIZON) -#else -# define machine_is_cybook_orizon() (0) -#endif - -#ifdef CONFIG_MACH_HTCRHODIUMCDMA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCRHODIUMCDMA -# endif -# define machine_is_htcrhodiumcdma() (machine_arch_type == MACH_TYPE_HTCRHODIUMCDMA) -#else -# define machine_is_htcrhodiumcdma() (0) -#endif - -#ifdef CONFIG_MACH_EPC_G45 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPC_G45 -# endif -# define machine_is_epc_g45() (machine_arch_type == MACH_TYPE_EPC_G45) -#else -# define machine_is_epc_g45() (0) -#endif - -#ifdef CONFIG_MACH_EPC_LPC3250 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPC_LPC3250 -# endif -# define machine_is_epc_lpc3250() (machine_arch_type == MACH_TYPE_EPC_LPC3250) -#else -# define machine_is_epc_lpc3250() (0) -#endif - -#ifdef CONFIG_MACH_MXC91341EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC91341EVB -# endif -# define machine_is_mxc91341evb() (machine_arch_type == MACH_TYPE_MXC91341EVB) -#else -# define machine_is_mxc91341evb() (0) -#endif - -#ifdef CONFIG_MACH_RTW1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RTW1000 -# endif -# define machine_is_rtw1000() (machine_arch_type == MACH_TYPE_RTW1000) -#else -# define machine_is_rtw1000() (0) -#endif - -#ifdef CONFIG_MACH_BOBCAT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BOBCAT -# endif -# define machine_is_bobcat() (machine_arch_type == MACH_TYPE_BOBCAT) -#else -# define machine_is_bobcat() (0) -#endif - -#ifdef CONFIG_MACH_TRIZEPS6 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIZEPS6 -# endif -# define machine_is_trizeps6() (machine_arch_type == MACH_TYPE_TRIZEPS6) -#else -# define machine_is_trizeps6() (0) -#endif - -#ifdef CONFIG_MACH_MSM7X30_FLUID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM7X30_FLUID -# endif -# define machine_is_msm7x30_fluid() (machine_arch_type == MACH_TYPE_MSM7X30_FLUID) -#else -# define machine_is_msm7x30_fluid() (0) -#endif - -#ifdef CONFIG_MACH_NEDAP9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEDAP9263 -# endif -# define machine_is_nedap9263() (machine_arch_type == MACH_TYPE_NEDAP9263) -#else -# define machine_is_nedap9263() (0) -#endif - -#ifdef CONFIG_MACH_NETGEAR_MS2110 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETGEAR_MS2110 -# endif -# define machine_is_netgear_ms2110() (machine_arch_type == MACH_TYPE_NETGEAR_MS2110) -#else -# define machine_is_netgear_ms2110() (0) -#endif - -#ifdef CONFIG_MACH_BMX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BMX -# endif -# define machine_is_bmx() (machine_arch_type == MACH_TYPE_BMX) -#else -# define machine_is_bmx() (0) -#endif - -#ifdef CONFIG_MACH_NETSTREAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSTREAM -# endif -# define machine_is_netstream() (machine_arch_type == MACH_TYPE_NETSTREAM) -#else -# define machine_is_netstream() (0) -#endif - -#ifdef CONFIG_MACH_VPNEXT_RCU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPNEXT_RCU -# endif -# define machine_is_vpnext_rcu() (machine_arch_type == MACH_TYPE_VPNEXT_RCU) -#else -# define machine_is_vpnext_rcu() (0) -#endif - -#ifdef CONFIG_MACH_VPNEXT_MPU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPNEXT_MPU -# endif -# define machine_is_vpnext_mpu() (machine_arch_type == MACH_TYPE_VPNEXT_MPU) -#else -# define machine_is_vpnext_mpu() (0) -#endif - -#ifdef CONFIG_MACH_BCMRING_TABLET_V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMRING_TABLET_V1 -# endif -# define machine_is_bcmring_tablet_v1() (machine_arch_type == MACH_TYPE_BCMRING_TABLET_V1) -#else -# define machine_is_bcmring_tablet_v1() (0) -#endif - -#ifdef CONFIG_MACH_SGARM10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SGARM10 -# endif -# define machine_is_sgarm10() (machine_arch_type == MACH_TYPE_SGARM10) -#else -# define machine_is_sgarm10() (0) -#endif - -#ifdef CONFIG_MACH_CM_T3517 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_T3517 -# endif -# define machine_is_cm_t3517() (machine_arch_type == MACH_TYPE_CM_T3517) -#else -# define machine_is_cm_t3517() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_CPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_CPS -# endif -# define machine_is_omap3_cps() (machine_arch_type == MACH_TYPE_OMAP3_CPS) -#else -# define machine_is_omap3_cps() (0) -#endif - -#ifdef CONFIG_MACH_AXAR1500_RECEIVER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AXAR1500_RECEIVER -# endif -# define machine_is_axar1500_receiver() (machine_arch_type == MACH_TYPE_AXAR1500_RECEIVER) -#else -# define machine_is_axar1500_receiver() (0) -#endif - -#ifdef CONFIG_MACH_WBD222 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WBD222 -# endif -# define machine_is_wbd222() (machine_arch_type == MACH_TYPE_WBD222) -#else -# define machine_is_wbd222() (0) -#endif - -#ifdef CONFIG_MACH_MT65XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MT65XX -# endif -# define machine_is_mt65xx() (machine_arch_type == MACH_TYPE_MT65XX) -#else -# define machine_is_mt65xx() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_SURF -# endif -# define machine_is_msm8x60_surf() (machine_arch_type == MACH_TYPE_MSM8X60_SURF) -#else -# define machine_is_msm8x60_surf() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_SIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_SIM -# endif -# define machine_is_msm8x60_sim() (machine_arch_type == MACH_TYPE_MSM8X60_SIM) -#else -# define machine_is_msm8x60_sim() (0) -#endif - -#ifdef CONFIG_MACH_VMC300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VMC300 -# endif -# define machine_is_vmc300() (machine_arch_type == MACH_TYPE_VMC300) -#else -# define machine_is_vmc300() (0) -#endif - -#ifdef CONFIG_MACH_TCC8000_SDK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TCC8000_SDK -# endif -# define machine_is_tcc8000_sdk() (machine_arch_type == MACH_TYPE_TCC8000_SDK) -#else -# define machine_is_tcc8000_sdk() (0) -#endif - -#ifdef CONFIG_MACH_NANOS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NANOS -# endif -# define machine_is_nanos() (machine_arch_type == MACH_TYPE_NANOS) -#else -# define machine_is_nanos() (0) -#endif - -#ifdef CONFIG_MACH_STAMP9G10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAMP9G10 -# endif -# define machine_is_stamp9g10() (machine_arch_type == MACH_TYPE_STAMP9G10) -#else -# define machine_is_stamp9g10() (0) -#endif - -#ifdef CONFIG_MACH_STAMP9G45 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STAMP9G45 -# endif -# define machine_is_stamp9g45() (machine_arch_type == MACH_TYPE_STAMP9G45) -#else -# define machine_is_stamp9g45() (0) -#endif - -#ifdef CONFIG_MACH_H6053 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_H6053 -# endif -# define machine_is_h6053() (machine_arch_type == MACH_TYPE_H6053) -#else -# define machine_is_h6053() (0) -#endif - -#ifdef CONFIG_MACH_SMINT01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMINT01 -# endif -# define machine_is_smint01() (machine_arch_type == MACH_TYPE_SMINT01) -#else -# define machine_is_smint01() (0) -#endif - -#ifdef CONFIG_MACH_PRTLVT2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRTLVT2 -# endif -# define machine_is_prtlvt2() (machine_arch_type == MACH_TYPE_PRTLVT2) -#else -# define machine_is_prtlvt2() (0) -#endif - -#ifdef CONFIG_MACH_AP420 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AP420 -# endif -# define machine_is_ap420() (machine_arch_type == MACH_TYPE_AP420) -#else -# define machine_is_ap420() (0) -#endif - -#ifdef CONFIG_MACH_HTCSHIFT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCSHIFT -# endif -# define machine_is_htcshift() (machine_arch_type == MACH_TYPE_HTCSHIFT) -#else -# define machine_is_htcshift() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM365_FC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM365_FC -# endif -# define machine_is_davinci_dm365_fc() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_FC) -#else -# define machine_is_davinci_dm365_fc() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X55_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X55_SURF -# endif -# define machine_is_msm8x55_surf() (machine_arch_type == MACH_TYPE_MSM8X55_SURF) -#else -# define machine_is_msm8x55_surf() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X55_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X55_FFA -# endif -# define machine_is_msm8x55_ffa() (machine_arch_type == MACH_TYPE_MSM8X55_FFA) -#else -# define machine_is_msm8x55_ffa() (0) -#endif - -#ifdef CONFIG_MACH_ESL_VAMANA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_VAMANA -# endif -# define machine_is_esl_vamana() (machine_arch_type == MACH_TYPE_ESL_VAMANA) -#else -# define machine_is_esl_vamana() (0) -#endif - -#ifdef CONFIG_MACH_SBC35 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC35 -# endif -# define machine_is_sbc35() (machine_arch_type == MACH_TYPE_SBC35) -#else -# define machine_is_sbc35() (0) -#endif - -#ifdef CONFIG_MACH_MPX6446 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MPX6446 -# endif -# define machine_is_mpx6446() (machine_arch_type == MACH_TYPE_MPX6446) -#else -# define machine_is_mpx6446() (0) -#endif - -#ifdef CONFIG_MACH_OREO_CONTROLLER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OREO_CONTROLLER -# endif -# define machine_is_oreo_controller() (machine_arch_type == MACH_TYPE_OREO_CONTROLLER) -#else -# define machine_is_oreo_controller() (0) -#endif - -#ifdef CONFIG_MACH_KOPIN_MODELS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KOPIN_MODELS -# endif -# define machine_is_kopin_models() (machine_arch_type == MACH_TYPE_KOPIN_MODELS) -#else -# define machine_is_kopin_models() (0) -#endif - -#ifdef CONFIG_MACH_TTC_VISION2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TTC_VISION2 -# endif -# define machine_is_ttc_vision2() (machine_arch_type == MACH_TYPE_TTC_VISION2) -#else -# define machine_is_ttc_vision2() (0) -#endif - -#ifdef CONFIG_MACH_CNS3420VB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNS3420VB -# endif -# define machine_is_cns3420vb() (machine_arch_type == MACH_TYPE_CNS3420VB) -#else -# define machine_is_cns3420vb() (0) -#endif - -#ifdef CONFIG_MACH_LPC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC2 -# endif -# define machine_is_lpc2() (machine_arch_type == MACH_TYPE_LPC2) -#else -# define machine_is_lpc2() (0) -#endif - -#ifdef CONFIG_MACH_OLYMPUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OLYMPUS -# endif -# define machine_is_olympus() (machine_arch_type == MACH_TYPE_OLYMPUS) -#else -# define machine_is_olympus() (0) -#endif - -#ifdef CONFIG_MACH_VORTEX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VORTEX -# endif -# define machine_is_vortex() (machine_arch_type == MACH_TYPE_VORTEX) -#else -# define machine_is_vortex() (0) -#endif - -#ifdef CONFIG_MACH_S5PC200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5PC200 -# endif -# define machine_is_s5pc200() (machine_arch_type == MACH_TYPE_S5PC200) -#else -# define machine_is_s5pc200() (0) -#endif - -#ifdef CONFIG_MACH_ECUCORE_9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ECUCORE_9263 -# endif -# define machine_is_ecucore_9263() (machine_arch_type == MACH_TYPE_ECUCORE_9263) -#else -# define machine_is_ecucore_9263() (0) -#endif - -#ifdef CONFIG_MACH_SMDKC200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKC200 -# endif -# define machine_is_smdkc200() (machine_arch_type == MACH_TYPE_SMDKC200) -#else -# define machine_is_smdkc200() (0) -#endif - -#ifdef CONFIG_MACH_EMSISO_SX27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMSISO_SX27 -# endif -# define machine_is_emsiso_sx27() (machine_arch_type == MACH_TYPE_EMSISO_SX27) -#else -# define machine_is_emsiso_sx27() (0) -#endif - -#ifdef CONFIG_MACH_APX_SOM9G45_EK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APX_SOM9G45_EK -# endif -# define machine_is_apx_som9g45_ek() (machine_arch_type == MACH_TYPE_APX_SOM9G45_EK) -#else -# define machine_is_apx_som9g45_ek() (0) -#endif - -#ifdef CONFIG_MACH_SONGSHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SONGSHAN -# endif -# define machine_is_songshan() (machine_arch_type == MACH_TYPE_SONGSHAN) -#else -# define machine_is_songshan() (0) -#endif - -#ifdef CONFIG_MACH_TIANSHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIANSHAN -# endif -# define machine_is_tianshan() (machine_arch_type == MACH_TYPE_TIANSHAN) -#else -# define machine_is_tianshan() (0) -#endif - -#ifdef CONFIG_MACH_VPX500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPX500 -# endif -# define machine_is_vpx500() (machine_arch_type == MACH_TYPE_VPX500) -#else -# define machine_is_vpx500() (0) -#endif - -#ifdef CONFIG_MACH_AM3517SAM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AM3517SAM -# endif -# define machine_is_am3517sam() (machine_arch_type == MACH_TYPE_AM3517SAM) -#else -# define machine_is_am3517sam() (0) -#endif - -#ifdef CONFIG_MACH_SKAT91_SIM508 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKAT91_SIM508 -# endif -# define machine_is_skat91_sim508() (machine_arch_type == MACH_TYPE_SKAT91_SIM508) -#else -# define machine_is_skat91_sim508() (0) -#endif - -#ifdef CONFIG_MACH_SKAT91_S3E -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKAT91_S3E -# endif -# define machine_is_skat91_s3e() (machine_arch_type == MACH_TYPE_SKAT91_S3E) -#else -# define machine_is_skat91_s3e() (0) -#endif - -#ifdef CONFIG_MACH_OMAP4_PANDA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP4_PANDA -# endif -# define machine_is_omap4_panda() (machine_arch_type == MACH_TYPE_OMAP4_PANDA) -#else -# define machine_is_omap4_panda() (0) -#endif - -#ifdef CONFIG_MACH_DF7220 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DF7220 -# endif -# define machine_is_df7220() (machine_arch_type == MACH_TYPE_DF7220) -#else -# define machine_is_df7220() (0) -#endif - -#ifdef CONFIG_MACH_NEMINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEMINI -# endif -# define machine_is_nemini() (machine_arch_type == MACH_TYPE_NEMINI) -#else -# define machine_is_nemini() (0) -#endif - -#ifdef CONFIG_MACH_T8200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T8200 -# endif -# define machine_is_t8200() (machine_arch_type == MACH_TYPE_T8200) -#else -# define machine_is_t8200() (0) -#endif - -#ifdef CONFIG_MACH_APF51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APF51 -# endif -# define machine_is_apf51() (machine_arch_type == MACH_TYPE_APF51) -#else -# define machine_is_apf51() (0) -#endif - -#ifdef CONFIG_MACH_DR_RC_UNIT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DR_RC_UNIT -# endif -# define machine_is_dr_rc_unit() (machine_arch_type == MACH_TYPE_DR_RC_UNIT) -#else -# define machine_is_dr_rc_unit() (0) -#endif - -#ifdef CONFIG_MACH_BORDEAUX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BORDEAUX -# endif -# define machine_is_bordeaux() (machine_arch_type == MACH_TYPE_BORDEAUX) -#else -# define machine_is_bordeaux() (0) -#endif - -#ifdef CONFIG_MACH_CATANIA_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CATANIA_B -# endif -# define machine_is_catania_b() (machine_arch_type == MACH_TYPE_CATANIA_B) -#else -# define machine_is_catania_b() (0) -#endif - -#ifdef CONFIG_MACH_MX51_OCEAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_OCEAN -# endif -# define machine_is_mx51_ocean() (machine_arch_type == MACH_TYPE_MX51_OCEAN) -#else -# define machine_is_mx51_ocean() (0) -#endif - -#ifdef CONFIG_MACH_TI8168EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TI8168EVM -# endif -# define machine_is_ti8168evm() (machine_arch_type == MACH_TYPE_TI8168EVM) -#else -# define machine_is_ti8168evm() (0) -#endif - -#ifdef CONFIG_MACH_NEOCOREOMAP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NEOCOREOMAP -# endif -# define machine_is_neocoreomap() (machine_arch_type == MACH_TYPE_NEOCOREOMAP) -#else -# define machine_is_neocoreomap() (0) -#endif - -#ifdef CONFIG_MACH_WITHINGS_WBP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WITHINGS_WBP -# endif -# define machine_is_withings_wbp() (machine_arch_type == MACH_TYPE_WITHINGS_WBP) -#else -# define machine_is_withings_wbp() (0) -#endif - -#ifdef CONFIG_MACH_DBPS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DBPS -# endif -# define machine_is_dbps() (machine_arch_type == MACH_TYPE_DBPS) -#else -# define machine_is_dbps() (0) -#endif - -#ifdef CONFIG_MACH_SBC9261 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBC9261 -# endif -# define machine_is_sbc9261() (machine_arch_type == MACH_TYPE_SBC9261) -#else -# define machine_is_sbc9261() (0) -#endif - -#ifdef CONFIG_MACH_PCBFP0001 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCBFP0001 -# endif -# define machine_is_pcbfp0001() (machine_arch_type == MACH_TYPE_PCBFP0001) -#else -# define machine_is_pcbfp0001() (0) -#endif - -#ifdef CONFIG_MACH_SPEEDY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEEDY -# endif -# define machine_is_speedy() (machine_arch_type == MACH_TYPE_SPEEDY) -#else -# define machine_is_speedy() (0) -#endif - -#ifdef CONFIG_MACH_CHRYSAOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHRYSAOR -# endif -# define machine_is_chrysaor() (machine_arch_type == MACH_TYPE_CHRYSAOR) -#else -# define machine_is_chrysaor() (0) -#endif - -#ifdef CONFIG_MACH_TANGO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TANGO -# endif -# define machine_is_tango() (machine_arch_type == MACH_TYPE_TANGO) -#else -# define machine_is_tango() (0) -#endif - -#ifdef CONFIG_MACH_SYNOLOGY_DSX11 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYNOLOGY_DSX11 -# endif -# define machine_is_synology_dsx11() (machine_arch_type == MACH_TYPE_SYNOLOGY_DSX11) -#else -# define machine_is_synology_dsx11() (0) -#endif - -#ifdef CONFIG_MACH_HANLIN_V3EXT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HANLIN_V3EXT -# endif -# define machine_is_hanlin_v3ext() (machine_arch_type == MACH_TYPE_HANLIN_V3EXT) -#else -# define machine_is_hanlin_v3ext() (0) -#endif - -#ifdef CONFIG_MACH_HANLIN_V5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HANLIN_V5 -# endif -# define machine_is_hanlin_v5() (machine_arch_type == MACH_TYPE_HANLIN_V5) -#else -# define machine_is_hanlin_v5() (0) -#endif - -#ifdef CONFIG_MACH_HANLIN_V3PLUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HANLIN_V3PLUS -# endif -# define machine_is_hanlin_v3plus() (machine_arch_type == MACH_TYPE_HANLIN_V3PLUS) -#else -# define machine_is_hanlin_v3plus() (0) -#endif - -#ifdef CONFIG_MACH_IRIVER_STORY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IRIVER_STORY -# endif -# define machine_is_iriver_story() (machine_arch_type == MACH_TYPE_IRIVER_STORY) -#else -# define machine_is_iriver_story() (0) -#endif - -#ifdef CONFIG_MACH_IREX_ILIAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IREX_ILIAD -# endif -# define machine_is_irex_iliad() (machine_arch_type == MACH_TYPE_IREX_ILIAD) -#else -# define machine_is_irex_iliad() (0) -#endif - -#ifdef CONFIG_MACH_IREX_DR1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IREX_DR1000 -# endif -# define machine_is_irex_dr1000() (machine_arch_type == MACH_TYPE_IREX_DR1000) -#else -# define machine_is_irex_dr1000() (0) -#endif - -#ifdef CONFIG_MACH_TETON_BGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TETON_BGA -# endif -# define machine_is_teton_bga() (machine_arch_type == MACH_TYPE_TETON_BGA) -#else -# define machine_is_teton_bga() (0) -#endif - -#ifdef CONFIG_MACH_SNAPPER9G45 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SNAPPER9G45 -# endif -# define machine_is_snapper9g45() (machine_arch_type == MACH_TYPE_SNAPPER9G45) -#else -# define machine_is_snapper9g45() (0) -#endif - -#ifdef CONFIG_MACH_TAM3517 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TAM3517 -# endif -# define machine_is_tam3517() (machine_arch_type == MACH_TYPE_TAM3517) -#else -# define machine_is_tam3517() (0) -#endif - -#ifdef CONFIG_MACH_PDC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PDC100 -# endif -# define machine_is_pdc100() (machine_arch_type == MACH_TYPE_PDC100) -#else -# define machine_is_pdc100() (0) -#endif - -#ifdef CONFIG_MACH_EUKREA_CPUIMX25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX25 -# endif -# define machine_is_eukrea_cpuimx25sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX25) -#else -# define machine_is_eukrea_cpuimx25sd() (0) -#endif - -#ifdef CONFIG_MACH_EUKREA_CPUIMX35 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX35 -# endif -# define machine_is_eukrea_cpuimx35sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX35) -#else -# define machine_is_eukrea_cpuimx35sd() (0) -#endif - -#ifdef CONFIG_MACH_EUKREA_CPUIMX51SD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX51SD -# endif -# define machine_is_eukrea_cpuimx51sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51SD) -#else -# define machine_is_eukrea_cpuimx51sd() (0) -#endif - -#ifdef CONFIG_MACH_EUKREA_CPUIMX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX51 -# endif -# define machine_is_eukrea_cpuimx51() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51) -#else -# define machine_is_eukrea_cpuimx51() (0) -#endif - -#ifdef CONFIG_MACH_P565 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P565 -# endif -# define machine_is_p565() (machine_arch_type == MACH_TYPE_P565) -#else -# define machine_is_p565() (0) -#endif - -#ifdef CONFIG_MACH_ACER_A4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_A4 -# endif -# define machine_is_acer_a4() (machine_arch_type == MACH_TYPE_ACER_A4) -#else -# define machine_is_acer_a4() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM368_BIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM368_BIP -# endif -# define machine_is_davinci_dm368_bip() (machine_arch_type == MACH_TYPE_DAVINCI_DM368_BIP) -#else -# define machine_is_davinci_dm368_bip() (0) -#endif - -#ifdef CONFIG_MACH_ESHARE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESHARE -# endif -# define machine_is_eshare() (machine_arch_type == MACH_TYPE_ESHARE) -#else -# define machine_is_eshare() (0) -#endif - -#ifdef CONFIG_MACH_HW_OMAPL138_EUROPA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HW_OMAPL138_EUROPA -# endif -# define machine_is_hw_omapl138_europa() (machine_arch_type == MACH_TYPE_HW_OMAPL138_EUROPA) -#else -# define machine_is_hw_omapl138_europa() (0) -#endif - -#ifdef CONFIG_MACH_WLBARGN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WLBARGN -# endif -# define machine_is_wlbargn() (machine_arch_type == MACH_TYPE_WLBARGN) -#else -# define machine_is_wlbargn() (0) -#endif - -#ifdef CONFIG_MACH_BM170 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BM170 -# endif -# define machine_is_bm170() (machine_arch_type == MACH_TYPE_BM170) -#else -# define machine_is_bm170() (0) -#endif - -#ifdef CONFIG_MACH_NETSPACE_MINI_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSPACE_MINI_V2 -# endif -# define machine_is_netspace_mini_v2() (machine_arch_type == MACH_TYPE_NETSPACE_MINI_V2) -#else -# define machine_is_netspace_mini_v2() (0) -#endif - -#ifdef CONFIG_MACH_NETSPACE_PLUG_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSPACE_PLUG_V2 -# endif -# define machine_is_netspace_plug_v2() (machine_arch_type == MACH_TYPE_NETSPACE_PLUG_V2) -#else -# define machine_is_netspace_plug_v2() (0) -#endif - -#ifdef CONFIG_MACH_SIEMENS_L1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIEMENS_L1 -# endif -# define machine_is_siemens_l1() (machine_arch_type == MACH_TYPE_SIEMENS_L1) -#else -# define machine_is_siemens_l1() (0) -#endif - -#ifdef CONFIG_MACH_ELV_LCU1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELV_LCU1 -# endif -# define machine_is_elv_lcu1() (machine_arch_type == MACH_TYPE_ELV_LCU1) -#else -# define machine_is_elv_lcu1() (0) -#endif - -#ifdef CONFIG_MACH_MCU1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MCU1 -# endif -# define machine_is_mcu1() (machine_arch_type == MACH_TYPE_MCU1) -#else -# define machine_is_mcu1() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_TAO3530 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_TAO3530 -# endif -# define machine_is_omap3_tao3530() (machine_arch_type == MACH_TYPE_OMAP3_TAO3530) -#else -# define machine_is_omap3_tao3530() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_PCUTOUCH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_PCUTOUCH -# endif -# define machine_is_omap3_pcutouch() (machine_arch_type == MACH_TYPE_OMAP3_PCUTOUCH) -#else -# define machine_is_omap3_pcutouch() (0) -#endif - -#ifdef CONFIG_MACH_SMDKC210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKC210 -# endif -# define machine_is_smdkc210() (machine_arch_type == MACH_TYPE_SMDKC210) -#else -# define machine_is_smdkc210() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_BRAILLO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_BRAILLO -# endif -# define machine_is_omap3_braillo() (machine_arch_type == MACH_TYPE_OMAP3_BRAILLO) -#else -# define machine_is_omap3_braillo() (0) -#endif - -#ifdef CONFIG_MACH_SPYPLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPYPLUG -# endif -# define machine_is_spyplug() (machine_arch_type == MACH_TYPE_SPYPLUG) -#else -# define machine_is_spyplug() (0) -#endif - -#ifdef CONFIG_MACH_GINGER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GINGER -# endif -# define machine_is_ginger() (machine_arch_type == MACH_TYPE_GINGER) -#else -# define machine_is_ginger() (0) -#endif - -#ifdef CONFIG_MACH_TNY_T3530 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TNY_T3530 -# endif -# define machine_is_tny_t3530() (machine_arch_type == MACH_TYPE_TNY_T3530) -#else -# define machine_is_tny_t3530() (0) -#endif - -#ifdef CONFIG_MACH_PCA102 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCA102 -# endif -# define machine_is_pca102() (machine_arch_type == MACH_TYPE_PCA102) -#else -# define machine_is_pca102() (0) -#endif - -#ifdef CONFIG_MACH_SPADE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPADE -# endif -# define machine_is_spade() (machine_arch_type == MACH_TYPE_SPADE) -#else -# define machine_is_spade() (0) -#endif - -#ifdef CONFIG_MACH_MXC25_TOPAZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXC25_TOPAZ -# endif -# define machine_is_mxc25_topaz() (machine_arch_type == MACH_TYPE_MXC25_TOPAZ) -#else -# define machine_is_mxc25_topaz() (0) -#endif - -#ifdef CONFIG_MACH_T5325 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T5325 -# endif -# define machine_is_t5325() (machine_arch_type == MACH_TYPE_T5325) -#else -# define machine_is_t5325() (0) -#endif - -#ifdef CONFIG_MACH_GW2361 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GW2361 -# endif -# define machine_is_gw2361() (machine_arch_type == MACH_TYPE_GW2361) -#else -# define machine_is_gw2361() (0) -#endif - -#ifdef CONFIG_MACH_ELOG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELOG -# endif -# define machine_is_elog() (machine_arch_type == MACH_TYPE_ELOG) -#else -# define machine_is_elog() (0) -#endif - -#ifdef CONFIG_MACH_INCOME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INCOME -# endif -# define machine_is_income() (machine_arch_type == MACH_TYPE_INCOME) -#else -# define machine_is_income() (0) -#endif - -#ifdef CONFIG_MACH_BCM589X -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCM589X -# endif -# define machine_is_bcm589x() (machine_arch_type == MACH_TYPE_BCM589X) -#else -# define machine_is_bcm589x() (0) -#endif - -#ifdef CONFIG_MACH_ETNA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETNA -# endif -# define machine_is_etna() (machine_arch_type == MACH_TYPE_ETNA) -#else -# define machine_is_etna() (0) -#endif - -#ifdef CONFIG_MACH_HAWKS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HAWKS -# endif -# define machine_is_hawks() (machine_arch_type == MACH_TYPE_HAWKS) -#else -# define machine_is_hawks() (0) -#endif - -#ifdef CONFIG_MACH_MESON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MESON -# endif -# define machine_is_meson() (machine_arch_type == MACH_TYPE_MESON) -#else -# define machine_is_meson() (0) -#endif - -#ifdef CONFIG_MACH_XSBASE255 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_XSBASE255 -# endif -# define machine_is_xsbase255() (machine_arch_type == MACH_TYPE_XSBASE255) -#else -# define machine_is_xsbase255() (0) -#endif - -#ifdef CONFIG_MACH_PVM2030 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PVM2030 -# endif -# define machine_is_pvm2030() (machine_arch_type == MACH_TYPE_PVM2030) -#else -# define machine_is_pvm2030() (0) -#endif - -#ifdef CONFIG_MACH_MIOA502 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIOA502 -# endif -# define machine_is_mioa502() (machine_arch_type == MACH_TYPE_MIOA502) -#else -# define machine_is_mioa502() (0) -#endif - -#ifdef CONFIG_MACH_VVBOX_SDORIG2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VVBOX_SDORIG2 -# endif -# define machine_is_vvbox_sdorig2() (machine_arch_type == MACH_TYPE_VVBOX_SDORIG2) -#else -# define machine_is_vvbox_sdorig2() (0) -#endif - -#ifdef CONFIG_MACH_VVBOX_SDLITE2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VVBOX_SDLITE2 -# endif -# define machine_is_vvbox_sdlite2() (machine_arch_type == MACH_TYPE_VVBOX_SDLITE2) -#else -# define machine_is_vvbox_sdlite2() (0) -#endif - -#ifdef CONFIG_MACH_VVBOX_SDPRO4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VVBOX_SDPRO4 -# endif -# define machine_is_vvbox_sdpro4() (machine_arch_type == MACH_TYPE_VVBOX_SDPRO4) -#else -# define machine_is_vvbox_sdpro4() (0) -#endif - -#ifdef CONFIG_MACH_HTC_SPV_M700 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_SPV_M700 -# endif -# define machine_is_htc_spv_m700() (machine_arch_type == MACH_TYPE_HTC_SPV_M700) -#else -# define machine_is_htc_spv_m700() (0) -#endif - -#ifdef CONFIG_MACH_MX257SX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX257SX -# endif -# define machine_is_mx257sx() (machine_arch_type == MACH_TYPE_MX257SX) -#else -# define machine_is_mx257sx() (0) -#endif - -#ifdef CONFIG_MACH_GONI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GONI -# endif -# define machine_is_goni() (machine_arch_type == MACH_TYPE_GONI) -#else -# define machine_is_goni() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X55_SVLTE_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X55_SVLTE_FFA -# endif -# define machine_is_msm8x55_svlte_ffa() (machine_arch_type == MACH_TYPE_MSM8X55_SVLTE_FFA) -#else -# define machine_is_msm8x55_svlte_ffa() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X55_SVLTE_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X55_SVLTE_SURF -# endif -# define machine_is_msm8x55_svlte_surf() (machine_arch_type == MACH_TYPE_MSM8X55_SVLTE_SURF) -#else -# define machine_is_msm8x55_svlte_surf() (0) -#endif - -#ifdef CONFIG_MACH_QUICKSTEP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUICKSTEP -# endif -# define machine_is_quickstep() (machine_arch_type == MACH_TYPE_QUICKSTEP) -#else -# define machine_is_quickstep() (0) -#endif - -#ifdef CONFIG_MACH_DMW96 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DMW96 -# endif -# define machine_is_dmw96() (machine_arch_type == MACH_TYPE_DMW96) -#else -# define machine_is_dmw96() (0) -#endif - -#ifdef CONFIG_MACH_HAMMERHEAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HAMMERHEAD -# endif -# define machine_is_hammerhead() (machine_arch_type == MACH_TYPE_HAMMERHEAD) -#else -# define machine_is_hammerhead() (0) -#endif - -#ifdef CONFIG_MACH_TRIDENT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIDENT -# endif -# define machine_is_trident() (machine_arch_type == MACH_TYPE_TRIDENT) -#else -# define machine_is_trident() (0) -#endif - -#ifdef CONFIG_MACH_LIGHTNING -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LIGHTNING -# endif -# define machine_is_lightning() (machine_arch_type == MACH_TYPE_LIGHTNING) -#else -# define machine_is_lightning() (0) -#endif - -#ifdef CONFIG_MACH_ICONNECT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICONNECT -# endif -# define machine_is_iconnect() (machine_arch_type == MACH_TYPE_ICONNECT) -#else -# define machine_is_iconnect() (0) -#endif - -#ifdef CONFIG_MACH_AUTOBOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AUTOBOT -# endif -# define machine_is_autobot() (machine_arch_type == MACH_TYPE_AUTOBOT) -#else -# define machine_is_autobot() (0) -#endif - -#ifdef CONFIG_MACH_COCONUT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COCONUT -# endif -# define machine_is_coconut() (machine_arch_type == MACH_TYPE_COCONUT) -#else -# define machine_is_coconut() (0) -#endif - -#ifdef CONFIG_MACH_DURIAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DURIAN -# endif -# define machine_is_durian() (machine_arch_type == MACH_TYPE_DURIAN) -#else -# define machine_is_durian() (0) -#endif - -#ifdef CONFIG_MACH_CAYENNE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CAYENNE -# endif -# define machine_is_cayenne() (machine_arch_type == MACH_TYPE_CAYENNE) -#else -# define machine_is_cayenne() (0) -#endif - -#ifdef CONFIG_MACH_FUJI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FUJI -# endif -# define machine_is_fuji() (machine_arch_type == MACH_TYPE_FUJI) -#else -# define machine_is_fuji() (0) -#endif - -#ifdef CONFIG_MACH_SYNOLOGY_6282 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYNOLOGY_6282 -# endif -# define machine_is_synology_6282() (machine_arch_type == MACH_TYPE_SYNOLOGY_6282) -#else -# define machine_is_synology_6282() (0) -#endif - -#ifdef CONFIG_MACH_EM1SY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EM1SY -# endif -# define machine_is_em1sy() (machine_arch_type == MACH_TYPE_EM1SY) -#else -# define machine_is_em1sy() (0) -#endif - -#ifdef CONFIG_MACH_M502 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_M502 -# endif -# define machine_is_m502() (machine_arch_type == MACH_TYPE_M502) -#else -# define machine_is_m502() (0) -#endif - -#ifdef CONFIG_MACH_MATRIX518 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MATRIX518 -# endif -# define machine_is_matrix518() (machine_arch_type == MACH_TYPE_MATRIX518) -#else -# define machine_is_matrix518() (0) -#endif - -#ifdef CONFIG_MACH_TINY_GURNARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TINY_GURNARD -# endif -# define machine_is_tiny_gurnard() (machine_arch_type == MACH_TYPE_TINY_GURNARD) -#else -# define machine_is_tiny_gurnard() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR1310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR1310 -# endif -# define machine_is_spear1310() (machine_arch_type == MACH_TYPE_SPEAR1310) -#else -# define machine_is_spear1310() (0) -#endif - -#ifdef CONFIG_MACH_BV07 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BV07 -# endif -# define machine_is_bv07() (machine_arch_type == MACH_TYPE_BV07) -#else -# define machine_is_bv07() (0) -#endif - -#ifdef CONFIG_MACH_MXT_TD61 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MXT_TD61 -# endif -# define machine_is_mxt_td61() (machine_arch_type == MACH_TYPE_MXT_TD61) -#else -# define machine_is_mxt_td61() (0) -#endif - -#ifdef CONFIG_MACH_OPENRD_ULTIMATE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OPENRD_ULTIMATE -# endif -# define machine_is_openrd_ultimate() (machine_arch_type == MACH_TYPE_OPENRD_ULTIMATE) -#else -# define machine_is_openrd_ultimate() (0) -#endif - -#ifdef CONFIG_MACH_DEVIXP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEVIXP -# endif -# define machine_is_devixp() (machine_arch_type == MACH_TYPE_DEVIXP) -#else -# define machine_is_devixp() (0) -#endif - -#ifdef CONFIG_MACH_MICCPT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MICCPT -# endif -# define machine_is_miccpt() (machine_arch_type == MACH_TYPE_MICCPT) -#else -# define machine_is_miccpt() (0) -#endif - -#ifdef CONFIG_MACH_MIC256 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIC256 -# endif -# define machine_is_mic256() (machine_arch_type == MACH_TYPE_MIC256) -#else -# define machine_is_mic256() (0) -#endif - -#ifdef CONFIG_MACH_AS1167 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AS1167 -# endif -# define machine_is_as1167() (machine_arch_type == MACH_TYPE_AS1167) -#else -# define machine_is_as1167() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_IBIZA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_IBIZA -# endif -# define machine_is_omap3_ibiza() (machine_arch_type == MACH_TYPE_OMAP3_IBIZA) -#else -# define machine_is_omap3_ibiza() (0) -#endif - -#ifdef CONFIG_MACH_U5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_U5500 -# endif -# define machine_is_u5500() (machine_arch_type == MACH_TYPE_U5500) -#else -# define machine_is_u5500() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_PICTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_PICTO -# endif -# define machine_is_davinci_picto() (machine_arch_type == MACH_TYPE_DAVINCI_PICTO) -#else -# define machine_is_davinci_picto() (0) -#endif - -#ifdef CONFIG_MACH_MECHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MECHA -# endif -# define machine_is_mecha() (machine_arch_type == MACH_TYPE_MECHA) -#else -# define machine_is_mecha() (0) -#endif - -#ifdef CONFIG_MACH_BUBBA3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUBBA3 -# endif -# define machine_is_bubba3() (machine_arch_type == MACH_TYPE_BUBBA3) -#else -# define machine_is_bubba3() (0) -#endif - -#ifdef CONFIG_MACH_PUPITRE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PUPITRE -# endif -# define machine_is_pupitre() (machine_arch_type == MACH_TYPE_PUPITRE) -#else -# define machine_is_pupitre() (0) -#endif - -#ifdef CONFIG_MACH_TEGRA_HARMONY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEGRA_HARMONY -# endif -# define machine_is_tegra_harmony() (machine_arch_type == MACH_TYPE_TEGRA_HARMONY) -#else -# define machine_is_tegra_harmony() (0) -#endif - -#ifdef CONFIG_MACH_TEGRA_VOGUE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEGRA_VOGUE -# endif -# define machine_is_tegra_vogue() (machine_arch_type == MACH_TYPE_TEGRA_VOGUE) -#else -# define machine_is_tegra_vogue() (0) -#endif - -#ifdef CONFIG_MACH_TEGRA_E1165 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEGRA_E1165 -# endif -# define machine_is_tegra_e1165() (machine_arch_type == MACH_TYPE_TEGRA_E1165) -#else -# define machine_is_tegra_e1165() (0) -#endif - -#ifdef CONFIG_MACH_SIMPLENET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMPLENET -# endif -# define machine_is_simplenet() (machine_arch_type == MACH_TYPE_SIMPLENET) -#else -# define machine_is_simplenet() (0) -#endif - -#ifdef CONFIG_MACH_EC4350TBM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EC4350TBM -# endif -# define machine_is_ec4350tbm() (machine_arch_type == MACH_TYPE_EC4350TBM) -#else -# define machine_is_ec4350tbm() (0) -#endif - -#ifdef CONFIG_MACH_PEC_TC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PEC_TC -# endif -# define machine_is_pec_tc() (machine_arch_type == MACH_TYPE_PEC_TC) -#else -# define machine_is_pec_tc() (0) -#endif - -#ifdef CONFIG_MACH_PEC_HC2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PEC_HC2 -# endif -# define machine_is_pec_hc2() (machine_arch_type == MACH_TYPE_PEC_HC2) -#else -# define machine_is_pec_hc2() (0) -#endif - -#ifdef CONFIG_MACH_ESL_MOBILIS_A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_MOBILIS_A -# endif -# define machine_is_esl_mobilis_a() (machine_arch_type == MACH_TYPE_ESL_MOBILIS_A) -#else -# define machine_is_esl_mobilis_a() (0) -#endif - -#ifdef CONFIG_MACH_ESL_MOBILIS_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_MOBILIS_B -# endif -# define machine_is_esl_mobilis_b() (machine_arch_type == MACH_TYPE_ESL_MOBILIS_B) -#else -# define machine_is_esl_mobilis_b() (0) -#endif - -#ifdef CONFIG_MACH_ESL_WAVE_A -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_WAVE_A -# endif -# define machine_is_esl_wave_a() (machine_arch_type == MACH_TYPE_ESL_WAVE_A) -#else -# define machine_is_esl_wave_a() (0) -#endif - -#ifdef CONFIG_MACH_ESL_WAVE_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ESL_WAVE_B -# endif -# define machine_is_esl_wave_b() (machine_arch_type == MACH_TYPE_ESL_WAVE_B) -#else -# define machine_is_esl_wave_b() (0) -#endif - -#ifdef CONFIG_MACH_UNISENSE_MMM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNISENSE_MMM -# endif -# define machine_is_unisense_mmm() (machine_arch_type == MACH_TYPE_UNISENSE_MMM) -#else -# define machine_is_unisense_mmm() (0) -#endif - -#ifdef CONFIG_MACH_BLUESHARK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUESHARK -# endif -# define machine_is_blueshark() (machine_arch_type == MACH_TYPE_BLUESHARK) -#else -# define machine_is_blueshark() (0) -#endif - -#ifdef CONFIG_MACH_E10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_E10 -# endif -# define machine_is_e10() (machine_arch_type == MACH_TYPE_E10) -#else -# define machine_is_e10() (0) -#endif - -#ifdef CONFIG_MACH_APP3K_ROBIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_APP3K_ROBIN -# endif -# define machine_is_app3k_robin() (machine_arch_type == MACH_TYPE_APP3K_ROBIN) -#else -# define machine_is_app3k_robin() (0) -#endif - -#ifdef CONFIG_MACH_POV15HD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POV15HD -# endif -# define machine_is_pov15hd() (machine_arch_type == MACH_TYPE_POV15HD) -#else -# define machine_is_pov15hd() (0) -#endif - -#ifdef CONFIG_MACH_STELLA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STELLA -# endif -# define machine_is_stella() (machine_arch_type == MACH_TYPE_STELLA) -#else -# define machine_is_stella() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_LSCHL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_LSCHL -# endif -# define machine_is_linkstation_lschl() (machine_arch_type == MACH_TYPE_LINKSTATION_LSCHL) -#else -# define machine_is_linkstation_lschl() (0) -#endif - -#ifdef CONFIG_MACH_NETWALKER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETWALKER -# endif -# define machine_is_netwalker() (machine_arch_type == MACH_TYPE_NETWALKER) -#else -# define machine_is_netwalker() (0) -#endif - -#ifdef CONFIG_MACH_ACSX106 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACSX106 -# endif -# define machine_is_acsx106() (machine_arch_type == MACH_TYPE_ACSX106) -#else -# define machine_is_acsx106() (0) -#endif - -#ifdef CONFIG_MACH_ATLAS5_C1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATLAS5_C1 -# endif -# define machine_is_atlas5_c1() (machine_arch_type == MACH_TYPE_ATLAS5_C1) -#else -# define machine_is_atlas5_c1() (0) -#endif - -#ifdef CONFIG_MACH_NSB3AST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSB3AST -# endif -# define machine_is_nsb3ast() (machine_arch_type == MACH_TYPE_NSB3AST) -#else -# define machine_is_nsb3ast() (0) -#endif - -#ifdef CONFIG_MACH_GNET_SLC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_SLC -# endif -# define machine_is_gnet_slc() (machine_arch_type == MACH_TYPE_GNET_SLC) -#else -# define machine_is_gnet_slc() (0) -#endif - -#ifdef CONFIG_MACH_AF4000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AF4000 -# endif -# define machine_is_af4000() (machine_arch_type == MACH_TYPE_AF4000) -#else -# define machine_is_af4000() (0) -#endif - -#ifdef CONFIG_MACH_ARK9431 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARK9431 -# endif -# define machine_is_ark9431() (machine_arch_type == MACH_TYPE_ARK9431) -#else -# define machine_is_ark9431() (0) -#endif - -#ifdef CONFIG_MACH_FS_S5PC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FS_S5PC100 -# endif -# define machine_is_fs_s5pc100() (machine_arch_type == MACH_TYPE_FS_S5PC100) -#else -# define machine_is_fs_s5pc100() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3505NOVA8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3505NOVA8 -# endif -# define machine_is_omap3505nova8() (machine_arch_type == MACH_TYPE_OMAP3505NOVA8) -#else -# define machine_is_omap3505nova8() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3621_EDP1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3621_EDP1 -# endif -# define machine_is_omap3621_edp1() (machine_arch_type == MACH_TYPE_OMAP3621_EDP1) -#else -# define machine_is_omap3621_edp1() (0) -#endif - -#ifdef CONFIG_MACH_ORATISAES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISAES -# endif -# define machine_is_oratisaes() (machine_arch_type == MACH_TYPE_ORATISAES) -#else -# define machine_is_oratisaes() (0) -#endif - -#ifdef CONFIG_MACH_SMDKV310 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDKV310 -# endif -# define machine_is_smdkv310() (machine_arch_type == MACH_TYPE_SMDKV310) -#else -# define machine_is_smdkv310() (0) -#endif - -#ifdef CONFIG_MACH_SIEMENS_L0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIEMENS_L0 -# endif -# define machine_is_siemens_l0() (machine_arch_type == MACH_TYPE_SIEMENS_L0) -#else -# define machine_is_siemens_l0() (0) -#endif - -#ifdef CONFIG_MACH_VENTANA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VENTANA -# endif -# define machine_is_ventana() (machine_arch_type == MACH_TYPE_VENTANA) -#else -# define machine_is_ventana() (0) -#endif - -#ifdef CONFIG_MACH_WM8505_7IN_NETBOOK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WM8505_7IN_NETBOOK -# endif -# define machine_is_wm8505_7in_netbook() (machine_arch_type == MACH_TYPE_WM8505_7IN_NETBOOK) -#else -# define machine_is_wm8505_7in_netbook() (0) -#endif - -#ifdef CONFIG_MACH_EC4350SDB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EC4350SDB -# endif -# define machine_is_ec4350sdb() (machine_arch_type == MACH_TYPE_EC4350SDB) -#else -# define machine_is_ec4350sdb() (0) -#endif - -#ifdef CONFIG_MACH_MIMAS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIMAS -# endif -# define machine_is_mimas() (machine_arch_type == MACH_TYPE_MIMAS) -#else -# define machine_is_mimas() (0) -#endif - -#ifdef CONFIG_MACH_TITAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TITAN -# endif -# define machine_is_titan() (machine_arch_type == MACH_TYPE_TITAN) -#else -# define machine_is_titan() (0) -#endif - -#ifdef CONFIG_MACH_CRANEBOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CRANEBOARD -# endif -# define machine_is_craneboard() (machine_arch_type == MACH_TYPE_CRANEBOARD) -#else -# define machine_is_craneboard() (0) -#endif - -#ifdef CONFIG_MACH_ES2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ES2440 -# endif -# define machine_is_es2440() (machine_arch_type == MACH_TYPE_ES2440) -#else -# define machine_is_es2440() (0) -#endif - -#ifdef CONFIG_MACH_NAJAY_A9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAJAY_A9263 -# endif -# define machine_is_najay_a9263() (machine_arch_type == MACH_TYPE_NAJAY_A9263) -#else -# define machine_is_najay_a9263() (0) -#endif - -#ifdef CONFIG_MACH_HTCTORNADO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCTORNADO -# endif -# define machine_is_htctornado() (machine_arch_type == MACH_TYPE_HTCTORNADO) -#else -# define machine_is_htctornado() (0) -#endif - -#ifdef CONFIG_MACH_DIMM_MX257 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DIMM_MX257 -# endif -# define machine_is_dimm_mx257() (machine_arch_type == MACH_TYPE_DIMM_MX257) -#else -# define machine_is_dimm_mx257() (0) -#endif - -#ifdef CONFIG_MACH_JIGEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JIGEN -# endif -# define machine_is_jigen301() (machine_arch_type == MACH_TYPE_JIGEN) -#else -# define machine_is_jigen301() (0) -#endif - -#ifdef CONFIG_MACH_SMDK6450 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMDK6450 -# endif -# define machine_is_smdk6450() (machine_arch_type == MACH_TYPE_SMDK6450) -#else -# define machine_is_smdk6450() (0) -#endif - -#ifdef CONFIG_MACH_MENO_QNG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MENO_QNG -# endif -# define machine_is_meno_qng() (machine_arch_type == MACH_TYPE_MENO_QNG) -#else -# define machine_is_meno_qng() (0) -#endif - -#ifdef CONFIG_MACH_NS2416 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS2416 -# endif -# define machine_is_ns2416() (machine_arch_type == MACH_TYPE_NS2416) -#else -# define machine_is_ns2416() (0) -#endif - -#ifdef CONFIG_MACH_RPC353 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RPC353 -# endif -# define machine_is_rpc353() (machine_arch_type == MACH_TYPE_RPC353) -#else -# define machine_is_rpc353() (0) -#endif - -#ifdef CONFIG_MACH_TQ6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TQ6410 -# endif -# define machine_is_tq6410() (machine_arch_type == MACH_TYPE_TQ6410) -#else -# define machine_is_tq6410() (0) -#endif - -#ifdef CONFIG_MACH_SKY6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SKY6410 -# endif -# define machine_is_sky6410() (machine_arch_type == MACH_TYPE_SKY6410) -#else -# define machine_is_sky6410() (0) -#endif - -#ifdef CONFIG_MACH_DYNASTY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DYNASTY -# endif -# define machine_is_dynasty() (machine_arch_type == MACH_TYPE_DYNASTY) -#else -# define machine_is_dynasty() (0) -#endif - -#ifdef CONFIG_MACH_VIVO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VIVO -# endif -# define machine_is_vivo() (machine_arch_type == MACH_TYPE_VIVO) -#else -# define machine_is_vivo() (0) -#endif - -#ifdef CONFIG_MACH_BURY_BL7582 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BURY_BL7582 -# endif -# define machine_is_bury_bl7582() (machine_arch_type == MACH_TYPE_BURY_BL7582) -#else -# define machine_is_bury_bl7582() (0) -#endif - -#ifdef CONFIG_MACH_BURY_BPS5270 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BURY_BPS5270 -# endif -# define machine_is_bury_bps5270() (machine_arch_type == MACH_TYPE_BURY_BPS5270) -#else -# define machine_is_bury_bps5270() (0) -#endif - -#ifdef CONFIG_MACH_BASI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BASI -# endif -# define machine_is_basi() (machine_arch_type == MACH_TYPE_BASI) -#else -# define machine_is_basi() (0) -#endif - -#ifdef CONFIG_MACH_TN200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TN200 -# endif -# define machine_is_tn200() (machine_arch_type == MACH_TYPE_TN200) -#else -# define machine_is_tn200() (0) -#endif - -#ifdef CONFIG_MACH_C2MMI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_C2MMI -# endif -# define machine_is_c2mmi() (machine_arch_type == MACH_TYPE_C2MMI) -#else -# define machine_is_c2mmi() (0) -#endif - -#ifdef CONFIG_MACH_MESON_6236M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MESON_6236M -# endif -# define machine_is_meson_6236m() (machine_arch_type == MACH_TYPE_MESON_6236M) -#else -# define machine_is_meson_6236m() (0) -#endif - -#ifdef CONFIG_MACH_MESON_8626M -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MESON_8626M -# endif -# define machine_is_meson_8626m() (machine_arch_type == MACH_TYPE_MESON_8626M) -#else -# define machine_is_meson_8626m() (0) -#endif - -#ifdef CONFIG_MACH_TUBE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TUBE -# endif -# define machine_is_tube() (machine_arch_type == MACH_TYPE_TUBE) -#else -# define machine_is_tube() (0) -#endif - -#ifdef CONFIG_MACH_MESSINA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MESSINA -# endif -# define machine_is_messina() (machine_arch_type == MACH_TYPE_MESSINA) -#else -# define machine_is_messina() (0) -#endif - -#ifdef CONFIG_MACH_MX50_ARM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX50_ARM2 -# endif -# define machine_is_mx50_arm2() (machine_arch_type == MACH_TYPE_MX50_ARM2) -#else -# define machine_is_mx50_arm2() (0) -#endif - -#ifdef CONFIG_MACH_CETUS9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CETUS9263 -# endif -# define machine_is_cetus9263() (machine_arch_type == MACH_TYPE_CETUS9263) -#else -# define machine_is_cetus9263() (0) -#endif - -#ifdef CONFIG_MACH_BROWNSTONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BROWNSTONE -# endif -# define machine_is_brownstone() (machine_arch_type == MACH_TYPE_BROWNSTONE) -#else -# define machine_is_brownstone() (0) -#endif - -#ifdef CONFIG_MACH_VMX25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VMX25 -# endif -# define machine_is_vmx25() (machine_arch_type == MACH_TYPE_VMX25) -#else -# define machine_is_vmx25() (0) -#endif - -#ifdef CONFIG_MACH_VMX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VMX51 -# endif -# define machine_is_vmx51() (machine_arch_type == MACH_TYPE_VMX51) -#else -# define machine_is_vmx51() (0) -#endif - -#ifdef CONFIG_MACH_ABACUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ABACUS -# endif -# define machine_is_abacus() (machine_arch_type == MACH_TYPE_ABACUS) -#else -# define machine_is_abacus() (0) -#endif - -#ifdef CONFIG_MACH_CM4745 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM4745 -# endif -# define machine_is_cm4745() (machine_arch_type == MACH_TYPE_CM4745) -#else -# define machine_is_cm4745() (0) -#endif - -#ifdef CONFIG_MACH_ORATISLINK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISLINK -# endif -# define machine_is_oratislink() (machine_arch_type == MACH_TYPE_ORATISLINK) -#else -# define machine_is_oratislink() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM365_DVR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM365_DVR -# endif -# define machine_is_davinci_dm365_dvr() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_DVR) -#else -# define machine_is_davinci_dm365_dvr() (0) -#endif - -#ifdef CONFIG_MACH_NETVIZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETVIZ -# endif -# define machine_is_netviz() (machine_arch_type == MACH_TYPE_NETVIZ) -#else -# define machine_is_netviz() (0) -#endif - -#ifdef CONFIG_MACH_FLEXIBITY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLEXIBITY -# endif -# define machine_is_flexibity() (machine_arch_type == MACH_TYPE_FLEXIBITY) -#else -# define machine_is_flexibity() (0) -#endif - -#ifdef CONFIG_MACH_WLAN_COMPUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WLAN_COMPUTER -# endif -# define machine_is_wlan_computer() (machine_arch_type == MACH_TYPE_WLAN_COMPUTER) -#else -# define machine_is_wlan_computer() (0) -#endif - -#ifdef CONFIG_MACH_LPC24XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LPC24XX -# endif -# define machine_is_lpc24xx() (machine_arch_type == MACH_TYPE_LPC24XX) -#else -# define machine_is_lpc24xx() (0) -#endif - -#ifdef CONFIG_MACH_SPICA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPICA -# endif -# define machine_is_spica() (machine_arch_type == MACH_TYPE_SPICA) -#else -# define machine_is_spica() (0) -#endif - -#ifdef CONFIG_MACH_GPSDISPLAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GPSDISPLAY -# endif -# define machine_is_gpsdisplay() (machine_arch_type == MACH_TYPE_GPSDISPLAY) -#else -# define machine_is_gpsdisplay() (0) -#endif - -#ifdef CONFIG_MACH_BIPNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BIPNET -# endif -# define machine_is_bipnet() (machine_arch_type == MACH_TYPE_BIPNET) -#else -# define machine_is_bipnet() (0) -#endif - -#ifdef CONFIG_MACH_OVERO_CTU_INERTIAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OVERO_CTU_INERTIAL -# endif -# define machine_is_overo_ctu_inertial() (machine_arch_type == MACH_TYPE_OVERO_CTU_INERTIAL) -#else -# define machine_is_overo_ctu_inertial() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM355_MMM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM355_MMM -# endif -# define machine_is_davinci_dm355_mmm() (machine_arch_type == MACH_TYPE_DAVINCI_DM355_MMM) -#else -# define machine_is_davinci_dm355_mmm() (0) -#endif - -#ifdef CONFIG_MACH_PC9260_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PC9260_V2 -# endif -# define machine_is_pc9260_v2() (machine_arch_type == MACH_TYPE_PC9260_V2) -#else -# define machine_is_pc9260_v2() (0) -#endif - -#ifdef CONFIG_MACH_PTX7545 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PTX7545 -# endif -# define machine_is_ptx7545() (machine_arch_type == MACH_TYPE_PTX7545) -#else -# define machine_is_ptx7545() (0) -#endif - -#ifdef CONFIG_MACH_TM_EFDC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TM_EFDC -# endif -# define machine_is_tm_efdc() (machine_arch_type == MACH_TYPE_TM_EFDC) -#else -# define machine_is_tm_efdc() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_WALDO1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_WALDO1 -# endif -# define machine_is_omap3_waldo1() (machine_arch_type == MACH_TYPE_OMAP3_WALDO1) -#else -# define machine_is_omap3_waldo1() (0) -#endif - -#ifdef CONFIG_MACH_FLYER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FLYER -# endif -# define machine_is_flyer() (machine_arch_type == MACH_TYPE_FLYER) -#else -# define machine_is_flyer() (0) -#endif - -#ifdef CONFIG_MACH_TORNADO3240 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TORNADO3240 -# endif -# define machine_is_tornado3240() (machine_arch_type == MACH_TYPE_TORNADO3240) -#else -# define machine_is_tornado3240() (0) -#endif - -#ifdef CONFIG_MACH_SOLI_01 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOLI_01 -# endif -# define machine_is_soli_01() (machine_arch_type == MACH_TYPE_SOLI_01) -#else -# define machine_is_soli_01() (0) -#endif - -#ifdef CONFIG_MACH_OMAPL138_EUROPALC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAPL138_EUROPALC -# endif -# define machine_is_omapl138_europalc() (machine_arch_type == MACH_TYPE_OMAPL138_EUROPALC) -#else -# define machine_is_omapl138_europalc() (0) -#endif - -#ifdef CONFIG_MACH_HELIOS_V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HELIOS_V1 -# endif -# define machine_is_helios_v1() (machine_arch_type == MACH_TYPE_HELIOS_V1) -#else -# define machine_is_helios_v1() (0) -#endif - -#ifdef CONFIG_MACH_NETSPACE_LITE_V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NETSPACE_LITE_V2 -# endif -# define machine_is_netspace_lite_v2() (machine_arch_type == MACH_TYPE_NETSPACE_LITE_V2) -#else -# define machine_is_netspace_lite_v2() (0) -#endif - -#ifdef CONFIG_MACH_SSC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SSC -# endif -# define machine_is_ssc() (machine_arch_type == MACH_TYPE_SSC) -#else -# define machine_is_ssc() (0) -#endif - -#ifdef CONFIG_MACH_PREMIERWAVE_EN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PREMIERWAVE_EN -# endif -# define machine_is_premierwave_en() (machine_arch_type == MACH_TYPE_PREMIERWAVE_EN) -#else -# define machine_is_premierwave_en() (0) -#endif - -#ifdef CONFIG_MACH_WASABI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WASABI -# endif -# define machine_is_wasabi() (machine_arch_type == MACH_TYPE_WASABI) -#else -# define machine_is_wasabi() (0) -#endif - -#ifdef CONFIG_MACH_VIVOW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VIVOW -# endif -# define machine_is_vivow() (machine_arch_type == MACH_TYPE_VIVOW) -#else -# define machine_is_vivow() (0) -#endif - -#ifdef CONFIG_MACH_MX50_RDP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX50_RDP -# endif -# define machine_is_mx50_rdp() (machine_arch_type == MACH_TYPE_MX50_RDP) -#else -# define machine_is_mx50_rdp() (0) -#endif - -#ifdef CONFIG_MACH_UNIVERSAL_C210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNIVERSAL_C210 -# endif -# define machine_is_universal_c210() (machine_arch_type == MACH_TYPE_UNIVERSAL_C210) -#else -# define machine_is_universal_c210() (0) -#endif - -#ifdef CONFIG_MACH_REAL6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REAL6410 -# endif -# define machine_is_real6410() (machine_arch_type == MACH_TYPE_REAL6410) -#else -# define machine_is_real6410() (0) -#endif - -#ifdef CONFIG_MACH_SPX_SAKURA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPX_SAKURA -# endif -# define machine_is_spx_sakura() (machine_arch_type == MACH_TYPE_SPX_SAKURA) -#else -# define machine_is_spx_sakura() (0) -#endif - -#ifdef CONFIG_MACH_IJ3K_2440 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IJ3K_2440 -# endif -# define machine_is_ij3k_2440() (machine_arch_type == MACH_TYPE_IJ3K_2440) -#else -# define machine_is_ij3k_2440() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_BC10 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_BC10 -# endif -# define machine_is_omap3_bc10() (machine_arch_type == MACH_TYPE_OMAP3_BC10) -#else -# define machine_is_omap3_bc10() (0) -#endif - -#ifdef CONFIG_MACH_THEBE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_THEBE -# endif -# define machine_is_thebe() (machine_arch_type == MACH_TYPE_THEBE) -#else -# define machine_is_thebe() (0) -#endif - -#ifdef CONFIG_MACH_RV082 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RV082 -# endif -# define machine_is_rv082() (machine_arch_type == MACH_TYPE_RV082) -#else -# define machine_is_rv082() (0) -#endif - -#ifdef CONFIG_MACH_ARMLGUEST -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMLGUEST -# endif -# define machine_is_armlguest() (machine_arch_type == MACH_TYPE_ARMLGUEST) -#else -# define machine_is_armlguest() (0) -#endif - -#ifdef CONFIG_MACH_TJINC1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TJINC1000 -# endif -# define machine_is_tjinc1000() (machine_arch_type == MACH_TYPE_TJINC1000) -#else -# define machine_is_tjinc1000() (0) -#endif - -#ifdef CONFIG_MACH_DOCKSTAR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOCKSTAR -# endif -# define machine_is_dockstar() (machine_arch_type == MACH_TYPE_DOCKSTAR) -#else -# define machine_is_dockstar() (0) -#endif - -#ifdef CONFIG_MACH_AX8008 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AX8008 -# endif -# define machine_is_ax8008() (machine_arch_type == MACH_TYPE_AX8008) -#else -# define machine_is_ax8008() (0) -#endif - -#ifdef CONFIG_MACH_GNET_SGCE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GNET_SGCE -# endif -# define machine_is_gnet_sgce() (machine_arch_type == MACH_TYPE_GNET_SGCE) -#else -# define machine_is_gnet_sgce() (0) -#endif - -#ifdef CONFIG_MACH_PXWNAS_500_1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PXWNAS_500_1000 -# endif -# define machine_is_pxwnas_500_1000() (machine_arch_type == MACH_TYPE_PXWNAS_500_1000) -#else -# define machine_is_pxwnas_500_1000() (0) -#endif - -#ifdef CONFIG_MACH_EA20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EA20 -# endif -# define machine_is_ea20() (machine_arch_type == MACH_TYPE_EA20) -#else -# define machine_is_ea20() (0) -#endif - -#ifdef CONFIG_MACH_AWM2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AWM2 -# endif -# define machine_is_awm2() (machine_arch_type == MACH_TYPE_AWM2) -#else -# define machine_is_awm2() (0) -#endif - -#ifdef CONFIG_MACH_TI8148EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TI8148EVM -# endif -# define machine_is_ti8148evm() (machine_arch_type == MACH_TYPE_TI8148EVM) -#else -# define machine_is_ti8148evm() (0) -#endif - -#ifdef CONFIG_MACH_SEABOARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SEABOARD -# endif -# define machine_is_seaboard() (machine_arch_type == MACH_TYPE_SEABOARD) -#else -# define machine_is_seaboard() (0) -#endif - -#ifdef CONFIG_MACH_LINKSTATION_CHLV2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LINKSTATION_CHLV2 -# endif -# define machine_is_linkstation_chlv2() (machine_arch_type == MACH_TYPE_LINKSTATION_CHLV2) -#else -# define machine_is_linkstation_chlv2() (0) -#endif - -#ifdef CONFIG_MACH_TERA_PRO2_RACK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TERA_PRO2_RACK -# endif -# define machine_is_tera_pro2_rack() (machine_arch_type == MACH_TYPE_TERA_PRO2_RACK) -#else -# define machine_is_tera_pro2_rack() (0) -#endif - -#ifdef CONFIG_MACH_RUBYS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RUBYS -# endif -# define machine_is_rubys() (machine_arch_type == MACH_TYPE_RUBYS) -#else -# define machine_is_rubys() (0) -#endif - -#ifdef CONFIG_MACH_AQUARIUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AQUARIUS -# endif -# define machine_is_aquarius() (machine_arch_type == MACH_TYPE_AQUARIUS) -#else -# define machine_is_aquarius() (0) -#endif - -#ifdef CONFIG_MACH_MX53_ARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX53_ARD -# endif -# define machine_is_mx53_ard() (machine_arch_type == MACH_TYPE_MX53_ARD) -#else -# define machine_is_mx53_ard() (0) -#endif - -#ifdef CONFIG_MACH_MX53_SMD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX53_SMD -# endif -# define machine_is_mx53_smd() (machine_arch_type == MACH_TYPE_MX53_SMD) -#else -# define machine_is_mx53_smd() (0) -#endif - -#ifdef CONFIG_MACH_LSWXL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LSWXL -# endif -# define machine_is_lswxl() (machine_arch_type == MACH_TYPE_LSWXL) -#else -# define machine_is_lswxl() (0) -#endif - -#ifdef CONFIG_MACH_DOVE_AVNG_V3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOVE_AVNG_V3 -# endif -# define machine_is_dove_avng_v3() (machine_arch_type == MACH_TYPE_DOVE_AVNG_V3) -#else -# define machine_is_dove_avng_v3() (0) -#endif - -#ifdef CONFIG_MACH_SDI_ESS_9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SDI_ESS_9263 -# endif -# define machine_is_sdi_ess_9263() (machine_arch_type == MACH_TYPE_SDI_ESS_9263) -#else -# define machine_is_sdi_ess_9263() (0) -#endif - -#ifdef CONFIG_MACH_JOCPU550 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_JOCPU550 -# endif -# define machine_is_jocpu550() (machine_arch_type == MACH_TYPE_JOCPU550) -#else -# define machine_is_jocpu550() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_RUMI3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_RUMI3 -# endif -# define machine_is_msm8x60_rumi3() (machine_arch_type == MACH_TYPE_MSM8X60_RUMI3) -#else -# define machine_is_msm8x60_rumi3() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_FFA -# endif -# define machine_is_msm8x60_ffa() (machine_arch_type == MACH_TYPE_MSM8X60_FFA) -#else -# define machine_is_msm8x60_ffa() (0) -#endif - -#ifdef CONFIG_MACH_YANOMAMI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_YANOMAMI -# endif -# define machine_is_yanomami() (machine_arch_type == MACH_TYPE_YANOMAMI) -#else -# define machine_is_yanomami() (0) -#endif - -#ifdef CONFIG_MACH_GTA04 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GTA04 -# endif -# define machine_is_gta04() (machine_arch_type == MACH_TYPE_GTA04) -#else -# define machine_is_gta04() (0) -#endif - -#ifdef CONFIG_MACH_CM_A510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_A510 -# endif -# define machine_is_cm_a510() (machine_arch_type == MACH_TYPE_CM_A510) -#else -# define machine_is_cm_a510() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_RFS200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_RFS200 -# endif -# define machine_is_omap3_rfs200() (machine_arch_type == MACH_TYPE_OMAP3_RFS200) -#else -# define machine_is_omap3_rfs200() (0) -#endif - -#ifdef CONFIG_MACH_KX33XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KX33XX -# endif -# define machine_is_kx33xx() (machine_arch_type == MACH_TYPE_KX33XX) -#else -# define machine_is_kx33xx() (0) -#endif - -#ifdef CONFIG_MACH_PTX7510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PTX7510 -# endif -# define machine_is_ptx7510() (machine_arch_type == MACH_TYPE_PTX7510) -#else -# define machine_is_ptx7510() (0) -#endif - -#ifdef CONFIG_MACH_TOP9000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOP9000 -# endif -# define machine_is_top9000() (machine_arch_type == MACH_TYPE_TOP9000) -#else -# define machine_is_top9000() (0) -#endif - -#ifdef CONFIG_MACH_TEENOTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEENOTE -# endif -# define machine_is_teenote() (machine_arch_type == MACH_TYPE_TEENOTE) -#else -# define machine_is_teenote() (0) -#endif - -#ifdef CONFIG_MACH_TS3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS3 -# endif -# define machine_is_ts3() (machine_arch_type == MACH_TYPE_TS3) -#else -# define machine_is_ts3() (0) -#endif - -#ifdef CONFIG_MACH_A0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_A0 -# endif -# define machine_is_a0() (machine_arch_type == MACH_TYPE_A0) -#else -# define machine_is_a0() (0) -#endif - -#ifdef CONFIG_MACH_FSM9XXX_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FSM9XXX_SURF -# endif -# define machine_is_fsm9xxx_surf() (machine_arch_type == MACH_TYPE_FSM9XXX_SURF) -#else -# define machine_is_fsm9xxx_surf() (0) -#endif - -#ifdef CONFIG_MACH_FSM9XXX_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FSM9XXX_FFA -# endif -# define machine_is_fsm9xxx_ffa() (machine_arch_type == MACH_TYPE_FSM9XXX_FFA) -#else -# define machine_is_fsm9xxx_ffa() (0) -#endif - -#ifdef CONFIG_MACH_FRRHWCDMA60W -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FRRHWCDMA60W -# endif -# define machine_is_frrhwcdma60w() (machine_arch_type == MACH_TYPE_FRRHWCDMA60W) -#else -# define machine_is_frrhwcdma60w() (0) -#endif - -#ifdef CONFIG_MACH_REMUS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_REMUS -# endif -# define machine_is_remus() (machine_arch_type == MACH_TYPE_REMUS) -#else -# define machine_is_remus() (0) -#endif - -#ifdef CONFIG_MACH_AT91CAP7XDK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91CAP7XDK -# endif -# define machine_is_at91cap7xdk() (machine_arch_type == MACH_TYPE_AT91CAP7XDK) -#else -# define machine_is_at91cap7xdk() (0) -#endif - -#ifdef CONFIG_MACH_AT91CAP7STK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91CAP7STK -# endif -# define machine_is_at91cap7stk() (machine_arch_type == MACH_TYPE_AT91CAP7STK) -#else -# define machine_is_at91cap7stk() (0) -#endif - -#ifdef CONFIG_MACH_KT_SBC_SAM9_1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KT_SBC_SAM9_1 -# endif -# define machine_is_kt_sbc_sam9_1() (machine_arch_type == MACH_TYPE_KT_SBC_SAM9_1) -#else -# define machine_is_kt_sbc_sam9_1() (0) -#endif - -#ifdef CONFIG_MACH_ORATISROUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ORATISROUTER -# endif -# define machine_is_oratisrouter() (machine_arch_type == MACH_TYPE_ORATISROUTER) -#else -# define machine_is_oratisrouter() (0) -#endif - -#ifdef CONFIG_MACH_ARMADA_XP_DB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADA_XP_DB -# endif -# define machine_is_armada_xp_db() (machine_arch_type == MACH_TYPE_ARMADA_XP_DB) -#else -# define machine_is_armada_xp_db() (0) -#endif - -#ifdef CONFIG_MACH_SPDM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPDM -# endif -# define machine_is_spdm() (machine_arch_type == MACH_TYPE_SPDM) -#else -# define machine_is_spdm() (0) -#endif - -#ifdef CONFIG_MACH_GTIB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GTIB -# endif -# define machine_is_gtib() (machine_arch_type == MACH_TYPE_GTIB) -#else -# define machine_is_gtib() (0) -#endif - -#ifdef CONFIG_MACH_DGM3240 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DGM3240 -# endif -# define machine_is_dgm3240() (machine_arch_type == MACH_TYPE_DGM3240) -#else -# define machine_is_dgm3240() (0) -#endif - -#ifdef CONFIG_MACH_ATLAS_I_LPE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATLAS_I_LPE -# endif -# define machine_is_atlas_i_lpe() (machine_arch_type == MACH_TYPE_ATLAS_I_LPE) -#else -# define machine_is_atlas_i_lpe() (0) -#endif - -#ifdef CONFIG_MACH_HTCMEGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCMEGA -# endif -# define machine_is_htcmega() (machine_arch_type == MACH_TYPE_HTCMEGA) -#else -# define machine_is_htcmega() (0) -#endif - -#ifdef CONFIG_MACH_TRICORDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRICORDER -# endif -# define machine_is_tricorder() (machine_arch_type == MACH_TYPE_TRICORDER) -#else -# define machine_is_tricorder() (0) -#endif - -#ifdef CONFIG_MACH_TX28 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX28 -# endif -# define machine_is_tx28() (machine_arch_type == MACH_TYPE_TX28) -#else -# define machine_is_tx28() (0) -#endif - -#ifdef CONFIG_MACH_BSTBRD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BSTBRD -# endif -# define machine_is_bstbrd() (machine_arch_type == MACH_TYPE_BSTBRD) -#else -# define machine_is_bstbrd() (0) -#endif - -#ifdef CONFIG_MACH_PWB3090 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PWB3090 -# endif -# define machine_is_pwb3090() (machine_arch_type == MACH_TYPE_PWB3090) -#else -# define machine_is_pwb3090() (0) -#endif - -#ifdef CONFIG_MACH_IDEA6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IDEA6410 -# endif -# define machine_is_idea6410() (machine_arch_type == MACH_TYPE_IDEA6410) -#else -# define machine_is_idea6410() (0) -#endif - -#ifdef CONFIG_MACH_QBC9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QBC9263 -# endif -# define machine_is_qbc9263() (machine_arch_type == MACH_TYPE_QBC9263) -#else -# define machine_is_qbc9263() (0) -#endif - -#ifdef CONFIG_MACH_BORABORA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BORABORA -# endif -# define machine_is_borabora() (machine_arch_type == MACH_TYPE_BORABORA) -#else -# define machine_is_borabora() (0) -#endif - -#ifdef CONFIG_MACH_VALDEZ -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VALDEZ -# endif -# define machine_is_valdez() (machine_arch_type == MACH_TYPE_VALDEZ) -#else -# define machine_is_valdez() (0) -#endif - -#ifdef CONFIG_MACH_LS9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LS9G20 -# endif -# define machine_is_ls9g20() (machine_arch_type == MACH_TYPE_LS9G20) -#else -# define machine_is_ls9g20() (0) -#endif - -#ifdef CONFIG_MACH_MIOS_V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIOS_V1 -# endif -# define machine_is_mios_v1() (machine_arch_type == MACH_TYPE_MIOS_V1) -#else -# define machine_is_mios_v1() (0) -#endif - -#ifdef CONFIG_MACH_S5PC110_CRESPO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5PC110_CRESPO -# endif -# define machine_is_s5pc110_crespo() (machine_arch_type == MACH_TYPE_S5PC110_CRESPO) -#else -# define machine_is_s5pc110_crespo() (0) -#endif - -#ifdef CONFIG_MACH_CONTROLTEK9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CONTROLTEK9G20 -# endif -# define machine_is_controltek9g20() (machine_arch_type == MACH_TYPE_CONTROLTEK9G20) -#else -# define machine_is_controltek9g20() (0) -#endif - -#ifdef CONFIG_MACH_TIN307 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIN307 -# endif -# define machine_is_tin307() (machine_arch_type == MACH_TYPE_TIN307) -#else -# define machine_is_tin307() (0) -#endif - -#ifdef CONFIG_MACH_TIN510 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TIN510 -# endif -# define machine_is_tin510() (machine_arch_type == MACH_TYPE_TIN510) -#else -# define machine_is_tin510() (0) -#endif - -#ifdef CONFIG_MACH_BLUECHEESE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BLUECHEESE -# endif -# define machine_is_bluecheese() (machine_arch_type == MACH_TYPE_BLUECHEESE) -#else -# define machine_is_bluecheese() (0) -#endif - -#ifdef CONFIG_MACH_TEM3X30 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEM3X30 -# endif -# define machine_is_tem3x30() (machine_arch_type == MACH_TYPE_TEM3X30) -#else -# define machine_is_tem3x30() (0) -#endif - -#ifdef CONFIG_MACH_HARVEST_DESOTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HARVEST_DESOTO -# endif -# define machine_is_harvest_desoto() (machine_arch_type == MACH_TYPE_HARVEST_DESOTO) -#else -# define machine_is_harvest_desoto() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_QRDC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_QRDC -# endif -# define machine_is_msm8x60_qrdc() (machine_arch_type == MACH_TYPE_MSM8X60_QRDC) -#else -# define machine_is_msm8x60_qrdc() (0) -#endif - -#ifdef CONFIG_MACH_SPEAR900 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPEAR900 -# endif -# define machine_is_spear900() (machine_arch_type == MACH_TYPE_SPEAR900) -#else -# define machine_is_spear900() (0) -#endif - -#ifdef CONFIG_MACH_PCONTROL_G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCONTROL_G20 -# endif -# define machine_is_pcontrol_g20() (machine_arch_type == MACH_TYPE_PCONTROL_G20) -#else -# define machine_is_pcontrol_g20() (0) -#endif - -#ifdef CONFIG_MACH_RDSTOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RDSTOR -# endif -# define machine_is_rdstor() (machine_arch_type == MACH_TYPE_RDSTOR) -#else -# define machine_is_rdstor() (0) -#endif - -#ifdef CONFIG_MACH_USDLOADER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_USDLOADER -# endif -# define machine_is_usdloader() (machine_arch_type == MACH_TYPE_USDLOADER) -#else -# define machine_is_usdloader() (0) -#endif - -#ifdef CONFIG_MACH_TSOPLOADER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TSOPLOADER -# endif -# define machine_is_tsoploader() (machine_arch_type == MACH_TYPE_TSOPLOADER) -#else -# define machine_is_tsoploader() (0) -#endif - -#ifdef CONFIG_MACH_KRONOS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KRONOS -# endif -# define machine_is_kronos() (machine_arch_type == MACH_TYPE_KRONOS) -#else -# define machine_is_kronos() (0) -#endif - -#ifdef CONFIG_MACH_FFCORE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FFCORE -# endif -# define machine_is_ffcore() (machine_arch_type == MACH_TYPE_FFCORE) -#else -# define machine_is_ffcore() (0) -#endif - -#ifdef CONFIG_MACH_MONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MONE -# endif -# define machine_is_mone() (machine_arch_type == MACH_TYPE_MONE) -#else -# define machine_is_mone() (0) -#endif - -#ifdef CONFIG_MACH_UNIT2S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNIT2S -# endif -# define machine_is_unit2s() (machine_arch_type == MACH_TYPE_UNIT2S) -#else -# define machine_is_unit2s() (0) -#endif - -#ifdef CONFIG_MACH_ACER_A5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_A5 -# endif -# define machine_is_acer_a5() (machine_arch_type == MACH_TYPE_ACER_A5) -#else -# define machine_is_acer_a5() (0) -#endif - -#ifdef CONFIG_MACH_ETHERPRO_ISP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ETHERPRO_ISP -# endif -# define machine_is_etherpro_isp() (machine_arch_type == MACH_TYPE_ETHERPRO_ISP) -#else -# define machine_is_etherpro_isp() (0) -#endif - -#ifdef CONFIG_MACH_STRETCHS7000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STRETCHS7000 -# endif -# define machine_is_stretchs7000() (machine_arch_type == MACH_TYPE_STRETCHS7000) -#else -# define machine_is_stretchs7000() (0) -#endif - -#ifdef CONFIG_MACH_P87_SMARTSIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_P87_SMARTSIM -# endif -# define machine_is_p87_smartsim() (machine_arch_type == MACH_TYPE_P87_SMARTSIM) -#else -# define machine_is_p87_smartsim() (0) -#endif - -#ifdef CONFIG_MACH_TULIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TULIP -# endif -# define machine_is_tulip() (machine_arch_type == MACH_TYPE_TULIP) -#else -# define machine_is_tulip() (0) -#endif - -#ifdef CONFIG_MACH_SUNFLOWER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUNFLOWER -# endif -# define machine_is_sunflower() (machine_arch_type == MACH_TYPE_SUNFLOWER) -#else -# define machine_is_sunflower() (0) -#endif - -#ifdef CONFIG_MACH_RIB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIB -# endif -# define machine_is_rib() (machine_arch_type == MACH_TYPE_RIB) -#else -# define machine_is_rib() (0) -#endif - -#ifdef CONFIG_MACH_CLOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CLOD -# endif -# define machine_is_clod() (machine_arch_type == MACH_TYPE_CLOD) -#else -# define machine_is_clod() (0) -#endif - -#ifdef CONFIG_MACH_RUMP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RUMP -# endif -# define machine_is_rump() (machine_arch_type == MACH_TYPE_RUMP) -#else -# define machine_is_rump() (0) -#endif - -#ifdef CONFIG_MACH_TENDERLOIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TENDERLOIN -# endif -# define machine_is_tenderloin() (machine_arch_type == MACH_TYPE_TENDERLOIN) -#else -# define machine_is_tenderloin() (0) -#endif - -#ifdef CONFIG_MACH_SHORTLOIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHORTLOIN -# endif -# define machine_is_shortloin() (machine_arch_type == MACH_TYPE_SHORTLOIN) -#else -# define machine_is_shortloin() (0) -#endif - -#ifdef CONFIG_MACH_CRESPO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CRESPO -# endif -# define machine_is_crespo() (machine_arch_type == MACH_TYPE_CRESPO) -#else -# define machine_is_crespo() (0) -#endif - -#ifdef CONFIG_MACH_ANTARES -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANTARES -# endif -# define machine_is_antares() (machine_arch_type == MACH_TYPE_ANTARES) -#else -# define machine_is_antares() (0) -#endif - -#ifdef CONFIG_MACH_WB40N -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WB40N -# endif -# define machine_is_wb40n() (machine_arch_type == MACH_TYPE_WB40N) -#else -# define machine_is_wb40n() (0) -#endif - -#ifdef CONFIG_MACH_HERRING -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HERRING -# endif -# define machine_is_herring() (machine_arch_type == MACH_TYPE_HERRING) -#else -# define machine_is_herring() (0) -#endif - -#ifdef CONFIG_MACH_NAXY400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAXY400 -# endif -# define machine_is_naxy400() (machine_arch_type == MACH_TYPE_NAXY400) -#else -# define machine_is_naxy400() (0) -#endif - -#ifdef CONFIG_MACH_NAXY1200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAXY1200 -# endif -# define machine_is_naxy1200() (machine_arch_type == MACH_TYPE_NAXY1200) -#else -# define machine_is_naxy1200() (0) -#endif - -#ifdef CONFIG_MACH_VPR200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VPR200 -# endif -# define machine_is_vpr200() (machine_arch_type == MACH_TYPE_VPR200) -#else -# define machine_is_vpr200() (0) -#endif - -#ifdef CONFIG_MACH_BUG20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BUG20 -# endif -# define machine_is_bug20() (machine_arch_type == MACH_TYPE_BUG20) -#else -# define machine_is_bug20() (0) -#endif - -#ifdef CONFIG_MACH_GOFLEXNET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GOFLEXNET -# endif -# define machine_is_goflexnet() (machine_arch_type == MACH_TYPE_GOFLEXNET) -#else -# define machine_is_goflexnet() (0) -#endif - -#ifdef CONFIG_MACH_TORBRECK -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TORBRECK -# endif -# define machine_is_torbreck() (machine_arch_type == MACH_TYPE_TORBRECK) -#else -# define machine_is_torbreck() (0) -#endif - -#ifdef CONFIG_MACH_SAARB_MG1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAARB_MG1 -# endif -# define machine_is_saarb_mg1() (machine_arch_type == MACH_TYPE_SAARB_MG1) -#else -# define machine_is_saarb_mg1() (0) -#endif - -#ifdef CONFIG_MACH_CALLISTO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CALLISTO -# endif -# define machine_is_callisto() (machine_arch_type == MACH_TYPE_CALLISTO) -#else -# define machine_is_callisto() (0) -#endif - -#ifdef CONFIG_MACH_MULTHSU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MULTHSU -# endif -# define machine_is_multhsu() (machine_arch_type == MACH_TYPE_MULTHSU) -#else -# define machine_is_multhsu() (0) -#endif - -#ifdef CONFIG_MACH_SALUDA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SALUDA -# endif -# define machine_is_saluda() (machine_arch_type == MACH_TYPE_SALUDA) -#else -# define machine_is_saluda() (0) -#endif - -#ifdef CONFIG_MACH_PEMP_OMAP3_APOLLO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PEMP_OMAP3_APOLLO -# endif -# define machine_is_pemp_omap3_apollo() (machine_arch_type == MACH_TYPE_PEMP_OMAP3_APOLLO) -#else -# define machine_is_pemp_omap3_apollo() (0) -#endif - -#ifdef CONFIG_MACH_VC0718 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VC0718 -# endif -# define machine_is_vc0718() (machine_arch_type == MACH_TYPE_VC0718) -#else -# define machine_is_vc0718() (0) -#endif - -#ifdef CONFIG_MACH_MVBLX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MVBLX -# endif -# define machine_is_mvblx() (machine_arch_type == MACH_TYPE_MVBLX) -#else -# define machine_is_mvblx() (0) -#endif - -#ifdef CONFIG_MACH_INHAND_APEIRON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHAND_APEIRON -# endif -# define machine_is_inhand_apeiron() (machine_arch_type == MACH_TYPE_INHAND_APEIRON) -#else -# define machine_is_inhand_apeiron() (0) -#endif - -#ifdef CONFIG_MACH_INHAND_FURY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHAND_FURY -# endif -# define machine_is_inhand_fury() (machine_arch_type == MACH_TYPE_INHAND_FURY) -#else -# define machine_is_inhand_fury() (0) -#endif - -#ifdef CONFIG_MACH_INHAND_SIREN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_INHAND_SIREN -# endif -# define machine_is_inhand_siren() (machine_arch_type == MACH_TYPE_INHAND_SIREN) -#else -# define machine_is_inhand_siren() (0) -#endif - -#ifdef CONFIG_MACH_HDNVP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDNVP -# endif -# define machine_is_hdnvp() (machine_arch_type == MACH_TYPE_HDNVP) -#else -# define machine_is_hdnvp() (0) -#endif - -#ifdef CONFIG_MACH_SOFTWINNER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SOFTWINNER -# endif -# define machine_is_softwinner() (machine_arch_type == MACH_TYPE_SOFTWINNER) -#else -# define machine_is_softwinner() (0) -#endif - -#ifdef CONFIG_MACH_PRIMA2_EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PRIMA2_EVB -# endif -# define machine_is_prima2_evb() (machine_arch_type == MACH_TYPE_PRIMA2_EVB) -#else -# define machine_is_prima2_evb() (0) -#endif - -#ifdef CONFIG_MACH_NAS6210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAS6210 -# endif -# define machine_is_nas6210() (machine_arch_type == MACH_TYPE_NAS6210) -#else -# define machine_is_nas6210() (0) -#endif - -#ifdef CONFIG_MACH_UNISDEV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNISDEV -# endif -# define machine_is_unisdev() (machine_arch_type == MACH_TYPE_UNISDEV) -#else -# define machine_is_unisdev() (0) -#endif - -#ifdef CONFIG_MACH_SBCA11 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SBCA11 -# endif -# define machine_is_sbca11() (machine_arch_type == MACH_TYPE_SBCA11) -#else -# define machine_is_sbca11() (0) -#endif - -#ifdef CONFIG_MACH_SAGA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SAGA -# endif -# define machine_is_saga() (machine_arch_type == MACH_TYPE_SAGA) -#else -# define machine_is_saga() (0) -#endif - -#ifdef CONFIG_MACH_NS_K330 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS_K330 -# endif -# define machine_is_ns_k330() (machine_arch_type == MACH_TYPE_NS_K330) -#else -# define machine_is_ns_k330() (0) -#endif - -#ifdef CONFIG_MACH_TANNA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TANNA -# endif -# define machine_is_tanna() (machine_arch_type == MACH_TYPE_TANNA) -#else -# define machine_is_tanna() (0) -#endif - -#ifdef CONFIG_MACH_IMATE8502 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IMATE8502 -# endif -# define machine_is_imate8502() (machine_arch_type == MACH_TYPE_IMATE8502) -#else -# define machine_is_imate8502() (0) -#endif - -#ifdef CONFIG_MACH_ASPEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASPEN -# endif -# define machine_is_aspen() (machine_arch_type == MACH_TYPE_ASPEN) -#else -# define machine_is_aspen() (0) -#endif - -#ifdef CONFIG_MACH_DAINTREE_CWAC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAINTREE_CWAC -# endif -# define machine_is_daintree_cwac() (machine_arch_type == MACH_TYPE_DAINTREE_CWAC) -#else -# define machine_is_daintree_cwac() (0) -#endif - -#ifdef CONFIG_MACH_ZMX25 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ZMX25 -# endif -# define machine_is_zmx25() (machine_arch_type == MACH_TYPE_ZMX25) -#else -# define machine_is_zmx25() (0) -#endif - -#ifdef CONFIG_MACH_MAPLE1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAPLE1 -# endif -# define machine_is_maple1() (machine_arch_type == MACH_TYPE_MAPLE1) -#else -# define machine_is_maple1() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X72_SURF -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X72_SURF -# endif -# define machine_is_qsd8x72_surf() (machine_arch_type == MACH_TYPE_QSD8X72_SURF) -#else -# define machine_is_qsd8x72_surf() (0) -#endif - -#ifdef CONFIG_MACH_QSD8X72_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QSD8X72_FFA -# endif -# define machine_is_qsd8x72_ffa() (machine_arch_type == MACH_TYPE_QSD8X72_FFA) -#else -# define machine_is_qsd8x72_ffa() (0) -#endif - -#ifdef CONFIG_MACH_ABILENE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ABILENE -# endif -# define machine_is_abilene() (machine_arch_type == MACH_TYPE_ABILENE) -#else -# define machine_is_abilene() (0) -#endif - -#ifdef CONFIG_MACH_EIGEN_TTR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EIGEN_TTR -# endif -# define machine_is_eigen_ttr() (machine_arch_type == MACH_TYPE_EIGEN_TTR) -#else -# define machine_is_eigen_ttr() (0) -#endif - -#ifdef CONFIG_MACH_IOMEGA_IX2_200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IOMEGA_IX2_200 -# endif -# define machine_is_iomega_ix2_200() (machine_arch_type == MACH_TYPE_IOMEGA_IX2_200) -#else -# define machine_is_iomega_ix2_200() (0) -#endif - -#ifdef CONFIG_MACH_CORETEC_VCX7400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CORETEC_VCX7400 -# endif -# define machine_is_coretec_vcx7400() (machine_arch_type == MACH_TYPE_CORETEC_VCX7400) -#else -# define machine_is_coretec_vcx7400() (0) -#endif - -#ifdef CONFIG_MACH_SANTIAGO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SANTIAGO -# endif -# define machine_is_santiago() (machine_arch_type == MACH_TYPE_SANTIAGO) -#else -# define machine_is_santiago() (0) -#endif - -#ifdef CONFIG_MACH_MX257SOL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX257SOL -# endif -# define machine_is_mx257sol() (machine_arch_type == MACH_TYPE_MX257SOL) -#else -# define machine_is_mx257sol() (0) -#endif - -#ifdef CONFIG_MACH_STRASBOURG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STRASBOURG -# endif -# define machine_is_strasbourg() (machine_arch_type == MACH_TYPE_STRASBOURG) -#else -# define machine_is_strasbourg() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_FLUID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_FLUID -# endif -# define machine_is_msm8x60_fluid() (machine_arch_type == MACH_TYPE_MSM8X60_FLUID) -#else -# define machine_is_msm8x60_fluid() (0) -#endif - -#ifdef CONFIG_MACH_SMARTQV5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTQV5 -# endif -# define machine_is_smartqv5() (machine_arch_type == MACH_TYPE_SMARTQV5) -#else -# define machine_is_smartqv5() (0) -#endif - -#ifdef CONFIG_MACH_SMARTQV3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTQV3 -# endif -# define machine_is_smartqv3() (machine_arch_type == MACH_TYPE_SMARTQV3) -#else -# define machine_is_smartqv3() (0) -#endif - -#ifdef CONFIG_MACH_SMARTQV7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SMARTQV7 -# endif -# define machine_is_smartqv7() (machine_arch_type == MACH_TYPE_SMARTQV7) -#else -# define machine_is_smartqv7() (0) -#endif - -#ifdef CONFIG_MACH_PAZ00 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PAZ00 -# endif -# define machine_is_paz00() (machine_arch_type == MACH_TYPE_PAZ00) -#else -# define machine_is_paz00() (0) -#endif - -#ifdef CONFIG_MACH_ACMENETUSFOXG20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACMENETUSFOXG20 -# endif -# define machine_is_acmenetusfoxg20() (machine_arch_type == MACH_TYPE_ACMENETUSFOXG20) -#else -# define machine_is_acmenetusfoxg20() (0) -#endif - -#ifdef CONFIG_MACH_HTCWILLOW -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTCWILLOW -# endif -# define machine_is_htcwillow() (machine_arch_type == MACH_TYPE_HTCWILLOW) -#else -# define machine_is_htcwillow() (0) -#endif - -#ifdef CONFIG_MACH_FWBD_0404 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FWBD_0404 -# endif -# define machine_is_fwbd_0404() (machine_arch_type == MACH_TYPE_FWBD_0404) -#else -# define machine_is_fwbd_0404() (0) -#endif - -#ifdef CONFIG_MACH_HDGU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDGU -# endif -# define machine_is_hdgu() (machine_arch_type == MACH_TYPE_HDGU) -#else -# define machine_is_hdgu() (0) -#endif - -#ifdef CONFIG_MACH_PYRAMID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PYRAMID -# endif -# define machine_is_pyramid() (machine_arch_type == MACH_TYPE_PYRAMID) -#else -# define machine_is_pyramid() (0) -#endif - -#ifdef CONFIG_MACH_EPIPHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EPIPHAN -# endif -# define machine_is_epiphan() (machine_arch_type == MACH_TYPE_EPIPHAN) -#else -# define machine_is_epiphan() (0) -#endif - -#ifdef CONFIG_MACH_OMAP_BENDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP_BENDER -# endif -# define machine_is_omap_bender() (machine_arch_type == MACH_TYPE_OMAP_BENDER) -#else -# define machine_is_omap_bender() (0) -#endif - -#ifdef CONFIG_MACH_GURNARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GURNARD -# endif -# define machine_is_gurnard() (machine_arch_type == MACH_TYPE_GURNARD) -#else -# define machine_is_gurnard() (0) -#endif - -#ifdef CONFIG_MACH_GTL_IT5100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GTL_IT5100 -# endif -# define machine_is_gtl_it5100() (machine_arch_type == MACH_TYPE_GTL_IT5100) -#else -# define machine_is_gtl_it5100() (0) -#endif - -#ifdef CONFIG_MACH_BCM2708 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCM2708 -# endif -# define machine_is_bcm2708() (machine_arch_type == MACH_TYPE_BCM2708) -#else -# define machine_is_bcm2708() (0) -#endif - -#ifdef CONFIG_MACH_MX51_GGC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_GGC -# endif -# define machine_is_mx51_ggc() (machine_arch_type == MACH_TYPE_MX51_GGC) -#else -# define machine_is_mx51_ggc() (0) -#endif - -#ifdef CONFIG_MACH_SHARESPACE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHARESPACE -# endif -# define machine_is_sharespace() (machine_arch_type == MACH_TYPE_SHARESPACE) -#else -# define machine_is_sharespace() (0) -#endif - -#ifdef CONFIG_MACH_HABA_KNX_EXPLORER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HABA_KNX_EXPLORER -# endif -# define machine_is_haba_knx_explorer() (machine_arch_type == MACH_TYPE_HABA_KNX_EXPLORER) -#else -# define machine_is_haba_knx_explorer() (0) -#endif - -#ifdef CONFIG_MACH_SIMTEC_KIRKMOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SIMTEC_KIRKMOD -# endif -# define machine_is_simtec_kirkmod() (machine_arch_type == MACH_TYPE_SIMTEC_KIRKMOD) -#else -# define machine_is_simtec_kirkmod() (0) -#endif - -#ifdef CONFIG_MACH_CRUX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CRUX -# endif -# define machine_is_crux() (machine_arch_type == MACH_TYPE_CRUX) -#else -# define machine_is_crux() (0) -#endif - -#ifdef CONFIG_MACH_MX51_BRAVO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX51_BRAVO -# endif -# define machine_is_mx51_bravo() (machine_arch_type == MACH_TYPE_MX51_BRAVO) -#else -# define machine_is_mx51_bravo() (0) -#endif - -#ifdef CONFIG_MACH_CHARON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHARON -# endif -# define machine_is_charon() (machine_arch_type == MACH_TYPE_CHARON) -#else -# define machine_is_charon() (0) -#endif - -#ifdef CONFIG_MACH_PICOCOM3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOCOM3 -# endif -# define machine_is_picocom3() (machine_arch_type == MACH_TYPE_PICOCOM3) -#else -# define machine_is_picocom3() (0) -#endif - -#ifdef CONFIG_MACH_PICOCOM4 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PICOCOM4 -# endif -# define machine_is_picocom4() (machine_arch_type == MACH_TYPE_PICOCOM4) -#else -# define machine_is_picocom4() (0) -#endif - -#ifdef CONFIG_MACH_SERRANO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SERRANO -# endif -# define machine_is_serrano() (machine_arch_type == MACH_TYPE_SERRANO) -#else -# define machine_is_serrano() (0) -#endif - -#ifdef CONFIG_MACH_DOUBLESHOT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DOUBLESHOT -# endif -# define machine_is_doubleshot() (machine_arch_type == MACH_TYPE_DOUBLESHOT) -#else -# define machine_is_doubleshot() (0) -#endif - -#ifdef CONFIG_MACH_EVSY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EVSY -# endif -# define machine_is_evsy() (machine_arch_type == MACH_TYPE_EVSY) -#else -# define machine_is_evsy() (0) -#endif - -#ifdef CONFIG_MACH_HUASHAN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HUASHAN -# endif -# define machine_is_huashan() (machine_arch_type == MACH_TYPE_HUASHAN) -#else -# define machine_is_huashan() (0) -#endif - -#ifdef CONFIG_MACH_LAUSANNE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LAUSANNE -# endif -# define machine_is_lausanne() (machine_arch_type == MACH_TYPE_LAUSANNE) -#else -# define machine_is_lausanne() (0) -#endif - -#ifdef CONFIG_MACH_EMERALD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EMERALD -# endif -# define machine_is_emerald() (machine_arch_type == MACH_TYPE_EMERALD) -#else -# define machine_is_emerald() (0) -#endif - -#ifdef CONFIG_MACH_TQMA35 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TQMA35 -# endif -# define machine_is_tqma35() (machine_arch_type == MACH_TYPE_TQMA35) -#else -# define machine_is_tqma35() (0) -#endif - -#ifdef CONFIG_MACH_MARVEL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARVEL -# endif -# define machine_is_marvel() (machine_arch_type == MACH_TYPE_MARVEL) -#else -# define machine_is_marvel() (0) -#endif - -#ifdef CONFIG_MACH_MANUAE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MANUAE -# endif -# define machine_is_manuae() (machine_arch_type == MACH_TYPE_MANUAE) -#else -# define machine_is_manuae() (0) -#endif - -#ifdef CONFIG_MACH_CHACHA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHACHA -# endif -# define machine_is_chacha() (machine_arch_type == MACH_TYPE_CHACHA) -#else -# define machine_is_chacha() (0) -#endif - -#ifdef CONFIG_MACH_LEMON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEMON -# endif -# define machine_is_lemon() (machine_arch_type == MACH_TYPE_LEMON) -#else -# define machine_is_lemon() (0) -#endif - -#ifdef CONFIG_MACH_CSC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CSC -# endif -# define machine_is_csc() (machine_arch_type == MACH_TYPE_CSC) -#else -# define machine_is_csc() (0) -#endif - -#ifdef CONFIG_MACH_GIRA_KNXIP_ROUTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GIRA_KNXIP_ROUTER -# endif -# define machine_is_gira_knxip_router() (machine_arch_type == MACH_TYPE_GIRA_KNXIP_ROUTER) -#else -# define machine_is_gira_knxip_router() (0) -#endif - -#ifdef CONFIG_MACH_T20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T20 -# endif -# define machine_is_t20() (machine_arch_type == MACH_TYPE_T20) -#else -# define machine_is_t20() (0) -#endif - -#ifdef CONFIG_MACH_HDMINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HDMINI -# endif -# define machine_is_hdmini() (machine_arch_type == MACH_TYPE_HDMINI) -#else -# define machine_is_hdmini() (0) -#endif - -#ifdef CONFIG_MACH_SCIPHONE_G2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SCIPHONE_G2 -# endif -# define machine_is_sciphone_g2() (machine_arch_type == MACH_TYPE_SCIPHONE_G2) -#else -# define machine_is_sciphone_g2() (0) -#endif - -#ifdef CONFIG_MACH_EXPRESS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXPRESS -# endif -# define machine_is_express() (machine_arch_type == MACH_TYPE_EXPRESS) -#else -# define machine_is_express() (0) -#endif - -#ifdef CONFIG_MACH_EXPRESS_KT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EXPRESS_KT -# endif -# define machine_is_express_kt() (machine_arch_type == MACH_TYPE_EXPRESS_KT) -#else -# define machine_is_express_kt() (0) -#endif - -#ifdef CONFIG_MACH_MAXIMASP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MAXIMASP -# endif -# define machine_is_maximasp() (machine_arch_type == MACH_TYPE_MAXIMASP) -#else -# define machine_is_maximasp() (0) -#endif - -#ifdef CONFIG_MACH_NITROGEN_IMX51 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NITROGEN_IMX51 -# endif -# define machine_is_nitrogen_imx51() (machine_arch_type == MACH_TYPE_NITROGEN_IMX51) -#else -# define machine_is_nitrogen_imx51() (0) -#endif - -#ifdef CONFIG_MACH_NITROGEN_IMX53 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NITROGEN_IMX53 -# endif -# define machine_is_nitrogen_imx53() (machine_arch_type == MACH_TYPE_NITROGEN_IMX53) -#else -# define machine_is_nitrogen_imx53() (0) -#endif - -#ifdef CONFIG_MACH_SUNFIRE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SUNFIRE -# endif -# define machine_is_sunfire() (machine_arch_type == MACH_TYPE_SUNFIRE) -#else -# define machine_is_sunfire() (0) -#endif - -#ifdef CONFIG_MACH_AROWANA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AROWANA -# endif -# define machine_is_arowana() (machine_arch_type == MACH_TYPE_AROWANA) -#else -# define machine_is_arowana() (0) -#endif - -#ifdef CONFIG_MACH_TEGRA_DAYTONA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEGRA_DAYTONA -# endif -# define machine_is_tegra_daytona() (machine_arch_type == MACH_TYPE_TEGRA_DAYTONA) -#else -# define machine_is_tegra_daytona() (0) -#endif - -#ifdef CONFIG_MACH_TEGRA_SWORDFISH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TEGRA_SWORDFISH -# endif -# define machine_is_tegra_swordfish() (machine_arch_type == MACH_TYPE_TEGRA_SWORDFISH) -#else -# define machine_is_tegra_swordfish() (0) -#endif - -#ifdef CONFIG_MACH_EDISON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_EDISON -# endif -# define machine_is_edison() (machine_arch_type == MACH_TYPE_EDISON) -#else -# define machine_is_edison() (0) -#endif - -#ifdef CONFIG_MACH_SVP8500V1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVP8500V1 -# endif -# define machine_is_svp8500v1() (machine_arch_type == MACH_TYPE_SVP8500V1) -#else -# define machine_is_svp8500v1() (0) -#endif - -#ifdef CONFIG_MACH_SVP8500V2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVP8500V2 -# endif -# define machine_is_svp8500v2() (machine_arch_type == MACH_TYPE_SVP8500V2) -#else -# define machine_is_svp8500v2() (0) -#endif - -#ifdef CONFIG_MACH_SVP5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVP5500 -# endif -# define machine_is_svp5500() (machine_arch_type == MACH_TYPE_SVP5500) -#else -# define machine_is_svp5500() (0) -#endif - -#ifdef CONFIG_MACH_B5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_B5500 -# endif -# define machine_is_b5500() (machine_arch_type == MACH_TYPE_B5500) -#else -# define machine_is_b5500() (0) -#endif - -#ifdef CONFIG_MACH_S5500 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_S5500 -# endif -# define machine_is_s5500() (machine_arch_type == MACH_TYPE_S5500) -#else -# define machine_is_s5500() (0) -#endif - -#ifdef CONFIG_MACH_ICON -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICON -# endif -# define machine_is_icon() (machine_arch_type == MACH_TYPE_ICON) -#else -# define machine_is_icon() (0) -#endif - -#ifdef CONFIG_MACH_ELEPHANT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ELEPHANT -# endif -# define machine_is_elephant() (machine_arch_type == MACH_TYPE_ELEPHANT) -#else -# define machine_is_elephant() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_FUSION -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_FUSION -# endif -# define machine_is_msm8x60_fusion() (machine_arch_type == MACH_TYPE_MSM8X60_FUSION) -#else -# define machine_is_msm8x60_fusion() (0) -#endif - -#ifdef CONFIG_MACH_SHOOTER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHOOTER -# endif -# define machine_is_shooter() (machine_arch_type == MACH_TYPE_SHOOTER) -#else -# define machine_is_shooter() (0) -#endif - -#ifdef CONFIG_MACH_SPADE_LTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPADE_LTE -# endif -# define machine_is_spade_lte() (machine_arch_type == MACH_TYPE_SPADE_LTE) -#else -# define machine_is_spade_lte() (0) -#endif - -#ifdef CONFIG_MACH_PHILHWANI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PHILHWANI -# endif -# define machine_is_philhwani() (machine_arch_type == MACH_TYPE_PHILHWANI) -#else -# define machine_is_philhwani() (0) -#endif - -#ifdef CONFIG_MACH_GSNCOMM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GSNCOMM -# endif -# define machine_is_gsncomm() (machine_arch_type == MACH_TYPE_GSNCOMM) -#else -# define machine_is_gsncomm() (0) -#endif - -#ifdef CONFIG_MACH_STRASBOURG_A2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_STRASBOURG_A2 -# endif -# define machine_is_strasbourg_a2() (machine_arch_type == MACH_TYPE_STRASBOURG_A2) -#else -# define machine_is_strasbourg_a2() (0) -#endif - -#ifdef CONFIG_MACH_MMM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MMM -# endif -# define machine_is_mmm() (machine_arch_type == MACH_TYPE_MMM) -#else -# define machine_is_mmm() (0) -#endif - -#ifdef CONFIG_MACH_DAVINCI_DM365_BV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DAVINCI_DM365_BV -# endif -# define machine_is_davinci_dm365_bv() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_BV) -#else -# define machine_is_davinci_dm365_bv() (0) -#endif - -#ifdef CONFIG_MACH_AG5EVM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AG5EVM -# endif -# define machine_is_ag5evm() (machine_arch_type == MACH_TYPE_AG5EVM) -#else -# define machine_is_ag5evm() (0) -#endif - -#ifdef CONFIG_MACH_SC575PLC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SC575PLC -# endif -# define machine_is_sc575plc() (machine_arch_type == MACH_TYPE_SC575PLC) -#else -# define machine_is_sc575plc() (0) -#endif - -#ifdef CONFIG_MACH_SC575IPC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SC575IPC -# endif -# define machine_is_sc575hmi() (machine_arch_type == MACH_TYPE_SC575IPC) -#else -# define machine_is_sc575hmi() (0) -#endif - -#ifdef CONFIG_MACH_OMAP3_TDM3730 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAP3_TDM3730 -# endif -# define machine_is_omap3_tdm3730() (machine_arch_type == MACH_TYPE_OMAP3_TDM3730) -#else -# define machine_is_omap3_tdm3730() (0) -#endif - -#ifdef CONFIG_MACH_G7 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_G7 -# endif -# define machine_is_g7() (machine_arch_type == MACH_TYPE_G7) -#else -# define machine_is_g7() (0) -#endif - -#ifdef CONFIG_MACH_TOP9000_EVAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOP9000_EVAL -# endif -# define machine_is_top9000_eval() (machine_arch_type == MACH_TYPE_TOP9000_EVAL) -#else -# define machine_is_top9000_eval() (0) -#endif - -#ifdef CONFIG_MACH_TOP9000_SU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOP9000_SU -# endif -# define machine_is_top9000_su() (machine_arch_type == MACH_TYPE_TOP9000_SU) -#else -# define machine_is_top9000_su() (0) -#endif - -#ifdef CONFIG_MACH_UTM300 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UTM300 -# endif -# define machine_is_utm300() (machine_arch_type == MACH_TYPE_UTM300) -#else -# define machine_is_utm300() (0) -#endif - -#ifdef CONFIG_MACH_TSUNAGI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TSUNAGI -# endif -# define machine_is_tsunagi() (machine_arch_type == MACH_TYPE_TSUNAGI) -#else -# define machine_is_tsunagi() (0) -#endif - -#ifdef CONFIG_MACH_TS75XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS75XX -# endif -# define machine_is_ts75xx() (machine_arch_type == MACH_TYPE_TS75XX) -#else -# define machine_is_ts75xx() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_FUSN_FFA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_FUSN_FFA -# endif -# define machine_is_msm8x60_fusn_ffa() (machine_arch_type == MACH_TYPE_MSM8X60_FUSN_FFA) -#else -# define machine_is_msm8x60_fusn_ffa() (0) -#endif - -#ifdef CONFIG_MACH_TS47XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS47XX -# endif -# define machine_is_ts47xx() (machine_arch_type == MACH_TYPE_TS47XX) -#else -# define machine_is_ts47xx() (0) -#endif - -#ifdef CONFIG_MACH_DA850_K5 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DA850_K5 -# endif -# define machine_is_da850_k5() (machine_arch_type == MACH_TYPE_DA850_K5) -#else -# define machine_is_da850_k5() (0) -#endif - -#ifdef CONFIG_MACH_AX502 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AX502 -# endif -# define machine_is_ax502() (machine_arch_type == MACH_TYPE_AX502) -#else -# define machine_is_ax502() (0) -#endif - -#ifdef CONFIG_MACH_IGEP0032 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_IGEP0032 -# endif -# define machine_is_igep0032() (machine_arch_type == MACH_TYPE_IGEP0032) -#else -# define machine_is_igep0032() (0) -#endif - -#ifdef CONFIG_MACH_ANTERO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANTERO -# endif -# define machine_is_antero() (machine_arch_type == MACH_TYPE_ANTERO) -#else -# define machine_is_antero() (0) -#endif - -#ifdef CONFIG_MACH_SYNERGY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SYNERGY -# endif -# define machine_is_synergy() (machine_arch_type == MACH_TYPE_SYNERGY) -#else -# define machine_is_synergy() (0) -#endif - -#ifdef CONFIG_MACH_ICS_IF_VOIP -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICS_IF_VOIP -# endif -# define machine_is_ics_if_voip() (machine_arch_type == MACH_TYPE_ICS_IF_VOIP) -#else -# define machine_is_ics_if_voip() (0) -#endif - -#ifdef CONFIG_MACH_WLF_CRAGG_6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WLF_CRAGG_6410 -# endif -# define machine_is_wlf_cragg_6410() (machine_arch_type == MACH_TYPE_WLF_CRAGG_6410) -#else -# define machine_is_wlf_cragg_6410() (0) -#endif - -#ifdef CONFIG_MACH_PUNICA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PUNICA -# endif -# define machine_is_punica() (machine_arch_type == MACH_TYPE_PUNICA) -#else -# define machine_is_punica() (0) -#endif - -#ifdef CONFIG_MACH_TRIMSLICE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TRIMSLICE -# endif -# define machine_is_trimslice() (machine_arch_type == MACH_TYPE_TRIMSLICE) -#else -# define machine_is_trimslice() (0) -#endif - -#ifdef CONFIG_MACH_MX27_WMULTRA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX27_WMULTRA -# endif -# define machine_is_mx27_wmultra() (machine_arch_type == MACH_TYPE_MX27_WMULTRA) -#else -# define machine_is_mx27_wmultra() (0) -#endif - -#ifdef CONFIG_MACH_MACKEREL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MACKEREL -# endif -# define machine_is_mackerel() (machine_arch_type == MACH_TYPE_MACKEREL) -#else -# define machine_is_mackerel() (0) -#endif - -#ifdef CONFIG_MACH_FA9X27 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_FA9X27 -# endif -# define machine_is_fa9x27() (machine_arch_type == MACH_TYPE_FA9X27) -#else -# define machine_is_fa9x27() (0) -#endif - -#ifdef CONFIG_MACH_NS2816TB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS2816TB -# endif -# define machine_is_ns2816tb() (machine_arch_type == MACH_TYPE_NS2816TB) -#else -# define machine_is_ns2816tb() (0) -#endif - -#ifdef CONFIG_MACH_NS2816_NTPAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS2816_NTPAD -# endif -# define machine_is_ns2816_ntpad() (machine_arch_type == MACH_TYPE_NS2816_NTPAD) -#else -# define machine_is_ns2816_ntpad() (0) -#endif - -#ifdef CONFIG_MACH_NS2816_NTNB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NS2816_NTNB -# endif -# define machine_is_ns2816_ntnb() (machine_arch_type == MACH_TYPE_NS2816_NTNB) -#else -# define machine_is_ns2816_ntnb() (0) -#endif - -#ifdef CONFIG_MACH_KAEN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KAEN -# endif -# define machine_is_kaen() (machine_arch_type == MACH_TYPE_KAEN) -#else -# define machine_is_kaen() (0) -#endif - -#ifdef CONFIG_MACH_NV1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NV1000 -# endif -# define machine_is_nv1000() (machine_arch_type == MACH_TYPE_NV1000) -#else -# define machine_is_nv1000() (0) -#endif - -#ifdef CONFIG_MACH_NUC950TS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NUC950TS -# endif -# define machine_is_nuc950ts() (machine_arch_type == MACH_TYPE_NUC950TS) -#else -# define machine_is_nuc950ts() (0) -#endif - -#ifdef CONFIG_MACH_NOKIA_RM680 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOKIA_RM680 -# endif -# define machine_is_nokia_rm680() (machine_arch_type == MACH_TYPE_NOKIA_RM680) -#else -# define machine_is_nokia_rm680() (0) -#endif - -#ifdef CONFIG_MACH_AST2200 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AST2200 -# endif -# define machine_is_ast2200() (machine_arch_type == MACH_TYPE_AST2200) -#else -# define machine_is_ast2200() (0) -#endif - -#ifdef CONFIG_MACH_LEAD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEAD -# endif -# define machine_is_lead() (machine_arch_type == MACH_TYPE_LEAD) -#else -# define machine_is_lead() (0) -#endif - -#ifdef CONFIG_MACH_UNINO1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UNINO1 -# endif -# define machine_is_unino1() (machine_arch_type == MACH_TYPE_UNINO1) -#else -# define machine_is_unino1() (0) -#endif - -#ifdef CONFIG_MACH_GREECO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GREECO -# endif -# define machine_is_greeco() (machine_arch_type == MACH_TYPE_GREECO) -#else -# define machine_is_greeco() (0) -#endif - -#ifdef CONFIG_MACH_VERDI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VERDI -# endif -# define machine_is_verdi() (machine_arch_type == MACH_TYPE_VERDI) -#else -# define machine_is_verdi() (0) -#endif - -#ifdef CONFIG_MACH_DM6446_ADBOX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM6446_ADBOX -# endif -# define machine_is_dm6446_adbox() (machine_arch_type == MACH_TYPE_DM6446_ADBOX) -#else -# define machine_is_dm6446_adbox() (0) -#endif - -#ifdef CONFIG_MACH_QUAD_SALSA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_QUAD_SALSA -# endif -# define machine_is_quad_salsa() (machine_arch_type == MACH_TYPE_QUAD_SALSA) -#else -# define machine_is_quad_salsa() (0) -#endif - -#ifdef CONFIG_MACH_ABB_GMA_1_1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ABB_GMA_1_1 -# endif -# define machine_is_abb_gma_1_1() (machine_arch_type == MACH_TYPE_ABB_GMA_1_1) -#else -# define machine_is_abb_gma_1_1() (0) -#endif - -#ifdef CONFIG_MACH_SVCID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SVCID -# endif -# define machine_is_svcid() (machine_arch_type == MACH_TYPE_SVCID) -#else -# define machine_is_svcid() (0) -#endif - -#ifdef CONFIG_MACH_MSM8960_SIM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8960_SIM -# endif -# define machine_is_msm8960_sim() (machine_arch_type == MACH_TYPE_MSM8960_SIM) -#else -# define machine_is_msm8960_sim() (0) -#endif - -#ifdef CONFIG_MACH_MSM8960_RUMI3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8960_RUMI3 -# endif -# define machine_is_msm8960_rumi3() (machine_arch_type == MACH_TYPE_MSM8960_RUMI3) -#else -# define machine_is_msm8960_rumi3() (0) -#endif - -#ifdef CONFIG_MACH_ICON_G -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICON_G -# endif -# define machine_is_icon_g() (machine_arch_type == MACH_TYPE_ICON_G) -#else -# define machine_is_icon_g() (0) -#endif - -#ifdef CONFIG_MACH_MB3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MB3 -# endif -# define machine_is_mb3() (machine_arch_type == MACH_TYPE_MB3) -#else -# define machine_is_mb3() (0) -#endif - -#ifdef CONFIG_MACH_GSIA18S -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GSIA18S -# endif -# define machine_is_gsia18s() (machine_arch_type == MACH_TYPE_GSIA18S) -#else -# define machine_is_gsia18s() (0) -#endif - -#ifdef CONFIG_MACH_PIVICC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PIVICC -# endif -# define machine_is_pivicc() (machine_arch_type == MACH_TYPE_PIVICC) -#else -# define machine_is_pivicc() (0) -#endif - -#ifdef CONFIG_MACH_PCM048 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCM048 -# endif -# define machine_is_pcm048() (machine_arch_type == MACH_TYPE_PCM048) -#else -# define machine_is_pcm048() (0) -#endif - -#ifdef CONFIG_MACH_DDS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DDS -# endif -# define machine_is_dds() (machine_arch_type == MACH_TYPE_DDS) -#else -# define machine_is_dds() (0) -#endif - -#ifdef CONFIG_MACH_CHALTEN_XA1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CHALTEN_XA1 -# endif -# define machine_is_chalten_xa1() (machine_arch_type == MACH_TYPE_CHALTEN_XA1) -#else -# define machine_is_chalten_xa1() (0) -#endif - -#ifdef CONFIG_MACH_TS48XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS48XX -# endif -# define machine_is_ts48xx() (machine_arch_type == MACH_TYPE_TS48XX) -#else -# define machine_is_ts48xx() (0) -#endif - -#ifdef CONFIG_MACH_TONGA2_TFTTIMER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TONGA2_TFTTIMER -# endif -# define machine_is_tonga2_tfttimer() (machine_arch_type == MACH_TYPE_TONGA2_TFTTIMER) -#else -# define machine_is_tonga2_tfttimer() (0) -#endif - -#ifdef CONFIG_MACH_WHISTLER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WHISTLER -# endif -# define machine_is_whistler() (machine_arch_type == MACH_TYPE_WHISTLER) -#else -# define machine_is_whistler() (0) -#endif - -#ifdef CONFIG_MACH_ASL_PHOENIX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ASL_PHOENIX -# endif -# define machine_is_asl_phoenix() (machine_arch_type == MACH_TYPE_ASL_PHOENIX) -#else -# define machine_is_asl_phoenix() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9263OTLITE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9263OTLITE -# endif -# define machine_is_at91sam9263otlite() (machine_arch_type == MACH_TYPE_AT91SAM9263OTLITE) -#else -# define machine_is_at91sam9263otlite() (0) -#endif - -#ifdef CONFIG_MACH_DDPLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DDPLUG -# endif -# define machine_is_ddplug() (machine_arch_type == MACH_TYPE_DDPLUG) -#else -# define machine_is_ddplug() (0) -#endif - -#ifdef CONFIG_MACH_D2PLUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_D2PLUG -# endif -# define machine_is_d2plug() (machine_arch_type == MACH_TYPE_D2PLUG) -#else -# define machine_is_d2plug() (0) -#endif - -#ifdef CONFIG_MACH_KZM9D -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KZM9D -# endif -# define machine_is_kzm9d() (machine_arch_type == MACH_TYPE_KZM9D) -#else -# define machine_is_kzm9d() (0) -#endif - -#ifdef CONFIG_MACH_VERDI_LTE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VERDI_LTE -# endif -# define machine_is_verdi_lte() (machine_arch_type == MACH_TYPE_VERDI_LTE) -#else -# define machine_is_verdi_lte() (0) -#endif - -#ifdef CONFIG_MACH_NANOZOOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NANOZOOM -# endif -# define machine_is_nanozoom() (machine_arch_type == MACH_TYPE_NANOZOOM) -#else -# define machine_is_nanozoom() (0) -#endif - -#ifdef CONFIG_MACH_DM3730_SOM_LV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM3730_SOM_LV -# endif -# define machine_is_dm3730_som_lv() (machine_arch_type == MACH_TYPE_DM3730_SOM_LV) -#else -# define machine_is_dm3730_som_lv() (0) -#endif - -#ifdef CONFIG_MACH_DM3730_TORPEDO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM3730_TORPEDO -# endif -# define machine_is_dm3730_torpedo() (machine_arch_type == MACH_TYPE_DM3730_TORPEDO) -#else -# define machine_is_dm3730_torpedo() (0) -#endif - -#ifdef CONFIG_MACH_ANCHOVY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ANCHOVY -# endif -# define machine_is_anchovy() (machine_arch_type == MACH_TYPE_ANCHOVY) -#else -# define machine_is_anchovy() (0) -#endif - -#ifdef CONFIG_MACH_RE2REV20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RE2REV20 -# endif -# define machine_is_re2rev20() (machine_arch_type == MACH_TYPE_RE2REV20) -#else -# define machine_is_re2rev20() (0) -#endif - -#ifdef CONFIG_MACH_RE2REV21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RE2REV21 -# endif -# define machine_is_re2rev21() (machine_arch_type == MACH_TYPE_RE2REV21) -#else -# define machine_is_re2rev21() (0) -#endif - -#ifdef CONFIG_MACH_CNS21XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNS21XX -# endif -# define machine_is_cns21xx() (machine_arch_type == MACH_TYPE_CNS21XX) -#else -# define machine_is_cns21xx() (0) -#endif - -#ifdef CONFIG_MACH_RIDER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RIDER -# endif -# define machine_is_rider() (machine_arch_type == MACH_TYPE_RIDER) -#else -# define machine_is_rider() (0) -#endif - -#ifdef CONFIG_MACH_NSK330 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NSK330 -# endif -# define machine_is_nsk330() (machine_arch_type == MACH_TYPE_NSK330) -#else -# define machine_is_nsk330() (0) -#endif - -#ifdef CONFIG_MACH_CNS2133EVB -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CNS2133EVB -# endif -# define machine_is_cns2133evb() (machine_arch_type == MACH_TYPE_CNS2133EVB) -#else -# define machine_is_cns2133evb() (0) -#endif - -#ifdef CONFIG_MACH_Z3_816X_MOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Z3_816X_MOD -# endif -# define machine_is_z3_816x_mod() (machine_arch_type == MACH_TYPE_Z3_816X_MOD) -#else -# define machine_is_z3_816x_mod() (0) -#endif - -#ifdef CONFIG_MACH_Z3_814X_MOD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_Z3_814X_MOD -# endif -# define machine_is_z3_814x_mod() (machine_arch_type == MACH_TYPE_Z3_814X_MOD) -#else -# define machine_is_z3_814x_mod() (0) -#endif - -#ifdef CONFIG_MACH_BEECT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BEECT -# endif -# define machine_is_beect() (machine_arch_type == MACH_TYPE_BEECT) -#else -# define machine_is_beect() (0) -#endif - -#ifdef CONFIG_MACH_DMA_THUNDERBUG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DMA_THUNDERBUG -# endif -# define machine_is_dma_thunderbug() (machine_arch_type == MACH_TYPE_DMA_THUNDERBUG) -#else -# define machine_is_dma_thunderbug() (0) -#endif - -#ifdef CONFIG_MACH_OMN_AT91SAM9G20 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMN_AT91SAM9G20 -# endif -# define machine_is_omn_at91sam9g20() (machine_arch_type == MACH_TYPE_OMN_AT91SAM9G20) -#else -# define machine_is_omn_at91sam9g20() (0) -#endif - -#ifdef CONFIG_MACH_MX25_E2S_UC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX25_E2S_UC -# endif -# define machine_is_mx25_e2s_uc() (machine_arch_type == MACH_TYPE_MX25_E2S_UC) -#else -# define machine_is_mx25_e2s_uc() (0) -#endif - -#ifdef CONFIG_MACH_MIONE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MIONE -# endif -# define machine_is_mione() (machine_arch_type == MACH_TYPE_MIONE) -#else -# define machine_is_mione() (0) -#endif - -#ifdef CONFIG_MACH_TOP9000_TCU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOP9000_TCU -# endif -# define machine_is_top9000_tcu() (machine_arch_type == MACH_TYPE_TOP9000_TCU) -#else -# define machine_is_top9000_tcu() (0) -#endif - -#ifdef CONFIG_MACH_TOP9000_BSL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TOP9000_BSL -# endif -# define machine_is_top9000_bsl() (machine_arch_type == MACH_TYPE_TOP9000_BSL) -#else -# define machine_is_top9000_bsl() (0) -#endif - -#ifdef CONFIG_MACH_KINGDOM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KINGDOM -# endif -# define machine_is_kingdom() (machine_arch_type == MACH_TYPE_KINGDOM) -#else -# define machine_is_kingdom() (0) -#endif - -#ifdef CONFIG_MACH_ARMADILLO460 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ARMADILLO460 -# endif -# define machine_is_armadillo460() (machine_arch_type == MACH_TYPE_ARMADILLO460) -#else -# define machine_is_armadillo460() (0) -#endif - -#ifdef CONFIG_MACH_LQ2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LQ2 -# endif -# define machine_is_lq2() (machine_arch_type == MACH_TYPE_LQ2) -#else -# define machine_is_lq2() (0) -#endif - -#ifdef CONFIG_MACH_SWEDA_TMS2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SWEDA_TMS2 -# endif -# define machine_is_sweda_tms2() (machine_arch_type == MACH_TYPE_SWEDA_TMS2) -#else -# define machine_is_sweda_tms2() (0) -#endif - -#ifdef CONFIG_MACH_MX53_LOCO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX53_LOCO -# endif -# define machine_is_mx53_loco() (machine_arch_type == MACH_TYPE_MX53_LOCO) -#else -# define machine_is_mx53_loco() (0) -#endif - -#ifdef CONFIG_MACH_ACER_A8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_A8 -# endif -# define machine_is_acer_a8() (machine_arch_type == MACH_TYPE_ACER_A8) -#else -# define machine_is_acer_a8() (0) -#endif - -#ifdef CONFIG_MACH_ACER_GAUGUIN -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ACER_GAUGUIN -# endif -# define machine_is_acer_gauguin() (machine_arch_type == MACH_TYPE_ACER_GAUGUIN) -#else -# define machine_is_acer_gauguin() (0) -#endif - -#ifdef CONFIG_MACH_GUPPY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUPPY -# endif -# define machine_is_guppy() (machine_arch_type == MACH_TYPE_GUPPY) -#else -# define machine_is_guppy() (0) -#endif - -#ifdef CONFIG_MACH_MX61_ARD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MX61_ARD -# endif -# define machine_is_mx61_ard() (machine_arch_type == MACH_TYPE_MX61_ARD) -#else -# define machine_is_mx61_ard() (0) -#endif - -#ifdef CONFIG_MACH_TX53 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TX53 -# endif -# define machine_is_tx53() (machine_arch_type == MACH_TYPE_TX53) -#else -# define machine_is_tx53() (0) -#endif - -#ifdef CONFIG_MACH_OMAPL138_CASE_A3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_OMAPL138_CASE_A3 -# endif -# define machine_is_omapl138_case_a3() (machine_arch_type == MACH_TYPE_OMAPL138_CASE_A3) -#else -# define machine_is_omapl138_case_a3() (0) -#endif - -#ifdef CONFIG_MACH_UEMD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_UEMD -# endif -# define machine_is_uemd() (machine_arch_type == MACH_TYPE_UEMD) -#else -# define machine_is_uemd() (0) -#endif - -#ifdef CONFIG_MACH_CCWMX51MUT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CCWMX51MUT -# endif -# define machine_is_ccwmx51mut() (machine_arch_type == MACH_TYPE_CCWMX51MUT) -#else -# define machine_is_ccwmx51mut() (0) -#endif - -#ifdef CONFIG_MACH_ROCKHOPPER -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROCKHOPPER -# endif -# define machine_is_rockhopper() (machine_arch_type == MACH_TYPE_ROCKHOPPER) -#else -# define machine_is_rockhopper() (0) -#endif - -#ifdef CONFIG_MACH_NOOKCOLOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NOOKCOLOR -# endif -# define machine_is_nookcolor() (machine_arch_type == MACH_TYPE_NOOKCOLOR) -#else -# define machine_is_nookcolor() (0) -#endif - -#ifdef CONFIG_MACH_HKDKC100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HKDKC100 -# endif -# define machine_is_hkdkc100() (machine_arch_type == MACH_TYPE_HKDKC100) -#else -# define machine_is_hkdkc100() (0) -#endif - -#ifdef CONFIG_MACH_TS42XX -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS42XX -# endif -# define machine_is_ts42xx() (machine_arch_type == MACH_TYPE_TS42XX) -#else -# define machine_is_ts42xx() (0) -#endif - -#ifdef CONFIG_MACH_AEBL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AEBL -# endif -# define machine_is_aebl() (machine_arch_type == MACH_TYPE_AEBL) -#else -# define machine_is_aebl() (0) -#endif - -#ifdef CONFIG_MACH_WARIO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WARIO -# endif -# define machine_is_wario() (machine_arch_type == MACH_TYPE_WARIO) -#else -# define machine_is_wario() (0) -#endif - -#ifdef CONFIG_MACH_GFS_SPM -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GFS_SPM -# endif -# define machine_is_gfs_spm() (machine_arch_type == MACH_TYPE_GFS_SPM) -#else -# define machine_is_gfs_spm() (0) -#endif - -#ifdef CONFIG_MACH_CM_T3730 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CM_T3730 -# endif -# define machine_is_cm_t3730() (machine_arch_type == MACH_TYPE_CM_T3730) -#else -# define machine_is_cm_t3730() (0) -#endif - -#ifdef CONFIG_MACH_ISC3 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ISC3 -# endif -# define machine_is_isc3() (machine_arch_type == MACH_TYPE_ISC3) -#else -# define machine_is_isc3() (0) -#endif - -#ifdef CONFIG_MACH_RASCAL -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RASCAL -# endif -# define machine_is_rascal() (machine_arch_type == MACH_TYPE_RASCAL) -#else -# define machine_is_rascal() (0) -#endif - -#ifdef CONFIG_MACH_HREFV60 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HREFV60 -# endif -# define machine_is_hrefv60() (machine_arch_type == MACH_TYPE_HREFV60) -#else -# define machine_is_hrefv60() (0) -#endif - -#ifdef CONFIG_MACH_TPT_2_0 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TPT_2_0 -# endif -# define machine_is_tpt_2_0() (machine_arch_type == MACH_TYPE_TPT_2_0) -#else -# define machine_is_tpt_2_0() (0) -#endif - -#ifdef CONFIG_MACH_PYRAMID_TD -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PYRAMID_TD -# endif -# define machine_is_pyramid_td() (machine_arch_type == MACH_TYPE_PYRAMID_TD) -#else -# define machine_is_pyramid_td() (0) -#endif - -#ifdef CONFIG_MACH_SPLENDOR -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SPLENDOR -# endif -# define machine_is_splendor() (machine_arch_type == MACH_TYPE_SPLENDOR) -#else -# define machine_is_splendor() (0) -#endif - -#ifdef CONFIG_MACH_GUF_PLANET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GUF_PLANET -# endif -# define machine_is_guf_planet() (machine_arch_type == MACH_TYPE_GUF_PLANET) -#else -# define machine_is_guf_planet() (0) -#endif - -#ifdef CONFIG_MACH_MSM8X60_QT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MSM8X60_QT -# endif -# define machine_is_msm8x60_qt() (machine_arch_type == MACH_TYPE_MSM8X60_QT) -#else -# define machine_is_msm8x60_qt() (0) -#endif - -#ifdef CONFIG_MACH_HTC_HD_MINI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HTC_HD_MINI -# endif -# define machine_is_htc_hd_mini() (machine_arch_type == MACH_TYPE_HTC_HD_MINI) -#else -# define machine_is_htc_hd_mini() (0) -#endif - -#ifdef CONFIG_MACH_ATHENE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ATHENE -# endif -# define machine_is_athene() (machine_arch_type == MACH_TYPE_ATHENE) -#else -# define machine_is_athene() (0) -#endif - -#ifdef CONFIG_MACH_DEEP_R_EK_1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DEEP_R_EK_1 -# endif -# define machine_is_deep_r_ek_1() (machine_arch_type == MACH_TYPE_DEEP_R_EK_1) -#else -# define machine_is_deep_r_ek_1() (0) -#endif - -#ifdef CONFIG_MACH_VIVOW_CT -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_VIVOW_CT -# endif -# define machine_is_vivow_ct() (machine_arch_type == MACH_TYPE_VIVOW_CT) -#else -# define machine_is_vivow_ct() (0) -#endif - -#ifdef CONFIG_MACH_NERY_1000 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NERY_1000 -# endif -# define machine_is_nery_1000() (machine_arch_type == MACH_TYPE_NERY_1000) -#else -# define machine_is_nery_1000() (0) -#endif - -#ifdef CONFIG_MACH_RFL109145_SSRV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_RFL109145_SSRV -# endif -# define machine_is_rfl109145_ssrv() (machine_arch_type == MACH_TYPE_RFL109145_SSRV) -#else -# define machine_is_rfl109145_ssrv() (0) -#endif - -#ifdef CONFIG_MACH_NMH -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NMH -# endif -# define machine_is_nmh() (machine_arch_type == MACH_TYPE_NMH) -#else -# define machine_is_nmh() (0) -#endif - -#ifdef CONFIG_MACH_WN802T -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_WN802T -# endif -# define machine_is_wn802t() (machine_arch_type == MACH_TYPE_WN802T) -#else -# define machine_is_wn802t() (0) -#endif - -#ifdef CONFIG_MACH_DRAGONET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DRAGONET -# endif -# define machine_is_dragonet() (machine_arch_type == MACH_TYPE_DRAGONET) -#else -# define machine_is_dragonet() (0) -#endif - -#ifdef CONFIG_MACH_GENEVA_B -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GENEVA_B -# endif -# define machine_is_geneva_b() (machine_arch_type == MACH_TYPE_GENEVA_B) -#else -# define machine_is_geneva_b() (0) -#endif - -#ifdef CONFIG_MACH_AT91SAM9263DESK16L -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_AT91SAM9263DESK16L -# endif -# define machine_is_at91sam9263desk16l() (machine_arch_type == MACH_TYPE_AT91SAM9263DESK16L) -#else -# define machine_is_at91sam9263desk16l() (0) -#endif - -#ifdef CONFIG_MACH_BCMHANA_SV -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMHANA_SV -# endif -# define machine_is_bcmhana_sv() (machine_arch_type == MACH_TYPE_BCMHANA_SV) -#else -# define machine_is_bcmhana_sv() (0) -#endif - -#ifdef CONFIG_MACH_BCMHANA_TABLET -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_BCMHANA_TABLET -# endif -# define machine_is_bcmhana_tablet() (machine_arch_type == MACH_TYPE_BCMHANA_TABLET) -#else -# define machine_is_bcmhana_tablet() (0) -#endif - -#ifdef CONFIG_MACH_KOI -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_KOI -# endif -# define machine_is_koi() (machine_arch_type == MACH_TYPE_KOI) -#else -# define machine_is_koi() (0) -#endif - -#ifdef CONFIG_MACH_TS4800 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TS4800 -# endif -# define machine_is_ts4800() (machine_arch_type == MACH_TYPE_TS4800) -#else -# define machine_is_ts4800() (0) -#endif - -#ifdef CONFIG_MACH_TQMA9263 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_TQMA9263 -# endif -# define machine_is_tqma9263() (machine_arch_type == MACH_TYPE_TQMA9263) -#else -# define machine_is_tqma9263() (0) -#endif - -#ifdef CONFIG_MACH_HOLIDAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HOLIDAY -# endif -# define machine_is_holiday() (machine_arch_type == MACH_TYPE_HOLIDAY) -#else -# define machine_is_holiday() (0) -#endif - -#ifdef CONFIG_MACH_DMA6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DMA6410 -# endif -# define machine_is_dma_6410() (machine_arch_type == MACH_TYPE_DMA6410) -#else -# define machine_is_dma_6410() (0) -#endif - -#ifdef CONFIG_MACH_PCATS_OVERLAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PCATS_OVERLAY -# endif -# define machine_is_pcats_overlay() (machine_arch_type == MACH_TYPE_PCATS_OVERLAY) -#else -# define machine_is_pcats_overlay() (0) -#endif - -#ifdef CONFIG_MACH_HWGW6410 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_HWGW6410 -# endif -# define machine_is_hwgw6410() (machine_arch_type == MACH_TYPE_HWGW6410) -#else -# define machine_is_hwgw6410() (0) -#endif - -#ifdef CONFIG_MACH_SHENZHOU -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_SHENZHOU -# endif -# define machine_is_shenzhou() (machine_arch_type == MACH_TYPE_SHENZHOU) -#else -# define machine_is_shenzhou() (0) -#endif - -#ifdef CONFIG_MACH_CWME9210 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWME9210 -# endif -# define machine_is_cwme9210() (machine_arch_type == MACH_TYPE_CWME9210) -#else -# define machine_is_cwme9210() (0) -#endif - -#ifdef CONFIG_MACH_CWME9210JS -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_CWME9210JS -# endif -# define machine_is_cwme9210js() (machine_arch_type == MACH_TYPE_CWME9210JS) -#else -# define machine_is_cwme9210js() (0) -#endif - -#ifdef CONFIG_MACH_PGS_SITARA -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_PGS_SITARA -# endif -# define machine_is_pgs_v1() (machine_arch_type == MACH_TYPE_PGS_SITARA) -#else -# define machine_is_pgs_v1() (0) -#endif - -#ifdef CONFIG_MACH_COLIBRI_TEGRA2 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COLIBRI_TEGRA2 -# endif -# define machine_is_colibri_tegra2() (machine_arch_type == MACH_TYPE_COLIBRI_TEGRA2) -#else -# define machine_is_colibri_tegra2() (0) -#endif - -#ifdef CONFIG_MACH_W21 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_W21 -# endif -# define machine_is_w21() (machine_arch_type == MACH_TYPE_W21) -#else -# define machine_is_w21() (0) -#endif - -#ifdef CONFIG_MACH_POLYSAT1 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_POLYSAT1 -# endif -# define machine_is_polysat1() (machine_arch_type == MACH_TYPE_POLYSAT1) -#else -# define machine_is_polysat1() (0) -#endif - -#ifdef CONFIG_MACH_DATAWAY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DATAWAY -# endif -# define machine_is_dataway() (machine_arch_type == MACH_TYPE_DATAWAY) -#else -# define machine_is_dataway() (0) -#endif - -#ifdef CONFIG_MACH_COBRAL138 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_COBRAL138 -# endif -# define machine_is_cobral138() (machine_arch_type == MACH_TYPE_COBRAL138) -#else -# define machine_is_cobral138() (0) -#endif - -#ifdef CONFIG_MACH_ROVERPCS8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVERPCS8 -# endif -# define machine_is_roverpcs8() (machine_arch_type == MACH_TYPE_ROVERPCS8) -#else -# define machine_is_roverpcs8() (0) -#endif - -#ifdef CONFIG_MACH_MARVELC -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_MARVELC -# endif -# define machine_is_marvelc() (machine_arch_type == MACH_TYPE_MARVELC) -#else -# define machine_is_marvelc() (0) -#endif - -#ifdef CONFIG_MACH_NAVEFIHID -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_NAVEFIHID -# endif -# define machine_is_navefihid() (machine_arch_type == MACH_TYPE_NAVEFIHID) -#else -# define machine_is_navefihid() (0) -#endif - -#ifdef CONFIG_MACH_DM365_CV100 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DM365_CV100 -# endif -# define machine_is_dm365_cv100() (machine_arch_type == MACH_TYPE_DM365_CV100) -#else -# define machine_is_dm365_cv100() (0) -#endif - -#ifdef CONFIG_MACH_ABLE -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ABLE -# endif -# define machine_is_able() (machine_arch_type == MACH_TYPE_ABLE) -#else -# define machine_is_able() (0) -#endif - -#ifdef CONFIG_MACH_LEGACY -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_LEGACY -# endif -# define machine_is_legacy() (machine_arch_type == MACH_TYPE_LEGACY) -#else -# define machine_is_legacy() (0) -#endif - -#ifdef CONFIG_MACH_ICONG -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ICONG -# endif -# define machine_is_icong() (machine_arch_type == MACH_TYPE_ICONG) -#else -# define machine_is_icong() (0) -#endif - -#ifdef CONFIG_MACH_ROVER_G8 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_ROVER_G8 -# endif -# define machine_is_rover_g8() (machine_arch_type == MACH_TYPE_ROVER_G8) -#else -# define machine_is_rover_g8() (0) -#endif - -#ifdef CONFIG_MACH_T5388P -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_T5388P -# endif -# define machine_is_t5388p() (machine_arch_type == MACH_TYPE_T5388P) -#else -# define machine_is_t5388p() (0) -#endif - -#ifdef CONFIG_MACH_DINGO -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_DINGO -# endif -# define machine_is_dingo() (machine_arch_type == MACH_TYPE_DINGO) -#else -# define machine_is_dingo() (0) -#endif - -#ifdef CONFIG_MACH_GOFLEXHOME -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type __machine_arch_type -# else -# define machine_arch_type MACH_TYPE_GOFLEXHOME -# endif -# define machine_is_goflexhome() (machine_arch_type == MACH_TYPE_GOFLEXHOME) -#else -# define machine_is_goflexhome() (0) -#endif - -/* - * These have not yet been registered - */ - -#ifndef machine_arch_type -#define machine_arch_type __machine_arch_type -#endif - -#endif diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h deleted file mode 100644 index 57b5260..0000000 --- a/arch/arm/include/asm/macro.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * include/asm-arm/macro.h - * - * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_MACRO_H__ -#define __ASM_ARM_MACRO_H__ -#ifdef __ASSEMBLY__ - -/* - * These macros provide a convenient way to write 8, 16 and 32 bit data - * to any address. - * Registers r4 and r5 are used, any data in these registers are - * overwritten by the macros. - * The macros are valid for any ARM architecture, they do not implement - * any memory barriers so caution is recommended when using these when the - * caches are enabled or on a multi-core system. - */ - -.macro write32, addr, data - ldr r4, =\addr - ldr r5, =\data - str r5, [r4] -.endm - -.macro write16, addr, data - ldr r4, =\addr - ldrh r5, =\data - strh r5, [r4] -.endm - -.macro write8, addr, data - ldr r4, =\addr - ldrb r5, =\data - strb r5, [r4] -.endm - -/* - * This macro generates a loop that can be used for delays in the code. - * Register r4 is used, any data in this register is overwritten by the - * macro. - * The macro is valid for any ARM architeture. The actual time spent in the - * loop will vary from CPU to CPU though. - */ - -.macro wait_timer, time - ldr r4, =\time -1: - nop - subs r4, r4, #1 - bcs 1b -.endm - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARM_MACRO_H__ */ diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h deleted file mode 100644 index c3b2afd..0000000 --- a/arch/arm/include/asm/memory.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * linux/include/asm-arm/memory.h - * - * Copyright (C) 2000-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: this file should not be included by non-asm/.h files - */ -#ifndef __ASM_ARM_MEMORY_H -#define __ASM_ARM_MEMORY_H - -#if 0 /* XXX###XXX */ - -#include <linux/config.h> -#include <asm/arch/memory.h> - -/* - * PFNs are used to describe any physical page; this means - * PFN 0 == physical address 0. - * - * This is the PFN of the first RAM page in the kernel - * direct-mapped view. We assume this is the first page - * of RAM in the mem_map as well. - */ -#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) - -/* - * These are *only* valid on the kernel direct mapped RAM memory. - */ -static inline unsigned long virt_to_phys(void *x) -{ - return __virt_to_phys((unsigned long)(x)); -} - -static inline void *phys_to_virt(unsigned long x) -{ - return (void *)(__phys_to_virt((unsigned long)(x))); -} - -#define __pa(x) __virt_to_phys((unsigned long)(x)) -#define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) - -/* - * Virtual <-> DMA view memory address translations - * Again, these are *only* valid on the kernel direct mapped RAM - * memory. Use of these is *depreciated*. - */ -#define virt_to_bus(x) (__virt_to_bus((unsigned long)(x))) -#define bus_to_virt(x) ((void *)(__bus_to_virt((unsigned long)(x)))) - -/* - * Conversion between a struct page and a physical address. - * - * Note: when converting an unknown physical address to a - * struct page, the resulting pointer must be validated - * using VALID_PAGE(). It must return an invalid struct page - * for any physical address not corresponding to a system - * RAM address. - * - * page_to_pfn(page) convert a struct page * to a PFN number - * pfn_to_page(pfn) convert a _valid_ PFN number to struct page * - * pfn_valid(pfn) indicates whether a PFN number is valid - * - * virt_to_page(k) convert a _valid_ virtual address to struct page * - * virt_addr_valid(k) indicates whether a virtual address is valid - */ -#ifndef CONFIG_DISCONTIGMEM - -#define page_to_pfn(page) (((page) - mem_map) + PHYS_PFN_OFFSET) -#define pfn_to_page(pfn) ((mem_map + (pfn)) - PHYS_PFN_OFFSET) -#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) - -#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)) -#define virt_addr_valid(kaddr) ((kaddr) >= PAGE_OFFSET && (kaddr) < (unsigned long)high_memory) - -#define PHYS_TO_NID(addr) (0) - -#define VALID_PAGE(page) ((page - mem_map) < max_mapnr) - -#else - -/* - * This is more complex. We have a set of mem_map arrays spread - * around in memory. - */ -#define page_to_pfn(page) \ - (((page) - page_zone(page)->zone_mem_map) \ - + (page_zone(page)->zone_start_paddr >> PAGE_SHIFT)) - -#define pfn_to_page(pfn) \ - (PFN_TO_MAPBASE(pfn) + LOCAL_MAP_NR((pfn) << PAGE_SHIFT)) - -#define pfn_valid(pfn) \ - ({ \ - unsigned int node = PFN_TO_NID(pfn); \ - struct pglist_data *nd = NODE_DATA(node); \ - ((node < NR_NODES) && \ - ((pfn - (nd->node_start_paddr >> PAGE_SHIFT)) < nd->node_size));\ - }) - -#define virt_to_page(kaddr) \ - (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) - -#define virt_addr_valid(kaddr) (KVADDR_TO_NID(kaddr) < NR_NODES) - -/* - * Common discontigmem stuff. - * PHYS_TO_NID is used by the ARM kernel/setup.c - */ -#define PHYS_TO_NID(addr) PFN_TO_NID((addr) >> PAGE_SHIFT) - -/* - * 2.4 compatibility - * - * VALID_PAGE returns a non-zero value if given page pointer is valid. - * This assumes all node's mem_maps are stored within the node they - * refer to. This is actually inherently buggy. - */ -#define VALID_PAGE(page) \ -({ unsigned int node = KVADDR_TO_NID(page); \ - ((node < NR_NODES) && \ - ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size)); \ -}) - -#endif - -/* - * We should really eliminate virt_to_bus() here - it's depreciated. - */ -#define page_to_bus(page) (virt_to_bus(page_address(page))) - -#endif /* XXX###XXX */ - -#endif /* __ASM_ARM_MEMORY_H */ diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/asm/posix_types.h deleted file mode 100644 index c412486..0000000 --- a/arch/arm/include/asm/posix_types.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * linux/include/asm-arm/posix_types.h - * - * Copyright (C) 1996-1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 27-06-1996 RMK Created - */ -#ifndef __ARCH_ARM_POSIX_TYPES_H -#define __ARCH_ARM_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned short __kernel_dev_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ -} __kernel_fsid_t; - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) - -#undef __FD_SET -#define __FD_SET(fd, fdsetp) \ - (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) - -#undef __FD_CLR -#define __FD_CLR(fd, fdsetp) \ - (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) - -#undef __FD_ISSET -#define __FD_ISSET(fd, fdsetp) \ - ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) - -#undef __FD_ZERO -#define __FD_ZERO(fdsetp) \ - (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp))) - -#endif - -#endif diff --git a/arch/arm/include/asm/proc-armv/domain.h b/arch/arm/include/asm/proc-armv/domain.h deleted file mode 100644 index aadc831..0000000 --- a/arch/arm/include/asm/proc-armv/domain.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/proc-armv/domain.h - * - * Copyright (C) 1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROC_DOMAIN_H -#define __ASM_PROC_DOMAIN_H - -/* - * Domain numbers - * - * DOMAIN_IO - domain 2 includes all IO only - * DOMAIN_KERNEL - domain 1 includes all kernel memory only - * DOMAIN_USER - domain 0 includes all user memory only - */ -#define DOMAIN_USER 0 -#define DOMAIN_KERNEL 1 -#define DOMAIN_TABLE 1 -#define DOMAIN_IO 2 - -/* - * Domain types - */ -#define DOMAIN_NOACCESS 0 -#define DOMAIN_CLIENT 1 -#define DOMAIN_MANAGER 3 - -#define domain_val(dom,type) ((type) << 2*(dom)) - -#define set_domain(x) \ - do { \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c3, c0 @ set domain" \ - : : "r" (x)); \ - } while (0) - -#define modify_domain(dom,type) \ - do { \ - unsigned int domain = current->thread.domain; \ - domain &= ~domain_val(dom, DOMAIN_MANAGER); \ - domain |= domain_val(dom, type); \ - current->thread.domain = domain; \ - set_domain(current->thread.domain); \ - } while (0) - -#endif diff --git a/arch/arm/include/asm/proc-armv/processor.h b/arch/arm/include/asm/proc-armv/processor.h deleted file mode 100644 index 5bfab7f..0000000 --- a/arch/arm/include/asm/proc-armv/processor.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * linux/include/asm-arm/proc-armv/processor.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 20-09-1996 RMK Created - * 26-09-1996 RMK Added 'EXTRA_THREAD_STRUCT*' - * 28-09-1996 RMK Moved start_thread into the processor dependencies - * 09-09-1998 PJB Delete redundant `wp_works_ok' - * 30-05-1999 PJB Save sl across context switches - * 31-07-1999 RMK Added 'domain' stuff - */ -#ifndef __ASM_PROC_PROCESSOR_H -#define __ASM_PROC_PROCESSOR_H - -#include <asm/proc/domain.h> - -#define KERNEL_STACK_SIZE PAGE_SIZE - -struct context_save_struct { - unsigned long cpsr; - unsigned long r4; - unsigned long r5; - unsigned long r6; - unsigned long r7; - unsigned long r8; - unsigned long r9; - unsigned long sl; - unsigned long fp; - unsigned long pc; -}; - -#define INIT_CSS (struct context_save_struct){ SVC_MODE, 0, 0, 0, 0, 0, 0, 0, 0, 0 } - -#define EXTRA_THREAD_STRUCT \ - unsigned int domain; - -#define EXTRA_THREAD_STRUCT_INIT \ - domain: domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \ - domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_IO, DOMAIN_CLIENT) - -#define start_thread(regs,pc,sp) \ -({ \ - unsigned long *stack = (unsigned long *)sp; \ - set_fs(USER_DS); \ - memzero(regs->uregs, sizeof(regs->uregs)); \ - if (current->personality & ADDR_LIMIT_32BIT) \ - regs->ARM_cpsr = USR_MODE; \ - else \ - regs->ARM_cpsr = USR26_MODE; \ - regs->ARM_pc = pc; /* pc */ \ - regs->ARM_sp = sp; /* sp */ \ - regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ - regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ - regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ -}) - -#define KSTK_EIP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1019]) -#define KSTK_ESP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1017]) - -/* Allocation and freeing of basic task resources. */ -/* - * NOTE! The task struct and the stack go together - */ -#define ll_alloc_task_struct() ((struct task_struct *) __get_free_pages(GFP_KERNEL,1)) -#define ll_free_task_struct(p) free_pages((unsigned long)(p),1) - -#endif diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h deleted file mode 100644 index 79cc644..0000000 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * linux/include/asm-arm/proc-armv/ptrace.h - * - * Copyright (C) 1996-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROC_PTRACE_H -#define __ASM_PROC_PTRACE_H - -#include <linux/config.h> - -#define USR26_MODE 0x00 -#define FIQ26_MODE 0x01 -#define IRQ26_MODE 0x02 -#define SVC26_MODE 0x03 -#define USR_MODE 0x10 -#define FIQ_MODE 0x11 -#define IRQ_MODE 0x12 -#define SVC_MODE 0x13 -#define ABT_MODE 0x17 -#define UND_MODE 0x1b -#define SYSTEM_MODE 0x1f -#define MODE_MASK 0x1f -#define T_BIT 0x20 -#define F_BIT 0x40 -#define I_BIT 0x80 -#define CC_V_BIT (1 << 28) -#define CC_C_BIT (1 << 29) -#define CC_Z_BIT (1 << 30) -#define CC_N_BIT (1 << 31) -#define PCMASK 0 - -#ifndef __ASSEMBLY__ - -/* this struct defines the way the registers are stored on the - stack during a system call. */ - -struct pt_regs { - long uregs[18]; -}; - -#define ARM_cpsr uregs[16] -#define ARM_pc uregs[15] -#define ARM_lr uregs[14] -#define ARM_sp uregs[13] -#define ARM_ip uregs[12] -#define ARM_fp uregs[11] -#define ARM_r10 uregs[10] -#define ARM_r9 uregs[9] -#define ARM_r8 uregs[8] -#define ARM_r7 uregs[7] -#define ARM_r6 uregs[6] -#define ARM_r5 uregs[5] -#define ARM_r4 uregs[4] -#define ARM_r3 uregs[3] -#define ARM_r2 uregs[2] -#define ARM_r1 uregs[1] -#define ARM_r0 uregs[0] -#define ARM_ORIG_r0 uregs[17] - -#ifdef __KERNEL__ - -#define user_mode(regs) \ - (((regs)->ARM_cpsr & 0xf) == 0) - -#ifdef CONFIG_ARM_THUMB -#define thumb_mode(regs) \ - (((regs)->ARM_cpsr & T_BIT)) -#else -#define thumb_mode(regs) (0) -#endif - -#define processor_mode(regs) \ - ((regs)->ARM_cpsr & MODE_MASK) - -#define interrupts_enabled(regs) \ - (!((regs)->ARM_cpsr & I_BIT)) - -#define fast_interrupts_enabled(regs) \ - (!((regs)->ARM_cpsr & F_BIT)) - -#define condition_codes(regs) \ - ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT)) - -/* Are the current registers suitable for user mode? - * (used to maintain security in signal handlers) - */ -static inline int valid_user_regs(struct pt_regs *regs) -{ - if ((regs->ARM_cpsr & 0xf) == 0 && - (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0) - return 1; - - /* - * Force CPSR to something logical... - */ - regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10); - - return 0; -} - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h deleted file mode 100644 index b4cfa68..0000000 --- a/arch/arm/include/asm/proc-armv/system.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * linux/include/asm-arm/proc-armv/system.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROC_SYSTEM_H -#define __ASM_PROC_SYSTEM_H - -#include <linux/config.h> - -/* - * Save the current interrupt enable state & disable IRQs - */ -#define local_irq_save(x) \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_save\n" \ -" orr %1, %0, #128\n" \ -" msr cpsr_c, %1" \ - : "=r" (x), "=r" (temp) \ - : \ - : "memory"); \ - }) - -/* - * Enable IRQs - */ -#define local_irq_enable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_enable\n" \ -" bic %0, %0, #128\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory"); \ - }) - -/* - * Disable IRQs - */ -#define local_irq_disable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_disable\n" \ -" orr %0, %0, #128\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory"); \ - }) - -/* - * Enable FIQs - */ -#define __stf() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ stf\n" \ -" bic %0, %0, #64\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory"); \ - }) - -/* - * Disable FIQs - */ -#define __clf() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ clf\n" \ -" orr %0, %0, #64\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory"); \ - }) - -/* - * Save the current interrupt enable state. - */ -#define local_save_flags(x) \ - ({ \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_save_flags\n" \ - : "=r" (x) \ - : \ - : "memory"); \ - }) - -/* - * restore saved IRQ & FIQ state - */ -#define local_irq_restore(x) \ - __asm__ __volatile__( \ - "msr cpsr_c, %0 @ local_irq_restore\n" \ - : \ - : "r" (x) \ - : "memory") - -#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) -/* - * On the StrongARM, "swp" is terminally broken since it bypasses the - * cache totally. This means that the cache becomes inconsistent, and, - * since we use normal loads/stores as well, this is really bad. - * Typically, this causes oopsen in filp_close, but could have other, - * more disasterous effects. There are two work-arounds: - * 1. Disable interrupts and emulate the atomic swap - * 2. Clean the cache, perform atomic swap, flush the cache - * - * We choose (1) since its the "easiest" to achieve here and is not - * dependent on the processor type. - */ -#define swp_is_buggy -#endif - -static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) -{ - extern void __bad_xchg(volatile void *, int); - unsigned long ret; -#ifdef swp_is_buggy - unsigned long flags; -#endif - - switch (size) { -#ifdef swp_is_buggy - case 1: - local_irq_save(flags); - ret = *(volatile unsigned char *)ptr; - *(volatile unsigned char *)ptr = x; - local_irq_restore(flags); - break; - - case 4: - local_irq_save(flags); - ret = *(volatile unsigned long *)ptr; - *(volatile unsigned long *)ptr = x; - local_irq_restore(flags); - break; -#else - case 1: __asm__ __volatile__ ("swpb %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory"); - break; - case 4: __asm__ __volatile__ ("swp %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory"); - break; -#endif - default: __bad_xchg(ptr, size), ret = 0; - } - - return ret; -} - -#endif diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h deleted file mode 100644 index 445d449..0000000 --- a/arch/arm/include/asm/processor.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * linux/include/asm-arm/processor.h - * - * Copyright (C) 1995-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARM_PROCESSOR_H -#define __ASM_ARM_PROCESSOR_H - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -#define FP_SIZE 35 - -struct fp_hard_struct { - unsigned int save[FP_SIZE]; /* as yet undefined */ -}; - -struct fp_soft_struct { - unsigned int save[FP_SIZE]; /* undefined information */ -}; - -union fp_state { - struct fp_hard_struct hard; - struct fp_soft_struct soft; -}; - -typedef unsigned long mm_segment_t; /* domain register */ - -#ifdef __KERNEL__ - -#define EISA_bus 0 -#define MCA_bus 0 -#define MCA_bus__is_a_macro - -#include <asm/atomic.h> -#include <asm/ptrace.h> -#if 0 /* XXX###XXX */ -#include <asm/arch/memory.h> -#endif /* XXX###XXX */ -#include <asm/proc/processor.h> -#include <asm/types.h> - -union debug_insn { - u32 arm; - u16 thumb; -}; - -struct debug_entry { - u32 address; - union debug_insn insn; -}; - -struct debug_info { - int nsaved; - struct debug_entry bp[2]; -}; - -struct thread_struct { - atomic_t refcount; - /* fault info */ - unsigned long address; - unsigned long trap_no; - unsigned long error_code; - /* floating point */ - union fp_state fpstate; - /* debugging */ - struct debug_info debug; - /* context info */ - struct context_save_struct *save; - EXTRA_THREAD_STRUCT -}; - -#define INIT_THREAD { \ - refcount: ATOMIC_INIT(1), \ - EXTRA_THREAD_STRUCT_INIT \ -} - -/* - * Return saved PC of a blocked thread. - */ -static inline unsigned long thread_saved_pc(struct thread_struct *t) -{ - return t->save ? pc_pointer(t->save->pc) : 0; -} - -static inline unsigned long thread_saved_fp(struct thread_struct *t) -{ - return t->save ? t->save->fp : 0; -} - -/* Forward declaration, a strange C thing */ -struct task_struct; - -/* Free all resources held by a thread. */ -extern void release_thread(struct task_struct *); - -/* Copy and release all segment info associated with a VM */ -#define copy_segments(tsk, mm) do { } while (0) -#define release_segments(mm) do { } while (0) - -unsigned long get_wchan(struct task_struct *p); - -#define THREAD_SIZE (8192) - -extern struct task_struct *alloc_task_struct(void); -extern void __free_task_struct(struct task_struct *); -#define get_task_struct(p) atomic_inc(&(p)->thread.refcount) -#define free_task_struct(p) \ - do { \ - if (atomic_dec_and_test(&(p)->thread.refcount)) \ - __free_task_struct((p)); \ - } while (0) - -#define init_task (init_task_union.task) -#define init_stack (init_task_union.stack) - -#define cpu_relax() barrier() - -/* - * Create a new kernel thread - */ -extern int arch_kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -#endif - -#endif /* __ASM_ARM_PROCESSOR_H */ diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h deleted file mode 100644 index 73c9087..0000000 --- a/arch/arm/include/asm/ptrace.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __ASM_ARM_PTRACE_H -#define __ASM_ARM_PTRACE_H - -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 - -#define PTRACE_SETOPTIONS 21 - -/* options set using PTRACE_SETOPTIONS */ -#define PTRACE_O_TRACESYSGOOD 0x00000001 - -#include <asm/proc/ptrace.h> - -#ifndef __ASSEMBLY__ -#define pc_pointer(v) \ - ((v) & ~PCMASK) - -#define instruction_pointer(regs) \ - (pc_pointer((regs)->ARM_pc)) - -#ifdef __KERNEL__ -extern void show_regs(struct pt_regs *); - -#define predicate(x) (x & 0xf0000000) -#define PREDICATE_ALWAYS 0xe0000000 - -#endif - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h deleted file mode 100644 index 89df4dc..0000000 --- a/arch/arm/include/asm/setup.h +++ /dev/null @@ -1,269 +0,0 @@ -/* - * linux/include/asm/setup.h - * - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Structure passed to kernel to tell it about the - * hardware it's running on. See linux/Documentation/arm/Setup - * for more info. - * - * NOTE: - * This file contains two ways to pass information from the boot - * loader to the kernel. The old struct param_struct is deprecated, - * but it will be kept in the kernel for 5 years from now - * (2001). This will allow boot loaders to convert to the new struct - * tag way. - */ -#ifndef __ASMARM_SETUP_H -#define __ASMARM_SETUP_H - -/* - * Usage: - * - do not go blindly adding fields, add them at the end - * - when adding fields, don't rely on the address until - * a patch from me has been released - * - unused fields should be zero (for future expansion) - * - this structure is relatively short-lived - only - * guaranteed to contain useful data in setup_arch() - */ -#define COMMAND_LINE_SIZE 1024 - -/* This is the old deprecated way to pass parameters to the kernel */ -struct param_struct { - union { - struct { - unsigned long page_size; /* 0 */ - unsigned long nr_pages; /* 4 */ - unsigned long ramdisk_size; /* 8 */ - unsigned long flags; /* 12 */ -#define FLAG_READONLY 1 -#define FLAG_RDLOAD 4 -#define FLAG_RDPROMPT 8 - unsigned long rootdev; /* 16 */ - unsigned long video_num_cols; /* 20 */ - unsigned long video_num_rows; /* 24 */ - unsigned long video_x; /* 28 */ - unsigned long video_y; /* 32 */ - unsigned long memc_control_reg; /* 36 */ - unsigned char sounddefault; /* 40 */ - unsigned char adfsdrives; /* 41 */ - unsigned char bytes_per_char_h; /* 42 */ - unsigned char bytes_per_char_v; /* 43 */ - unsigned long pages_in_bank[4]; /* 44 */ - unsigned long pages_in_vram; /* 60 */ - unsigned long initrd_start; /* 64 */ - unsigned long initrd_size; /* 68 */ - unsigned long rd_start; /* 72 */ - unsigned long system_rev; /* 76 */ - unsigned long system_serial_low; /* 80 */ - unsigned long system_serial_high; /* 84 */ - unsigned long mem_fclk_21285; /* 88 */ - } s; - char unused[256]; - } u1; - union { - char paths[8][128]; - struct { - unsigned long magic; - char n[1024 - sizeof(unsigned long)]; - } s; - } u2; - char commandline[COMMAND_LINE_SIZE]; -}; - - -/* - * The new way of passing information: a list of tagged entries - */ - -/* The list ends with an ATAG_NONE node. */ -#define ATAG_NONE 0x00000000 - -struct tag_header { - u32 size; - u32 tag; -}; - -/* The list must start with an ATAG_CORE node */ -#define ATAG_CORE 0x54410001 - -struct tag_core { - u32 flags; /* bit 0 = read-only */ - u32 pagesize; - u32 rootdev; -}; - -/* it is allowed to have multiple ATAG_MEM nodes */ -#define ATAG_MEM 0x54410002 - -struct tag_mem32 { - u32 size; - u32 start; /* physical start address */ -}; - -/* VGA text type displays */ -#define ATAG_VIDEOTEXT 0x54410003 - -struct tag_videotext { - u8 x; - u8 y; - u16 video_page; - u8 video_mode; - u8 video_cols; - u16 video_ega_bx; - u8 video_lines; - u8 video_isvga; - u16 video_points; -}; - -/* describes how the ramdisk will be used in kernel */ -#define ATAG_RAMDISK 0x54410004 - -struct tag_ramdisk { - u32 flags; /* bit 0 = load, bit 1 = prompt */ - u32 size; /* decompressed ramdisk size in _kilo_ bytes */ - u32 start; /* starting block of floppy-based RAM disk image */ -}; - -/* describes where the compressed ramdisk image lives (virtual address) */ -/* - * this one accidentally used virtual addresses - as such, - * its depreciated. - */ -#define ATAG_INITRD 0x54410005 - -/* describes where the compressed ramdisk image lives (physical address) */ -#define ATAG_INITRD2 0x54420005 - -struct tag_initrd { - u32 start; /* physical start address */ - u32 size; /* size of compressed ramdisk image in bytes */ -}; - -/* board serial number. "64 bits should be enough for everybody" */ -#define ATAG_SERIAL 0x54410006 - -struct tag_serialnr { - u32 low; - u32 high; -}; - -/* board revision */ -#define ATAG_REVISION 0x54410007 - -struct tag_revision { - u32 rev; -}; - -/* initial values for vesafb-type framebuffers. see struct screen_info - * in include/linux/tty.h - */ -#define ATAG_VIDEOLFB 0x54410008 - -struct tag_videolfb { - u16 lfb_width; - u16 lfb_height; - u16 lfb_depth; - u16 lfb_linelength; - u32 lfb_base; - u32 lfb_size; - u8 red_size; - u8 red_pos; - u8 green_size; - u8 green_pos; - u8 blue_size; - u8 blue_pos; - u8 rsvd_size; - u8 rsvd_pos; -}; - -/* command line: \0 terminated string */ -#define ATAG_CMDLINE 0x54410009 - -struct tag_cmdline { - char cmdline[1]; /* this is the minimum size */ -}; - -/* acorn RiscPC specific information */ -#define ATAG_ACORN 0x41000101 - -struct tag_acorn { - u32 memc_control_reg; - u32 vram_pages; - u8 sounddefault; - u8 adfsdrives; -}; - -/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */ -#define ATAG_MEMCLK 0x41000402 - -struct tag_memclk { - u32 fmemclk; -}; - -struct tag { - struct tag_header hdr; - union { - struct tag_core core; - struct tag_mem32 mem; - struct tag_videotext videotext; - struct tag_ramdisk ramdisk; - struct tag_initrd initrd; - struct tag_serialnr serialnr; - struct tag_revision revision; - struct tag_videolfb videolfb; - struct tag_cmdline cmdline; - - /* - * Acorn specific - */ - struct tag_acorn acorn; - - /* - * DC21285 specific - */ - struct tag_memclk memclk; - } u; -}; - -struct tagtable { - u32 tag; - int (*parse)(const struct tag *); -}; - -#define __tag __attribute__((unused, __section__(".taglist"))) -#define __tagtable(tag, fn) \ -static struct tagtable __tagtable_##fn __tag = { tag, fn } - -#define tag_member_present(tag,member) \ - ((unsigned long)(&((struct tag *)0L)->member + 1) \ - <= (tag)->hdr.size * 4) - -#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) -#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) - -#define for_each_tag(t,base) \ - for (t = base; t->hdr.size; t = tag_next(t)) - -/* - * Memory map description - */ -#define NR_BANKS 8 - -struct meminfo { - int nr_banks; - unsigned long end; - struct { - unsigned long start; - unsigned long size; - int node; - } bank[NR_BANKS]; -}; - -extern struct meminfo meminfo; - -#endif diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h deleted file mode 100644 index b0b4f6a..0000000 --- a/arch/arm/include/asm/sizes.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* Size defintions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ -#define SZ_1K 0x00000400 -#define SZ_4K 0x00001000 -#define SZ_8K 0x00002000 -#define SZ_16K 0x00004000 -#define SZ_32K 0x00008000 -#define SZ_64K 0x00010000 -#define SZ_128K 0x00020000 -#define SZ_256K 0x00040000 -#define SZ_512K 0x00080000 - -#define SZ_1M 0x00100000 -#define SZ_2M 0x00200000 -#define SZ_4M 0x00400000 -#define SZ_8M 0x00800000 -#define SZ_16M 0x01000000 -#define SZ_31M 0x01F00000 -#define SZ_32M 0x02000000 -#define SZ_64M 0x04000000 -#define SZ_128M 0x08000000 -#define SZ_256M 0x10000000 -#define SZ_512M 0x20000000 - -#define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 - -#endif - -/* END */ diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h deleted file mode 100644 index c3ea582..0000000 --- a/arch/arm/include/asm/string.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef __ASM_ARM_STRING_H -#define __ASM_ARM_STRING_H - -/* - * We don't do inline string functions, since the - * optimised inline asm versions are not small. - */ - -#undef __HAVE_ARCH_STRRCHR -extern char * strrchr(const char * s, int c); - -#undef __HAVE_ARCH_STRCHR -extern char * strchr(const char * s, int c); - -#undef __HAVE_ARCH_MEMCPY -extern void * memcpy(void *, const void *, __kernel_size_t); - -#undef __HAVE_ARCH_MEMMOVE -extern void * memmove(void *, const void *, __kernel_size_t); - -#undef __HAVE_ARCH_MEMCHR -extern void * memchr(const void *, int, __kernel_size_t); - -#undef __HAVE_ARCH_MEMZERO -#undef __HAVE_ARCH_MEMSET -extern void * memset(void *, int, __kernel_size_t); - -#if 0 -extern void __memzero(void *ptr, __kernel_size_t n); - -#define memset(p,v,n) \ - ({ \ - if ((n) != 0) { \ - if (__builtin_constant_p((v)) && (v) == 0) \ - __memzero((p),(n)); \ - else \ - memset((p),(v),(n)); \ - } \ - (p); \ - }) - -#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); }) -#else -extern void memzero(void *ptr, __kernel_size_t n); -#endif - -#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h deleted file mode 100644 index 2b28a26..0000000 --- a/arch/arm/include/asm/system.h +++ /dev/null @@ -1,84 +0,0 @@ -#ifndef __ASM_ARM_SYSTEM_H -#define __ASM_ARM_SYSTEM_H - -#ifdef __KERNEL__ - -#define CPU_ARCH_UNKNOWN 0 -#define CPU_ARCH_ARMv3 1 -#define CPU_ARCH_ARMv4 2 -#define CPU_ARCH_ARMv4T 3 -#define CPU_ARCH_ARMv5 4 -#define CPU_ARCH_ARMv5T 5 -#define CPU_ARCH_ARMv5TE 6 -#define CPU_ARCH_ARMv5TEJ 7 -#define CPU_ARCH_ARMv6 8 -#define CPU_ARCH_ARMv7 9 - -/* - * CR1 bits (CP#15 CR1) - */ -#define CR_M (1 << 0) /* MMU enable */ -#define CR_A (1 << 1) /* Alignment abort enable */ -#define CR_C (1 << 2) /* Dcache enable */ -#define CR_W (1 << 3) /* Write buffer enable */ -#define CR_P (1 << 4) /* 32-bit exception handler */ -#define CR_D (1 << 5) /* 32-bit data address range */ -#define CR_L (1 << 6) /* Implementation defined */ -#define CR_B (1 << 7) /* Big endian */ -#define CR_S (1 << 8) /* System MMU protection */ -#define CR_R (1 << 9) /* ROM MMU protection */ -#define CR_F (1 << 10) /* Implementation defined */ -#define CR_Z (1 << 11) /* Implementation defined */ -#define CR_I (1 << 12) /* Icache enable */ -#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ -#define CR_RR (1 << 14) /* Round Robin cache replacement */ -#define CR_L4 (1 << 15) /* LDR pc can set T bit */ -#define CR_DT (1 << 16) -#define CR_IT (1 << 18) -#define CR_ST (1 << 19) -#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ -#define CR_U (1 << 22) /* Unaligned access operation */ -#define CR_XP (1 << 23) /* Extended page tables */ -#define CR_VE (1 << 24) /* Vectored interrupts */ -#define CR_EE (1 << 25) /* Exception (Big) Endian */ -#define CR_TRE (1 << 28) /* TEX remap enable */ -#define CR_AFE (1 << 29) /* Access flag enable */ -#define CR_TE (1 << 30) /* Thumb exception enable */ - -/* - * This is used to ensure the compiler did actually allocate the register we - * asked it for some inline assembly sequences. Apparently we can't trust - * the compiler from one version to another so a bit of paranoia won't hurt. - * This string is meant to be concatenated with the inline asm string and - * will cause compilation to stop on mismatch. - * (for details, see gcc PR 15089) - */ -#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" - -#ifndef __ASSEMBLY__ - -#define isb() __asm__ __volatile__ ("" : : : "memory") - -#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); - -static inline unsigned int get_cr(void) -{ - unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); - return val; -} - -static inline void set_cr(unsigned int val) -{ - asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" - : : "r" (val) : "cc"); - isb(); -} - -#endif /* __ASSEMBLY__ */ - -#define arch_align_stack(x) (x) - -#endif /* __KERNEL__ */ - -#endif diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h deleted file mode 100644 index 71dc049..0000000 --- a/arch/arm/include/asm/types.h +++ /dev/null @@ -1,53 +0,0 @@ -#ifndef __ASM_ARM_TYPES_H -#define __ASM_ARM_TYPES_H - -typedef unsigned short umode_t; - -/* - * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the - * header files exported to user space - */ - -typedef __signed__ char __s8; -typedef unsigned char __u8; - -typedef __signed__ short __s16; -typedef unsigned short __u16; - -typedef __signed__ int __s32; -typedef unsigned int __u32; - -#if defined(__GNUC__) -__extension__ typedef __signed__ long long __s64; -__extension__ typedef unsigned long long __u64; -#endif - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long long s64; -typedef unsigned long long u64; - -#define BITS_PER_LONG 32 - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -typedef unsigned long phys_addr_t; -typedef unsigned long phys_size_t; - -#endif /* __KERNEL__ */ - -#endif diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h deleted file mode 100644 index 33973a3..0000000 --- a/arch/arm/include/asm/u-boot-arm.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _U_BOOT_ARM_H_ -#define _U_BOOT_ARM_H_ 1 - -/* for the following variables, see start.S */ -extern ulong _bss_start_ofs; /* BSS start relative to _start */ -extern ulong _bss_end_ofs; /* BSS end relative to _start */ -extern ulong IRQ_STACK_START; /* top of IRQ stack */ -extern ulong FIQ_STACK_START; /* top of FIQ stack */ -extern ulong _TEXT_BASE; /* code start */ -extern ulong _datarel_start_ofs; -extern ulong _datarelrolocal_start_ofs; -extern ulong _datarellocal_start_ofs; -extern ulong _datarelro_start_ofs; -extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */ - -/* cpu/.../cpu.c */ -int cpu_init(void); -int cleanup_before_linux(void); - -/* cpu/.../arch/cpu.c */ -int arch_cpu_init(void); -int arch_misc_init(void); - -/* board/.../... */ -int board_init(void); -int dram_init (void); -void dram_init_banksize (void); -void setup_serial_tag (struct tag **params); -void setup_revision_tag (struct tag **params); - -/* ------------------------------------------------------------ */ -/* Here is a list of some prototypes which are incompatible to */ -/* the U-Boot implementation */ -/* To be fixed! */ -/* ------------------------------------------------------------ */ -/* common/cmd_nvedit.c */ -int setenv (char *, char *); - -/* cpu/.../interrupt.c */ -int arch_interrupt_init (void); -void reset_timer_masked (void); -ulong get_timer_masked (void); -void udelay_masked (unsigned long usec); - -/* cpu/.../timer.c */ -int timer_init (void); - -#endif /* _U_BOOT_ARM_H_ */ diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h deleted file mode 100644 index ed33327..0000000 --- a/arch/arm/include/asm/u-boot.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ******************************************************************** - * NOTE: This header file defines an interface to U-Boot. Including - * this (unmodified) header file in another file is considered normal - * use of U-Boot, and does *not* fall under the heading of "derived - * work". - ******************************************************************** - */ - -#ifndef _U_BOOT_H_ -#define _U_BOOT_H_ 1 - -typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ - unsigned long bi_ip_addr; /* IP Address */ - ulong bi_arch_number; /* unique id for this board */ - ulong bi_boot_params; /* where this board expects params */ - struct /* RAM configuration */ - { - ulong start; - ulong size; - } bi_dram[CONFIG_NR_DRAM_BANKS]; -} bd_t; - -#endif /* _U_BOOT_H_ */ diff --git a/arch/arm/include/asm/unaligned.h b/arch/arm/include/asm/unaligned.h deleted file mode 100644 index 44593a8..0000000 --- a/arch/arm/include/asm/unaligned.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_ARM_UNALIGNED_H -#define _ASM_ARM_UNALIGNED_H - -#include <linux/unaligned/le_byteshift.h> -#include <linux/unaligned/be_byteshift.h> -#include <linux/unaligned/generic.h> - -/* - * Select endianness - */ -#ifndef __ARMEB__ -#define get_unaligned __get_unaligned_le -#define put_unaligned __put_unaligned_le -#else -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be -#endif - -#endif /* _ASM_ARM_UNALIGNED_H */ |