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-rw-r--r--board/nx823/nx823.c6
-rw-r--r--board/nx823/u-boot.lds3
-rw-r--r--board/nx823/u-boot.lds.debug2
3 files changed, 8 insertions, 3 deletions
diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c
index cbcbab8..65d45c1 100644
--- a/board/nx823/nx823.c
+++ b/board/nx823/nx823.c
@@ -221,7 +221,7 @@ long int initdram (int board_type)
*
* try 8 column mode
*/
- size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
+ size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
@@ -229,7 +229,7 @@ long int initdram (int board_type)
/*
* try 9 column mode
*/
- size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
+ size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
@@ -248,7 +248,7 @@ long int initdram (int board_type)
* [9 column SDRAM may also be used in 8 column mode,
* but then only half the real size will be used.]
*/
- size_b1 = dram_size (memctl->memc_mamr, (ulong *) SDRAM_BASE2_PRELIM,
+ size_b1 = dram_size (memctl->memc_mamr, (long *) SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
/* debug ("SDRAM Bank 1: %ld MB\n", size8 >> 20); */
diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds
index 526198c..7099fc4 100644
--- a/board/nx823/u-boot.lds
+++ b/board/nx823/u-boot.lds
@@ -67,6 +67,7 @@ SECTIONS
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
+ *(.eh_frame)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
@@ -99,11 +100,13 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
+ . = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
+ . = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug
index f6f7cf4..3165d56 100644
--- a/board/nx823/u-boot.lds.debug
+++ b/board/nx823/u-boot.lds.debug
@@ -74,6 +74,8 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }