diff options
Diffstat (limited to 'board/uc100')
-rw-r--r-- | board/uc100/u-boot.lds | 3 | ||||
-rw-r--r-- | board/uc100/u-boot.lds.debug | 2 | ||||
-rw-r--r-- | board/uc100/uc100.c | 11 |
3 files changed, 13 insertions, 3 deletions
diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds index 85c9dc0..d7c798e 100644 --- a/board/uc100/u-boot.lds +++ b/board/uc100/u-boot.lds @@ -79,6 +79,7 @@ SECTIONS *(.rodata) *(.rodata1) *(.rodata.str1.4) + *(.eh_frame) } .fini : { *(.fini) } =0 .ctors : { *(.ctors) } @@ -111,11 +112,13 @@ SECTIONS _edata = .; PROVIDE (edata = .); + . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; + . = .; __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug index eaa3aa2..d9bb868 100644 --- a/board/uc100/u-boot.lds.debug +++ b/board/uc100/u-boot.lds.debug @@ -73,6 +73,8 @@ SECTIONS { *(.rodata) *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) } .fini : { *(.fini) } =0 .ctors : { *(.ctors) } diff --git a/board/uc100/uc100.c b/board/uc100/uc100.c index 6fc68e5..4f2cff6 100644 --- a/board/uc100/uc100.c +++ b/board/uc100/uc100.c @@ -30,6 +30,8 @@ #include <i2c.h> #include <miiphy.h> +int fec8xx_miiphy_write(char *devname, unsigned char addr, + unsigned char reg, unsigned short value); /*********************************************************************/ /* UPMA Pre Initilization Table by WV (Miron MT48LC16M16A2-7E B) */ @@ -147,7 +149,7 @@ int board_switch(void) */ int checkboard (void) { - unsigned char str[64]; + char str[64]; int i = getenv_r ("serial#", str, sizeof(str)); puts ("Board: "); @@ -258,8 +260,11 @@ int misc_init_r (void) */ mii_init(); - miiphy_write(0, PHY_BMCR, 0x2100); /* disable auto-negotiation, 100mbit, full-duplex */ - miiphy_write(0, PHY_FCSCR, 0x4122); /* set LED's to Link, Transmit, Receive */ + /* disable auto-negotiation, 100mbit, full-duplex */ + fec8xx_miiphy_write(NULL, 0, PHY_BMCR, 0x2100); + + /* set LED's to Link, Transmit, Receive */ + fec8xx_miiphy_write(NULL, 0, PHY_FCSCR, 0x4122); return 0; } |