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-rw-r--r--include/configs/APC405.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index 2b38927..3df99a0 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -49,12 +49,12 @@
#undef CONFIG_BOOTARGS
#define CONFIG_RAMBOOTCOMMAND \
- "setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
+ "setenv bootargs root=/dev/ram rw nfsroot=${serverip}:${rootpath} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \
"bootm ffc00000 ffca0000"
#define CONFIG_NFSBOOTCOMMAND \
- "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
+ "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \
"bootm ffc00000"
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
@@ -263,7 +263,7 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */
+#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -357,7 +357,7 @@
#define CFG_LCD_MEM CFG_LCD_BIG_MEM
#define CFG_LCD_REG CFG_LCD_BIG_REG
-#define CFG_LCD_LOGO_MAX_SIZE (1024*1024)
+#define CFG_VIDEO_LOGO_MAX_SIZE (1 << 20)
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in data cache)