diff options
Diffstat (limited to 'post')
| -rw-r--r-- | post/board/lwmon5/ecc.c | 12 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/fpu.c | 2 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/uart.c | 46 |
3 files changed, 58 insertions, 2 deletions
diff --git a/post/board/lwmon5/ecc.c b/post/board/lwmon5/ecc.c index 7f04f9a..3fa3ba6 100644 --- a/post/board/lwmon5/ecc.c +++ b/post/board/lwmon5/ecc.c @@ -236,7 +236,6 @@ int ecc_post_test (int flags) mfsdram(DDR0_00, value); mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL); - /* enable full support of ECC */ mfsdram(DDR0_22, value); mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK) @@ -247,6 +246,17 @@ int ecc_post_test (int flags) if (ret) break; } + + /* clear error status */ + mfsdram(DDR0_00, value); + mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL); + + /* + * Clear possible errors resulting from ECC testing. + * If not done, then we could get an interrupt later on when + * exceptions are enabled. + */ + set_mcsr(get_mcsr()); #endif return ret; diff --git a/post/cpu/ppc4xx/fpu.c b/post/cpu/ppc4xx/fpu.c index 27e9ed0..0c26fe0 100644 --- a/post/cpu/ppc4xx/fpu.c +++ b/post/cpu/ppc4xx/fpu.c @@ -29,8 +29,8 @@ #if defined(CONFIG_440EP) || \ defined(CONFIG_440EPX) -#include <ppc4xx.h> #include <asm/processor.h> +#include <ppc4xx.h> int fpu_status(void) diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index 0cffda5..5f14967 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -137,7 +137,53 @@ DECLARE_GLOBAL_DATA_PTR; +<<<<<<< master +#if !defined(CFG_EXT_SERIAL_CLOCK) +static void serial_divs (int baudrate, unsigned long *pudiv, + unsigned short *pbdiv) +{ + sys_info_t sysinfo; + unsigned long div; /* total divisor udiv * bdiv */ + unsigned long umin; /* minimum udiv */ + unsigned short diff; /* smallest diff */ + unsigned long udiv; /* best udiv */ + unsigned short idiff; /* current diff */ + unsigned short ibdiv; /* current bdiv */ + unsigned long i; + unsigned long est; /* current estimate */ + + get_sys_info(&sysinfo); + + udiv = 32; /* Assume lowest possible serial clk */ + div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */ + umin = sysinfo.pllOpbDiv << 1; /* 2 x OPB divisor */ + diff = 32; /* highest possible */ + + /* i is the test udiv value -- start with the largest + * possible (32) to minimize serial clock and constrain + * search to umin. + */ + for (i = 32; i > umin; i--) { + ibdiv = div / i; + est = i * ibdiv; + idiff = (est > div) ? (est-div) : (div-est); + if (idiff == 0) { + udiv = i; + break; /* can't do better */ + } else if (idiff < diff) { + udiv = i; /* best so far */ + diff = idiff; /* update lowest diff*/ + } + } + + *pudiv = udiv; + *pbdiv = div / udiv; +} +#endif + +======= #if defined(CONFIG_440) +>>>>>>> zeus static int uart_post_init (unsigned long dev_base) { unsigned long reg; |