diff options
Diffstat (limited to 'u-boot/board/purple')
| -rw-r--r-- | u-boot/board/purple/Makefile | 46 | ||||
| -rw-r--r-- | u-boot/board/purple/config.mk | 32 | ||||
| -rw-r--r-- | u-boot/board/purple/flash.c | 595 | ||||
| -rw-r--r-- | u-boot/board/purple/lowlevel_init.S | 36 | ||||
| -rw-r--r-- | u-boot/board/purple/purple.c | 284 | ||||
| -rw-r--r-- | u-boot/board/purple/sconsole.c | 125 | ||||
| -rw-r--r-- | u-boot/board/purple/sconsole.h | 46 | ||||
| -rw-r--r-- | u-boot/board/purple/u-boot.lds | 75 |
8 files changed, 1239 insertions, 0 deletions
diff --git a/u-boot/board/purple/Makefile b/u-boot/board/purple/Makefile new file mode 100644 index 0000000..10e566d --- /dev/null +++ b/u-boot/board/purple/Makefile @@ -0,0 +1,46 @@ + +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS = $(BOARD).o flash.o sconsole.o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/u-boot/board/purple/config.mk b/u-boot/board/purple/config.mk new file mode 100644 index 0000000..404c3fb --- /dev/null +++ b/u-boot/board/purple/config.mk @@ -0,0 +1,32 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Purple board with MIPS 5Kc CPU core +# + +# ROM version +CONFIG_SYS_TEXT_BASE = 0xB0000000 + +# RAM version +#CONFIG_SYS_TEXT_BASE = 0x80100000 diff --git a/u-boot/board/purple/flash.c b/u-boot/board/purple/flash.c new file mode 100644 index 0000000..5cee35e --- /dev/null +++ b/u-boot/board/purple/flash.c @@ -0,0 +1,595 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/inca-ip.h> + +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +typedef unsigned long FLASH_PORT_WIDTH; +typedef volatile unsigned long FLASH_PORT_WIDTHV; + +#define FLASH_ID_MASK 0xFFFFFFFF + +#define FPW FLASH_PORT_WIDTH +#define FPWV FLASH_PORT_WIDTHV + +#define ORMASK(size) ((-size) & OR_AM_MSK) + +#define FLASH29_REG_ADRS(reg) ((FPWV *)PHYS_FLASH_1 + (reg)) + +/* FLASH29 command register addresses */ + +#define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555) +#define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa) +#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) +#define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555) +#define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa) +#define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555) + +/* FLASH29 command definitions */ + +#define FLASH29_CMD_FIRST 0xaaaaaaaa +#define FLASH29_CMD_SECOND 0x55555555 +#define FLASH29_CMD_FOURTH 0xaaaaaaaa +#define FLASH29_CMD_FIFTH 0x55555555 +#define FLASH29_CMD_SIXTH 0x10101010 + +#define FLASH29_CMD_SECTOR 0x30303030 +#define FLASH29_CMD_PROGRAM 0xa0a0a0a0 +#define FLASH29_CMD_CHIP_ERASE 0x80808080 +#define FLASH29_CMD_READ_RESET 0xf0f0f0f0 +#define FLASH29_CMD_AUTOSELECT 0x90909090 +#define FLASH29_CMD_READ 0x70707070 + +#define IN_RAM_CMD_READ 0x1 +#define IN_RAM_CMD_WRITE 0x2 + +#define FLASH_WRITE_CMD ((ulong)(flash_write_cmd) & 0x7)+0xbf008000 +#define FLASH_READ_CMD ((ulong)(flash_read_cmd) & 0x7)+0xbf008000 + +typedef void (*FUNCPTR_CP)(ulong *source, ulong *destination, ulong nlongs); +typedef void (*FUNCPTR_RD)(int cmd, FPWV * pFA, char * string, int strLen); +typedef void (*FUNCPTR_WR)(int cmd, FPWV * pFA, FPW value); + +static ulong flash_get_size(FPWV *addr, flash_info_t *info); +static int write_word(flash_info_t *info, FPWV *dest, FPW data); +static void flash_get_offsets(ulong base, flash_info_t *info); +static flash_info_t *flash_get_info(ulong base); + +static void load_cmd(ulong cmd); +static ulong in_ram_cmd = 0; + + +/****************************************************************************** +* +* Don't change the program architecture +* This architecture assure the program +* can be relocated to scratch ram +*/ +static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) +{ + int i,j; + FPW temp,temp1; + FPWV *str; + + str = (FPWV *)string; + + j= strLen/4; + + if(cmd == FLASH29_CMD_AUTOSELECT) + { + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; + } + + if(cmd == FLASH29_CMD_READ) + { + i = 0; + while(i<j) + { + temp = *pFA++; + temp1 = *(int *)0xa0000000; + *(int *)0xbf0081f8 = temp1 + temp; + *str++ = temp; + i++; + } + } + + if(cmd == FLASH29_CMD_READ_RESET) + { + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; + } + + *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ +} + +/****************************************************************************** +* +* Don't change the program architecture +* This architecture assure the program +* can be relocated to scratch ram +*/ +static void flash_write_cmd(int cmd, FPWV * pFA, FPW value) +{ + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + + if (cmd == FLASH29_CMD_SECTOR) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; + *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; + *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; + *pFA = FLASH29_CMD_SECTOR; + } + + if (cmd == FLASH29_CMD_SIXTH) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; + *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; + *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; + *(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH; + } + + if (cmd == FLASH29_CMD_PROGRAM) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM; + *pFA = value; + } + + if (cmd == FLASH29_CMD_READ_RESET) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; + } + + *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ +} + +static void load_cmd(ulong cmd) +{ + ulong *src; + ulong *dst; + FUNCPTR_CP absEntry; + ulong func; + + if (in_ram_cmd & cmd) return; + + if (cmd == IN_RAM_CMD_READ) + { + func = (ulong)flash_read_cmd; + } + else + { + func = (ulong)flash_write_cmd; + } + + src = (ulong *)(func & 0xfffffff8); + dst = (ulong *)0xbf008000; + absEntry = (FUNCPTR_CP)(0xbf0081d0); + absEntry(src,dst,0x38); + + in_ram_cmd = cmd; +} + +/*----------------------------------------------------------------------- + * flash_init() + * + * sets up flash_info and returns size of FLASH (bytes) + */ +unsigned long flash_init (void) +{ + unsigned long size = 0; + int i; + + load_cmd(IN_RAM_CMD_READ); + + /* Init: no FLASHes known */ + for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + ulong flashbase = PHYS_FLASH_1; + ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0; + + /* Disable write protection */ + *buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS; + +#if 1 + memset(&flash_info[i], 0, sizeof(flash_info_t)); +#endif + + flash_info[i].size = + flash_get_size((FPW *)flashbase, &flash_info[i]); + + if (flash_info[i].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", + i, flash_info[i].size); + } + + size += flash_info[i].size; + } + +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + /* monitor protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); +#endif + +#ifdef CONFIG_ENV_IS_IN_FLASH + /* ENV protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1, + flash_get_info(CONFIG_ENV_ADDR)); +#endif + + return size; +} + +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t *info) +{ + int i; + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD + && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM160B) { + + int bootsect_size[4]; /* number of bytes/boot sector */ + int sect_size; /* number of bytes/regular sector */ + + bootsect_size[0] = 0x00008000; + bootsect_size[1] = 0x00004000; + bootsect_size[2] = 0x00004000; + bootsect_size[3] = 0x00010000; + sect_size = 0x00020000; + + /* set sector offsets for bottom boot block type */ + for (i = 0; i < info->sector_count; i++) { + info->start[i] = base; + base += i < 4 ? bootsect_size[i] : sect_size; + } + } +} + +/*----------------------------------------------------------------------- + */ + +static flash_info_t *flash_get_info(ulong base) +{ + int i; + flash_info_t * info; + + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { + info = & flash_info[i]; + if (info->start[0] <= base && base < info->start[0] + info->size) + break; + } + + return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; +} + +/*----------------------------------------------------------------------- + */ + +void flash_print_info (flash_info_t *info) +{ + int i; + uchar *boottype; + uchar *bootletter; + char *fmt; + uchar botbootletter[] = "B"; + uchar topbootletter[] = "T"; + uchar botboottype[] = "bottom boot sector"; + uchar topboottype[] = "top boot sector"; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: printf ("AMD "); break; + case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; + case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_SST: printf ("SST "); break; + case FLASH_MAN_STM: printf ("STM "); break; + case FLASH_MAN_INTEL: printf ("INTEL "); break; + default: printf ("Unknown Vendor "); break; + } + + /* check for top or bottom boot, if it applies */ + if (info->flash_id & FLASH_BTYPE) { + boottype = botboottype; + bootletter = botbootletter; + } + else { + boottype = topboottype; + bootletter = topbootletter; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM160B: + fmt = "29LV160B%s (16 Mbit, %s)\n"; + break; + case FLASH_28F800C3B: + case FLASH_28F800C3T: + fmt = "28F800C3%s (8 Mbit, %s)\n"; + break; + case FLASH_INTEL800B: + case FLASH_INTEL800T: + fmt = "28F800B3%s (8 Mbit, %s)\n"; + break; + case FLASH_28F160C3B: + case FLASH_28F160C3T: + fmt = "28F160C3%s (16 Mbit, %s)\n"; + break; + case FLASH_INTEL160B: + case FLASH_INTEL160T: + fmt = "28F160B3%s (16 Mbit, %s)\n"; + break; + case FLASH_28F320C3B: + case FLASH_28F320C3T: + fmt = "28F320C3%s (32 Mbit, %s)\n"; + break; + case FLASH_INTEL320B: + case FLASH_INTEL320T: + fmt = "28F320B3%s (32 Mbit, %s)\n"; + break; + case FLASH_28F640C3B: + case FLASH_28F640C3T: + fmt = "28F640C3%s (64 Mbit, %s)\n"; + break; + case FLASH_INTEL640B: + case FLASH_INTEL640T: + fmt = "28F640B3%s (64 Mbit, %s)\n"; + break; + default: + fmt = "Unknown Chip Type\n"; + break; + } + + printf (fmt, bootletter, boottype); + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, + info->sector_count); + + printf (" Sector Start Addresses:"); + + for (i=0; i<info->sector_count; ++i) { + if ((i % 5) == 0) { + printf ("\n "); + } + + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ + +ulong flash_get_size (FPWV *addr, flash_info_t *info) +{ + FUNCPTR_RD absEntry; + FPW retValue; + int flag; + + load_cmd(IN_RAM_CMD_READ); + absEntry = (FUNCPTR_RD)FLASH_READ_CMD; + + flag = disable_interrupts(); + absEntry(FLASH29_CMD_AUTOSELECT,0,0,0); + if (flag) enable_interrupts(); + + udelay(100); + + flag = disable_interrupts(); + absEntry(FLASH29_CMD_READ, addr + 1, (char *)&retValue, sizeof(retValue)); + absEntry(FLASH29_CMD_READ_RESET,0,0,0); + if (flag) enable_interrupts(); + + udelay(100); + + switch (retValue) { + + case (FPW)AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 8 or 16 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* => no or unknown flash */ + } + + flash_get_offsets((ulong)addr, info); + + return (info->size); +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t *info, int s_first, int s_last) +{ + FPWV *addr; + int flag, prot, sect; + ulong start, now, last; + FUNCPTR_WR absEntry; + + load_cmd(IN_RAM_CMD_WRITE); + absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM160B: + break; + case FLASH_UNKNOWN: + default: + printf ("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return 1; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + last = get_timer(0); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + + if (info->protect[sect] != 0) /* protected, skip it */ + continue; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + addr = (FPWV *)(info->start[sect]); + absEntry(FLASH29_CMD_SECTOR, addr, 0); + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + start = get_timer(0); + + while ((now = get_timer(start)) <= CONFIG_SYS_FLASH_ERASE_TOUT) { + + /* show that we're waiting */ + if ((get_timer(last)) > CONFIG_SYS_HZ) {/* every second */ + putc ('.'); + last = get_timer(0); + } + } + + flag = disable_interrupts(); + absEntry(FLASH29_CMD_READ_RESET,0,0); + if (flag) + enable_interrupts(); + } + + printf (" done\n"); + return 0; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ + int bytes; /* number of bytes to program in current word */ + int left; /* number of bytes left to program */ + int i, res; + + for (left = cnt, res = 0; + left > 0 && res == 0; + addr += sizeof(data), left -= sizeof(data) - bytes) { + + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); + + /* combine source and destination data so can program + * an entire word of 16 or 32 bits + */ + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) + data += *((uchar *)addr + i); + else + data += *src++; + } + + res = write_word(info, (FPWV *)addr, data); + } + + return (res); +} + +static int write_word (flash_info_t *info, FPWV *dest, FPW data) +{ + int res = 0; /* result, assume success */ + FUNCPTR_WR absEntry; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*dest & data) != data) { + return (2); + } + + if (info->start[0] != PHYS_FLASH_1) + { + return (3); + } + + load_cmd(IN_RAM_CMD_WRITE); + absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; + + flag = disable_interrupts(); + absEntry(FLASH29_CMD_PROGRAM,dest,data); + if (flag) enable_interrupts(); + + udelay(100); + + flag = disable_interrupts(); + absEntry(FLASH29_CMD_READ_RESET,0,0); + if (flag) enable_interrupts(); + + return (res); +} diff --git a/u-boot/board/purple/lowlevel_init.S b/u-boot/board/purple/lowlevel_init.S new file mode 100644 index 0000000..1bd3edb --- /dev/null +++ b/u-boot/board/purple/lowlevel_init.S @@ -0,0 +1,36 @@ +/* + * Memory sub-system initialization code for PURPLE development board. + * + * Copyright (c) 2003 Wolfgang Denk <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/regdef.h> + +#define MC_IOGP 0xBF800800 + + .globl lowlevel_init +lowlevel_init: + li t0, MC_IOGP + li t1, 0xf24 + sw t1, 0(t0) + jr ra + nop diff --git a/u-boot/board/purple/purple.c b/u-boot/board/purple/purple.c new file mode 100644 index 0000000..4e9e700 --- /dev/null +++ b/u-boot/board/purple/purple.c @@ -0,0 +1,284 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <netdev.h> +#include <asm/inca-ip.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h> +#include <asm/reboot.h> + +#include "sconsole.h" + +#define cache_unroll(base,op) \ + __asm__ __volatile__(" \ + .set noreorder; \ + .set mips3; \ + cache %1, (%0); \ + .set mips0; \ + .set reorder" \ + : \ + : "r" (base), \ + "i" (op)); + +typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs); + +extern void asc_serial_init (void); +extern void asc_serial_putc (char); +extern void asc_serial_puts (const char *); +extern int asc_serial_getc (void); +extern int asc_serial_tstc (void); +extern void asc_serial_setbrg (void); + +void _machine_restart(void) +{ + void (*f)(void) = (void *) 0xbfc00000; + + f(); +} + +static void sdram_timing_init (ulong size) +{ + register uint pass; + register uint done; + register uint count; + register uint p0, p1, p2, p3, p4; + register uint addr; + +#define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3; +#define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3; + + done = 0; + p0 = 2; + while (p0 < 4 && done == 0) { + p1 = 0; + while (p1 < 2 && done == 0) { + p2 = 0; + while (p2 < 2 && done == 0) { + p3 = 0; + while (p3 < 16 && done == 0) { + count = 0; + p4 = 0; + while (p4 < 32 && done == 0) { + WRITE_MC_IOGP_1; + + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size); + addr = addr + 4) { + *(uint *) addr = 0xaa55aa55; + } + + pass = 1; + + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size) && pass == 1; + addr = addr + 4) { + if (*(uint *) addr != 0xaa55aa55) + pass = 0; + } + + if (pass == 1) { + count++; + } else { + count = 0; + } + + if (count == 32) { + WRITE_MC_IOGP_2; + done = 1; + } + p4++; + } + p3++; + } + p2++; + } + p1++; + } + p0++; + if (p0 == 1) + p0++; + } +} + +phys_size_t initdram(int board_type) +{ + /* The only supported number of SDRAM banks is 4. + */ +#define CONFIG_SYS_NB 4 + + ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0; + ulong cfgdw = *INCA_IP_SDRAM_MC_CFGDW; + int cols = cfgpb0 & 0xF; + int rows = (cfgpb0 & 0xF0) >> 4; + int dw = cfgdw & 0xF; + ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CONFIG_SYS_NB; + void (* sdram_init) (ulong); + + sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init); + + sdram_init(0x10000); + + return size; +} + +int checkboard (void) +{ + + unsigned long chipid = *(unsigned long *)0xB800C800; + + printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF); + + printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000); + + set_io_port_base(0); + + return 0; +} + +int misc_init_r (void) +{ + asc_serial_init (); + + sconsole_putc = asc_serial_putc; + sconsole_puts = asc_serial_puts; + sconsole_getc = asc_serial_getc; + sconsole_tstc = asc_serial_tstc; + sconsole_setbrg = asc_serial_setbrg; + + sconsole_flush (); + return (0); +} + +/******************************************************************************* +* +* copydwords - copy one buffer to another a long at a time +* +* This routine copies the first <nlongs> longs from <source> to <destination>. +*/ +static void copydwords (ulong *source, ulong *destination, ulong nlongs) +{ + ulong temp,temp1; + ulong *dstend = destination + nlongs; + + while (destination < dstend) { + temp = *source++; + /* dummy read from sdram */ + temp1 = *(ulong *)0xa0000000; + /* avoid optimization from compliler */ + *(ulong *)0xbf0081f8 = temp1 + temp; + *destination++ = temp; + + } +} + +/******************************************************************************* +* +* copyLongs - copy one buffer to another a long at a time +* +* This routine copies the first <nlongs> longs from <source> to <destination>. +*/ +static void copyLongs (ulong *source, ulong *destination, ulong nlongs) +{ + FUNCPTR absEntry; + + absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7)); + absEntry(source, destination, nlongs); +} + +/******************************************************************************* +* +* programLoad - load program into ram +* +* This routine load copydwords into ram +* +*/ +static void programLoad(void) +{ + FUNCPTR absEntry; + ulong *src,*dst; + + src = (ulong *)(CONFIG_SYS_TEXT_BASE + 0x428); + dst = (ulong *)0xbf0081d0; + + absEntry = (FUNCPTR)(CONFIG_SYS_TEXT_BASE + 0x400); + absEntry(src,dst,0x6); + + src = (ulong *)((ulong)copydwords & 0xfffffff8); + dst = (ulong *)0xbf008000; + + absEntry(src,dst,0x38); +} + +/******************************************************************************* +* +* copy_code - copy u-boot image from flash to RAM +* +* This routine is needed to solve flash problems on this board +* +*/ +void copy_code (ulong dest_addr) +{ + extern long uboot_end_data; + unsigned long start; + unsigned long end; + + /* load copydwords into ram + */ + programLoad(); + + /* copy u-boot code + */ + copyLongs((ulong *)CONFIG_SYS_MONITOR_BASE, + (ulong *)dest_addr, + ((ulong)&uboot_end_data - CONFIG_SYS_MONITOR_BASE + 3) / 4); + + + /* flush caches + */ + + start = CKSEG0; + end = start + CONFIG_SYS_DCACHE_SIZE; + while(start < end) { + cache_unroll(start,Index_Writeback_Inv_D); + start += CONFIG_SYS_CACHELINE_SIZE; + } + + start = CKSEG0; + end = start + CONFIG_SYS_ICACHE_SIZE; + while(start < end) { + cache_unroll(start,Index_Invalidate_I); + start += CONFIG_SYS_CACHELINE_SIZE; + } +} + +#ifdef CONFIG_PLB2800_ETHER +int board_eth_init(bd_t *bis) +{ + return plb2800_eth_initialize(bis); +} +#endif diff --git a/u-boot/board/purple/sconsole.c b/u-boot/board/purple/sconsole.c new file mode 100644 index 0000000..cd9d871 --- /dev/null +++ b/u-boot/board/purple/sconsole.c @@ -0,0 +1,125 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> + +#include "sconsole.h" + +void (*sconsole_putc) (char) = 0; +void (*sconsole_puts) (const char *) = 0; +int (*sconsole_getc) (void) = 0; +int (*sconsole_tstc) (void) = 0; +void (*sconsole_setbrg) (void) = 0; + +int serial_init (void) +{ + sconsole_buffer_t *sb = SCONSOLE_BUFFER; + + sb->pos = 0; + sb->size = 0; + sb->max_size = CONFIG_SYS_SCONSOLE_SIZE - sizeof (sconsole_buffer_t); + + return (0); +} + +void serial_putc (char c) +{ + if (sconsole_putc) { + (*sconsole_putc) (c); + } else { + sconsole_buffer_t *sb = SCONSOLE_BUFFER; + + if (c) { + sb->data[sb->pos++] = c; + if (sb->pos == sb->max_size) { + sb->pos = 0; + } + if (sb->size < sb->max_size) { + sb->size++; + } + } + } +} + +void serial_puts (const char *s) +{ + if (sconsole_puts) { + (*sconsole_puts) (s); + } else { + sconsole_buffer_t *sb = SCONSOLE_BUFFER; + + while (*s) { + sb->data[sb->pos++] = *s++; + if (sb->pos == sb->max_size) { + sb->pos = 0; + } + if (sb->size < sb->max_size) { + sb->size++; + } + } + } +} + +int serial_getc (void) +{ + if (sconsole_getc) { + return (*sconsole_getc) (); + } else { + return 0; + } +} + +int serial_tstc (void) +{ + if (sconsole_tstc) { + return (*sconsole_tstc) (); + } else { + return 0; + } +} + +void serial_setbrg (void) +{ + if (sconsole_setbrg) { + (*sconsole_setbrg) (); + } +} + +void sconsole_flush (void) +{ + if (sconsole_putc) { + sconsole_buffer_t *sb = SCONSOLE_BUFFER; + unsigned int end = sb->pos < sb->size + ? sb->pos + sb->max_size - sb->size + : sb->pos - sb->size; + + while (sb->size) { + (*sconsole_putc) (sb->data[end++]); + if (end == sb->max_size) { + end = 0; + } + sb->size--; + } + } +} diff --git a/u-boot/board/purple/sconsole.h b/u-boot/board/purple/sconsole.h new file mode 100644 index 0000000..baed5fb --- /dev/null +++ b/u-boot/board/purple/sconsole.h @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SCONSOLE_H_ +#define _SCONSOLE_H_ + +#include <config.h> + +typedef struct sconsole_buffer_s { + unsigned long size; + unsigned long max_size; + unsigned long pos; + char data[1]; +} sconsole_buffer_t; + +#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CONFIG_SYS_SCONSOLE_ADDR) + +extern void (* sconsole_putc) (char); +extern void (* sconsole_puts) (const char *); +extern int (* sconsole_getc) (void); +extern int (* sconsole_tstc) (void); +extern void (* sconsole_setbrg) (void); + +extern void sconsole_flush (void); + +#endif diff --git a/u-boot/board/purple/u-boot.lds b/u-boot/board/purple/u-boot.lds new file mode 100644 index 0000000..719f268 --- /dev/null +++ b/u-boot/board/purple/u-boot.lds @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") +*/ +OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips") +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + arch/mips/cpu/start.o (.text) + board/purple/lowlevel_init.o (.text) + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.ppcenv) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + .sdata : { *(.sdata) } + + .u_boot_cmd : { + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + uboot_end_data = .; + num_got_entries = (__got_end - __got_start) >> 2; + + . = ALIGN(4); + .sbss (NOLOAD) : { *(.sbss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + uboot_end = .; +} |