From ba83a3076523be79e85fd07433f8b3f361e6428b Mon Sep 17 00:00:00 2001 From: wdenk Date: Mon, 4 Apr 2005 12:23:03 +0000 Subject: Patch by Steven Scholz, 04 Apr 2005: Make sure that MDIO clock does not exceed 2.5 MHz on AT91 --- cpu/at91rm9200/at91rm9200_ether.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpu') diff --git a/cpu/at91rm9200/at91rm9200_ether.c b/cpu/at91rm9200/at91rm9200_ether.c index 2ec888f..0bc1d89 100644 --- a/cpu/at91rm9200/at91rm9200_ether.c +++ b/cpu/at91rm9200/at91rm9200_ether.c @@ -210,6 +210,11 @@ int eth_init (bd_t * bd) p_mac->EMAC_CFG |= AT91C_EMAC_RMII; #endif +#if (AT91C_MASTER_CLOCK > 40000000) + /* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */ + p_mac->EMAC_CFG |= AT91C_EMAC_CLK_HCLK_64; +#endif + p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE; at91rm92000_GetPhyInterface (& PhyOps); -- cgit v1.1