summaryrefslogtreecommitdiffstats
path: root/board/alaska/alaska.c
blob: 5903e68cfcf0036fbbfddeaa238b0cc71c5a7c42 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
/*
 * (C) Copyright 2004, Freescale Inc.
 * TsiChung Liew, Tsi-Chung.Liew@freescale.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <mpc8220.h>
#include <asm/processor.h>
#include <asm/mmu.h>

void setupBat (ulong size)
{
	ulong batu, batl;
	int blocksize = 0;

	/* Flash 0 */
#if defined (CFG_AMD_BOOT)
	batu = CFG_FLASH0_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
#else
	batu = CFG_FLASH0_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
#endif
	batl = CFG_FLASH0_BASE | 0x22;
	write_bat (IBAT0, batu, batl);
	write_bat (DBAT0, batu, batl);

	/* Flash 1 */
#if defined (CFG_AMD_BOOT)
	batu = CFG_FLASH1_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
#else
	batu = CFG_FLASH1_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
#endif
	batl = CFG_FLASH1_BASE | 0x22;
	write_bat (IBAT1, batu, batl);
	write_bat (DBAT1, batu, batl);

	/* CPLD */
	batu = CFG_CPLD_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
	batl = CFG_CPLD_BASE | 0x22;
	write_bat (IBAT2, 0, 0);
	write_bat (DBAT2, batu, batl);

	/* FPGA */
	batu = CFG_FPGA_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
	batl = CFG_FPGA_BASE | 0x22;
	write_bat (IBAT3, 0, 0);
	write_bat (DBAT3, batu, batl);

	/* MBAR - Data only */
	batu = CFG_MBAR | BPP_RW | BPP_RX;
	batl = CFG_MBAR | 0x22;
	mtspr (IBAT4L, 0);
	mtspr (IBAT4U, 0);
	mtspr (DBAT4L, batl);
	mtspr (DBAT4U, batu);

	/* MBAR - SRAM */
	batu = CFG_SRAM_BASE | BPP_RW | BPP_RX;
	batl = CFG_SRAM_BASE | 0x42;
	mtspr (IBAT5L, batl);
	mtspr (IBAT5U, batu);
	mtspr (DBAT5L, batl);
	mtspr (DBAT5U, batu);

	if (size <= 0x800000)	/* 8MB */
		blocksize = BL_8M << 2;
	else if (size <= 0x1000000)	/* 16MB */
		blocksize = BL_16M << 2;
	else if (size <= 0x2000000)	/* 32MB */
		blocksize = BL_32M << 2;
	else if (size <= 0x4000000)	/* 64MB */
		blocksize = BL_64M << 2;
	else if (size <= 0x8000000)	/* 128MB */
		blocksize = BL_128M << 2;
	else if (size <= 0x10000000)	/* 256MB */
		blocksize = BL_256M << 2;

	/* Memory */
	batu = CFG_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
	batl = CFG_SDRAM_BASE | 0x42;
	mtspr (IBAT6L, batl);
	mtspr (IBAT6U, batu);
	mtspr (DBAT6L, batl);
	mtspr (DBAT6U, batu);

	/* memory size is less than 256MB */
	if (size <= 0x10000000) {
		/* Nothing */
		batu = 0;
		batl = 0;
	} else {
		size -= 0x10000000;
		if (size <= 0x800000)	/* 8MB */
			blocksize = BL_8M << 2;
		else if (size <= 0x1000000)	/* 16MB */
			blocksize = BL_16M << 2;
		else if (size <= 0x2000000)	/* 32MB */
			blocksize = BL_32M << 2;
		else if (size <= 0x4000000)	/* 64MB */
			blocksize = BL_64M << 2;
		else if (size <= 0x8000000)	/* 128MB */
			blocksize = BL_128M << 2;
		else if (size <= 0x10000000)	/* 256MB */
			blocksize = BL_256M << 2;

		batu = (CFG_SDRAM_BASE +
			0x10000000) | blocksize | BPP_RW | BPP_RX;
		batl = (CFG_SDRAM_BASE + 0x10000000) | 0x42;
	}

	mtspr (IBAT7L, batl);
	mtspr (IBAT7U, batu);
	mtspr (DBAT7L, batl);
	mtspr (DBAT7U, batu);
}

long int initdram (int board_type)
{
	ulong size;

	size = dramSetup ();

/* if iCache ad dCache is defined */
#if (CONFIG_COMMANDS & CFG_CMD_CACHE) || defined(CONFIG_CMD_CACHE)
/*    setupBat(size);*/
#endif

	return size;
}

int checkboard (void)
{
	puts ("Board: Alaska MPC8220 Evaluation Board\n");

	return 0;
}