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-rw-r--r--x-loader/Makefile161
-rw-r--r--x-loader/README22
-rw-r--r--x-loader/board/omap2420h4/Makefile20
-rw-r--r--x-loader/board/omap2430sdp/Makefile20
-rw-r--r--x-loader/board/omap3430labrador/Makefile20
-rw-r--r--x-loader/board/omap3430sdp/Makefile20
-rw-r--r--x-loader/board/omap3530beagle/Makefile20
-rw-r--r--x-loader/board/omap3evm/Makefile20
-rw-r--r--x-loader/board/omap3evm/omap3evm.c2
-rw-r--r--x-loader/board/overo/Makefile20
-rw-r--r--x-loader/board/overo/config.mk4
-rw-r--r--x-loader/board/overo/overo.c442
-rw-r--r--x-loader/common/Makefile13
-rw-r--r--x-loader/config.mk45
-rw-r--r--x-loader/cpu/arm1136/Makefile16
-rw-r--r--x-loader/cpu/omap3/Makefile16
-rw-r--r--x-loader/cpu/omap3/config.mk2
-rw-r--r--x-loader/disk/Makefile15
-rw-r--r--x-loader/drivers/Makefile38
-rw-r--r--x-loader/drivers/k9f1g08r0a.c55
-rw-r--r--x-loader/drivers/serial.c15
-rw-r--r--x-loader/fs/Makefile2
-rw-r--r--x-loader/fs/fat/Makefile15
-rw-r--r--x-loader/fs/fat/fat.c32
-rw-r--r--x-loader/include/asm/arch-omap3/i2c.h2
-rw-r--r--x-loader/include/asm/arch-omap3/mem.h84
-rw-r--r--x-loader/include/asm/arch-omap3/omap3430.h56
-rw-r--r--x-loader/include/configs/omap3430labrador.h4
-rw-r--r--x-loader/lib/Makefile15
-rw-r--r--x-loader/lib/board.c9
-rw-r--r--x-loader/x-load.flashbin24652 -> 0 bytes
31 files changed, 887 insertions, 318 deletions
diff --git a/x-loader/Makefile b/x-loader/Makefile
index 81b54de..27fe4b5 100644
--- a/x-loader/Makefile
+++ b/x-loader/Makefile
@@ -41,13 +41,74 @@ export HOSTARCH
VENDOR=
#########################################################################
+#
+# X-loader build supports producing a object files to the separate external
+# directory. Two use cases are supported:
+#
+# 1) Add O= to the make command line
+# 'make O=/tmp/build all'
+#
+# 2) Set environement variable BUILD_DIR to point to the desired location
+# 'export BUILD_DIR=/tmp/build'
+# 'make'
+#
+# Command line 'O=' setting overrides BUILD_DIR environent variable.
+#
+# When none of the above methods is used the local build is performed and
+# the object files are placed in the source directory.
+#
+
+ifdef O
+ifeq ("$(origin O)", "command line")
+BUILD_DIR := $(O)
+endif
+endif
+
+ifneq ($(BUILD_DIR),)
+saved-output := $(BUILD_DIR)
+
+# Attempt to create a output directory.
+$(shell [ -d ${BUILD_DIR} ] || mkdir -p ${BUILD_DIR})
-TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi)
-export TOPDIR
+# Verify if it was successful.
+BUILD_DIR := $(shell cd $(BUILD_DIR) && /bin/pwd)
+$(if $(BUILD_DIR),,$(error output directory "$(saved-output)" does not exist))
+endif # ifneq ($(BUILD_DIR),)
+
+OBJTREE := $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
+SRCTREE := $(CURDIR)
+TOPDIR := $(SRCTREE)
+LNDIR := $(OBJTREE)
+export TOPDIR SRCTREE OBJTREE
+
+MKCONFIG := $(SRCTREE)/mkconfig
+export MKCONFIG
+
+ifneq ($(OBJTREE),$(SRCTREE))
+REMOTE_BUILD := 1
+export REMOTE_BUILD
+endif
+
+# $(obj) and (src) are defined in config.mk but here in main Makefile
+# we also need them before config.mk is included which is the case for
+# some targets like unconfig, clean, clobber, distclean, etc.
+ifneq ($(OBJTREE),$(SRCTREE))
+obj := $(OBJTREE)/
+src := $(SRCTREE)/
+else
+obj :=
+src :=
+endif
+export obj src
+
+# Make sure CDPATH settings don't interfere
+unexport CDPATH
+
+#########################################################################
-ifeq (include/config.mk,$(wildcard include/config.mk))
+ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
# load ARCH, BOARD, and CPU configuration
-include include/config.mk
+include $(obj)include/config.mk
export ARCH CPU BOARD VENDOR
# load other configuration
include $(TOPDIR)/config.mk
@@ -63,6 +124,7 @@ endif
OBJS = cpu/$(CPU)/start.o
+OBJS := $(addprefix $(obj),$(OBJS))
LIBS += board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
@@ -71,44 +133,61 @@ LIBS += fs/fat/libfat.a
LIBS += disk/libdisk.a
LIBS += drivers/libdrivers.a
LIBS += common/libcommon.a
+
+LIBS := $(addprefix $(obj),$(sort $(LIBS)))
.PHONY : $(LIBS)
# Add GCC lib
PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
SUBDIRS =
+
+__OBJS := $(subst $(obj),,$(OBJS))
+__LIBS := $(subst $(obj),,$(LIBS))
+
#########################################################################
#########################################################################
-ALL = x-load.bin System.map
+ALL = $(obj)x-load.bin $(obj)System.map
all: $(ALL)
+ift: $(ALL) $(obj)x-load.bin.ift
+
+$(obj)x-load.bin.ift: $(obj)signGP $(obj)System.map $(obj)x-load.bin
+ TEXT_BASE=`grep -w _start $(obj)System.map|cut -d ' ' -f1`
+ $(obj)./signGP $(obj)x-load.bin $(TEXT_BASE)
+ cp $(obj)x-load.bin.ift $(obj)MLO
-x-load.bin: x-load
+$(obj)x-load.bin: $(obj)x-load
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-x-load: $(OBJS) $(LIBS) $(LDSCRIPT)
+$(obj)x-load: $(OBJS) $(LIBS) $(LDSCRIPT)
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
- $(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \
- --start-group $(LIBS) --end-group $(PLATFORM_LIBS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map x-load.map -o x-load
-
-$(LIBS):
- $(MAKE) -C `dirname $@`
+$(OBJS):
+ $(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
+
+$(LIBS):
+ $(MAKE) -C $(dir $(subst $(obj),,$@))
-System.map: x-load
+$(obj)System.map: $(obj)x-load
@$(NM) $< | \
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
- sort > System.map
+ sort > $(obj)System.map
-oneboot: x-load.bin
+oneboot: $(obj)x-load.bin
scripts/mkoneboot.sh
+$(obj)signGP: scripts/signGP.c
+ gcc -Wall -g -O3 -o $(obj)signGP $<
+
#########################################################################
else
-all install x-load x-load.srec oneboot depend dep:
+all $(obj)x-load $(obj)x-load.bin oneboot depend dep $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
endif
@@ -116,66 +195,74 @@ endif
#########################################################################
unconfig:
- rm -f include/config.h include/config.mk
+ rm -f $(obj)include/config.h $(obj)include/config.mk
#========================================================================
# ARM
#========================================================================
#########################################################################
-## OMAP1 (ARM92xT) Systems
-#########################################################################
-
-omap1710h3_config : unconfig
- @./mkconfig $(@:_config=) arm arm926ejs omap1710h3
-
-#########################################################################
## OMAP2 (ARM1136) Systems
#########################################################################
omap2420h4_config : unconfig
- @./mkconfig $(@:_config=) arm arm1136 omap2420h4
+ @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4
omap2430sdp_config : unconfig
- @./mkconfig $(@:_config=) arm arm1136 omap2430sdp
+ @$(MKCONFIG) $(@:_config=) arm arm1136 omap2430sdp
#########################################################################
## OMAP3 (ARM-CortexA8) Systems
#########################################################################
omap3430sdp_config : unconfig
- @./mkconfig $(@:_config=) arm omap3 omap3430sdp
+ @$(MKCONFIG) $(@:_config=) arm omap3 omap3430sdp
omap3430labrador_config : unconfig
- @./mkconfig $(@:_config=) arm omap3 omap3430labrador
+ @$(MKCONFIG) $(@:_config=) arm omap3 omap3430labrador
omap3evm_config : unconfig
- @./mkconfig $(@:_config=) arm omap3 omap3evm
+ @$(MKCONFIG) $(@:_config=) arm omap3 omap3evm
overo_config : unconfig
- @./mkconfig $(@:_config=) arm omap3 overo
+ @$(MKCONFIG) $(@:_config=) arm omap3 overo
omap3530beagle_config : unconfig
- @./mkconfig $(@:_config=) arm omap3 omap3530beagle
+ @$(MKCONFIG) $(@:_config=) arm omap3 omap3530beagle
+
+omap3530gta04_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm omap3 omap3530gta04
+
+#########################################################################
+## OMAP4 (ARM-CortexA9) Systems
+#########################################################################
+omap4430panda_config : unconfig
+ @./mkconfig $(@:_config=) arm omap4 omap4430panda
#########################################################################
clean:
- find . -type f \
+ find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
-o -name '*.o' -o -name '*.a' \) -print \
| xargs rm -f
clobber: clean
- find . -type f \
+ find $(OBJTREE) -type f \
\( -name .depend -o -name '*.srec' -o -name '*.bin' \) \
-print \
| xargs rm -f
- rm -f $(OBJS) *.bak tags TAGS
- rm -fr *.*~
- rm -f x-load x-load.map $(ALL)
- rm -f include/asm/proc include/asm/arch
+ rm -f $(OBJS) $(obj)*.bak $(obj)tags $(obj)TAGS
+ rm -fr $(obj)*.*~
+ rm -f $(obj)x-load $(obj)x-load.map $(ALL) $(obj)x-load.bin.ift $(obj)signGP $(obj)MLO
+ rm -f $(obj)include/asm/proc $(obj)include/asm/arch
+ifeq ($(OBJTREE),$(SRCTREE))
mrproper \
distclean: clobber unconfig
+else
+mrproper \
+distclean: clobber unconfig
+ rm -rf $(obj)*
+endif
backup:
F=`basename $(TOPDIR)` ; cd .. ; \
diff --git a/x-loader/README b/x-loader/README
index ae2662a..d7b16dd 100644
--- a/x-loader/README
+++ b/x-loader/README
@@ -36,8 +36,6 @@ Nand booting.
Status:
=======
-The support for Texas Instruments H3 board (OMAP1710) has been implemented
-and tested. (May 2004)
The support for Texas Instruments H4 board (OMAP2420) has been implemented
and tested. (Nov 2004)
The support for Texas Instruments 2430SDP board (OMAP2430) has been implemented
@@ -62,8 +60,6 @@ Directory Hierarchy:
- cpu/omap3 Files specific to ARM CortexA8 CPU
-- board/omap1710h3
- Files specific to OMAP 1710 H3 boards
- board/omap2420h4
Files specific to OMAP 2420 H4 boards
- board/omap2430sdp
@@ -79,16 +75,16 @@ Configuration is usually done using C preprocessor defines. Configuration
depends on the combination of board and CPU type; all such information is
kept in a configuration file "include/configs/<board_name>.h".
-Example: For a H3 module, all configuration settings are in
-"include/configs/omap1710h3.h".
+Example: For a OMAP4 PandaBoard, all configuration settings are in
+"include/configs/omap4430panda.h"
For all supported boards there are ready-to-use default
configurations available; just type "make <board_name>_config".
-Example: For a H3 module type:
+Example: For a OMAP4 PandaBoard, type:
cd x-load
- make omap1710h3_config
+ make omap4430panda_config
After a board has been configured, type "make" to build it supposing the
needed cross tools are in your path.
@@ -118,15 +114,9 @@ Next you need to get your OS boot loader to Nand at the address your
X-Loader expects. For the H3 example, you can use U-Boot to flash U-Boot.
You can't use FlashWriterNand because it uses ROM code ECC style.
-
-More Information
-================
-
-OMAP1710 NAND Booting Design Document has more information.
-
Implemenation notes:
====================
-H3, H4 support NAND flash booting
+H4 support NAND flash booting
2430sdp & 3430sdp support OneNAND booting
@@ -149,4 +139,4 @@ H3, H4 support NAND flash booting
- \ No newline at end of file
+
diff --git a/x-loader/board/omap2420h4/Makefile b/x-loader/board/omap2420h4/Makefile
index c72e36b..e6f7629 100644
--- a/x-loader/board/omap2420h4/Makefile
+++ b/x-loader/board/omap2420h4/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap2420h4.o
+COBJS := omap2420h4.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap2430sdp/Makefile b/x-loader/board/omap2430sdp/Makefile
index a9bb3f0..b6c984c 100644
--- a/x-loader/board/omap2430sdp/Makefile
+++ b/x-loader/board/omap2430sdp/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap2430sdp.o
+COBJS := omap2430sdp.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap3430labrador/Makefile b/x-loader/board/omap3430labrador/Makefile
index a5c51b6..d54b666 100644
--- a/x-loader/board/omap3430labrador/Makefile
+++ b/x-loader/board/omap3430labrador/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap3430sdp.o
+COBJS := omap3430sdp.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap3430sdp/Makefile b/x-loader/board/omap3430sdp/Makefile
index f5fd240..d54b666 100644
--- a/x-loader/board/omap3430sdp/Makefile
+++ b/x-loader/board/omap3430sdp/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap3430sdp.o
+COBJS := omap3430sdp.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap3530beagle/Makefile b/x-loader/board/omap3530beagle/Makefile
index 2dab831..b7b51ce 100644
--- a/x-loader/board/omap3530beagle/Makefile
+++ b/x-loader/board/omap3530beagle/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap3530beagle.o
+COBJS := omap3530beagle.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap3evm/Makefile b/x-loader/board/omap3evm/Makefile
index 2a0ec64..d83f45e 100644
--- a/x-loader/board/omap3evm/Makefile
+++ b/x-loader/board/omap3evm/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := omap3evm.o
+COBJS := omap3evm.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/omap3evm/omap3evm.c b/x-loader/board/omap3evm/omap3evm.c
index 20b4a88..16c1f70 100644
--- a/x-loader/board/omap3evm/omap3evm.c
+++ b/x-loader/board/omap3evm/omap3evm.c
@@ -235,7 +235,7 @@ void config_3430sdram_ddr(void)
__raw_writel(MICRON_SDRC_ACTIM_CTRLB_0, SDRC_ACTIM_CTRLB_0);
}
- __raw_writel(SDP_SDRC_RFR_CTRL, SDRC_RFR_CTRL);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
__raw_writel(SDP_SDRC_POWER_POP, SDRC_POWER);
/* init sequence for mDDR/mSDR using manual commands (DDR is different) */
diff --git a/x-loader/board/overo/Makefile b/x-loader/board/overo/Makefile
index 2e6c25d..32f9bf1 100644
--- a/x-loader/board/overo/Makefile
+++ b/x-loader/board/overo/Makefile
@@ -23,25 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := overo.o
+COBJS := overo.o
SOBJS := platform.o
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/board/overo/config.mk b/x-loader/board/overo/config.mk
index 28e354f..7ee3014 100644
--- a/x-loader/board/overo/config.mk
+++ b/x-loader/board/overo/config.mk
@@ -10,11 +10,11 @@
# 8000'0000 (bank0)
# For use if you want X-Loader to relocate from SRAM to DDR
-TEXT_BASE = 0x80e80000
+#TEXT_BASE = 0x80e80000
# For XIP in 64K of SRAM or debug (GP device has it all availabe)
# SRAM 40200000-4020FFFF base
# initial stack at 0x4020fffc used in s_init (below xloader).
# The run time stack is (above xloader, 2k below)
# If any globals exist there needs to be room for them also
-#TEXT_BASE = 0x40200800
+TEXT_BASE = 0x40200800
diff --git a/x-loader/board/overo/overo.c b/x-loader/board/overo/overo.c
index 8454e24..8df53e5 100644
--- a/x-loader/board/overo/overo.c
+++ b/x-loader/board/overo/overo.c
@@ -30,14 +30,21 @@
#include <command.h>
#include <part.h>
#include <fat.h>
+#include <i2c.h>
#include <asm/arch/cpu.h>
#include <asm/arch/bits.h>
+#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/sys_info.h>
#include <asm/arch/clocks.h>
#include <asm/arch/mem.h>
+/* params for 37XX */
+#define CORE_DPLL_PARAM_M2 0x09
+#define CORE_DPLL_PARAM_M 0x360
+#define CORE_DPLL_PARAM_N 0xC
+
/* Used to index into DPLL parameter tables */
struct dpll_param {
unsigned int m;
@@ -59,6 +66,16 @@ extern dpll_param *get_per_dpll_param();
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_writew(v, a) (*(volatile unsigned short *)(a) = (v))
+static char *rev_s[CPU_3XX_MAX_REV] = {
+ "1.0",
+ "2.0",
+ "2.1",
+ "3.0",
+ "3.1",
+ "UNKNOWN",
+ "UNKNOWN",
+ "3.1.2"};
+
/*******************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -109,6 +126,7 @@ u32 get_sysboot_value(void)
u32 get_mem_type(void)
{
u32 mem_type = get_sysboot_value();
+
switch (mem_type) {
case 0:
case 2:
@@ -151,21 +169,158 @@ u32 get_mem_type(void)
}
/******************************************
- * get_cpu_rev(void) - extract version info
+ * get_cpu_type(void) - extract cpu info
******************************************/
-u32 get_cpu_rev(void)
+u32 get_cpu_type(void)
+{
+ return __raw_readl(CONTROL_OMAP_STATUS);
+}
+
+/******************************************
+ * get_cpu_id(void) - extract cpu id
+ * returns 0 for ES1.0, cpuid otherwise
+ ******************************************/
+u32 get_cpu_id(void)
{
u32 cpuid = 0;
- /* On ES1.0 the IDCODE register is not exposed on L4
- * so using CPU ID to differentiate
- * between ES2.0 and ES1.0.
+
+ /*
+ * On ES1.0 the IDCODE register is not exposed on L4
+ * so using CPU ID to differentiate between ES1.0 and > ES1.0.
*/
- __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r" (cpuid));
- if ((cpuid & 0xf) == 0x0)
- return CPU_3430_ES1;
+ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
+ if ((cpuid & 0xf) == 0x0) {
+ return 0;
+ } else {
+ /* Decode the IDs on > ES1.0 */
+ cpuid = __raw_readl(CONTROL_IDCODE);
+ }
+
+ return cpuid;
+}
+
+/******************************************
+ * get_cpu_family(void) - extract cpu info
+ ******************************************/
+u32 get_cpu_family(void)
+{
+ u16 hawkeye;
+ u32 cpu_family;
+ u32 cpuid = get_cpu_id();
+
+ if (cpuid == 0)
+ return CPU_OMAP34XX;
+
+ hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
+ switch (hawkeye) {
+ case HAWKEYE_OMAP34XX:
+ cpu_family = CPU_OMAP34XX;
+ break;
+ case HAWKEYE_AM35XX:
+ cpu_family = CPU_AM35XX;
+ break;
+ case HAWKEYE_OMAP36XX:
+ cpu_family = CPU_OMAP36XX;
+ break;
+ default:
+ cpu_family = CPU_OMAP34XX;
+ }
+
+ return cpu_family;
+}
+
+/******************************************
+ * get_cpu_rev(void) - extract version info
+ ******************************************/
+u32 get_cpu_rev(void)
+{
+ u32 cpuid = get_cpu_id();
+
+ if (cpuid == 0)
+ return CPU_3XX_ES10;
else
- return CPU_3430_ES2;
+ return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
+}
+/******************************************
+ * Print CPU information
+ ******************************************/
+int print_cpuinfo (void)
+{
+ char *cpu_family_s, *cpu_s, *sec_s;
+
+ switch (get_cpu_family()) {
+ case CPU_OMAP34XX:
+ cpu_family_s = "OMAP";
+ switch (get_cpu_type()) {
+ case OMAP3503:
+ cpu_s = "3503";
+ break;
+ case OMAP3515:
+ cpu_s = "3515";
+ break;
+ case OMAP3525:
+ cpu_s = "3525";
+ break;
+ case OMAP3530:
+ cpu_s = "3530";
+ break;
+ default:
+ cpu_s = "35XX";
+ break;
+ }
+ break;
+ case CPU_AM35XX:
+ cpu_family_s = "AM";
+ switch (get_cpu_type()) {
+ case AM3505:
+ cpu_s = "3505";
+ break;
+ case AM3517:
+ cpu_s = "3517";
+ break;
+ default:
+ cpu_s = "35XX";
+ break;
+ }
+ break;
+ case CPU_OMAP36XX:
+ cpu_family_s = "OMAP";
+ switch (get_cpu_type()) {
+ case OMAP3730:
+ cpu_s = "3630/3730";
+ break;
+ default:
+ cpu_s = "36XX/37XX";
+ break;
+ }
+ break;
+ default:
+ cpu_family_s = "OMAP";
+ cpu_s = "35XX";
+ }
+
+ switch (get_device_type()) {
+ case TST_DEVICE:
+ sec_s = "TST";
+ break;
+ case EMU_DEVICE:
+ sec_s = "EMU";
+ break;
+ case HS_DEVICE:
+ sec_s = "HS";
+ break;
+ case GP_DEVICE:
+ sec_s = "GP";
+ break;
+ default:
+ sec_s = "?";
+ }
+
+ printf("%s%s-%s ES%s\n",
+ cpu_family_s, cpu_s, sec_s, rev_s[get_cpu_rev()]);
+
+ return 0;
}
/******************************************
@@ -190,6 +345,47 @@ u32 cpu_is_3410(void)
}
/*****************************************************************
+ * Routine: get_board_revision
+ * Description: Returns the board revision
+ *****************************************************************/
+int get_board_revision(void)
+{
+ int revision;
+ unsigned char data;
+
+ /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
+ /* these boards should return a revision number of 0 */
+ /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
+ data = 0x01;
+ i2c_write(0x4B, 0x29, 1, &data, 1);
+ data = 0x0c;
+ i2c_write(0x4B, 0x2b, 1, &data, 1);
+ i2c_read(0x4B, 0x2a, 1, &data, 1);
+
+ if (!omap_request_gpio(112) &&
+ !omap_request_gpio(113) &&
+ !omap_request_gpio(115)) {
+
+ omap_set_gpio_direction(112, 1);
+ omap_set_gpio_direction(113, 1);
+ omap_set_gpio_direction(115, 1);
+
+ revision = omap_get_gpio_datain(115) << 2 |
+ omap_get_gpio_datain(113) << 1 |
+ omap_get_gpio_datain(112);
+
+ omap_free_gpio(112);
+ omap_free_gpio(113);
+ omap_free_gpio(115);
+ } else {
+ printf("Error: unable to acquire board revision GPIOs\n");
+ revision = -1;
+ }
+
+ return revision;
+}
+
+/*****************************************************************
* sr32 - clear & set a value in a bit range for a 32 bit address
*****************************************************************/
void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value)
@@ -225,55 +421,84 @@ u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
*********************************************************************/
void config_3430sdram_ddr(void)
{
- /* reset sdrc controller */
- __raw_writel(SOFTRESET, SDRC_SYSCONFIG);
- wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000);
- __raw_writel(0, SDRC_SYSCONFIG);
-
- /* setup sdrc to ball mux */
- __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
-
- /* SDRC put in weak */
-// (*(unsigned int*)0x6D00008C) = 0x00000020;
-
- /* SDRC_MCFG0 register */
- (*(unsigned int*)0x6D000080) = 0x02584099;//from Micron
-
- /* SDRC_ACTIM_CTRLA0 register */
-//our value (*(unsigned int*)0x6D00009c) = 0xa29db4c6;// for 166M
- (*(unsigned int*)0x6D00009c) = 0xaa9db4c6;// for 166M from rkw
-
- /* SDRC_ACTIM_CTRLB0 register */
-//from micron (*(unsigned int*)0x6D0000a0) = 0x12214;// for 166M
+ /* reset sdrc controller */
+ __raw_writel(SOFTRESET, SDRC_SYSCONFIG);
+ wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000);
+ __raw_writel(0, SDRC_SYSCONFIG);
+
+ /* setup sdrc to ball mux */
+ __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
+
+ switch (get_board_revision()) {
+ case 0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
+ __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
+ break;
+ case 1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
+ __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
+ break;
+ case 2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
+ __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR_HYNIX, SDRC_MCFG_0);
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR_HYNIX, SDRC_MCFG_1);
+ __raw_writel(HYNIX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(HYNIX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
+ __raw_writel(HYNIX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(HYNIX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
+ break;
+ default:
+ __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
+ __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
+ __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
+ }
-// (*(unsigned int*)0x6D0000a0) = 0x00011417; our value
- (*(unsigned int*)0x6D0000a0) = 0x00011517;
+ __raw_writel(SDP_SDRC_POWER_POP, SDRC_POWER);
- /* SDRC_RFR_CTRL0 register */
-//from micron (*(unsigned int*)0x6D0000a4) =0x54601; // for 166M
+ /* init sequence for mDDR/mSDR using manual commands (DDR is different) */
+ __raw_writel(CMD_NOP, SDRC_MANUAL_0);
+ __raw_writel(CMD_NOP, SDRC_MANUAL_1);
- (*(unsigned int*)0x6D0000a4) =0x0004DC01;
+ delay(5000);
- /* Disble Power Down of CKE cuz of 1 CKE on combo part */
- (*(unsigned int*)0x6D000070) = 0x00000081;
+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_0);
+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_1);
- /* SDRC_Manual command register */
- (*(unsigned int*)0x6D0000a8) = 0x00000000; // NOP command
- delay(5000);
- (*(unsigned int*)0x6D0000a8) = 0x00000001; // Precharge command
- (*(unsigned int*)0x6D0000a8) = 0x00000002; // Auto-refresh command
- (*(unsigned int*)0x6D0000a8) = 0x00000002; // Auto-refresh command
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_1);
- /* SDRC MR0 register */
- (*(int*)0x6D000084) = 0x00000032; // Burst length =4
- // CAS latency = 3
- // Write Burst = Read Burst
- // Serial Mode
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_1);
- /* SDRC DLLA control register */
- (*(unsigned int*)0x6D000060) = 0x0000A;
- delay(0x20000); // some delay
+ /* set mr0 */
+ __raw_writel(SDP_SDRC_MR_0_DDR, SDRC_MR_0);
+ __raw_writel(SDP_SDRC_MR_0_DDR, SDRC_MR_1);
+ /* set up dll */
+ __raw_writel(SDP_SDRC_DLLAB_CTRL, SDRC_DLLA_CTRL);
+ delay(0x2000); /* give time to lock */
}
#endif /* CFG_3430SDRAM_DDR */
@@ -283,12 +508,14 @@ void config_3430sdram_ddr(void)
*************************************************************/
u32 get_osc_clk_speed(void)
{
- u32 start, cstart, cend, cdiff, val;
+ u32 start, cstart, cend, cdiff, cdiv, val;
val = __raw_readl(PRM_CLKSRC_CTRL);
- /* If SYS_CLK is being divided by 2, remove for now */
- val = (val & (~BIT7)) | BIT6;
- __raw_writel(val, PRM_CLKSRC_CTRL);
+
+ if (val & SYSCLKDIV_2)
+ cdiv = 2;
+ else
+ cdiv = 1;
/* enable timer2 */
val = __raw_readl(CM_CLKSEL_WKUP) | BIT0;
@@ -312,6 +539,7 @@ u32 get_osc_clk_speed(void)
while (__raw_readl(S32K_CR) < (start + 20)); /* wait for 40 cycles */
cend = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get end sys_clk count */
cdiff = cend - cstart; /* get elapsed ticks */
+ cdiff *= cdiv;
/* based on number of ticks assign speed */
if (cdiff > 19000)
@@ -363,17 +591,19 @@ void prcm_init(void)
osc_clk = get_osc_clk_speed();
get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
- sr32(PRM_CLKSEL, 0, 3, sys_clkin_sel); /* set input crystal speed */
+ sr32(PRM_CLKSEL, 0, 3, sys_clkin_sel); /* set input crystal speed */
/* If the input clock is greater than 19.2M always divide/2 */
if (sys_clkin_sel > 2) {
- sr32(PRM_CLKSRC_CTRL, 6, 2, 2);/* input clock divider */
- clk_index = sys_clkin_sel/2;
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 2); /* input clock divider */
+ clk_index = sys_clkin_sel / 2;
} else {
- sr32(PRM_CLKSRC_CTRL, 6, 2, 1);/* input clock divider */
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 1); /* input clock divider */
clk_index = sys_clkin_sel;
}
+ sr32(PRM_CLKSRC_CTRL, 0, 2, 0);/* Bypass mode: T2 inputs a square clock */
+
/* The DPLL tables are defined according to sysclk value and
* silicon revision. The clk_index value will be used to get
* the values for that input sysclk from the DPLL param table
@@ -386,31 +616,35 @@ void prcm_init(void)
sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOW_POWER_BYPASS);
wait_on_value(BIT0, 0, CM_IDLEST_PLL_MPU, LDELAY);
- /* Getting the base address of Core DPLL param table*/
- dpll_param_p = (dpll_param *)get_core_dpll_param();
+ /* Getting the base address of Core DPLL param table */
+ dpll_param_p = (dpll_param *) get_core_dpll_param();
/* Moving it to the right sysclk and ES rev base */
- dpll_param_p = dpll_param_p + 2*clk_index + sil_index;
+ dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
/* CORE DPLL */
/* sr32(CM_CLKSEL2_EMU) set override to work when asleep */
sr32(CM_CLKEN_PLL, 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value(BIT0, 0, CM_IDLEST_CKGEN, LDELAY);
+
+ /* For 3430 ES1.0 Errata 1.50, default value directly doesnt
+ work. write another value and then default value. */
+ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2 + 1); /* m3x2 */
sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2); /* m3x2 */
sr32(CM_CLKSEL1_PLL, 27, 2, dpll_param_p->m2); /* Set M2 */
sr32(CM_CLKSEL1_PLL, 16, 11, dpll_param_p->m); /* Set M */
sr32(CM_CLKSEL1_PLL, 8, 7, dpll_param_p->n); /* Set N */
- sr32(CM_CLKSEL1_PLL, 6, 1, 0); /* 96M Src */
+ sr32(CM_CLKSEL1_PLL, 6, 1, 0); /* 96M Src */
sr32(CM_CLKSEL_CORE, 8, 4, CORE_SSI_DIV); /* ssi */
sr32(CM_CLKSEL_CORE, 4, 2, CORE_FUSB_DIV); /* fsusb */
sr32(CM_CLKSEL_CORE, 2, 2, CORE_L4_DIV); /* l4 */
sr32(CM_CLKSEL_CORE, 0, 2, CORE_L3_DIV); /* l3 */
- sr32(CM_CLKSEL_GFX, 0, 3, GFX_DIV); /* gfx */
- sr32(CM_CLKSEL_WKUP, 1, 2, WKUP_RSM); /* reset mgr */
+ sr32(CM_CLKSEL_GFX, 0, 3, GFX_DIV); /* gfx */
+ sr32(CM_CLKSEL_WKUP, 1, 2, WKUP_RSM); /* reset mgr */
sr32(CM_CLKEN_PLL, 4, 4, dpll_param_p->fsel); /* FREQSEL */
- sr32(CM_CLKEN_PLL, 0, 3, PLL_LOCK); /* lock mode */
+ sr32(CM_CLKEN_PLL, 0, 3, PLL_LOCK); /* lock mode */
wait_on_value(BIT0, 1, CM_IDLEST_CKGEN, LDELAY);
- /* Getting the base address to PER DPLL param table*/
- dpll_param_p = (dpll_param *)get_per_dpll_param();
+ /* Getting the base address to PER DPLL param table */
+ dpll_param_p = (dpll_param *) get_per_dpll_param();
/* Moving it to the right sysclk base */
dpll_param_p = dpll_param_p + clk_index;
/* PER DPLL */
@@ -420,29 +654,39 @@ void prcm_init(void)
sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */
sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */
sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */
- sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
- sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m); /* set m */
- sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n); /* set n */
- sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);/* FREQSEL */
+
+ if (get_cpu_family() == CPU_OMAP36XX) {
+ sr32(CM_CLKSEL3_PLL, 0, 5, CORE_DPLL_PARAM_M2); /* set M2 */
+ sr32(CM_CLKSEL2_PLL, 8, 11, CORE_DPLL_PARAM_M); /* set m */
+ sr32(CM_CLKSEL2_PLL, 0, 7, CORE_DPLL_PARAM_N); /* set n */
+ } else {
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
+ sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m); /* set m */
+ sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n); /* set n */
+ }
+
+ sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel); /* FREQSEL */
sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK); /* lock mode */
wait_on_value(BIT1, 2, CM_IDLEST_CKGEN, LDELAY);
- /* Getting the base address to MPU DPLL param table*/
- dpll_param_p = (dpll_param *)get_mpu_dpll_param();
+ /* Getting the base address to MPU DPLL param table */
+ dpll_param_p = (dpll_param *) get_mpu_dpll_param();
+
/* Moving it to the right sysclk and ES rev base */
- dpll_param_p = dpll_param_p + 2*clk_index + sil_index;
+ dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
+
/* MPU DPLL (unlocked already) */
sr32(CM_CLKSEL2_PLL_MPU, 0, 5, dpll_param_p->m2); /* Set M2 */
sr32(CM_CLKSEL1_PLL_MPU, 8, 11, dpll_param_p->m); /* Set M */
sr32(CM_CLKSEL1_PLL_MPU, 0, 7, dpll_param_p->n); /* Set N */
sr32(CM_CLKEN_PLL_MPU, 4, 4, dpll_param_p->fsel); /* FREQSEL */
- sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOCK); /* lock mode */
+ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOCK); /* lock mode */
wait_on_value(BIT0, 1, CM_IDLEST_PLL_MPU, LDELAY);
- /* Getting the base address to IVA DPLL param table*/
- dpll_param_p = (dpll_param *)get_iva_dpll_param();
+ /* Getting the base address to IVA DPLL param table */
+ dpll_param_p = (dpll_param *) get_iva_dpll_param();
/* Moving it to the right sysclk and ES rev base */
- dpll_param_p = dpll_param_p + 2*clk_index + sil_index;
+ dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
/* IVA DPLL (set to 12*20=240MHz) */
sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_STOP);
wait_on_value(BIT0, 0, CM_IDLEST_PLL_IVA2, LDELAY);
@@ -536,20 +780,11 @@ void s_init(void)
/*******************************************************
* Routine: misc_init_r
- * Description: Init ethernet (done here so udelay works)
********************************************************/
int misc_init_r(void)
{
-#ifdef CONFIG_MMC
- /* REMOVE!! for proto boards only */
- /* set vaux2 to 2.8V */
- unsigned char byte = 0x20;
- i2c_write(0x4B, 0x76, 1, &byte, 1);
- byte = 0x09;
- i2c_write(0x4B, 0x79, 1, &byte, 1);
-
- udelay(5000);
-#endif
+ print_cpuinfo();
+ printf("Board revision: %d\n", get_board_revision());
return 0;
}
@@ -616,6 +851,10 @@ void per_clocks_enable(void)
#endif
+ /* Enable GPIO 4, 5, & 6 clocks */
+ sr32(CM_FCLKEN_PER, 17, 3, 0x7);
+ sr32(CM_ICLKEN_PER, 17, 3, 0x7);
+
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
/* Turn on all 3 I2C clocks */
sr32(CM_FCLKEN1_CORE, 15, 3, 0x7);
@@ -638,10 +877,6 @@ void per_clocks_enable(void)
sr32(CM_FCLKEN_PER, 0, 32, FCK_PER_ON);
sr32(CM_ICLKEN_PER, 0, 32, ICK_PER_ON);
- /* Enable GPIO5 clocks for blinky LEDs */
- sr32(CM_FCLKEN_PER, 16, 1, 0x1); /* FCKen GPIO5 */
- sr32(CM_ICLKEN_PER, 16, 1, 0x1); /* ICKen GPIO5 */
-
delay(1000);
}
@@ -748,6 +983,11 @@ void per_clocks_enable(void)
MUX_VAL(CP(DSS_DATA19), (IEN | PTD | DIS | M4)) /*GPIO_89*/\
MUX_VAL(CP(DSS_DATA20), (IEN | PTD | DIS | M4)) /*GPIO_90*/\
MUX_VAL(CP(DSS_DATA21), (IEN | PTD | DIS | M4)) /*GPIO_91*/\
+ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M4)) /*GPIO_112*/\
+ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M4)) /*GPIO_113*/\
+ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\
+ /* - PEN_DOWN*/\
+ MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M4)) /*GPIO_115*/\
MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\
MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
@@ -755,10 +995,12 @@ void per_clocks_enable(void)
MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
- MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\
- MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\
- MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\
- MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\
+ MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | EN | M4)) /*GPIO_126*/\
+ MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | EN | M4)) /*GPIO_127*/\
+ MUX_VAL(CP(MMC1_DAT6), (IEN | PTD | EN | M4)) /*GPIO_128*/\
+ MUX_VAL(CP(MMC1_DAT7), (IEN | PTD | EN | M4)) /*GPIO_129*/\
+ MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\
+ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\
MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\
@@ -833,6 +1075,7 @@ int nand_init(void)
__raw_writel(0 , GPMC_CONFIG7 + GPMC_CONFIG_CS0);
delay(1000);
+#ifdef CFG_NAND_K9F1G08R0A
if ((get_mem_type() == GPMC_NAND) || (get_mem_type() == MMC_NAND)) {
__raw_writel(M_NAND_GPMC_CONFIG1, GPMC_CONFIG1 + GPMC_CONFIG_CS0);
__raw_writel(M_NAND_GPMC_CONFIG2, GPMC_CONFIG2 + GPMC_CONFIG_CS0);
@@ -853,9 +1096,10 @@ int nand_init(void)
#endif
return 1;
}
-
}
+#endif
+#ifdef CFG_ONENAND
if ((get_mem_type() == GPMC_ONENAND) || (get_mem_type() == MMC_ONENAND)) {
__raw_writel(ONENAND_GPMC_CONFIG1, GPMC_CONFIG1 + GPMC_CONFIG_CS0);
__raw_writel(ONENAND_GPMC_CONFIG2, GPMC_CONFIG2 + GPMC_CONFIG_CS0);
@@ -877,6 +1121,8 @@ int nand_init(void)
return 1;
}
}
+#endif
+
return 0;
}
diff --git a/x-loader/common/Makefile b/x-loader/common/Makefile
index de856cf..8f4ee2c 100644
--- a/x-loader/common/Makefile
+++ b/x-loader/common/Makefile
@@ -23,26 +23,27 @@
include $(TOPDIR)/config.mk
-LIB = libcommon.a
+LIB = $(obj)libcommon.a
AOBJS =
COBJS = cmd_load.o
-OBJS = $(AOBJS) $(COBJS)
+SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
CPPFLAGS += -I..
all: $(LIB) $(AOBJS)
-$(LIB): .depend $(OBJS)
+$(LIB): $(obj).depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/config.mk b/x-loader/config.mk
index 1365b9d..f4c58e9 100644
--- a/x-loader/config.mk
+++ b/x-loader/config.mk
@@ -23,6 +23,22 @@
#########################################################################
+ifneq ($(OBJTREE),$(SRCTREE))
+ifeq ($(CURDIR),$(SRCTREE))
+dir :=
+else
+dir := $(subst $(SRCTREE)/,,$(CURDIR))
+endif
+
+obj := $(if $(dir),$(OBJTREE)/$(dir)/,$(OBJTREE)/)
+src := $(if $(dir),$(SRCTREE)/$(dir)/,$(SRCTREE)/)
+
+$(shell mkdir -p $(obj))
+else
+obj :=
+src :=
+endif
+
# clean the slate ...
PLATFORM_RELFLAGS =
PLATFORM_CPPFLAGS =
@@ -116,10 +132,15 @@ OBJCFLAGS += --gap-fill=0xff
gccincdir := $(shell $(CC) -print-file-name=include)
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
- -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
- -I$(TOPDIR)/include \
- -fno-builtin -ffreestanding -nostdinc -isystem \
- $(gccincdir) -pipe $(PLATFORM_CPPFLAGS)
+ -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE)
+
+ifneq ($(OBJTREE),$(SRCTREE))
+CPPFLAGS += -I$(OBJTREE)/include
+endif
+
+CPPFLAGS += -I$(TOPDIR)/include
+CPPFLAGS += -fno-builtin -ffreestanding -nostdinc \
+ -isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS)
ifdef BUILD_TAG
CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes \
@@ -165,11 +186,23 @@ export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
#########################################################################
+ifndef REMOTE_BUILD
+
%.s: %.S
- $(CPP) $(AFLAGS) -o $@ $(CURDIR)/$<
+ $(CPP) $(AFLAGS) -o $@ $<
%.o: %.S
- $(CC) $(AFLAGS) -c -o $@ $(CURDIR)/$<
+ $(CC) $(AFLAGS) -c -o $@ $<
%.o: %.c
$(CC) $(CFLAGS) -c -o $@ $<
+else
+
+$(obj)%.s: %.S
+ $(CPP) $(AFLAGS) -o $@ $<
+$(obj)%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+$(obj)%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+endif
+
#########################################################################
diff --git a/x-loader/cpu/arm1136/Makefile b/x-loader/cpu/arm1136/Makefile
index 565d016..b556419 100644
--- a/x-loader/cpu/arm1136/Makefile
+++ b/x-loader/cpu/arm1136/Makefile
@@ -23,21 +23,25 @@
include $(TOPDIR)/config.mk
-LIB = lib$(CPU).a
+LIB = $(obj)lib$(CPU).a
START = start.o
-OBJS = cpu.o
+COBJS = cpu.o
-all: .depend $(START) $(LIB)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
$(LIB): $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/cpu/omap3/Makefile b/x-loader/cpu/omap3/Makefile
index 5ce8941..678619c 100644
--- a/x-loader/cpu/omap3/Makefile
+++ b/x-loader/cpu/omap3/Makefile
@@ -23,21 +23,25 @@
include $(TOPDIR)/config.mk
-LIB = lib$(CPU).a
+LIB = $(obj)lib$(CPU).a
START = start.o
-OBJS = cpu.o mmc.o gpio.o
+COBJS = cpu.o mmc.o gpio.o
-all: .depend $(START) $(LIB)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
$(LIB): $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/cpu/omap3/config.mk b/x-loader/cpu/omap3/config.mk
index 6b68917..bd76483 100644
--- a/x-loader/cpu/omap3/config.mk
+++ b/x-loader/cpu/omap3/config.mk
@@ -22,7 +22,7 @@
#
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8
-# PLATFORM_CPPFLAGS += -march=armv7-a
+#PLATFORM_CPPFLAGS += -march=armv7-a
# =========================================================================
#
# Supply options according to compiler version
diff --git a/x-loader/disk/Makefile b/x-loader/disk/Makefile
index 7da4624..512b1cb 100644
--- a/x-loader/disk/Makefile
+++ b/x-loader/disk/Makefile
@@ -25,20 +25,23 @@ include $(TOPDIR)/config.mk
#CFLAGS += -DET_DEBUG -DDEBUG
-LIB = libdisk.a
+LIB = $(obj)libdisk.a
-OBJS = part.o
+COBJS = part.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
-$(LIB): $(START) $(OBJS)
+$(LIB): $(obj).depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/drivers/Makefile b/x-loader/drivers/Makefile
index c581817..da3feda 100644
--- a/x-loader/drivers/Makefile
+++ b/x-loader/drivers/Makefile
@@ -25,58 +25,60 @@ include $(TOPDIR)/config.mk
# CFLAGS += -DET_DEBUG -DDEBUG
-LIB = libdrivers.a
-OBJS = serial.o ns16550.o onenand.o omap24xx_i2c.o
+LIB = $(obj)libdrivers.a
+COBJS = serial.o ns16550.o omap24xx_i2c.o
ifeq ($(BOARD), omap3430sdp)
-OBJS += k9f1g08r0a.o
+COBJS += k9f1g08r0a.o
endif
ifeq ($(BOARD), omap3430labrador)
-OBJS += k9f1g08r0a.o
+COBJS += k9f1g08r0a.o
endif
ifeq ($(BOARD), omap3530beagle)
-OBJS += k9f1g08r0a.o
+COBJS += k9f1g08r0a.o
+endif
+
+ifeq ($(BOARD), omap3530gta04)
+COBJS += k9f1g08r0a.o
endif
ifeq ($(BOARD), omap3evm)
-OBJS += k9f1g08r0a.o
+COBJS += k9f1g08r0a.o onenand.o
endif
ifeq ($(BOARD), overo)
-OBJS += k9f1g08r0a.o
+COBJS += k9f1g08r0a.o
endif
ifeq ($(BOARD), omap2420h4)
-OBJS += k9k1216.o
+COBJS += k9k1216.o
endif
ifeq ($(BOARD), omap2430sdp)
-OBJS += k9k1216.o
-endif
-
-ifeq ($(BOARD), omap1710h3)
-OBJS += k9f5616.o
+COBJS += k9k1216.o
endif
-
## Disabled for now:
## cs8900.o ct69000.o dataflash.o dc2114x.o ds1722.o \
## lan91c96.o mw_eeprom.o natsemi.o \
## smc91111.o smiLynxEM.o spi_eeprom.o sym53c8xx.o \
##
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
all: $(LIB)
-$(LIB): $(OBJS)
+$(LIB): $(obj).depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/drivers/k9f1g08r0a.c b/x-loader/drivers/k9f1g08r0a.c
index 8968a1b..988533c 100644
--- a/x-loader/drivers/k9f1g08r0a.c
+++ b/x-loader/drivers/k9f1g08r0a.c
@@ -42,6 +42,7 @@
*/
#define MT29F1G_MFR 0x2c /* Micron */
#define MT29F1G_MFR2 0x20 /* numonyx */
+#define MT29F1G_MFR3 0xad /* Hynix */
#define MT29F1G_ID 0xa1 /* x8, 1GiB */
#define MT29F2G_ID 0xba /* x16, 2GiB */
#define MT29F4G_ID 0xbc /* x16, 4GiB */
@@ -154,6 +155,29 @@ static int NanD_Address(unsigned int numbytes, unsigned long ofs)
return 0;
}
+int nand_readid(int *mfr, int *id)
+{
+ NAND_ENABLE_CE();
+
+ if (NanD_Command(NAND_CMD_RESET)) {
+ NAND_DISABLE_CE();
+ return 1;
+ }
+
+ if (NanD_Command(NAND_CMD_READID)) {
+ NAND_DISABLE_CE();
+ return 1;
+ }
+
+ NanD_Address(ADDR_COLUMN, 0);
+
+ *mfr = READ_NAND(NAND_ADDR);
+ *id = READ_NAND(NAND_ADDR);
+
+ NAND_DISABLE_CE();
+ return 0;
+}
+
/* read chip mfr and id
* return 0 if they match board config
* return 1 if not
@@ -162,34 +186,39 @@ int nand_chip()
{
int mfr, id;
- NAND_ENABLE_CE();
+ NAND_ENABLE_CE();
- if (NanD_Command(NAND_CMD_RESET)) {
- printf("Err: RESET\n");
- NAND_DISABLE_CE();
+ if (NanD_Command(NAND_CMD_RESET)) {
+ printf("Err: RESET\n");
+ NAND_DISABLE_CE();
return 1;
}
- if (NanD_Command(NAND_CMD_READID)) {
- printf("Err: READID\n");
- NAND_DISABLE_CE();
+ if (NanD_Command(NAND_CMD_READID)) {
+ printf("Err: READID\n");
+ NAND_DISABLE_CE();
return 1;
- }
+ }
- NanD_Address(ADDR_COLUMN, 0);
+ NanD_Address(ADDR_COLUMN, 0);
- mfr = READ_NAND(NAND_ADDR);
+ mfr = READ_NAND(NAND_ADDR);
id = READ_NAND(NAND_ADDR);
NAND_DISABLE_CE();
- if (((mfr == MT29F1G_MFR || mfr == MT29F1G_MFR2) &&
+ if (((mfr == MT29F1G_MFR || mfr == MT29F1G_MFR2 || mfr == MT29F1G_MFR3) &&
(id == MT29F1G_ID || id == MT29F2G_ID || id == MT29F4G_ID)) ||
(mfr == K9F1G08R0A_MFR && (id == K9F1G08R0A_ID))) {
return 0;
} else {
- printf("Unknown chip: mfr was 0x%02x, id was 0x%02x\n", mfr, id);
- return 1;
+ if ((mfr == 0) && (id == 0)) {
+ printf("No NAND detected\n");
+ return 0;
+ } else {
+ printf("Unknown chip: mfr was 0x%02x, id was 0x%02x\n", mfr, id);
+ return 1;
+ }
}
}
diff --git a/x-loader/drivers/serial.c b/x-loader/drivers/serial.c
index b9ecf2a..026acf9 100644
--- a/x-loader/drivers/serial.c
+++ b/x-loader/drivers/serial.c
@@ -45,21 +45,6 @@ static NS16550_t console = (NS16550_t) CFG_NS16550_COM4;
static int calc_divisor (void)
{
-// DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_OMAP1510
- /* If can't cleanly clock 115200 set div to 1 */
- if ((CFG_NS16550_CLK == 12000000) && (CONFIG_BAUDRATE == 115200)) {
- console->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
- return (1); /* return 1 for base divisor */
- }
- console->osc_12m_sel = 0; /* clear if previsouly set */
-#endif
-#if defined(CONFIG_OMAP1610) || defined(CONFIG_OMAP1710)
- /* If can't cleanly clock 115200 set div to 1 */
- if ((CFG_NS16550_CLK == 48000000) && (CONFIG_BAUDRATE == 115200)) {
- return (26); /* return 26 for base divisor */
- }
-#endif
return (CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE);
}
diff --git a/x-loader/fs/Makefile b/x-loader/fs/Makefile
index f419b99..a2f61e7 100644
--- a/x-loader/fs/Makefile
+++ b/x-loader/fs/Makefile
@@ -24,6 +24,6 @@
SUBDIRS := fat
-.depend all:
+$(obj).depend all:
@for dir in $(SUBDIRS) ; do \
$(MAKE) -C $$dir $@ ; done
diff --git a/x-loader/fs/fat/Makefile b/x-loader/fs/fat/Makefile
index e462757..2fa428c 100644
--- a/x-loader/fs/fat/Makefile
+++ b/x-loader/fs/fat/Makefile
@@ -19,28 +19,27 @@
# MA 02111-1307 USA
#
-TOPDIR=../../
-
include $(TOPDIR)/config.mk
-LIB = libfat.a
+LIB = $(obj)libfat.a
AOBJS =
COBJS = fat.o file.o
-OBJS = $(AOBJS) $(COBJS)
+SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
all: $(LIB) $(AOBJS)
-$(LIB): .depend $(OBJS)
+$(LIB): $(obj).depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/fs/fat/fat.c b/x-loader/fs/fat/fat.c
index 0e91556..44ecb4a 100644
--- a/x-loader/fs/fat/fat.c
+++ b/x-loader/fs/fat/fat.c
@@ -145,13 +145,11 @@ fat_register_device(block_dev_desc_t *dev_desc, int part_no)
return -1;
}
#else
- /* FIXME we need to determine the start block of the
- * partition where the DOS FS resides. This can be done
- * by using the get_partition_info routine. For this
- * purpose the libpart must be included.
- */
- part_offset=63;
- //part_offset=0;
+ part_offset = buffer[DOS_PART_TBL_OFFSET+8] |
+ buffer[DOS_PART_TBL_OFFSET+9] <<8 |
+ buffer[DOS_PART_TBL_OFFSET+10]<<16 |
+ buffer[DOS_PART_TBL_OFFSET+11]<<24;
+
cur_part = 1;
#endif
}
@@ -386,7 +384,7 @@ get_contents(fsdata *mydata, dir_entry *dentptr, __u8 *buffer,
newclust = get_fatent(mydata, endclust);
if((newclust -1)!=endclust)
goto getit;
- if (newclust <= 0x0001 || newclust >= 0xfff0) {
+ if (newclust <= 0x0001 || newclust >= 0xfffff0) {
FAT_DPRINT("curclust: 0x%x\n", newclust);
FAT_DPRINT("Invalid FAT entry\n");
return gotsize;
@@ -421,7 +419,7 @@ getit:
filesize -= actsize;
buffer += actsize;
curclust = get_fatent(mydata, endclust);
- if (curclust <= 0x0001 || curclust >= 0xfff0) {
+ if (curclust <= 0x0001 || curclust >= 0xfffff0) {
FAT_DPRINT("curclust: 0x%x\n", curclust);
FAT_ERROR("Invalid FAT entry\n");
return gotsize;
@@ -582,7 +580,7 @@ static dir_entry *get_dentfromdir (fsdata * mydata, int startsect,
return retdent;
}
curclust = get_fatent (mydata, curclust);
- if (curclust <= 0x0001 || curclust >= 0xfff0) {
+ if (curclust <= 0x0001 || curclust >= 0xfffff0) {
FAT_DPRINT ("curclust: 0x%x\n", curclust);
FAT_ERROR ("Invalid FAT entry\n");
return NULL;
@@ -681,7 +679,7 @@ do_fat_read(const char *filename, void *buffer, unsigned long maxsize,
dir_entry *dentptr;
__u16 prevcksum = 0xffff;
char *subname = "";
- int rootdir_size, cursect;
+ int rootdir_size, cursect, curclus;
int idx, isdir = 0;
int files = 0, dirs = 0;
long ret = 0;
@@ -699,6 +697,7 @@ do_fat_read(const char *filename, void *buffer, unsigned long maxsize,
mydata->fat_sect = bs.reserved;
cursect = mydata->rootdir_sect
= mydata->fat_sect + mydata->fatlength * bs.fats;
+ curclus = bs.root_cluster; // For FAT32 only
mydata->clust_size = bs.cluster_size;
if (mydata->fatsize == 32) {
rootdir_size = mydata->clust_size;
@@ -820,7 +819,16 @@ do_fat_read(const char *filename, void *buffer, unsigned long maxsize,
goto rootdir_done; /* We got a match */
}
- cursect++;
+
+ if (mydata->fatsize != 32)
+ cursect++;
+ else {
+ // FAT32 does not guarantee contiguous root directory
+ curclus = get_fatent (mydata, curclus);
+ cursect = (curclus * mydata->clust_size) + mydata->data_begin;
+
+ FAT_DPRINT ("root clus %d sector %d\n", curclus, cursect);
+ }
}
rootdir_done:
diff --git a/x-loader/include/asm/arch-omap3/i2c.h b/x-loader/include/asm/arch-omap3/i2c.h
index 5fb0979..28ae5ca 100644
--- a/x-loader/include/asm/arch-omap3/i2c.h
+++ b/x-loader/include/asm/arch-omap3/i2c.h
@@ -86,7 +86,7 @@
#define I2C_CON_BE (1 << 14) /* Big endian mode */
#define I2C_CON_STB (1 << 11) /* Start byte mode (master mode only) */
#define I2C_CON_MST (1 << 10) /* Master/slave mode */
-#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode /*
+#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode */
/* (master mode only) */
#define I2C_CON_XA (1 << 8) /* Expand address */
#define I2C_CON_STP (1 << 1) /* Stop condition (master mode only) */
diff --git a/x-loader/include/asm/arch-omap3/mem.h b/x-loader/include/asm/arch-omap3/mem.h
index cba4c6f..284c665 100644
--- a/x-loader/include/asm/arch-omap3/mem.h
+++ b/x-loader/include/asm/arch-omap3/mem.h
@@ -46,6 +46,7 @@ typedef enum {
#define MMC_NAND 4
#define MMC_ONENAND 5
#define GPMC_NONE 6
+#define GPMC_ONENAND_TRY 7
#endif
@@ -71,7 +72,9 @@ typedef enum {
#define SDP_SDRC_MDCFG_0_DDR (0x02582019|B_ALL) /* Infin ddr module */
#else
#define SDP_SDRC_MDCFG_0_DDR (0x02584019|B_ALL)
-#define SDP_SDRC_MDCFG_0_DDR_XM (0x03588019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_MICRON_XM (0x03588019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM (0x04590019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_HYNIX (0x03588019|B_ALL)
#endif
#define SDP_SDRC_MR_0_DDR 0x00000032
@@ -252,12 +255,87 @@ typedef enum {
(MICRON_TDPL_200 << 6) | (MICRON_TDAL_200))
#define MICRON_TWTR_200 2
-#define MICRON_TCKE_200 1
+#define MICRON_TCKE_200 4
#define MICRON_TXP_200 2
#define MICRON_XSR_200 23
#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | (MICRON_XSR_200 << 0)) | \
(MICRON_TXP_200 << 8) | (MICRON_TWTR_200 << 16)
+/* NUMONYX part of IGEP0020 (165MHz optimized) 6.06ns
+ * ACTIMA
+ * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
+ * TDPL (Twr) = 15/6 = 2.5 -> 3
+ * TRRD = 12/6 = 2
+ * TRCD = 22.5/6 = 3.75 -> 4
+ * TRP = 18/6 = 3
+ * TRAS = 42/6 = 7
+ * TRC = 60/6 = 10
+ * TRFC = 140/6 = 23.3 -> 24
+ * ACTIMB
+ * TWTR = 2
+ * TCKE = 2
+ * TXSR = 200/6 = 33.3 -> 34
+ * TXP = 1.0 + 1.1 = 2.1 -> 3 ¿?
+ */
+#define NUMONYX_TDAL_165 6
+#define NUMONYX_TDPL_165 3
+#define NUMONYX_TRRD_165 2
+#define NUMONYX_TRCD_165 4
+#define NUMONYX_TRP_165 3
+#define NUMONYX_TRAS_165 7
+#define NUMONYX_TRC_165 10
+#define NUMONYX_TRFC_165 24
+#define NUMONYX_V_ACTIMA_165 ((NUMONYX_TRFC_165 << 27) | (NUMONYX_TRC_165 << 22) | (NUMONYX_TRAS_165 << 18) \
+ | (NUMONYX_TRP_165 << 15) | (NUMONYX_TRCD_165 << 12) |(NUMONYX_TRRD_165 << 9) | \
+ (NUMONYX_TDPL_165 << 6) | (NUMONYX_TDAL_165))
+
+#define NUMONYX_TWTR_165 2
+#define NUMONYX_TCKE_165 2
+#define NUMONYX_TXP_165 3
+#define NUMONYX_XSR_165 34
+#define NUMONYX_V_ACTIMB_165 ((NUMONYX_TCKE_165 << 12) | (NUMONYX_XSR_165 << 0)) | \
+ (NUMONYX_TXP_165 << 8) | (NUMONYX_TWTR_165 << 16)
+
+/*
+ * Hynix part of Overo (165MHz optimized) 6.06ns
+ * ACTIMA
+ * ACTIMA
+ * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
+ * TDPL (Twr) = 15/6 = 2.5 -> 3
+ * TRRD = 12/6 = 2
+ * TRCD = 18/6 = 3
+ * TRP = 18/6 = 3
+ * TRAS = 42/6 = 7
+ * TRC = 60/6 = 10
+ * TRFC = 97.5/6 = 17
+ * ACTIMB
+ * TWTR = 1
+ * TCKE = 1
+ * TXP = 1+1
+ * XSR = 140/6 = 24
+ */
+#define HYNIX_TDAL_165 6
+#define HYNIX_TDPL_165 3
+#define HYNIX_TRRD_165 2
+#define HYNIX_TRCD_165 3
+#define HYNIX_TRP_165 3
+#define HYNIX_TRAS_165 7
+#define HYNIX_TRC_165 10
+#define HYNIX_TRFC_165 21
+#define HYNIX_V_ACTIMA_165 ((HYNIX_TRFC_165 << 27) | \
+ (HYNIX_TRC_165 << 22) | (HYNIX_TRAS_165 << 18) | \
+ (HYNIX_TRP_165 << 15) | (HYNIX_TRCD_165 << 12) | \
+ (HYNIX_TRRD_165 << 9) | (HYNIX_TDPL_165 << 6) | \
+ (HYNIX_TDAL_165))
+
+#define HYNIX_TWTR_165 1
+#define HYNIX_TCKE_165 1
+#define HYNIX_TXP_165 2
+#define HYNIX_XSR_165 24
+#define HYNIX_V_ACTIMB_165 ((HYNIX_TCKE_165 << 12) | \
+ (HYNIX_XSR_165 << 0) | (HYNIX_TXP_165 << 8) | \
+ (HYNIX_TWTR_165 << 16))
+
/* New and compatability speed defines */
#if defined(PRCM_CLK_CFG2_200MHZ) || defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B)
# define L3_100MHZ /* Use with <= 100MHz SDRAM */
@@ -276,6 +354,8 @@ typedef enum {
#elif defined(L3_165MHZ)
# define MICRON_SDRC_ACTIM_CTRLA_0 MICRON_V_ACTIMA_165
# define MICRON_SDRC_ACTIM_CTRLB_0 MICRON_V_ACTIMB_165
+# define NUMONYX_SDRC_ACTIM_CTRLA_0 NUMONYX_V_ACTIMA_165
+# define NUMONYX_SDRC_ACTIM_CTRLB_0 NUMONYX_V_ACTIMB_165
#endif
diff --git a/x-loader/include/asm/arch-omap3/omap3430.h b/x-loader/include/asm/arch-omap3/omap3430.h
index 3c583ae..117d752 100644
--- a/x-loader/include/asm/arch-omap3/omap3430.h
+++ b/x-loader/include/asm/arch-omap3/omap3430.h
@@ -138,4 +138,60 @@
#define ENHANCED_UI_EE_NAME "750-2075"
#endif
+/*
+ * 343x real hardware:
+ * ES1 = rev 0
+ *
+ * ES2 onwards, the value maps to contents of IDCODE register [31:28].
+ *
+ * Note : CPU_3XX_ES20 is used in cache.S. Please review before changing.
+ */
+#define CPU_3XX_ES10 0
+#define CPU_3XX_ES20 1
+#define CPU_3XX_ES21 2
+#define CPU_3XX_ES30 3
+#define CPU_3XX_ES31 4
+#define CPU_3XX_ES312 7
+#define CPU_3XX_MAX_REV 8
+
+#define CPU_3XX_ID_SHIFT 28
+
+#define WIDTH_8BIT 0x0000
+#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
+
+/*
+ * Control idcode register contains hawkeye and revision info
+ */
+#define CONTROL_IDCODE 0x4830A204
+#define CONTROL_OMAP_STATUS 0x4800244C
+
+/*
+ * Hawkeye values
+ */
+#define HAWKEYE_OMAP34XX 0xb7ae
+#define HAWKEYE_AM35XX 0xb868
+#define HAWKEYE_OMAP36XX 0xb891
+
+#define HAWKEYE_SHIFT 12
+
+/*
+ * Define CPU families
+ */
+#define CPU_OMAP34XX 0x3400 /* OMAP34xx/OMAP35 devices */
+#define CPU_AM35XX 0x3500 /* AM35xx devices */
+#define CPU_OMAP36XX 0x3600 /* OMAP36xx devices */
+
+/*
+ * Control status register values corresponding to cpu variants
+ */
+#define OMAP3503 0x5c00
+#define OMAP3515 0x1c00
+#define OMAP3525 0x4c00
+#define OMAP3530 0x0c00
+
+#define AM3505 0x5c00
+#define AM3517 0x1c00
+
+#define OMAP3730 0x0c00
+
#endif /* _OMAP3430_SYS_H_ */
diff --git a/x-loader/include/configs/omap3430labrador.h b/x-loader/include/configs/omap3430labrador.h
index b608872..b5a9c54 100644
--- a/x-loader/include/configs/omap3430labrador.h
+++ b/x-loader/include/configs/omap3430labrador.h
@@ -27,6 +27,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+/* configure for GTA04 with DM3730 */
+#define CONFIG_OMAP36XX 1 /* or 36XX (DM3730) */
+#define PRCM_CLK_CFG2_400MHZ 1
+
/* serial printf facility takes about 3.5K */
#define CFG_PRINTF
//#undef CFG_PRINTF
diff --git a/x-loader/lib/Makefile b/x-loader/lib/Makefile
index 60b8090..32b3798 100644
--- a/x-loader/lib/Makefile
+++ b/x-loader/lib/Makefile
@@ -25,22 +25,23 @@
include $(TOPDIR)/config.mk
-LIB = lib$(ARCH).a
+LIB = $(obj)lib$(ARCH).a
-AOBJS = _udivsi3.o _umodsi3.o
+SOBJS = _udivsi3.o _umodsi3.o
COBJS = board.o ecc.o printf.o div0.o
-OBJS = $(AOBJS) $(COBJS)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-$(LIB): .depend $(OBJS)
+$(LIB): $(obj).depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/x-loader/lib/board.c b/x-loader/lib/board.c
index 88fd381..70cd17a 100644
--- a/x-loader/lib/board.c
+++ b/x-loader/lib/board.c
@@ -49,8 +49,10 @@ int print_info(void)
static int init_func_i2c (void)
{
#ifdef CONFIG_MMC
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
#endif
+#endif
return 0;
}
@@ -65,8 +67,10 @@ init_fnc_t *init_sequence[] = {
print_info,
nand_init, /* board specific nand init */
#ifdef CONFIG_MMC
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
init_func_i2c,
#endif
+#endif
NULL,
};
@@ -87,6 +91,7 @@ void start_armboot (void)
misc_init_r();
buf = (uchar*) CFG_LOADADDR;
+ *(int *)buf = 0xffffffff;
#ifdef CONFIG_MMC
/* first try mmc */
@@ -104,6 +109,7 @@ void start_armboot (void)
if (buf == (uchar *)CFG_LOADADDR) {
/* if no u-boot on mmc, try onenand or nand, depending upon sysboot */
if (get_mem_type() == GPMC_ONENAND){
+#ifdef CFG_ONENAND
#ifdef CFG_PRINTF
printf("Loading u-boot.bin from onenand\n");
#endif
@@ -111,7 +117,9 @@ void start_armboot (void)
if (!onenand_read_block(buf, i))
buf += ONENAND_BLOCK_SIZE;
}
+#endif
} else if (get_mem_type() == GPMC_NAND){
+#ifdef CFG_NAND_K9F1G08R0A
#ifdef CFG_PRINTF
printf("Loading u-boot.bin from nand\n");
#endif
@@ -119,6 +127,7 @@ void start_armboot (void)
if (!nand_read_block(buf, i))
buf += NAND_BLOCK_SIZE; /* advance buf ptr */
}
+#endif
}
}
diff --git a/x-loader/x-load.flash b/x-loader/x-load.flash
deleted file mode 100644
index 233b4e2..0000000
--- a/x-loader/x-load.flash
+++ /dev/null
Binary files differ