From e1bbb64ec2ca8ddf1dec91ae1e08ef96ee53639a Mon Sep 17 00:00:00 2001
From: "H. Nikolaus Schaller" <hns@goldelico.com>
Date: Tue, 11 Jan 2011 17:31:17 +0100
Subject: fixed issue with submodules

---
 x-loader                         |  1 -
 x-loader/include/asm/byteorder.h | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 32 insertions(+), 1 deletion(-)
 delete mode 160000 x-loader
 create mode 100755 x-loader/include/asm/byteorder.h

(limited to 'x-loader/include/asm/byteorder.h')

diff --git a/x-loader b/x-loader
deleted file mode 160000
index 1c9276a..0000000
--- a/x-loader
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 1c9276af4d6a5b7014a7630a1abeddf3b3177563
diff --git a/x-loader/include/asm/byteorder.h b/x-loader/include/asm/byteorder.h
new file mode 100755
index 0000000..c3489f1
--- /dev/null
+++ b/x-loader/include/asm/byteorder.h
@@ -0,0 +1,32 @@
+/*
+ *  linux/include/asm-arm/byteorder.h
+ *
+ * ARM Endian-ness.  In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
+ *  0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ *  d0...d31
+ *
+ * When in big endian mode, byte accesses appear as:
+ *  0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
+ * and word accesses (data or instruction) appear as:
+ *  d0...d31
+ */
+#ifndef __ASM_ARM_BYTEORDER_H
+#define __ASM_ARM_BYTEORDER_H
+
+
+#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
+#ifdef __ARMEB__
+#include <linux/byteorder/big_endian.h>
+#else
+#include <linux/byteorder/little_endian.h>
+#endif
+
+#endif
-- 
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