From 4da707176bd554eeca183527b9260acb64ca9123 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= Date: Wed, 25 Mar 2015 17:15:29 +0100 Subject: Don't use -Wl,--fix-cortex-a8 for Cortex A7, A9, A15, Krait or Denver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -Wl,--fix-cortex-a8 is a workaround for an Erratum in Cortex-A8 processors. It slightly increases code size and decreases performance, and there's no point in using it on non-A8 CPUs. Instead of forcing it unconditionally, use it when targeting Cortex-A8 or generic armv7-a (which might or might not be A8). Change-Id: Ifa59765d380445237edccfe5440a67b3ba1e459a Signed-off-by: Bernhard Rosenkränzer --- core/combo/arch/arm/armv7-a-neon.mk | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'core/combo') diff --git a/core/combo/arch/arm/armv7-a-neon.mk b/core/combo/arch/arm/armv7-a-neon.mk index d535afc..99f17aa 100644 --- a/core/combo/arch/arm/armv7-a-neon.mk +++ b/core/combo/arch/arm/armv7-a-neon.mk @@ -16,14 +16,23 @@ ifneq (,$(filter cortex-a15 krait denver,$(TARGET_$(combo_2nd_arch_prefix)CPU_VA # Fake an ARM compiler flag as these processors support LPAE which GCC/clang # don't advertise. arch_variant_cflags += -D__ARM_FEATURE_LPAE=1 + arch_variant_ldflags := \ + -Wl,--no-fix-cortex-a8 else ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a8) arch_variant_cflags := -mcpu=cortex-a8 + arch_variant_ldflags := \ + -Wl,--fix-cortex-a8 else ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a7) arch_variant_cflags := -mcpu=cortex-a7 + arch_variant_ldflags := \ + -Wl,--no-fix-cortex-a8 else arch_variant_cflags := -march=armv7-a + # Generic ARM might be a Cortex A8 -- better safe than sorry + arch_variant_ldflags := \ + -Wl,--fix-cortex-a8 endif endif endif @@ -31,6 +40,3 @@ endif arch_variant_cflags += \ -mfloat-abi=softfp \ -mfpu=neon - -arch_variant_ldflags := \ - -Wl,--fix-cortex-a8 -- cgit v1.1