From 222b794ae146b4e0d61958c55a518396e293e6d7 Mon Sep 17 00:00:00 2001 From: codeworkx Date: Mon, 11 Feb 2013 17:29:55 +0000 Subject: initial commit sources from http://omapzoom.org --- Android.mk | 23 + BoardConfigCommon.mk | 90 + bltsville/Android.mk | 17 + bltsville/bltsville/README | 1 + bltsville/bltsville/blend-854x480-bad.jpg | Bin 0 -> 77198 bytes bltsville/bltsville/blend-854x480-bad2.jpg | Bin 0 -> 69838 bytes .../bltsville/blend-854x480-roundingerror.jpg | Bin 0 -> 69458 bytes bltsville/bltsville/blend-854x480-threeblts.jpg | Bin 0 -> 76246 bytes bltsville/bltsville/blend-854x480.jpg | Bin 0 -> 69281 bytes bltsville/bltsville/bvlogo.png | Bin 0 -> 98635 bytes .../bltsville/clock-720x480_4x3-fauxtrans.jpg | Bin 0 -> 70563 bytes bltsville/bltsville/clock-720x480_4x3.png | Bin 0 -> 560594 bytes bltsville/bltsville/concrete-64x36.png | Bin 0 -> 4783 bytes bltsville/bltsville/include/bltsville.h | 602 + bltsville/bltsville/include/bvblend.h | 508 + bltsville/bltsville/include/bvbuffdesc.h | 61 + bltsville/bltsville/include/bvcache.h | 45 + bltsville/bltsville/include/bventry.h | 32 + bltsville/bltsville/include/bverror.h | 307 + bltsville/bltsville/include/bvfilter.h | 51 + bltsville/bltsville/include/bvinternal.h | 47 + bltsville/bltsville/include/bvsurfgeom.h | 41 + bltsville/bltsville/index.html | 4362 ++++++ bltsville/bltsville/ocdtab.png | Bin 0 -> 11854 bytes bltsville/gcbv/Android.mk | 86 + bltsville/gcbv/gcmain.c | 531 + bltsville/gcbv/gcmain.h | 143 + bltsville/gcbv/mirror/gcblit.c | 771 + bltsville/gcbv/mirror/gcbuffer.c | 383 + bltsville/gcbv/mirror/gcbv.c | 2008 +++ bltsville/gcbv/mirror/gcbv.h | 590 + bltsville/gcbv/mirror/gcdbglog.c | 1684 +++ bltsville/gcbv/mirror/gcfill.c | 258 + bltsville/gcbv/mirror/gcfilter.c | 1788 +++ bltsville/gcbv/mirror/gcmap.c | 342 + bltsville/gcbv/mirror/gcparser.c | 2090 +++ bltsville/gcbv/mirror/include/cache-2dmanager.h | 75 + bltsville/gcbv/mirror/include/gcdbglog.h | 384 + bltsville/gcbv/mirror/include/gcerror.h | 226 + bltsville/gcbv/mirror/include/gcioctl.h | 293 + bltsville/gcbv/mirror/include/gclist.h | 594 + bltsville/gcbv/mirror/include/gcreg.h | 10269 +++++++++++++ bltsville/gcbv/mirror/include/gcx.h | 87 + bltsville/gcbv/version.h | 33 + bltsville/ocd/README | 1 + bltsville/ocd/include/ocd.h | 801 + bltsville/ocd/index.html | 617 + bltsville/ocd/ocdlogo.jpg | Bin 0 -> 45982 bytes bltsville/ticpu/Android.mk | 53 + .../android/BLTsville-Android-Release-Notes.html | 15129 +++++++++++++++++++ bltsville/ticpu/doc/android/check.png | Bin 0 -> 419 bytes .../doc/linux/BLTsville-Linux-Release-Notes.html | 15127 ++++++++++++++++++ bltsville/ticpu/doc/linux/check.png | Bin 0 -> 419 bytes bltsville/ticpu/lib/android/libbltsville_cpu.so | 1 + .../lib/android/libbltsville_ticpu.2.1.0.0.so | Bin 0 -> 162310 bytes bltsville/ticpu/lib/android/libbltsville_ticpu.so | 1 + .../lib/android/libbltsville_ticpu_license.txt | 172 + bltsville/ticpu/lib/linux/libbltsville_cpu.so | 1 + bltsville/ticpu/lib/linux/libbltsville_ticpu.so | 1 + .../ticpu/lib/linux/libbltsville_ticpu.so.2.1.0.0 | Bin 0 -> 166468 bytes .../ticpu/lib/linux/libbltsville_ticpu_license.txt | 172 + bltsville/ticpu/license | 173 + common.mk | 56 + edid/Android.mk | 45 + edid/cmd/parse_hdmi_edid.c | 154 + edid/inc/edid_parser.h | 113 + edid/lib/edid_parser.c | 410 + edid/lib/edid_parser_priv.h | 31 + extract-files.sh | 142 + hwc/Android.mk | 31 + hwc/dock_image.c | 196 + hwc/dock_image.h | 38 + hwc/hal_public.h | 188 + hwc/hwc.c | 2747 ++++ hwc/hwc_dev.h | 180 + hwc/rgz_2d.c | 1997 +++ hwc/rgz_2d.h | 306 + hwc/sw_vsync.c | 145 + hwc/sw_vsync.h | 25 + include/gralloc/ti_handle_wrapper.h | 85 + include/hardware/gps.h | 686 + include/hardware/hwcomposer.h | 643 + include/hardware/hwcomposer_defs.h | 204 + include/hardware/hwcomposer_v0.h | 272 + include/ion_ti/ion.h | 49 + include/ion_ti/linux_ion.h | 76 + include/ion_ti/omap_ion.h | 61 + kernel-headers/linux/android_alarm.h | 112 + kernel-headers/linux/bltsville.h | 592 + kernel-headers/linux/bvblend.h | 507 + kernel-headers/linux/bvbuffdesc.h | 68 + kernel-headers/linux/bvcache.h | 44 + kernel-headers/linux/bventry.h | 38 + kernel-headers/linux/bverror.h | 306 + kernel-headers/linux/bvfilter.h | 50 + kernel-headers/linux/bvinternal.h | 46 + kernel-headers/linux/bvsurfgeom.h | 40 + kernel-headers/linux/ocd.h | 781 + kernel-headers/linux/omap_ion.h | 106 + kernel-headers/linux/omapfb.h | 274 + kernel-headers/linux/rpmsg_omx.h | 156 + kernel-headers/video/dsscomp.h | 709 + kernel-headers/video/omap_hwc.h | 99 + libion_ti/Android.mk | 23 + libion_ti/ion.c | 201 + libion_ti/ion.h | 49 + libion_ti/ion_test.c | 319 + libion_ti/ion_test_2.c | 479 + libion_ti/linux_ion.h | 76 + libion_ti/omap_ion.h | 61 + libpower/Android.mk | 25 + libpower/power.c | 231 + proprietary-files.txt | 29 + pvr-source/GPL-COPYING | 344 + pvr-source/INSTALL | 72 + pvr-source/MIT-COPYING | 41 + pvr-source/README | 49 + pvr-source/eurasiacon/build/linux2/bits.mk | 112 + pvr-source/eurasiacon/build/linux2/buildvars.mk | 217 + pvr-source/eurasiacon/build/linux2/commands.mk | 219 + .../build/linux2/common/android/arch_common.mk | 59 + .../build/linux2/common/android/armv7-a.mk | 68 + .../build/linux2/common/android/extra_config.mk | 47 + .../build/linux2/common/android/features.mk | 319 + .../build/linux2/common/android/paths.mk | 53 + .../linux2/common/android/platform_version.mk | 156 + .../eurasiacon/build/linux2/common/dridrm.mk | 63 + pvr-source/eurasiacon/build/linux2/common/omap4.mk | 43 + .../eurasiacon/build/linux2/common/opencl.mk | 40 + pvr-source/eurasiacon/build/linux2/config/core.mk | 604 + pvr-source/eurasiacon/build/linux2/defs.mk | 140 + .../build/linux2/kbuild/Makefile.template | 92 + .../build/linux2/kbuild/external_tarball.mk | 49 + .../eurasiacon/build/linux2/kbuild/kbuild.mk | 91 + .../eurasiacon/build/linux2/kernel_module.mk | 75 + .../eurasiacon/build/linux2/kernel_version.mk | 100 + pvr-source/eurasiacon/build/linux2/moduledefs.mk | 96 + pvr-source/eurasiacon/build/linux2/modules.mk | 49 + .../build/linux2/omap4430_android/Makefile | 185 + .../build/linux2/omap4430_android/products.mk | 46 + pvr-source/eurasiacon/build/linux2/prepare_tree.mk | 60 + .../eurasiacon/build/linux2/this_makefile.mk | 68 + .../eurasiacon/build/linux2/tools/cc-check.sh | 99 + pvr-source/eurasiacon/build/linux2/toplevel.mk | 226 + pvr-source/include4/dbgdrvif.h | 381 + pvr-source/include4/img_defs.h | 153 + pvr-source/include4/img_types.h | 214 + pvr-source/include4/pdumpdefs.h | 126 + pvr-source/include4/pvr_debug.h | 235 + pvr-source/include4/pvrmodule.h | 48 + pvr-source/include4/pvrversion.h | 69 + pvr-source/include4/services.h | 1870 +++ pvr-source/include4/servicesext.h | 965 ++ pvr-source/include4/sgx_options.h | 258 + pvr-source/include4/sgxapi_km.h | 524 + pvr-source/include4/sgxscript.h | 99 + pvr-source/services4/3rdparty/dc_nohw/Kbuild.mk | 47 + pvr-source/services4/3rdparty/dc_nohw/Linux.mk | 45 + pvr-source/services4/3rdparty/dc_nohw/dc_nohw.h | 288 + .../3rdparty/dc_nohw/dc_nohw_displayclass.c | 982 ++ .../services4/3rdparty/dc_nohw/dc_nohw_linux.c | 376 + .../services4/3rdparty/dc_omapfb3_linux/Kbuild.mk | 48 + .../services4/3rdparty/dc_omapfb3_linux/Linux.mk | 45 + .../services4/3rdparty/dc_omapfb3_linux/omaplfb.h | 323 + .../dc_omapfb3_linux/omaplfb_displayclass.c | 1722 +++ .../3rdparty/dc_omapfb3_linux/omaplfb_linux.c | 1165 ++ pvr-source/services4/include/kernelbuffer.h | 97 + pvr-source/services4/include/kerneldisplay.h | 243 + pvr-source/services4/include/pdump.h | 51 + pvr-source/services4/include/pvr_bridge.h | 2255 +++ pvr-source/services4/include/pvr_bridge_km.h | 409 + pvr-source/services4/include/pvrmmap.h | 81 + pvr-source/services4/include/pvrsrv_errors.h | 311 + pvr-source/services4/include/servicesint.h | 556 + pvr-source/services4/include/sgx_bridge.h | 779 + pvr-source/services4/include/sgx_mkif_km.h | 475 + .../services4/include/sgx_ukernel_status_codes.h | 966 ++ pvr-source/services4/include/sgxinfo.h | 493 + .../services4/srvkm/bridged/bridged_pvr_bridge.c | 5512 +++++++ .../services4/srvkm/bridged/bridged_pvr_bridge.h | 257 + .../services4/srvkm/bridged/bridged_support.c | 117 + .../services4/srvkm/bridged/bridged_support.h | 72 + .../srvkm/bridged/sgx/bridged_sgx_bridge.c | 3864 +++++ .../srvkm/bridged/sgx/bridged_sgx_bridge.h | 61 + pvr-source/services4/srvkm/common/buffer_manager.c | 3573 +++++ pvr-source/services4/srvkm/common/deviceclass.c | 2863 ++++ pvr-source/services4/srvkm/common/deviceid.h | 51 + pvr-source/services4/srvkm/common/devicemem.c | 2580 ++++ pvr-source/services4/srvkm/common/handle.c | 2689 ++++ pvr-source/services4/srvkm/common/hash.c | 738 + pvr-source/services4/srvkm/common/lists.c | 156 + pvr-source/services4/srvkm/common/mem.c | 175 + pvr-source/services4/srvkm/common/mem_debug.c | 272 + pvr-source/services4/srvkm/common/metrics.c | 209 + pvr-source/services4/srvkm/common/osfunc_common.c | 48 + pvr-source/services4/srvkm/common/pdump_common.c | 2967 ++++ pvr-source/services4/srvkm/common/perproc.c | 398 + pvr-source/services4/srvkm/common/power.c | 996 ++ pvr-source/services4/srvkm/common/pvrsrv.c | 1846 +++ pvr-source/services4/srvkm/common/queue.c | 1500 ++ pvr-source/services4/srvkm/common/ra.c | 2427 +++ pvr-source/services4/srvkm/common/refcount.c | 588 + pvr-source/services4/srvkm/common/resman.c | 985 ++ pvr-source/services4/srvkm/common/ttrace.c | 597 + pvr-source/services4/srvkm/devices/sgx/mmu.c | 4600 ++++++ pvr-source/services4/srvkm/devices/sgx/mmu.h | 501 + pvr-source/services4/srvkm/devices/sgx/pb.c | 493 + .../services4/srvkm/devices/sgx/sgx_bridge_km.h | 279 + pvr-source/services4/srvkm/devices/sgx/sgxconfig.h | 481 + pvr-source/services4/srvkm/devices/sgx/sgxinfokm.h | 610 + pvr-source/services4/srvkm/devices/sgx/sgxinit.c | 3428 +++++ pvr-source/services4/srvkm/devices/sgx/sgxkick.c | 899 ++ pvr-source/services4/srvkm/devices/sgx/sgxpower.c | 630 + pvr-source/services4/srvkm/devices/sgx/sgxreset.c | 808 + .../services4/srvkm/devices/sgx/sgxtransfer.c | 814 + pvr-source/services4/srvkm/devices/sgx/sgxutils.c | 1912 +++ pvr-source/services4/srvkm/devices/sgx/sgxutils.h | 195 + pvr-source/services4/srvkm/env/linux/Kbuild.mk | 166 + pvr-source/services4/srvkm/env/linux/Linux.mk | 45 + pvr-source/services4/srvkm/env/linux/env_data.h | 93 + pvr-source/services4/srvkm/env/linux/env_perproc.h | 79 + pvr-source/services4/srvkm/env/linux/event.c | 414 + pvr-source/services4/srvkm/env/linux/event.h | 48 + .../services4/srvkm/env/linux/gc_bvmapping.c | 147 + .../services4/srvkm/env/linux/gc_bvmapping.h | 27 + pvr-source/services4/srvkm/env/linux/ion.c | 363 + pvr-source/services4/srvkm/env/linux/ion.h | 74 + pvr-source/services4/srvkm/env/linux/linkage.h | 72 + pvr-source/services4/srvkm/env/linux/lock.h | 56 + pvr-source/services4/srvkm/env/linux/mm.c | 2945 ++++ pvr-source/services4/srvkm/env/linux/mm.h | 751 + pvr-source/services4/srvkm/env/linux/mmap.c | 1656 ++ pvr-source/services4/srvkm/env/linux/mmap.h | 240 + pvr-source/services4/srvkm/env/linux/module.c | 1214 ++ pvr-source/services4/srvkm/env/linux/mutex.c | 153 + pvr-source/services4/srvkm/env/linux/mutex.h | 90 + pvr-source/services4/srvkm/env/linux/mutils.c | 166 + pvr-source/services4/srvkm/env/linux/mutils.h | 119 + pvr-source/services4/srvkm/env/linux/osfunc.c | 4714 ++++++ pvr-source/services4/srvkm/env/linux/osperproc.c | 146 + pvr-source/services4/srvkm/env/linux/pdump.c | 804 + .../services4/srvkm/env/linux/private_data.h | 95 + pvr-source/services4/srvkm/env/linux/proc.c | 1414 ++ pvr-source/services4/srvkm/env/linux/proc.h | 127 + .../services4/srvkm/env/linux/pvr_bridge_k.c | 524 + pvr-source/services4/srvkm/env/linux/pvr_debug.c | 506 + pvr-source/services4/srvkm/env/linux/pvr_uaccess.h | 88 + pvr-source/services4/srvkm/env/linux/sysfs.c | 90 + pvr-source/services4/srvkm/env/linux/sysfs.h | 22 + pvr-source/services4/srvkm/hwdefs/mnemedefs.h | 117 + pvr-source/services4/srvkm/hwdefs/ocpdefs.h | 308 + pvr-source/services4/srvkm/hwdefs/sgx520defs.h | 555 + pvr-source/services4/srvkm/hwdefs/sgx530defs.h | 542 + pvr-source/services4/srvkm/hwdefs/sgx531defs.h | 601 + pvr-source/services4/srvkm/hwdefs/sgx535defs.h | 739 + pvr-source/services4/srvkm/hwdefs/sgx540defs.h | 605 + .../services4/srvkm/hwdefs/sgx543_v1.164defs.h | 1396 ++ pvr-source/services4/srvkm/hwdefs/sgx543defs.h | 1487 ++ pvr-source/services4/srvkm/hwdefs/sgx544defs.h | 1487 ++ pvr-source/services4/srvkm/hwdefs/sgx545defs.h | 1290 ++ pvr-source/services4/srvkm/hwdefs/sgxdefs.h | 112 + pvr-source/services4/srvkm/hwdefs/sgxerrata.h | 518 + pvr-source/services4/srvkm/hwdefs/sgxfeaturedefs.h | 274 + pvr-source/services4/srvkm/hwdefs/sgxmmu.h | 99 + pvr-source/services4/srvkm/hwdefs/sgxmpdefs.h | 365 + .../services4/srvkm/include/buffer_manager.h | 674 + pvr-source/services4/srvkm/include/device.h | 409 + pvr-source/services4/srvkm/include/handle.h | 567 + pvr-source/services4/srvkm/include/hash.h | 277 + pvr-source/services4/srvkm/include/lists.h | 349 + pvr-source/services4/srvkm/include/metrics.h | 146 + pvr-source/services4/srvkm/include/osfunc.h | 799 + pvr-source/services4/srvkm/include/osperproc.h | 94 + pvr-source/services4/srvkm/include/pdump_int.h | 100 + pvr-source/services4/srvkm/include/pdump_km.h | 441 + pvr-source/services4/srvkm/include/pdump_osfunc.h | 337 + pvr-source/services4/srvkm/include/perfkm.h | 53 + pvr-source/services4/srvkm/include/perproc.h | 150 + pvr-source/services4/srvkm/include/power.h | 140 + pvr-source/services4/srvkm/include/queue.h | 145 + pvr-source/services4/srvkm/include/ra.h | 293 + pvr-source/services4/srvkm/include/refcount.h | 203 + pvr-source/services4/srvkm/include/resman.h | 152 + .../services4/srvkm/include/services_headers.h | 68 + pvr-source/services4/srvkm/include/srvkm.h | 129 + pvr-source/services4/srvkm/include/ttrace.h | 200 + pvr-source/services4/srvkm/include/ttrace_common.h | 146 + pvr-source/services4/srvkm/include/ttrace_tokens.h | 119 + pvr-source/services4/system/include/syscommon.h | 397 + pvr-source/services4/system/omap4/oemfuncs.h | 80 + pvr-source/services4/system/omap4/sgxfreq.c | 590 + pvr-source/services4/system/omap4/sgxfreq.h | 97 + .../services4/system/omap4/sgxfreq_activeidle.c | 181 + pvr-source/services4/system/omap4/sgxfreq_cool.c | 104 + .../services4/system/omap4/sgxfreq_on3demand.c | 324 + pvr-source/services4/system/omap4/sgxfreq_onoff.c | 180 + .../services4/system/omap4/sgxfreq_userspace.c | 180 + pvr-source/services4/system/omap4/sysconfig.c | 1329 ++ pvr-source/services4/system/omap4/sysconfig.h | 110 + pvr-source/services4/system/omap4/sysinfo.h | 64 + pvr-source/services4/system/omap4/syslocal.h | 265 + pvr-source/services4/system/omap4/sysutils.c | 59 + pvr-source/services4/system/omap4/sysutils_linux.c | 745 + pvr-source/tools/intern/debug/client/linuxsrv.h | 64 + pvr-source/tools/intern/debug/dbgdriv/Kbuild.mk | 51 + pvr-source/tools/intern/debug/dbgdriv/Linux.mk | 45 + .../tools/intern/debug/dbgdriv/common/dbgdriv.c | 2883 ++++ .../tools/intern/debug/dbgdriv/common/dbgdriv.h | 155 + .../intern/debug/dbgdriv/common/dbgdriv_ioctl.h | 57 + .../tools/intern/debug/dbgdriv/common/handle.c | 141 + .../tools/intern/debug/dbgdriv/common/hostfunc.h | 82 + .../tools/intern/debug/dbgdriv/common/hotkey.c | 199 + .../tools/intern/debug/dbgdriv/common/hotkey.h | 82 + .../tools/intern/debug/dbgdriv/common/ioctl.c | 827 + .../tools/intern/debug/dbgdriv/linux/hostfunc.c | 395 + pvr-source/tools/intern/debug/dbgdriv/linux/main.c | 355 + 316 files changed, 191119 insertions(+) create mode 100644 Android.mk create mode 100644 BoardConfigCommon.mk create mode 100644 bltsville/Android.mk create mode 100755 bltsville/bltsville/README create mode 100644 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pvr-source/tools/intern/debug/dbgdriv/common/hotkey.h create mode 100644 pvr-source/tools/intern/debug/dbgdriv/common/ioctl.c create mode 100644 pvr-source/tools/intern/debug/dbgdriv/linux/hostfunc.c create mode 100644 pvr-source/tools/intern/debug/dbgdriv/linux/main.c diff --git a/Android.mk b/Android.mk new file mode 100644 index 0000000..f35559b --- /dev/null +++ b/Android.mk @@ -0,0 +1,23 @@ +# +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +LOCAL_PATH := $(call my-dir) + +ifneq ($(filter i9100g p3100 p3110 p5100 p5110,$(TARGET_DEVICE)),) + +include $(call all-makefiles-under,$(LOCAL_PATH)) + +endif diff --git a/BoardConfigCommon.mk b/BoardConfigCommon.mk new file mode 100644 index 0000000..a44100e --- /dev/null +++ b/BoardConfigCommon.mk @@ -0,0 +1,90 @@ +# +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +COMMON_PATH := device/samsung/omap4-common + +BOARD_VENDOR := samsung + +PRODUCT_VENDOR_KERNEL_HEADERS := $(COMMON_PATH)/kernel-headers +TARGET_SPECIFIC_HEADER_PATH := $(COMMON_PATH)/include + +# HWComposer +BOARD_USES_HWCOMPOSER := true +BOARD_USE_SYSFS_VSYNC_NOTIFICATION := true +# set if the target supports FBIO_WAITFORVSYNC +TARGET_HAS_WAITFORVSYNC := true + +# Setup custom omap4xxx defines +BOARD_USE_CUSTOM_LIBION := true + +# TI Enhancement Settings (Part 1) +OMAP_ENHANCEMENT := true +#OMAP_ENHANCEMENT_BURST_CAPTURE := true +#OMAP_ENHANCEMENT_S3D := true +#OMAP_ENHANCEMENT_CPCAM := true +#OMAP_ENHANCEMENT_VTC := true +OMAP_ENHANCEMENT_MULTIGPU := true +BOARD_USE_TI_ENHANCED_DOMX := true + +# External SGX Module +SGX_MODULES: + make clean -C $(COMMON_PATH)/pvr-source/eurasiacon/build/linux2/omap4430_android + cp $(TARGET_KERNEL_SOURCE)/drivers/video/omap2/omapfb/omapfb.h $(KERNEL_OUT)/drivers/video/omap2/omapfb/omapfb.h + make -j8 -C $(COMMON_PATH)/pvr-source/eurasiacon/build/linux2/omap4430_android ARCH=arm KERNEL_CROSS_COMPILE=arm-eabi- CROSS_COMPILE=arm-eabi- KERNELDIR=$(KERNEL_OUT) TARGET_PRODUCT="blaze_tablet" BUILD=release TARGET_SGX=540 PLATFORM_VERSION=4.0 + mv $(KERNEL_OUT)/../../target/kbuild/pvrsrvkm_sgx540_120.ko $(KERNEL_MODULES_OUT) + +TARGET_KERNEL_MODULES += SGX_MODULES + +# TI Enhancement Settings (Part 2) +ifdef BOARD_USE_TI_ENHANCED_DOMX + BOARD_USE_TI_DUCATI_H264_PROFILE := true + COMMON_GLOBAL_CFLAGS += -DENHANCED_DOMX + ENHANCED_DOMX := true +else + DOMX_PATH := hardware/ti/omap4xxx/domx +endif + +ifdef OMAP_ENHANCEMENT + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT -DTARGET_OMAP4 +endif + +ifdef OMAP_ENHANCEMENT_BURST_CAPTURE + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT_BURST_CAPTURE +endif + +ifdef OMAP_ENHANCEMENT_S3D + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT_S3D +endif + +ifdef OMAP_ENHANCEMENT_CPCAM + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT_CPCAM + PRODUCT_MAKEFILES += $(LOCAL_DIR)/sdk_addon/ti_omap_addon.mk +endif + +ifdef OMAP_ENHANCEMENT_VTC + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT_VTC +endif + +ifdef USE_ITTIAM_AAC + COMMON_GLOBAL_CFLAGS += -DUSE_ITTIAM_AAC +endif + +ifdef OMAP_ENHANCEMENT_MULTIGPU + COMMON_GLOBAL_CFLAGS += -DOMAP_ENHANCEMENT_MULTIGPU +endif + +# inherit from the proprietary version +-include vendor/samsung/omap4-common/BoardConfigVendor.mk diff --git a/bltsville/Android.mk b/bltsville/Android.mk new file mode 100644 index 0000000..56a3fa8 --- /dev/null +++ b/bltsville/Android.mk @@ -0,0 +1,17 @@ +# +# Copyright (C) 2011 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +include $(call all-subdir-makefiles) diff --git a/bltsville/bltsville/README b/bltsville/bltsville/README new file mode 100755 index 0000000..bf5751b --- /dev/null +++ b/bltsville/bltsville/README @@ -0,0 +1 @@ +git://github.com/graphics/bltsville.git diff --git a/bltsville/bltsville/blend-854x480-bad.jpg b/bltsville/bltsville/blend-854x480-bad.jpg new file mode 100644 index 0000000..adc2d6d Binary files /dev/null and b/bltsville/bltsville/blend-854x480-bad.jpg differ diff --git a/bltsville/bltsville/blend-854x480-bad2.jpg b/bltsville/bltsville/blend-854x480-bad2.jpg new file mode 100644 index 0000000..67a01f3 Binary files /dev/null and b/bltsville/bltsville/blend-854x480-bad2.jpg differ diff --git a/bltsville/bltsville/blend-854x480-roundingerror.jpg b/bltsville/bltsville/blend-854x480-roundingerror.jpg new file mode 100644 index 0000000..9a12713 Binary files /dev/null and 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a/bltsville/bltsville/clock-720x480_4x3.png b/bltsville/bltsville/clock-720x480_4x3.png new file mode 100644 index 0000000..3a7f566 Binary files /dev/null and b/bltsville/bltsville/clock-720x480_4x3.png differ diff --git a/bltsville/bltsville/concrete-64x36.png b/bltsville/bltsville/concrete-64x36.png new file mode 100644 index 0000000..cf21f0f Binary files /dev/null and b/bltsville/bltsville/concrete-64x36.png differ diff --git a/bltsville/bltsville/include/bltsville.h b/bltsville/bltsville/include/bltsville.h new file mode 100644 index 0000000..632628e --- /dev/null +++ b/bltsville/bltsville/include/bltsville.h @@ -0,0 +1,602 @@ +/* + * bltsville.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BLTSVILLE_H +#define BLTSVILLE_H + +#include "ocd.h" +#include "bverror.h" +#include "bvblend.h" +#include "bvfilter.h" +#include "bvbuffdesc.h" +#include "bvcache.h" +#include "bventry.h" +#include "bvsurfgeom.h" + +/* + * bvrect - This structure is used to specify rectangles in BLTsville. + */ +struct bvrect { + int left; + int top; + unsigned int width; + unsigned int height; +}; + + +/* + * BVFLAG_* - These define the type of BLT to be performed and are placed in + * the bvparams.flags element. + */ +#define BVFLAG_OP_SHIFT 0 +#define BVFLAG_OP_MASK (0xF << BVFLAG_OP_SHIFT) + +/* 0 reserved */ +#define BVFLAG_ROP (0x1 << BVFLAG_OP_SHIFT) /* ROP4 spec'd in rop */ +#define BVFLAG_BLEND (0x2 << BVFLAG_OP_SHIFT) /* blend spec'd in blend */ +/* 3 reserved */ +#define BVFLAG_FILTER (0x4 << BVFLAG_OP_SHIFT) /* filter spec'd in filter */ +/* 5-F reserved */ + +#define BVFLAG_KEY_SRC 0x00000010 /* source color key - value spec'd + by pcolorkey; Mutually exclusive + with BVFLAG_KEY_DST */ +#define BVFLAG_KEY_DST 0x00000020 /* dest color key - value spec'd + by pcolorkey; Mutually exclusive + with BVFLAG_KEY_SRC */ +#define BVFLAG_CLIP 0x00000040 /* clipping rectangle spec'd by + cliprect */ +#define BVFLAG_SRCMASK 0x00000080 /* when scaling a masked copy, mask + at the source instead of the + (default) destination */ + +#define BVFLAG_ASYNC 0x00000100 /* call should return once queued */ + +#define BVFLAG_TILE_SRC1 0x00000200 /* source 1 is tiled */ +#define BVFLAG_TILE_SRC2 0x00000400 /* source 2 is tiled */ +#define BVFLAG_TILE_MASK 0x00000800 /* mask is tiled */ + + +#define BVFLAG_BATCH_SHIFT 12 +#define BVFLAG_BATCH_MASK (3 << BVFLAG_BATCH_SHIFT) + +#define BVFLAG_BATCH_NONE (0 << BVFLAG_BATCH_SHIFT) /* not batched */ +#define BVFLAG_BATCH_BEGIN (1 << BVFLAG_BATCH_SHIFT) /* begin batch */ +#define BVFLAG_BATCH_CONTINUE (2 << BVFLAG_BATCH_SHIFT) /* continue batch */ +#define BVFLAG_BATCH_END (3 << BVFLAG_BATCH_SHIFT) /* end batch */ + + +#define BVFLAG_HORZ_FLIP_SRC1 0x00004000 /* flip src1 horizontally */ +#define BVFLAG_VERT_FLIP_SRC1 0x00008000 /* flip src1 vertically */ +#define BVFLAG_HORZ_FLIP_SRC2 0x00010000 /* flip src2 horizontally */ +#define BVFLAG_VERT_FLIP_SRC2 0x00020000 /* flip src2 vertically */ +#define BVFLAG_HORZ_FLIP_MASK 0x00040000 /* flip mask horizontally */ +#define BVFLAG_VERT_FLIP_MASK 0x00080000 /* flip mask vertically */ + + +#define BVFLAG_SCALE_RETURN 0x00100000 /* return scale type used */ +#define BVFLAG_DITHER_RETURN 0x00200000 /* return dither type used */ + + +#define BVFLAG_SRC2_AUXDSTRECT 0x00400000 /* src2auxdstrect used */ +#define BVFLAG_MASK_AUXDSTRECT 0x00800000 /* maskauxdstrect used */ + +#define BVFLAG_TESTPARAMS_NOP 0x01000000 /* test params only - no BLT */ +/**** Bits 25-31 reserved ****/ + +/* + * BVIMPL_* - BLTsville implementations may be combined under managers to + * allow clients to take advantage of multiple implementations without doing + * so explicitly. The BVIMPL_* definition are placed into the + * bvparams.implementation member by the client to override the manager's + * choice of implementation. + */ +#define BVIMPL_ANY 0 +#define BVIMPL_FIRST_HW (1 << 31) /* Continues to the right */ +#define BVIMPL_FIRST_CPU (1 << 0) /* Continues to the left */ + + +/* + * bvscalemode - This specifies the type of scaling to perform. + */ +#define BVSCALEDEF_VENDOR_SHIFT 24 +#define BVSCALEDEF_VENDOR_MASK (0xFF << BVSCALEDEF_VENDOR_SHIFT) + +#define BVSCALEDEF_VENDOR_ALL (0 << BVSCALEDEF_VENDOR_SHIFT) +#define BVSCALEDEF_VENDOR_TI (1 << BVSCALEDEF_VENDOR_SHIFT) +/* 0xF0-0xFE reserved */ +#define BVSCALEDEF_VENDOR_GENERIC (0xFF << BVSCALEDEF_VENDOR_SHIFT) + +/***** VENDOR_GENERIC definitions *****/ +/**** Bits 23-22 indicate classification ****/ +#define BVSCALEDEF_CLASS_SHIFT 22 +#define BVSCALEDEF_IMPLICIT (0 << BVSCALEDEF_CLASS_SHIFT) +#define BVSCALEDEF_EXPLICIT (1 << BVSCALEDEF_CLASS_SHIFT) +/* 2-3 reserved */ +#define BVSCALEDEF_CLASS_MASK (3 << BVSCALEDEF_CLASS_SHIFT) + +/**** IMPLICIT definitions ****/ +/*** Bits 21-16 indicate the quality (speed) desired ***/ +#define BVSCALEDEF_QUALITY_SHIFT 16 +#define BVSCALEDEF_FASTEST (0x00 << BVSCALEDEF_QUALITY_SHIFT) +#define BVSCALEDEF_GOOD (0x15 << BVSCALEDEF_QUALITY_SHIFT) +#define BVSCALEDEF_BETTER (0x2A << BVSCALEDEF_QUALITY_SHIFT) +#define BVSCALEDEF_BEST (0x3F << BVSCALEDEF_QUALITY_SHIFT) +#define BVSCALEDEF_QUALITY_MASK (0x3F << BVSCALEDEF_QUALITY_SHIFT) +/* Bits 12-15 are reserved */ +/*** Bits 11-8 indicate the desired technique ***/ +#define BVSCALEDEF_TECHNIQUE_SHIFT 8 +#define BVSCALEDEF_DONT_CARE (0x0 << BVSCALEDEF_TECHNIQUE_SHIFT) +#define BVSCALEDEF_NOT_NEAREST_NEIGHBOR (0x1 << BVSCALEDEF_TECHNIQUE_SHIFT) +#define BVSCALEDEF_POINT_SAMPLE (0x2 << BVSCALEDEF_TECHNIQUE_SHIFT) +#define BVSCALEDEF_INTERPOLATED (0x3 << BVSCALEDEF_TECHNIQUE_SHIFT) +#define BVSCALEDEF_TECHNIQUE_MASK (0xF << BVSCALEDEF_TECHNIQUE_SHIFT) +/* Bits 2-7 reserved */ +/*** Bits 1-0 indicate the type of image ***/ +#define BVSCALEDEF_TYPE_SHIFT 0 +/* 0 don't know */ +#define BVSCALEDEF_PHOTO (1 << BVSCALEDEF_TYPE_SHIFT) +#define BVSCALEDEF_DRAWING (2 << BVSCALEDEF_TYPE_SHIFT) +/* 3 reserved */ +#define BVSCALEDEF_TYPE_MASK (3 << BVSCALEDEF_TYPE_SHIFT) + +/**** EXPLICIT definitions ****/ +/* Bits 16-21 reserved */ +#define BVSCALEDEF_HORZ_SHIFT 8 +#define BVSCALEDEF_HORZ_MASK (0xFF << BVSCALEDEF_HORZ_SHIFT) + +#define BVSCALEDEF_VERT_SHIFT 0 +#define BVSCALEDEF_VERT_MASK (0xFF << BVSCALEDEF_VERT_SHIFT) + +#define BVSCALEDEF_NEAREST_NEIGHBOR 0x00 +#define BVSCALEDEF_LINEAR 0x01 +#define BVSCALEDEF_CUBIC 0x02 +#define BVSCALEDEF_3_TAP 0x03 +/* 0x04 reserved */ +#define BVSCALEDEF_5_TAP 0x05 +/* 0x06 reserved */ +#define BVSCALEDEF_7_TAP 0x07 +/* 0x08 reserved */ +#define BVSCALEDEF_9_TAP 0x09 +/* 0x0A-0xFF reserved */ + +enum bvscalemode { + BVSCALE_FASTEST = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_DONT_CARE, + BVSCALE_FASTEST_NOT_NEAREST_NEIGHBOR = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_NOT_NEAREST_NEIGHBOR, + BVSCALE_FASTEST_POINT_SAMPLE = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_POINT_SAMPLE, + BVSCALE_FASTEST_INTERPOLATED = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_INTERPOLATED, + BVSCALE_FASTEST_PHOTO = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_PHOTO, + BVSCALE_FASTEST_DRAWING = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_FASTEST | + BVSCALEDEF_DRAWING, + BVSCALE_GOOD = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_GOOD | + BVSCALEDEF_DONT_CARE, + BVSCALE_GOOD_POINT_SAMPLE = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_GOOD | + BVSCALEDEF_POINT_SAMPLE, + BVSCALE_GOOD_INTERPOLATED = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_GOOD | + BVSCALEDEF_INTERPOLATED, + BVSCALE_GOOD_PHOTO = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_GOOD | + BVSCALEDEF_PHOTO, + BVSCALE_GOOD_DRAWING = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_GOOD | + BVSCALEDEF_DRAWING, + BVSCALE_BETTER = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BETTER | + BVSCALEDEF_DONT_CARE, + BVSCALE_BETTER_POINT_SAMPLE = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BETTER | + BVSCALEDEF_POINT_SAMPLE, + BVSCALE_BETTER_INTERPOLATED = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BETTER | + BVSCALEDEF_INTERPOLATED, + BVSCALE_BETTER_PHOTO = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BETTER | + BVSCALEDEF_PHOTO, + BVSCALE_BETTER_DRAWING = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BETTER | + BVSCALEDEF_DRAWING, + BVSCALE_BEST = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BEST | + BVSCALEDEF_DONT_CARE, + BVSCALE_BEST_POINT_SAMPLE = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BEST | + BVSCALEDEF_POINT_SAMPLE, + BVSCALE_BEST_INTERPOLATED = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BEST | + BVSCALEDEF_INTERPOLATED, + BVSCALE_BEST_PHOTO = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BEST | + BVSCALEDEF_PHOTO, + BVSCALE_BEST_DRAWING = BVSCALEDEF_VENDOR_ALL | + BVSCALEDEF_IMPLICIT | + BVSCALEDEF_BEST | + BVSCALEDEF_DRAWING, + + BVSCALE_NEAREST_NEIGHBOR = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_NEAREST_NEIGHBOR << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_NEAREST_NEIGHBOR << BVSCALEDEF_VERT_SHIFT), + BVSCALE_BILINEAR = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_LINEAR << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_LINEAR << BVSCALEDEF_VERT_SHIFT), + BVSCALE_BICUBIC = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_CUBIC << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_CUBIC << BVSCALEDEF_VERT_SHIFT), + BVSCALE_3x3_TAP = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_3_TAP << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_3_TAP << BVSCALEDEF_VERT_SHIFT), + BVSCALE_5x5_TAP = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_5_TAP << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_5_TAP << BVSCALEDEF_VERT_SHIFT), + BVSCALE_7x7_TAP = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_7_TAP << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_7_TAP << BVSCALEDEF_VERT_SHIFT), + BVSCALE_9x9_TAP = BVSCALEDEF_VENDOR_GENERIC | + BVSCALEDEF_EXPLICIT | + (BVSCALEDEF_9_TAP << BVSCALEDEF_HORZ_SHIFT) | + (BVSCALEDEF_9_TAP << BVSCALEDEF_VERT_SHIFT), + +#ifdef BVSCALE_EXTERNAL_INCLUDE +#include BVSCALE_EXTERNAL_INCLUDE +#endif +}; + + +/* + * bvdithermode - This defines the type of dithering to use. + */ +#define BVDITHERDEF_VENDOR_SHIFT 24 +#define BVDITHERDEF_VENDOR_MASK (0xFF << BVDITHERDEF_VENDOR_SHIFT) + +#define BVDITHERDEF_VENDOR_ALL (0 << BVDITHERDEF_VENDOR_SHIFT) +#define BVDITHERDEF_VENDOR_TI (1 << BVDITHERDEF_VENDOR_SHIFT) +/* 0xF0-0xFE reserved */ +#define BVDITHERDEF_VENDOR_GENERIC (0xFF << BVDITHERDEF_VENDOR_SHIFT) + +/***** VENDOR_GENERIC definitions *****/ +/* Bits 18-23 reserved */ +/**** Bits 17-16 indicate the type of image - 0 = don't know ****/ +#define BVDITHERDEF_TYPE_SHIFT 16 +#define BVDITHERDEF_PHOTO (0x01 << BVDITHERDEF_TYPE_SHIFT) +#define BVDITHERDEF_DRAWING (0x02 << BVDITHERDEF_TYPE_SHIFT) +/**** Bits 15-8 indicate the desired technique ****/ +#define BVDITHERDEF_TECHNIQUE_SHIFT 8 +#define BVDITHERDEF_DONT_CARE (0x00 << BVDITHERDEF_TECHNIQUE_SHIFT) +#define BVDITHERDEF_RANDOM (0x01 << BVDITHERDEF_TECHNIQUE_SHIFT) +#define BVDITHERDEF_ORDERED (0x02 << BVDITHERDEF_TECHNIQUE_SHIFT) +#define BVDITHERDEF_DIFFUSED (0x04 << BVDITHERDEF_TECHNIQUE_SHIFT) +#define BVDITHERDEF_ON (0xFF << BVDITHERDEF_TECHNIQUE_SHIFT) +/**** Bits 7-0 indicate the quality (speed) desired ****/ +#define BVDITHERDEF_QUALITY_SHIFT 0 +#define BVDITHERDEF_FASTEST (0x00 << BVDITHERDEF_QUALITY_SHIFT) +#define BVDITHERDEF_GOOD (0x55 << BVDITHERDEF_QUALITY_SHIFT) +#define BVDITHERDEF_BETTER (0xAA << BVDITHERDEF_QUALITY_SHIFT) +#define BVDITHERDEF_BEST (0xFF << BVDITHERDEF_QUALITY_SHIFT) + +enum bvdithermode { + BVDITHER_FASTEST = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_DONT_CARE, + BVDITHER_FASTEST_ON = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_ON, + BVDITHER_FASTEST_RANDOM = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_RANDOM, + BVDITHER_FASTEST_ORDERED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_ORDERED, + BVDITHER_FASTEST_DIFFUSED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_DIFFUSED, + BVDITHER_FASTEST_PHOTO = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_PHOTO, + BVDITHER_FASTEST_DRAWING = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_FASTEST | + BVDITHERDEF_DRAWING, + BVDITHER_GOOD = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_DONT_CARE, + BVDITHER_GOOD_ON = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_ON, + BVDITHER_GOOD_RANDOM = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_RANDOM, + BVDITHER_GOOD_ORDERED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_ORDERED, + BVDITHER_GOOD_DIFFUSED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_DIFFUSED, + BVDITHER_GOOD_PHOTO = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_PHOTO, + BVDITHER_GOOD_DRAWING = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_GOOD | + BVDITHERDEF_DRAWING, + BVDITHER_BETTER = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_DONT_CARE, + BVDITHER_BETTER_ON = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_ON, + BVDITHER_BETTER_RANDOM = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_RANDOM, + BVDITHER_BETTER_ORDERED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_ORDERED, + BVDITHER_BETTER_DIFFUSED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_DIFFUSED, + BVDITHER_BETTER_PHOTO = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_PHOTO, + BVDITHER_BETTER_DRAWING = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BETTER | + BVDITHERDEF_DRAWING, + BVDITHER_BEST = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_DONT_CARE, + BVDITHER_BEST_ON = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_ON, + BVDITHER_BEST_RANDOM = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_RANDOM, + BVDITHER_BEST_ORDERED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_ORDERED, + BVDITHER_BEST_DIFFUSED = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_DIFFUSED, + BVDITHER_BEST_PHOTO = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_PHOTO, + BVDITHER_BEST_DRAWING = BVDITHERDEF_VENDOR_ALL | + BVDITHERDEF_BEST | + BVDITHERDEF_DRAWING, + + BVDITHER_NONE = BVDITHERDEF_VENDOR_GENERIC + 0, + BVDITHER_ORDERED_2x2 = BVDITHERDEF_VENDOR_GENERIC + 4, + BVDITHER_ORDERED_4x4 = BVDITHERDEF_VENDOR_GENERIC + 16, + BVDITHER_ORDERED_2x2_4x4 = BVDITHERDEF_VENDOR_GENERIC + 4 + 16, + /* 2x2 for 6->8, 4x4 for 5->8 */ + +#ifdef BVDITHER_EXTERNAL_INCLUDE +#include BVDITHER_EXTERNAL_INCLUDE +#endif +}; + + +/* + * BVTILE_* flags - These specify parameters used when tiling. + */ +#define BVTILE_LEFT_SHIFT 0 +#define BVTILE_TOP_SHIFT (BVTILE_LEFT_SHIFT + 2) +#define BVTILE_RIGHT_SHIFT (BVTILE_TOP_SHIFT + 2) +#define BVTILE_BOTTOM_SHIFT (BVTILE_RIGHT_SHIFT + 2) +#define BVTILE_LEFT_REPEAT (0 << BVTILE_LEFT_SHIFT) /* ...012301230123 */ +#define BVTILE_TOP_REPEAT (0 << BVTILE_TOP_SHIFT) /* ...012301230123 */ +#define BVTILE_RIGHT_REPEAT (0 << BVTILE_RIGHT_SHIFT) /* 012301230123... */ +#define BVTILE_BOTTOM_REPEAT (0 << BVTILE_BOTTOM_SHIFT) /* 012301230123... */ +#define BVTILE_LEFT_MIRROR (1 << BVTILE_LEFT_SHIFT) /* ...012332100123 */ +#define BVTILE_TOP_MIRROR (1 << BVTILE_TOP_SHIFT) /* ...012332100123 */ +#define BVTILE_RIGHT_MIRROR (1 << BVTILE_RIGHT_SHIFT) /* 012332100123... */ +#define BVTILE_BOTTOM_MIRROR (1 << BVTILE_BOTTOM_SHIFT) /* 012332100123... */ + +/* + * bvtileparams - This structure provides additional parameters needed when + * tiling. This structure replaces the bvbuffdesc in bvbltparams when the + * associated BVFLAG_TILE_* flag is set in bvbltparams.flags. + */ +struct bvtileparams { + unsigned int structsize; /* used to ID structure version */ + unsigned long flags; /* tile flags */ + void *virtaddr; /* pointer to the brush */ + int dstleft; /* horizontal offset */ + int dsttop; /* vertical offset */ + unsigned int srcwidth; /* w/dst width to spec horz scale */ + unsigned int srcheight; /* w/dst height to spec vert scale */ +}; + +/* + * BVBATCH_* - These flags specify the parameters that change between + * batched BLTs, when BVFLAG_CONTINUE or BVFLAG_END set. + */ +#define BVBATCH_OP 0x00000001 /* type of operation changed */ +#define BVBATCH_KEY 0x00000002 /* color key changed */ +#define BVBATCH_MISCFLAGS 0x00000004 /* other flags changed */ +#define BVBATCH_ALPHA 0x00000008 /* global alpha changed */ +#define BVBATCH_DITHER 0x00000010 /* dither changed */ +#define BVBATCH_SCALE 0x00000020 /* scaling type changed */ +/* Bits 6-7 reserved */ +#define BVBATCH_DST 0x00000100 /* destination surface changed */ +#define BVBATCH_SRC1 0x00000200 /* source 1 surface changed */ +#define BVBATCH_SRC2 0x00000400 /* source 2 surface changed */ +#define BVBATCH_MASK 0x00000800 /* mask surface changed */ +#define BVBATCH_DSTRECT_ORIGIN 0x00001000 /* dest rect origin changed */ +#define BVBATCH_DSTRECT_SIZE 0x00002000 /* dest rect dimensions changed */ +#define BVBATCH_SRC1RECT_ORIGIN 0x00004000 /* src 1 rect origin changed */ +#define BVBATCH_SRC1RECT_SIZE 0x00008000 /* src 1 rect dimensions changed */ +#define BVBATCH_SRC2RECT_ORIGIN 0x00010000 /* src 2 rect origin changed */ +#define BVBATCH_SRC2RECT_SIZE 0x00020000 /* src 2 rect dimensions changed */ +#define BVBATCH_MASKRECT_ORIGIN 0x00040000 /* mask rect origin changed */ +#define BVBATCH_MASKRECT_SIZE 0x00080000 /* mask rect dimensions changed */ +#define BVBATCH_CLIPRECT_ORIGIN 0x00100000 /* Clip rect origin changed */ +#define BVBATCH_CLIPRECT_SIZE 0x00200000 /* Clip rect dimensions changed */ +#define BVBATCH_CLIPRECT (BVBATCH_CLIPRECT_ORIGIN | \ + BVBATCH_CLIPRECT_SIZE) /* clip rect... */ + /* ...changed */ +#define BVBATCH_TILE_SRC1 0x00400000 /* tile params for src 1 changed */ +#define BVBATCH_TILE_SRC2 0x00800000 /* tile params for src 2 changed */ +#define BVBATCH_TILE_MASK 0x00100000 /* tile params for mask changed */ +/* Bits 21-30 reserved */ +#define BVBATCH_ENDNOP 0x80000000 /* just end batch, don't do BLT; + only with BVFLAG_BATCH_END */ + +/* + * bvcallbackerror - This structure is passed into the callback function + * if an error occurs. + */ +struct bvcallbackerror { + unsigned int structsize; /* used to ID structure version */ + enum bverror error; /* error during async BLT */ + char *errdesc; /* 0-terminated ASCII string + with extended error info (not + for end users) */ +}; + +/* + * bvbatch - an implementation-specific container for batch information; + * not used by client; forward declaration here + */ +struct bvbatch; + +/* + * bvinbuff - provides the buffer in bvbltparams + */ +union bvinbuff { + struct bvbuffdesc *desc; /* buffer description when + associated BVFLAG_TILE_* + is not set */ + struct bvtileparams *tileparams; /* tile params when associated + BVFLAG_TILE_* flag is set */ +}; + +/* + * bvop - used to hold the operation in bvbltparams + */ +union bvop { + unsigned short rop; /* when BVFLAG_ROP set */ + enum bvblend blend; /* when BVFLAG_BLEND set */ + struct bvfilter *filter; /* when BVFLAG_FILTER set */ +}; + + +/* + * bvbltparams - This structure is passed into bv_blt() to specify the + * parameters for a BLT. + */ +struct bvbltparams { + unsigned int structsize; /* (i) used to ID structure version */ + char *errdesc; /* (o) 0-terminated ASCII string + with extended error info (not + for end users) */ + + unsigned long implementation; /* (i) override manager choice */ + + unsigned long flags; /* (i) see BVFLAG_* above */ + + union bvop op; /* (i) operation; determined by + BVFLAG_OP_MASK bits in flags */ + + void *colorkey; /* (i) pointer to color key pixel + matching non-SUBSAMPLE format + of the keyed surface when + BVFLAG_KEY_* is set */ + + union bvalpha globalalpha; /* (i) global alpha when BVFLAG_BLEND + set in flags and + BVBLENDDEF_GLOBAL_* is set in + blend; typed determined by + BVBLENDDEF_GLOBAL_* */ + + enum bvscalemode scalemode; /* (i/o) type of scaling */ + enum bvdithermode dithermode; /* (i/o) type of dither */ + + struct bvbuffdesc *dstdesc; /* (i) dest after bv_map() */ + struct bvsurfgeom *dstgeom; /* (i) dest surf fmt and geometry */ + struct bvrect dstrect; /* (i) rect into which data written */ + + union bvinbuff src1; /* (i) src1 buffer */ + struct bvsurfgeom *src1geom; /* (i) src1 surf fmt and geometry */ + struct bvrect src1rect; /* (i) rect from which data is read */ + + union bvinbuff src2; /* (i) src2 buffer */ + struct bvsurfgeom *src2geom; /* (i) src2 surf fmt and geometry */ + struct bvrect src2rect; /* (i) rect from which data is read */ + + union bvinbuff mask; /* (i) mask buffer */ + struct bvsurfgeom *maskgeom; /* (i) mask surf fmt and geometry */ + struct bvrect maskrect; /* (i) rect from which data is read */ + + struct bvrect cliprect; /* (i) dest clipping rect when + BVFLAG_CLIP flag set */ + + unsigned long batchflags; /* (i) BVBATCH_* flags used to + indicate params changed between + batch BLTs */ + struct bvbatch *batch; /* (i/o) handle for associated batch; + returned when + BVFLAG_BATCH_BEGIN set; + provided to subsequent BLTs + with BVFLAG_BATCH_CONTINUE */ + + void (*callbackfn)(struct bvcallbackerror *err, + unsigned long callbackdata); /* (i) callback + function when + BVFLAG_ASYNC is set - + err is 0 when no + error; handle contains + callbackdata below */ + unsigned long callbackdata; /* (i) callback data */ + + struct bvrect src2auxdstrect; + struct bvrect maskauxdstrect; +}; + +#endif /* BLTSVILLE_H */ diff --git a/bltsville/bltsville/include/bvblend.h b/bltsville/bltsville/include/bvblend.h new file mode 100644 index 0000000..f187d81 --- /dev/null +++ b/bltsville/bltsville/include/bvblend.h @@ -0,0 +1,508 @@ +/* + * bvblend.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +/* + * This file defines the types of shared blends available. + * + * To extend the list of blends, create a file containing additional + * enumerations to be added to enum bvblend below. Then #define + * BVBLEND_EXTERNAL_INCLUDE as the name of that file before including + * this file in your project. + */ + +#ifndef BVBLEND_H +#define BVBLEND_H + +/* + * bvblend - specifies the type of blending operation to perform; only valid + * when BVFLAG_BLEND is set in the bvbltparams.flags field. + */ + +/* + * The blendmode value is divided into two sections. + * + * [31:28] The most significant 4 bits indicate the blend format. + * + * [27:0] The remainder of the bits is defined by the format chosen. + * + * 3322222222221111111111 + * 10987654321098765432109876543210 + * [ ][ ] + * | | + * format defined by format + */ + +#define BVBLENDDEF_FORMAT_SHIFT 28 +#define BVBLENDDEF_FORMAT_MASK (0xF << BVBLENDDEF_FORMAT_SHIFT) + +#define BVBLENDDEF_FORMAT_CLASSIC (0x0 << BVBLENDDEF_FORMAT_SHIFT) +#define BVBLENDDEF_FORMAT_ESSENTIAL (0x1 << BVBLENDDEF_FORMAT_SHIFT) + +/* + * The BVBLENDDEF_FORMAT_CLASSIC is meant to handle the classic Porter-Duff + * equations. It can also handle the DirectFB blending. + * BVBLENDDEF_FORMAT_CLASSIC is based on the following equations: + * + * Cd = K1 x C1 + K2 x C2 + * Ad = K3 x A1 + K4 x A2 + * + * where: + * Cd: destination color + * C1: source 1 color + * C2: source 2 color + * Ad: destination alpha + * A1: source 1 alpha + * A2: source 2 alpha + * K#: one of the constants defined using the bitfields below. + */ + +/* + * The 28 bits for BVBLENDDEF_FORMAT_CLASSIC are divided into 5 sections. + * + * The most significant 4 bits are modifiers, used to include additional + * alpha values from global or remote sources. + * + * [27] The most significant bit indicates that a remote alpha is to be + * included in the blend. The format of this is defined by + * bvbltparams.maskgeom.format. + * + * [26] The next bit is reserved. + * + * [25:24] The next 2 bits are used to indicate that a global alpha is to be + * included, and what its format is: + * 00: no global included + * 01: global included; bvbltparams.globalalpha.size8 is used (0 -> 255) + * 10: this value is reserved + * 11: global included; bvbltparams.flogalalpha.fp is used (0.0 -> 1.0) + * + * The remaining bits are divided into 4 sections, one to define each of the + * constants: + * + * [23:18] - K1 + * [17:12] - K2 + * [11:6] - K3 + * [5:0] - K4 + * + * The format is the same for all 4 constant fields: + * + * [5:4] The first 2 bits of each field indicates the way in which the other + * 2 fields are interpreted: + * 00: only As: the other two fields contain only As; there should be only + * one valid A value between the two fields + * 01: minimum: the value of the constant is the minimum of the two fields + * 10: maximum: the value of the constant is the maximum of the two fields + * 11: only Cs: the other two fields contain only Cs; there should be only + * one valid C value between the two fields + * + * [3:2] The middle 2 bits of each field contain the inverse field: + * 00: 1-C1 ("don't care" for "only As") + * 01: 1-A1 ("don't care" for "only Cs") + * 10: 1-C2 ("don't care" for "only As") + * 11: 1-A2 ("don't care" for "only Cs") + * + * [1:0] The last 2 bits if each field contain the normal field: + * 00: C1 ("don't care" for "only As") + * 01: A1 ("don't care" for "only Cs") + * 10: C2 ("don't care" for "only As") + * 11: A2 ("don't care" for "only Cs") + * + * EXCEPTIONS: + * + * 00 00 00 - The value 00 00 00, which normally would indicate "only As" + * with two "don't care" fields, is interpreted as a 0. + * + * 11 11 11 - The value 11 11 11, which normally would indicate "only Cs" + * with two "don't care" fields, is interpreted as a 1. + * + * -------------------------------------------------------------------------- + * + * Put together, these can define portions of the blend equations that can be + * put together in a variety of ways: + * + * 00 00 00: undefined -> zero + * 00 00 01: A1 (preferred) + * 00 00 10: undefined + * 00 00 11: A2 (preferred) + * 00 01 00: 1-A1 (preferred) + * 00 01 01: undefined + * 00 01 10: 1-A1 (use 00 01 00) + * 00 01 11: undefined + * 00 10 00: undefined + * 00 10 01: A1 (use 00 00 01) + * 00 10 10: undefined + * 00 10 11: A2 (use 00 00 11) + * 00 11 00: 1-A2 (preferred) + * 00 11 01: undefined + * 00 11 10: 1-A2 (use 00 11 00) + * 00 11 11: undefined + * + * 01 00 00: min(C1,1-C1) + * 01 00 01: min(A1,1-C1) + * 01 00 10: min(C2,1-C1) + * 01 00 11: min(A2,1-C1) + * 01 01 00: min(C1,1-A1) + * 01 01 01: min(A1,1-A1) + * 01 01 10: min(C2,1-A1) + * 01 01 11: min(A2,1-A1) + * 01 10 00: min(C1,1-C2) + * 01 10 01: min(A1,1-C2) + * 01 10 10: min(C2,1-C2) + * 01 10 11: min(A2,1-C2) + * 01 11 00: min(C1,1-A2) + * 01 11 01: min(A1,1-A2) + * 01 11 10: min(C2,1-A2) + * 01 11 11: min(A2,1-A2) + * + * 10 00 00: max(C1,1-C1) + * 10 00 01: max(A1,1-C1) + * 10 00 10: max(C2,1-C1) + * 10 00 11: max(A2,1-C1) + * 10 01 00: max(C1,1-A1) + * 10 01 01: max(A1,1-A1) + * 10 01 10: max(C2,1-A1) + * 10 01 11: max(A2,1-A1) + * 10 10 00: max(C1,1-C2) + * 10 10 01: max(A1,1-C2) + * 10 10 10: max(C2,1-C2) + * 10 10 11: max(A2,1-C2) + * 10 11 00: max(C1,1-A2) + * 10 11 01: max(A1,1-A2) + * 10 11 10: max(C2,1-A2) + * 10 11 11: max(A2,1-A2) + * + * 11 00 00: undefined + * 11 00 01: 1-C1 (use 11 00 11) + * 11 00 10: undefined + * 11 00 11: 1-C1 (preferred) + * 11 01 00: C1 (use 11 11 00) + * 11 01 01: undefined + * 11 01 10: C2 (use 11 11 10) + * 11 01 11: undefined + * 11 10 00: undefined + * 11 10 01: 1-C2 (use 11 10 11) + * 11 10 10: undefined + * 11 10 11: 1-C2 (preferred) + * 11 11 00: C1 (preferred) + * 11 11 01: undefined + * 11 11 10: C2 (preferred) + * 11 11 11: undefined -> one + * + * ========================================================================== + * DirectFB + * ========================================================================== + * + * Putting these together into the proper constants, the blending equations + * can be built for DirectFB as well: + * + * For DirectFB, the SetSrcBlendFunction() and SetDstBlendFunction() can + * specify 121 combinations of blends (11 x 11). It's impractical to + * specify these combinations individually. Instead, the settings indicated + * by each call should be bitwise OR'd to make the proper single value used in + * BLTsville. + * + * binary value <- SetSrcBlendFunction() + * [--K1--] [--K2--] [--K3--] [--K4--] + * 0000 0000 00 00 00 xx xx xx 00 00 00 xx xx xx <- DSBF_ZERO + * 0000 0000 11 11 11 xx xx xx 11 11 11 xx xx xx <- DSBF_ONE + * 0000 0000 11 11 00 xx xx xx 00 00 01 xx xx xx <- DSBF_SRCCOLOR + * 0000 0000 11 00 11 xx xx xx 00 01 00 xx xx xx <- DSBF_INVSRCCOLOR + * 0000 0000 00 00 01 xx xx xx 00 00 01 xx xx xx <- DSBF_SRCALPHA + * 0000 0000 00 01 00 xx xx xx 00 01 00 xx xx xx <- DSBF_INVSRCALPHA + * 0000 0000 11 11 10 xx xx xx 00 00 11 xx xx xx <- DSBF_DESTCOLOR + * 0000 0000 11 10 11 xx xx xx 00 11 00 xx xx xx <- DSBF_INVDESTCOLOR + * 0000 0000 00 00 11 xx xx xx 00 00 11 xx xx xx <- DSBF_DESTALPHA + * 0000 0000 00 11 00 xx xx xx 00 11 00 xx xx xx <- DSBF_INVDESTALPHA + * 0000 0000 01 11 01 xx xx xx 11 11 11 xx xx xx <- DSBF_SRCALPHASAT + * + * binary value <- SetDstBlendFunction() + * [--K1--] [--K2--] [--K3--] [--K4--] + * 0000 0000 xx xx xx 00 00 00 xx xx xx 00 00 00 <- DSBF_ZERO + * 0000 0000 xx xx xx 11 11 11 xx xx xx 11 11 11 <- DSBF_ONE + * 0000 0000 xx xx xx 11 11 00 xx xx xx 00 00 01 <- DSBF_SRCCOLOR + * etc. + * + * ========================================================================== + * Porter-Duff + * ========================================================================== + * + * For Porter-Duff, the equations can be more specifically defined. For + * convenience, these are enumerated below. These utilize the local alpha as + * indicated. To use global or remote alpha, these enumerations need to be + * modified. For example, to include the global alpha in the Porter-Duff + * SRC1OVER blend, the blend could be defined like this: + * params.op.blend = BVBLEND_SRC1OVER + + * BVBLENDDEF_GLOBAL_UCHAR; + * + * To include the remote alpha, the blend could be defined like this: + * params.op.blend = BVBLEND_SRC1OVER + + * BVBLENDDEF_REMOTE; + * + * And to include both: + * params.op.blend = BVBLEND_SRC1OVER + + * BVBLENDDEF_GLOBAL_UCHAR + + * BVBLENDDEF_REMOTE; + * + * Note that if the source color formats include local alphas, the local + * alphas, global alpha, and remote alpha will be used together. + * + * Note also that the equations assume the surfaces are premultiplied. So + * if the surface formats indicate that they are not premultiplied, the + * alpha multiplication of each color is done prior to using the surface + * values in the equations. + * + * For example, BVBLEND_SRC1OVER specifies the equations: + * Cd = 1 x C1 + (1 - A1) x C2 + * Ad = 1 x A1 + (1 - A1) x A2 + * + * If the format of surface 1 is non-premultiplied, the equations + * are modified to include the multiplication explicitly: + * Cd = 1 x A1 x C1 + (1 - A1) x C2 + * Ad = 1 x A1 + (1 - A1) x A2 + * + * Likewise, if the format of surface 2 is non-premultiplied, the + * equations are modified for this: + * Cd = 1 x C1 + (1 - A1) x A2 x C2 + * Ad = 1 x A1 + (1 - A1) x A2 + * + * When including global or remote alphas, these values are used to modify + * the source 1 value values before being used in the blend equation: + * C1 = Ag x C1 + * A1 = Ag x A1 + * -or- + * C1 = Ar x C1 + * A1 = Ar x A1 + * -or- + * C1 = Ag x Ar x C1 + * A1 = Ag x Ar x A1 + * + */ + +#define BVBLENDDEF_MODE_SHIFT 4 +#define BVBLENDDEF_INV_SHIFT 2 +#define BVBLENDDEF_NORM_SHIFT 0 + +#define BVBLENDDEF_ONLY_A (0 << BVBLENDDEF_MODE_SHIFT) +#define BVBLENDDEF_MIN (1 << BVBLENDDEF_MODE_SHIFT) +#define BVBLENDDEF_MAX (2 << BVBLENDDEF_MODE_SHIFT) +#define BVBLENDDEF_ONLY_C (3 << BVBLENDDEF_MODE_SHIFT) +#define BVBLENDDEF_MODE_MASK (3 << BVBLENDDEF_MODE_SHIFT) + +#define BVBLENDDEF_NORM_C1 (0 << BVBLENDDEF_NORM_SHIFT) +#define BVBLENDDEF_NORM_A1 (1 << BVBLENDDEF_NORM_SHIFT) +#define BVBLENDDEF_NORM_C2 (2 << BVBLENDDEF_NORM_SHIFT) +#define BVBLENDDEF_NORM_A2 (3 << BVBLENDDEF_NORM_SHIFT) +#define BVBLENDDEF_NORM_MASK (3 << BVBLENDDEF_NORM_SHIFT) + +#define BVBLENDDEF_INV_C1 (0 << BVBLENDDEF_INV_SHIFT) +#define BVBLENDDEF_INV_A1 (1 << BVBLENDDEF_INV_SHIFT) +#define BVBLENDDEF_INV_C2 (2 << BVBLENDDEF_INV_SHIFT) +#define BVBLENDDEF_INV_A2 (3 << BVBLENDDEF_INV_SHIFT) +#define BVBLENDDEF_INV_MASK (3 << BVBLENDDEF_INV_SHIFT) + +#define BVBLENDDEF_ONLY_A_NORM_xx BVBLENDDEF_NORM_C1 +#define BVBLENDDEF_ONLY_A_INV_xx BVBLENDDEF_INV_C1 +#define BVBLENDDEF_ONLY_C_NORM_xx BVBLENDDEF_NORM_A2 +#define BVBLENDDEF_ONLY_C_INV_xx BVBLENDDEF_INV_A2 + +#define BVBLENDDEF_ZERO \ + (BVBLENDDEF_ONLY_A | \ + BVBLENDDEF_ONLY_A_NORM_xx | \ + BVBLENDDEF_ONLY_A_INV_xx) +#define BVBLENDDEF_C1 \ + (BVBLENDDEF_ONLY_C | \ + BVBLENDDEF_NORM_C1 | \ + BVBLENDDEF_ONLY_C_INV_xx) +#define BVBLENDDEF_A1 \ + (BVBLENDDEF_ONLY_A | \ + BVBLENDDEF_NORM_A1 | \ + BVBLENDDEF_ONLY_A_INV_xx) +#define BVBLENDDEF_C2 \ + (BVBLENDDEF_ONLY_C | \ + BVBLENDDEF_NORM_C2 | \ + BVBLENDDEF_ONLY_C_INV_xx) +#define BVBLENDDEF_A2 \ + (BVBLENDDEF_ONLY_A | \ + BVBLENDDEF_NORM_A2 | \ + BVBLENDDEF_ONLY_A_INV_xx) +#define BVBLENDDEF_ONE_MINUS_C1 \ + (BVBLENDDEF_ONLY_C | \ + BVBLENDDEF_ONLY_C_NORM_xx | \ + BVBLENDDEF_INV_C1) +#define BVBLENDDEF_ONE_MINUS_A1 \ + (BVBLENDDEF_ONLY_A | \ + BVBLENDDEF_ONLY_A_NORM_xx | \ + BVBLENDDEF_INV_A1) +#define BVBLENDDEF_ONE_MINUS_C2 \ + (BVBLENDDEF_ONLY_C | \ + BVBLENDDEF_ONLY_C_NORM_xx | \ + BVBLENDDEF_INV_C2) +#define BVBLENDDEF_ONE_MINUS_A2 \ + (BVBLENDDEF_ONLY_A | \ + BVBLENDDEF_ONLY_A_NORM_xx | \ + BVBLENDDEF_INV_A2) +#define BVBLENDDEF_ONE \ + (BVBLENDDEF_ONLY_C | \ + BVBLENDDEF_ONLY_C_NORM_xx | \ + BVBLENDDEF_ONLY_C_INV_xx) + +#define BVBLENDDEF_K_MASK \ + (BVBLENDDEF_MODE_MASK | \ + BVBLENDDEF_INV_MASK | \ + BVBLENDDEF_NORM_MASK) + +#define BVBLENDDEF_K1_SHIFT 18 +#define BVBLENDDEF_K2_SHIFT 12 +#define BVBLENDDEF_K3_SHIFT 6 +#define BVBLENDDEF_K4_SHIFT 0 + +#define BVBLENDDEF_K1_MASK \ + (BVBLENDDEF_K_MASK << BVBLENDDEF_K1_SHIFT) +#define BVBLENDDEF_K2_MASK \ + (BVBLENDDEF_K_MASK << BVBLENDDEF_K2_SHIFT) +#define BVBLENDDEF_K3_MASK \ + (BVBLENDDEF_K_MASK << BVBLENDDEF_K3_SHIFT) +#define BVBLENDDEF_K4_MASK \ + (BVBLENDDEF_K_MASK << BVBLENDDEF_K4_SHIFT) + +#define BVBLENDDEF_CLASSIC_EQUATION_MASK 0x00FFFFFF + +/* + * The following definitions are be used to modify the enumerations. + */ +#define BVBLENDDEF_REMOTE 0x08000000 /* mask surface provides alpha + for source 1 */ + +/* Bit 26 reserved */ + +/* These enable global alpha and define the type of globalalpha */ +#define BVBLENDDEF_GLOBAL_SHIFT 24 +#define BVBLENDDEF_GLOBAL_MASK (3 << BVBLENDDEF_GLOBAL_SHIFT) + +#define BVBLENDDEF_GLOBAL_NONE (0 << BVBLENDDEF_GLOBAL_SHIFT) +#define BVBLENDDEF_GLOBAL_UCHAR (1 << BVBLENDDEF_GLOBAL_SHIFT) +/* 2 reserved */ +#define BVBLENDDEF_GLOBAL_FLOAT (3 << BVBLENDDEF_GLOBAL_SHIFT) + +union bvalpha { + unsigned char size8; /* btwn 0 (0.0) and 255 (1.0) */ + float fp; /* btwn 0.0 and 1.0 */ +}; + + +enum bvblend { + /* Porter-Duff blending equations */ + BVBLEND_CLEAR = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ZERO << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC1 = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC2 = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ZERO << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC1OVER = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC2OVER = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC1IN = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC2IN = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ZERO << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC1OUT = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC2OUT = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ZERO << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ZERO << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC1ATOP = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_SRC2ATOP = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_XOR = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A2 << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE_MINUS_A1 << BVBLENDDEF_K4_SHIFT), + BVBLEND_PLUS = BVBLENDDEF_FORMAT_CLASSIC | + (BVBLENDDEF_ONE << BVBLENDDEF_K1_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K2_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K3_SHIFT) | + (BVBLENDDEF_ONE << BVBLENDDEF_K4_SHIFT), + +/* + * For FORMAT_ESSENTIAL, the variety of well-known blending functions from + * popular image manipulation programs are specified. + */ + + BVBLEND_NORMAL = BVBLENDDEF_FORMAT_ESSENTIAL + 0, + BVBLEND_LIGHTEN = BVBLENDDEF_FORMAT_ESSENTIAL + 1, + BVBLEND_DARKEN = BVBLENDDEF_FORMAT_ESSENTIAL + 2, + BVBLEND_MULTIPLY = BVBLENDDEF_FORMAT_ESSENTIAL + 3, + BVBLEND_AVERAGE = BVBLENDDEF_FORMAT_ESSENTIAL + 4, + BVBLEND_ADD = BVBLENDDEF_FORMAT_ESSENTIAL + 5, + BVBLEND_LINEAR_DODGE = BVBLEND_ADD, + BVBLEND_SUBTRACT = BVBLENDDEF_FORMAT_ESSENTIAL + 6, + BVBLEND_LINEAR_BURN = BVBLEND_SUBTRACT, + BVBLEND_DIFFERENCE = BVBLENDDEF_FORMAT_ESSENTIAL + 7, + BVBLEND_NEGATE = BVBLENDDEF_FORMAT_ESSENTIAL + 8, + BVBLEND_SCREEN = BVBLENDDEF_FORMAT_ESSENTIAL + 9, + BVBLEND_EXCLUSION = BVBLENDDEF_FORMAT_ESSENTIAL + 10, + BVBLEND_OVERLAY = BVBLENDDEF_FORMAT_ESSENTIAL + 11, + BVBLEND_SOFT_LIGHT = BVBLENDDEF_FORMAT_ESSENTIAL + 12, + BVBLEND_HARD_LIGHT = BVBLENDDEF_FORMAT_ESSENTIAL + 13, + BVBLEND_COLOR_DODGE = BVBLENDDEF_FORMAT_ESSENTIAL + 14, + BVBLEND_COLOR_BURN = BVBLENDDEF_FORMAT_ESSENTIAL + 15, + BVBLEND_LINEAR_LIGHT = BVBLENDDEF_FORMAT_ESSENTIAL + 16, + BVBLEND_VIVID_LIGHT = BVBLENDDEF_FORMAT_ESSENTIAL + 17, + BVBLEND_PIN_LIGHT = BVBLENDDEF_FORMAT_ESSENTIAL + 18, + BVBLEND_HARD_MIX = BVBLENDDEF_FORMAT_ESSENTIAL + 19, + BVBLEND_REFLECT = BVBLENDDEF_FORMAT_ESSENTIAL + 20, + BVBLEND_GLOW = BVBLENDDEF_FORMAT_ESSENTIAL + 21, + BVBLEND_PHOENIX = BVBLENDDEF_FORMAT_ESSENTIAL + 22, + +#ifdef BVBLEND_EXTERNAL_INCLUDE +#define BVBLEND_EXTERNAL_INCLUDE +#endif +}; + +#endif /* BVBLEND_H */ diff --git a/bltsville/bltsville/include/bvbuffdesc.h b/bltsville/bltsville/include/bvbuffdesc.h new file mode 100644 index 0000000..98934bc --- /dev/null +++ b/bltsville/bltsville/include/bvbuffdesc.h @@ -0,0 +1,61 @@ +/* + * bvbuffdesc.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BVBUFFDESC_H +#define BVBUFFDESC_H + +/* + * bvbuffmap - This is a private structure used by BLTsville + * implementations to manage resources associated with a buffer. A pointer + * to this is returned from bv_map() and used in subsequent bv_blt() and + * bv_unmap() calls. + */ +struct bvbuffmap; + +#define BVATDEF_VENDOR_SHIFT 24 +#define BVATDEF_VENDOR_MASK (0xFF << BVATDEF_VENDOR_SHIFT) + +/* Common aux type */ +#define BVATDEF_VENDOR_ALL (0x00 << BVATDEF_VENDOR_SHIFT) + +/* Texas Instruments, Inc. */ +#define BVATDEF_VENDOR_TI (0x01 << BVATDEF_VENDOR_SHIFT) + +enum bvauxtype { + BVAT_NONE = 0, /* auxptr not used */ + BVAT_reserved1 = /* reserved */ + BVATDEF_VENDOR_ALL + 1, + BVAT_reserved2 = /* reserved */ + BVATDEF_VENDOR_ALL + 2, +#ifdef BVAT_EXTERNAL_INCLUDE +#include BVAT_EXTERNAL_INCLUDE +#endif +}; + +/* + * bvbuffdesc - This structure is used to specify the buffer parameters + * in a call to bv_map(). + */ +struct bvbuffdesc { + unsigned int structsize; /* used to identify struct version */ + void *virtaddr; /* virtual ptr to start of buffer */ + unsigned long length; /* length of the buffer in bytes */ + struct bvbuffmap *map; /* resource(s) associated w/buffer */ + enum bvauxtype auxtype; /* type of auxptr */ + void *auxptr; /* additional buffer description data; + type depends on auxtype */ +}; + +#endif /* BVBUFFDESC_H */ diff --git a/bltsville/bltsville/include/bvcache.h b/bltsville/bltsville/include/bvcache.h new file mode 100644 index 0000000..d9a3f6d --- /dev/null +++ b/bltsville/bltsville/include/bvcache.h @@ -0,0 +1,45 @@ +/* + * bvcache.h + * + * Copyright (C) 2012 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BVCACHE_H_ +#define BVCACHE_H_ + +/* Forward declarations */ +struct bvbuffdesc; +struct bvsurfgeom; +struct bvrect; + +/* + * This defines which cache operation the user intends to use + * BVCACHE_CPU_TO_DEVICE = clean + * BVCACHE_CPU_FROM_DEVICE = invalidate + * BVCACHE_BIDIRECTIONAL = flush + */ +enum bvcacheop { + BVCACHE_BIDIRECTIONAL = 0, + BVCACHE_CPU_TO_DEVICE = 1, + BVCACHE_CPU_FROM_DEVICE = 2, + BVCACHE_RESERVED3 = 3, +}; + +struct bvcopparams { + unsigned int structsize; /* used to identify struct version */ + struct bvbuffdesc *desc; + struct bvsurfgeom *geom; + struct bvrect *rect; + enum bvcacheop cacheop; +}; + +#endif /* BVCACHE_H_ */ diff --git a/bltsville/bltsville/include/bventry.h b/bltsville/bltsville/include/bventry.h new file mode 100644 index 0000000..0ccfc05 --- /dev/null +++ b/bltsville/bltsville/include/bventry.h @@ -0,0 +1,32 @@ +/* + * bventry.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BVENTRY_H +#define BVENTRY_H + +/* Forward declarations */ +struct bvbuffdesc; +struct bvbltparams; +struct bvcopparams; +/* + * bv_*() - These are the API calls for BLTsville. The client needs to + * import these from the shared library. + */ +typedef enum bverror (*BVFN_MAP)(struct bvbuffdesc *buffdesc); +typedef enum bverror (*BVFN_BLT)(struct bvbltparams *bltparms); +typedef enum bverror (*BVFN_UNMAP)(struct bvbuffdesc *buffdesc); +typedef enum bverror (*BVFN_CACHE)(struct bvcopparams *copparams); + +#endif /* BVENTRY_H */ diff --git a/bltsville/bltsville/include/bverror.h b/bltsville/bltsville/include/bverror.h new file mode 100644 index 0000000..15c3ba7 --- /dev/null +++ b/bltsville/bltsville/include/bverror.h @@ -0,0 +1,307 @@ +/* + * bverror.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BVERROR_H +#define BVERROR_H + +/* + * bverror - These are error codes returned by BLTsville functions. + */ +#define BVERRDEF_VENDOR_SHIFT 24 +#define BVERRDEF_VENDOR_MASK (0xFF << BVERRDEF_VENDOR_SHIFT) + +#define BVERRDEF_VENDOR_ALL (0x00 << BVERRDEF_VENDOR_SHIFT) +#define BVERRDEF_VENDOR_TI (0x01 << BVERRDEF_VENDOR_SHIFT) +/* 0xF0-0xFF reserved */ + +enum bverror { + BVERR_NONE = 0, /* no error */ + + BVERR_UNK = /* unknown error */ + BVERRDEF_VENDOR_ALL + 1, + BVERR_OOM = /* memory allocation failure */ + BVERRDEF_VENDOR_ALL + 2, + BVERR_RSRC = /* required resource unavailable */ + BVERRDEF_VENDOR_ALL + 3, + + BVERR_VIRTADDR = /* virtaddr is bad */ + BVERRDEF_VENDOR_ALL + 1000, + BVERR_VIRTPTR = + BVERR_VIRTADDR, /* for backwards compatibility*/ + + BVERR_BUFFERDESC = /* invalid bvbufferdesc */ + BVERRDEF_VENDOR_ALL + 10000, + BVERR_BUFFERDESC_VERS = /* bvbufferdesc.structsize too small */ + BVERRDEF_VENDOR_ALL + 11000, + BVERR_BUFFERDESC_VIRTADDR = /* bad bvbufferdesc.virtaddr */ + BVERRDEF_VENDOR_ALL + 12000, + BVERR_BUFFERDESC_LEN = /* bvbufferdesc.length not supported */ + BVERRDEF_VENDOR_ALL + 13000, + BVERR_BUFFERDESC_ALIGNMENT = /* unsupported buffer base address */ + BVERRDEF_VENDOR_ALL + 14000, + + BVERR_BLTPARAMS_VERS = /* bvbltparams.structsize too small */ + BVERRDEF_VENDOR_ALL + 20000, + BVERR_IMPLEMENTATION = /* bvbltparams.implementation unsupported */ + BVERRDEF_VENDOR_ALL + 21000, + BVERR_FLAGS = /* bvbltparams.flags unsupported */ + BVERRDEF_VENDOR_ALL + 22000, + BVERR_OP = /* unsupported operation */ + BVERRDEF_VENDOR_ALL + 22100, + BVERR_KEY = /* type of color key not supported */ + BVERRDEF_VENDOR_ALL + 22200, + BVERR_SRC1_TILE = /* src1 tiling not supported */ + BVERRDEF_VENDOR_ALL + 22300, + BVERR_SRC2_TILE = /* src2 tiling not supported */ + BVERRDEF_VENDOR_ALL + 22310, + BVERR_MASK_TILE = /* mask tiling not supported */ + BVERRDEF_VENDOR_ALL + 22320, + BVERR_FLIP = /* flipping not supported */ + BVERRDEF_VENDOR_ALL + 22400, + BVERR_ROP = /* ROP code not supported */ + BVERRDEF_VENDOR_ALL + 23000, + BVERR_BLEND = /* blend not supported */ + BVERRDEF_VENDOR_ALL + 23100, + BVERR_GLOBAL_ALPHA = /* type of global alpha not supported */ + BVERRDEF_VENDOR_ALL + 23110, + BVERR_FILTER = /* filter type not supported */ + BVERRDEF_VENDOR_ALL + 23200, + BVERR_FILTER_PARAMS_VERS = /* filter parameter structsize too small */ + BVERRDEF_VENDOR_ALL + 23210, + BVERR_FILTER_PARAMS = /* filter parameters not supported */ + BVERRDEF_VENDOR_ALL + 23220, + BVERR_SCALE_MODE = /* bvbltparams.scalemode not supported */ + BVERRDEF_VENDOR_ALL + 24000, + BVERR_DITHER_MODE = /* bvbltparams.dithermode not supported */ + BVERRDEF_VENDOR_ALL + 25000, + + BVERR_DSTDESC = /* invalid bvbltparams.dstdesc */ + BVERRDEF_VENDOR_ALL + 26000, + BVERR_DSTDESC_VERS = /* bvbufferdesc.structsize too small */ + BVERRDEF_VENDOR_ALL + 26100, + BVERR_DSTDESC_VIRTADDR = /* bad bvbufferdesc.virtaddr */ + BVERRDEF_VENDOR_ALL + 26200, + BVERR_DSTDESC_LEN = /* bvbufferdesc.length not supported */ + BVERRDEF_VENDOR_ALL + 26300, + BVERR_DST_ALIGNMENT = /* unsupported buffer base address */ + BVERRDEF_VENDOR_ALL + 26400, + + BVERR_DSTGEOM = /* invalid bvbltparams.dstgeom */ + BVERRDEF_VENDOR_ALL + 27000, + BVERR_DSTGEOM_VERS = /* dstgeom.structsize too small */ + BVERRDEF_VENDOR_ALL + 27100, + BVERR_DSTGEOM_FORMAT = /* bltparams.dstgeom.format not supported */ + BVERRDEF_VENDOR_ALL + 27200, + BVERR_DSTGEOM_STRIDE = /* bltparams.dstgeom.stride not supported */ + BVERRDEF_VENDOR_ALL + 27300, + BVERR_DSTGEOM_PALETTE = /* dstgeom.paletteformat not supported */ + BVERRDEF_VENDOR_ALL + 27400, + + + BVERR_DSTRECT = /* bvbltparams.dstrect not supported */ + BVERRDEF_VENDOR_ALL + 28000, + + BVERR_SRC1DESC = /* invalid bvbltparams.src1.desc */ + BVERRDEF_VENDOR_ALL + 29000, + BVERR_SRC1DESC_VERS = /* bvbufferdesc.structsize too small */ + BVERRDEF_VENDOR_ALL + 29100, + BVERR_SRC1DESC_VIRTADDR = /* bad bvbufferdesc.virtaddr */ + BVERRDEF_VENDOR_ALL + 29200, + BVERR_SRC1DESC_LEN = /* bvbufferdesc.length not supported */ + BVERRDEF_VENDOR_ALL + 29300, + BVERR_SRC1DESC_ALIGNMENT = /* unsupported buffer base address */ + BVERRDEF_VENDOR_ALL + 29400, + + BVERR_SRC1GEOM = /* invalid bvbltparams.src1geom */ + BVERRDEF_VENDOR_ALL + 30000, + BVERR_SRC1GEOM_VERS = /* src1geom.structsize too small */ + BVERRDEF_VENDOR_ALL + 30100, + BVERR_SRC1GEOM_FORMAT = /* bltparams.src1geom.format not supported */ + BVERRDEF_VENDOR_ALL + 30200, + BVERR_SRC1GEOM_STRIDE = /* bltparams.src1geom.stride not supported */ + BVERRDEF_VENDOR_ALL + 30300, + BVERR_SRC1GEOM_PALETTE = /* src1geom.paletteformat not supported */ + BVERRDEF_VENDOR_ALL + 30400, + + BVERR_SRC1RECT = /* bvbltparams.src1rect not supported */ + BVERRDEF_VENDOR_ALL + 31000, + + BVERR_SRC1_HORZSCALE = /* horz scale for src1->dst not supported */ + BVERRDEF_VENDOR_ALL + 31100, + BVERR_SRC1_VERTSCALE = /* vert scale for src1->dst not supported */ + BVERRDEF_VENDOR_ALL + 31200, + BVERR_SRC1_ROT = /* src1->dst rotation angle not supported */ + BVERRDEF_VENDOR_ALL + 31300, + + BVERR_SRC1_TILEPARAMS = /* invalid src1.tileparams */ + BVERR_SRC1DESC, + BVERR_SRC1_TILE_VERS = /* src1.tileparams.structsize too small */ + BVERRDEF_VENDOR_ALL + 32000, + BVERR_SRC1_TILEPARAMS_VERS = + BVERR_SRC1_TILE_VERS, + BVERR_SRC1_TILE_FLAGS = /* tileparams.flags not supported */ + BVERRDEF_VENDOR_ALL + 32100, + BVERR_SRC1_TILEPARAMS_FLAGS = + BVERR_SRC1_TILE_FLAGS, + BVERR_SRC1_TILE_VIRTADDR = + BVERR_SRC1DESC_VIRTADDR, + BVERR_SRC1_TILEPARAMS_VIRTADDR = + BVERR_SRC1_TILE_VIRTADDR, + BVERR_SRC1_TILE_ORIGIN = /* tileparams.left or .top not supported */ + BVERRDEF_VENDOR_ALL + 32200, + BVERR_SRC1_TILEPARAMS_ORIGIN = + BVERR_SRC1_TILE_ORIGIN, + BVERR_SRC1_TILE_SIZE = /* tileparams.width or .height not supported */ + BVERRDEF_VENDOR_ALL + 32300, + BVERR_SRC1_TILEPARAMS_SIZE = + BVERR_SRC1_TILE_SIZE, + + BVERR_SRC2DESC = /* invalid bvbltparams.src2.desc */ + BVERRDEF_VENDOR_ALL + 33000, + BVERR_SRC2DESC_VERS = /* bvbufferdesc.structsize too small */ + BVERRDEF_VENDOR_ALL + 33100, + BVERR_SRC2DESC_VIRTADDR = /* bad bvbufferdesc.virtaddr */ + BVERRDEF_VENDOR_ALL + 33200, + BVERR_SRC2DESC_LEN = /* bvbufferdesc.length not supported */ + BVERRDEF_VENDOR_ALL + 33300, + BVERR_SRC2DESC_ALIGNMENT = /* unsupported buffer base address */ + BVERRDEF_VENDOR_ALL + 33400, + + BVERR_SRC2GEOM = /* invalid bvbltparams.src2geom */ + BVERRDEF_VENDOR_ALL + 34000, + BVERR_SRC2GEOM_VERS = /* src2geom.structsize too small */ + BVERRDEF_VENDOR_ALL + 34100, + BVERR_SRC2GEOM_FORMAT = /* bltparams.src2geom.format not supported */ + BVERRDEF_VENDOR_ALL + 34200, + BVERR_SRC2GEOM_STRIDE = /* bltparams.src2geom.stride not supported */ + BVERRDEF_VENDOR_ALL + 34300, + BVERR_SRC2GEOM_PALETTE = /* src2geom.paletteformat not supported */ + BVERRDEF_VENDOR_ALL + 34400, + + BVERR_SRC2RECT = /* bvbltparams.src2rect not supported */ + BVERRDEF_VENDOR_ALL + 35000, + + BVERR_SRC2_HORZSCALE = /* horz scale for src2->dst not supported */ + BVERRDEF_VENDOR_ALL + 35100, + BVERR_SRC2_VERTSCALE = /* vert scale for src2->dst not supported */ + BVERRDEF_VENDOR_ALL + 35200, + BVERR_SRC2_ROT = /* src2->dst rotation angle not supported */ + BVERRDEF_VENDOR_ALL + 35300, + + BVERR_SRC2_TILEPARAMS = /* invalid src2.tileparams */ + BVERR_SRC2DESC, + BVERR_SRC2_TILE_VERS = /* src2.tileparams.structsize too small */ + BVERRDEF_VENDOR_ALL + 36000, + BVERR_SRC2_TILEPARAMS_VERS = + BVERR_SRC2_TILE_VERS, + BVERR_SRC2_TILE_FLAGS = /* tileparams.flags not supported */ + BVERRDEF_VENDOR_ALL + 36100, + BVERR_SRC2_TILEPARAMS_FLAGS = + BVERR_SRC2_TILE_FLAGS, + BVERR_SRC2_TILE_VIRTADDR = + BVERR_SRC2DESC_VIRTADDR, + BVERR_SRC2_TILEPARAMS_VIRTADDR = + BVERR_SRC2_TILE_VIRTADDR, + BVERR_SRC2_TILE_ORIGIN = /* tileparams.left or .top not supported */ + BVERRDEF_VENDOR_ALL + 36200, + BVERR_SRC2_TILEPARAMS_ORIGIN = + BVERR_SRC2_TILE_ORIGIN, + BVERR_SRC2_TILE_SIZE = /* tileparams.width or .height not supported */ + BVERRDEF_VENDOR_ALL + 36300, + BVERR_SRC2_TILEPARAMS_SIZE = + BVERR_SRC2_TILE_SIZE, + + BVERR_MASKDESC = /* invalid bvbltparams.mask.desc */ + BVERRDEF_VENDOR_ALL + 37000, + BVERR_MASKDESC_VERS = /* bvbufferdesc.structsize too small */ + BVERRDEF_VENDOR_ALL + 37100, + BVERR_MASKDESC_VIRTADDR = /* bad bvbufferdesc.virtaddr */ + BVERRDEF_VENDOR_ALL + 37200, + BVERR_MASKDESC_LEN = /* bvbufferdesc.length not supported */ + BVERRDEF_VENDOR_ALL + 37300, + BVERR_MASKDESC_ALIGNMENT = /* unsupported buffer base address */ + BVERRDEF_VENDOR_ALL + 37400, + + BVERR_MASKGEOM = /* invalid bvbltparams.maskgeom */ + BVERRDEF_VENDOR_ALL + 38000, + BVERR_MASKGEOM_VERS = /* maskgeom.structsize too small */ + BVERRDEF_VENDOR_ALL + 38100, + BVERR_MASKGEOM_FORMAT = /* bltparams.maskgeom.format not supported */ + BVERRDEF_VENDOR_ALL + 38200, + BVERR_MASKGEOM_STRIDE = /* bltparams.maskgeom.stride not supported */ + BVERRDEF_VENDOR_ALL + 38300, + BVERR_MASKGEOM_PALETTE = /* maskgeom.paletteformat not supported */ + BVERRDEF_VENDOR_ALL + 38400, + + BVERR_MASKRECT = /* bvbltparams.maskrect not supported */ + BVERRDEF_VENDOR_ALL + 39000, + + BVERR_MASK_HORZSCALE = /* horz scale for mask->dst not supported */ + BVERRDEF_VENDOR_ALL + 39100, + BVERR_MASK_VERTSCALE = /* vert scale for mask->dst not supported */ + BVERRDEF_VENDOR_ALL + 39200, + BVERR_MASK_ROT = /* mask->dst rotation angle not supported */ + BVERRDEF_VENDOR_ALL + 39300, + + BVERR_MASK_TILEPARAMS = /* invalid mask.tileparams */ + BVERR_MASKDESC, + BVERR_MASK_TILE_VERS = /* mask.tileparams.structsize too small */ + BVERRDEF_VENDOR_ALL + 40000, + BVERR_MASK_TILEPARAMS_VERS = + BVERR_MASK_TILE_VERS, + BVERR_MASK_TILE_FLAGS = /* tileparams.flags not supported */ + BVERRDEF_VENDOR_ALL + 40100, + BVERR_MASK_TILEPARAMS_FLAGS = + BVERR_MASK_TILE_FLAGS, + BVERR_MASK_TILE_VIRTADDR = + BVERR_MASKDESC_VIRTADDR, + BVERR_MASK_TILEPARAMS_VIRTADDR = + BVERR_MASK_TILE_VIRTADDR, + BVERR_MASK_TILE_ORIGIN = /* tileparams.left or .top not supported */ + BVERRDEF_VENDOR_ALL + 40200, + BVERR_MASK_TILEPARAMS_ORIGIN = + BVERR_MASK_TILE_ORIGIN, + BVERR_MASK_TILE_SIZE = /* tileparams.width or .height not supported */ + BVERRDEF_VENDOR_ALL + 40300, + BVERR_MASK_TILEPARAMS_SIZE = + BVERR_MASK_TILE_SIZE, + + BVERR_CLIP_RECT = /* bvbltparams.cliprect not supported */ + BVERRDEF_VENDOR_ALL + 41000, + + BVERR_BATCH_FLAGS = /* bvbltparams.batchflags not supported */ + BVERRDEF_VENDOR_ALL + 42000, + BVERR_BATCH = /* bvbltparams.batch not valid */ + BVERRDEF_VENDOR_ALL + 43000, + + BVERR_OP_FAILED = /* async operation failed to start */ + BVERRDEF_VENDOR_ALL + 50000, + BVERR_OP_INCOMPLETE = /* async operation failed mid-way */ + BVERRDEF_VENDOR_ALL + 50001, + BVERR_MEMORY_ERROR = /* async operation triggered memory error */ + BVERRDEF_VENDOR_ALL + 51000, + + BVERR_FORMAT = /* unsupported format */ + BVERRDEF_VENDOR_ALL + 52000, + + BVERR_CACHEOP = /* unsupported cache operation */ + BVERRDEF_VENDOR_ALL + 60000, + +#ifdef BVERR_EXTERNAL_INCLUDE +#include BVERR_EXTERNAL_INCLUDE +#endif +}; + +#endif /* BVERROR_H */ diff --git a/bltsville/bltsville/include/bvfilter.h b/bltsville/bltsville/include/bvfilter.h new file mode 100644 index 0000000..2c98d94 --- /dev/null +++ b/bltsville/bltsville/include/bvfilter.h @@ -0,0 +1,51 @@ +/* + * bvfilter.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +/* + * This file defines the types of shared filters available and the associated + * parameters. + * + * To extend the list of filters, create a file containing additional + * enumerations to be added to enum bvfilter below. Then #define + * BVFILTER_EXTERNAL_INCLUDE as the name of that file before including + * this file in your project. Parameters need to be in a different file. + */ + +#ifndef BVFILTER_H +#define BVFILTER_H + +/* + * bvfilter is an enumeration used to designate the type of filter being used. + */ +enum bvfiltertype { + BVFILTER_DUMMY + /* TBD */ + +#ifdef BVFILTER_EXTERNAL_INCLUDE +#include BVFILTER_EXTERNAL_INCLUDE +#endif +}; + +/* + * bvfilterop contains the filter type and a pointer to the associated + * parameters when the BVFLAG_FILTER operation is specified in + * bvbltparams.flags. + */ +struct bvfilter { + enum bvfiltertype filter; + void *params; +}; + +#endif /* BVFILTER_H */ diff --git a/bltsville/bltsville/include/bvinternal.h b/bltsville/bltsville/include/bvinternal.h new file mode 100644 index 0000000..06e1bed --- /dev/null +++ b/bltsville/bltsville/include/bvinternal.h @@ -0,0 +1,47 @@ +/* + * bvinternal.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +/* + * This file contains definitions used by implementations of BLTsville + * 2-D libraries. It should not be used by clients. + */ + +#ifndef BVINTERNAL_H +#define BVINTENRAL_H + +/* + * bvbuffmap - The bvbuffmap structure is used to track resources + * associated with a buffer, such as a h/w MMU entry. The implementations + * add bvbuffmap objects when they allocate the resources. Then when a + * buffer is accessed, the implementations can regain access to the + * associated resources. The implementations allocate and populate this + * structure when a bv_map() call is made. It is used in subsequent + * bv_blt() and bv_unmap() calls. The latter frees the associated resource + * and the structure (if applicable). Note that a given resource might be + * used by more than one implementation. + */ +struct bvbuffmap { + unsigned int structsize; /* used to ID structure ver */ + + /* function to unmap this resource */ + BVFN_UNMAP bv_unmap; + + unsigned long handle; /* resource-specific info */ + + /* pointer to next resource mapping structure */ + struct bvbuffmap *nextmap; +}; + +#endif /* BVINTERNAL_H */ diff --git a/bltsville/bltsville/include/bvsurfgeom.h b/bltsville/bltsville/include/bvsurfgeom.h new file mode 100644 index 0000000..70029fc --- /dev/null +++ b/bltsville/bltsville/include/bvsurfgeom.h @@ -0,0 +1,41 @@ +/* + * bvsurfgeom.h + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is part of BLTsville, an open application programming interface + * (API) for accessing 2-D software or hardware implementations. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef BVSURFGEOM_H +#define BVSURFGEOM_H + +/* + * bvsurfdesc - This structure specifies the way a buffer should be used in a + * 2-D context. + */ + +struct bvsurfgeom { + unsigned int structsize; /* used to identify struct version */ + enum ocdformat format; /* color format of surface */ + unsigned int width; /* width of the surface in pixels */ + unsigned int height; /* height of the surface in lines */ + int orientation; /* angle of the surface in degrees + (multiple of 90 only) */ + long virtstride; /* distance from one pixel to the + pixel immediately below it in + virtual space */ + enum ocdformat paletteformat; /* format of palette */ + void *palette; /* array of palette entries of + paletteformat; only valid when + format includes BVFMTDEF_LUT; + number of entries is 2^bpp. */ +}; + +#endif /* BVSURFGEOM_H */ diff --git a/bltsville/bltsville/index.html b/bltsville/bltsville/index.html new file mode 100644 index 0000000..4b3a96c --- /dev/null +++ b/bltsville/bltsville/index.html @@ -0,0 +1,4362 @@ + + + + + + +Welcome to BLTsville + + + + + + + + + + +
+ + + + + + + +
+
+
+ + Now With OCD +
+
+
Version 2.2
+ 		+

BLTsville is the open 2-D API designed to provide an abstract interface for both hardware and software 2-D implementations.

+

BLTs (BLock Transfers) involve the moving around of blocks (rectangles) of pixels.  BLTsville is the place + to go for BLTs.

+
+ + + + + + + +
+
+ CC BY-ND
+

License

+
+
+

The API is designed and maintained by Texas Instruments, Inc., but anyone is free + to use it with no cost or obligation.

+

This project is licensed under the Creative + Commons Attribution-NoDerivs 3.0 Unported License (user mode), and the + GNU General Public License version 2 (kernel + mode).

+
+
+
+ + + + + + + +
+

Dependencies

+
+

This project is dependent on the Open Color format Defintions + (OCD) project.

+
+
+ + + + + + + + + + +
+

Source

+
+
+ + download zip + + download tar +
+
+ Get the source code (headers) from GitHub at github.com/graphics/bltsville, + or download the project in zip or + tar format.
+

You can also clone the project with Git by running:

+ 
$ git clone git://github.com/graphics/bltsville
+
+ + + + + + + +
Wiki
https://github.com/graphics/bltsville/wiki
+
+
+
+

Points of Interest in BLTsville

+ + + + + +
+
    +
  • Solid fills
    • +
  • Pattern fills
    • +
  • Copies
    • +
  • Color format conversion
      +
    • Extensive color format support
        +
      • RGB, BGR
        • +
      • RGBA, ARGB, etc.
        • +
      • YCbCr (YUV)
          +
        • subsampling
          • +
        • packed
          • +
        • planar
          • +
        +
        • +
      • Monochrome
        • +
      • Alpha-only
        • +
      • Look-Up Table (LUT)
        • +
      +
      • +
    • Extensible color format
      • +
    +
    • +
  • ROP4
      +
    • Three inputs
      • +
    +
    • +
  • Blends
      +
    • Pre-defined Porter-Duff blends
      • +
    • Pre-defined DirectFB support
      • +
    • Extensible blends
      • +
    +
    • +
  • Multiple
    • +
  • Filters
      +
    • Extensible filters
      • +
    +
    • +
  • Independent horizontal and vertical flipping
    • +
  • Independent scaling of all three inputs
    • +
  • Clipping
    • +
  • Independent rotation of all three inputs (multiples of 90 degrees)
    • +
+ 		+
    +
  • Choice of scaling type
      +
    • Quality based choice
      • +
    • Speed based choice
      • +
    • Image type based choice
      • +
    • Specific scale type choice
      • +
    • Extensible scale type
      • +
    +
    • +
  • Synchronous operations
    • +
  • Asynchronous operations
      +
    • Client notification of BLT completion
      • +
    +
    • +
  • Batching
      +
    • Combine multiple BLTs into group that can be handled more efficiently by implementations
        +
      • Character BLTs
        • +
      • Multi-layer blending
        • +
      • ROP/Blend combination with specified ordering
        • +
      • etc.
        • +
      +
      • +
    • Delta BLTs
      • +
    +
    • +
  • Dithering
      +
    • Quality based choice
      • +
    • Speed based choice
      • +
    • Image type based choice
      • +
    • Specific dither type choice
      • +
    • Extensible dither type
      • +
    +
    • +
  • Any implementation support
      +
    • CPU
      • +
    • 2-D Accelerator
      • +
    +
    • +
+
+
+ +
+

How to Get to BLTsville

+

BLTsville's API is defined in the BLTsville header files.  A client must include bltsville.h +to access the implementations.  This header includes the remaining headers (including ocd.h).

+

NOTE:  The bvinternal.h header is for implementations +only and should not be used by clients.

+

BLTsville has both user mode and a kernel mode interaces.  The kernel mode interface is quite similar to (and compatible +with) the user mode, but due to the minor differences and license issues, there are two different sets of header files.

+
+

History of BLTsville

+
+

Versions 1.x

+

BLTsville was based on a previous closed interface, which had a few implementations and shipped on a few devices.  +That interface represented the 1.x versions.  A lot was learned from that work, and these lessons were used in the +founding of BLTsville.

+

Version 2.0

+

This was the initial release of the user mode interface.  This version is not compatible with the 1.x versions.  +Several minor updates were posted, but the API itself did not change, so no changes to the client or implementation were +required.

+

Version 2.1

+

This is a minor update to the API, and it adds the kernel mode interface.  Some additions to the API have been made.  +Details of the changes are below with their compatibility matrices.

+ + + + + + + + + + + + + + + + + + + + + + + + + + +
 2.0 Client2.0 Client
+ (w/2.1 Headers)		2.1 Client
2.0 ImplementationcompatibleNew function and structure definitions have no effect.Client must deal with lack of bv_cache().
2.0 Implementation
+ (w/2.1 Headers)		New function and structure definitions have no effect.New function and structure definitions have no effect.Client must deal with lack of bv_cache().
2.1 ImplementationNew function and structures have no effect.New function and structures have no effect.compatible
+ + + + + + + + + + + + + + + + + + + + + + + + + + +
 2.0 Client2.0 Client
+ (w/2.1 Headers)		2.1 Client
2.0 ImplementationcompatibleClient must clear bvbuffdesc + using sizeof(bvbuffdesc).Implementation must handle + bvbuffdesc.structsize > sizeof(bvbuffdesc).
2.0 Implementation
+ (w/2.1 Headers)		Implementation must handle + bvbuffdesc.structsize < sizeof(bvbuffdesc).Client must clear bvbuffdesc + using sizeof(bvbuffdesc).Client must deal with implementation that uses + bvbuffdesc.virtaddr or returns error if + bvbuffdesc.virtaddr is 0.
2.1 ImplementationImplementation must handle + bvbuffdesc.structsize < sizeof(bvbuffdesc).Client must clear bvbuffdesc + using sizeof(bvbuffdesc).compatible
+ +

Version 2.2

+

This is a minor update which includes the following:

+ +

Compatibility

+ +
+

BLTsville Neighborhoods

+

Implementations may be software (CPU) or 2-D hardware, and many may coexist.  Each implementation will have an individual +entry point, so it can be directly addressed.  But there will also be a more general interface for each of these two +types of implementations so that system integrators can choose the most appropriate implementation.  In other words, +the system integrator will choose one software and one 2-D hardware implementation to be the "default" used when a client +does not need to choose a specific implementation.

+

User Mode Interface

+

Clients use the standard names below to access the default implementations.  The client then imports the pointers +to the functions.  (The specific name decoration and import method will be dictated by the host Operating System (O/S).)  +Some examples:

+ +

Usually these entry points will be symbolic links (either explicit in systems like Linux which support them, or implicit +using a thin wrapper) to the specific implementation.  This allows system integrators to connect the client with the +most capable implementation available in the system.  For example, bltsville_hw2d might +be a symbolic link to bltsville_gc2d.

+

In addition, there may be more implementations co-existing in a given system.  These will have additional unique +names as determined by the vendors.  For example:

+ +

Initialization

+

In general, each O/S has the ability to manually load a library.  This in turn causes a function in the library +to be called so the library can perform initialization.  Unfortunately, not all O/Ss allow this initialization +function to return an error if the initialization fails.  Equally unfortunately, it may be necessary for the +initialization to be performed in that function.  To accommodate this, BLTsville defers the specific initialization +to the O/S environment.

+

Linux/Android

+

The client will call dlopen() to open the library.  It will then import the +bv_*() functions, and call them as desired.  Initialization will occur in +association with one or more of these activities.  If the initialization fails, the bv_*() functions will return +the BVERR_RSRC error, indicating that a required resource was not obtained.

+

Implementations Only
+
+If the library has designated a function with the __attribute__ ((constructor)), that +function will be called.  Linux implementations may use this function to perform initialization (including opening +an interface to an associated kernel module).  However, since this function cannot return an error, and thus cannot +fail, if the initialization fails, this must be recorded.  Then, when the client calls any of the +bv_*() functions, these should immediately return the +BVERR_RSRC error, indicating that the library was unable to initialize (obtain a necessary resource).
+
+Linux implementations may also choose to initialize on the first call to a bv_*() +function.  Failure is likewise indicated by returning the BVERR_RSRC error.
+
+NOTE:  Be careful not to repeatedly attempt initialization when a failure is encountered.  Some +initializations, and especially initialization failures, can take a long time.  This means clients trying to call +bv_*() functions (presumably before falling back to +alternatives) will be repeatedly penalized if the library can't initialize.  Instead, attempt initialization +once, and from them on return BVERR_RSRC.

+

Kernel Mode Interface

+

For most kernel space BLTsville clients, only a 2-D hardware implementation will be used.  However, both types of +implementations are supported.  Clients use the standard names below to access the default implementations and obtain +pointers to the functions.  (The specific method of obtaining the interface will be dictated by the host Operating +System (O/S).)  Some examples:

+ +

These entry points may represent the implementations themselves, but more likely they will link the client to the implementations +using more specific names.  For example, bv2d_entry() may link the client to +gcbv_entry().

+

In addition, there may be more implementations co-existing in the kernel.  These will require additional unique +names as determined by the vendors.  For example:

+ +
+

Things To Do In BLTsville

+

BLTsville's interface consists of three or four functions per implementation, which must be imported by the +client at run time:

+ +

NOTE:  If the library failed to initialize, these functions will return +BVERR_RSRC, indicating that a required resource was not obtained.

+bv_map() +

enum bverror bv_map(struct bvbuffdesc* buffdesc);

+

BLTsville does not allocate buffers.   Clients must describe a buffer +in BLTsville using the bvbuffdesc structure so a given implementation +can access the buffer.

+

bv_map() is used to provide the implementation an opportunity to associate hardware +resources with the specified buffer.  Most hardware requires this type of mapping, and there is usually appreciable +overhead associated with it.  By providing a separate call for this operation, BLTsville allows the client to move +this overhead to the most appropriate time in its execution.

+

For a given buffer, the client can call the bv_map() function imported from each implementation +to establish the mapping immediately.  But this is not required.

+

As a special bonus, BLTsville clients can call to any implementation's bv_map().  +This is sufficient to indicate that the client can be trusted to make the corresponding call to +bv_unmap() upon destruction of the buffer.  Then when a client +calls an implementation's bv_blt(), if the mapping needs to be done, +it's done at that time.  But the mapping is maintained, so that the overhead is avoided on subsequent +bv_blt() calls.  This lets implementations use lazy mapping +only as necessary.  If an implementation is not called, the mapping is not done.

+

Normally, the lowest overhead bv_map() call will be in the CPU-based +implementation.  So most clients will want to make a single, low overhead bv_map() +call to the bltsville_cpu implementation to avoid the mapping/unmapping overhead on each +bv_blt() call, while avoiding the mapping overhead when possible.

+

Calling bv_map() is +actually optional prior to calling bv_blt().  +However, if it is not called at least once for a given buffer, it must be assumed that +bv_unmap() will not be called.  +So the mapping must be done when bv_blt() +is called, and unmapping done when it is complete.  This means the overhead will be incurred for every +bv_blt() call which uses that buffer.

+

NOTE: Obviously any API cannot add capabilities beyond an implementation's capabilities.  So, for example, +if an implementation requires memory to be allocated from a special pool of memory, that responsibility falls upon the client.  +The bv_map() function for that implementation will need to check the characteristics of +the memory and return an error if it does not meet the necessary criteria.

+

Function Sequences

+

To clarify, here are some function sequences and the operations associated with them:

+ + + + + + + + + + + + + + + + + + + + + +
ImplementationFunctionOperation
Abv_blt()map A
+ BLT A
+ unmap A
Abv_blt()map A
+ BLT A
+ unmap A
Bbv_blt()map B
+ BLT B
+ unmap B
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + +
ImplementationFunctionOperation
Abv_map()map A
Abv_blt()BLT A
Abv_blt()BLT A
Abv_unmap()unmap A
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ImplementationFunctionOperation
Abv_map()map A
Bbv_map()map B
Abv_blt()BLT A
Bbv_blt()BLT B
Abv_unmap()unmap A
Bbv_unmap()unmap B
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + +
ImplementationFunctionOperation
Abv_map()map A
Bbv_blt()map B
+ BLT B
Bbv_blt()BLT B
Abv_unmap()unmap A
+ unmap B
+
+
+ NOTE:  Calling bv_map() and + bv_unmap() with the same bvbuffdesc from + different, unsynchronized threads, even (especially) from different implementations, will result in undefined + behavior.  This is similar to calling malloc() and + free() using the same buffer pointer in different, unsynchronized threads.  While this may work + sometimes and for some implementations and combinations of implementations, BLTsville does not provide any + synchronization mechanism to make this safe.  Clients must ensure that these calls are synchronized in cases + where such behavior appears to be necessary.
+
+bv_blt() +

enum bverror bv_blt(struct bvbltparams* bltparams);

+

The main function of BLTsville is bv_blt().  A +bvbltparams structure is passed into bv_blt() to trigger +the desired 2-D operation.

+bv_unmap() +

enum bverror bv_unmap(struct bvbuffdesc* buffdesc);

+

bv_unmap() is used to free implementation resources associated with a buffer.  +Normally, if bv_map() was called for a given buffer, +bv_unmap() should be called as well.

+

For convenience, only one bv_unmap() needs to be called for each buffer, regardless +of how many implementations were used, including multiple calls to bv_map().

+

Also for convenience, bv_unmap() may be called multiple times on the same buffer.  +Note that only the first call will actually free (all) the associated resources.  See the +Function Sequences under bv_map() +for more details.

+

Implementations Only
+
+Implementations must ensure that unmapping of buffers which are in use by asynchronous BLTs are appropriately delayed to +avoid improper access.

+bv_cache() +

enum bverror bv_cache(struct bvcopparams *copparams);

+

bv_cache() provides manual CPU cache control to maintain cache coherence of surfaces +between the CPU and other hardware.  The bvcopparams structure provides the information needed +to properly manipulate the CPU cache.

+

This function is optional.  If this function fails to import, it means the implementation does not provide +it, but bv_map(),  +bv_blt(), and bv_unmap() may still +be used.

+

In general, this function will be provided with BLTsville implementations which utilize 2-D hardware, even though +it manipulates the CPU cache.  This is because most systems require a kernel module to manipulate the cache, and this +is not always practical to include with a user-mode CPU implementation.

+

BEWARE:  Manipulation of the CPU cache is tricky.  Moreover, different CPUs behave differently, so +cache manipulation that works on one device may fail on another.  Also, mismanaged operation of the cache can have +significant impact on overall system performance.  And incorrect manipulation of the cache can cause instability or +crashes.  Please read and understand all of the discussions below before using this function.

+
    +
  1. To avoid system instability, do not perform cache operations on buffers which would not be accessed by BLTsville.
    2. +
  2. For maximum performance, combine adjacent rectangles into one bv_cache() call.  + For example, when BLTing a line of characters, do not issue a bv_cache() call for each + character.  Instead, make one call to bv_cache() which includes all the characters.
    3. +
  3. When using a hardware BLTsville implementation to read data written into a cached surface by the CPU, use the + BVCACHE_CPU_TO_DEVICE operation after the CPU has completed + its operation and before the hardware BLTsville operation is initiated.
    4. +
  4. When using a hardware BLTsville implementation to write data into a cached surface that will be read by the CPU, + use the BVCACHE_CPU_FROM_DEVICE operation after the + hardware BLTsville operation has completed (note this means after the callback if the BLT is asynchronous) and before + the CPU accesses the surface.
    5. +
  5. When using a hardware BLTsville implementation to write data into a cached surface that has been written by the + CPU, using the BVCACHE_CPU_TO_DEVICE operation after the + CPU has completed its operation and before the hardware BLTsville operation is initiated.
      +
    • NOTE:  This cache operation may not be necessary on all hardware, but it is good practice to perform it + anyway.  This operation will be necessary for a CPU with a write allocation policy on the cache, but may not + be necessary for CPUs without such a configuration.
      • +
    • NOTE WELL:  CPU access to a destination buffer is not always initiated by the client.  Buffers + recently allocated may be cleared by the CPU on behalf of the client via the allocation call.  Failure to perform + this operation may result in image corruption even if no further CPU accesses are performed on the surface!
      • +
    +
    6. +
+ + + + +
+

Example:  On one particular device, a surface was allocated using the standard user mode + malloc().  An image was copied into a portion of this surface using a hardware + implementation of BLTsville.  The result was then read by the CPU.

+

Logically, bv_cache() was used to perform a + BVCACHE_CPU_FROM_DEVICE operation after the hardware-based BLTsville operation + completed, but before the CPU read was performed.  However, corruption appeared both inside the image copied, + as well as outside the image!

+

Both corruptions were caused by not realizing that there was a CPU operation (clear) performed on behalf of the + malloc(), for which the proper cache manipulation was not performed.

+

The corruption outside the image was due to data in the cache being invalidated before it reached the memory.  + As mentioned above, buffers allocated are normally cleared by the system.  In this case, since the buffer used + for the surface was configured with a write allocated cache, this meant that not all writes to clear the buffer + were in memory when the  BVCACHE_CPU_FROM_DEVICE + operation was performed.  As a result, the uncommitted data in the cache was invalidated and lost, and the + previous contents of the memory remained for the CPU to read.

+

The corruption inside the image was caused by data in the cache being committed to memory after the hardware + BLT completed, but before the BVCACHE_CPU_FROM_DEVICE + operation was executed.

+

Both corruptions were corrected by performing a BVCACHE_CPU_TO_DEVICE + operation on the destination surface before performing the BLT (item + 5 above), in addition to the BVCACHE_CPU_FROM_DEVICE + operation performed after the BLT (item 3 above).

+
+
+
bvbltparams +

bvbltparams is the central structure in BLTsville.  This structure holds the details +of the BLT being requested by the client.

+

union bvop {
+        unsigned short rop;
+        enum bvblend blend;
+        struct bvfilter *filter;
+};
+
+struct bvinbuff {
+        struct bvbuffdesc *desc;
+        struct bvtileparams *tileparams;
+};
+
+struct bvbltparams {
+        unsigned int structsize;
+
+        char *errdesc;
+
+        unsigned long implementation;
+        unsigned long flags;
+        union bvop op;
+
+        void *colorkey;
+        union bvalpha globalalpha;
+
+        enum bvscalemode scalemode;
+        enum bvdithermode dithermode;
+
+        struct bvbuffdesc *dstdesc;
+        struct bvsurfgeom *dstgeom;
+        struct bvrect dstrect;
+
+        union bvinbuff src1;
+        struct bvsurfgeom *src1geom;
+        struct bvrect src1rect;
+
+        union bvinbuff src2;
+        struct bvsurfgeom *src2geom;
+        struct bvrect src2rect;
+
+        union bvinbuff mask;
+        struct bvsurfgeom *maskgeom;
+        struct bvrect maskrect;
+
+        struct bvrect cliprect;
+
+        unsigned long batchflags;
+        struct bvbatch *batch;
+
+        void (*callbackfn)(struct +bvcallbackerror *err,
+                           +unsigned long callbackdata);
+        unsigned long callbackdata;
+
+        struct bvrect src2auxdstrect;
+        struct bvrect maskauxdstrect;
+};

+bvbltparams.structsize +

unsigned long structsize; /* input */

+

This member is used to allow backwards and forwards compatibility between versions of BLTsville.  It should be set +to the sizeof() the structure by the client or implementation, whichever allocated the +structure.

+

BLTsville is designed to be forwards and backwards compatible between client and library versions.  But this compatibility +would be eliminated if clients chose to check for a specific version of the BLTsville implementations and fail if the specific +version requested was not in place.  So, instead of exporting a version number, BLTsville structures use the +structsize member to indicate the number of bytes in the structure.  This is used +to communicate between the client and implementation which portions of the structure exist.  This effectively bypasses +the concept of a version and focuses on the specifics of what changes need to be considered to maintain compatibility.

+
    +
  1. When an old client calls into a new implementation, that implementation will realize if the client only provides + a subset of an updated structure.  The implementation will handle this and utilize only that information which + has been provided.  New features will be disabled, but functionality will be maintained.
    2. +
  2. When a new client calls into an old implementation, that implementation will ignore the extra members of the structure + and operate in ignorance of them.  If these members are necessary for some new functionality, this will be evident + from other fields in the structure, so that the implementation can gracefully fail.
    3. +
+

If structsize is set to a value that is too small for an implementation, it may return +a BVERR_BLTPARAMS_VERS error.

+

bvbltparams.errdesc

+

char* errdesc; /* output */

+

errdesc is optionally used by implementations to pass a 0-terminated string with additional +debugging information back to clients for debugging purposes.  errdesc is not localized +or otherwise meant to provide information that is displayed to users.

+

bvbltparams.implementation

+

unsigned long implementation; /* input */

+

Multiple implementations of BLTsville can be combined under managers which can distribute the BLT requests to the implementations +based on whatever criteria the manager chooses.  This might include availability of the operation, performance, loading, +or power state.  In such a scenario, the client may need to override or augment the choice made by the manager.  +This field allows that control.

+

Note that this feature is extremely complicated, and more detailed documentation needs to be created to allow +creation of managers and smooth integration by a client.  There are serious issues that must be understood before any +manager can be put into place, such as CPU cache coherence and multiple implementation operation interdependence.  +For now, this field should be set to 0 by clients.

+

If the implementation cannot respond to the implementation flags set, it may return +a BVERR_IMPLEMENTATION error.

+

bvbltparams.flags

+

unsigned long flags; /* input */

+

The flags member provides the baseline of information to +bv_blt() about the type of BLT being requested.

+

To maintain compatibility, unused bits in the flags member should be set to 0.

+

If the flags set are not supported by the implementation, it may return +BVERR_FLAGS, or a more specific error code.

+

bvbltparams.flags - BVFLAG_OP_*

+

The op field of the flags member specifies the type of BLT operation to perform.  +Currently there are three types of BLT operations defined:

+ + + + + + + + + + + + + +
1.BVFLAG_ROP
+

This flag indicates the operation being performed is a raster operation, and the + bvbltparams.op union is treated as rop.  + Raster OPerations are binary operations performed on the bits of the inputs.  See + bvbltparams.op.rop for details.
+
+

+
2. +

BVFLAG_BLEND
+

+

This flag indicates the operation being performed is a blend, and the + bvbltparams.op union is treated as blend.  + Blending involves mixing multiple layers of pixels using the specified equations.  Surrounding pixels are not + involved in blend operations.  See bvbltparams.op.blend + for details.
+
+

+
3.BVFLAG_FILTER
+
+ This flag indicates the operation being performed is a filter, and the bvbltparams.op + union is treated as filter.  Filtering involves mixing + multiple layers of pixels.  Surrounding pixels are involved in filter operations.  See + bvbltparams.op.filter for details.
+
+

bvbltparams.flags - BVFLAG_KEY_SRC/DST

+

The BVFLAG_KEY_SRC and BVFLAG_KEY_DST enable source +and destination color keying, respectively.  When either flag is set, the +colorkey member of bvbltparams +is used.

+

BVFLAG_KEY_SRC and BVFLAG_KEY_DST are mutually exclusive.

+

See bvbltparams.colorkey for details.

+

bvbltparams.flags - BVFLAG_CLIP

+

When BVFLAG_CLIP is set, the cliprect +member of bvbltparams is used by the implementation as a limiting +rectangle on data written to the destination.  See cliprect +for details.

+

bvbltparams.flags - BVFLAG_SRCMASK

+

Normally, the mask is applied at the destination, after all scaling has been completed (including scaling the mask if +necessary).  But some environments require that the mask be applied at the sources, before scaling occurs.  The +BVFLAG_SRCMASK flag requests that the implementation use this method if supported.

+

bvbltparams.flags - BVFLAG_TILE_*

+

Normally, when a source's size does not match the destination, the source is scaled to fill the destination.  But +when the corresponding BVFLAG_TILE_* flag is set, this behavior is modified.

+

First, the source's size specifies a tile (or pattern, or brush) to be used to fill the destination.  This tile +is replicated instead of scaled.

+

The origin of the source's rectangle is used to locate the tile within a larger surface.

+

Second, a bvbuffdesc object is no longer supplied by the client +in the bvbltparams structure.  In its place is a bvtileparams +object.

+

Refer to the bvtileparams structure definition for details.

+

bvbltparams.flags - BVFLAG_HORZ/VERT_FLIP_*

+

These flags indicate that the corresponding image is flipped horizontally or vertically as it is used by the operation.

+

bvbltparams.flags - BVFLAG_SCALE/DITHER_RETURN

+

The scale and dither types can be specified with an implicit type.  The implementation will then convert that internally +to an explicit scale or dither type.  These flags request that the implementation return the explicit type chosen to +the client in the corresponding bvbltparams.scalemode and +bvbltparams.dithermode members.

+

bvbltparams.flags - BVFLAG_ASYNC

+

This flag allows the client to inform the implementation that it can queue the requested BLT and return from +bv_blt() before it has completed.  If this bit is not set, when +the bv_blt() returns, the operation is complete.

+

Normally, a client will also utilize the bvbltparams.callbackfn +and bvbltparams.callbackdata members to receive a notification +when the BLT has completed.

+

NOTE:  Asynchronous BLTs are performed in the order in which they are submitted within an implementation.  +This was done to provide a simple dependency mechanism.  +However, synchronization between implementations must be handled by the client, using the callback mechanism.

+

NOTE:  Since asynchronous BLTs are performed in the order in which they are submitted, it follows +that a synchronized BLT after a set of asynchronous BLTs may be used as synchronization as well.

+

NOTE:  Certain situations may require manual synchronization without an associated BLT.  +Rather than introduce an additional BLTsville function call, the method of handling this will be via a NOP BLT.  To +accomplish a NOP BLT, the client should issue a BLT using the +bvbltparams.op.rop code of 0xAAAA (copy destination to destination), and +with the BVFLAG_ASYNC flag not set.  Alternatively, the NOP BLT may set the +BVFLAG_ASYNC and provide a +bvbltparams.callbackfn.  To facilitate implementations, a valid destination surface should be +specified.

+

Implementations Only
+
+In general, this BLTsville specification has avoided placing any requirement on implementations for specific +operations.  However, in support of this special case, support for these NOP BLTs will need to be an implementation +requirement.

+

bvbltparams.flags - BVFLAG_BATCH_BEGIN/CONTINUE/END

+

These flags are used to control batching of BLTs for two main reasons:

+
    +
  1. To group small, similar BLTs to consolidate overhead.  For example, the BLTs associated with rendering each + character in a word.
    2. +
  2. To group related BLTs, which may allow an implementation to perform a more efficient, but equivalent set of operations.
    3. +
+

See Batching for details.

+

bvbltparams.flags - BVFLAG_SRC2/MASK_AUXDSTRECT

+

These flags are used to indicate that the bvbltparams.src2auxdstrect and bvbltparams.maskauxdstrect are to be used.  +See these entries below for details. These flags are likely to be ignored except for the special case explained below, +so they should be used only when necessary.

+

bvbltparams.op.rop

+

unsigned short op; /* input */

+

When BVFLAG_ROP is set in the +bvbltparams.flags member, the bvbltparams.op +union is treated as rop.  Raster OPerations are binary operations performed on the +bits of the inputs:

+ +

BLTsville's rop element is used to specify a ROP4, but anything from ROP1 up to ROP4 +can be defined using this member:

+ +

NOTE:  +By far the most common ROP used will be 0xCCCC, which indicates a simple copy from source 1 to the destination.

+

The table below is the magic decoder ring:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Mask 1  1  1  1  1  1  1  1  0  0  0  0  0  0  0  0 
Source 2  1  1  1  1  0  0  0  0  1  1  1  1  0  0  0  0 
Source 1  1  1  0  0  1  1  0  0  1  1  0  0  1  1  0  0 
Destination  1  0  1  0  1  0  1  0  1  0  1  0  1  0  1  0 
Raster Operation  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0 
+
+For example, to specify an operation that uses the mask to choose between source 1 and destination (source 1 when mask is +1, destination when mask is 0), a client would calculate the bottom line by parsing each column:
+
+When mask is 1 (the first eight columns), the rop matches the source 1 row.  When +mask is 0 (the last eight columns), the rop matches the destination row.
+
+ + + + + + + + + + + + + + + + + + + + +
Raster Operation  1  1  1  1  0  0  0  0  1  0  1  0  1  0  1  0 
+
+So the rop for this operation would be 0xF0AA.
+
+Here is a list of some commonly used raster operations that have been given names:
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ROP ConstantDescription
BLACKNESS0x0000Set all destination bits to black (0).  Dest = 0
NOTSRCERASE0x1111Dest = ~Src1 & ~Dest = ~(Src1 | Dest)
NOTSRCCOPY0x3333Dest = ~Src1
SRCERASE0x4444Dest = Src1 & ~Dest
DSTINVERT0x5555Invert (NOT) the destination bits.  Dest = ~Dest
PATINVERT0x5A5AXOR with Src2.  Dest = Src2 ^ Dest
SRCINVERT0x6666XOR with Src1.  Dest = Src1 ^ Dest
SRCAND0x8888Dest = Src1 & Dest
NOP0xAAAADest = Dest
MERGEPAINT0xBBBBDest = ~Src1 | Dest
MERGECOPY0xC0C0Dest = Src1 & Src2
SRCCOPY0xCCCCDest = Src1
SRCPAINT0xEEEEOR with Src1.  Dest = Src1 | Dest
PATCOPY0xF0F0Copy source 2 to destination.  Dest = Src2
PATPAINT0xFBFBDest =  ~Src1 | Src2 | Dest
WHITENESS0xFFFFSet all destination bits to white (1).  Dest = 1
+
+bvbltparams.op.blend +

enum bvblend blend; /* input */

+

When BVFLAG_BLEND is set in the +bvbltparams.flags member, the +bvbltparams.op union is treated as a blend.

+

To specify the blend, the client fills in blend with one of the +bvblend values.

+

bvblend is an enumeration assembled from sets of fields.  +The values specified may be extended beyond those that are explicitly defined using the definitions in the +bvblend.h header file.

+

The first 4 bits are the format.  Currently two format groups are defined, but others can be added.  The remainder +of the bits are used as defined by the individual format:

+ + + + + + + + + +
1.BVBLENDDEF_FORMAT_CLASSIC
+
+ The BVBLENDDEF_FORMAT_CLASSIC is meant to handle the classic Porter-Duff equations. + It can also handle the DirectFB blending.
+
+ BVBLENDDEF_FORMAT_CLASSIC is based on the following equations:
+
+

Cd = K1C1 + K2C2
+ Ad = K3A1 + K4A2

+
+ where:
+
+

Cd: destination color
+ C1: source 1 color
+ C2: source 2 color
+ Ad: destination alpha
+ A1: source 1 alpha
+ A2: source 2 alpha
+ K#: one of the constants defined using the bitfields below

+
+ The 28 bits for BVBLENDDEF_FORMAT_CLASSIC are divided into 5 sections.
+
+ The most significant 4 bits are modifiers, used to include additional alpha values from global or remote sources.
+
+ [27] The most significant bit indicates that a remote alpha is to be included in the blend. The format of this is + defined by bvbltparams.maskgeom.format.
+
+ [26] The next bit is reserved.
+
+ [25:24] The next 2 bits are used to indicate that a global alpha is to be included, and what its format is:
+
+

00: no global included
+ 01: global included; bvbltparams.globalalpha.size8 is used (0 -> 255)
+ 10: this value is reserved
+ 11: global included; bvbltparams.flogalalpha.fp is used (0.0 -> 1.0)

+
+ The remaining bits are divided into 4 sections, one to define each of the constants:
+
+ [23:18] - K1
+ [17:12] - K2
+ [11:6] - K3
+ [5:0] - K4
+
+ The format is the same for all 4 constant fields:
+
+ [5:4] The first 2 bits of each field indicates the way in which the other 2 fields are interpreted:
+
+

00: only As: the other two fields contain only As; there should be only one valid A value + between the two fields
+ 01: minimum: the value of the constant is the minimum of the two fields
+ 10: maximum: the value of the constant is the maximum of the two fields
+ 11: only Cs: the other two fields contain only Cs; there should be only one valid C value between the two fields

+
+ [3:2] The middle 2 bits of each field contain the inverse field:
+
+

00: 1-C1 ("don't care" for "only As")
+ 01: 1-A1 ("don't care" for "only Cs")
+ 10: 1-C2 ("don't care" for "only As")
+ 11: 1-A2 ("don't care" for "only Cs")

+
+ [1:0] The last 2 bits if each field contain the normal field:
+
+

00: C1 ("don't care" for "only As")
+ 01: A1 ("don't care" for "only Cs")
+ 10: C2 ("don't care" for "only As")
+ 11: A2 ("don't care" for "only Cs")

+
+ EXCEPTIONS:
+
+ 00 00 00 - The value 00 00 00, which normally would indicate "only As" with two "don't care" fields, is interpreted + as a constant of 0.
+
+ 11 11 11 - The value 11 11 11, which normally would indicate "only Cs" with two "don't care" fields, is interpreted + as a constant of 1.
+
+ Constants
+
+ Put together, these can define portions of the blend equations that can be put together in a variety of ways:
+
+ + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
00 00 00undefined -> zero
00 00 01A1 (preferred)
00 00 10undefined
00 00 11A2 (preferred)
00 01 001-A1 (preferred)
00 01 01undefined
00 01 101-A1 (use 00 01 00)
00 01 11undefined
00 10 00undefined
00 10 01A1 (use 00 00 01)
00 10 10undefined
00 10 11A2 (use 00 00 11)
00 11 001-A2 (preferred)
00 11 01undefined
00 11 101-A2 (use 00 11 00)
00 11 11undefined
+ 		+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
01 00 00min(C1,1-C1)
01 00 01min(A1,1-C1)
01 00 10min(C2,1-C1)
01 00 11min(A2,1-C1)
01 01 00min(C1,1-A1)
01 01 01min(A1,1-A1)
01 01 10min(C2,1-A1)
01 01 11min(A2,1-A1)
01 10 00min(C1,1-C2)
01 10 01min(A1,1-C2)
01 10 10min(C2,1-C2)
01 10 11min(A2,1-C2)
01 11 00min(C1,1-A2)
01 11 01min(A1,1-A2)
01 11 10min(C2,1-A2)
01 11 11min(A2,1-A2)
+ 		+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
10 00 00max(C1,1-C1)
10 00 01max(A1,1-C1)
10 00 10max(C2,1-C1)
10 00 11max(A2,1-C1)
10 01 00max(C1,1-A1)
10 01 01max(A1,1-A1)
10 01 10max(C2,1-A1)
10 01 11max(A2,1-A1)
10 10 00max(C1,1-C2)
10 10 01max(A1,1-C2)
10 10 10max(C2,1-C2)
10 10 11max(A2,1-C2)
10 11 00max(C1,1-A2)
10 11 01max(A1,1-A2)
10 11 10max(C2,1-A2)
10 11 11max(A2,1-A2)
+ 		+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
11 00 00undefined
11 00 011-C1 (use 11 00 11)
11 00 10undefined
11 00 111-C1 (preferred)
11 01 00C1 (use 11 11 00)
11 01 01undefined
11 01 10C2 (use 11 11 10)
11 01 11undefined
11 10 00undefined
11 10 011-C2 (use 11 10 11)
11 10 10undefined
11 10 111-C2 (preferred)
11 11 00C1 (preferred)
11 11 01undefined
11 11 10C2 (preferred)
11 11 11undefined -> one
+
+
+ DirectFB Example
+
+ Putting these together into the proper constants, the blending equations can be built for different APIs.  + Here is how DirectFB would be mapped:
+
+ For DirectFB, the + + SetSrcBlendFunction() and + + SetDstBlendFunction() can specify 121 combinations of blends (11 x 11). It's impractical to specify these combinations + individually. Instead, the settings indicated by each call should be bitwise OR'd to make the proper single value + used in BLTsville.
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 32-bit Binary Value
+ SetSrcBlendFunction()[VendorID] [--K1--]  [--K2--]  [--K3--]  [--K4--]
DSBF_ZERO0000 000000 00 00xx xx xx00 00 00xx xx xx
DSBF_ONE0000 000011 11 11xx xx xx11 11 11xx xx xx
DSBF_SRCCOLOR0000 000011 11 00xx xx xx00 00 01xx xx xx
DSBF_INVSRCCOLOR0000 000011 00 11xx xx xx00 01 00xx xx xx
DSBF_SRCALPHA0000 000000 00 01xx xx xx00 00 01xx xx xx
DSBF_INVSRCALPHA0000 000000 01 00xx xx xx00 01 00xx xx xx
DSBF_DESTCOLOR0000 000011 11 10xx xx xx00 00 11xx xx xx
DSBF_INVDESTCOLOR0000 000011 10 11xx xx xx00 11 00xx xx xx
DSBF_DESTALPHA0000 000000 00 11xx xx xx00 00 11xx xx xx
DSBF_INVDESTALPHA0000 000000 11 00xx xx xx00 11 00xx xx xx
DSBF_SRCALPHASAT0000 000001 11 01xx xx xx11 11 11xx xx xx
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 32-bit Binary Value
+ SetDstBlendFunction()[VendorID] [--K1--]  [--K2--]  [--K3--]  [--K4--]
DSBF_ZERO0000 0000xx xx xx00 00 00xx xx xx00 00 00
DSBF_ONE0000 0000xx xx xx11 11 11xx xx xx11 11 11
DSBF_SRCCOLOR0000 0000xx xx xx11 11 00xx xx xx00 00 01
etc.     
+
+ Porter-Duff
+
+ For Porter-Duff blends, the equations can be more specifically defined. For convenience, these are enumerated in + the bvblend.h header. These enumerations utilize only the local alpha in the equations + as indicated. To use global or remote alpha, these enumerations need to be modified. For example, to include the + global alpha in the Porter-Duff BVBLEND_SRC1OVER blend, the blend could be defined + like this:
+
+
+ + + + + +
params.op.blend =BVBLEND_SRC1OVER +
+ BVBLENDDEF_GLOBAL_UCHAR;
+
+
+ To include the remote alpha, the blend could be defined like this:
+
+
+ + + + + +
params.op.blend =BVBLEND_SRC1OVER +
+ BVBLENDDEF_REMOTE;
+
+
+ And to include both:
+
+
+ + + + + +
params.op.blend =BVBLEND_SRC1OVER +
+ BVBLENDDEF_GLOBAL_UCHAR +
+ BVBLENDDEF_REMOTE;
+
+
+ Note that if the source color formats include local alphas, the local alphas, global alpha, and remote alpha will + be used together.
+
+ Note also that the equations assume the surfaces are premultiplied. So if the surface formats indicate that they + are not premultiplied, the alpha multiplication of each color is done prior to using the surface values in the equations.
+
+ For example, BVBLEND_SRC1OVER specifies the equations:
+ + + + +
Cd = C1 + (1 - A1)C2
+ Ad = A1 + (1 - A1)A2
+
+ If the format of surface 1 is non-premultiplied, the equations are modified to include the multiplication explicitly:
+
+ + + + +
Cd = A1C1 + (1 - A1)C2
+ Ad = A1 + (1 - A1)A2
+
+ Likewise, if the format of surface 2 is non-premultiplied, the equations are modified for this:
+
+ + + + +
+
+ Cd = C1 + (1 - A1)A2C2
+ Ad = A1 + (1 - A1)A2
+
+
+ When including global or remote alphas, these values are used to modify the source 1 value values before being used + in the blend equation:
+
+ + + + + + + + +
C1 = AgC1
+ A1 = AgA1		-or-C1 = ArC1
+ A1 = ArA1		-or-C1 = ArAgC1
+ A1 = ArAgA1
+
+
2.BVBLENDDEF_FORMAT_ESSENTIAL
+
+ The essential blending equations are based on the blending equations in common image manipulation programs.
BVBLEND_LIGHTEN      max(src1, src2)
+BVBLEND_DARKEN       min(src1, src2)
+BVBLEND_MULTIPLY     (src1 * src2) / 255
+BVBLEND_AVERAGE      (src1 + src2) / 2
+BVBLEND_ADD          src1 + src2 (saturated)
+BVBLEND_SUBTRACT     src1 + src2 - 255 (saturated)
+BVBLEND_DIFFERENCE   abs(src - src2)
+BVBLEND_NEGATION     255 - abs(255 - src1 - src2)
+BVBLEND_SCREEN       255 - (((255 - src1) * (255 - src2)) / 256)
+BVBLEND_EXCLUSION    src1 + src2 - ((2 * src1 * src2) / 255)
+BVBLEND_OVERLAY      (src2 < 128) ? (2 * src1 * src2 / 255) : (255 - 2 * (255 - src1) * (255 - src2) / 255)
+BVBLEND_SOFT_LIGHT   (src2 < 128) ? (2 * ((src1 >> 1) + 64)) * ((float)src2 / 255) : (255 - (2 * (255 - ((src1 >> 1) + 64)) * (float)(255 - src2) / 255))
+BVBLEND_HARD_LIGHT   (src1 < 128) ? (2 * src2 * src1 / 255) : (255 - 2 * (255 - src2) * (255 - src1) / 255)
+BVBLEND_COLOR_DODGE  (src2 == 255) ? src2 : min(255, ((src1 << 8) / (255 - src2))
+BVBLEND_COLOR_BURN   (src2 == 0) ? src2 : max(0, (255 - ((255 - src1) << 8 ) / src2))))
+BVBLEND_LINEAR_DODGE same as BVBLEND_ADD
+BVBLEND_LINEAR_BURN  same as BVBLEND_SUBTRACT
+BVBLEND_LINEAR_LIGHT (src2 < 128) ? LINEAR_BURN(src1,(2 * src2)) : LINEAR_DODGE(src1,(2 * (src2 - 128)))
+BVBLEND_VIVID_LIGHT  (src2 < 128) ? COLOR_BURN(src1,(2 * src2)) : COLOR_DODGE(src1,(2 * (src2 - 128))))
+BVBLEND_PIN_LIGHT    (src2 < 128) ? DARKEN(src1,(2 * src2)) : LIGHTEN(src1,(2 * (src2 - 128)))
+BVBLEND_HARD_MIX     (VIVID_LIGHT(src1, src2) < 128) ? 0 : 255
+BVBLEND_REFLECT      (src2 == 255) ? src2 : min(255, (src1 * src1 / (255 - src2)))
+BVBLEND_GLOW         (src1 == 255) ? src1 : min(255, (src2 * src2 / (255 - src1)))
+BVBLEND_PHOENIX      min(src1, src2) - max(src1, src2) + 255)
+BVBLEND_ALPHA        alf * src1 + (1 - alf) * src2)
+
+bvbltparams.op.filter +

struct bvfilter *filter; /* input */

+

When BVFLAG_FILTER is set in the +bvbltparams.flags member, the +bvbltparams.op union is treated as a filter.

+

To specify the filter, the client fills in filter with one of the +bvfilter values.

+

These values will be extended as general filter types are requested.

+bvbltparams.colorkey +

void *colorkey; /* input */

+

When either BVFLAG_KEY_SRC or +BVFLAG_KEY_DST is set in the +bvbltparams.flags member, colorkey points to a single pixel +used as the color key.

+

The format of this pixel matches the surface being keyed.  i.e. +src1geom.format is the format of the color key if BVFLAG_KEY_SRC is set, or +dst.format is the format of the color key if +BVFLAG_KEY_DST is set.

+

Subsampled formats do not currently support color keying.

+

bvbltparams.globalalpha

+

union bvalpha globalalpha; /* input */

+

When BVFLAG_BLEND is set in the +bvbltparams.flags, and when the +blend chosen requires it, globalalpha is used to provide an +alpha blending value for the entire operation.  The type is also dependent on the +blend chosen.

+

For the BVBLENDDEF_FORMAT_CLASSIC blend types, if the BVBLENDDEF_GLOBAL_MASK +field is not 0, this field is used.  Currently BVBLENDDEF_FORMAT_CLASSIC provides +for an 8-bit (unsigned character / byte) format designated by BVBLENDDEF_GLOBAL_UCHAR as +well as a 32-bit floating point format designated by BVBLENDDEF_GLOBAL_FLOAT.

+

bvbltparams.scalemode

+

enum bvscalemode scalemode; /* input/output */

+

This member allows the client to specify the type of scaling to be used.  The enumeration begins with 8 bits indicating +the vendor.  The remaining bits are defined by the vendor.  BVSCALEDEF_VENDOR_ALL +and BVSCALEDEF_VENDOR_GENERAL are shared by all implementations.

+

BVSCALEDEF_VENDOR_ALL can be used to specify an implicit scale type.  This type +is converted to an explicit type by the implementation:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BVSCALE_FASTESTThe fastest method of scaling available is used.  This may include nearest neighbor.  The value of + this enumeration is purposely 0, and is the default scale type.  No implementation will return an error for + this setting.
BVSCALE_FASTEST_NOT_NEAREST_NEIGHBORThe fastest method of scaling available that is not nearest neighbor is used.  This may include an alternative + point sample technique.
BVSCALE_FASTEST_POINT_SAMPLEThe fastest method of scaling using a point sample technique.
BVSCALE_FASTEST_INTERPOLATEDThe fastest method of scaling using an interpolation technique.
BVSCALE_FASTEST_PHOTOThe fastest method of scaling appropriate for photographs is used.  This may include nearest neighbor.  + No implementation will return an error for this setting.
BVSCALE_FASTEST_DRAWINGThe fastest method of scaling appropriate for drawings is used.  This may include nearest neighbor.  + No implementation will return an error for this setting.
BVSCALE_GOODA scaling technique is chosen that may be higher quality than the BVSCALE_FASTEST + choice.  This may include nearest neighbor.  No implementation will return an error for this setting.
BVSCALE_GOOD_POINT_SAMPLEA point sample scaling technique is chosen that may be higher quality than the BVSCALE_FASTEST_POINT_SAMPLE + choice.  This may include nearest neighbor.
BVSCALE_GOOD_INTERPOLATEDAn interpolated scaling technique is chosen that may be higher quality than the BVSCALE_FASTEST_INTERPOLATED + choice.
BVSCALE_GOOD_PHOTOA scaling technique appropriate for photographs is chosen that may be higher quality than the + BVSCALE_FASTEST_PHOTO choice.  This may include nearest neighbor.  No + implementation will return an error for this setting.
BVSCALE_GOOD_DRAWINGA scaling technique appropriate for drawings is chosen that may be higher quality than the + BVSCALE_FASTEST_DRAWING choice.  This may include nearest neighbor.  + No implementation will return an error for this setting.
BVSCALE_BETTERA scaling technique is chosen that may be higher quality than the BVSCALE_GOOD + choice.  This may include nearest neighbor.  No implementation will return an error for this setting.
BVSCALE_BETTER_POINT_SAMPLEA point sample scaling technique is chosen that may be higher quality than the BVSCALE_GOOD_POINT_SAMPLE + choice.  This may include nearest neighbor.
BVSCALE_BETTER_INTERPOLATEDAn interpolated scaling technique is chosen that may be higher quality than the BVSCALE_GOOD_INTERPOLATED + choice.
BVSCALE_BETTER_PHOTOA scaling technique appropriate for photographs is chosen that may be higher quality than the + BVSCALE_GOOD_PHOTO choice.  This may include nearest neighbor.  No implementation + will return an error for this setting.
BVSCALE_BETTER_DRAWINGA scaling technique appropriate for drawings is chosen that may be higher quality than the + BVSCALE_GOOD_DRAWING choice.  This may include nearest neighbor.  No + implementation will return an error for this setting.
BVSCALE_BESTThe highest quality scaling technique is chosen.  This may include nearest neighbor.  No implementation + will return an error for this setting.
BVSCALE_BEST_POINT_SAMPLEThe highest quality point sample technique is chosen.
BVSCALE_BEST_INTERPOLATEDThe highest quality interpolated scaling technique is chosen.
BVSCALE_BEST_PHOTOThe highest quality scaling technique appropriate for photographs is chosen.  This may include nearest + neighbor.  No implementation will return an error for this setting.
BVSCALE_BEST_DRAWINGThe highest quality scaling technique appropriate for drawings is chosen.  This may include nearest neighbor.  + No implementation will return an error for this setting.
+
+BVSCALEDEF_VENDOR_GENERAL can be used to specify one of the shared explicit scale types.  +At this point, only a limited number of explicit scale types are defined:
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BVSCALE_NEAREST_NEIGHBORThis is a point sample scaling technique where the resampled destination pixel is set to the value of the closest + source pixel.
BVSCALE_BILINEARThis is an interpolated scaling technique where the resampled destination pixel is set to a value linearly interpolated + in two dimensions from the four closest source pixels.
BVSCALE_BICUBICThis is an interpolated scaling technique where the resampled destination pixel is set to a value calculated + using cubic interpolation in two dimensions.
BVSCALE_3x3_TAP 
BVSCALE_5x5_TAP 
BVSCALE_7x7_TAP 
BVSCALE_9x9_TAP 
+

If the client wants to know the explicit type chosen by a given implementation, it can set +BVFLAG_SCALE_RETURN in the bvbltparams.flags member, and the +explicit scale type is returned in the scalemode member.

+

NOTE:  Extending the BVSCALEDEF_VENDOR_GENERAL scale types or obtaining +a vendor ID can be accomplished by submitting a patch.

+

bvbltparams.dithermode

+

enum bvdithermode dithermode; /* input/output */

+

This member allows the client to specify the type of dithering to be used, when the output format has fewer bits of depth +than the internal calculation.  The enumeration begins with 8 bits indicating the vendor.  The remaining bits +are defined by the vendor.  BVDITHERDEF_VENDOR_ALL and BVDITHERDEF_VENDOR_GENERAL +are shared by all implementations.

+

BVDITHERDEF_VENDOR_ALL can be used to specify an implicit dither type.  This type +is converted to an explicit type by the implementation:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BVDITHER_FASTESTThe fastest method of dithering available is used.  This may include no dithering (truncation).  The + value of this enumeration is purposely 0, and is the default dither type.  No implementation will return an + error for this setting.
BVDITHER_FASTEST_ONThe fastest method of dithering available is used.  This will not include no dithering.
BVDITHER_FASTEST_RANDOMThe fastest method of dithering using a random technique.
BVDITHER_FASTEST_ORDEREDThe fastest method of dithering using an ordered diffusion technique.
BVDITHER_FASTEST_DIFFUSEDThe fastest method of dithering using an error diffusion technique.
BVDITHER_FASTEST_PHOTOThe fastest method of dithering appropriate for photographs is used.  This may include no dithering.  + No implementation will return an error for this setting.
BVDITHER_FASTEST_DRAWINGThe fastest method of dithering appropriate for drawings is used.  This may include no dithering.  + No implementation will return an error for this setting.
BVDITHER_GOODA dithering technique is chosen that may be higher quality than the BVDITHER_FASTEST + choice.  This may include no dithering.  No implementation will return an error for this setting.
BVDITHER_GOOD_ONAny dithering technique available is used.  This will not include no dithering.  This may be higher + quality than BVDITHER_FASTEST_ON.
BVDITHER_GOOD_RANDOMA random dithering technique is chosen that may be higher quality than the BVDITHER_FASTEST_RANDOM + choice.
BVDITHER_GOOD_ORDEREDAn ordered dithering technique is chosen that may be higher quality than the BVDITHER_FASTEST_ORDERED + choice.
BVDITHER_GOOD_DIFFUSEDA diffused dithering technique is chosen that may be higher quality than the BVDITHER_FASTEST_DIFFUSED + choice.
BVDITHER_GOOD_PHOTOA dithering technique appropriate for photographs is chosen that may be higher quality than the + BVDITHER_FASTEST_PHOTO choice.  This may include no dithering.  No implementation + will return an error for this setting.
BVDITHER_GOOD_DRAWINGA dithering technique appropriate for drawings is chosen that may be higher quality than the + BVDITHER_FASTEST_DRAWING choice.  This may include no dithering.  No + implementation will return an error for this setting.
BVDITHER_BETTERA dithering technique is chosen that may be higher quality than the BVDITHER_GOOD + choice.  This may include no dithering.  No implementation will return an error for this setting.
BVDITHER_BETTER_ONAny dithering technique available is used.  This will not include no dithering.  This may be higher + quality than BVDITHER_GOOD_ON.
BVDITHER_BETTER_RANDOMA random dithering technique is chosen that may be higher quality than the BVDITHER_GOOD_RANDOM + choice.
BVDITHER_BETTER_ORDEREDAn ordered dithering technique is chosen that may be higher quality than the BVDITHER_GOOD_ORDERED + choice.
BVDITHER_BETTER_DIFFUSEDA diffused dithering technique is chosen that may be higher quality than the BVDITHER_GOOD_DIFFUSED + choice.
BVDITHER_BETTER_PHOTOA scaling technique appropriate for photographs is chosen that may be higher quality than the + BVSCALE_GOOD_PHOTO choice.  No implementation will return an error for this + setting.
BVDITHER_BETTER_DRAWINGA scaling technique appropriate for drawings is chosen that may be higher quality than the + BVSCALE_GOOD_DRAWING choice.  No implementation will return an error for this + setting.
BVDITHER_BESTThe highest quality dithering technique is chosen.  This may include no dithering.  No implementation + will return an error for this setting.
BVDITHER_BEST_ONAny dithering technique available is used.  This will not include no dithering.  This may be higher + quality than BVDITHER_BEST_ON.
BVDITHER_BEST_RANDOMThe highest quality random dithering technique is chosen.
BVDITHER_BEST_ORDEREDThe highest quality ordered dithering technique is chosen.
BVDITHER_BEST_DIFFUSEDThe highest quality diffused dithering technique is chosen.
BVDITHER_BEST_PHOTOThe highest quality dithering technique appropriate for photographs is chosen.  This may include no dithering.  + No implementation will return an error for this setting.
BVDITHER_BEST_DRAWINGThe highest quality dithering technique appropriate for drawings is chosen.  This may include no dithering.  + No implementation will return an error for this setting.
+
+BVDITHERDEF_VENDOR_GENERAL can be used to specify one of the shared explicit dithering +types.  At this point, only a limited number of explicit dither types are defined:
+
+ + + + + + + + + + + + + + + + + +
BVDITHER_NONENo dithering is performed.  Internal pixel component values are truncated to the destination component + bit depth.
BVDITHER_ORDERED_2x2 
BVDITHER_ORDERED_4x4 
BVDITHER_ORDERED_2x2_4x42x2 ordered dither is used for components with the lowest bit reduction.  4x4 ordered dither is used for + the components with the highest bit reduction.  (E.g. RGB24 to RGB565 will use 2x2 ordered dither for the green + component and 4x4 ordered dither for the red and blue components.)
+

If the client wants to know the explicit type chosen by a given implementation, it can set +BVFLAG_DITHER_RETURN in the bvbltparams.flags member, and the +explicit scale type is returned in the dithermode member.

+

NOTE:  Extending the BVDITHERDEF_VENDOR_GENERAL scale types or obtaining +a vendor ID can be accomplished by submitting a patch.

+

bvbltparams.dstdesc

+

struct bvbuffdesc *dstdesc;

+

dstdesc is used to specify the destination buffer.  If the buffer has not been +mapped with a call to bv_map(), +bv_blt() will map the buffer as necessary to perform the BLT and then unmap afterwards.  +See bvbuffdesc for details.

+

bvbltparams.dstgeom

+

struct bvsurfgeom *dstgeom;

+

dstgeom is used to specify the geometry of the surface contained in the destination +buffer.  See bvsurfgeom for details.

+

bvbltparams.dstrect

+

struct bvrect dstrect;

+

dstrect is used to specify the destination rectangle to receive the BLT.  This +rectangle is clipped by bvbltparams.cliprect when +BVFLAG_CLIP is set in the +bvbltparams.flags member.

+

bvbltparams.src1/src2/mask.desc

+

struct bvbuffdesc *src1.desc;
+struct bvbuffdesc *src2.desc;
+struct bvbuffdesc *mask.desc;

+

These members are used to identify the buffer for the source1, source2, and mask surfaces when the associated +BVFLAG_TILE_* flag is not set.  The buffer is the memory in which the surface lies.  +See the bvbltparams.src1/src2/maskgeom for the format and layout/geometry +of the surface.

+

NOTE WELL:  Clients should never change the value of a +bvbuffdesc structure while a buffer is mapped.

+

bvbltparams.src1/src2/mask.tileparams

+

struct bvtileparams *src1.tileparams;
+struct bvtileparams *src2.tileparams;
+struct bvtileparams *mask.tileparams;

+

These members are used to identify the buffer for the source1, source2, and mask surfaces when the associated +BVFLAG_TILE_* flag is set.  The buffer is the memory in which the surface lies.  +This differs from the src1/src2/mask.desc identity by providing +more information needed for tiling and by not requiring mapping (for hardware implementations that support tiling, the tile +data is usually moved into an on-chip cache).

+

bvbltparams.src1/src2/maskgeom

+

struct bvsurfgeom src1geom;
+struct bvsurfgeom src2geom;
+struct bvsurfgeom maskgeom;

+

These members describe the format and layout/geometry of their respective surfaces.  Separating +bvsurfgeom from the +bvbuffdesc allows easy use of buffers for multiple geometries without remapping.  +See bvsurfgeom and +bvbuffdesc for details.

+

bbvbltparams.src1/src2/maskrect

+

struct bvrect src1rect;
+struct bvrect src2rect;
+struct bvrect maskrect;

+

These members specify the rectangle from which data is read for the BLT.  These rectangles are clipped by a scaled +version of the bvbltparams.cliprect  (scaling is based on +the relationship between them and the bvbltparams.dstrect) when +BVFLAG_CLIP is set in the +bvbltparams.flags member.

+ + + + +
+

Example:

+ src1rect = (0, 0) - (400 x 200)
+ dstrect = (0, 0) - (800 x 600)
+ cliprect = (10, 30) - (300 x 300)

The scaling ratio of the + dstrect to the src1rect is + (800/400,  600/300) or (2, 3).  Using this, the effective source 1 clipping rectangle becomes (10/2, 30/3) + - (300/2 x 300/3) or (5, 10) - (150 x 100).

+
+

This approach allows fractional clipping at the source using a method which is simpler to implement than fractional coordinates.

+

NOTE:  In BLTsville, reading outside the source rectangle is forbidden.  So scaling algorithms +which require pixels around a particular source pixel must utilize boundary techniques (mirror, repeat, clamp, etc.) at +the edges of the source rectangle.  However, if the clipping rectangle, when translated back to the source rectangle, +leaves space between it and the source rectangle, pixels outside the clipped region may be accessed by the implementation.

+

bvbltparams.cliprect

+

struct bvrect cliprect;

+

cliprect is used to specify a rectangle that limits what region of the destination is +written.  This is most useful for scaling operations, where the necessary scaling factor will not allow translation +of the destination rectangle back to the source on an integer pixel boundary.

+

NOTE:  If cliprect exceeds the destination surface, the behavior is +undefined.

+

For example, if the goal is to show a 640 x 480 video on a 1920 x 1080 screen, the video would be stretched to 1440 x +1080 to maintain the proper aspect ratio.  So the relevant rectangles would be:

+ + + + + + + + + +
src1rectdstrect
(0, 0) - 640 x 480(240, 0) - 1440 x 1080
+

However, to handle a 640 x 480 pop-up window that appears centered on the screen, in front of the video, the single BLT +may be broken into four smaller BLTs pieced around the popup.  These rectangles would need to be:

+ + + + + + + + + + + + + + + + + + + + + +
src1rectdstrect
(0, 0) - 640 x 133.333...(240, 0) - 1440 x 300
(0, 133.333...) - 284.444... x 213.333...(240, 300) - 400 x 480
(568.888..., 133.333...) - 284.444... x 213.333...(1280, 300) - 400 x 480
(0, 346.666...) - 640 x 133.333...(240, 780) - 1440 x 300
+

Since this is a scaling factor of 2.25x, translating the required destination rectangles back to the source results in +non-integer coordinates and dimensions, as illustrated above.  And adjusting the source rectangles to the nearest integer +values will result in visible discontinuities at the boundaries between the rectangles.

+

Instead, using the cliprect, this situation can be handled more easily:

+ + + + + + + + + + + + + + + + + + + + + + + + + + +
src1rectdstrectcliprect
(0, 0) - 640 x 480(240, 0) - 1440 x 1080(240, 0) - 1440 x 300
(0, 0) - 640 x 480(240, 0) - 1440 x 1080(240, 300) - 400 x 480
(0, 0) - 640 x 480(240, 0) - 1440 x 1080(1280, 300) - 400 x 480
(0, 0) - 640 x 480(240, 0) - 1440 x 1080(240, 780) - 1440 x 300
+

bvbltparams.batchflags

+

unsigned long batchflags;

+

batchflags are used by the client as a hint to indicate to the implementation which +parameters are changing between successive BLTs of a batch.  The flags may be used when the +bvbltparams.flags has +BVFLAG_BATCH_CONTINUE or +BVFLAG_BATCH_END set.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BVBATCH_OPindicates that the operation type (BVFLAG_ROP, + BVFLAG_BLEND, + BVFLAG_FILTER, etc.) has changed.
BVBATCH_KEYindicates that the bvbltparams.colorkey or the color + key mode (BVFLAG_KEY_SRC/BVFLAG_KEY_DST) + has changed.
BVBATCH_MISCFLAGSindicates that bvbltparams.flags other than the operation, + color key, or clip flag have changes.
BVBATCH_ALPHAindicates that bvbltparams.globalalpha or global + alpha type has changed.
BVBATCH_DITHERindicates that bvbltparams.dithermode has changed.
BVBATCH_SCALEindicates that bvbltparams.scalemode has changed.
BVBATCH_DSTindicates that the destination surface (bvbltparams.dstdesc, + bvbltparams.dstgeom ,or + bvbltparams.dstrect) has changed.
BVBATCH_SRC1 indicates that the source 1 surface (bvbltparams.src1.desc + or bvbltparams.src1.tileparams, or + bvbltparams.src1geom) has changed.
BVBATCH_SRC2 indicates that the source 2 surface (bvbltparams.src2.desc + or bvbltparams.src2.tileparams, or + bvbltparams.src2geom) has changed.
BVBATCH_MASK indicates that the mask surface (bvbltparams.mask.desc + or bvbltparams.mask.tileparams, or + bvbltparams.maskgeom) has changed.
BVBATCH_DSTRECT_ORIGINindicates that bvbltparams.dstrect.left or + top has changed.
BVBATCH_DSTRECT_SIZEindicates that the bvbltparams.dstrect.width or + height has changed.
BVBATCH_SRC1RECT_ORIGINindicates that bvbltparams.src1rect.left or + top has changed.
BVBATCH_SRC1RECT_SIZEindicates that the bvbltparams.src1rect.width or + height has changed.
BVBATCH_SRC2RECT_ORIGINindicates that bvbltparams.src2rect.left or + top has changed.
BVBATCH_SRC2RECT_SIZEindicates that the bvbltparams.src2rect.width or + height has changed.
BVBATCH_MASKRECT_ORIGINindicates that bvbltparams.maskrect.left or + top has changed.
BVBATCH_MASKRECT_SIZEindicates that the bvbltparams.maskrect.width or + height has changed.
BVBATCH_CLIPRECT_ORIGINindicates that bvbltparams.cliprect.left or + top has changed.
BVBATCH_CLIPRECT_SIZEindicates that the bvbltparams.cliprect.width or + height has changed.
BVBATCH_TILE_SRC1indicates that the bvbltparams.src1.tileparams + has changed.
BVBATCH_TILE_SRC2indicates that the bvbltparams.src2.tileparams + has changed.
BVBATCH_TILE_MASKindicates that the bvbltparams.mask.tileparams + has changed.
BVBATCH_ENDNOPis a special flag used with BVFLAG_BATCH_END, for + clients that do not have information that a batch is ending until after the last BLT has been issued.  When + this flag is set, no BLT is done, but the batch is ended.
+

NOTE:  These flags are hints, and may be used or not by a BLTsville implementation.  So if +bvbltparams members are changed between BLTs in a batch, but +the bvbltparams.batchflags member is not correctly updated, the resulting behavior on different +implementations will not be consistent.

+

bvbltparams.batch

+

struct bvbatch *batch;

+

This member is used as a batch handle, so that multiple batches can be under construction at the same time.

+

bvbltparams.callbackfn

+

void (*callbackfn)(struct bvcallbackerror *err, unsigned long +callbackdata);

+

This member is a pointer to a client-supplied function which is called by the implementation when +BVFLAG_ASYNC is set and the BLT is complete.  If this +member is NULL, no callback is performed.  When there is no error, the err +parameter will be set to 0;

+

NOTE:  This function can be called before the +bv_blt() call has returned.

+

bvbltparams.callbackdata

+

unsigned long callbackdata;

+

This member is used as the parameter passed back by the bvbltparams.callbackfn.  +This can be anything from an identifying index to a pointer used by the client.

+

bvbltparams.src2/maskauxdstrect

+

struct bvrect src2auxdstrect;
+struct bvrect maskauxdstrect;

+

These two members are used only when the associated +BVFLAG_SRC2/MASK_AUXDSTRECT flags are +set.  They are only necessary (and should only be used) in the case where scaling of the inputs differs and the +entire source images are not being used.  bvbltparams.dstrect is always +used to specify the destination of source 1 image.  When the associated flags are set, these two members are used +to specify the destination of the source 2 and mask images, instead of +bvbltparams.dstrect.

+

These flags must be used with the BVFLAG_CLIP flag.  +And if the resulting clipped destination does not include all enabled destination rectangles, the results are undefined.

+
Example:  We have two images that we want to merge and view on an 854x480 LCD panel.  One +image is a small background image with 16:9 (64x36) aspect ratio that we want to stretch to fill the screen.  +The other is a standard definition 720x480 (4:3 aspect ratio) image with transparency we want to blend on top of our +background.
+ + + + + +
+ + + + + + + +
(shown actual size)
+ 		+ + + + + + + +
(shown 1/2x; not adjusted for aspect ratio)
+
+We want to blend the second image onto the center of the first, scaling both, so that it looks like this:
+ + + + + + + +
(shown 1/2x)
+The screen is effectively a 16:9 aspect ratio (we can ignore the fraction of a pixel here), which matches our +background image.  So the background image just needs to be scaled from 64x36 to 854x480.
+
+ However, since the second image has a 4:3 aspect ratio, it will not cover the entire background image if we want to + maintain its aspect ratio.  Our second image is not as wide as our 16:9 image, which means it's height will match + the screen height, but the width will be smaller.  Since the screen is 480 lines (pixels) high, to maintain our 4:3 + aspect ratio, our second image will need to be 640 pixels wide (4 * 480 / 3).  So it will need to be scaled from + 720x480 to 640x480.
+
+As we mentioned, we would like to center the 640 pixel image on our 854 pixel wide screen.  That means the left edge +of the image will be at pixel 107 ( (854 - 640) / 2 ).  So the leftmost 107 columns of pixels will just be a copy +of the left portion of the background image.  Likewise, the rightmost 107 columns will be a copy of the right +portion of the background image.  Only the middle section should be blended.
+ + + + + + + +
(shown 1/2x)
+ The side two BLTs are quite easy with BLTsville, by using the clipping rectangle:
+
+
+bvbltparams.flags = BVFLAG_ROP | BVFLAG_CLIP;
+bvbltparams.op.rop = 0xCCCC;
+
+bvbltparams.src1.desc = bkgnddesc;
+bvbltparams.src1geom = bkgndgeom;
+bvbltparams.src1rect.left = 0;
+bvbltparams.src1rect.top = 0;
+bvbltparams.src1width = 64;
+bvbltparams.src1height = 36;
+
+bvbltparams.dstdesc = screendesc;
+bvbltparams.dstgeom = screengeom;
+bvbltparams.dstrect.left = 0;
+bvbltparams.dstrect.top = 0;
+bvbltparams.dstrect.width = 854;
+bvbltparams.dstrect.height = 480;
+
+bvbltparams.cliprect.left = 0;
+bvbltparams.cliprect.top = 0;
+bvbltparams.cliprect.width = 107;
+bvbltparams.cliprect.height = 480;
+bv_blt(&bvbltparams);
+
+bvbltparams.cliprect.left += 640;
+bv_blt(&bvbltparams);
+
+ However, if we try the same approach with the middle BLT, we run into problems:
+
+
+bvbltparams.flags = BVFLAG_BLEND | BVFLAG_CLIP;
+bvbltparams.op.blend = BVBLEND_SRC1OVER;
+
+bvbltparams.src1.desc = foregnddesc;
+bvbltparams.src1geom = foregndgeom;
+bvbltparams.src1rect.left = 0;
+bvbltparams.src1rect.top = 0;
+bvbltparams.src1rect.width = 720;
+bvbltparams.src1rect.height = 480;
+
+bvbltparams.src2.desc = bkgnddesc;
+bvbltparams.src2geom = bkgndgeom;
+bvbltparams.src2rect.left = 0;
+bvbltparams.src2rect.top = 0;
+bvbltparams.src2width = 64;
+bvbltparams.src2height = 36;
+
+bvbltparams.cliprect.left = 107;
+bvbltparams.cliprect.top = 0;
+bvbltparams.cliprect.width = 640;
+bvbltparams.cliprect.height = 480;
+bv_blt(&bvbltparams);
+ + + + + + + +
(shown 1/2x)
+ The result is that the foreground image is stretched horizontally.  That's because the scaling factor is + derived from the source (1) rectangle and the destination rectangle, which is the full width of the screen.  + Since we were also scaling the background, we set the destination rectangle to cover the screen, as we did in the + previous two BLTs.
+
+ The edges of our foreground image are also cropped, since we were only modifying the middle of the screen.
+
+ What if we change the destination rectangle?
+
+
+bvbltparams.dstrect.left = 107;
+bvbltparams.dstrect.top = 0;
+bvbltparams.dstrect.width = 640;
+bvbltparams.dstrect.height = 480;
+
+bv_blt(&bvbltparams);
+ + + + + + + +
(shown 1/2x)
+ Here we get the proper scaling of the foreground image, but the background image is scaled improperly.
+
+ What if we adjust the source rectangles?  +For our purposes, we want all of the foreground image, but we only need the middle of the background image.  So + we can manually specify the middle of the background image by modifying the source 2 rectangle:
+
+
+bvbltparams.src2rect.left = 107 * 64 / 854;
+bvbltparams.src2rect.width = 640 * 64 / 854;

+Nice, but what are those values?
+
+
+107 * 1280 / 854 = 8.0187...
+640 * 1280 / 854 = 47.9625...
+
+
+ In BLTsville, all rectangle parameters are expressed in integers (this also allows BLTsville to be used in the + kernels where floating point variables are not allowed).  The clipping rectangle then handles introducing the + necessary source pixel subdivision (by translating the clipping rectangle back to the source rectangle in the + implementation).  So what happens if we actually do use these values as integers?
+
+
+bvbltparams.src2rect.left = 8;
+bvbltparams.src2rect.top = 0;
+bvbltparams.src2rect.width = 47;
+bvbltparams.src2height = 36;
+
+bv_blt(&bvbltparams);
+
+ And this is what we get:
+ + + + + + + +
(shown 1/2x)
+ Closer, but not quite.  Rounding the values above to integers still results in visible errors at the boundaries + between the middle and the side BLTs (the one on the right is a bit more visible at this reduced size, but if you + view the full image, you'll see the left one as well), because the left edge and scaling (and right edge as a + result) don't match the alignment and scaling done for the BLTs on the side. 

NOTE:  This artifact is not always obvious in still images.  + The images here were chosen to make the artifacts obvious in this documentation.  But even if the static images + appear correct, movement of the images (e.g. moving the foreground image across the background image) or changes in + the blending (e.g. fading the foreground image out and finally removing it), will show these less obvious + discrepancies.

This is actually what the + clipping rectangle is for.  It's meant to allow us to always specify the source and destination rectangles the + same, but move the clipping window around on the destination to get just the pixels we want.  That way the + scaling and alignment area always the same.  Unfortunately, for this special case, we really need a way to + specify different scaling factors for the different inputs.  The src2auxdstrect (and maskauxdstrect, when + needed) have been added to provide this capability.
+
+ Here is how this set of BLTs can be done:
+
+
+bvbltparams.flags = BVFLAG_ROP | BVFLAG_CLIP;
+bvbltparams.op.rop = 0xCCCC;
+
+bvbltparams.src1.desc = bkgnddesc;
+bvbltparams.src1geom = bkgndgeom;
+bvbltparams.src1rect.left = 0;
+bvbltparams.src1rect.top = 0;
+bvbltparams.src1width = 64;
+bvbltparams.src1height = 36;
+
+bvbltparams.dstdesc = screendesc;
+bvbltparams.dstgeom = screengeom;
+bvbltparams.dstrect.left = 0;
+bvbltparams.dstrect.top = 0;
+bvbltparams.dstrect.width = 854;
+bvbltparams.dstrect.height = 480;
+
+bvbltparams.cliprect.left = 0;
+bvbltparams.cliprect.top = 0;
+bvbltparams.cliprect.width = 107;
+bvbltparams.cliprect.height = 480;
+bv_blt(&bvbltparams);
+
+bvbltparams.cliprect.left += 640;
+bv_blt(&bvbltparams);
+
+bvbltparams.flags = BVFLAG_BLEND | BVFLAG_CLIP | BVFLAG_SRC2_AUXDSTRECT;
+bvbltparams.op.blend = BVBLEND_SRC1OVER;
+
+bvbltparams.src1.desc = foregnddesc;
+bvbltparams.src1geom = foregndgeom;
+bvbltparams.src1rect.left = 0;
+bvbltparams.src1rect.top = 0;
+bvbltparams.src1rect.width = 720;
+bvbltparams.src1rect.height = 480;
+
+bvbltparams.dstrect.left = 107;
+bvbltparams.dstrect.top = 0;
+bvbltparams.dstrect.width = 640;
+bvbltparams.dstrect.height = 480;
+
+bvbltparams.src2.desc = bkgnddesc;
+bvbltparams.src2geom = bkgndgeom;
+bvbltparams.src2rect.left = 0;
+bvbltparams.src2rect.top = 0;
+bvbltparams.src2width = 64;
+bvbltparams.src2height = 36;
+
+bvbltparams.src2auxdstrect.left = 0;
+bvbltparams.src2auxdstrect.top = 0;
+bvbltparams.src2auxdstrect.width = 854;
+bvbltparams.src2auxdstrect.height = 480;
+
+bvbltparams.cliprect.left = 107;
+bvbltparams.cliprect.top = 0;
+bvbltparams.cliprect.width = 640;
+bvbltparams.cliprect.height = 480;
+bv_blt(&bvbltparams);
+
+Using this approach, we get the desired output:
+ + + + + + + +
(shown 1/2x)
+ It may also be clear that in that last BLT, the clip rectangle isn't really necessary.  This is good, because + it frees up the clipping rectangle to be used to further subdivide the image if necessary (e.g. if partially + occluded).
+
+
+
+

bvrect

+

struct bvrect {
+    int left;
+    int top;
+    unsigned int width;
+    unsigned int height;
+};

+

bvrect.left

+

int left;

+

This member indicates the left edge of the rectangle, measured in pixels from the left edge of the surface.  Note +that this value can be negative, indicating that the rectangle begins before the left edge +of the surface.  However, this is only allowed when a rectangle is clipped to the surface.  If, after clipping, +the left edge of the rectangle is still negative, this is an error.

+

bvrect.top

+

int top;

+

This member indicates the top edge of the rectangle, measured in lines of +bvbuffdesc.virtstride bytes from the top edge of the surface.  +Note that this value can be negative, indicating that the rectangle begins before the top +edge of the surface.  However, this is only allowed when a rectangle is clipped to the surface.  If, after clipping, +the top edge of the rectangle is still negative, this is an error.

+

bvrect.width

+

unsigned int width;

+

This member indicates the width of the rectangle, measured in pixels.  Note that this value +cannot be negative.  (Horizontal flipping is indicated using the +BVFLAG_HORZ_FLIP_* flags.)  The value of this member +may exceed the width of the associated surface.  However, this is only allowed when a rectangle is clipped to the surface.  +If, after clipping, the right edge of the rectangle still exceeds the width of the surface, this is an error.

+

bvrect.height

+

unsigned int height;

+

This member indicates the height of the rectangle, measured in lines of +bvbuffdesc.virtstride bytes.  Note that this value +cannot be negative.  (Vertical flipping is indicated using the +BVFLAG_VERT_FLIP_* flags.)  The value of this member +may exceed the width of the associated surface.  However, this is only allowed when a rectangle is clipped to the surface.  +If, after clipping, the right edge of the rectangle still exceeds the height of the surface, this is an error.

+
+bvcopparams +

bvcopparams is used to define the cache operation to be performed by +bv_cache().

+

struct bvcopparams {
+        unsigned int structsize;
+        struct bvbuffdesc *desc;
+        struct bvsurfgeom *geom;
+        struct bvrect     *rect;
+        enum bvcacheop  cacheop;
+};

+bvcopparams.structsize +

unsigned long structsize; /* input */

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvcopparams.desc

+

struct bvbuffdesc *desc;

+

This member points to the bvbuffdesc of the surface for which +the cache is being manipulated.  This buffer should have been mapped with a call to +bv_map().

+

NOTE:  Implementations may choose to dynamically map the surface as with +bv_blt(), however in many systems, this will not function properly due to dynamic paging which +can occur when a surface is not locked.

+

bvcopparams.geom

+

struct bvsurfgeom *geom;

+

This member points to the bvsurfgeom of the surface for which +the cache is being manipulated.

+

bvcopparams.rect

+

struct bvrect *rect;

+

This member points to the bvrect describing the rectangle of the +surface which is being manipulated.

+

bvcopparams.cacheop

+

enum bvcacheop cacheop;

+

This member specifies the cache operation to be performed.  It is an enumeration from the following list:

+ + + + + + + + + + + + + +
BVCACHE_BIDIRECTIONAL(This usually performs a cache flush operation.)
BVCACHE_CPU_TO_DEVICEPerforms the appropriate cache operation to ensure data can be transferred correctly when it was written with + the CPU, but will be read by the 2-D device.  (This is usually a cache clean operation.)
BVCACHE_CPU_FROM_DEVICEPerforms the appropriate cache operation to ensure data can be transferred correctly when it was written by + the 2-D device, but will be read by the CPU.  (This is usually a cache invalidate operation.)
+
+
+

bvbuffdesc

+

This structure is used in conjunction with a bvsurfgeom structure +to specify the characteristics of a graphic surface.  This structure specifies the memory buffer itself.

+

struct bvbuffdesc {
+        unsigned int structsize;
+        void *virtaddr;
+        unsigned long length;
+        struct bvbuffmap *map;
+        enum bvauxtype auxtype;
+        void *auxptr;
+};

+

bvbuffdesc.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvbuffdesc.virtaddr

+

void *virtaddr;

+

This member is used to indicate the CPU virtual address of the start of the buffer.  This value must be provided +unless the auxtype/auxptr +members below are used.  At that time, this member is optional, and the +auxptr usually has higher priority than this member.

+

Implementations Only
+
+Note that this is always the beginning of the buffer.  This means that if the +bvsurfgeom.virtstride is negative, or the bvsurfgeom.orientation +does not normalize to 0º  (i.e. orientation % 360 != 0), implementations may need +to use a modified version of virtaddr internally to operate correctly.

+

bvbuffdesc.length

+

unsigned long length;

+

This member specifies the length of the buffer in bytes.

+

NOTE:  When used with a bvsurfgeom structure, +length should be greater than or equal to +bvsurfgeom.height * bvsurfgeom.virtstride.

+

bvbuffdesc.map

+

struct bvbuffmap *map;

+

This member is used by the implementations and should NEVER be manipulated +by the client.  When the bvbuffdesc structure is created, this member should be set +to 0, indicating that no implementations have mapped the buffer.  After a buffer has been mapped using a call to +bv_map(), this member should be left as-is by clients.  (The +implementation will set this back to 0 before returning from bv_unmap().)

+

Implementations Only
+
+This member points to a linked list of bvbuffmap structures associated +with the buffer.  Each bvbuffmap is added to the list as +the buffer is mapped by a given implementation.  This may be done with an explicit call to +bv_map(), or implicitly with a call to +bv_blt(), after a call to bv_map() from +a different implementation.
+
+Implementations should not assume that the first entry in the list is their +bvbuffmap.  Instead, implementations should compare the +bv_unmap() pointer in the structure to their own function address.

+

bvbuffdesc.auxtype

+

enum bvauxtype auxtype;

+

This member is used to identify the type of additional information about the buffer provided by +auxptr.  Currently no values are defined for the +user mode interface, so it should be initialized to 0 or BVAT_NONE.  See the +Kernel Mode Interface for details on the values defined for the kernel mode interface.

+

bvbuffdesc.auxptr

+

void *auxptr;

+

This member is used to point to additional information about the buffer.  The type of this pointer is determined +by the auxtype value.  Currently there are no types defined +for the user mode interface, so this member is ignored.  See the Kernel Mode Interface +for details on the types defined for the kernel mode interface.

+

+ + + + +
+

Implementations Only

+

bvbuffmap

+

This structure is used from the bvbuffdesc.map member to allow implementations to associate their own data with + a buffer.

+

struct bvbuffmap {
+        unsigned int structsize;
+        BVFN_UNMAP bv_unmap;
+        unsigned long handle;
+        struct bvbuffmap *nextmap;
+ };

+

bvbuffmap.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See + bvbltparams.structsize for an explanation.)

+

bvbuffmap.bv_unmap

+

BVFN_UNMAP bv_unmap;

+

This member holds the pointer to the bv_unmap() function + of the implementation associated with the bvbuffmap structure.  It serves + to allow implementations to identify their bvbuffmap structure in the linked list, + as well as to allow implementations to call each other's bv_unmap() + calls from their own.

+

bvbuffmap.handle

+

unsigned long handle;

+

This member is used to hold an implementation-specific piece of data.

+

bvbuffmap.nextmap

+

struct bvbuffmap *nextmap;

+

This member holds a pointer to the next bvbuffmap structure in the linked list.  If this member is 0, there + are no more entries in the list.
+
+ NOTE:  The Linux/Android Kernel Mode Interface differs slightly from this structure.  + Refer to the Kernel Mode Interface section for details.

+
+
+
+

bvsurfgeom

+

This structure is used in conjunction with a bvbuffdesc structure +to specify the characteristics of a graphic surface.  This structure specifies the surface geometric characteristics.

+

NOTE:  This structure was separated from bvbuffdesc +to afford much flexibility to the client.  Using the same bvbuffdesc +structure with different bvsurfgeom structures or using the same +bvsurfgeom structure with different bvbuffdesc +structures may be of benefit.  See the examples at the bottom of this section.

+

struct bvcopparams {
+        unsigned int structsize;
+        enum ocdformat format;
+        unsigned int width;
+        unsigned int height;
+        int orientation;
+        long virtstride;
+        enum ocdformat paletteformat;
+        void *palette;
+};

+

bvsurfgeom.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvsurfgeom.format

+

enum ocdformat format;

+

This member specifies the format of the surface using the Open Color format +Definitions (OCD).

+

bvsurfgeom.width

+

unsigned int width;

+

This member specifies the width of the surface in pixels.  This size does not have to be equivalent to the +virtstride size.

+

Implementations Only
+
+Implementations should never assume that width is equivalent to +virtstride.

+

bvsurfgeom.height

+

unsigned int height;

+

This member specifies the height of the surface in lines of +virtstride width.

+

bvsurfgeom.orientation

+

int orientation;

+

This member specifies the orientation or angle of the surface in degrees.  Since BLTsville is designed only to specify +orthogonal rectangles, this value must be a multiple of 90º.  This value may be negative.  +(Extending BLTsville to handle non-orthogonal rectangles may be considered if there is sufficient interest.)

+

Implementations Only
+
+Implementations should normalize orientation angles.  For example, a client that sets the orientation to -450º should +behave as if the value of 270º were specified.

+

bvsurfgeom.virtstride

+

long virtstride;

+

This member specifies the horizontal stride of the surface in bytes for an unrotated surface.  The stride represents +the number of bytes needed to move from one pixel to the pixel immediately below it.  This value +may be negative.

+

NOTE:  This means the orientation does not affect the +virtstride.  However, rotating a surface usually results in a different configuration +(i.e. width), which will affect the +virtstride.  For example, a 320 x 240 x 32 bpp 0º surface might have a +virtstride of 1280 bytes (320 pixels/line * 32 bits/pixel / 8 bits/byte).  When the +orientation is set to 180º, the virtstride would be the same.  But when the orientation +is set to 90º (or 270º), the virtstride would most likely need to be set to 960 bytes (240 +pixels/line * 32 bits/pixel / 8 bits/byte).

+

Implementations Only
+
+Implementations that do not support a negative virtstride must compensate using whatever +mechanism is appropriate for the implementation.  For example, using a vertical flipping/mirroring setting.

+

NOTE:  The virtstride name must be maintained for backwards compatibility.  +However, no situation should arise where the client would need to provide two different strides for the virtual and physical +views of a surface (there are situations where a physical stride will need to be available within the implementation, but +the client will not be the one to supply it), so physstride will most likely never be needed.  However, when +a client provides a physical description of the buffer (see the Kernel Mode Interface +section below), the virtstride entry should be used to provide the physical stride.

+

bvsurfgeom.paletteformat

+

enum ocdformat paletteformat;

+

This member specifies the format of the palette supplied via the +palette member for palettized formats using the +Open Color format Definitions (OCD).

+

bvsurfgeom.palette

+

void *palette;

+

This member points to a palette used for palettized formats.  The format of the palette is specified by the +paletteformat member.  Palettes are packed based +on their container size:

+ + + + + + + + + + + + + + + + + + + + + +
Palette FormatPalette Layout (byte address)Palette Layout (little endian)
OCDFMT_xRGB12n/a + + + + + + + + + + + + + + + + + +
*(((unsigned short *)palette) + 0)0xFrgb
*(((unsigned short *)palette) + 1)0xFrgb
......
*(((unsigned short *)palette) + n - 1)0xFrgb
+
OCDFMT_RGB24 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
*(((unsigned char *)palette) + 0)red0
*(((unsigned char *)palette) + 1)green0
*(((unsigned char *)palette) + 2)blue0
*(((unsigned char *)palette) + 3)red1
*(((unsigned char *)palette) + 4)green1
*(((unsigned char *)palette) + 5)blue1
... 
*(((unsigned char *)palette) + (3 * n) - 3)redNm1
*(((unsigned char *)palette) + (3 * n) - 2)greenNm1
*(((unsigned char *)palette) + (3 * n) - 1)blueNm1
+ 		n/a
OCDFMT_RGBx24 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
*(((unsigned char *)palette) + 0)red0
*(((unsigned char *)palette) + 1)green0
*(((unsigned char *)palette) + 2)blue0
*(((unsigned char *)palette) + 3)0xFF
*(((unsigned char *)palette) + 4)red1
*(((unsigned char *)palette) + 5)green1
*(((unsigned char *)palette) + 6)blue1
*(((unsigned char *)palette) + 7)0xFF
... 
*(((unsigned char *)palette) + (4 * n) - 4)redNm1
*(((unsigned char *)palette) + (4 * n) - 3)greenNm1
*(((unsigned char *)palette) + (4 * n) - 2)blueNm1
*(((unsigned char *)palette) + (4 * n) - 1)0xFF
+ 		+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
*(((unsigned long *)palette) + 0)0xFFbbggrr
+
  
  
  
*(((unsigned long *)palette) + 1)
+ 		0xFFbbggrr
+
  
  
  
... 
*(((unsigned long *)palette) + n - 1)|
+ 		0xFFbbggrr
+
  
  
  
+
+

NOTE:  Use of subsampled formats for paletteformat is currently undefined.

+

Examples

+

Mixing and matching bvbuffdesc and +bvsurfgeom structures provides maximum flexibility for a client.

+ + + + + + + +
Example:  Using two different bvsurfgeom structures with + the same bvbuffdesc structure allows in-place format + conversion:
+

...
+ // Convert premultiplied image to non-premultiplied in place
+ struct + bvbltparams parms;
+ ...
+ struct + bvbuffdesc buff;
+ ...
+ struct + bvsurfgeom srcgeom, dstgeom;
+ ...
+ srcgeom.format = OCDFMT_RGBA24;
+ dstgeom.format = OCDFMT_nRGBA24;
+ ...
+ parms.src1.desc = &buff;
+ parms.src1geom = &srcgeom;
+ parms.dstdesc = &buff;
+ parms.dstgeom = &dstgeom;
+ ...
+ bv_blt(&parms);
+ ...

+
+
+ + + + + + + +
Example:  Using three different bvbuffdesc + structures with the same bvsurfgeom structure reduces code and copy errors:
+

...
+ // Blend two images of the same size
+ struct + bvbltparams parms;
+ ...
+ struct + bvbuffdesc src1buff, src2buff, dstbuff;
+ ...
+ struct + bvsurfgeom geom;
+ ...
+ parms.src1.desc = &src1buff;
+ parms.src1geom = &geom;
+ parms.src2.desc = &src2buff;
+ parms.src2geom = &geom;
+ parms.dstdesc = &dstbuff;
+ parms.dstgeom = &dstgeom;
+ ...
+ bv_blt(&parms);
+ ...

+
+
+
+

bvtileparams

+

This structure is used to define the parameters necessary to use a small image as a tile or block that will be repeated +when used as a source.  This structure is used in conjunction with the associated +bvsurfgeom and the associated bvrect +to determine the operation that is performed.

+

struct bvcopparams {
+        unsigned int structsize;
+        unsigned long flags;
+        void *virtaddr;
+        int dstleft;
+        int dsttop;
+        unsigned int srcwidth;
+        unsigned int srcheight;
+};

+

bvtileparams.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvtileparams.flags

+

unsigned long flags;

+

This member specifies some additional information for the tiling operation.  It can be composed as the binary OR +of one selection for each edge (left, top, right, and bottom) from the following flags:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BVTILE_LEFT_REPEATindicates that the tile is repeated to the left of the destination alignment location.
BVTILE_TOP_REPEATindicates that the tile is repeated above the destination alignment location.
BVTILE_RIGHT_REPEATindicates that the tile is repeated to the right of the destination alignment location.
BVTILE_BOTTOM_REPEATindicates that the tile is repeated below the destination alignment location.
BVTILE_LEFT_MIRRORindicates that the tile is mirrored to the left of the destination alignment location.
BVTILE_TOP_MIRRORindicates that the tile is mirrored above the destination alignment location.
BVTILE_RIGHT_MIRRORindicates that the tile is mirrored to the right of the destination alignment location.
BVTILE_BOTTOM_MIRRORindicates that the tile is mirrored below the destination alignment location.
+

bvtileparams.virtaddr

+

void *virtaddr;

+

This member is used to indicate the CPU virtual address of the start of the buffer.

+

Implementations Only
+
+Note that this is always the beginning of the buffer.  This means that if the +bvsurfgeom.virtstride is negative, or the bvsurfgeom.orientation +does not normalize to 0º  (i.e. orientation % 360 != 0), implementations may need +to use a modified version of virtaddr internally to operate correctly.

+

bvtileparams.dstleft

+

int dstleft;

+

This member is used to designate the left edge of the location of the tile in the destination for alignment purposes +(alignment location).  Note that the bvrect of the destination +specifies the region which is filled by the tile.

+

bvtileparams.dsttop

+

int dsttop;

+

This member is used to designate the top edge of the location of the tile in the destination for alignment purposes (alignment +location).  Note that the bvrect of the destination specifies +the region which is filled by the tile.

+

bvtileparams.srcwidth

+

unsigned int srcwidth;

+

This member is used to designate the width of the source for purposes of scaling.  The relationship between this +field and the bvrect.width of the associated source surface +determines the horizontal scaling factor.

+

bvtileparams.srcheight

+

unsigned int srcheight;

+

This member is used to designate the height of the source for purposes of scaling.  The relationship between this +field and the bvrect.height of the associated source surface +determines the vertical scaling factor.

+
+

bvcallbackerror

+

This structure is used to provide error information to the client of a BLT that failed within an asynchronous operation.  +The errors will be limited to those that occur within the implementation.

+

NOTE:  Parameter errors should never be returned in this structure.  These should have been returned +to the client before the BLT was ever initiated.

+

struct bvcallbackerror {
+        unsigned int structsize;
+        enum bverror error;
+        char *errdesc;
+};

+

bvcallbackerror.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvcallbackerror.error

+

enum bverror error;

+

This member is used to indicate the error encountered.  In general, these will be error like these:

+ + + + + + + + + + + + + +
BVERR_OP_FAILEDThe operation failed for unspecified reasons.  The destination buffer was not modified.
BVERR_OP_INCOMPLETEThe operation only partially completed.  The destination buffer is in an undefined state.
BVERR_MEMORY_ERRORThe operation resulted in a memory error, most likely due to an attempt to access invalid memory.  The + destination buffer is in an undefined state.
+

bvcallbackerror.errdesc

+

char *errdesc;

+

errdesc is optionally used by implementations to pass a 0-terminated string with additional +debugging information back to clients for debugging purposes.  errdesc is not localized +or otherwise meant to provide information that is displayed to users.

+
+

Batching

+

Batching is the single most powerful feature in BLTsville.  It is used for two major purposes:

+
    +
  1. To group similar BLTs which use most of the same parameters so that they can be handled more efficiently by the + implementation.
    2. +
  2. To group BLTs that should go together so that implementations can use special features that go beyond what seems + to be expressed by the BLTsville API.
    3. +
+

NOTE:  It is important to realize that BLTs batched together may be done in +any order, and in fact may not even be done in the way specified.  This includes the BLTs being done as they +are submitted, or no operations performed until the batch submission is completed with +BVFLAG_BATCH_END.  This means the client must not rely on intermediate +results within a batch.

+

NOTE:  Because BLTs can be performed in a variety of ways, callbacks for individual BLTs would have +no consistent meaning.  So, when batching is mixed with BVFLAG_ASYNC, +only the callback for the last BLT occurs.

+

NOTE:  Since implementations can perform batched BLTs in a variety of ways, even synchronous batched +BLTs can be effectively asynchronous.  Therefore, only the last BLT determines the synchronicity of the entire batch.  +i.e. the BVFLAG_ASYNC flag is only heeded when combined with +BVFLAG_BATCH_END.

+

NOTE: Failure during the performance of a batch (different from an error on submission--indicated by the +contents of the bvcallbackerror structure) will result in an unknown +state for all destination buffers.  Do not assume that a given implementation's state in this case represents the state +which will be encountered for a different implementation.

+

NOTE: Because of the indeterminate nature of the execution of a batch of BLTs, a "batch abort" would not +result in a known state either.  As stated above, a given implementation may have already performed earlier BLTs in +a batch as the batch is submitted.  So errors encountered during the submission of a batch must be handled by the client, +and then the batch must be terminated normally using BVFLAG_BATCH_END.

+

Batches For Grouping Similar BLTs

+

Often, groups of similar BLTs are performed, with changes to only a few parameters.  Some implementations have the +ability to re-use previous settings, coupled with these changes, to perform new BLTs.

+

One good example of this in in rendering text, similar to that you are reading now.  In most systems, a glyph cache +is maintained to hold the characters of a given font, rasterized with the specific characteristics desired (e.g. bold, italics, +etc.).  Each font in the glyph cache is normally created using a font rasterization engine from a vector-based font, +such as FreeType.  This technology allows fonts to be described in terms of curves and lines instead of pixels, which +means they can be created as needed, in any size desirable.

+ + + + +
  !"#$%&'()*+'-./0123456789:;<=>?
+ @ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_
+ `abcdefghijklmnopqrstuvwxyz{|}~
+

Then, when a character needs to be rendered, it is copied from the pre-rendered glyph cache.  This is much more +efficient than performing the font rasterization from the vector description each time a character is used.

+

With some hardware implementations, the setup to trigger the copy of these characters from the glyph cache to the target +surface can be quite significant, when compared to the number of pixels actually affected.  For example, each character +might consist of something on the order of  10 x 14, or about 140 pixels.  Programming a typical hardware BLTer +may require tens of commands for each character.

+

But note that each of these BLTs differs by only a few parameters.  Specifically, once the source and destination +surfaces have been specified, and the operation described, only the source and destination rectangles change between BLTs. +To alleviate much of this overhead, most implementations will allow the configuration of a previous BLT to be used again, +with only those parameters which change provided for the subsequent BLTs.

+

BLTsville provides access to this capability via the batch mechanism.

+

For rendering a word using a monospaced font like this, the client might construct the batch like this:

+

struct bvbuffdesc screendesc = {sizeof(struct bvbuffdesc}, 0};
+struct bvsurfgeom screengeom = {sizeof(struct bvsurfgeom), 0};
+struct bvbuffdesc glyphcachedesc = {sizeof(struct bvbuffdesc), 0};
+struct bvsurfgeom glyphcachegeom = {sizeof(struct bvsurfgeom), 0};
+struct bvtileparams solidcolortileparams = {sizeof(struct bvtileparams), 0};
+struct bvbuffgeom solidcolorgeom = {sizeof(struct bvsurfgeom), 0};
+
+struct bvbltparams bltparams = {sizeof(struct bvbltparams), 0};
+
+int charsperline = 32;
+int fontwidth = 10;
+int fontheight = 14;
+int i = 0;
+
+screendesc.virtaddr = screenaddr;
+screendesc.length = screenstride * screenheight;
+screengeom.format = OCDFMT_RGB24;
+screengeom.width = screenwidth;
+screengeom.height = screenheight;
+screengeom.virtstride = screenstride;
+
+glyphcachedesc.virtaddr = glyphcacheaddr;
+glyphcachedesc.length = glyphcachestride * glyphcacheheight;
+glyphcachegeom.format = OCDFMT_ALPHA8;
+glyphcachegeom.width = glyphcachewidth;
+glyphcachegeom.height = glyphcacheheight;
+glyphcachegeom.virtstride = glyphstride;
+
+solidcolortileparams.virtaddr = &solidcolor;
+solidcolortileparams.srcwidth = 1;
+solidcolortileparams.srcheight = 1;
+solidcolorgeom.format = OCDFMT_RGB24;
+
+bltparams.flags = BVFLAG_BLEND | BVFLAG_SRC1_TILED | BVFLAG_BATCH_BEGIN;
+bltparams.op.blend = BVBLEND_SRCOVER + BVBLENDDEF_REMOTE;
+bltparams.dstdesc = &screendesc;
+bltparams.dstgeom = &screengeom;
+bltparams.src1.tileparams = &solidcolortileparams;
+bltparams.src1geom = &solidcolorgeom;
+bltparams.src2.desc = &screendesc;
+bltparams.src2geom = &screengeom;
+bltparams.mask.desc = &glyphcachedesc;
+bltparams.maskgeom = &glyphcachegeom;
+
+bltparams.dstrect.left = bltparams.src2rect.left = screenrect.left;
+bltparams.dstrect.top = bltparams.src2rect.top = screenrect.top;
+
+bltparams.maskrect.width = bltparams.dstrect.width = bltparams.src2rect.width = fontwidth;
+bltparams.maskrect.height = bltparams.dstrect.height = bltparams.src2rect.height = fontheight;
+
+bltparams.maskrect.left = ((text[i] - ' ') % charsperline) * fontwidth;
+bltparams.maskrect.top = ((text[i] - ' ') / charsperline) * fontheight;
+
+bv_blt(&bltparams);
+
+i++;
+if(i < textlen)
+{
+  bltparams.flags = (bltparams.flags & ~BVFLAG_BATCH_MASK) | BVFLAG_BATCH_CONTINUE;
+  bltparams.batchflags = BVBATCH_DSTRECT_ORIGIN | BVBATCH_SRC2RECT_ORIGIN | BVBATCH_MASKRECT_ORIGIN;
+
+  do
+  {
+    bltparams.dstrect.left += fontwidth;
+    bltparams.src2rect.left = bltparams.dstrect.left;
+
+    bltparams.maskrect.left = ((text[i] - ' ') % charsperline) * fontwidth;
+    bltparams.maskrect.top = ((text[i] - ' ') / charsperline) * fontheight;
+
+    bv_blt(&bltparams);
+
+    i++;
+  }while(i < textlen);
+}
+
+bltparams.flags = (bltparams.flags & ~BVFLAG_BATCH_MASK) | BVFLAG_BATCH_END;
+bltparams.batchflags = BVBATCH_ENDNOP;
+
+bv_blt(&bltparams);

+

NOTE:  bvbltparams.batchflags is just a hit.  Not all implementations support deltas in +batching, so clients must not change the values of members of +bvbltparams (or structures it +references) between BLTs.  These values may be used.

+

Batches For Special Feature BLTs

+

Enabling special features of some implementations is a special challenge.  But BLTsville is up the task.

+

For example, perhaps an implementation is capable of blending four layers at the same time.  But BLTsville only allows +blending to be specified using two layers at a time.  How can this be accomplished?

+

The most prevalent blending reference used is the Porter-Duff +whitepaper, which specifies blending of two sources (A and B).  So any N-source blend (N > 2) would require the blends to be +specified as a grouping of N - 1 two-source blends in order to utilize the +Porter-Duff equations.  That's how such a blend is specified in BLTsville:

+

bltparams.dstrect.width = bltparams.src1rect.width = bltparams.src2rect.width = dstgeom.width;
+bltparams.dstrect.height = bltparams.src1rect.height = bltparams.src2rect.height = dstgeom.height;
+
+bltparams.flags = BVFLAG_BLEND | BVFLAG_BATCH_BEGIN;
+bltparams.op.blend = BVBLEND_SRCOVER;
+bltparams.dstdesc = &dstdesc;
+bltparams.dstgeom = &dstgeom;
+bltparams.src1.desc = &src1desc;
+bltparams.src1geom = &src1geom;
+bltparams.src2.desc = &src2desc;
+bltparams.src2geom = &src2geom;
+
+bv_blt(&bltparams);
+
+bltparams.src1.desc = &src3desc;
+bltparams.src1geom = &src3geom;
+bltparams.dstdesc = &dstdesc;
+bltparams.dstgeom = &dstgeom;
+
+bltparams.flags = (bltparams.flags & ~BVFLAG_BATCH_MASK) | BVFLAG_BATCH_CONTINUE;
+bltparams.batch = BVBATCH_SRC1 | BVBATCH_SRC2;
+
+bv_blt(&bltparams);
+
+bltparams.src1.desc = &src4desc;
+bltparams.src1geom = &src4geom;
+
+bltparams.flags = (bltparams.flags & ~BVFLAG_BATCH_MASK) | BVFLAG_BATCH_END;
+bltparams.batch = BVBATCH_SRC1;
+
+bv_blt(&bltparams);

+

The driver for an implementation that can perform this pair of operations as one BLT would be tasked with recognizing +that the batch contained BLTs which can be combined.

+

The fantastic thing about this approach is that an implementation without the ability to blend N sources in one pass would perform +the blends separately, but the result would be identical.  Moreover, implementations with the ability to combine +different numbers of operations would likewise produce the same results, even they they used a different number of +internal steps.  Here's an example:

+ + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Number of
+ Layers to
+ Blend		BLTsville
+ Operations		Implementation
+ Capable of
+ Blending One
+ Source with a
+ Destination
+ (2 inputs)		Implementation
+ Capable of
+ Blending Two
+ Sources to a
+ Destination
+ (2 inputs)		Implementation
+ Capable of
+ Blending Four
+ Sources to a
+ Destination
+ (4 inputs)		Implementation
+ Capable of
+ Blending Eight
+ Sources with
+ a Destination
+ (5 inputs)
2A over B => OB => O
+ A over O => O		A over B => OA over B => OA over B => O
3B over C => O
+ A over O => O		C => O
+ B over O => O
+ A over O => O		B over C => O
+ A over O => O		A over B over C => OA over B over C => O
4C over D => O
+ B over O => O
+ A over O => O		D => O
+ C over O => O
+ B over O => O
+ A over O => O		 C over D => O
+ B over O => O
+ A over O => O		 A over B over C over D => O A over B over C over D => O
5D over E => O
+ C over O => O
+ B over O => O
+ A over O => O		E => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		D over E => O
+ C over O => O
+ B over O => O
+ A over O => O		D over E => O
+ A over B over C over O => O		E => O
+ A over B over C over D over O => O
6E over F => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		F => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		E over F => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		D over E over F => O
+ A over B over C over O => O		E over F => O
+ A over B over C over D over O => O
7F over G => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		G => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		F over G => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		D over E over F over G => O
+ A over B over C over O => O		E over F over G => O
+ A over B over C over D over O => O
8G over H => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		H => O
+ G over O => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		G over H => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		G over H => O
+ D over E over F over O => O
+ A over B over C over O => O		E over F over G over H => O
+ A over B over C over D over O => O
9H over I => O
+ G over O => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		I => O
+ H over O => O
+ G over O => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		H over I => O
+ G over O => O
+ F over O => O
+ E over O => O
+ D over O => O
+ C over O => O
+ B over O => O
+ A over O => O		G over H over I => O
+ D over E over F over O => O
+ A over B over C over O => O		I => O
+ E over F over G over H over O => O
+ A over B over C over D over O => O
+
Comparison of batched BLTsville calls with internal operations, based on implementation capabilities. +
+

NOTE: As mentioned above a batch of BLTs may be serviced in any number of ways.  In this example, the +destination buffer may be used for intermediate results, so it is important that this buffer not be used during the batch--i.e. +as a displayed buffer.

+
+

Where to Start

+

(Note that error checking is omitted in all the examples below for clarity.)

+

1.  Clients begin by opening one or more BLTsville implementations dynamically.  The specific method of doing +this is dependent on the operating system.  For example, Linux might do this like this:

+

struct bltsvillelib
+{
+  char* name;
+  void* handle;
+  BVFN_MAP bv_map;
+  BVFN_BLT bv_blt;
+  BVFN_UNMAP bv_unmap;
+};
+
+struct bltsville bvlib[] =
+{
+  { "libbltsville_cpu.so", 0 },
+  { "libbltsville_2d.so", 0 }
+};
+const int NUMBVLIBS = sizeof(bvlib) / sizeof(struct bltsvillelib);
+
+for(int i = 0; i < NUMLIBS; i++)
+{
+  bvlib[i].handle = dlopen(bvlib[i].name, RTLD_LOCAL | RTLD_LAZY);
+  bvlib[i].bv_map = (BVFN_MAP)dlsym(bvlib[i].handle, "bv_map");
+  bvlib[i].bv_blt = (BVFN_BLT)dlsym(bvlib[i].handle, "bv_blt");
+  bvlib[i].bv_unmap = (BVFN_BLT)dlsym(bvlib[i].handle, "bv_unmap");
+}
+

+

2.  Clients then need to create a bvbuffdesc object for +each buffer to be accessed in BLTsville:

+ + + + + + +
+

struct bvbuffdesc buff =
+  {sizeof(struct bvbuffdesc), 0};
+
+ buff.virtaddr = buffptr;
+ buff.length = bufflength;

+ 		 or  +

struct bvbuffdesc buff;
+
+ memset(&buff, 0, sizeof(buff));
+ buff.structsize = sizeof(buff);
+ buff.virtaddr = buffptr;
+ buff.length = bufflength;

+
+

Note that the client must ensure that the map element and any additional members in +bvbuffdesc are initialized to 0.

+

3.  Next the buffer can be mapped to give the hardware implementations a chance to associate any necessary resources +with the buffer:

+ + + + + + + + +
+

/* do nothing */

+ 		 or  +

bvlib[0].bv_map(&buff);

+ 		 or  +

for(int i = 0; i < NUMLIBS; i++)
+ {
+  if(bvlib[i].bv_map)
+    bvlib[i].bv_map(&buff);
+ }

+
+
+ + + + + + + + + + + + + +
a. This step is actually optional, as indicated above.  However, if the client does not explicitly call + bv_map(), the mapping must be done by the implementation + to associate the necessary resources with the buffer.  So this mapping must be done later, when + bv_blt() is called.  Additionally, since the client + did not call bv_map(), it is unlikely that the client will + call bv_unmap() to allow the implementation to free the + resources associated with the buffer.  So the implementation will internally unmap the resources after completing + the BLT.  This means that the mapping and unmapping overhead will be encountered on every call to + bv_blt().
+
+ In general, the CPU implementations have (almost) no overhead associated with mapping and unmapping.  So opting + not to make the bv_map() call for CPU implementations is + likely to have negligible difference in bv_blt() performance.
+
b. Calling bv_map() once for each buffer is enough to tell + the implementations that the client can be trusted to call bv_unmap() + when work with the buffer is complete, as indicated above.  It does not matter which implementation's + bv_map() is called.  However, that implementation is + the only one which will perform the mapping immediately.  All other implementations will perform a lazy + mapping only when their bv_blt() call is invoked.
+
+ This allows the client to avoid the overhead of mapping and unmapping the buffers on each + bv_blt() call.  It also avoids the associated mapping + and unmapping overhead if a given implementation is never used.
+
+ As mentioned above, the CPU implementations have (almost) no overhead associated with mapping and unmapping, + so they are a good choice to use for the call to bv_map().
+
c. If the client wants direct control over the mapping and unmapping overhead, it can call the + bv_map() function of each implementation, as indicated above.  + Each implementation will perform the mapping at that time, so that the overhead will not appear on subsequent calls + to bv_blt().
+

4.  Next the client must create bvsurfgeom objects for +each way in which a buffer will be accessed.  Often, there is only one way in which a buffer is accessed, so there +will be the same number of buffers, bvbuffdesc, and +bvsurfgeom objects.  If that's the case, it may be convenient +for the client to combine them into a parent structure.  It may even be possible to share a single bvbuffgeom structure +among buffers.  Or there will be times when it is necessary to treat a buffer in different ways for different BLTs.  +Having these two structures separated allows all of these combinations.

+ + + + + + +
+

struct bvsurfgeom geom =
+  {sizeof(struct bvsurfgeom), 0};
+
+ geom.format = OCDFMT_RGB24;
+ geom.width = width;
+ geom.height = height;
+ geom.virtstride = stride;

+ 		 or  +

struct bvsurfgeom geom; +
+ memset(&geom, 0, sizeof(geom));
+ geom.structsize = sizeof(geom);
+ geom.width = width;
+ geom.height = height;
+ geom.virtstride = stride;

+
+

Note that the client must ensure that any additional members in +bvsurfgeom are initialized to 0 for future compatibility.

+

5.  Now the client is ready to fill in a bvbltparams structure to specify the type of BLT requested.  Here +is an example of a simple copy from the lower right corner of a surface to the upper left:

+

struct bvbltparams bltparams = {sizeof(struct bvbltparams), 0};
+
+bltparams.flags = BVFLAG_ROP;
+bltparams.op.rop = 0xCCCC; /* SRCCOPY */
+bltparams.dstdesc = &buff;
+bltparams.dstgeom = &geom;
+bltparams.dstrect.left = 0;
+bltparams.dstrect.top = 0;
+bltparams.dstwidth = width / 2;
+bltparams.dstheight = height / 2;
+bltparams.src1.desc = &buff;
+bltparams.src1geom = &geom;
+bltparams.src1rect.left = width / 2;
+bltparams.src1rect.top = height / 2;
+bltparams.src1rect.width = width / 2;
+bltparams.src1rect.height = height / 2;

+

6.  And next the client can trigger the BLT by calling bv_blt():

+

bv_blt(&bltparams);

+

If the client cannot complete the requested BLT, it returns a +bverror indicating the issue.

+

7.  Finally, the client should clean up:

+

bv_unmap(&buff);

+
+

Kernel Mode Interface

+

The kernel mode interface differs only slightly from the user mode interface.  Currently there are two differences +in the general kernel interface, and one in the Linux/Android interface:

+

bvbuffdesc.auxtype/auxptr

+

bvbuffdesc.auxtype is an enum, +indicating the type of the +bvbuffdesc.auxptr.  The enumeration values and +the associated types are:

+ + + + + + + + + + + + + + + + +
bvbuffdesc.auxtype +bvbuffdesc.auxptr typeNotes
BVAT_PHYSDESC +bvphysdescUsed to specify the physical pages of a physically discontiguous buffer constructed using + a single page size.  This may be used with physically contiguous buffers as well, but + BVAT_PHYSADDR is preferred.
BVAT_PHYSADDRphysical addressUsed to specify the starting physical address of a physically contiguous buffer.
+

The methods of describing the buffer using physical addresses is not exposed in user mode for security reasons.

+
+

bvphysdesc

+

struct bvphysdesc {
+        unsigned int structsize;
+        unsigned long pagesize;
+        unsigned long *pagearray;
+        unsigned int pagecount;
+        unsigned long pageoffset;
+};

+

bvphysdesc.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See +bvbltparams.structsize for an explanation.)

+

bvphysdesc.pagesize

+

unsigned long pagesize;

+

This member indicates the size of the physical pages containing the buffer.  BVAT_PHYSDESC/bvphysdesc +does not support buffers which reside in pages that are not all the same size.  +bvphysdesc.pagesize is used to indicate the length of the pages in the +bvphysdesc.pagearray as well as the expected alignment of those pages.  If this value is 0, the default +page size of the system is assumed.

+

NOTE:  When used with physically contiguous buffers, this member should be set to the length of the +buffer, which is the same as the value in bvbuffdesc.length.

+

bvphysdesc.pagearray

+

unsigned long *pagearray;

+

This member is an array of unsigned longs holding the physical addresses of the pages +holding the buffer.  The array contains pagecount +entries.  The specific format of the physical addresses is O/S dependent.  However, +BVAT_PHYSDESC/bvphysdesc only supports 32-bit physical addresses.

+

Addresses in this array must be aligned on +bvphysdesc.pagesize boundaries.  Use the +bvphysdesc.pageoffset member to indicate the offset from the start of the first page to the beginning of the +buffer.

+

NOTE:  When used with physically contiguous buffers, the first (only) address in this array should +be aligned on the system default page boundary, and the +bvphysdesc.pageoffset member should be used to indicate the offset from that address to the beginning of the +buffer.

+

bvphysdesc.pagecount

+

unsigned int pagecount;

+

This member indicates the number of pages in the array pointed to by +bvphysdesc.pagearray.

+

NOTE:  When used with physically contiguous buffers, this member should be set to 1.

+

bvphysdesc.pageoffset

+

unsigned long pageoffset;

+

This member indicates the number of bytes from the start of the first page (*pagearray) +to the start of the buffer.  The value must be less than +bvphysdesc.pagesize.

+

Implementations Only
+
+Implementations should not ignore this member.

+
+

bventry

+

Kernel mode entry cannot be the same as the user mode.  The specific method of accessing the kernel interface is +O/S specific.  However, the following interface is currently defined for the specified O/Ss:

+ + + + +
+

Linux/Android

+

bventry

+

This structure is used to obtain the pointers to the implementation's BLTsville calls.  The client can call + the default bv2d_entry() function to obtain the pointers to the implementation + chosen by the system integrators, or it can call a specific function to get the pointers for a specific implementation + (e.g. gcbv_entry()).

+

struct bventry {
+        unsigned int structsize;
+        BVFN_MAP bv_map;
+        BVFN_UNMAP bv_unmap;
+        BVFN_BLT bv_blt;
+        BVFN_CACHE bv_cache;
+ };

+

bventry.structsize

+

unsigned int structsize;

+

This member is used for compatibility between BLTsville versions.  (See + bvbltparams.structsize for an explanation.)

+

bventry.bv_map/bv_unmap/bv_blt/bv_cache

+

BVFN_MAP bv_map;
+ BVFN_UNMAP bv_unmap;
+ BVFN_BLT bv_blt;
+ BVFN_CACHE bv_cache;

+

These members hold pointers to the functions for the specific implementation queried with a call to + *_entry().

+

NOTE:  bv_cache() is optional, so + this pointer may be set to 0.

+
+
+

+

Linux/Android Deviation

+

Although the linked list used in the bvbuffmap structure is +not complicated, there may be a requirement to use the standard Linux/Android kernel linked list in that environment.  +To facilitate this, the bvbuffmap.map entry is replaced by +the following entry for Linux/Android kernel mode only:

+

bvbuffmap.node

+

struct list_head node;

+

This member is used to reference the containing linked list for the bvbuffmap +structures associated with the buffer.

+ + + + diff --git a/bltsville/bltsville/ocdtab.png b/bltsville/bltsville/ocdtab.png new file mode 100644 index 0000000..239c9bb Binary files /dev/null and b/bltsville/bltsville/ocdtab.png differ diff --git a/bltsville/gcbv/Android.mk b/bltsville/gcbv/Android.mk new file mode 100644 index 0000000..a978401 --- /dev/null +++ b/bltsville/gcbv/Android.mk @@ -0,0 +1,86 @@ +# +# Copyright (c) 2012, +# Texas Instruments, Inc. and Vivante Corporation. +# +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Texas Instruments, Inc. nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL TEXAS INSTRUMENTS, INC. BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +LOCAL_PATH:= $(call my-dir) +include $(CLEAR_VARS) +LOCAL_SRC_FILES := \ + gcmain.c \ + mirror/gcbv.c \ + mirror/gcparser.c \ + mirror/gcmap.c \ + mirror/gcbuffer.c \ + mirror/gcfill.c \ + mirror/gcblit.c \ + mirror/gcfilter.c \ + mirror/gcdbglog.c + +LOCAL_CFLAGS := + +LOCAL_C_INCLUDES := \ + $(LOCAL_PATH)/mirror \ + $(LOCAL_PATH)/mirror/include \ + $(COMMON_PATH)/bltsville/bltsville/include \ + $(COMMON_PATH)/bltsville/ocd/include + +VERSION_H := $(COMMON_PATH)/bltsville/gcbv/version.h +BV_VERSION := $(shell grep "VER_FILEVERSION_STR" $(VERSION_H) | sed "s,.*\"\([0-9.]*\)\\\0.*,\1,") + +LOCAL_SHARED_LIBRARIES := \ + libcutils \ + +LOCAL_MODULE_TAGS := optional +LOCAL_MODULE := libbltsville_gc2d +LOCAL_MODULE_SUFFIX := .$(BV_VERSION).so +LOCAL_PRELINK_MODULE := false +LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/../vendor/lib + +include $(BUILD_SHARED_LIBRARY) + +#Creating SymLinks +#libbltsville_gc2d.so -> libbltsville_gc2d.VERSION.so +#libbltsville_hw2d.so -> libbltsville_gc2d.so +SYMLINKS := $(TARGET_OUT_VENDOR)/lib/libbltsville_gc2d.so +$(SYMLINKS): GC2D_BINARY := ./$(LOCAL_MODULE)$(LOCAL_MODULE_SUFFIX) +$(SYMLINKS): $(LOCAL_INSTALLED_MODULE) $(LOCAL_PATH)/Android.mk + @echo "Symlink: $@ -> $(GC2D_BINARY)" + @rm -rf $@ + $(hide) ln -fs $(GC2D_BINARY) $@ + +SYMLINKS1 := $(TARGET_OUT_VENDOR)/lib/libbltsville_hw2d.so +$(SYMLINKS1): LINK_BINARY := ./libbltsville_gc2d.so +$(SYMLINKS1): $(LOCAL_INSTALLED_MODULE) $(LOCAL_PATH)/Android.mk + @echo "Symlink: $@ -> $(LINK_BINARY)" + @rm -rf $@ + $(hide) ln -fs $(LINK_BINARY) $@ + +ALL_DEFAULT_INSTALLED_MODULES += $(SYMLINKS) $(SYMLINKS1) + +# for mm/mmm +all_modules: $(SYMLINKS) $(SYMLINKS1) + diff --git a/bltsville/gcbv/gcmain.c b/bltsville/gcbv/gcmain.c new file mode 100644 index 0000000..7d8b0bd --- /dev/null +++ b/bltsville/gcbv/gcmain.c @@ -0,0 +1,531 @@ +/* + * Copyright (c) 2012, + * Texas Instruments, Inc. and Vivante Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Texas Instruments, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL TEXAS INSTRUMENTS, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcmain.h" +#include "gcbv.h" +#include + +#if ANDROID +#include +#include +#endif + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_INIT (1 << 0) +#define GCZONE_CALLBACK (1 << 1) + +GCDBG_FILTERDEF(gcmain, GCZONE_NONE, + "init", + "callback") + + +static int g_handle; + + +/******************************************************************************* + * Callback manager. + */ +enum gccallbackinfo_status { + UNINIT, + SUPPORTED, + UNSUPPORTED +}; + +static const char * const g_statusNames[] = { + "UNINIT", + "SUPPORTED", + "UNSUPPORTED" +}; + +struct gccallbackinfo { + /* Callback status */ + enum gccallbackinfo_status status; + + /* Callback handle. */ + unsigned long handle; + + /* Termination semaphore. */ + sem_t stop; + + /* Callback thread handle. */ + pthread_t thread; + + /* Start/stop mutex */ + pthread_mutex_t mutex; +}; + +struct gccallbackinfo g_callbackinfo = { + .status = UNINIT +}; + +static void *callbackthread(void *_gccallbackinfo) +{ + struct gccallbackinfo *gccallbackinfo; + struct gcicallbackwait gccmdcallbackwait; + int result; + + /* Get callback info. */ + gccallbackinfo = (struct gccallbackinfo *) _gccallbackinfo; + + /* Initialize the command. */ + gccmdcallbackwait.handle = gccallbackinfo->handle; + gccmdcallbackwait.timeoutms = 2000; + + /* Enter wait loop. */ + while (1) { + /* Call the kernel to wait for callback event. */ + result = ioctl(g_handle, GCIOCTL_CALLBACK_WAIT, + &gccmdcallbackwait); + if (result == 0) { + if (gccmdcallbackwait.gcerror == GCERR_NONE) { + /* Work completed. */ + GCDBG(GCZONE_CALLBACK, + "callback 0x%08X(0x%08X).\n", + (unsigned int) + gccmdcallbackwait.callback, + (unsigned int) + gccmdcallbackwait.callbackparam); + + /* Invoke the callback. */ + gccmdcallbackwait.callback( + gccmdcallbackwait.callbackparam); + } else if (gccmdcallbackwait.gcerror == GCERR_TIMEOUT) { + /* Timeout. */ + GCDBG(GCZONE_CALLBACK, + "callback wait timeout.\n"); + } else { + /* Error occurred. */ + GCERR("callback wait failed (0x%08X).\n", + gccmdcallbackwait.gcerror); + break; + } + } else if (result != -EINTR) { + GCERR("callback wait ioctl failed (%d).\n", result); + break; + } + + /* Stop requested? */ + if (sem_trywait(&gccallbackinfo->stop) == 0) { + GCDBG(GCZONE_CALLBACK, "terminating.\n"); + break; + } + } + + return NULL; +} + +static int callback_start(struct gccallbackinfo *gccallbackinfo) +{ + int result = 0; + struct gcicallback gccmdcallback; + + GCENTER(GCZONE_CALLBACK); + + pthread_mutex_lock(&gccallbackinfo->mutex); + + if (gccallbackinfo->status != UNINIT) { + pthread_mutex_unlock(&gccallbackinfo->mutex); + return 0; + } + + gccmdcallback.handle = 0; + + gccallbackinfo->status = +#if ANDROID + /* The Android zygote process refuses to fork if there is + * more than one thread present. */ + (strcmp(get_process_name(), "zygote") == 0) ? UNSUPPORTED : +#endif + SUPPORTED; + + GCDBG(GCZONE_CALLBACK, "callback status: %s\n", + g_statusNames[gccallbackinfo->status]); + + if (gccallbackinfo->status == SUPPORTED) { + /* Initialize callback. */ + result = ioctl(g_handle, + GCIOCTL_CALLBACK_ALLOC, + &gccmdcallback); + if (result != 0) { + GCERR("callback ioctl failed (%d).\n", result); + goto fail; + } + + if (gccmdcallback.gcerror != GCERR_NONE) { + GCERR("failed to initialize callback " + "mechanism (0x%08X).\n", + gccmdcallback.gcerror); + goto fail; + } + + gccallbackinfo->handle = gccmdcallback.handle; + + /* Initialize the termination semaphore. */ + result = sem_init(&gccallbackinfo->stop, 0, 0); + if (result != 0) { + GCERR("callback semaphore init failed (%d).\n", result); + goto fail; + } + + /* Start the thread. */ + result = pthread_create(&gccallbackinfo->thread, NULL, + callbackthread, gccallbackinfo); + if (result != 0) { + GCERR("failed to start callback thread.\n"); + goto fail; + } + + gccmdcallback.handle = 0; + } + +fail: + if (gccmdcallback.handle != 0) { + ioctl(g_handle, GCIOCTL_CALLBACK_FREE, &gccmdcallback); + gccallbackinfo->handle = 0; + } + + pthread_mutex_unlock(&gccallbackinfo->mutex); + + GCEXITARG(GCZONE_CALLBACK, "result=%d", result); + return result; +} + +static void callback_stop(struct gccallbackinfo *gccallbackinfo) +{ + struct gcicallback gccmdcallback; + + GCENTER(GCZONE_CALLBACK); + + pthread_mutex_lock(&gccallbackinfo->mutex); + + if (gccallbackinfo->status == SUPPORTED) { + if (gccallbackinfo->thread) { + sem_post(&gccallbackinfo->stop); + pthread_kill(gccallbackinfo->thread, SIGINT); + + GCDBG(GCZONE_CALLBACK, + "waiting to join callback thread...\n"); + + pthread_join(gccallbackinfo->thread, NULL); + gccallbackinfo->thread = 0; + } + + /* Free kernel resources. */ + gccmdcallback.handle = gccallbackinfo->handle; + ioctl(g_handle, GCIOCTL_CALLBACK_FREE, &gccmdcallback); + gccallbackinfo->handle = 0; + } + + gccallbackinfo->status == UNINIT; + + pthread_mutex_unlock(&gccallbackinfo->mutex); + + GCEXIT(GCZONE_CALLBACK); +} + + +/******************************************************************************* + * IOCTL wrappers. + */ + +#if GCDEBUG_ENABLE && 0 +#define GCPRINTDELAY() sleep(1) +#else +#define GCPRINTDELAY() +#endif + +void gc_getcaps_wrapper(struct gcicaps *gcicaps) +{ + int result; + + GCPRINTDELAY(); + + result = ioctl(g_handle, GCIOCTL_GETCAPS, gcicaps); + if (result != 0) { + GCERR("ioctl failed (%d).\n", result); + gcicaps->gcerror = GCERR_IOCTL; + } +} + +void gc_map_wrapper(struct gcimap *gcmap) +{ + int result; + + GCPRINTDELAY(); + result = ioctl(g_handle, GCIOCTL_MAP, gcmap); + + if (result != 0) { + GCERR("ioctl failed (%d).\n", result); + gcmap->gcerror = GCERR_IOCTL; + } +} + +void gc_unmap_wrapper(struct gcimap *gcmap) +{ + int result; + + GCPRINTDELAY(); + result = ioctl(g_handle, GCIOCTL_UNMAP, gcmap); + + if (result != 0) { + GCERR("ioctl failed (%d).\n", result); + gcmap->gcerror = GCERR_IOCTL; + } +} + +void gc_commit_wrapper(struct gcicommit *gccommit) +{ + int result; + + GCPRINTDELAY(); + + /* Callback start is delayed until needed to handle a case + * where it's unsupported on Android. */ + if (gccommit->callback) + callback_start(&g_callbackinfo); + + gccommit->handle = g_callbackinfo.handle; + result = ioctl(g_handle, GCIOCTL_COMMIT, gccommit); + + if (result != 0) { + GCERR("ioctl failed (%d).\n", result); + gccommit->gcerror = GCERR_IOCTL; + } +} + +void gc_callback_wrapper(struct gcicallbackarm *gcicallbackarm) +{ + int result; + + GCPRINTDELAY(); + + callback_start(&g_callbackinfo); + + gcicallbackarm->handle = g_callbackinfo.handle; + result = ioctl(g_handle, GCIOCTL_CALLBACK_ARM, gcicallbackarm); + if (result != 0) { + GCERR("ioctl failed (%d).\n", result); + gcicallbackarm->gcerror = GCERR_IOCTL; + } +} + + +/******************************************************************************* + * Convert floating point in 0..1 range to an 8-bit value in range 0..255. + */ + +union gcfp { + struct { + unsigned int mantissa:23; + unsigned int exponent:8; + unsigned int sign:1; + } comp; + + float value; +}; + +unsigned char gcfp2norm8(float value) +{ + union gcfp gcfp; + int exponent; + unsigned int mantissa; + int shift; + + /* Get access to components. */ + gcfp.value = value; + + /* Clamp negatives. */ + if (gcfp.comp.sign) + return 0; + + /* Get unbiased exponent. */ + exponent = (int) gcfp.comp.exponent - 127; + + /* Clamp if too large. */ + if (exponent >= 0) + return 255; + + /* Clamp if too small. */ + if (exponent < -8) + return 0; + + /* Determine the shift value. */ + shift = (23 - 8) - exponent; + + /* Compute the mantissa. */ + mantissa = (gcfp.comp.mantissa | 0x00800000) >> shift; + + /* Normalize. */ + mantissa = (mantissa * 255) >> 8; + + return (unsigned char) mantissa; +} + + +/******************************************************************************* + * Surface allocation. + */ + +enum bverror allocate_surface(struct bvbuffdesc **bvbuffdesc, + void **buffer, + unsigned int size) +{ + enum bverror bverror = BVERR_NONE; + struct bvbuffdesc *tempbuffdesc = NULL; + void *tempbuff = NULL; + unsigned long base; + + /* Allocate surface buffer descriptor. */ + tempbuffdesc = gcalloc(struct bvbuffdesc, sizeof(struct bvbuffdesc)); + if (tempbuffdesc == NULL) { + BVSETERROR(BVERR_OOM, "failed to allocate surface"); + goto exit; + } + + /* Initialize buffer descriptor. */ + tempbuffdesc->structsize = sizeof(struct bvbuffdesc); + tempbuffdesc->virtaddr = NULL; + tempbuffdesc->length = size; + tempbuffdesc->map = NULL; + tempbuffdesc->auxtype = BVAT_NONE; + tempbuffdesc->auxptr = NULL; + + /* Allocate the surface. */ + tempbuff = gcalloc(void, size + GC_MAX_BASE_ALIGN); + if (tempbuff == NULL) { + BVSETERROR(BVERR_OOM, "failed to allocate surface"); + goto exit; + } + + /* Align the base address. */ + tempbuffdesc->virtaddr + = (void *) (((unsigned long) tempbuff + GC_MAX_BASE_ALIGN - 1) + & ~(GC_MAX_BASE_ALIGN - 1)); + + /* Set return pointers. */ + *bvbuffdesc = tempbuffdesc; + *buffer = tempbuff; + return BVERR_NONE; + +exit: + free_surface(tempbuffdesc, tempbuff); + return bverror; +} + +void free_surface(struct bvbuffdesc *bvbuffdesc, + void *buffer) +{ + gcfree(buffer); + gcfree(bvbuffdesc); +} + + +/******************************************************************************* + * Cache operation wrapper. + */ + +enum bverror gcbvcacheop(int count, struct c2dmrgn rgn[], + enum bvcacheop cacheop) +{ + int result; + struct gcicache xfer; + + if ((count < 0) || (count > 3)) + return BVERR_CACHEOP; + + xfer.count = count; + xfer.dir = cacheop; + memcpy(xfer.rgn, rgn, count * sizeof(struct c2dmrgn)); + + GCPRINTDELAY(); + result = ioctl(g_handle, GCIOCTL_CACHE, &xfer); + + if (result != 0) + GCERR("ioctl failed (%d).\n", result); + + return BVERR_NONE; +} + + +/******************************************************************************* + * Device init/cleanup. + */ + +void __attribute__((constructor)) dev_init(void) +{ + char *env; + + env = getenv("GCBV_DEBUG"); + if (env && (atol(env) != 0)) + GCDBG_ENABLEDUMP(); + + GCDBG_INIT(); + GCDBG_REGISTER(gcmain); + + GCENTER(GCZONE_INIT); + + g_handle = open("/dev/gcioctl", O_RDWR); + if (g_handle == -1) { + GCERR("failed to open device (%d).\n", errno); + goto fail; + } + + bv_init(); + + pthread_mutex_init(&g_callbackinfo.mutex, 0); + + GCEXIT(GCZONE_INIT); + return; + +fail: + if (g_handle > 0) { + close(g_handle); + g_handle = 0; + } + + GCEXIT(GCZONE_INIT); +} + +void __attribute__((destructor)) dev_exit(void) +{ + GCENTER(GCZONE_INIT); + + bv_exit(); + callback_stop(&g_callbackinfo); + + if (g_handle != 0) { + close(g_handle); + g_handle = 0; + } + + GCEXIT(GCZONE_INIT); + GCDBG_EXIT(); +} + diff --git a/bltsville/gcbv/gcmain.h b/bltsville/gcbv/gcmain.h new file mode 100644 index 0000000..6d6489c --- /dev/null +++ b/bltsville/gcbv/gcmain.h @@ -0,0 +1,143 @@ +/* + * Copyright (c) 2012, + * Texas Instruments, Inc. and Vivante Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Texas Instruments, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL TEXAS INSTRUMENTS, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCMAIN_H +#define GCMAIN_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GC_DEV_NAME "gc2duser" + + +/******************************************************************************* + * Miscellaneous macros. + */ + +/* Not present in userspace bltsville headers */ +#define BVAT_PHYSDESC 0xDEADBEEF + +#define gcalloc(type, size) \ + (type *) malloc(size) + +#define gcfree(ptr) \ + free(ptr) + +#define max(x, y) (x > y ? x : y) +#define min(x, y) (x < y ? x : y) + +#define EXPORT_SYMBOL(sym) + +#define gc_debug_blt(...) + +typedef int64_t s64; +typedef uint64_t u64; + +#define div_u64(x, y) ((x) / (y)) +#define div_s64(x, y) ((x) / (y)) +#define div64_u64(x, y) ((x) / (y)) +#define div64_s64(x, y) ((x) / (y)) + +#define PAGE_SHIFT 12 +#define PAGE_SIZE (1 << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +/******************************************************************************* + * Not defined in bltsville userspace headers. + */ + +struct bvphysdesc { + unsigned int structsize; /* used to identify struct version */ + unsigned long pagesize; /* page size in bytes */ + unsigned long *pagearray; /* array of physical pages */ + unsigned int pagecount; /* number of pages in the pagearray */ + unsigned long pageoffset; /* page offset in bytes */ +}; + + +/******************************************************************************* + * IOCTL wrappers. + */ + +void gc_getcaps_wrapper(struct gcicaps *gcicaps); +void gc_map_wrapper(struct gcimap *gcimap); +void gc_unmap_wrapper(struct gcimap *gcimap); +void gc_commit_wrapper(struct gcicommit *gcicommit); +void gc_callback_wrapper(struct gcicallbackarm *gcicallbackarm); + + +/******************************************************************************* + * Surface allocation. + */ +enum bverror allocate_surface(struct bvbuffdesc **bvbuffdesc, + void **buffer, + unsigned int size); + +void free_surface(struct bvbuffdesc *bvbuffdesc, + void *buffer); + + +/******************************************************************************* + * Floating point conversions. + */ + +unsigned char gcfp2norm8(float value); + + +/******************************************************************************* + * Cache operation wrapper. + */ + +enum bverror gcbvcacheop(int count, struct c2dmrgn rgn[], + enum bvcacheop cacheop); + + +/******************************************************************************* + * BLTsville API. + */ + +void bv_init(void); +void bv_exit(void); + +enum bverror bv_map(struct bvbuffdesc *buffdesc); +enum bverror bv_unmap(struct bvbuffdesc *buffdesc); +enum bverror bv_blt(struct bvbltparams *bltparams); +enum bverror bv_cache(struct bvcopparams *copparams); + +#endif diff --git a/bltsville/gcbv/mirror/gcblit.c b/bltsville/gcbv/mirror/gcblit.c new file mode 100644 index 0000000..5dae273 --- /dev/null +++ b/bltsville/gcbv/mirror/gcblit.c @@ -0,0 +1,771 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_BLEND (1 << 0) +#define GCZONE_SURF (1 << 1) +#define GCZONE_BLIT (1 << 3) + +GCDBG_FILTERDEF(blit, GCZONE_NONE, + "blend", + "surf", + "blit") + + +static enum bverror do_blit_end(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + enum bverror bverror; + struct gcblit *gcblit; + struct gcmobltconfig *gcmobltconfig; + struct gcmostartde *gcmostartde; + + GCENTER(GCZONE_BLIT); + + /* Get a shortcut to the operation specific data. */ + gcblit = &batch->op.blit; + + GCDBG(GCZONE_BLIT, "finalizing the blit, scrcount = %d\n", + gcblit->srccount); + + /*********************************************************************** + * Configure the operation. + */ + + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmobltconfig), + (void **) &gcmobltconfig); + if (bverror != BVERR_NONE) + goto exit; + + /* Configure multi-source control. */ + gcmobltconfig->multisource_ldst = gcmobltconfig_multisource_ldst; + gcmobltconfig->multisource.raw = 0; + gcmobltconfig->multisource.reg.srccount = gcblit->srccount - 1; + + GCDBG(GCZONE_BLIT, "blockenable = %d\n", gcblit->blockenable); + if (gcblit->blockenable) { + gcmobltconfig->multisource.reg.horblock + = GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL16; + gcmobltconfig->multisource.reg.verblock + = GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE64; + } else { + gcmobltconfig->multisource.reg.horblock + = GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL128; + gcmobltconfig->multisource.reg.verblock + = GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE1; + } + + /* Set destination configuration. */ + GCDBG(GCZONE_BLIT, " swizzle code = %d\n", gcblit->swizzle); + GCDBG(GCZONE_BLIT, " format code = %d\n", gcblit->format); + + gcmobltconfig->dstconfig_ldst = gcmobltconfig_dstconfig_ldst; + gcmobltconfig->dstconfig.raw = 0; + gcmobltconfig->dstconfig.reg.swizzle = gcblit->swizzle; + gcmobltconfig->dstconfig.reg.format = gcblit->format; + gcmobltconfig->dstconfig.reg.command = gcblit->multisrc + ? GCREG_DEST_CONFIG_COMMAND_MULTI_SOURCE_BLT + : GCREG_DEST_CONFIG_COMMAND_BIT_BLT; + + /*********************************************************************** + * Start the operation. + */ + + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmostartde), + (void **) &gcmostartde); + if (bverror != BVERR_NONE) + goto exit; + + /* Set START_DE command. */ + gcmostartde->startde.cmd.fld = gcfldstartde; + + /* Set destination rectangle. */ + gcmostartde->rect.left = gcblit->dstrect.left; + gcmostartde->rect.top = gcblit->dstrect.top; + gcmostartde->rect.right = gcblit->dstrect.right; + gcmostartde->rect.bottom = gcblit->dstrect.bottom; + + GCDBG(GCZONE_BLIT, "dstrect = (%d,%d)-(%d,%d)\n", + gcmostartde->rect.left, gcmostartde->rect.top, + gcmostartde->rect.right, gcmostartde->rect.bottom); + + /* Reset the finalizer. */ + batch->batchend = do_end; + + gc_debug_blt(gcblit->srccount, + abs(gcblit->dstrect.right - gcblit->dstrect.left), + abs(gcblit->dstrect.bottom - gcblit->dstrect.top)); + +exit: + GCEXITARG(GCZONE_BLIT, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror do_blit(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + + struct gcmosrc0 *gcmosrc0; + struct gcmosrc *gcmosrc; + struct gcblit *gcblit; + + unsigned int index; + struct bvbuffmap *dstmap = NULL; + struct bvbuffmap *srcmap = NULL; + + struct surfaceinfo *dstinfo; + int dstshiftX, dstshiftY; + int dstpixalign, dstbyteshift; + int dstoffsetX, dstoffsetY; + + int srcshiftX, srcshiftY, srctopedge; + struct gcrect srcclipped; + int srcsurfwidth, srcsurfheight; + unsigned int physwidth, physheight; + int orthogonal; + int multisrc; + + GCENTER(GCZONE_BLIT); + + /* 3-plane source not supported. */ + if ((srcinfo->format.type == BVFMT_YUV) && + (srcinfo->format.cs.yuv.planecount == 3)) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1GEOM_FORMAT + : BVERR_SRC2GEOM_FORMAT, + "unsupported source%d format.", + srcinfo->index + 1); + goto exit; + } + + /* Get a shortcut to the destination surface. */ + dstinfo = &batch->dstinfo; + + /* Parse destination parameters. */ + bverror = parse_destination(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Setup rotation. */ + process_dest_rotation(bvbltparams, batch); + + + /*********************************************************************** + * Determine source surface alignment offset. + */ + + /* Determine whether the source and the destination are orthogonal + * to each other. */ + orthogonal = (srcinfo->angle % 2) != (dstinfo->angle % 2); + + /* Compute clipped source rectangle. */ + srcclipped.left = srcinfo->rect.left + batch->clipdelta.left; + srcclipped.top = srcinfo->rect.top + batch->clipdelta.top; + srcclipped.right = srcinfo->rect.right + batch->clipdelta.right; + srcclipped.bottom = srcinfo->rect.bottom + batch->clipdelta.bottom; + GCPRINT_RECT(GCZONE_SURF, "clipped source", &srcclipped); + + /* Validate the source rectangle. */ + if (!valid_rect(srcinfo->geom, &srcclipped)) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1RECT + : BVERR_SRC2RECT, + "invalid source rectangle."); + goto exit; + } + + /* Compute the source surface shift. */ + switch (srcinfo->angle) { + case ROT_ANGLE_0: + srctopedge = srcclipped.top; + srcshiftX = srcclipped.left - batch->dstadjusted.left; + srcshiftY = srctopedge - batch->dstadjusted.top; + break; + + case ROT_ANGLE_90: + srctopedge = srcinfo->geom->width - srcclipped.left; + srcshiftX = srcclipped.top - batch->dstadjusted.top; + srcshiftY = srctopedge + - (batch->dstwidth - batch->dstadjusted.left); + srctopedge += 1; + break; + + case ROT_ANGLE_180: + srctopedge = srcinfo->geom->height - srcclipped.top; + srcshiftX = (srcinfo->geom->width - srcclipped.left) + - (batch->dstwidth - batch->dstadjusted.left); + srcshiftY = srctopedge + - (batch->dstheight - batch->dstadjusted.top); + srctopedge += 1; + break; + + case ROT_ANGLE_270: + srctopedge = srcclipped.left; + srcshiftX = (srcinfo->geom->height - srcclipped.top) + - (batch->dstheight - batch->dstadjusted.top); + srcshiftY = srctopedge - batch->dstadjusted.left; + break; + + default: + srctopedge = 0; + srcshiftX = 0; + srcshiftY = 0; + } + + /* We cannot be in the middle of a sample, currently only YUV formats + * can have subsamples. Adjust vertical position as necessary. + * Horizontal position will be adjusted based on the byte offset and + * base address alignment requirement. This assumes that if we are + * aligned on the base address, then we are also aligned at the + * beginning of a sample. */ + if (srcinfo->format.type == BVFMT_YUV) { + int mody = (srctopedge + srcshiftY) + % srcinfo->format.cs.yuv.ysample; + + if (mody < 0) + mody = srcinfo->format.cs.yuv.ysample + mody; + + srcshiftY -= mody; + srcinfo->ypixalign = -mody; + } else { + srcinfo->ypixalign = 0; + } + + /* Compute the source surface offset in bytes. */ + srcinfo->bytealign = srcshiftY * (int) srcinfo->geom->virtstride + + srcshiftX * (int) srcinfo->format.bitspp / 8; + + /* Compute the source offset in pixels needed to compensate + * for the surface base address misalignment if any. */ + srcinfo->xpixalign = get_pixel_offset(srcinfo, srcinfo->bytealign); + + GCDBG(GCZONE_SURF, "source surface %d:\n", srcinfo->index + 1); + GCDBG(GCZONE_SURF, " surface offset (pixels) = %d,%d\n", + srcshiftX, srcshiftY); + GCDBG(GCZONE_SURF, " surface offset (bytes) = 0x%08X\n", + srcinfo->bytealign); + GCDBG(GCZONE_SURF, " srcpixalign = %d,%d\n", + srcinfo->xpixalign, srcinfo->ypixalign); + + /* Apply the source alignment. */ + srcinfo->bytealign += srcinfo->xpixalign + * (int) srcinfo->format.bitspp / 8; + srcshiftX += srcinfo->xpixalign; + + /* NOTE: at this point the source is ready to be presented, + * srcinfo->xpixalign and srcinfo->ypixalign represent additional + * adjustments for the DESTINATION. */ + + GCDBG(GCZONE_SURF, " adjusted surface offset (pixels) = %d,%d\n", + srcshiftX, srcshiftY); + GCDBG(GCZONE_SURF, " adjusted surface offset (bytes) = 0x%08X\n", + srcinfo->bytealign); + + /* Compute U/V plane offsets. */ + if ((srcinfo->format.type == BVFMT_YUV) && + (srcinfo->format.cs.yuv.planecount > 1)) + set_computeyuv(srcinfo, srcshiftX, srcshiftY); + + /* Set precomputed destination adjustments based on the destination + * base address misalignment only. */ + dstshiftX = dstinfo->xpixalign; + dstshiftY = dstinfo->ypixalign; + + /* Apply source adjustemnts. */ + if (srcinfo->angle == dstinfo->angle) { + dstshiftX += srcinfo->xpixalign; + dstshiftY += srcinfo->ypixalign; + } else if (((srcinfo->angle + 3) % 4) == dstinfo->angle) { + dstshiftY += srcinfo->xpixalign; + } else if (((srcinfo->angle + 1) % 4) == dstinfo->angle) { + dstshiftX += srcinfo->ypixalign; + } + + /* Compute the destination surface offset in bytes. */ + dstbyteshift = dstshiftY * (int) dstinfo->geom->virtstride + + dstshiftX * (int) dstinfo->format.bitspp / 8; + + /* Compute the destination offset in pixels needed to compensate + * for the surface base address misalignment if any. If dstpixalign + * comes out anything other than zero, multisource blit cannot be + * performed. */ + dstpixalign = get_pixel_offset(dstinfo, dstbyteshift); + + GCDBG(GCZONE_SURF, "destination surface:\n"); + GCDBG(GCZONE_SURF, " surface offset (pixels) = %d,%d\n", + dstshiftX, dstshiftY); + GCDBG(GCZONE_SURF, " surface offset (bytes) = 0x%08X\n", + dstbyteshift); + GCDBG(GCZONE_SURF, " realignment = %d\n", + dstpixalign); + + if ((dstpixalign != 0) || + ((srcinfo->xpixalign != 0) && (srcinfo->angle == dstinfo->angle))) { + /* Adjust the destination to match the source geometry. */ + switch (srcinfo->angle) { + case ROT_ANGLE_0: + /* Adjust coordinates. */ + srcclipped.left -= srcshiftX; + srcclipped.top -= srcshiftY; + + /* Determine source size. */ + srcsurfwidth = srcinfo->geom->width + - srcinfo->xpixalign; + srcsurfheight = srcinfo->geom->height; + break; + + case ROT_ANGLE_90: + /* Adjust top coordinate. */ + srcclipped.top -= srcshiftX; + + /* Determine source size. */ + srcsurfwidth = srcinfo->geom->height + - srcinfo->xpixalign; + srcsurfheight = srcinfo->geom->width; + break; + + case ROT_ANGLE_180: + /* Determine source size. */ + srcsurfwidth = srcinfo->geom->width + - srcinfo->xpixalign; + srcsurfheight = srcinfo->geom->height; + break; + + case ROT_ANGLE_270: + /* Adjust coordinates. */ + srcclipped.left -= srcshiftY; + + /* Determine source size. */ + srcsurfwidth = srcinfo->geom->height + - srcinfo->xpixalign; + srcsurfheight = srcinfo->geom->width; + break; + + default: + srcsurfwidth = 0; + srcsurfheight = 0; + } + + GCDBG(GCZONE_SURF, "srcrect origin = %d,%d\n", + srcclipped.left, srcclipped.top); + GCDBG(GCZONE_SURF, "source physical size = %dx%d\n", + srcsurfwidth, srcsurfheight); + + /* Overwrite destination byte offset. */ + dstbyteshift = dstinfo->bytealign; + + /* No adjustment necessary for single-source. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Set the physical destination size. */ + physwidth = dstinfo->physwidth; + physheight = dstinfo->physheight; + + /* Disable multi source for the cases where the destination + * and the source address alignments do not match. */ + multisrc = 0; + GCDBG(GCZONE_SURF, "multi-source disabled.\n"); + } else { + /* Source origin is not used in multi-source setup. */ + srcclipped.left = 0; + srcclipped.top = 0; + + /* Adjust the destination to match the source geometry. */ + switch (srcinfo->angle) { + case ROT_ANGLE_0: + /* Adjust the destination horizontally. */ + dstoffsetX = srcinfo->xpixalign; + dstoffsetY = srcinfo->ypixalign; + + /* Apply the source alignment. */ + if ((dstinfo->angle % 2) == 0) { + physwidth = dstinfo->physwidth + - srcinfo->xpixalign; + physheight = dstinfo->physheight + - srcinfo->ypixalign; + } else { + physwidth = dstinfo->physwidth + - srcinfo->ypixalign; + physheight = dstinfo->physheight + - srcinfo->xpixalign; + } + break; + + case ROT_ANGLE_90: + /* Adjust the destination vertically. */ + dstoffsetX = srcinfo->ypixalign; + dstoffsetY = srcinfo->xpixalign; + + /* Apply the source alignment. */ + if ((dstinfo->angle % 2) == 0) { + physwidth = dstinfo->physwidth + - srcinfo->ypixalign; + physheight = dstinfo->physheight + - srcinfo->xpixalign; + } else { + physwidth = dstinfo->physwidth + - srcinfo->xpixalign; + physheight = dstinfo->physheight + - srcinfo->ypixalign; + } + break; + + case ROT_ANGLE_180: + /* No adjustment necessary. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Apply the source alignment. */ + if ((dstinfo->angle % 2) == 0) { + physwidth = dstinfo->physwidth + - srcinfo->xpixalign; + physheight = dstinfo->physheight + - srcinfo->ypixalign; + } else { + physwidth = dstinfo->physwidth + - srcinfo->ypixalign; + physheight = dstinfo->physheight + - srcinfo->xpixalign; + } + break; + + case ROT_ANGLE_270: + /* No adjustment necessary. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Apply the source alignment. */ + if ((dstinfo->angle % 2) == 0) { + physwidth = dstinfo->physwidth + - srcinfo->ypixalign; + physheight = dstinfo->physheight + - srcinfo->xpixalign; + } else { + physwidth = dstinfo->physwidth + - srcinfo->xpixalign; + physheight = dstinfo->physheight + - srcinfo->ypixalign; + } + break; + + default: + physwidth = 0; + physheight = 0; + dstoffsetX = 0; + dstoffsetY = 0; + } + + /* Source geometry is now the same as the destination. */ + if (orthogonal) { + srcsurfwidth = physheight; + srcsurfheight = physwidth; + } else { + srcsurfwidth = physwidth; + srcsurfheight = physheight; + } + + /* Enable multi-source. */ + multisrc = 1; + GCDBG(GCZONE_SURF, "multi-source enabled.\n"); + } + + /* Misaligned source may cause the destination parameters + * to change, verify whether this has happened. */ + if ((batch->dstbyteshift != dstbyteshift) || + (batch->dstphyswidth != physwidth) || + (batch->dstphysheight != physheight) || + (batch->dstoffsetX != dstoffsetX) || + (batch->dstoffsetY != dstoffsetY)) { + /* Set new values. */ + batch->dstbyteshift = dstbyteshift; + batch->dstphyswidth = physwidth; + batch->dstphysheight = physheight; + batch->dstoffsetX = dstoffsetX; + batch->dstoffsetY = dstoffsetY; + + /* Now we need to end the current batch and program + * the hardware with the new destination. */ + batch->batchflags |= BVBATCH_DST; + } + + /* Check if we need to finalize existing batch. */ + if ((batch->batchend != do_blit_end) || + (batch->op.blit.srccount == 4) || + (batch->op.blit.multisrc == 0) || + (multisrc == 0) || + ((batch->batchflags & (BVBATCH_DST | + BVBATCH_CLIPRECT | + BVBATCH_DESTRECT)) != 0)) { + /* Finalize existing batch if any. */ + bverror = batch->batchend(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Blit batch. */ + batch->batchend = do_blit_end; + + /* Initialize the new batch. */ + gcblit = &batch->op.blit; + gcblit->blockenable = 0; + gcblit->srccount = 0; + gcblit->multisrc = multisrc; + + /* Set the destination format. */ + gcblit->format = dstinfo->format.format; + gcblit->swizzle = dstinfo->format.swizzle; + + /* Set the destination coordinates. */ + gcblit->dstrect.left = batch->dstadjusted.left - dstoffsetX; + gcblit->dstrect.top = batch->dstadjusted.top - dstoffsetY; + gcblit->dstrect.right = batch->dstadjusted.right - dstoffsetX; + gcblit->dstrect.bottom = batch->dstadjusted.bottom - dstoffsetY; + + /* Map the destination. */ + bverror = do_map(dstinfo->buf.desc, batch, &dstmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /* Set the new destination. */ + bverror = set_dst(bvbltparams, batch, dstmap); + if (bverror != BVERR_NONE) + goto exit; + + /* Reset the modified flag. */ + batch->batchflags &= ~(BVBATCH_DST | + BVBATCH_CLIPRECT | + BVBATCH_DESTRECT); + } + + /* Map the source. */ + bverror = do_map(srcinfo->buf.desc, batch, &srcmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /*********************************************************************** + ** Configure source. + */ + + /* We need to walk in blocks if the source and the destination + * surfaces are orthogonal to each other. */ + batch->op.blit.blockenable |= orthogonal; + + /* Shortcut to the register index. */ + index = batch->op.blit.srccount; + + /* Set surface parameters. */ + if (index == 0) { + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmosrc0), + (void **) &gcmosrc0); + if (bverror != BVERR_NONE) + goto exit; + + add_fixup(bvbltparams, batch, &gcmosrc0->address, + srcinfo->bytealign); + + gcmosrc0->config_ldst = gcmosrc0_config_ldst; + gcmosrc0->address = GET_MAP_HANDLE(srcmap); + gcmosrc0->stride = srcinfo->geom->virtstride; + gcmosrc0->rotation.raw = 0; + gcmosrc0->rotation.reg.surf_width = srcsurfwidth; + gcmosrc0->config.raw = 0; + gcmosrc0->config.reg.swizzle = srcinfo->format.swizzle; + gcmosrc0->config.reg.format = srcinfo->format.format; + gcmosrc0->origin.reg.x = srcclipped.left; + gcmosrc0->origin.reg.y = srcclipped.top; + gcmosrc0->size.reg = gcregsrcsize_max; + + gcmosrc0->rotation_ldst = gcmosrc0_rotation_ldst; + gcmosrc0->rotationheight.reg.height = srcsurfheight; + gcmosrc0->rotationangle.raw = 0; + gcmosrc0->rotationangle.reg.src = rotencoding[srcinfo->angle]; + gcmosrc0->rotationangle.reg.dst = rotencoding[dstinfo->angle]; + gcmosrc0->rotationangle.reg.src_mirror = srcinfo->mirror; + gcmosrc0->rotationangle.reg.dst_mirror = GCREG_MIRROR_NONE; + + gcmosrc0->rop_ldst = gcmosrc0_rop_ldst; + gcmosrc0->rop.raw = 0; + gcmosrc0->rop.reg.type = GCREG_ROP_TYPE_ROP3; + gcmosrc0->rop.reg.fg = (unsigned char) srcinfo->rop; + + gcmosrc0->mult_ldst = gcmosrc0_mult_ldst; + gcmosrc0->mult.raw = 0; + gcmosrc0->mult.reg.srcglobalpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE; + + if (srcinfo->format.premultiplied) + gcmosrc0->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + else + gcmosrc0->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + if (dstinfo->format.premultiplied) { + gcmosrc0->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + + gcmosrc0->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE; + } else { + gcmosrc0->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + gcmosrc0->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE; + } + + /* Program blending. */ + bverror = set_blending(bvbltparams, batch, srcinfo); + if (bverror != BVERR_NONE) + goto exit; + + /* Program YUV source. */ + if (srcinfo->format.type == BVFMT_YUV) { + bverror = set_yuvsrc(bvbltparams, batch, + srcinfo, srcmap); + if (bverror != BVERR_NONE) + goto exit; + } + } else { + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmosrc), + (void **) &gcmosrc); + if (bverror != BVERR_NONE) + goto exit; + + add_fixup(bvbltparams, batch, &gcmosrc->address, + srcinfo->bytealign); + + gcmosrc->address_ldst = gcmosrc_address_ldst[index]; + gcmosrc->address = GET_MAP_HANDLE(srcmap); + gcmosrc->stride_ldst = gcmosrc_stride_ldst[index]; + gcmosrc->stride = srcinfo->geom->virtstride; + + gcmosrc->rotation_ldst = gcmosrc_rotation_ldst[index]; + gcmosrc->rotation.raw = 0; + gcmosrc->rotation.reg.surf_width = srcsurfwidth; + + gcmosrc->config_ldst = gcmosrc_config_ldst[index]; + gcmosrc->config.raw = 0; + gcmosrc->config.reg.swizzle = srcinfo->format.swizzle; + gcmosrc->config.reg.format = srcinfo->format.format; + + gcmosrc->origin_ldst = gcmosrc_origin_ldst[index]; + gcmosrc->origin.reg.x = srcclipped.left; + gcmosrc->origin.reg.y = srcclipped.top; + + gcmosrc->size_ldst = gcmosrc_size_ldst[index]; + gcmosrc->size.reg = gcregsrcsize_max; + + gcmosrc->rotationheight_ldst + = gcmosrc_rotationheight_ldst[index]; + gcmosrc->rotationheight.reg.height = srcsurfheight; + + gcmosrc->rotationangle_ldst + = gcmosrc_rotationangle_ldst[index]; + gcmosrc->rotationangle.raw = 0; + gcmosrc->rotationangle.reg.src = rotencoding[srcinfo->angle]; + gcmosrc->rotationangle.reg.dst = rotencoding[dstinfo->angle]; + gcmosrc->rotationangle.reg.src_mirror = srcinfo->mirror; + gcmosrc->rotationangle.reg.dst_mirror = GCREG_MIRROR_NONE; + + gcmosrc->rop_ldst = gcmosrc_rop_ldst[index]; + gcmosrc->rop.raw = 0; + gcmosrc->rop.reg.type = GCREG_ROP_TYPE_ROP3; + gcmosrc->rop.reg.fg = (unsigned char) srcinfo->rop; + + gcmosrc->mult_ldst = gcmosrc_mult_ldst[index]; + gcmosrc->mult.raw = 0; + gcmosrc->mult.reg.srcglobalpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE; + + if (srcinfo->format.premultiplied) + gcmosrc->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + else + gcmosrc->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + if (dstinfo->format.premultiplied) { + gcmosrc->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + + gcmosrc->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE; + } else { + gcmosrc->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + gcmosrc->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE; + } + + /* Program blending. */ + bverror = set_blending_index(bvbltparams, batch, + srcinfo, index); + if (bverror != BVERR_NONE) + goto exit; + + /* Program YUV source. */ + if (srcinfo->format.type == BVFMT_YUV) { + bverror = set_yuvsrc_index(bvbltparams, batch, + srcinfo, srcmap, index); + if (bverror != BVERR_NONE) + goto exit; + } + } + + batch->op.blit.srccount += 1; + +exit: + GCEXITARG(GCZONE_BLIT, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} diff --git a/bltsville/gcbv/mirror/gcbuffer.c b/bltsville/gcbv/mirror/gcbuffer.c new file mode 100644 index 0000000..7c77d4a --- /dev/null +++ b/bltsville/gcbv/mirror/gcbuffer.c @@ -0,0 +1,383 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_BATCH_ALLOC (1 << 0) +#define GCZONE_BUFFER_ALLOC (1 << 1) +#define GCZONE_FIXUP_ALLOC (1 << 2) +#define GCZONE_FIXUP (1 << 3) + +GCDBG_FILTERDEF(buffer, GCZONE_NONE, + "batchalloc", + "bufferalloc" + "fixupalloc", + "fixup") + + +/******************************************************************************* +** Miscellaneous defines and macros. +*/ + +#define GC_BUFFER_INIT_SIZE \ +( \ + GC_BUFFER_SIZE - max(sizeof(struct gcbuffer), GC_BUFFER_RESERVE) \ +) + +#define GC_BUFFER_RESERVE \ +( \ + sizeof(struct gcmopipesel) + \ + sizeof(struct gcmommumaster) + \ + sizeof(struct gcmommuflush) + \ + sizeof(struct gcmosignal) + \ + sizeof(struct gccmdend) \ +) + + +/******************************************************************************* + * Batch/command buffer management. + */ + +enum bverror do_end(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch) +{ + return BVERR_NONE; +} + +enum bverror allocate_batch(struct bvbltparams *bvbltparams, + struct gcbatch **gcbatch) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct gcbatch *temp; + struct gcbuffer *gcbuffer; + + GCENTER(GCZONE_BATCH_ALLOC); + + /* Lock access to batch management. */ + GCLOCK(&gccontext->batchlock); + + if (list_empty(&gccontext->batchvac)) { + temp = gcalloc(struct gcbatch, sizeof(struct gcbatch)); + if (temp == NULL) { + BVSETBLTERROR(BVERR_OOM, + "batch header allocation failed"); + goto exit; + } + + GCDBG(GCZONE_BATCH_ALLOC, "allocated new batch = 0x%08X\n", + (unsigned int) temp); + } else { + struct list_head *head; + head = gccontext->batchvac.next; + temp = list_entry(head, struct gcbatch, link); + list_del(head); + + GCDBG(GCZONE_BATCH_ALLOC, "reusing batch = 0x%08X\n", + (unsigned int) temp); + } + + memset(temp, 0, sizeof(struct gcbatch)); + temp->structsize = sizeof(struct gcbatch); + temp->batchend = do_end; + INIT_LIST_HEAD(&temp->buffer); + INIT_LIST_HEAD(&temp->unmap); + INIT_LIST_HEAD(&temp->link); + + bverror = append_buffer(bvbltparams, temp, &gcbuffer); + if (bverror != BVERR_NONE) { + free_batch(temp); + goto exit; + } + + *gcbatch = temp; + + GCDBG(GCZONE_BATCH_ALLOC, "batch allocated = 0x%08X\n", + (unsigned int) temp); + +exit: + /* Unlock access to batch management. */ + GCUNLOCK(&gccontext->batchlock); + + GCEXITARG(GCZONE_BATCH_ALLOC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +void free_batch(struct gcbatch *gcbatch) +{ + struct list_head *head; + struct gccontext *gccontext = get_context(); + struct gcbuffer *gcbuffer; + + GCENTERARG(GCZONE_BATCH_ALLOC, "batch = 0x%08X\n", + (unsigned int) gcbatch); + + /* Lock access. */ + GCLOCK(&gccontext->batchlock); + GCLOCK(&gccontext->bufferlock); + GCLOCK(&gccontext->fixuplock); + GCLOCK(&gccontext->maplock); + + /* Free implicit unmappings. */ + list_splice_init(&gcbatch->unmap, &gccontext->unmapvac); + + /* Free command buffers. */ + while (!list_empty(&gcbatch->buffer)) { + head = gcbatch->buffer.next; + gcbuffer = list_entry(head, struct gcbuffer, link); + + /* Free fixups. */ + list_splice_init(&gcbuffer->fixup, &gccontext->fixupvac); + + /* Free the command buffer. */ + list_move(&gcbuffer->link, &gccontext->buffervac); + } + + /* Free the batch. */ + list_add(&gcbatch->link, &gccontext->batchvac); + + /* Unlock access. */ + GCUNLOCK(&gccontext->maplock); + GCUNLOCK(&gccontext->fixuplock); + GCUNLOCK(&gccontext->bufferlock); + GCUNLOCK(&gccontext->batchlock); + + GCEXIT(GCZONE_BATCH_ALLOC); +} + +enum bverror append_buffer(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + struct gcbuffer **gcbuffer) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct gcbuffer *temp; + + GCENTERARG(GCZONE_BUFFER_ALLOC, "batch = 0x%08X\n", + (unsigned int) gcbatch); + + /* Lock access to buffer management. */ + GCLOCK(&gccontext->bufferlock); + + if (list_empty(&gccontext->buffervac)) { + temp = gcalloc(struct gcbuffer, GC_BUFFER_SIZE); + if (temp == NULL) { + BVSETBLTERROR(BVERR_OOM, + "command buffer allocation failed"); + goto exit; + } + + list_add_tail(&temp->link, &gcbatch->buffer); + + GCDBG(GCZONE_BUFFER_ALLOC, "allocated new buffer = 0x%08X\n", + (unsigned int) temp); + } else { + struct list_head *head; + head = gccontext->buffervac.next; + temp = list_entry(head, struct gcbuffer, link); + + list_move_tail(&temp->link, &gcbatch->buffer); + + GCDBG(GCZONE_BUFFER_ALLOC, "reusing buffer = 0x%08X\n", + (unsigned int) temp); + } + + INIT_LIST_HEAD(&temp->fixup); + temp->pixelcount = 0; + temp->head = temp->tail = (unsigned int *) (temp + 1); + temp->available = GC_BUFFER_INIT_SIZE; + + GCDBG(GCZONE_BUFFER_ALLOC, "new buffer appended = 0x%08X\n", + (unsigned int) temp); + + *gcbuffer = temp; + bverror = BVERR_NONE; + +exit: + /* Unlock access to buffer management. */ + GCUNLOCK(&gccontext->bufferlock); + + GCEXITARG(GCZONE_BUFFER_ALLOC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +static enum bverror allocate_fixup(struct bvbltparams *bvbltparams, + struct gcbuffer *gcbuffer, + struct gcfixup **gcfixup) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + struct gcfixup *temp; + + if (list_empty(&gccontext->fixupvac)) { + temp = gcalloc(struct gcfixup, sizeof(struct gcfixup)); + if (temp == NULL) { + BVSETBLTERROR(BVERR_OOM, "fixup allocation failed"); + goto exit; + } + + list_add_tail(&temp->link, &gcbuffer->fixup); + + GCDBG(GCZONE_FIXUP_ALLOC, + "new fixup struct allocated = 0x%08X\n", + (unsigned int) temp); + } else { + struct list_head *head; + head = gccontext->fixupvac.next; + temp = list_entry(head, struct gcfixup, link); + + list_move_tail(&temp->link, &gcbuffer->fixup); + + GCDBG(GCZONE_FIXUP_ALLOC, "fixup struct reused = 0x%08X\n", + (unsigned int) temp); + } + + temp->count = 0; + *gcfixup = temp; + +exit: + return bverror; +} + +enum bverror add_fixup(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + unsigned int *ptr, + unsigned int surfoffset) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + struct list_head *head; + struct gcbuffer *buffer; + struct gcfixup *gcfixup; + + GCENTERARG(GCZONE_FIXUP, "batch = 0x%08X, fixup ptr = 0x%08X\n", + (unsigned int) gcbatch, (unsigned int) ptr); + + /* Lock access to fixup management. */ + GCLOCK(&gccontext->fixuplock); + + /* Get the current command buffer. */ + if (list_empty(&gcbatch->buffer)) { + GCERR("no command buffers are allocated"); + goto exit; + } + head = gcbatch->buffer.prev; + buffer = list_entry(head, struct gcbuffer, link); + + /* No fixups? Allocate one. */ + if (list_empty(&buffer->fixup)) { + GCDBG(GCZONE_FIXUP_ALLOC, "no fixups allocated.\n"); + bverror = allocate_fixup(bvbltparams, buffer, &gcfixup); + if (bverror != BVERR_NONE) + goto exit; + } else { + /* Get the current fixup. */ + head = buffer->fixup.prev; + gcfixup = list_entry(head, struct gcfixup, link); + + /* No more room? */ + if (gcfixup->count == GC_FIXUP_MAX) { + GCDBG(GCZONE_FIXUP_ALLOC, + "out of room, allocating new.\n"); + bverror = allocate_fixup(bvbltparams, buffer, &gcfixup); + if (bverror != BVERR_NONE) + goto exit; + } + } + + GCDBG(GCZONE_FIXUP, "buffer = 0x%08X, fixup struct = 0x%08X\n", + (unsigned int) buffer, (unsigned int) gcfixup); + + gcfixup->fixup[gcfixup->count].dataoffset = ptr - buffer->head; + gcfixup->fixup[gcfixup->count].surfoffset = surfoffset; + gcfixup->count += 1; + + GCDBG(GCZONE_FIXUP, "fixup offset = 0x%08X\n", ptr - buffer->head); + GCDBG(GCZONE_FIXUP, "surface offset = 0x%08X\n", surfoffset); + +exit: + /* Unlock access to fixup management. */ + GCUNLOCK(&gccontext->fixuplock); + + GCEXITARG(GCZONE_FIXUP, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror claim_buffer(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + unsigned int size, + void **buffer) +{ + enum bverror bverror; + struct list_head *head; + struct gcbuffer *gcbuffer; + + GCENTERARG(GCZONE_BUFFER_ALLOC, "batch = 0x%08X, size = %d\n", + (unsigned int) gcbatch, size); + + if (size > GC_BUFFER_INIT_SIZE) { + GCERR("requested size is too big.\n"); + BVSETBLTERROR(BVERR_OOM, + "command buffer allocation failed"); + goto exit; + } + + /* Get the current command buffer. */ + head = gcbatch->buffer.prev; + gcbuffer = list_entry(head, struct gcbuffer, link); + + GCDBG(GCZONE_BUFFER_ALLOC, "buffer = 0x%08X, available = %d\n", + (unsigned int) gcbuffer, gcbuffer->available); + + if (gcbuffer->available < size) { + bverror = append_buffer(bvbltparams, gcbatch, &gcbuffer); + if (bverror != BVERR_NONE) + goto exit; + } + + *buffer = gcbuffer->tail; + gcbuffer->tail = (unsigned int *) + ((unsigned char *) gcbuffer->tail + size); + gcbuffer->available -= size; + gcbatch->size += size; + bverror = BVERR_NONE; + +exit: + GCEXITARG(GCZONE_BUFFER_ALLOC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} diff --git a/bltsville/gcbv/mirror/gcbv.c b/bltsville/gcbv/mirror/gcbv.c new file mode 100644 index 0000000..86d656e --- /dev/null +++ b/bltsville/gcbv/mirror/gcbv.c @@ -0,0 +1,2008 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_MAPPING (1 << 0) +#define GCZONE_BUFFER (1 << 1) +#define GCZONE_DEST (1 << 2) +#define GCZONE_SRC (1 << 3) +#define GCZONE_MASK (1 << 4) +#define GCZONE_BATCH (1 << 5) +#define GCZONE_BLIT (1 << 6) +#define GCZONE_CACHE (1 << 7) +#define GCZONE_CALLBACK (1 << 8) +#define GCZONE_TEMP (1 << 9) +#define GCZONE_BLEND (1 << 10) + +GCDBG_FILTERDEF(bv, GCZONE_NONE, + "mapping", + "buffer", + "dest", + "source", + "mask", + "batch", + "blit", + "cache", + "callback", + "tempbuffer", + "blending") + + +/******************************************************************************* +** Global driver data access. +*/ + +struct gccontext *get_context(void) +{ + static struct gccontext gccontext; + return &gccontext; +} + + +/******************************************************************************* + * Debugging. + */ + +#if GCDEBUG_ENABLE +#define GCDUMPBATCH(batch) \ + dumpbatch(batch) + +#define GCVERIFYBATCH(changeflags, prevrect, currrect) \ + verify_batch(changeflags, prevrect, currrect) + +static void dumpbatch(struct gcbatch *gcbatch) +{ + struct list_head *gcbufferhead; + struct gcbuffer *gcbuffer; + struct list_head *gcfixuphead; + struct gcfixup *gcfixup; + unsigned int i, size; + + if ((GCDBGFILTER.zone & (GCZONE_BUFFER)) == 0) + return; + + GCDBG(GCZONE_BUFFER, "BATCH DUMP (0x%08X)\n", + (unsigned int) gcbatch); + + list_for_each(gcbufferhead, &gcbatch->buffer) { + gcbuffer = list_entry(gcbufferhead, struct gcbuffer, link); + + list_for_each(gcfixuphead, &gcbuffer->fixup) { + gcfixup = list_entry(gcfixuphead, struct gcfixup, link); + + GCDBG(GCZONE_BUFFER, + " Fixup table @ 0x%08X, count = %d:\n", + (unsigned int) gcfixup, gcfixup->count); + + for (i = 0; i < gcfixup->count; i += 1) { + GCDBG(GCZONE_BUFFER, " [%02d]" + " buffer offset = 0x%08X," + " surface offset = 0x%08X\n", + i, + gcfixup->fixup[i].dataoffset * 4, + gcfixup->fixup[i].surfoffset); + } + } + + size = (unsigned char *) gcbuffer->tail + - (unsigned char *) gcbuffer->head; + GCDUMPBUFFER(GCZONE_BUFFER, gcbuffer->head, 0, size); + } +} + +static void verify_batch(unsigned int changeflags, + struct bvrect *prevrect, + struct bvrect *currrect) +{ + if ((changeflags & 1) == 0) { + /* Origin did not change. */ + if ((prevrect->left != currrect->left) || + (prevrect->top != currrect->top)) { + GCERR("origin changed\n"); + GCERR(" previous = %d,%d\n", + prevrect->left, prevrect->top); + GCERR(" current = %d,%d\n", + currrect->left, currrect->top); + } + } + + if ((changeflags & 2) == 0) { + /* Size did not change. */ + if ((prevrect->width != currrect->width) || + (prevrect->height != currrect->height)) { + GCERR("size changed\n"); + GCERR(" previous = %dx%d\n", + prevrect->width, prevrect->height); + GCERR(" current = %dx%d\n", + currrect->width, currrect->height); + } + } + + prevrect->left = currrect->left; + prevrect->top = currrect->top; + prevrect->width = currrect->width; + prevrect->height = currrect->height; +} +#else +#define GCDUMPBATCH(...) +#define GCVERIFYBATCH(...) +#endif + + +/******************************************************************************* + * Error handling. + */ + +#define BVSETBLTSURFERROR(errorid, errordesc) \ +do { \ + struct gccontext *tmpcontext = get_context(); \ + snprintf(tmpcontext->bverrorstr, sizeof(tmpcontext->bverrorstr), \ + g_surferr[errorid].message, errordesc.id); \ + GCDUMPSTRING("%s(%d): [ERROR] %s\n", __func__, __LINE__, \ + tmpcontext->bverrorstr); \ + bverror = errordesc.base + g_surferr[errorid].offset; \ + bvbltparams->errdesc = tmpcontext->bverrorstr; \ +} while (0) + +#define GCBVERR_DESC 0 +#define GCBVERR_DESC_VERS 1 +#define GCBVERR_DESC_VIRTADDR 2 +#define GCBVERR_TILE 3 +#define GCBVERR_TILE_VERS 4 +#define GCBVERR_TILE_VIRTADDR 5 +#define GCBVERR_GEOM 6 +#define GCBVERR_GEOM_VERS 7 +#define GCBVERR_GEOM_FORMAT 8 + +struct bvsurferrorid { + char *id; + enum bverror base; +}; + +struct bvsurferror { + unsigned int offset; + char *message; +}; + +static struct bvsurferror g_surferr[] = { + /* GCBVERR_DESC */ + { 0, "%s desc structure is not set" }, + + /* GCBVERR_DESC_VERS */ + { 100, "%s desc structure has invalid size" }, + + /* GCBVERR_DESC_VIRTADDR */ + { 200, "%s desc virtual pointer is not set" }, + + /* GCBVERR_TILE: FIXME/TODO define error code */ + { 0, "%s tileparams structure is not set" }, + + /* GCBVERR_TILE_VERS */ + { 3000, "%s tileparams structure has invalid size" }, + + /* GCBVERR_TILE_VIRTADDR: FIXME/TODO define error code */ + { 200, "%s tileparams virtual pointer is not set" }, + + /* GCBVERR_GEOM */ + { 1000, "%s geom structure is not set" }, + + /* GCBVERR_GEOM_VERS */ + { 1100, "%s geom structure has invalid size" }, + + /* GCBVERR_GEOM_FORMAT */ + { 1200, "%s invalid format specified" }, +}; + +static struct bvsurferrorid g_destsurferr = { "dst", BVERR_DSTDESC }; +static struct bvsurferrorid g_src1surferr = { "src1", BVERR_SRC1DESC }; +static struct bvsurferrorid g_src2surferr = { "src2", BVERR_SRC2DESC }; +static struct bvsurferrorid g_masksurferr = { "mask", BVERR_MASKDESC }; + + +/******************************************************************************* + * Callback info management. + */ + +/* BLTsville callback function. */ +struct gccallbackbltsville { + /* Function pointer. */ + void (*fn) (struct bvcallbackerror *err, unsigned long callbackdata); + + /* Callback data. */ + unsigned long data; +}; + +/* Information for freeing a surface. */ +struct gccallbackfreesurface { + /* Pointer to the buffer descriptor. */ + struct bvbuffdesc *desc; + + /* Pointer to the buffer. */ + void *ptr; +}; + +/* Callback information. */ +struct gccallbackinfo { + union { + /* BLTsville callback function. */ + struct gccallbackbltsville callback; + + /* Information for freeing a surface. */ + struct gccallbackfreesurface freesurface; + } info; + + /* Previous/next callback information. */ + struct list_head link; +}; + +static enum bverror get_callbackinfo(struct gccallbackinfo **gccallbackinfo) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct gccallbackinfo *temp; + + /* Lock access to callback info lists. */ + GCLOCK(&gccontext->callbacklock); + + if (list_empty(&gccontext->callbackvac)) { + temp = gcalloc(struct gccallbackinfo, + sizeof(struct gccallbackinfo)); + if (temp == NULL) { + bverror = BVERR_OOM; + goto exit; + } + list_add(&temp->link, &gccontext->callbacklist); + } else { + struct list_head *head; + head = gccontext->callbackvac.next; + temp = list_entry(head, struct gccallbackinfo, link); + list_move(head, &gccontext->callbacklist); + } + + *gccallbackinfo = temp; + bverror = BVERR_NONE; + +exit: + /* Unlock access to callback info lists. */ + GCUNLOCK(&gccontext->callbacklock); + + return bverror; +} + +static void free_callback(struct gccallbackinfo *gccallbackinfo) +{ + struct gccontext *gccontext = get_context(); + + /* Lock access to callback info lists. */ + GCLOCK(&gccontext->callbacklock); + + list_move(&gccallbackinfo->link, &gccontext->callbackvac); + + /* Unlock access to callback info lists. */ + GCUNLOCK(&gccontext->callbacklock); +} + +void callbackbltsville(void *callbackinfo) +{ + struct gccallbackinfo *gccallbackinfo; + + GCENTER(GCZONE_CALLBACK); + + gccallbackinfo = (struct gccallbackinfo *) callbackinfo; + GCDBG(GCZONE_CALLBACK, "bltsville_callback = 0x%08X\n", + (unsigned int) gccallbackinfo->info.callback.fn); + GCDBG(GCZONE_CALLBACK, "bltsville_param = 0x%08X\n", + (unsigned int) gccallbackinfo->info.callback.data); + + gccallbackinfo->info.callback.fn(NULL, + gccallbackinfo->info.callback.data); + free_callback(gccallbackinfo); + + GCEXIT(GCZONE_CALLBACK); +} + +void callbackfreesurface(void *callbackinfo) +{ + struct gccallbackinfo *gccallbackinfo; + + GCENTER(GCZONE_CALLBACK); + + gccallbackinfo = (struct gccallbackinfo *) callbackinfo; + GCDBG(GCZONE_CALLBACK, "freeing descriptir @ 0x%08X\n", + (unsigned int) gccallbackinfo->info.freesurface.desc); + GCDBG(GCZONE_CALLBACK, "freeing memory @ 0x%08X\n", + (unsigned int) gccallbackinfo->info.freesurface.ptr); + + free_surface(gccallbackinfo->info.freesurface.desc, + gccallbackinfo->info.freesurface.ptr); + free_callback(gccallbackinfo); + + GCEXIT(GCZONE_CALLBACK); +} + + +/******************************************************************************* + * Temporary buffer management. + */ + +enum bverror allocate_temp(struct bvbltparams *bvbltparams, + unsigned int size) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + + GCENTER(GCZONE_TEMP); + + /* Existing buffer too small? */ + if ((gccontext->tmpbuffdesc != NULL) && + (gccontext->tmpbuffdesc->length < size)) { + GCDBG(GCZONE_TEMP, "freeing current buffer.\n"); + bverror = free_temp(true); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + } + + /* Allocate new buffer if necessary. */ + if ((size > 0) && (gccontext->tmpbuffdesc == NULL)) { + /* Allocate temporary surface. */ + bverror = allocate_surface(&gccontext->tmpbuffdesc, + &gccontext->tmpbuff, + size); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + GCDBG(GCZONE_TEMP, "buffdesc @ 0x%08X\n", + gccontext->tmpbuffdesc); + GCDBG(GCZONE_TEMP, "allocated @ 0x%08X\n", + gccontext->tmpbuff); + GCDBG(GCZONE_TEMP, "size = %d\n", + size); + + /* Map the buffer explicitly. */ + bverror = bv_map(gccontext->tmpbuffdesc); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + } + + /* Success. */ + bverror = BVERR_NONE; + +exit: + GCEXIT(GCZONE_TEMP); + return bverror; +} + +enum bverror free_temp(bool schedule) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct gccallbackinfo *gccallbackinfo; + struct gcicallbackarm gcicallbackarm; + + /* Is the buffer allocated? */ + if (gccontext->tmpbuffdesc == NULL) { + bverror = BVERR_NONE; + goto exit; + } + + /* Unmap the buffer. */ + bverror = bv_unmap(gccontext->tmpbuffdesc); + if (bverror != BVERR_NONE) + goto exit; + + /* Cannot be mapped. */ + if (gccontext->tmpbuffdesc->map != NULL) { + BVSETERROR(BVERR_OOM, "temporary buffer is still mapped"); + goto exit; + } + + /* Free the buffer. */ + if (schedule) { + bverror = get_callbackinfo(&gccallbackinfo); + if (bverror != BVERR_NONE) { + BVSETERROR(BVERR_OOM, + "callback allocation failed"); + goto exit; + } + + gccallbackinfo->info.freesurface.desc = gccontext->tmpbuffdesc; + gccallbackinfo->info.freesurface.ptr = gccontext->tmpbuff; + gcicallbackarm.callback = callbackfreesurface; + gcicallbackarm.callbackparam = gccallbackinfo; + + /* Schedule to free the buffer. */ + gc_callback_wrapper(&gcicallbackarm); + + /* Error? */ + if (gcicallbackarm.gcerror != GCERR_NONE) { + BVSETERROR(BVERR_OOM, "unable to schedule callback"); + goto exit; + } + } else { + /* Free the buffer immediately. */ + free_surface(gccontext->tmpbuffdesc, gccontext->tmpbuff); + } + + /* Reset the buffer descriptor. */ + gccontext->tmpbuffdesc = NULL; + gccontext->tmpbuff = NULL; + +exit: + return bverror; +} + + +/******************************************************************************* + * Program the destination. + */ + +enum bverror set_dst(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct bvbuffmap *dstmap) +{ + enum bverror bverror = BVERR_NONE; + struct gcmodst *gcmodst; + + GCENTER(GCZONE_DEST); + + /* Did destination surface change? */ + if ((batch->batchflags & BVBATCH_DST) != 0) { + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmodst), + (void **) &gcmodst); + if (bverror != BVERR_NONE) + goto exit; + + /* Add the address fixup. */ + add_fixup(bvbltparams, batch, &gcmodst->address, + batch->dstbyteshift); + + /* Set surface parameters. */ + gcmodst->config_ldst = gcmodst_config_ldst; + gcmodst->address = GET_MAP_HANDLE(dstmap); + gcmodst->stride = bvbltparams->dstgeom->virtstride; + + /* Set surface width and height. */ + gcmodst->rotation.raw = 0; + gcmodst->rotation.reg.surf_width = batch->dstphyswidth; + gcmodst->rotationheight_ldst = gcmodst_rotationheight_ldst; + gcmodst->rotationheight.raw = 0; + gcmodst->rotationheight.reg.height = batch->dstphysheight; + + /* Disable hardware clipping. */ + gcmodst->clip_ldst = gcmodst_clip_ldst; + gcmodst->cliplt.raw = 0; + gcmodst->cliprb.raw = 0; + gcmodst->cliprb.reg.right = GC_CLIP_RESET_RIGHT; + gcmodst->cliprb.reg.bottom = GC_CLIP_RESET_BOTTOM; + } + +exit: + GCEXITARG(GCZONE_DEST, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +/******************************************************************************* + * Program blending. + */ + +enum bverror set_blending(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo) +{ + enum bverror bverror = BVERR_NONE; + struct gcmoalphaoff *gcmoalphaoff; + struct gcmoalpha *gcmoalpha; + struct gcmoglobal *gcmoglobal; + struct gcalpha *gca; + + GCENTER(GCZONE_BLEND); + + gca = srcinfo->gca; + if (gca == NULL) { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoalphaoff), + (void **) &gcmoalphaoff); + if (bverror != BVERR_NONE) + goto exit; + + gcmoalphaoff->control_ldst = gcmoalphaoff_control_ldst[0]; + gcmoalphaoff->control.reg = gcregalpha_off; + + GCDBG(GCZONE_BLEND, "blending disabled.\n"); + } else { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoalpha), + (void **) &gcmoalpha); + if (bverror != BVERR_NONE) + goto exit; + + gcmoalpha->config_ldst = gcmoalpha_config_ldst; + gcmoalpha->control.reg = gcregalpha_on; + + gcmoalpha->mode.raw = 0; + gcmoalpha->mode.reg.src_global_alpha_mode + = gca->src_global_alpha_mode; + gcmoalpha->mode.reg.dst_global_alpha_mode + = gca->dst_global_alpha_mode; + + gcmoalpha->mode.reg.src_blend + = gca->srcconfig->factor_mode; + gcmoalpha->mode.reg.src_color_reverse + = gca->srcconfig->color_reverse; + + gcmoalpha->mode.reg.dst_blend + = gca->dstconfig->factor_mode; + gcmoalpha->mode.reg.dst_color_reverse + = gca->dstconfig->color_reverse; + + GCDBG(GCZONE_BLEND, "dst blend:\n"); + GCDBG(GCZONE_BLEND, " factor = %d\n", + gcmoalpha->mode.reg.dst_blend); + GCDBG(GCZONE_BLEND, " inverse = %d\n", + gcmoalpha->mode.reg.dst_color_reverse); + + GCDBG(GCZONE_BLEND, "src blend:\n"); + GCDBG(GCZONE_BLEND, " factor = %d\n", + gcmoalpha->mode.reg.src_blend); + GCDBG(GCZONE_BLEND, " inverse = %d\n", + gcmoalpha->mode.reg.src_color_reverse); + + if ((gca->src_global_alpha_mode + != GCREG_GLOBAL_ALPHA_MODE_NORMAL) || + (gca->dst_global_alpha_mode + != GCREG_GLOBAL_ALPHA_MODE_NORMAL)) { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoglobal), + (void **) &gcmoglobal); + if (bverror != BVERR_NONE) + goto exit; + + gcmoglobal->color_ldst = gcmoglobal_color_ldst; + gcmoglobal->srcglobal.raw = gca->src_global_color; + gcmoglobal->dstglobal.raw = gca->dst_global_color; + } + } + +exit: + GCEXITARG(GCZONE_BLEND, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror set_blending_index(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + unsigned int index) +{ + enum bverror bverror = BVERR_NONE; + struct gcmoalphaoff *gcmoalphaoff; + struct gcmoxsrcalpha *gcmoxsrcalpha; + struct gcmoxsrcglobal *gcmoxsrcglobal; + struct gcalpha *gca; + + GCENTER(GCZONE_BLEND); + + gca = srcinfo->gca; + if (gca == NULL) { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoalphaoff), + (void **) &gcmoalphaoff); + if (bverror != BVERR_NONE) + goto exit; + + gcmoalphaoff->control_ldst = gcmoalphaoff_control_ldst[index]; + gcmoalphaoff->control.reg = gcregalpha_off; + + GCDBG(GCZONE_BLEND, "blending disabled.\n"); + } else { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoxsrcalpha), + (void **) &gcmoxsrcalpha); + if (bverror != BVERR_NONE) + goto exit; + + gcmoxsrcalpha->control_ldst = gcmoxsrcalpha_control_ldst[index]; + gcmoxsrcalpha->control.reg = gcregalpha_on; + + gcmoxsrcalpha->mode_ldst = gcmoxsrcalpha_mode_ldst[index]; + gcmoxsrcalpha->mode.raw = 0; + gcmoxsrcalpha->mode.reg.src_global_alpha_mode + = gca->src_global_alpha_mode; + gcmoxsrcalpha->mode.reg.dst_global_alpha_mode + = gca->dst_global_alpha_mode; + + gcmoxsrcalpha->mode.reg.src_blend + = gca->srcconfig->factor_mode; + gcmoxsrcalpha->mode.reg.src_color_reverse + = gca->srcconfig->color_reverse; + + gcmoxsrcalpha->mode.reg.dst_blend + = gca->dstconfig->factor_mode; + gcmoxsrcalpha->mode.reg.dst_color_reverse + = gca->dstconfig->color_reverse; + + GCDBG(GCZONE_BLEND, "dst blend:\n"); + GCDBG(GCZONE_BLEND, " factor = %d\n", + gcmoxsrcalpha->mode.reg.dst_blend); + GCDBG(GCZONE_BLEND, " inverse = %d\n", + gcmoxsrcalpha->mode.reg.dst_color_reverse); + + GCDBG(GCZONE_BLEND, "src blend:\n"); + GCDBG(GCZONE_BLEND, " factor = %d\n", + gcmoxsrcalpha->mode.reg.src_blend); + GCDBG(GCZONE_BLEND, " inverse = %d\n", + gcmoxsrcalpha->mode.reg.src_color_reverse); + + if ((gca->src_global_alpha_mode + != GCREG_GLOBAL_ALPHA_MODE_NORMAL) || + (gca->dst_global_alpha_mode + != GCREG_GLOBAL_ALPHA_MODE_NORMAL)) { + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoxsrcglobal), + (void **) &gcmoxsrcglobal); + if (bverror != BVERR_NONE) + goto exit; + + gcmoxsrcglobal->srcglobal_ldst + = gcmoxsrcglobal_srcglobal_ldst[index]; + gcmoxsrcglobal->srcglobal.raw = gca->src_global_color; + + gcmoxsrcglobal->dstglobal_ldst + = gcmoxsrcglobal_dstglobal_ldst[index]; + gcmoxsrcglobal->dstglobal.raw = gca->dst_global_color; + } + } + +exit: + GCEXITARG(GCZONE_BLEND, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +/******************************************************************************* + * Program YUV source. + */ + +void set_computeyuv(struct surfaceinfo *srcinfo, int x, int y) +{ + int pixalign, bytealign; + unsigned int height1, size1; + unsigned int height2, size2; + unsigned int origin; + int ssX, ssY; + + GCENTER(GCZONE_SRC); + + /* Compute base address alignment. */ + pixalign = get_pixel_offset(srcinfo, 0); + bytealign = (pixalign * (int) srcinfo->format.bitspp) / 8; + + /* Determine the physical height of the first plane. */ + height1 = ((srcinfo->angle % 2) == 0) + ? srcinfo->geom->height + : srcinfo->geom->width; + + /* Determine the size of the first plane. */ + size1 = srcinfo->geom->virtstride * height1; + + /* Determine the stride of the second plane. */ + srcinfo->stride2 = srcinfo->geom->virtstride + / srcinfo->format.cs.yuv.xsample; + + /* Determine subsample pixel position. */ + ssX = x / srcinfo->format.cs.yuv.xsample; + ssY = y / srcinfo->format.cs.yuv.ysample; + + switch (srcinfo->format.cs.yuv.planecount) { + case 2: + /* U and V are interleaved in one plane. */ + ssX *= 2; + srcinfo->stride2 *= 2; + + /* Determnine the origin offset. */ + origin = ssY * srcinfo->stride2 + ssX; + + /* Compute the alignment of the second plane. */ + srcinfo->bytealign2 = bytealign + size1 + origin; + + GCDBG(GCZONE_SRC, "plane2 offset (bytes) = 0x%08X\n", + srcinfo->bytealign2); + GCDBG(GCZONE_SRC, "plane2 stride = %d\n", + srcinfo->stride2); + break; + + case 3: + /* Determine the physical height of the U/V planes. */ + height2 = height1 / srcinfo->format.cs.yuv.ysample; + + /* Determine the size of the U/V planes. */ + size2 = srcinfo->stride2 * height2; + + /* Determnine the origin offset. */ + origin = ssY * srcinfo->stride2 + ssX; + + /* Compute the alignment of the U/V planes. */ + srcinfo->bytealign2 = bytealign + size1 + origin; + srcinfo->bytealign3 = bytealign + size1 + size2 + origin; + + /* Determine the stride of the U/V planes. */ + srcinfo->stride3 = srcinfo->stride2; + + GCDBG(GCZONE_SRC, "plane2 offset (bytes) = 0x%08X\n", + srcinfo->bytealign2); + GCDBG(GCZONE_SRC, "plane2 stride = %d\n", + srcinfo->stride2); + GCDBG(GCZONE_SRC, "plane3 offset (bytes) = 0x%08X\n", + srcinfo->bytealign3); + GCDBG(GCZONE_SRC, "plane3 stride = %d\n", + srcinfo->stride3); + break; + } + + GCEXIT(GCZONE_SRC); +} + +enum bverror set_yuvsrc(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + struct bvbuffmap *srcmap) +{ + enum bverror bverror = BVERR_NONE; + struct gcmoyuv1 *gcmoyuv1; + struct gcmoyuv2 *gcmoyuv2; + struct gcmoyuv3 *gcmoyuv3; + + GCENTER(GCZONE_SRC); + + GCDBG(GCZONE_SRC, "plane count %d.\n", + srcinfo->format.cs.yuv.planecount); + + switch (srcinfo->format.cs.yuv.planecount) { + case 1: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoyuv1), + (void **) &gcmoyuv1); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoyuv1->pectrl_ldst = gcmoyuv_pectrl_ldst; + gcmoyuv1->pectrl.raw = 0; + gcmoyuv1->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoyuv1->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoyuv1->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + break; + + case 2: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoyuv2), + (void **) &gcmoyuv2); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoyuv2->pectrl_ldst = gcmoyuv_pectrl_ldst; + gcmoyuv2->pectrl.raw = 0; + gcmoyuv2->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoyuv2->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoyuv2->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + + /* Program U/V plane. */ + add_fixup(bvbltparams, batch, &gcmoyuv2->uplaneaddress, + srcinfo->bytealign2); + gcmoyuv2->plane_ldst = gcmoyuv2_plane_ldst; + gcmoyuv2->uplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoyuv2->uplanestride = srcinfo->stride2; + break; + + case 3: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoyuv3), + (void **) &gcmoyuv3); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoyuv3->pectrl_ldst = gcmoyuv_pectrl_ldst; + gcmoyuv3->pectrl.raw = 0; + gcmoyuv3->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoyuv3->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoyuv3->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + + /* Program U/V planes. */ + add_fixup(bvbltparams, batch, &gcmoyuv3->uplaneaddress, + srcinfo->bytealign2); + add_fixup(bvbltparams, batch, &gcmoyuv3->vplaneaddress, + srcinfo->bytealign3); + gcmoyuv3->plane_ldst = gcmoyuv3_plane_ldst; + gcmoyuv3->uplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoyuv3->uplanestride = srcinfo->stride2; + gcmoyuv3->vplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoyuv3->vplanestride = srcinfo->stride3; + break; + + default: + GCERR("invlaid plane count %d.\n", + srcinfo->format.cs.yuv.planecount); + } + +exit: + GCEXITARG(GCZONE_SRC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror set_yuvsrc_index(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + struct bvbuffmap *srcmap, + unsigned int index) +{ + enum bverror bverror = BVERR_NONE; + struct gcmoxsrcyuv1 *gcmoxsrcyuv1; + struct gcmoxsrcyuv2 *gcmoxsrcyuv2; + struct gcmoxsrcyuv3 *gcmoxsrcyuv3; + + GCENTER(GCZONE_SRC); + + GCDBG(GCZONE_SRC, "plane count %d.\n", + srcinfo->format.cs.yuv.planecount); + + switch (srcinfo->format.cs.yuv.planecount) { + case 1: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoxsrcyuv1), + (void **) &gcmoxsrcyuv1); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoxsrcyuv1->pectrl_ldst + = gcmoxsrcyuv_pectrl_ldst[index]; + gcmoxsrcyuv1->pectrl.raw = 0; + gcmoxsrcyuv1->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoxsrcyuv1->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoxsrcyuv1->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + break; + + case 2: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoxsrcyuv2), + (void **) &gcmoxsrcyuv2); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoxsrcyuv2->pectrl_ldst + = gcmoxsrcyuv_pectrl_ldst[index]; + gcmoxsrcyuv2->pectrl.raw = 0; + gcmoxsrcyuv2->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoxsrcyuv2->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoxsrcyuv2->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + + /* Program U/V plane. */ + add_fixup(bvbltparams, batch, &gcmoxsrcyuv2->uplaneaddress, + srcinfo->bytealign2); + gcmoxsrcyuv2->uplaneaddress_ldst + = gcmoxsrcyuv_uplaneaddress_ldst[index]; + gcmoxsrcyuv2->uplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoxsrcyuv2->uplanestride_ldst + = gcmoxsrcyuv_uplanestride_ldst[index]; + gcmoxsrcyuv2->uplanestride = srcinfo->stride2; + break; + + case 3: + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmoxsrcyuv3), + (void **) &gcmoxsrcyuv3); + if (bverror != BVERR_NONE) + goto exit; + + /* Set YUV parameters. */ + gcmoxsrcyuv3->pectrl_ldst + = gcmoxsrcyuv_pectrl_ldst[index]; + gcmoxsrcyuv3->pectrl.raw = 0; + gcmoxsrcyuv3->pectrl.reg.standard + = srcinfo->format.cs.yuv.std; + gcmoxsrcyuv3->pectrl.reg.swizzle + = srcinfo->format.swizzle; + gcmoxsrcyuv3->pectrl.reg.convert + = GCREG_PE_CONTROL_YUVRGB_DISABLED; + + /* Program U/V planes. */ + add_fixup(bvbltparams, batch, &gcmoxsrcyuv3->uplaneaddress, + srcinfo->bytealign2); + add_fixup(bvbltparams, batch, &gcmoxsrcyuv3->vplaneaddress, + srcinfo->bytealign3); + gcmoxsrcyuv3->uplaneaddress_ldst + = gcmoxsrcyuv_uplaneaddress_ldst[index]; + gcmoxsrcyuv3->uplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoxsrcyuv3->uplanestride_ldst + = gcmoxsrcyuv_uplanestride_ldst[index]; + gcmoxsrcyuv3->uplanestride = srcinfo->stride2; + gcmoxsrcyuv3->vplaneaddress_ldst + = gcmoxsrcyuv_vplaneaddress_ldst[index]; + gcmoxsrcyuv3->vplaneaddress = GET_MAP_HANDLE(srcmap); + gcmoxsrcyuv3->vplanestride_ldst + = gcmoxsrcyuv_vplanestride_ldst[index]; + gcmoxsrcyuv3->vplanestride = srcinfo->stride3; + break; + + default: + GCERR("invlaid plane count %d.\n", + srcinfo->format.cs.yuv.planecount); + } + +exit: + GCEXITARG(GCZONE_SRC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +/******************************************************************************* + * Surface compare and validation. + */ + +static inline bool equal_rects(struct bvrect *rect1, struct bvrect *rect2) +{ + if (rect1->left != rect2->left) + return false; + + if (rect1->top != rect2->top) + return false; + + if (rect1->width != rect2->width) + return false; + + if (rect1->height != rect2->height) + return false; + + return true; +} + +/* The function verifies whether the two buffer descriptors and rectangles + define the same physical area. */ +static bool same_phys_area(struct bvbuffdesc *surf1, struct bvrect *rect1, + struct bvbuffdesc *surf2, struct bvrect *rect2) +{ + struct bvphysdesc *physdesc1; + struct bvphysdesc *physdesc2; + + /* If pointers are the same, things are much easier. */ + if (surf1 == surf2) + /* Compare the rectangles. For simplicity we don't consider + cases with partially overlapping rectangles at this time. */ + return equal_rects(rect1, rect2); + + /* Assume diffrent areas if the types are different. */ + if (surf1->auxtype != surf2->auxtype) + return false; + + if (surf1->auxtype == BVAT_PHYSDESC) { + physdesc1 = (struct bvphysdesc *) surf1->auxptr; + physdesc2 = (struct bvphysdesc *) surf2->auxptr; + + /* Same physical descriptor? */ + if (physdesc1 == physdesc2) + return equal_rects(rect1, rect2); + + /* Same page array? */ + if (physdesc1->pagearray == physdesc2->pagearray) + return equal_rects(rect1, rect2); + + /* Pageoffsets must match since different buffers + * can share the same first page (eg nv12). + */ + if (physdesc1->pageoffset != physdesc2->pageoffset) + return false; + + /* Assume the same surface if first pages match. */ + if (physdesc1->pagearray[0] == physdesc2->pagearray[0]) + return equal_rects(rect1, rect2); + + } else { + if (surf1->virtaddr == surf2->virtaddr) + return equal_rects(rect1, rect2); + } + + return false; +} + +static int verify_surface(unsigned int tile, + union bvinbuff *surf, + struct bvsurfgeom *geom) +{ + if (tile) { + if (surf->tileparams == NULL) + return GCBVERR_TILE; + + if (surf->tileparams->structsize < + STRUCTSIZE(surf->tileparams, srcheight)) + return GCBVERR_TILE_VERS; + + /* FIXME/TODO */ + return GCBVERR_TILE; + } else { + if (surf->desc == NULL) + return GCBVERR_DESC; + + if (surf->desc->structsize < STRUCTSIZE(surf->desc, map)) + return GCBVERR_DESC_VERS; + } + + if (geom == NULL) + return GCBVERR_GEOM; + + if (geom->structsize < STRUCTSIZE(geom, palette)) + return GCBVERR_GEOM_VERS; + + /* Validation successful. */ + return -1; +} + + +/******************************************************************************* + * Library constructor and destructor. + */ + +void bv_init(void) +{ + struct gccontext *gccontext = get_context(); + struct gcicaps gcicaps; + unsigned i, j; + + GCDBG_REGISTER(bv); + GCDBG_REGISTER(parser); + GCDBG_REGISTER(map); + GCDBG_REGISTER(buffer); + GCDBG_REGISTER(fill); + GCDBG_REGISTER(blit); + GCDBG_REGISTER(filter); + + GCLOCK_INIT(&gccontext->batchlock); + GCLOCK_INIT(&gccontext->bufferlock); + GCLOCK_INIT(&gccontext->fixuplock); + GCLOCK_INIT(&gccontext->maplock); + GCLOCK_INIT(&gccontext->callbacklock); + + INIT_LIST_HEAD(&gccontext->unmapvac); + INIT_LIST_HEAD(&gccontext->buffervac); + INIT_LIST_HEAD(&gccontext->fixupvac); + INIT_LIST_HEAD(&gccontext->batchvac); + INIT_LIST_HEAD(&gccontext->callbacklist); + INIT_LIST_HEAD(&gccontext->callbackvac); + + /* Initialize the filter cache. */ + for (i = 0; i < GC_FILTER_COUNT; i += 1) + for (j = 0; j < GC_TAP_COUNT; j += 1) + INIT_LIST_HEAD(&gccontext->filtercache[i][j].list); + + /* Query hardware caps. */ + gc_getcaps_wrapper(&gcicaps); + if (gcicaps.gcerror == GCERR_NONE) { + gccontext->gcmodel = gcicaps.gcmodel; + gccontext->gcrevision = gcicaps.gcrevision; + gccontext->gcdate = gcicaps.gcdate; + gccontext->gctime = gcicaps.gctime; + gccontext->gcfeatures = gcicaps.gcfeatures; + gccontext->gcfeatures0 = gcicaps.gcfeatures0; + gccontext->gcfeatures1 = gcicaps.gcfeatures1; + gccontext->gcfeatures2 = gcicaps.gcfeatures2; + gccontext->gcfeatures3 = gcicaps.gcfeatures3; + } +} + +void bv_exit(void) +{ + struct gccontext *gccontext = get_context(); + struct bvbuffmap *bvbuffmap; + struct list_head *head; + struct gcschedunmap *gcschedunmap; + struct gcbuffer *gcbuffer; + struct gcfixup *gcfixup; + struct gcbatch *gcbatch; + struct gccallbackinfo *gccallbackinfo; + + while (gccontext->buffmapvac != NULL) { + bvbuffmap = gccontext->buffmapvac; + gccontext->buffmapvac = bvbuffmap->nextmap; + gcfree(bvbuffmap); + } + + while (!list_empty(&gccontext->unmapvac)) { + head = gccontext->unmapvac.next; + gcschedunmap = list_entry(head, struct gcschedunmap, link); + list_del(head); + gcfree(gcschedunmap); + } + + while (!list_empty(&gccontext->buffervac)) { + head = gccontext->buffervac.next; + gcbuffer = list_entry(head, struct gcbuffer, link); + list_del(head); + gcfree(gcbuffer); + } + + while (!list_empty(&gccontext->fixupvac)) { + head = gccontext->fixupvac.next; + gcfixup = list_entry(head, struct gcfixup, link); + list_del(head); + gcfree(gcfixup); + } + + while (!list_empty(&gccontext->batchvac)) { + head = gccontext->batchvac.next; + gcbatch = list_entry(head, struct gcbatch, link); + list_del(head); + gcfree(gcbatch); + } + + while (!list_empty(&gccontext->callbacklist)) { + head = gccontext->callbacklist.next; + list_move(head, &gccontext->callbackvac); + } + + while (!list_empty(&gccontext->callbackvac)) { + head = gccontext->callbackvac.next; + gccallbackinfo = list_entry(head, struct gccallbackinfo, link); + list_del(head); + gcfree(gccallbackinfo); + } + + free_temp(false); +} + + +/******************************************************************************* + * Library API. + */ + +enum bverror bv_map(struct bvbuffdesc *bvbuffdesc) +{ + enum bverror bverror; + struct bvbuffmap *bvbuffmap; + + GCENTERARG(GCZONE_MAPPING, "bvbuffdesc = 0x%08X\n", + (unsigned int) bvbuffdesc); + + if (bvbuffdesc == NULL) { + BVSETERROR(BVERR_BUFFERDESC, "bvbuffdesc is NULL"); + goto exit; + } + + if (bvbuffdesc->structsize < STRUCTSIZE(bvbuffdesc, map)) { + BVSETERROR(BVERR_BUFFERDESC_VERS, "argument has invalid size"); + goto exit; + } + + bverror = do_map(bvbuffdesc, NULL, &bvbuffmap); + +exit: + GCEXITARG(GCZONE_MAPPING, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror bv_unmap(struct bvbuffdesc *bvbuffdesc) +{ + enum bverror bverror = BVERR_NONE; + enum bverror otherbverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + struct bvbuffmap *prev = NULL; + struct bvbuffmap *bvbuffmap; + struct bvbuffmapinfo *bvbuffmapinfo; + struct gcimap gcimap; + + GCENTERARG(GCZONE_MAPPING, "bvbuffdesc = 0x%08X\n", + (unsigned int) bvbuffdesc); + + /* Lock access to the mapping list. */ + GCLOCK(&gccontext->maplock); + + if (bvbuffdesc == NULL) { + BVSETERROR(BVERR_BUFFERDESC, "bvbuffdesc is NULL"); + goto exit; + } + + if (bvbuffdesc->structsize < STRUCTSIZE(bvbuffdesc, map)) { + BVSETERROR(BVERR_BUFFERDESC_VERS, "argument has invalid size"); + goto exit; + } + + /* Is the buffer mapped? */ + bvbuffmap = bvbuffdesc->map; + if (bvbuffmap == NULL) { + GCDBG(GCZONE_MAPPING, "buffer isn't mapped.\n"); + goto exit; + } + + /* Try to find our mapping. */ + while (bvbuffmap != NULL) { + if (bvbuffmap->bv_unmap == bv_unmap) + break; + prev = bvbuffmap; + bvbuffmap = bvbuffmap->nextmap; + } + + /* Are there other implementations? */ + if ((prev != NULL) || (bvbuffmap->nextmap != NULL)) { + GCDBG(GCZONE_MAPPING, + "have mappings from other implementations.\n"); + + /* Was our mapping found? */ + if (bvbuffmap == NULL) { + GCDBG(GCZONE_MAPPING, + "no mapping from our implementation.\n"); + + /* No, call other implementations. */ + bverror = bvbuffdesc->map->bv_unmap(bvbuffdesc); + goto exit; + } + + if (bvbuffmap->structsize + < STRUCTSIZE(bvbuffmap, nextmap)) { + BVSETERROR(BVERR_BUFFERDESC_VERS, + "unsupported bvbuffdesc version"); + goto exit; + } + + /* Remove our mapping. */ + if (prev == NULL) + bvbuffdesc->map = bvbuffmap->nextmap; + else + prev->nextmap = bvbuffmap->nextmap; + + /* Call other implementation. */ + otherbverror = bvbuffdesc->map->bv_unmap(bvbuffdesc); + + /* Add our mapping back. */ + bvbuffmap->nextmap = bvbuffdesc->map; + bvbuffdesc->map = bvbuffmap; + prev = NULL; + } else { + GCDBG(GCZONE_MAPPING, + "no mappings from other implementations.\n"); + } + + /* Get the info structure. */ + bvbuffmapinfo = (struct bvbuffmapinfo *) bvbuffmap->handle; + + GCDBG(GCZONE_MAPPING, "bvbuffmap = 0x%08X\n", (unsigned int) bvbuffmap); + GCDBG(GCZONE_MAPPING, "handle = 0x%08X\n", bvbuffmapinfo->handle); + + /* Explicit unmapping. */ + if (bvbuffmapinfo->usermap == 0) + GCERR("explicit count is already zero.\n"); + bvbuffmapinfo->usermap = 0; + + GCDBG(GCZONE_MAPPING, "explicit count = %d\n", + bvbuffmapinfo->usermap); + GCDBG(GCZONE_MAPPING, "implicit count = %d\n", + bvbuffmapinfo->automap); + + /* Do we have implicit mappings? */ + if (bvbuffmapinfo->automap > 0) { + GCDBG(GCZONE_MAPPING, "have implicit unmappings.\n"); + goto exit; + } + + /* Unmap the buffer. */ + memset(&gcimap, 0, sizeof(gcimap)); + gcimap.handle = bvbuffmapinfo->handle; + gc_unmap_wrapper(&gcimap); + if (gcimap.gcerror != GCERR_NONE) { + BVSETERROR(BVERR_OOM, "unable to free gccore memory"); + goto exit; + } + + /* Remove from the buffer descriptor list. */ + if (prev == NULL) + bvbuffdesc->map = bvbuffmap->nextmap; + else + prev->nextmap = bvbuffmap->nextmap; + + /* Invalidate the record. */ + bvbuffmap->structsize = 0; + + /* Add to the vacant list. */ + bvbuffmap->nextmap = gccontext->buffmapvac; + gccontext->buffmapvac = bvbuffmap; + +exit: + /* Unlock access to the mapping list. */ + GCUNLOCK(&gccontext->maplock); + + GCEXITARG(GCZONE_MAPPING, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror bv_blt(struct bvbltparams *bvbltparams) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + struct gcalpha *gca = NULL; + struct gcalpha _gca; + unsigned int op, type, blend, format; + unsigned int batchexec = 0; + bool nop = false; + struct gcbatch *gcbatch; + struct bvrect *dstrect; + int src1used, src2used, maskused; + struct surfaceinfo srcinfo[2]; + struct bvrect *srcrect[2]; + unsigned short rop; + struct gcicommit gcicommit; + int i, srccount, res; + + GCENTERARG(GCZONE_BLIT, "bvbltparams = 0x%08X\n", + (unsigned int) bvbltparams); + + /* Verify blt parameters structure. */ + if (bvbltparams == NULL) { + BVSETERROR(BVERR_BLTPARAMS_VERS, "bvbltparams is NULL"); + goto exit; + } + + if (bvbltparams->structsize < STRUCTSIZE(bvbltparams, callbackdata)) { + BVSETERROR(BVERR_BLTPARAMS_VERS, "argument has invalid size"); + goto exit; + } + + /* Reset the error message. */ + bvbltparams->errdesc = NULL; + + /* Verify the destination parameters structure. */ + res = verify_surface(0, (union bvinbuff *) &bvbltparams->dstdesc, + bvbltparams->dstgeom); + if (res != -1) { + BVSETBLTSURFERROR(res, g_destsurferr); + goto exit; + } + + /* Extract the operation flags. */ + op = (bvbltparams->flags & BVFLAG_OP_MASK) >> BVFLAG_OP_SHIFT; + type = (bvbltparams->flags & BVFLAG_BATCH_MASK) >> BVFLAG_BATCH_SHIFT; + GCDBG(GCZONE_BLIT, "op = %d\n", op); + GCDBG(GCZONE_BLIT, "type = %d\n", type); + + switch (type) { + case (BVFLAG_BATCH_NONE >> BVFLAG_BATCH_SHIFT): + bverror = allocate_batch(bvbltparams, &gcbatch); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + batchexec = 1; + gcbatch->batchflags = 0x7FFFFFFF; + + GCDBG(GCZONE_BATCH, "BVFLAG_BATCH_NONE(0x%08X)\n", + (unsigned int) gcbatch); + break; + + case (BVFLAG_BATCH_BEGIN >> BVFLAG_BATCH_SHIFT): + bverror = allocate_batch(bvbltparams, &gcbatch); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + bvbltparams->batch = (struct bvbatch *) gcbatch; + + batchexec = 0; + bvbltparams->batchflags = + gcbatch->batchflags = 0x7FFFFFFF; + + GCDBG(GCZONE_BATCH, "BVFLAG_BATCH_BEGIN(0x%08X)\n", + (unsigned int) gcbatch); + break; + + case (BVFLAG_BATCH_CONTINUE >> BVFLAG_BATCH_SHIFT): + gcbatch = (struct gcbatch *) bvbltparams->batch; + if (gcbatch == NULL) { + BVSETBLTERROR(BVERR_BATCH, "batch is not initialized"); + goto exit; + } + + if (gcbatch->structsize < STRUCTSIZE(gcbatch, unmap)) { + BVSETBLTERROR(BVERR_BATCH, "invalid batch"); + goto exit; + } + + batchexec = 0; + gcbatch->batchflags = bvbltparams->batchflags; + + GCDBG(GCZONE_BATCH, "BVFLAG_BATCH_CONTINUE(0x%08X)\n", + (unsigned int) gcbatch); + break; + + case (BVFLAG_BATCH_END >> BVFLAG_BATCH_SHIFT): + gcbatch = (struct gcbatch *) bvbltparams->batch; + if (gcbatch == NULL) { + BVSETBLTERROR(BVERR_BATCH, "batch is not initialized"); + goto exit; + } + + if (gcbatch->structsize < STRUCTSIZE(gcbatch, unmap)) { + BVSETBLTERROR(BVERR_BATCH, "invalid batch"); + goto exit; + } + + batchexec = 1; + nop = (bvbltparams->batchflags & BVBATCH_ENDNOP) != 0; + gcbatch->batchflags = bvbltparams->batchflags; + + GCDBG(GCZONE_BATCH, "BVFLAG_BATCH_END(0x%08X)\n", + (unsigned int) gcbatch); + break; + + default: + BVSETBLTERROR(BVERR_BATCH, "unrecognized batch type"); + goto exit; + } + + GCDBG(GCZONE_BATCH, "batchflags=0x%08X\n", + (unsigned int) gcbatch->batchflags); + + if (!nop) { + /* Get a shortcut to the destination rectangle. */ + dstrect = &bvbltparams->dstrect; + + /* Verify the batch change flags. */ + GCVERIFYBATCH(gcbatch->batchflags >> 12, + &gcbatch->prevdstrect, dstrect); + + switch (op) { + case (BVFLAG_ROP >> BVFLAG_OP_SHIFT): + GCDBG(GCZONE_BLIT, "BVFLAG_ROP\n"); + + rop = bvbltparams->op.rop; + src1used = ((rop & 0xCCCC) >> 2) + ^ (rop & 0x3333); + src2used = ((rop & 0xF0F0) >> 4) + ^ (rop & 0x0F0F); + maskused = ((rop & 0xFF00) >> 8) + ^ (rop & 0x00FF); + break; + + case (BVFLAG_BLEND >> BVFLAG_OP_SHIFT): + GCDBG(GCZONE_BLIT, "BVFLAG_BLEND\n"); + + blend = bvbltparams->op.blend; + format = (blend & BVBLENDDEF_FORMAT_MASK) + >> BVBLENDDEF_FORMAT_SHIFT; + + bverror = parse_blend(bvbltparams, blend, &_gca); + if (bverror != BVERR_NONE) + goto exit; + + gca = &_gca; + + switch (format) { + case (BVBLENDDEF_FORMAT_CLASSIC + >> BVBLENDDEF_FORMAT_SHIFT): + src1used = gca->src1used; + src2used = gca->src2used; + maskused = blend & BVBLENDDEF_REMOTE; + break; + + default: + BVSETBLTERROR(BVERR_BLEND, + "unrecognized blend format"); + goto exit; + } + break; + + case (BVFLAG_FILTER >> BVFLAG_OP_SHIFT): + GCDBG(GCZONE_BLIT, "BVFLAG_FILTER\n"); + BVSETBLTERROR(BVERR_OP, + "filter operation not supported"); + goto exit; + + default: + BVSETBLTERROR(BVERR_OP, "unrecognized operation"); + goto exit; + } + + /* Reset the number of sources. */ + srccount = 0; + + /* Verify the src1 parameters structure. */ + if (src1used) { + GCDBG(GCZONE_SRC, "source #1: used\n"); + res = verify_surface( + bvbltparams->flags & BVBATCH_TILE_SRC1, + &bvbltparams->src1, bvbltparams->src1geom); + if (res != -1) { + BVSETBLTSURFERROR(res, g_src1surferr); + goto exit; + } + + /* Verify the batch change flags. */ + GCVERIFYBATCH(gcbatch->batchflags >> 14, + &gcbatch->prevsrc1rect, + &bvbltparams->src1rect); + + /* Same as the destination? */ + if (same_phys_area(bvbltparams->src1.desc, + &bvbltparams->src1rect, + bvbltparams->dstdesc, + dstrect)) { + GCDBG(GCZONE_BLIT, " same as destination\n"); + } else { + srcinfo[srccount].index = 0; + srcinfo[srccount].buf = bvbltparams->src1; + srcinfo[srccount].geom = bvbltparams->src1geom; + srcinfo[srccount].newgeom + = gcbatch->batchflags + & BVBATCH_SRC1; + srcinfo[srccount].newrect + = gcbatch->batchflags + & (BVBATCH_SRC1RECT_ORIGIN | + BVBATCH_SRC1RECT_SIZE); + srcrect[srccount] = &bvbltparams->src1rect; + + bverror = parse_source(bvbltparams, gcbatch, + &bvbltparams->src1rect, + &srcinfo[srccount]); + if (bverror != BVERR_NONE) + goto exit; + + srccount += 1; + } + } + + /* Verify the src2 parameters structure. */ + if (src2used) { + GCDBG(GCZONE_SRC, "source #2: used\n"); + res = verify_surface( + bvbltparams->flags & BVBATCH_TILE_SRC2, + &bvbltparams->src2, bvbltparams->src2geom); + if (res != -1) { + BVSETBLTSURFERROR(res, g_src2surferr); + goto exit; + } + + /* Verify the batch change flags. */ + GCVERIFYBATCH(gcbatch->batchflags >> 16, + &gcbatch->prevsrc2rect, + &bvbltparams->src2rect); + + /* Same as the destination? */ + if (same_phys_area(bvbltparams->src2.desc, + &bvbltparams->src2rect, + bvbltparams->dstdesc, + dstrect)) { + GCDBG(GCZONE_BLIT, " same as destination\n"); + } else { + srcinfo[srccount].index = 1; + srcinfo[srccount].buf = bvbltparams->src2; + srcinfo[srccount].geom = bvbltparams->src2geom; + srcinfo[srccount].newgeom + = gcbatch->batchflags + & BVBATCH_SRC2; + srcinfo[srccount].newrect + = gcbatch->batchflags + & (BVBATCH_SRC2RECT_ORIGIN | + BVBATCH_SRC2RECT_SIZE); + srcrect[srccount] = &bvbltparams->src2rect; + + bverror = parse_source(bvbltparams, gcbatch, + &bvbltparams->src2rect, + &srcinfo[srccount]); + if (bverror != BVERR_NONE) + goto exit; + + srccount += 1; + } + } + + /* Verify the mask parameters structure. */ + if (maskused) { + GCDBG(GCZONE_MASK, "mask: used\n"); + res = verify_surface( + bvbltparams->flags & BVBATCH_TILE_MASK, + &bvbltparams->mask, bvbltparams->maskgeom); + if (res != -1) { + BVSETBLTSURFERROR(res, g_masksurferr); + goto exit; + } + + /* Verify the batch change flags. */ + GCVERIFYBATCH(gcbatch->batchflags >> 18, + &gcbatch->prevmaskrect, + &bvbltparams->maskrect); + + BVSETBLTERROR(BVERR_OP, + "operation with mask not supported"); + goto exit; + } + + GCDBG(GCZONE_BLIT, "srccount = %d\n", srccount); + + if (srccount == 0) { + BVSETBLTERROR(BVERR_OP, + "operation not supported"); + goto exit; + } else { + for (i = 0; i < srccount; i += 1) { + int srcw, srch; + GCDBG(GCZONE_BLIT, + "processing source %d.\n", + srcinfo[i].index + 1); + + if (gca == NULL) { + GCDBG(GCZONE_BLIT, + " blending disabled.\n"); + srcinfo[i].rop = bvbltparams->op.rop; + srcinfo[i].gca = NULL; + } else if ((i + 1) != srccount) { + GCDBG(GCZONE_BLIT, + " disabling blending for " + "the first source.\n"); + srcinfo[i].rop = 0xCC; + srcinfo[i].gca = NULL; + } else { + GCDBG(GCZONE_BLIT, + " enabling blending.\n"); + srcinfo[i].rop = 0xCC; + srcinfo[i].gca = gca; + + if (srccount == 1) { + gca->srcconfig = gca->k1; + gca->dstconfig = gca->k2; + } else { + gca->srcconfig = gca->k2; + gca->dstconfig = gca->k1; + } + } + + GCDBG(GCZONE_BLIT, " srcsize %dx%d.\n", + srcrect[i]->width, srcrect[i]->height); + GCDBG(GCZONE_BLIT, " dstsize %dx%d.\n", + dstrect->width, dstrect->height); + + srcw = srcrect[i]->width; + srch = srcrect[i]->height; + if ((srcw == 1) && (srch == 1) && + (bvbltparams->src1.desc->virtaddr)) { + GCDBG(GCZONE_BLIT, " op: fill.\n"); + bverror = do_fill(bvbltparams, + gcbatch, + &srcinfo[i]); + } else if ((srcw == dstrect->width) && + (srch == dstrect->height)) { + GCDBG(GCZONE_BLIT, " op: bitblit.\n"); + bverror = do_blit(bvbltparams, + gcbatch, + &srcinfo[i]); + } else { + GCDBG(GCZONE_BLIT, " op: filter.\n"); + bverror = do_filter(bvbltparams, + gcbatch, + &srcinfo[i]); + } + + if (bverror != BVERR_NONE) + goto exit; + } + } + } + + if (batchexec) { + struct gcmoflush *flush; + + GCDBG(GCZONE_BLIT, "preparing to submit the batch.\n"); + + /* Finalize the current operation. */ + bverror = gcbatch->batchend(bvbltparams, gcbatch); + if (bverror != BVERR_NONE) + goto exit; + + /* Add PE flush. */ + GCDBG(GCZONE_BLIT, "appending the flush.\n"); + bverror = claim_buffer(bvbltparams, gcbatch, + sizeof(struct gcmoflush), + (void **) &flush); + if (bverror != BVERR_NONE) + goto exit; + + flush->flush_ldst = gcmoflush_flush_ldst; + flush->flush.reg = gcregflush_pe2D; + + /* Process asynchronous operation. */ + if ((bvbltparams->flags & BVFLAG_ASYNC) == 0) { + GCDBG(GCZONE_BLIT, "synchronous batch.\n"); + gcicommit.callback = NULL; + gcicommit.callbackparam = NULL; + gcicommit.asynchronous = false; + } else { + struct gccallbackinfo *gccallbackinfo; + + GCDBG(GCZONE_BLIT, "asynchronous batch (0x%08X):\n", + bvbltparams->flags); + + if (bvbltparams->callbackfn == NULL) { + GCDBG(GCZONE_BLIT, "no callback given.\n"); + gcicommit.callback = NULL; + gcicommit.callbackparam = NULL; + } else { + bverror = get_callbackinfo(&gccallbackinfo); + if (bverror != BVERR_NONE) { + BVSETBLTERROR(BVERR_OOM, + "callback allocation " + "failed"); + goto exit; + } + + gccallbackinfo->info.callback.fn + = bvbltparams->callbackfn; + gccallbackinfo->info.callback.data + = bvbltparams->callbackdata; + + gcicommit.callback = callbackbltsville; + gcicommit.callbackparam = gccallbackinfo; + + GCDBG(GCZONE_BLIT, + "gcbv_callback = 0x%08X\n", + (unsigned int) gcicommit.callback); + GCDBG(GCZONE_BLIT, + "gcbv_param = 0x%08X\n", + (unsigned int) gcicommit.callbackparam); + GCDBG(GCZONE_BLIT, + "bltsville_callback = 0x%08X\n", + (unsigned int) + gccallbackinfo->info.callback.fn); + GCDBG(GCZONE_BLIT, + "bltsville_param = 0x%08X\n", + (unsigned int) + gccallbackinfo->info.callback.data); + } + + gcicommit.asynchronous = true; + } + + /* Process scheduled unmappings. */ + do_unmap_implicit(gcbatch); + + INIT_LIST_HEAD(&gcicommit.unmap); + list_splice_init(&gcbatch->unmap, &gcicommit.unmap); + + /* Pass the batch for execution. */ + GCDUMPBATCH(gcbatch); + + gcicommit.gcerror = GCERR_NONE; + gcicommit.entrypipe = GCPIPE_2D; + gcicommit.exitpipe = GCPIPE_2D; + + INIT_LIST_HEAD(&gcicommit.buffer); + list_splice_init(&gcbatch->buffer, &gcicommit.buffer); + + GCDBG(GCZONE_BLIT, "submitting the batch.\n"); + gc_commit_wrapper(&gcicommit); + + /* Move the lists back to the batch. */ + list_splice_init(&gcicommit.buffer, &gcbatch->buffer); + list_splice_init(&gcicommit.unmap, &gcbatch->unmap); + + /* Error? */ + if (gcicommit.gcerror != GCERR_NONE) { + switch (gcicommit.gcerror) { + case GCERR_OODM: + case GCERR_CTX_ALLOC: + BVSETBLTERROR(BVERR_OOM, + "unable to allocate gccore " + "memory"); + goto exit; + default: + BVSETBLTERROR(BVERR_RSRC, + "gccore error"); + + goto exit; + } + } + + GCDBG(GCZONE_BLIT, "batch is submitted.\n"); + } + +exit: + if ((gcbatch != NULL) && batchexec) { + free_batch(gcbatch); + bvbltparams->batch = NULL; + } + + GCEXITARG(GCZONE_BLIT, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +enum bverror bv_cache(struct bvcopparams *copparams) +{ + enum bverror bverror = BVERR_NONE; + unsigned int bytespp = 0; /* bytes per pixel */ + unsigned long vert_offset, horiz_offset; + unsigned int true_width, true_height; + + struct c2dmrgn rgn[3]; + int container_size = 0; + + unsigned long subsample; + unsigned long vendor; + unsigned long layout; + unsigned long size; + unsigned long container; + + subsample = copparams->geom->format & OCDFMTDEF_SUBSAMPLE_MASK; + vendor = copparams->geom->format & OCDFMTDEF_VENDOR_MASK; + layout = copparams->geom->format & OCDFMTDEF_LAYOUT_MASK; + size = copparams->geom->format & OCDFMTDEF_COMPONENTSIZEMINUS1_MASK; + container = copparams->geom->format & OCDFMTDEF_CONTAINER_MASK; + + if (vendor != OCDFMTDEF_VENDOR_ALL) { + bverror = BVERR_FORMAT; + goto exit; + } + + if (copparams->geom->orientation % 180 != 0) { + true_width = copparams->rect->height; + true_height = copparams->rect->width; + } else { + true_width = copparams->rect->width; + true_height = copparams->rect->height; + } + + switch (container) { + case OCDFMTDEF_CONTAINER_8BIT: + container_size = 8; + break; + + case OCDFMTDEF_CONTAINER_16BIT: + container_size = 16; + break; + + case OCDFMTDEF_CONTAINER_24BIT: + container_size = 24; + break; + + case OCDFMTDEF_CONTAINER_32BIT: + container_size = 32; + break; + + case OCDFMTDEF_CONTAINER_48BIT: + container_size = 48; + break; + + case OCDFMTDEF_CONTAINER_64BIT: + container_size = 64; + break; + } + + switch (layout) { + case OCDFMTDEF_PACKED: + switch (subsample) { + case OCDFMTDEF_SUBSAMPLE_NONE: + if (size >= 8) { + bytespp = container_size / 8; + } else { + GCERR("format not supported.\n"); + bverror = BVERR_FORMAT; + goto exit; + } + break; + + case OCDFMTDEF_SUBSAMPLE_422_YCbCr: + bytespp = (container_size / 2) / 8; + break; + + default: + bverror = BVERR_FORMAT; + goto exit; + } + + rgn[0].span = true_width * bytespp; + rgn[0].lines = true_height; + rgn[0].stride = copparams->geom->virtstride; + horiz_offset = copparams->rect->left * bytespp; + vert_offset = copparams->rect->top; + + rgn[0].start = (void *) ((unsigned long) + copparams->desc->virtaddr + + vert_offset * rgn[0].stride + + horiz_offset); + + gcbvcacheop(1, rgn, copparams->cacheop); + break; + + case OCDFMTDEF_2_PLANE_YCbCr: + /* 1 byte per pixel */ + rgn[0].span = true_width; + rgn[0].lines = true_height; + rgn[0].stride = copparams->geom->virtstride; + rgn[0].start = (void *) + ((unsigned long) copparams->desc->virtaddr + + copparams->rect->top * rgn[0].stride + + copparams->rect->left); + + rgn[1].span = true_width; + rgn[1].lines = true_height / 2; + rgn[1].stride = copparams->geom->virtstride; + rgn[1].start = rgn[0].start + + copparams->geom->height * rgn[0].stride; + + GCDBG(GCZONE_CACHE, + "virtaddr %p start[0] 0x%08x start[1] 0x%08x\n", + copparams->desc->virtaddr, rgn[0].start, rgn[1].start); + + gcbvcacheop(2, rgn, copparams->cacheop); + break; + + default: + GCERR("format 0x%x (%d) not supported.\n", + copparams->geom->format, copparams->geom->format); + bverror = BVERR_FORMAT; + break; + } + +exit: + if (bverror != BVERR_NONE) + GCERR("bverror = %d\n", bverror); + + return bverror; +} diff --git a/bltsville/gcbv/mirror/gcbv.h b/bltsville/gcbv/mirror/gcbv.h new file mode 100644 index 0000000..6392d4f --- /dev/null +++ b/bltsville/gcbv/mirror/gcbv.h @@ -0,0 +1,590 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCBV_H +#define GCBV_H + +#include "gcmain.h" + +/******************************************************************************* + * Miscellaneous defines and macros. + */ + +#define GC_MAX_BASE_ALIGN 64 + +#if !defined(BVBATCH_DESTRECT) +#define BVBATCH_DESTRECT (BVBATCH_DSTRECT_ORIGIN | BVBATCH_DSTRECT_SIZE) +#endif + +#if !defined(BVBATCH_SRC1RECT) +#define BVBATCH_SRC1RECT (BVBATCH_SRC1RECT_ORIGIN | BVBATCH_SRC1RECT_SIZE) +#endif + +#if !defined(BVBATCH_SRC2RECT) +#define BVBATCH_SRC2RECT (BVBATCH_SRC2RECT_ORIGIN | BVBATCH_SRC2RECT_SIZE) +#endif + +#define STRUCTSIZE(structptr, lastmember) \ +( \ + (size_t) &structptr->lastmember + \ + sizeof(structptr->lastmember) - \ + (size_t) structptr \ +) + +#define GET_MAP_HANDLE(map) \ +( \ + ((struct bvbuffmapinfo *) map->handle)->handle \ +) + +#define GC_CLIP_RESET_LEFT ((unsigned short) 0) +#define GC_CLIP_RESET_TOP ((unsigned short) 0) +#define GC_CLIP_RESET_RIGHT ((unsigned short) ((1 << 15) - 1)) +#define GC_CLIP_RESET_BOTTOM ((unsigned short) ((1 << 15) - 1)) + +#define BVSETERROR(error, message, ...) \ +do { \ + struct gccontext *tmpcontext = get_context(); \ + snprintf(tmpcontext->bverrorstr, sizeof(tmpcontext->bverrorstr), \ + message, ##__VA_ARGS__); \ + GCDUMPSTRING("%s(%d): [ERROR] %s\n", __func__, __LINE__, \ + tmpcontext->bverrorstr); \ + bverror = error; \ +} while (0) + +#define BVSETBLTERROR(error, message, ...) \ +do { \ + struct gccontext *tmpcontext = get_context(); \ + snprintf(tmpcontext->bverrorstr, sizeof(tmpcontext->bverrorstr), \ + message, ##__VA_ARGS__); \ + GCDUMPSTRING("%s(%d): [ERROR] %s\n", __func__, __LINE__, \ + tmpcontext->bverrorstr); \ + bvbltparams->errdesc = tmpcontext->bverrorstr; \ + bverror = error; \ +} while (0) + +#define GCPRINT_RECT(zone, name, rect) \ +{ \ + GCDBG(zone, \ + name " = (%d,%d)-(%d,%d), %dx%d\n", \ + (rect)->left, (rect)->top, \ + (rect)->right, (rect)->bottom, \ + (rect)->right - (rect)->left, \ + (rect)->bottom - (rect)->top); \ +} + + +/******************************************************************************* + * Kernel table definitions. + */ + +#define GC_TAP_COUNT 9 +#define GC_PHASE_BITS 5 +#define GC_PHASE_MAX_COUNT (1 << GC_PHASE_BITS) +#define GC_PHASE_LOAD_COUNT (GC_PHASE_MAX_COUNT / 2 + 1) +#define GC_COEFFICIENT_COUNT (GC_PHASE_LOAD_COUNT * GC_TAP_COUNT) +#define GC_FILTER_CACHE_MAX 10 + +enum gcfiltertype { + GC_FILTER_SYNC, + GC_FILTER_BLUR, + + /* Number of supported filter types. */ + GC_FILTER_COUNT +}; + +struct gcfilterkernel { + enum gcfiltertype type; + unsigned int kernelsize; + unsigned int srcsize; + unsigned int dstsize; + unsigned int scalefactor; + short kernelarray[GC_COEFFICIENT_COUNT]; + struct list_head link; +}; + +struct gcfiltercache { + unsigned int count; + struct list_head list; /* gcfilterkernel */ +}; + + +/******************************************************************************* + * Global data structure. + */ + +struct gccontext { + /* Last generated error message. */ + char bverrorstr[128]; + + /* Capabilities and characteristics. */ + unsigned int gcmodel; + unsigned int gcrevision; + unsigned int gcdate; + unsigned int gctime; + union gcfeatures gcfeatures; + union gcfeatures0 gcfeatures0; + union gcfeatures1 gcfeatures1; + union gcfeatures2 gcfeatures2; + union gcfeatures3 gcfeatures3; + + /* Dynamically allocated structure cache. */ + struct bvbuffmap *buffmapvac; /* bvbuffmap */ + struct list_head unmapvac; /* gcschedunmap */ + struct list_head buffervac; /* gcbuffer */ + struct list_head fixupvac; /* gcfixup */ + struct list_head batchvac; /* gcbatch */ + + /* Callback lists. */ + struct list_head callbacklist; /* gccallbackinfo */ + struct list_head callbackvac; /* gccallbackinfo */ + + /* Access locks. */ + GCLOCK_TYPE batchlock; + GCLOCK_TYPE bufferlock; + GCLOCK_TYPE fixuplock; + GCLOCK_TYPE maplock; + GCLOCK_TYPE callbacklock; + + /* Kernel table cache. */ + struct gcfilterkernel *loadedfilter; /* gcfilterkernel */ + struct gcfiltercache filtercache[GC_FILTER_COUNT][GC_TAP_COUNT]; + + /* Temporary buffer descriptor. */ + struct bvbuffdesc *tmpbuffdesc; + void *tmpbuff; +}; + + +/******************************************************************************* + * Mapping structures. + */ + +/* bvbuffmap struct attachment. */ +struct bvbuffmapinfo { + /* Mapped handle for the buffer. */ + unsigned long handle; + + /* Number of times the client explicitly mapped this buffer. */ + int usermap; + + /* Number of times implicit mapping happened. */ + int automap; +}; + + +/******************************************************************************* + * Color format. + */ + +#define BVFMT_RGB 1 +#define BVFMT_YUV 2 + +struct bvcomponent { + unsigned int shift; + unsigned int size; + unsigned int mask; +}; + +struct bvcsrgb { + struct bvcomponent r; + struct bvcomponent g; + struct bvcomponent b; + struct bvcomponent a; +}; + +struct bvformatxlate { + unsigned int type; + unsigned int bitspp; + unsigned int allocbitspp; + unsigned int format; + unsigned int swizzle; + bool premultiplied; + + union { + struct { + const struct bvcsrgb *comp; + } rgb; + + struct { + unsigned int std; + unsigned int planecount; + unsigned int xsample; + unsigned int ysample; + } yuv; + } cs; +}; + + +/******************************************************************************* + * Alpha blending. + */ + +/* Alpha blending hardware configuration. */ +struct gcblendconfig { + unsigned char factor_mode; + unsigned char color_reverse; + + bool src1used; + bool src2used; +}; + +/* Alpha blending descriptor. */ +struct gcalpha { + unsigned int src_global_color; + unsigned int dst_global_color; + + unsigned char src_global_alpha_mode; + unsigned char dst_global_alpha_mode; + + struct gcblendconfig *k1; + struct gcblendconfig *k2; + + struct gcblendconfig *srcconfig; + struct gcblendconfig *dstconfig; + + bool src1used; + bool src2used; +}; + + +/******************************************************************************* + * Rotation and mirror defines. + */ + +#define GCREG_ROT_ANGLE_ROT0 0x0 +#define GCREG_ROT_ANGLE_ROT90 0x4 +#define GCREG_ROT_ANGLE_ROT180 0x5 +#define GCREG_ROT_ANGLE_ROT270 0x6 + +#define ROT_ANGLE_INVALID -1 +#define ROT_ANGLE_0 0 +#define ROT_ANGLE_90 1 +#define ROT_ANGLE_180 2 +#define ROT_ANGLE_270 3 + +#define GCREG_MIRROR_NONE 0x0 +#define GCREG_MIRROR_X 0x1 +#define GCREG_MIRROR_Y 0x2 +#define GCREG_MIRROR_XY 0x3 + +extern const unsigned int rotencoding[]; + + +/******************************************************************************* + * Surface descriptor. + */ + +struct surfaceinfo { + /* BLTsville source index (-1 for dst, 0 for src1 and 1 for src2). */ + int index; + + /* Surface buffer descriptor. */ + union bvinbuff buf; + + /* Surface geometry. */ + struct bvsurfgeom *geom; + bool newgeom; + + /* Rectangle to source from/render to. */ + struct gcrect rect; + bool newrect; + + /* Surface format. */ + struct bvformatxlate format; + + /* Physical size of the surface (accounted for rotation). */ + unsigned int physwidth; + unsigned int physheight; + + /* Base address alignment. */ + int xpixalign; + int ypixalign; + int bytealign; + int bytealign2; + int bytealign3; + int stride2; + int stride3; + + /* Rotation angle. */ + int angle; + + /* Mirror setting. */ + unsigned int mirror; + + /* ROP. */ + unsigned short rop; + + /* Blending info. */ + struct gcalpha *gca; +}; + + +/******************************************************************************* + * Batch structures. + */ + +/* Operation finalization call. */ +struct gcbatch; +typedef enum bverror (*gcbatchend) (struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch); + +/* Blit states. */ +struct gcblit { + /* Number of sources in the operation. */ + unsigned int srccount; + + /* Multi source enable flag. */ + unsigned int multisrc; + + /* Computed destination rectangle coordinates; in multi-source + * setup can be modified to match new destination and source + * geometry. */ + struct gcrect dstrect; + + /* Block walker enable. */ + int blockenable; + + /* Destination format and swizzle */ + unsigned int format; + unsigned int swizzle; +}; + +/* Filter states. */ +struct gcfilter { + /* Kernel size. */ + unsigned int horkernelsize; + unsigned int verkernelsize; + + /* Scale factors. */ + unsigned int horscalefactor; + unsigned int verscalefactor; + + /* Destination angle. */ + bool angleoverride; + int dstangle; + + /* Geometry size that follows angle adjustments. */ + struct bvsurfgeom dstgeom; + + /* Original source and destination rectangles adjusted + * by the source angle. */ + struct gcrect dstrect; + struct gcrect dstrectaux; + + /* Clipped destination rectangle adjusted by the source angle. */ + struct gcrect dstclipped; + struct gcrect dstclippedaux; + + /* Destination rectangles that were clipped, adjusted for + * the surface misalignment and the source angle. */ + struct gcrect dstadjusted; + struct gcrect dstadjustedaux; +}; + +/* Batch header. */ +struct gcbatch { + /* Used to ID structure version. */ + unsigned int structsize; + + /* Batch change flags. */ + unsigned long batchflags; + + /* Pointer to the function to finalize the current operation. */ + gcbatchend batchend; + + /* State of the current operation. */ + struct { + struct gcblit blit; + struct gcfilter filter; + } op; + + /* Destination surface. */ + struct surfaceinfo dstinfo; + + /* Aux rectangle present. */ + bool haveaux; + struct gcrect dstrectaux; + + /* Clipped destination rectangle coordinates. */ + struct gcrect dstclipped; + struct gcrect dstclippedaux; + + /* Destination rectangles that were clipped and adjusted for + * surface misalignment if any. */ + struct gcrect dstadjusted; + struct gcrect dstadjustedaux; + + /* Clipping deltas; used to correct the source coordinates for + * single source blits. */ + struct gcrect clipdelta; + + /* Adjusted geometry size of the destination surface. */ + unsigned int dstwidth; + unsigned int dstheight; + + /* Physical size of the source and destination surfaces. */ + unsigned int srcphyswidth; + unsigned int srcphysheight; + unsigned int dstphyswidth; + unsigned int dstphysheight; + + /* Alignment byte offset for the destination surface; in multi- + * source setup can be modified to match new destination and source + * geometry. */ + int dstbyteshift; + + /* Destination rectangle adjustment offsets. */ + int dstoffsetX; + int dstoffsetY; + +#if GCDEBUG_ENABLE + /* Rectangle validation storage. */ + struct bvrect prevdstrect; + struct bvrect prevsrc1rect; + struct bvrect prevsrc2rect; + struct bvrect prevmaskrect; +#endif + + /* Total size of the command buffer. */ + unsigned int size; + + /* Command buffer list (gcbuffer). */ + struct list_head buffer; + + /* Scheduled implicit unmappings (gcschedunmap). */ + struct list_head unmap; + + /* Batch linked list (gcbatch). */ + struct list_head link; +}; + + +/******************************************************************************* + * Internal API entries. + */ + +/* Get the pointer to the context. */ +struct gccontext *get_context(void); + +/* Validation. */ +bool valid_rect(struct bvsurfgeom *bvsurfgeom, struct gcrect *gcrect); + +/* Parsers. */ +enum bverror parse_format(struct bvbltparams *bvbltparams, + struct surfaceinfo *surfaceinfo); +enum bverror parse_blend(struct bvbltparams *bvbltparams, + enum bvblend blend, + struct gcalpha *gca); +enum bverror parse_destination(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch); +enum bverror parse_source(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + struct bvrect *srcrect, + struct surfaceinfo *srcinfo); +enum bverror parse_scalemode(struct bvbltparams *bvbltparams, + struct gcbatch *batch); + +/* Setup destination rotation parameters. */ +void process_dest_rotation(struct bvbltparams *bvbltparams, + struct gcbatch *batch); + +/* Return surface alignment offset. */ +int get_pixel_offset(struct surfaceinfo *surfaceinfo, int offset); + +/* Buffer mapping. */ +enum bverror do_map(struct bvbuffdesc *bvbuffdesc, + struct gcbatch *gcbatch, + struct bvbuffmap **map); +void do_unmap_implicit(struct gcbatch *gcbatch); + +/* Batch/command buffer management. */ +enum bverror do_end(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch); +enum bverror allocate_batch(struct bvbltparams *bvbltparams, + struct gcbatch **gcbatch); +void free_batch(struct gcbatch *gcbatch); +enum bverror append_buffer(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + struct gcbuffer **gcbuffer); + +enum bverror add_fixup(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + unsigned int *fixup, + unsigned int surfoffset); +enum bverror claim_buffer(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + unsigned int size, + void **buffer); + +/* Temporary buffer management. */ +enum bverror allocate_temp(struct bvbltparams *bvbltparams, + unsigned int size); +enum bverror free_temp(bool schedule); + +/* Program the destination. */ +enum bverror set_dst(struct bvbltparams *bltparams, + struct gcbatch *batch, + struct bvbuffmap *dstmap); + +/* Program blending. */ +enum bverror set_blending(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo); +enum bverror set_blending_index(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + unsigned int index); + +/* Program YUV source. */ +void set_computeyuv(struct surfaceinfo *srcinfo, int x, int y); +enum bverror set_yuvsrc(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + struct bvbuffmap *srcmap); +enum bverror set_yuvsrc_index(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + struct bvbuffmap *srcmap, + unsigned int index); + +/* Rendering entry points. */ +enum bverror do_fill(struct bvbltparams *bltparams, + struct gcbatch *gcbatch, + struct surfaceinfo *srcinfo); +enum bverror do_blit(struct bvbltparams *bltparams, + struct gcbatch *gcbatch, + struct surfaceinfo *srcinfo); +enum bverror do_filter(struct bvbltparams *bvbltparams, + struct gcbatch *gcbatch, + struct surfaceinfo *srcinfo); + +#endif diff --git a/bltsville/gcbv/mirror/gcdbglog.c b/bltsville/gcbv/mirror/gcdbglog.c new file mode 100644 index 0000000..9743897 --- /dev/null +++ b/bltsville/gcbv/mirror/gcdbglog.c @@ -0,0 +1,1684 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include "gcmain.h" + +#if ANDROID +#include +#endif + +#if GCDEBUG_ENABLE + +/******************************************************************************* + * Debug switches. + */ + +/* Dumping enable default state. */ +#define GC_DUMP_ENABLE 0 + +/* Ignore all zones as if they were all enabled in all modules. */ +#define GC_IGNORE_ZONES 0 + +/* When enabled, all output is collected into a buffer with a predefined size. + * GC_DUMP_BUFFER_SIZE determines the size of the buffer and GC_ENABLE_OVERFLOW + * controls what happens when the buffer gets full. */ +#define GC_BUFFERED_OUTPUT 0 + +/* Debug output buffer size. */ +#define GC_DUMP_BUFFER_SIZE (200 * 1024) + +/* If disabled, the contents of the buffer will be dumped to the console when + * the buffer gets full. + * If enabled, wrap around mode is enabled where when the buffer gets full, + * the oldest entries are overwritten with the new entrie. To dump the buffer + * to the console gc_dump_flush must be called explicitly. */ +#define GC_ENABLE_OVERFLOW 1 + +/* Specifies how many prints are accumulated in the buffer before the buffer is + * flushed. Set to zero to disable auto dumping mode. */ +#define GC_FLUSH_COUNT 0 + +/* Specifies the maximum number of threads that will be tracked in an attempt + * to visually separate messages from different threads. To disable thread + * tracking, set to 0 or 1. */ +#define GC_THREAD_COUNT 20 + +/* Specifies spacing for thread messages. */ +#define GC_THREAD_INDENT 0 + +/* When set to non-zero, specifies how many prints are accumulated in the + * buffer before the buffer is flushed. */ +#define GC_SHOW_DUMP_LINE 1 + +/* If enabled, each print statement will be preceeded with the current + * process ID. */ +#define GC_SHOW_PID 1 + +/* If enabled, internal logging validation code is turned on. */ +#define GC_DEBUG_SELF 0 + +/* Maximum length of a dump string. */ +#define GC_MAXSTR_LENGTH 256 + +/* Print buffers like C arrays. */ +#define GC_C_BUFFER 0 + + +/******************************************************************************* + * Miscellaneous macros. + */ + +#define GC_PTR2INT(p) \ +( \ + (unsigned int) (p) \ +) + +#define GC_ALIGN(n, align) \ +( \ + ((n) + ((align) - 1)) & ~((align) - 1) \ +) + +#define GC_PTRALIGNMENT(p, alignment) \ +( \ + GC_ALIGN(GC_PTR2INT(p), alignment) - GC_PTR2INT(p) \ +) + +#define GC_VARARG_ALIGNMENT sizeof(unsigned long long) + +#if defined(GCDBGFILTER) +#undef GCDBGFILTER +#endif + +#define GCDBGFILTER \ + (*filter) + +#if GC_IGNORE_ZONES +#define GC_VERIFY_ENABLE(filter, zone) \ + (g_initdone) +#else +#define GC_VERIFY_ENABLE(filter, zone) \ + (g_initdone && ((filter == NULL) || ((filter->zone & zone) != 0))) +#endif + +#if GC_SHOW_DUMP_LINE +#define GC_DUMPLINE_FORMAT "[%12d] " +#endif + +#if GC_SHOW_PID +#define GC_PID_FORMAT "[pid=%04X] " +#endif + +#define GC_EOL_RESERVE 1 + + +/******************************************************************************* + * Dump item header definition. + */ + +enum itemtype { + GC_BUFITEM_NONE, + GC_BUFITEM_STRING, + GC_BUFITEM_BUFFER +}; + +/* Common item head/buffer terminator. */ +struct itemhead { + enum itemtype type; +}; + + +/******************************************************************************* + * Supported dump items. + */ + +/* GC_BUFITEM_STRING: buffered string. */ +struct itemstring { + enum itemtype itemtype; + int indent; + +#if GC_SHOW_PID + pid_t pid; +#endif + +#if GC_SHOW_DUMP_LINE + unsigned int dumpline; +#endif + + const char *message; + va_list messagedata; + unsigned int datasize; +}; + +/* GC_BUFITEM_BUFFER: buffered memory. */ +enum buffertype { + GC_BUFTYPE_GENERIC, + GC_BUFTYPE_COMMAND, + GC_BUFTYPE_SURFACE +}; + +#define GC_GENERIC_DATA_COUNT 8 +#define GC_SURFACE_DATA_COUNT 64 + +struct itembuffer { + enum itemtype itemtype; + enum buffertype buffertype; + int indent; + + unsigned int surfwidth; + unsigned int surfheight; + unsigned int surfbpp; + unsigned int x1, y1; + unsigned int x2, y2; + + unsigned int datasize; + unsigned int gpuaddr; +}; + + +/******************************************************************************* + * Debug output buffer. + */ + +struct threadinfo { + pid_t pid; + int msgindent; + int threadindent; +}; + +struct buffout { + int enable; + +#if GC_THREAD_COUNT > 1 + unsigned int threadcount; + struct threadinfo threadinfo[1 + GC_THREAD_COUNT]; +#else + struct threadinfo threadinfo[1]; +#endif + +#if GC_SHOW_DUMP_LINE + unsigned int dumpline; +#endif + +#if GC_BUFFERED_OUTPUT + int start; + int index; + int count; + unsigned char *buffer; +#endif +}; + +static struct buffout g_outputbuffer = { + .enable = GC_DUMP_ENABLE +}; + + +/******************************************************************************* + * Globals. + */ + +static unsigned int g_initdone; +static GCDEFINE_LOCK(g_lockmutex); +static struct list_head gc_filterlist = LIST_HEAD_INIT(gc_filterlist); + + +/******************************************************************************* + * Item size functions. + */ + +#if GC_BUFFERED_OUTPUT +static int get_item_size_terminator(struct itemhead *item) +{ + return sizeof(struct itemhead); +} + +static int get_item_size_string(struct itemhead *item) +{ + struct itemstring *itemstring = (struct itemstring *) item; + unsigned int vlen = *((unsigned char **) &itemstring->messagedata) + - ((unsigned char *) itemstring); + return vlen + itemstring->datasize; +} + +static int get_item_size_buffer(struct itemhead *item) +{ + struct itembuffer *itembuffer = (struct itembuffer *) item; + return sizeof(struct itembuffer) + itembuffer->datasize; +} + +#if GC_ENABLE_OVERFLOW +typedef int (*getitemsize) (struct itemhead *item); + +static getitemsize g_itemsize[] = { + get_item_size_terminator, + get_item_size_string, + get_item_size_buffer +}; +#endif +#endif + + +/******************************************************************************* + * Printing functions. + */ + +#if ANDROID +#define GC_PRINTK(s, fmt, ...) \ + LOGI(fmt, ##__VA_ARGS__); +#else +#define GC_PRINTK(s, fmt, ...) \ + printf(fmt, ##__VA_ARGS__); +#endif + +#if GC_DEBUG_SELF +# define GC_DEBUGMSG(fmt, ...) \ + GC_PRINTK(NULL, "[%s:%d] " fmt, __func__, __LINE__, \ + ##__VA_ARGS__) +#else +# define GC_DEBUGMSG(...) {} +#endif + +static struct threadinfo *get_threadinfo(struct buffout *buffout) +{ +#if GC_THREAD_COUNT > 1 + struct threadinfo *threadinfo; + unsigned int i, count; + pid_t pid; + + /* Get current pid. */ + pid = gettid(); + + /* Try to locate thread record. */ + count = buffout->threadcount + 1; + for (i = 1; i < count; i += 1) + if (buffout->threadinfo[i].pid == pid) + return &buffout->threadinfo[i]; + + /* Not found, still have room? */ + if (buffout->threadcount < GC_THREAD_COUNT) { + threadinfo = &buffout->threadinfo[count]; + threadinfo->pid = pid; + threadinfo->msgindent = 0; + threadinfo->threadindent = buffout->threadcount + * GC_THREAD_INDENT; + buffout->threadcount += 1; + return threadinfo; + } + + /* Too many threads, use the common entry. */ + GC_PRINTK(NULL, "%s(%d) [ERROR] reached the maximum thread number.\n", + __func__, __LINE__); + threadinfo = buffout->threadinfo; + threadinfo->pid = pid; + return threadinfo; +#else + struct threadinfo *threadinfo; + threadinfo = buffout->threadinfo; + +#if GC_SHOW_PID + threadinfo->pid = pid; +#else + threadinfo->pid = 0; +#endif + + return threadinfo; +#endif +} + +static int gc_get_indent(int indent, char *buffer, int buffersize) +{ + static const int MAX_INDENT = 80; + int len, _indent; + + _indent = indent % MAX_INDENT; + if (_indent > buffersize) + _indent = buffersize - 1; + + for (len = 0; len < _indent; len += 1) + buffer[len] = ' '; + + buffer[len] = '\0'; + return len; +} + +static void gc_print_string(struct seq_file *s, struct itemstring *str) +{ + int len = 0; + char buffer[GC_MAXSTR_LENGTH]; + +#if GC_SHOW_DUMP_LINE + len += snprintf(buffer + len, sizeof(buffer) - len - GC_EOL_RESERVE, + GC_DUMPLINE_FORMAT, str->dumpline); +#endif + +#if GC_SHOW_PID + len += snprintf(buffer + len, sizeof(buffer) - len - GC_EOL_RESERVE, + GC_PID_FORMAT, str->pid); +#endif + + /* Append the indent string. */ + len += gc_get_indent(str->indent, buffer + len, + sizeof(buffer) - len - GC_EOL_RESERVE); + + /* Format the string. */ + len += vsnprintf(buffer + len, sizeof(buffer) - len - GC_EOL_RESERVE, + str->message, str->messagedata); + + /* Add end-of-line if missing. */ + if (buffer[len - 1] != '\n') + buffer[len++] = '\n'; + buffer[len] = '\0'; + + /* Print the string. */ + GC_PRINTK(s, "%s", buffer); +} + +static void gc_print_generic(struct seq_file *s, struct itembuffer *item, + unsigned char *data) +{ + char buffer[GC_MAXSTR_LENGTH]; + unsigned int i, indent, len; + + /* Append the indent string. */ + indent = gc_get_indent(item->indent, buffer, sizeof(buffer)); + + /* Print the title. */ + GC_PRINTK(s, "%sBUFFER @ 0x%08X\n", + buffer, item->gpuaddr); + + /* Print the buffer. */ + for (i = 0, len = indent; i < item->datasize; i += 4) { + if ((i % GC_GENERIC_DATA_COUNT) == 0) { + if (i != 0) { + /* Print the string. */ + GC_PRINTK(s, "%s\n", buffer); + + /* Reset the line. */ + len = indent; + } + + len += snprintf(buffer + len, sizeof(buffer) - len, + "0x%08X: ", item->gpuaddr + i); + } + + /* Append the data value. */ + len += snprintf(buffer + len, sizeof(buffer) - len, + " 0x%08X", *(unsigned int *) (data + i)); + } + + /* Print the last partial string. */ + if ((i % GC_SURFACE_DATA_COUNT) != 0) + GC_PRINTK(s, "%s\n", buffer); +} + +static char *gc_module_name(unsigned int index) +{ + switch (index) { + case GCREG_COMMAND_STALL_STALL_SOURCE_FRONT_END: + return "FE"; + + case GCREG_COMMAND_STALL_STALL_SOURCE_PIXEL_ENGINE: + return "PE"; + + case GCREG_COMMAND_STALL_STALL_SOURCE_DRAWING_ENGINE: + return "DE"; + + default: + return "*INVALID*"; + } +} + +static void gc_print_command(struct seq_file *s, struct itembuffer *item, + unsigned char *data) +{ + char buffer[GC_MAXSTR_LENGTH]; + unsigned int *data32; + unsigned int i, j, datacount; + unsigned int command, count, addr; + unsigned int delay, src, dst; + unsigned int x1, y1, x2, y2; + + /* Append the indent string. */ + gc_get_indent(item->indent, buffer, sizeof(buffer)); + + /* Print the title. */ + GC_PRINTK(s, "%sCOMMAND BUFFER @ 0x%08X\n", buffer, item->gpuaddr); + GC_PRINTK(s, "%s size = %d\n", buffer, item->datasize); + + datacount = (item->datasize + 3) / 4; + data32 = (unsigned int *) data; + for (i = 0; i < datacount;) { +#if GC_C_BUFFER + GC_PRINTK(s, "%s\t0x%08X,\n", buffer, data32[i++]); +#else + command = (data32[i] >> 27) & 0x1F; + + switch (command) { + case GCREG_COMMAND_OPCODE_LOAD_STATE: + count = (data32[i] >> 16) & 0x3F; + addr = data32[i] & 0xFFFF; + GC_PRINTK(s, "%s 0x%08X: 0x%08X STATE(0x%04X, %d)\n", + buffer, item->gpuaddr + (i << 2), + data32[i], addr, count); + i += 1; + + count |= 1; + for (j = 0; j < count; i += 1, j += 1) + GC_PRINTK(s, "%s%14c0x%08X\n", + buffer, ' ', data32[i]); + break; + + case GCREG_COMMAND_OPCODE_END: + GC_PRINTK(s, "%s 0x%08X: 0x%08X END()\n", + buffer, item->gpuaddr + (i << 2), + data32[i]); + i += 1; + + GC_PRINTK(s, "%s%14c0x%08X\n", + buffer, ' ', data32[i]); + i += 1; + break; + + case GCREG_COMMAND_OPCODE_NOP: + GC_PRINTK(s, "%s 0x%08X: 0x%08X NOP()\n", + buffer, item->gpuaddr + (i << 2), + data32[i]); + i += 1; + + GC_PRINTK(s, "%s" "%14c0x%08X\n", + buffer, ' ', data32[i]); + i += 1; + break; + + case GCREG_COMMAND_OPCODE_STARTDE: + count = (data32[i] >> 8) & 0xFF; + GC_PRINTK(s, "%s 0x%08X: 0x%08X STARTDE(%d)\n", + buffer, item->gpuaddr + (i << 2), + data32[i], count); + i += 1; + + GC_PRINTK(s, "%s" "%14c0x%08X\n", + buffer, ' ', data32[i]); + i += 1; + + for (j = 0; j < count; j += 1) { + x1 = data32[i] & 0xFFFF; + y1 = (data32[i] >> 16) & 0xFFFF; + GC_PRINTK(s, "%s%14c0x%08X LT(%d,%d)\n", + buffer, ' ', data32[i], x1, y1); + i += 1; + + x2 = data32[i] & 0xFFFF; + y2 = (data32[i] >> 16) & 0xFFFF; + GC_PRINTK(s, "%s%14c0x%08X RB(%d,%d)\n", + buffer, ' ', data32[i], x2, y2); + i += 1; + } + break; + + case GCREG_COMMAND_OPCODE_WAIT: + delay = data32[i] & 0xFFFF; + GC_PRINTK(s, "%s 0x%08X: 0x%08X WAIT(%d)\n", + buffer, item->gpuaddr + (i << 2), + data32[i], delay); + i += 1; + + GC_PRINTK(s, "%s%14c0x%08X\n", buffer, ' ', data32[i]); + i += 1; + break; + + case GCREG_COMMAND_OPCODE_LINK: + count = data32[i] & 0xFFFF; + addr = data32[i + 1]; + GC_PRINTK(s, "%s 0x%08X: 0x%08X " + "LINK(0x%08X-0x%08X, %d)\n", + buffer, item->gpuaddr + (i << 2), + data32[i], addr, addr + count * 8, + count); + i += 1; + + GC_PRINTK(s, "%s%14c0x%08X\n", buffer, ' ', data32[i]); + i += 1; + break; + + case GCREG_COMMAND_OPCODE_STALL: + src = data32[i + 1] & 0x1F; + dst = (data32[i + 1] >> 8) & 0x1F; + + GC_PRINTK(s, "%s 0x%08X: 0x%08X STALL(%s-%s)\n", + buffer, item->gpuaddr + (i << 2), + data32[i], + gc_module_name(src), + gc_module_name(dst)); + i += 1; + + GC_PRINTK(s, "%s" "%14c0x%08X\n", + buffer, ' ', data32[i]); + i += 1; + break; + + default: + GC_PRINTK(s, "%s 0x%08X: 0x%08X UNKNOWN COMMAND\n", + buffer, item->gpuaddr + (i << 2), + data32[i]); + i += 2; + } +#endif + } +} + +static void gc_flush_line(struct seq_file *s, char *buffer, + unsigned int indent, unsigned int *len, + unsigned int count, unsigned char checksum) +{ + unsigned int _len; + char countstr[10]; + + /* Correct data count. */ + count %= GC_SURFACE_DATA_COUNT; + if (count == 0) + count = GC_SURFACE_DATA_COUNT; + + snprintf(countstr, sizeof(countstr), "%02X", count); + buffer[indent + 1] = countstr[0]; + buffer[indent + 2] = countstr[1]; + + /* Append the checksum. */ + _len = *len; + _len += snprintf(buffer + _len, sizeof(buffer) - _len, + "%02X", checksum); + + /* Print the string. */ + GC_PRINTK(s, "%s\n", buffer); + + /* Reset the length. */ + *len = indent; +} + +static void gc_print_surface(struct seq_file *s, struct itembuffer *itembuffer, + unsigned char *data) +{ + char buffer[GC_MAXSTR_LENGTH]; + unsigned int i, indent, len; + unsigned int prevupper32 = ~0U; + unsigned int currupper32; + unsigned int offset, address; + unsigned int width, height; + + /* Append the indent string. */ + indent = gc_get_indent(itembuffer->indent, buffer, sizeof(buffer)); + + /* Print the title. */ + GC_PRINTK(s, "%sIMAGE SURFACE @ 0x%08X\n", + buffer, itembuffer->gpuaddr); + + GC_PRINTK(s, "%s surface size = %dx%d\n", + buffer, itembuffer->surfwidth, itembuffer->surfheight); + + GC_PRINTK(s, "%s surface colordepth = %d\n", + buffer, itembuffer->surfbpp); + + GC_PRINTK(s, "%s dumping rectangle = (%d,%d)-(%d,%d)\n", + buffer, itembuffer->x1, itembuffer->y1, + itembuffer->x2, itembuffer->y2); + + /* Add TGA header. */ + width = itembuffer->x2 - itembuffer->x1; + height = itembuffer->y2 - itembuffer->y1; + GC_PRINTK(s, ":12000000000002000000000000000000" + "%02X%02X%02X%02X%02X2000\n", + (width & 0xFF), ((width >> 8) & 0xFF), + (height & 0xFF), ((height >> 8) & 0xFF), + itembuffer->surfbpp * 8); + + /* TGA skip header. */ + offset = 18; + + /* Print the buffer. */ + for (i = 0, len = indent; i < itembuffer->datasize; i += 1) { + /* Determine the current address. */ + address = offset + i; + + /* Determine the current higher 16 bits of the address. */ + currupper32 = address >> 16; + + /* Did it change? */ + if (currupper32 != prevupper32) { + /* Print the previous data if any. */ + if ((i % GC_SURFACE_DATA_COUNT) != 0) + gc_flush_line(s, buffer, indent, &len, i, 0); + + /* Set new upper address. */ + prevupper32 = currupper32; + GC_PRINTK(s, ":02000004%04X00\n", prevupper32); + + /* Add the line prefix. */ + len += snprintf(buffer + len, + sizeof(buffer) - len - 2, + ":xx%04X00", address & 0xFFFF); + } else if ((i % GC_SURFACE_DATA_COUNT) == 0) { + len += snprintf(buffer + len, + sizeof(buffer) - len - 2, + ":xx%04X00", address & 0xFFFF); + } + + /* Append the data value. */ + len += snprintf(buffer + len, + sizeof(buffer) - len - 2, + "%02X", data[i]); + + /* End of line? */ + if (((i + 1) % GC_SURFACE_DATA_COUNT) == 0) + gc_flush_line(s, buffer, indent, &len, i + 1, 0); + } + + /* Print the last partial string. */ + if ((i % GC_SURFACE_DATA_COUNT) != 0) + gc_flush_line(s, buffer, indent, &len, i, 0); + + /* End of dump. */ + GC_PRINTK(s, ":00000001FF\n"); +} + +typedef void (*printbuffer) (struct seq_file *s, struct itembuffer *itembuffer, + unsigned char *data); + +static printbuffer g_printbuffer[] = { + gc_print_generic, + gc_print_command, + gc_print_surface +}; + +static void gc_print_buffer(struct seq_file *s, struct itembuffer *itembuffer, + unsigned char *data) +{ + if (((int) itembuffer->buffertype < 0) || + (itembuffer->buffertype >= countof(g_printbuffer))) { + GC_PRINTK(s, "BUFFER ENTRY 0x%08X\n", + (unsigned int) itembuffer); + GC_PRINTK(s, "INVALID BUFFER TYPE %d\n", + itembuffer->buffertype); + } else { + g_printbuffer[itembuffer->buffertype](s, itembuffer, data); + } +} + + +/******************************************************************************* + * Print function wrappers. + */ + +#if GC_BUFFERED_OUTPUT +static unsigned int gc_print_none(struct seq_file *s, struct buffout *buffout, + struct itemhead *item) +{ + /* Return the size of the node. */ + return get_item_size_terminator(item); +} + +static unsigned int gc_print_string_wrapper(struct seq_file *s, + struct buffout *buffout, + struct itemhead *item) +{ + /* Print the message. */ + gc_print_string(s, (struct itemstring *) item); + + /* Return the size of the node. */ + return get_item_size_string(item); +} + +static unsigned int gc_print_buffer_wrapper(struct seq_file *s, + struct buffout *buffout, + struct itemhead *item) +{ + unsigned char *data; + struct itembuffer *itembuffer = (struct itembuffer *) item; + + /* Compute data address. */ + data = (unsigned char *) (itembuffer + 1); + + /* Print the message. */ + gc_print_buffer(s, (struct itembuffer *) item, data); + + /* Return the size of the node. */ + return get_item_size_buffer(item); +} + +typedef unsigned int (*printitem) (struct seq_file *s, struct buffout *buffout, + struct itemhead *item); + +static printitem g_printarray[] = { + gc_print_none, + gc_print_string_wrapper, + gc_print_buffer_wrapper +}; +#endif + + +/******************************************************************************* + * Private functions. + */ + +unsigned int gc_get_bpp(unsigned int format) +{ + unsigned int bpp; + + switch (format) { + case GCREG_DE_FORMAT_INDEX8: + case GCREG_DE_FORMAT_A8: + bpp = 1; + break; + + case GCREG_DE_FORMAT_X4R4G4B4: + case GCREG_DE_FORMAT_A4R4G4B4: + case GCREG_DE_FORMAT_X1R5G5B5: + case GCREG_DE_FORMAT_A1R5G5B5: + case GCREG_DE_FORMAT_R5G6B5: + case GCREG_DE_FORMAT_YUY2: + case GCREG_DE_FORMAT_UYVY: + case GCREG_DE_FORMAT_RG16: + bpp = 2; + break; + + case GCREG_DE_FORMAT_X8R8G8B8: + case GCREG_DE_FORMAT_A8R8G8B8: + bpp = 4; + break; + + default: + bpp = 0; + } + + return bpp; +} + +#if GC_BUFFERED_OUTPUT +static void gc_buffer_flush(struct seq_file *s, struct buffout *buffout) +{ + int i, skip; + struct itemhead *item; + + if (buffout->count == 0) + return; + + GC_PRINTK(s, "****************************************" + "****************************************\n"); + GC_PRINTK(s, "FLUSHING DEBUG OUTPUT BUFFER (%d elements).\n", + buffout->count); + +#if !GC_ENABLE_OVERFLOW + { + int occupied = (100 * (buffout->index - buffout->start)) + / GC_DUMP_BUFFER_SIZE; + if (buffout->start != 0) + GC_PRINTK(s, " START = %d\n", buffout->start); + GC_PRINTK(s, " INDEX = %d\n", buffout->index); + GC_PRINTK(s, " BUFFER USE = %d%%\n", occupied); + } +#endif + + GC_PRINTK(s, "****************************************" + "****************************************\n"); + + item = (struct itemhead *) &buffout->buffer[buffout->start]; + GC_DEBUGMSG("start=%d.\n", buffout->start); + + for (i = 0; i < buffout->count; i += 1) { + GC_DEBUGMSG("printing item %d of type %d @ 0x%08X.\n", + i, item->type, (unsigned int) item); + skip = (*g_printarray[item->type]) (s, buffout, item); + + item = (struct itemhead *) ((unsigned char *) item + skip); + GC_DEBUGMSG("next item @ 0x%08X.\n", (unsigned int) item); + + if (item->type == GC_BUFITEM_NONE) { + GC_DEBUGMSG("reached the end of buffer.\n"); + item = (struct itemhead *) buffout->buffer; + } + } + + GC_DEBUGMSG("resetting the buffer.\n"); + buffout->start = 0; + buffout->index = 0; + buffout->count = 0; +} + +static struct itemhead *gc_allocate_item(struct buffout *buffout, int size) +{ + struct itemhead *item, *next; + int endofbuffer = (buffout->index + size + >= GC_DUMP_BUFFER_SIZE - sizeof(struct itemhead)); + +#if GC_ENABLE_OVERFLOW + int skip, bufferoverflow; + + bufferoverflow = (buffout->index < buffout->start) && + (buffout->index + size >= buffout->start); + + if (endofbuffer || bufferoverflow) { + if (endofbuffer) { + if (buffout->index < buffout->start) { + item = (struct itemhead *) + &buffout->buffer[buffout->start]; + + while (item->type != GC_BUFITEM_NONE) { + skip = (*g_itemsize[item->type]) (item); + + buffout->start += skip; + buffout->count -= 1; + + item->type = GC_BUFITEM_NONE; + item = (struct itemhead *) + ((unsigned char *) item + skip); + } + + buffout->start = 0; + } + + buffout->index = 0; + } + + item = (struct itemhead *) &buffout->buffer[buffout->start]; + + while (buffout->start - buffout->index <= size) { + skip = (*g_itemsize[item->type]) (item); + + buffout->start += skip; + buffout->count -= 1; + + item->type = GC_BUFITEM_NONE; + item = (struct itemhead *) + ((unsigned char *) item + skip); + + if (item->type == GC_BUFITEM_NONE) { + buffout->start = 0; + break; + } + } + } +#else + if (endofbuffer) { + GC_PRINTK(NULL, "message buffer full; " + "forcing message flush.\n\n"); + gc_buffer_flush(NULL, buffout); + } +#endif + + item = (struct itemhead *) &buffout->buffer[buffout->index]; + + buffout->index += size; + buffout->count += 1; + + next = (struct itemhead *) ((unsigned char *) item + size); + next->type = GC_BUFITEM_NONE; + + return item; +} + +static void gc_append_string(struct buffout *buffout, + struct itemstring *itemstring) +{ + unsigned char *messagedata; + struct itemstring *item; + unsigned int alignment; + int size, freesize; + int allocsize; + + /* Determine the maximum item size. */ + allocsize = sizeof(struct itemstring) + itemstring->datasize + + GC_VARARG_ALIGNMENT; + + /* Allocate the item. */ + item = (struct itemstring *) gc_allocate_item(buffout, allocsize); + GC_DEBUGMSG("allocated %d bytes @ 0x%08X.\n", + allocsize, (unsigned int) item); + + /* Compute the initial message data pointer. */ + messagedata = (unsigned char *) (item + 1); + + /* Align the data pointer as necessary. */ + alignment = GC_PTRALIGNMENT(messagedata, GC_VARARG_ALIGNMENT); + messagedata += alignment; + GC_DEBUGMSG("messagedata @ 0x%08X.\n", (unsigned int) messagedata); + + /* Set item data. */ + item->itemtype = GC_BUFITEM_STRING; + item->indent = itemstring->indent; + item->message = itemstring->message; + item->messagedata = *(va_list *) &messagedata; + item->datasize = itemstring->datasize; + +#if GC_SHOW_PID + item->pid = itemstring->pid; +#endif + +#if GC_SHOW_DUMP_LINE + item->dumpline = itemstring->dumpline; +#endif + + /* Copy argument value. */ + if (itemstring->datasize != 0) { + GC_DEBUGMSG("copying %d bytes of messagedata.\n", + itemstring->datasize); + memcpy(messagedata, + *(unsigned char **) &itemstring->messagedata, + itemstring->datasize); + } + + /* Compute the actual node size. */ + size = sizeof(struct itemstring) + itemstring->datasize + alignment; + GC_DEBUGMSG("adjusted item size=%d.\n", size); + + /* Free extra memory if any. */ + freesize = allocsize - size; + GC_DEBUGMSG("freesize=%d.\n", freesize); + + if (freesize != 0) { + struct itemhead *next; + buffout->index -= freesize; + next = (struct itemhead *) ((unsigned char *) item + size); + next->type = GC_BUFITEM_NONE; + } + +#if GC_BUFFERED_OUTPUT && GC_FLUSH_COUNT + if (buffout->count >= GC_FLUSH_COUNT) { + GC_PRINTK(NULL, "reached %d message count; " + "forcing message flush.\n\n", buffout->count); + gc_buffer_flush(NULL, buffout); + } +#endif +} + +static void gc_append_buffer(struct buffout *buffout, + struct itembuffer *itembuffer, + unsigned int *data) +{ + struct itembuffer *item; + int allocsize; + + /* Determine the item size. */ + allocsize = sizeof(struct itembuffer) + itembuffer->datasize; + + /* Allocate the item. */ + item = (struct itembuffer *) gc_allocate_item(buffout, allocsize); + GC_DEBUGMSG("allocated %d bytes @ 0x%08X.\n", + allocsize, (unsigned int) item); + + /* Set item data. */ + *item = *itembuffer; + + /* Copy data. */ + memcpy(item + 1, data, itembuffer->datasize); + +#if GC_BUFFERED_OUTPUT && GC_FLUSH_COUNT + if (buffout->count >= GC_FLUSH_COUNT) { + GC_PRINTK(NULL, "reached %d message count; " + "forcing message flush.\n\n", buffout->count); + gc_buffer_flush(NULL, buffout); + } +#endif +} +#endif + +static void gc_print(struct buffout *buffout, unsigned int argsize, + const char *message, va_list args) +{ + struct itemstring itemstring; + struct threadinfo *threadinfo; + + GCLOCK(&g_lockmutex); + + /* Locate thead entry. */ + threadinfo = get_threadinfo(buffout); + + /* Form the indent string. */ + if (strncmp(message, "--", 2) == 0) + threadinfo->msgindent -= 2; + + /* Fill in the sructure. */ + itemstring.itemtype = GC_BUFITEM_STRING; + itemstring.indent = threadinfo->msgindent + + threadinfo->threadindent; + itemstring.message = message; + itemstring.messagedata = args; + itemstring.datasize = argsize; + +#if GC_SHOW_PID + itemstring.pid = threadinfo->pid; +#endif + +#if GC_SHOW_DUMP_LINE + itemstring.dumpline = ++buffout->dumpline; +#endif + + /* Print the message. */ +#if GC_BUFFERED_OUTPUT + gc_append_string(buffout, &itemstring); +#else + gc_print_string(NULL, &itemstring); +#endif + + /* Check increasing indent. */ + if (strncmp(message, "++", 2) == 0) + threadinfo->msgindent += 2; + + GCUNLOCK(&g_lockmutex); +} + + +/******************************************************************************* + * Dumping functions. + */ + +void gc_dump_string(struct gcdbgfilter *filter, unsigned int zone, + const char *message, ...) +{ + va_list args; + unsigned int i, count, argsize; + + if (!g_outputbuffer.enable) + return; + + if (message == NULL) + GC_DEBUGMSG("message is NULL.\n"); + + if (GC_VERIFY_ENABLE(filter, zone)) { + for (i = 0, count = 0; message[i]; i += 1) + if (message[i] == '%') + count += 1; + + argsize = count * sizeof(unsigned int); + GC_DEBUGMSG("argsize=%d.\n", argsize); + + va_start(args, message); + gc_print(&g_outputbuffer, argsize, message, args); + va_end(args); + } +} +EXPORT_SYMBOL(gc_dump_string); + +void gc_dump_string_sized(struct gcdbgfilter *filter, unsigned int zone, + unsigned int argsize, const char *message, ...) +{ + va_list args; + + if (!g_outputbuffer.enable) + return; + + if (GC_VERIFY_ENABLE(filter, zone)) { + va_start(args, message); + gc_print(&g_outputbuffer, argsize, message, args); + va_end(args); + } +} +EXPORT_SYMBOL(gc_dump_string_sized); + +void gc_dump_cmd_buffer(struct gcdbgfilter *filter, unsigned int zone, + void *ptr, unsigned int gpuaddr, unsigned int datasize) +{ + struct itembuffer itembuffer; + struct threadinfo *threadinfo; + + if (!g_outputbuffer.enable) + return; + + if (GC_VERIFY_ENABLE(filter, zone)) { + GCLOCK(&g_lockmutex); + + /* Locate thead entry. */ + threadinfo = get_threadinfo(&g_outputbuffer); + + /* Fill in the sructure. */ + itembuffer.itemtype = GC_BUFITEM_BUFFER; + itembuffer.buffertype = GC_BUFTYPE_COMMAND; + itembuffer.indent = threadinfo->msgindent + + threadinfo->threadindent; + itembuffer.datasize = datasize; + itembuffer.gpuaddr = gpuaddr; + + /* Print the message. */ +#if GC_BUFFERED_OUTPUT + gc_append_buffer(NULL, &g_outputbuffer, &itembuffer, + (unsigned int *) ptr); +#else + gc_print_buffer(NULL, &itembuffer, + (unsigned char *) ptr); +#endif + + GCUNLOCK(&g_lockmutex); + } +} +EXPORT_SYMBOL(gc_dump_cmd_buffer); + +void gc_dump_buffer(struct gcdbgfilter *filter, unsigned int zone, + void *ptr, unsigned int gpuaddr, + unsigned int datasize) +{ + struct itembuffer itembuffer; + struct threadinfo *threadinfo; + + if (!g_outputbuffer.enable) + return; + + if (GC_VERIFY_ENABLE(filter, zone)) { + GCLOCK(&g_lockmutex); + + /* Locate thead entry. */ + threadinfo = get_threadinfo(&g_outputbuffer); + + /* Fill in the sructure. */ + itembuffer.itemtype = GC_BUFITEM_BUFFER; + itembuffer.buffertype = GC_BUFTYPE_GENERIC; + itembuffer.indent = threadinfo->msgindent + + threadinfo->threadindent; + itembuffer.datasize = datasize; + itembuffer.gpuaddr = gpuaddr; + + /* Print the message. */ +#if GC_BUFFERED_OUTPUT + gc_append_buffer(NULL, &g_outputbuffer, &itembuffer, + (unsigned int *) ptr); +#else + gc_print_buffer(NULL, &itembuffer, + (unsigned char *) ptr); +#endif + + GCUNLOCK(&g_lockmutex); + } +} +EXPORT_SYMBOL(gc_dump_buffer); + + +/******************************************************************************* + * Dumping control functions. + */ + +void gc_dump_enable(void) +{ + GCLOCK(&g_lockmutex); + + g_outputbuffer.enable = 1; + GC_PRINTK(NULL, "gcx dumping is enabled.\n"); + + GCUNLOCK(&g_lockmutex); +} +EXPORT_SYMBOL(gc_dump_enable); + +void gc_dump_disable(void) +{ + GCLOCK(&g_lockmutex); + + g_outputbuffer.enable = 0; + GC_PRINTK(NULL, "gcx dumping is disabled.\n"); + + GCUNLOCK(&g_lockmutex); +} +EXPORT_SYMBOL(gc_dump_disable); + +void gc_dump_show_enabled(struct seq_file *s) +{ + struct list_head *filterhead; + struct gcdbgfilter *filter; + unsigned int i, zone; + + GCLOCK(&g_lockmutex); + + GC_PRINTK(s, "gcx logging is %s\n", g_outputbuffer.enable + ? "enabled" : "disabled"); + + list_for_each(filterhead, &gc_filterlist) { + filter = list_entry(filterhead, struct gcdbgfilter, + link); + + GC_PRINTK(s, "gcx filter '%s':\n", filter->filtername); + GC_PRINTK(s, " zone mask = 0x%08X%s\n", filter->zone, + (filter->zone == 0) + ? " (all disabled)" : ""); + + for (i = 0; filter->zonename[i] != NULL; i++) { + zone = 1 << i; + GC_PRINTK(s, " 0x%08X: %10s%s\n", + zone, filter->zonename[i], + ((filter->zone & zone) != 0) + ? " (enabled)" : ""); + } + } + + GCUNLOCK(&g_lockmutex); +} +EXPORT_SYMBOL(gc_dump_show_enabled); + +void gc_dump_filter_enable(const char *filtername, int zone) +{ + struct list_head *filterhead; + struct gcdbgfilter *filter; + unsigned int filterfound = 0; + unsigned int havesetzones = 0; + + GCLOCK(&g_lockmutex); + + GC_PRINTK(NULL, "modifying zone mask for filter %s:\n", filtername); + + list_for_each(filterhead, &gc_filterlist) { + filter = list_entry(filterhead, struct gcdbgfilter, + link); + + if (strcasecmp(filtername, filter->filtername) == 0) { + GC_PRINTK(NULL, " 0x%08X --> 0x%08X\n", + filter->zone, zone); + filter->zone = zone; + filterfound = 1; + } + + if (filter->zone != 0) + havesetzones = 1; + } + + GCUNLOCK(&g_lockmutex); + + if (!filterfound) + GC_PRINTK(NULL, " couldn't find filter %s.\n", filtername); + + if (havesetzones && !g_outputbuffer.enable) + gc_dump_enable(); + else if (!havesetzones && g_outputbuffer.enable) + gc_dump_disable(); +} +EXPORT_SYMBOL(gc_dump_filter_enable); + +void gc_dbg_add_client(struct gcdbgfilter *filter) +{ + list_add(&filter->link, &gc_filterlist); +} +EXPORT_SYMBOL(gc_dbg_add_client); + +void gc_dump_flush(struct seq_file *s) +{ +#if GC_BUFFERED_OUTPUT + GCLOCK(&g_lockmutex); + + /* + * Not dumping through debugfs for now because we have + * too much data and it'd require us to implement the + * seq_file iterator interface. + */ + gc_buffer_flush(NULL, &g_outputbuffer); + + GCUNLOCK(&g_lockmutex); +#endif +} +EXPORT_SYMBOL(gc_dump_flush); + +void gc_dump_reset(void) +{ +#if GC_BUFFERED_OUTPUT + GCLOCK(&g_lockmutex); + + g_outputbuffer.start = 0; + g_outputbuffer.index = 0; + g_outputbuffer.count = 0; + + GC_PRINTK(NULL, "gcx logging buffer is reset.\n"); + + GCUNLOCK(&g_lockmutex); +#endif +} +EXPORT_SYMBOL(gc_dump_reset); + + +/******************************************************************************* + * Command buffer parser. + */ + +int gc_parse_command_buffer(unsigned int *buffer, unsigned int size, + struct gccommandinfo *info) +{ + int res; + unsigned int i, j, itemcount, index, oldsrc; + unsigned int command, count, addr; + + memset(info, 0, sizeof(struct gccommandinfo)); + info->command = ~0U; + + oldsrc = 0; + + itemcount = (size + 3) / 4; + for (i = 0; i < itemcount;) { + command = (buffer[i] >> 27) & 0x1F; + + switch (command) { + case GCREG_COMMAND_OPCODE_LOAD_STATE: + count = (buffer[i] >> 16) & 0x3F; + addr = buffer[i] & 0xFFFF; + i += 1; + + for (j = 0; j < count; j += 1) { + switch (addr) { + case gcregDestAddressRegAddrs: + info->dst.surf.address = buffer[i]; + break; + + case gcregDestStrideRegAddrs: + info->dst.surf.stride = buffer[i]; + break; + + case gcregDestRotationConfigRegAddrs: + info->dst.surf.width + = buffer[i] & 0xFFFF; + break; + + case gcregDstRotationHeightRegAddrs: + info->dst.surf.height + = buffer[i] & 0xFFFF; + break; + + case gcregDestConfigRegAddrs: + info->command + = (buffer[i] >> 12) & 0xF; + + info->dst.surf.swizzle + = (buffer[i] >> 16) & 0x3; + + info->dst.surf.format + = buffer[i] & 0x1F; + + info->dst.surf.bpp = gc_get_bpp( + info->dst.surf.format); + break; + + case gcregSrcAddressRegAddrs: + info->src[0].surf.address = buffer[i]; + oldsrc = 1; + break; + + case gcregSrcStrideRegAddrs: + info->src[0].surf.stride = buffer[i]; + break; + + case gcregSrcRotationConfigRegAddrs: + info->src[0].surf.width + = buffer[i] & 0xFFFF; + break; + + case gcregSrcRotationHeightRegAddrs: + info->src[0].surf.height + = buffer[i] & 0xFFFF; + break; + + case gcregSrcConfigRegAddrs: + info->src[0].surf.swizzle + = (buffer[i] >> 20) & 0x3; + + info->src[0].surf.format + = (buffer[i] >> 24) & 0x1F; + + info->src[0].surf.bpp = gc_get_bpp( + info->src[0].surf.format); + break; + + case gcregSrcOriginRegAddrs: + info->src[0].rect.left + = buffer[i] & 0xFFFF; + + info->src[0].rect.top + = (buffer[i] >> 16) & 0xFFFF; + break; + + case gcregSrcSizeRegAddrs: + info->src[0].rect.right + = buffer[i] & 0xFFFF; + + info->src[0].rect.bottom + = (buffer[i] >> 16) & 0xFFFF; + break; + + case gcregBlock4SrcAddressRegAddrs: + case gcregBlock4SrcAddressRegAddrs + 1: + case gcregBlock4SrcAddressRegAddrs + 2: + case gcregBlock4SrcAddressRegAddrs + 3: + index = addr & 3; + info->src[index].surf.address + = buffer[i]; + break; + + case gcregBlock4SrcStrideRegAddrs: + case gcregBlock4SrcStrideRegAddrs + 1: + case gcregBlock4SrcStrideRegAddrs + 2: + case gcregBlock4SrcStrideRegAddrs + 3: + index = addr & 3; + info->src[index].surf.stride + = buffer[i]; + break; + + case gcregBlock4SrcRotationConfigRegAddrs: + case gcregBlock4SrcRotationConfigRegAddrs + 1: + case gcregBlock4SrcRotationConfigRegAddrs + 2: + case gcregBlock4SrcRotationConfigRegAddrs + 3: + index = addr & 3; + info->src[index].surf.width + = buffer[i] & 0xFFFF; + break; + + case gcregBlock4SrcRotationHeightRegAddrs: + case gcregBlock4SrcRotationHeightRegAddrs + 1: + case gcregBlock4SrcRotationHeightRegAddrs + 2: + case gcregBlock4SrcRotationHeightRegAddrs + 3: + index = addr & 3; + info->src[0].surf.height + = buffer[i] & 0xFFFF; + break; + + case gcregBlock4SrcConfigRegAddrs: + case gcregBlock4SrcConfigRegAddrs + 1: + case gcregBlock4SrcConfigRegAddrs + 2: + case gcregBlock4SrcConfigRegAddrs + 3: + index = addr & 3; + info->src[index].surf.swizzle + = (buffer[i] >> 20) & 0x3; + + info->src[index].surf.format + = (buffer[i] >> 24) & 0x1F; + + info->src[index].surf.bpp = gc_get_bpp( + info->src[index].surf.format); + break; + + case gcregBlock4SrcOriginRegAddrs: + case gcregBlock4SrcOriginRegAddrs + 1: + case gcregBlock4SrcOriginRegAddrs + 2: + case gcregBlock4SrcOriginRegAddrs + 3: + index = addr & 3; + info->src[index].rect.left + = buffer[i] & 0xFFFF; + + info->src[index].rect.top + = (buffer[i] >> 16) & 0xFFFF; + break; + + case gcregBlock4SrcSizeRegAddrs: + case gcregBlock4SrcSizeRegAddrs + 1: + case gcregBlock4SrcSizeRegAddrs + 2: + case gcregBlock4SrcSizeRegAddrs + 3: + index = addr & 3; + info->src[index].rect.right + = buffer[i] & 0xFFFF; + + info->src[index].rect.bottom + = (buffer[i] >> 16) & 0xFFFF; + break; + + case gcregDEMultiSourceRegAddrs: + info->srccount = (buffer[i] & 0x7) + 1; + break; + } + + addr += 1; + i += 1; + } + + i += ((~count) & 1); + break; + + case GCREG_COMMAND_OPCODE_END: + case GCREG_COMMAND_OPCODE_NOP: + case GCREG_COMMAND_OPCODE_WAIT: + case GCREG_COMMAND_OPCODE_LINK: + case GCREG_COMMAND_OPCODE_STALL: + i += 2; + break; + + case GCREG_COMMAND_OPCODE_STARTDE: + info->dst.rectcount = (buffer[i] >> 8) & 0xFF; + i += 2; + + for (j = 0; j < info->dst.rectcount; j += 1) { + info->dst.rect[j].left + = buffer[i] & 0xFFFF; + info->dst.rect[j].top + = (buffer[i] >> 16) & 0xFFFF; + i += 1; + + info->dst.rect[j].right + = buffer[i] & 0xFFFF; + info->dst.rect[j].bottom + = (buffer[i] >> 16) & 0xFFFF; + i += 1; + } + break; + + default: + res = 0; + gc_dump_string(NULL, 0, + "bad command (%d) " + "while parsing the command stream", + command); + goto exit; + } + + } + + /* Enable old source. */ + if ((info->srccount == 0) && oldsrc) + info->srccount = 1; + + /* Success. */ + res = 1; + +exit: + return res; +} +EXPORT_SYMBOL(gc_parse_command_buffer); + + +/******************************************************************************* + * Bltsville debugging. + */ + +char *gc_bvblend_name(enum bvblend blend) +{ + switch (blend) { + case BVBLEND_CLEAR: return "BVBLEND_CLEAR"; + case BVBLEND_SRC1: return "BVBLEND_SRC1"; + case BVBLEND_SRC2: return "BVBLEND_SRC2"; + case BVBLEND_SRC1OVER: return "BVBLEND_SRC1OVER"; + case BVBLEND_SRC2OVER: return "BVBLEND_SRC2OVER"; + case BVBLEND_SRC1IN: return "BVBLEND_SRC1IN"; + case BVBLEND_SRC2IN: return "BVBLEND_SRC2IN"; + case BVBLEND_SRC1OUT: return "BVBLEND_SRC1OUT"; + case BVBLEND_SRC2OUT: return "BVBLEND_SRC2OUT"; + case BVBLEND_SRC1ATOP: return "BVBLEND_SRC1ATOP"; + case BVBLEND_SRC2ATOP: return "BVBLEND_SRC2ATOP"; + case BVBLEND_XOR: return "BVBLEND_XOR"; + case BVBLEND_PLUS: return "BVBLEND_PLUS"; + case BVBLEND_NORMAL: return "BVBLEND_NORMAL"; + case BVBLEND_LIGHTEN: return "BVBLEND_LIGHTEN"; + case BVBLEND_DARKEN: return "BVBLEND_DARKEN"; + case BVBLEND_MULTIPLY: return "BVBLEND_MULTIPLY"; + case BVBLEND_AVERAGE: return "BVBLEND_AVERAGE"; + case BVBLEND_ADD: return "BVBLEND_ADD"; + case BVBLEND_SUBTRACT: return "BVBLEND_SUBTRACT"; + case BVBLEND_DIFFERENCE: return "BVBLEND_DIFFERENCE"; + case BVBLEND_NEGATE: return "BVBLEND_NEGATE"; + case BVBLEND_SCREEN: return "BVBLEND_SCREEN"; + case BVBLEND_EXCLUSION: return "BVBLEND_EXCLUSION"; + case BVBLEND_OVERLAY: return "BVBLEND_OVERLAY"; + case BVBLEND_SOFT_LIGHT: return "BVBLEND_SOFT_LIGHT"; + case BVBLEND_HARD_LIGHT: return "BVBLEND_HARD_LIGHT"; + case BVBLEND_COLOR_DODGE: return "BVBLEND_COLOR_DODGE"; + case BVBLEND_COLOR_BURN: return "BVBLEND_COLOR_BURN"; + case BVBLEND_LINEAR_LIGHT: return "BVBLEND_LINEAR_LIGHT"; + case BVBLEND_VIVID_LIGHT: return "BVBLEND_VIVID_LIGHT"; + case BVBLEND_PIN_LIGHT: return "BVBLEND_PIN_LIGHT"; + case BVBLEND_HARD_MIX: return "BVBLEND_HARD_MIX"; + case BVBLEND_REFLECT: return "BVBLEND_REFLECT"; + case BVBLEND_GLOW: return "BVBLEND_GLOW"; + case BVBLEND_PHOENIX: return "BVBLEND_PHOENIX"; + default: return "[UNKNOWN]"; + } +} +EXPORT_SYMBOL(gc_bvblend_name); + + +/******************************************************************************* + * Initialization/cleanup. + */ + +void gcdbg_init(void) +{ +#if GC_BUFFERED_OUTPUT + /* Allocate the debug buffer. */ + g_outputbuffer.buffer = kmalloc(GC_DUMP_BUFFER_SIZE, GFP_KERNEL); + if (g_outputbuffer.buffer == NULL) { + GC_PRINTK(NULL, "failed to allocate dump buffer.\n"); + return; + } +#endif + + g_initdone = 1; +} + +void gcdbg_exit(void) +{ +#if GC_BUFFERED_OUTPUT + if (g_outputbuffer.buffer != NULL) { + kfree(g_outputbuffer.buffer); + g_outputbuffer.buffer = NULL; + } +#endif + + g_initdone = 0; +} + +#endif /* GCDEBUG_ENABLE */ diff --git a/bltsville/gcbv/mirror/gcfill.c b/bltsville/gcbv/mirror/gcfill.c new file mode 100644 index 0000000..458be75 --- /dev/null +++ b/bltsville/gcbv/mirror/gcfill.c @@ -0,0 +1,258 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_COLOR (1 << 0) +#define GCZONE_FILL (1 << 1) + +GCDBG_FILTERDEF(fill, GCZONE_NONE, + "color", + "fill") + + +static inline unsigned int extract_component(unsigned int pixel, + const struct bvcomponent *desc) +{ + unsigned int component; + unsigned int component8; + + component = (pixel & desc->mask) >> desc->shift; + GCDBG(GCZONE_COLOR, "mask=0x%08X, shift=%d, component=0x%08X\n", + desc->mask, desc->shift, component); + + switch (desc->size) { + case 0: + component8 = 0xFF; + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + break; + + case 1: + component8 = component ? 0xFF : 0x00; + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + break; + + case 4: + component8 = component | (component << 4); + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + break; + + case 5: + component8 = (component << 3) | (component >> 2); + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + break; + + case 6: + component8 = (component << 2) | (component >> 4); + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + break; + + default: + component8 = component; + GCDBG(GCZONE_COLOR, "component8=0x%08X\n", component8); + } + + return component8; +} + +static unsigned int getinternalcolor(void *ptr, struct bvformatxlate *format) +{ + unsigned int srcpixel, dstpixel; + unsigned int r, g, b, a; + + switch (format->bitspp) { + case 16: + srcpixel = *(unsigned short *) ptr; + GCDBG(GCZONE_COLOR, "srcpixel=0x%08X\n", srcpixel); + break; + + case 32: + srcpixel = *(unsigned int *) ptr; + GCDBG(GCZONE_COLOR, "srcpixel=0x%08X\n", srcpixel); + break; + + default: + srcpixel = 0; + GCDBG(GCZONE_COLOR, "srcpixel=0x%08X\n", srcpixel); + } + + r = extract_component(srcpixel, &format->cs.rgb.comp->r); + g = extract_component(srcpixel, &format->cs.rgb.comp->g); + b = extract_component(srcpixel, &format->cs.rgb.comp->b); + a = extract_component(srcpixel, &format->cs.rgb.comp->a); + + GCDBG(GCZONE_COLOR, "(r,g,b,a)=0x%02X,0x%02X,0x%02X,0x%02X\n", + r, g, b, a); + + dstpixel = (a << 24) | (r << 16) | (g << 8) | b; + + GCDBG(GCZONE_COLOR, "dstpixel=0x%08X\n", dstpixel); + + return dstpixel; +} + +enum bverror do_fill(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct surfaceinfo *dstinfo; + struct gcmofill *gcmofill; + unsigned char *fillcolorptr; + struct bvbuffmap *dstmap = NULL; + + GCENTER(GCZONE_FILL); + + /* Finish previous batch if any. */ + bverror = batch->batchend(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Parse destination parameters. */ + bverror = parse_destination(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Setup rotation. */ + process_dest_rotation(bvbltparams, batch); + + /* Get a shortcut to the destination surface. */ + dstinfo = &batch->dstinfo; + + /* Verify if the destination parameter have been modified. */ + if ((batch->dstbyteshift != dstinfo->bytealign) || + (batch->dstphyswidth != dstinfo->physwidth) || + (batch->dstphysheight != dstinfo->physheight)) { + /* Set new values. */ + batch->dstbyteshift = dstinfo->bytealign; + batch->dstphyswidth = dstinfo->physwidth; + batch->dstphysheight = dstinfo->physheight; + + /* Mark as modified. */ + batch->batchflags |= BVBATCH_DST; + } + + /* Map the destination. */ + bverror = do_map(bvbltparams->dstdesc, batch, &dstmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /* Set the new destination. */ + bverror = set_dst(bvbltparams, batch, dstmap); + if (bverror != BVERR_NONE) + goto exit; + + /* Reset the modified flag. */ + batch->batchflags &= ~(BVBATCH_DST | + BVBATCH_CLIPRECT | + BVBATCH_DESTRECT); + + /*********************************************************************** + ** Allocate command buffer. + */ + + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmofill), + (void **) &gcmofill); + if (bverror != BVERR_NONE) + goto exit; + + /*********************************************************************** + ** Set dummy source. + */ + + /* Set surface dummy width and height. */ + gcmofill->src.rotation_ldst = gcmofillsrc_rotation_ldst; + gcmofill->src.rotation.raw = 0; + gcmofill->src.rotation.reg.surf_width = 1; + gcmofill->src.config.raw = 0; + + gcmofill->src.rotationheight_ldst = gcmofillsrc_rotationheight_ldst; + gcmofill->src.rotationheight.reg.height = 1; + gcmofill->src.rotationangle.raw = 0; + gcmofill->src.rotationangle.reg.dst = GCREG_ROT_ANGLE_ROT0; + gcmofill->src.rotationangle.reg.dst_mirror = GCREG_MIRROR_NONE; + + /* Disable alpha blending. */ + gcmofill->src.alphacontrol_ldst = gcmofillsrc_alphacontrol_ldst; + gcmofill->src.alphacontrol.raw = 0; + gcmofill->src.alphacontrol.reg.enable = GCREG_ALPHA_CONTROL_ENABLE_OFF; + + /*********************************************************************** + ** Set fill color. + */ + + fillcolorptr + = (unsigned char *) srcinfo->buf.desc->virtaddr + + srcinfo->rect.top * srcinfo->geom->virtstride + + srcinfo->rect.left * srcinfo->format.bitspp / 8; + + gcmofill->clearcolor_ldst = gcmofill_clearcolor_ldst; + gcmofill->clearcolor.raw = getinternalcolor(fillcolorptr, + &srcinfo->format); + + /*********************************************************************** + ** Configure and start fill. + */ + + /* Set destination configuration. */ + gcmofill->dstconfig_ldst = gcmofill_dstconfig_ldst; + gcmofill->dstconfig.raw = 0; + gcmofill->dstconfig.reg.swizzle = dstinfo->format.swizzle; + gcmofill->dstconfig.reg.format = dstinfo->format.format; + gcmofill->dstconfig.reg.command = GCREG_DEST_CONFIG_COMMAND_CLEAR; + + /* Set ROP3. */ + gcmofill->rop_ldst = gcmofill_rop_ldst; + gcmofill->rop.raw = 0; + gcmofill->rop.reg.type = GCREG_ROP_TYPE_ROP3; + gcmofill->rop.reg.fg = (unsigned char) bvbltparams->op.rop; + + /* Set START_DE command. */ + gcmofill->startde.cmd.fld = gcfldstartde; + + /* Set destination rectangle. */ + gcmofill->rect.left = batch->dstadjusted.left; + gcmofill->rect.top = batch->dstadjusted.top; + gcmofill->rect.right = batch->dstadjusted.right; + gcmofill->rect.bottom = batch->dstadjusted.bottom; + +exit: + GCEXITARG(GCZONE_FILL, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} diff --git a/bltsville/gcbv/mirror/gcfilter.c b/bltsville/gcbv/mirror/gcfilter.c new file mode 100644 index 0000000..525e242 --- /dev/null +++ b/bltsville/gcbv/mirror/gcfilter.c @@ -0,0 +1,1788 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_KERNEL (1 << 0) +#define GCZONE_FILTER (1 << 1) +#define GCZONE_BLEND (1 << 2) +#define GCZONE_TYPE (1 << 3) +#define GCZONE_SRC (1 << 4) +#define GCZONE_DEST (1 << 5) +#define GCZONE_SURF (1 << 6) + +GCDBG_FILTERDEF(filter, GCZONE_NONE, + "kernel", + "filter", + "blend", + "type", + "src", + "dest", + "surf") + + +/******************************************************************************* + * Miscellaneous defines. + */ + +#define GC_BYTES_PER_CACHELINE (64) +#define GC_BITS_PER_CACHELINE (GC_BYTES_PER_CACHELINE * 8) +#define GC_CACHELINE_ALIGN_16 (GC_BITS_PER_CACHELINE / 16 - 1) +#define GC_CACHELINE_ALIGN_32 (GC_BITS_PER_CACHELINE / 32 - 1) + +enum gcscaletype { + GC_SCALE_OPF, + GC_SCALE_HOR, + GC_SCALE_VER, + GC_SCALE_HOR_FLIPPED, + GC_SCALE_VER_FLIPPED +}; + +/******************************************************************************* + * Scale factor format: unsigned 1.31 fixed point. + */ + +#define GC_SCALE_TYPE unsigned int +#define GC_SCALE_FRACTION 31 +#define GC_SCALE_ONE ((GC_SCALE_TYPE) (1 << GC_SCALE_FRACTION)) + + +/******************************************************************************* + * X coordinate format: signed 4.28 fixed point. + */ + +#define GC_COORD_TYPE int +#define GC_COORD_FRACTION 28 +#define GC_COORD_PI ((GC_COORD_TYPE) 0x3243F6C0) +#define GC_COORD_2OVERPI ((GC_COORD_TYPE) 0x0A2F9832) +#define GC_COORD_PIOVER2 ((GC_COORD_TYPE) 0x1921FB60) +#define GC_COORD_ZERO ((GC_COORD_TYPE) 0) +#define GC_COORD_HALF ((GC_COORD_TYPE) (1 << (GC_COORD_FRACTION - 1))) +#define GC_COORD_ONE ((GC_COORD_TYPE) (1 << GC_COORD_FRACTION)) +#define GC_COORD_NEGONE ((GC_COORD_TYPE) (~GC_COORD_ONE + 1)) +#define GC_COORD_SUBPIX_STEP ((GC_COORD_TYPE) \ + (1 << (GC_COORD_FRACTION - GC_PHASE_BITS))) + + +/******************************************************************************* + * Hardware coefficient format: signed 2.14 fixed point. + */ + +#define GC_COEF_TYPE short +#define GC_COEF_FRACTION 14 +#define GC_COEF_ZERO ((GC_COEF_TYPE) 0) +#define GC_COEF_ONE ((GC_COEF_TYPE) (1 << GC_COEF_FRACTION)) +#define GC_COEF_NEGONE ((GC_COEF_TYPE) (~GC_COEF_ONE + 1)) + + +/******************************************************************************* + * Weight sum format: x.28 fixed point. + */ + +#define GC_SUM_TYPE long long +#define GC_SUM_FRACTION GC_COORD_FRACTION + + +/******************************************************************************* + * Math shortcuts. + */ + +#define computescale(dstsize, srcsize) ((GC_SCALE_TYPE) \ + div_u64(((u64) (dstsize)) << GC_SCALE_FRACTION, (srcsize)) \ +) + +#define normweight(weight, sum) ((GC_COORD_TYPE) \ + div64_s64(((s64) (weight)) << GC_COORD_FRACTION, (sum)) \ +) + +#define convertweight(weight) ((GC_COEF_TYPE) \ + ((weight) >> (GC_COORD_FRACTION - GC_COEF_FRACTION)) \ +) + + +/******************************************************************************* + * Fixed point SINE function. Takes a positive value in range [0..pi/2]. + */ + +static GC_COORD_TYPE sine(GC_COORD_TYPE x) +{ + static const GC_COORD_TYPE sinetable[] = { + 0x00000000, 0x001FFFEB, 0x003FFF55, 0x005FFDC0, + 0x007FFAAB, 0x009FF596, 0x00BFEE01, 0x00DFE36C, + 0x00FFD557, 0x011FC344, 0x013FACB2, 0x015F9120, + 0x017F7010, 0x019F4902, 0x01BF1B78, 0x01DEE6F2, + 0x01FEAAEE, 0x021E66F0, 0x023E1A7C, 0x025DC50C, + 0x027D6624, 0x029CFD48, 0x02BC89F8, 0x02DC0BB8, + 0x02FB8204, 0x031AEC64, 0x033A4A5C, 0x03599B64, + 0x0378DF08, 0x039814CC, 0x03B73C2C, 0x03D654B0, + 0x03F55DDC, 0x04145730, 0x04334030, 0x04521868, + 0x0470DF58, 0x048F9488, 0x04AE3770, 0x04CCC7A8, + 0x04EB44A8, 0x0509ADF8, 0x05280328, 0x054643B0, + 0x05646F28, 0x05828508, 0x05A084E0, 0x05BE6E38, + 0x05DC4098, 0x05F9FB80, 0x06179E88, 0x06352928, + 0x06529AF8, 0x066FF380, 0x068D3248, 0x06AA56D8, + 0x06C760C0, 0x06E44F90, 0x070122C8, 0x071DD9F8, + 0x073A74B8, 0x0756F290, 0x07735308, 0x078F95B0, + 0x07ABBA20, 0x07C7BFD8, 0x07E3A678, 0x07FF6D88, + 0x081B14A0, 0x08369B40, 0x08520110, 0x086D4590, + 0x08886860, 0x08A36910, 0x08BE4730, 0x08D90250, + 0x08F39A20, 0x090E0E10, 0x09285DD0, 0x094288E0, + 0x095C8EF0, 0x09766F90, 0x09902A60, 0x09A9BEE0, + 0x09C32CC0, 0x09DC7390, 0x09F592F0, 0x0A0E8A70, + 0x0A2759C0, 0x0A400070, 0x0A587E20, 0x0A70D270, + 0x0A88FD00, 0x0AA0FD60, 0x0AB8D350, 0x0AD07E50, + 0x0AE7FE10, 0x0AFF5230, 0x0B167A50, 0x0B2D7610, + 0x0B444520, 0x0B5AE730, 0x0B715BC0, 0x0B87A290, + 0x0B9DBB40, 0x0BB3A580, 0x0BC960F0, 0x0BDEED30, + 0x0BF44A00, 0x0C0976F0, 0x0C1E73D0, 0x0C334020, + 0x0C47DBB0, 0x0C5C4620, 0x0C707F20, 0x0C848660, + 0x0C985B80, 0x0CABFE50, 0x0CBF6E60, 0x0CD2AB80, + 0x0CE5B550, 0x0CF88B80, 0x0D0B2DE0, 0x0D1D9C10, + 0x0D2FD5C0, 0x0D41DAB0, 0x0D53AAA0, 0x0D654540, + 0x0D76AA40, 0x0D87D970, 0x0D98D280, 0x0DA99530, + 0x0DBA2140, 0x0DCA7650, 0x0DDA9450, 0x0DEA7AD0, + 0x0DFA29B0, 0x0E09A0B0, 0x0E18DF80, 0x0E27E5F0, + 0x0E36B3C0, 0x0E4548B0, 0x0E53A490, 0x0E61C720, + 0x0E6FB020, 0x0E7D5F70, 0x0E8AD4C0, 0x0E980FF0, + 0x0EA510B0, 0x0EB1D6F0, 0x0EBE6260, 0x0ECAB2D0, + 0x0ED6C810, 0x0EE2A200, 0x0EEE4070, 0x0EF9A310, + 0x0F04C9E0, 0x0F0FB490, 0x0F1A6300, 0x0F24D510, + 0x0F2F0A80, 0x0F390340, 0x0F42BF10, 0x0F4C3DE0, + 0x0F557F70, 0x0F5E83C0, 0x0F674A80, 0x0F6FD3B0, + 0x0F781F20, 0x0F802CB0, 0x0F87FC40, 0x0F8F8DA0, + 0x0F96E0D0, 0x0F9DF5B0, 0x0FA4CC00, 0x0FAB63D0, + 0x0FB1BCF0, 0x0FB7D740, 0x0FBDB2B0, 0x0FC34F30, + 0x0FC8ACA0, 0x0FCDCAF0, 0x0FD2AA10, 0x0FD749E0, + 0x0FDBAA50, 0x0FDFCB50, 0x0FE3ACD0, 0x0FE74EC0, + 0x0FEAB110, 0x0FEDD3C0, 0x0FF0B6B0, 0x0FF359F0, + 0x0FF5BD50, 0x0FF7E0E0, 0x0FF9C490, 0x0FFB6850, + 0x0FFCCC30, 0x0FFDF010, 0x0FFED400, 0x0FFF77F0, + 0x0FFFDBF0, 0x0FFFFFE0, 0x0FFFE3D0, 0x0FFF87D0, + 0x0FFEEBC0, 0x0FFE0FC0, 0x0FFCF3D0, 0x0FFB97E0 + }; + + enum { + indexwidth = 8, + intwidth = 1, + indexshift = intwidth + + GC_COORD_FRACTION + - indexwidth + }; + + unsigned int p1, p2; + GC_COORD_TYPE p1x, p2x; + GC_COORD_TYPE p1y, p2y; + GC_COORD_TYPE dx, dy; + GC_COORD_TYPE a, b; + GC_COORD_TYPE result; + + /* Determine the indices of two closest points in the table. */ + p1 = ((unsigned int) x) >> indexshift; + p2 = p1 + 1; + + if ((p1 >= countof(sinetable)) || (p2 >= countof(sinetable))) { + GCERR("invalid table index.\n"); + return GC_COORD_ZERO; + } + + /* Determine the coordinates of the two closest points. */ + p1x = p1 << indexshift; + p2x = p2 << indexshift; + + p1y = sinetable[p1]; + p2y = sinetable[p2]; + + /* Determine the deltas. */ + dx = p2x - p1x; + dy = p2y - p1y; + + /* Find the slope and the y-intercept. */ + b = (GC_COORD_TYPE) div64_s64(((s64) dy) << GC_COORD_FRACTION, dx); + a = p1y - (GC_COORD_TYPE) (((s64) b * p1x) >> GC_COORD_FRACTION); + + /* Compute the result. */ + result = a + (GC_COORD_TYPE) (((s64) b * x) >> GC_COORD_FRACTION); + return result; +} + + +/******************************************************************************* + * SINC function used in filter kernel generation. + */ + +static GC_COORD_TYPE sinc_filter(GC_COORD_TYPE x, int radius) +{ + GC_COORD_TYPE result; + s64 radius64; + s64 pit, pitd; + s64 normpit, normpitd; + int negpit, negpitd; + int quadpit, quadpitd; + GC_COORD_TYPE sinpit, sinpitd; + GC_COORD_TYPE f1, f2; + + if (x == GC_COORD_ZERO) + return GC_COORD_ONE; + + radius64 = abs(radius) << GC_COORD_FRACTION; + if (x > radius64) + return GC_COORD_ZERO; + + pit = (((s64) GC_COORD_PI) * x) >> GC_COORD_FRACTION; + pitd = div_s64(pit, radius); + + /* Sine table only has values for the first positive quadrant, + * remove the sign here. */ + if (pit < 0) { + normpit = -pit; + negpit = 1; + } else { + normpit = pit; + negpit = 0; + } + + if (pitd < 0) { + normpitd = -pitd; + negpitd = 1; + } else { + normpitd = pitd; + negpitd = 0; + } + + /* Determine which quadrant we are in. */ + quadpit = (int) ((normpit * GC_COORD_2OVERPI) + >> (2 * GC_COORD_FRACTION)); + quadpitd = (int) ((normpitd * GC_COORD_2OVERPI) + >> (2 * GC_COORD_FRACTION)); + + /* Move coordinates to the first quadrant. */ + normpit -= (s64) GC_COORD_PIOVER2 * quadpit; + normpitd -= (s64) GC_COORD_PIOVER2 * quadpitd; + + /* Normalize the quadrant numbers. */ + quadpit %= 4; + quadpitd %= 4; + + /* Flip the coordinates if necessary. */ + if ((quadpit == 1) || (quadpit == 3)) + normpit = GC_COORD_PIOVER2 - normpit; + + if ((quadpitd == 1) || (quadpitd == 3)) + normpitd = GC_COORD_PIOVER2 - normpitd; + + sinpit = sine((GC_COORD_TYPE) normpit); + sinpitd = sine((GC_COORD_TYPE) normpitd); + + /* Negate depending on the quadrant. */ + if (negpit) { + if ((quadpit == 0) || (quadpit == 1)) + sinpit = -sinpit; + } else { + if ((quadpit == 2) || (quadpit == 3)) + sinpit = -sinpit; + } + + if (negpitd) { + if ((quadpitd == 0) || (quadpitd == 1)) + sinpitd = -sinpitd; + } else { + if ((quadpitd == 2) || (quadpitd == 3)) + sinpitd = -sinpitd; + } + + f1 = (GC_COORD_TYPE) + div64_s64(((s64) sinpit) << GC_COORD_FRACTION, pit); + f2 = (GC_COORD_TYPE) + div64_s64(((s64) sinpitd) << GC_COORD_FRACTION, pitd); + + result = (GC_COORD_TYPE) ((((s64) f1) * f2) + >> GC_COORD_FRACTION); + + return result; +} + + +/******************************************************************************* + * Filter kernel generator based on SINC function. + */ + +static void calculate_sync_filter(struct gcfilterkernel *gcfilterkernel) +{ + GC_SCALE_TYPE scale; + GC_COORD_TYPE subpixset[GC_TAP_COUNT]; + GC_COORD_TYPE subpixeloffset; + GC_COORD_TYPE x, weight; + GC_SUM_TYPE weightsum; + short convweightsum; + int kernelhalf, padding; + int subpixpos, kernelpos; + short *kernelarray; + short count, adjustfrom, adjustment; + int index; + + /* Compute the scale factor. */ + scale = (gcfilterkernel->dstsize >= gcfilterkernel->srcsize) + ? GC_SCALE_ONE + : computescale(gcfilterkernel->dstsize, gcfilterkernel->srcsize); + + /* Calculate the kernel half. */ + kernelhalf = (int) (gcfilterkernel->kernelsize >> 1); + + /* Init the subpixel offset. */ + subpixeloffset = GC_COORD_HALF; + + /* Determine kernel padding size. */ + padding = (GC_TAP_COUNT - gcfilterkernel->kernelsize) / 2; + + /* Set initial kernel array pointer. */ + kernelarray = gcfilterkernel->kernelarray; + + /* Loop through each subpixel. */ + for (subpixpos = 0; subpixpos < GC_PHASE_LOAD_COUNT; subpixpos += 1) { + /* Compute weights. */ + weightsum = GC_COORD_ZERO; + for (kernelpos = 0; kernelpos < GC_TAP_COUNT; kernelpos += 1) { + /* Determine the current index. */ + index = kernelpos - padding; + + /* Pad with zeros left side. */ + if (index < 0) { + subpixset[kernelpos] = GC_COORD_ZERO; + continue; + } + + /* Pad with zeros right side. */ + if (index >= (int) gcfilterkernel->kernelsize) { + subpixset[kernelpos] = GC_COORD_ZERO; + continue; + } + + /* "Filter off" case. */ + if (gcfilterkernel->kernelsize == 1) { + subpixset[kernelpos] = GC_COORD_ONE; + + /* Update the sum of the weights. */ + weightsum += GC_COORD_ONE; + continue; + } + + /* Compute X coordinate. */ + x = ((index - kernelhalf) << GC_COORD_FRACTION) + + subpixeloffset; + + /* Scale the coordinate. */ + x = (GC_COORD_TYPE) + ((((s64) x) * scale) >> GC_SCALE_FRACTION); + + /* Compute the weight. */ + subpixset[kernelpos] = sinc_filter(x, kernelhalf); + + /* Update the sum of the weights. */ + weightsum += subpixset[kernelpos]; + } + + /* Convert the weights to the hardware format. */ + convweightsum = 0; + for (kernelpos = 0; kernelpos < GC_TAP_COUNT; kernelpos += 1) { + /* Normalize the current weight. */ + weight = normweight(subpixset[kernelpos], weightsum); + + /* Convert the weight to fixed point. */ + if (weight == GC_COORD_ZERO) + kernelarray[kernelpos] = GC_COEF_ZERO; + else if (weight >= GC_COORD_ONE) + kernelarray[kernelpos] = GC_COEF_ONE; + else if (weight <= GC_COORD_NEGONE) + kernelarray[kernelpos] = GC_COEF_NEGONE; + else + kernelarray[kernelpos] = convertweight(weight); + + /* Compute the sum of all coefficients. */ + convweightsum += kernelarray[kernelpos]; + } + + /* Adjust the fixed point coefficients so that the sum is 1. */ + count = GC_COEF_ONE - convweightsum; + if (count < 0) { + count = -count; + adjustment = -1; + } else { + adjustment = 1; + } + + if (count > GC_TAP_COUNT) { + GCERR("adjust count is too high = %d\n", count); + } else { + adjustfrom = (GC_TAP_COUNT - count) / 2; + for (kernelpos = 0; kernelpos < count; kernelpos += 1) + kernelarray[adjustfrom + kernelpos] + += adjustment; + } + + /* Advance the array pointer. */ + kernelarray += GC_TAP_COUNT; + + /* Advance to the next subpixel. */ + subpixeloffset -= GC_COORD_SUBPIX_STEP; + } +} + + +/******************************************************************************* + * Loads a filter into the GPU. + */ + +static enum bverror load_filter(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + enum gcfiltertype type, + unsigned int kernelsize, + unsigned int scalefactor, + unsigned int srcsize, + unsigned int dstsize, + struct gccmdldstate arraystate) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + struct gcfiltercache *filtercache; + struct list_head *filterlist; + struct list_head *filterhead; + struct gcfilterkernel *gcfilterkernel; + struct gcmofilterkernel *gcmofilterkernel; + + GCDBG(GCZONE_KERNEL, "kernelsize = %d\n", kernelsize); + GCDBG(GCZONE_KERNEL, "srcsize = %d\n", srcsize); + GCDBG(GCZONE_KERNEL, "dstsize = %d\n", dstsize); + GCDBG(GCZONE_KERNEL, "scalefactor = 0x%08X\n", scalefactor); + + /* Is the filter already loaded? */ + if ((gccontext->loadedfilter != NULL) && + (gccontext->loadedfilter->type == type) && + (gccontext->loadedfilter->kernelsize == kernelsize) && + (gccontext->loadedfilter->scalefactor == scalefactor)) { + GCDBG(GCZONE_KERNEL, "filter already computed.\n"); + gcfilterkernel = gccontext->loadedfilter; + goto load; + } + + /* Get the proper filter cache. */ + filtercache = &gccontext->filtercache[type][kernelsize]; + filterlist = &filtercache->list; + + /* Try to find existing filter. */ + GCDBG(GCZONE_KERNEL, "scanning for existing filter.\n"); + list_for_each(filterhead, filterlist) { + gcfilterkernel = list_entry(filterhead, + struct gcfilterkernel, + link); + if (gcfilterkernel->scalefactor == scalefactor) { + GCDBG(GCZONE_KERNEL, "filter found @ 0x%08X.\n", + (unsigned int) gcfilterkernel); + break; + } + } + + /* Found the filter? */ + if (filterhead != filterlist) { + /* Move the filter to the head of the list. */ + if (filterlist->next != filterhead) { + GCDBG(GCZONE_KERNEL, "moving to the head.\n"); + list_move(filterhead, filterlist); + } + } else { + GCDBG(GCZONE_KERNEL, "filter not found.\n"); + if (filtercache->count == GC_FILTER_CACHE_MAX) { + GCDBG(GCZONE_KERNEL, + "reached the maximum number of filters.\n"); + filterhead = filterlist->prev; + list_move(filterhead, filterlist); + + gcfilterkernel = list_entry(filterhead, + struct gcfilterkernel, + link); + } else { + GCDBG(GCZONE_KERNEL, "allocating new filter.\n"); + gcfilterkernel = gcalloc(struct gcfilterkernel, + sizeof(struct gcfilterkernel)); + if (gcfilterkernel == NULL) { + BVSETBLTERROR(BVERR_OOM, + "filter allocation failed"); + goto exit; + } + + list_add(&gcfilterkernel->link, filterlist); + } + + /* Update the number of filters. */ + filtercache->count += 1; + + /* Initialize the filter. */ + gcfilterkernel->type = type; + gcfilterkernel->kernelsize = kernelsize; + gcfilterkernel->srcsize = srcsize; + gcfilterkernel->dstsize = dstsize; + gcfilterkernel->scalefactor = scalefactor; + + /* Compute the coefficients. */ + calculate_sync_filter(gcfilterkernel); + } + +load: + GCDBG(GCZONE_KERNEL, "loading filter.\n"); + + /* Load the filter. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmofilterkernel), + (void **) &gcmofilterkernel); + if (bverror != BVERR_NONE) + goto exit; + + gcmofilterkernel->kernelarray_ldst = arraystate; + memcpy(&gcmofilterkernel->kernelarray, + gcfilterkernel->kernelarray, + sizeof(gcfilterkernel->kernelarray)); + + /* Set the filter. */ + gccontext->loadedfilter = gcfilterkernel; + +exit: + return bverror; +} + + +/******************************************************************************* + * Compute the scale factor. + */ + +static inline unsigned int get_scale_factor(unsigned int srcsize, + unsigned int dstsize) +{ + if ((srcsize <= 1) || (dstsize <= 1)) + return 0; + + return ((srcsize - 1) << 16) / (dstsize - 1); +} + + +/******************************************************************************* + * Rotates the specified rectangle to the specified angle. + */ + +static void rotate_gcrect(int angle, + struct bvsurfgeom *srcgeom, struct gcrect *srcrect, + struct bvsurfgeom *dstgeom, struct gcrect *dstrect) +{ + unsigned int width, height; + struct gcrect rect; + + GCENTER(GCZONE_SURF); + + GCDBG(GCZONE_SURF, "src geom size = %dx%d\n", + srcgeom->width, srcgeom->height); + + switch (angle) { + case ROT_ANGLE_0: + GCDBG(GCZONE_SURF, "ROT_ANGLE_0\n"); + + if (dstgeom != srcgeom) { + dstgeom->width = srcgeom->width; + dstgeom->height = srcgeom->height; + } + + if (dstrect != srcrect) + *dstrect = *srcrect; + break; + + case ROT_ANGLE_90: + GCDBG(GCZONE_SURF, "ROT_ANGLE_90\n"); + + width = srcgeom->width; + height = srcgeom->height; + + dstgeom->width = height; + dstgeom->height = width; + + rect.left = height - srcrect->bottom; + rect.top = srcrect->left; + rect.right = height - srcrect->top; + rect.bottom = srcrect->right; + + *dstrect = rect; + break; + + case ROT_ANGLE_180: + GCDBG(GCZONE_SURF, "ROT_ANGLE_180\n"); + + width = srcgeom->width; + height = srcgeom->height; + + if (dstgeom != srcgeom) { + dstgeom->width = width; + dstgeom->height = height; + } + + rect.left = width - srcrect->right; + rect.top = height - srcrect->bottom; + rect.right = width - srcrect->left; + rect.bottom = height - srcrect->top; + + *dstrect = rect; + break; + + case ROT_ANGLE_270: + GCDBG(GCZONE_SURF, "ROT_ANGLE_270\n"); + + width = srcgeom->width; + height = srcgeom->height; + + dstgeom->width = height; + dstgeom->height = width; + + rect.left = srcrect->top; + rect.top = width - srcrect->right; + rect.right = srcrect->bottom; + rect.bottom = width - srcrect->left; + + *dstrect = rect; + break; + } + + GCEXIT(GCZONE_SURF); +} + + +/******************************************************************************* + * Setup destination rotation parameters. + */ + +void process_rotation(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo, + int adjangle) +{ + GCENTER(GCZONE_DEST); + + if (srcinfo->newgeom || + ((batch->batchflags & (BVBATCH_CLIPRECT | + BVBATCH_DESTRECT | + BVBATCH_DST)) != 0)) { + bool orthogonal; + struct gcfilter *gcfilter; + struct surfaceinfo *dstinfo; + int dstoffsetX, dstoffsetY; + + /* Get some shortcuts. */ + dstinfo = &batch->dstinfo; + gcfilter = &batch->op.filter; + + /* Compute the adjusted destination angle. */ + gcfilter->dstangle + = (dstinfo->angle + (4 - srcinfo->angle)) % 4; + GCDBG(GCZONE_DEST, "dstangle = %d\n", gcfilter->dstangle); + + /* Determine whether the new and the old destination angles + * are orthogonal to each other. */ + orthogonal = (gcfilter->dstangle % 2) != (dstinfo->angle % 2); + + switch (gcfilter->dstangle) { + case ROT_ANGLE_0: + /* Determine the origin offset. */ + dstoffsetX = dstinfo->xpixalign; + dstoffsetY = dstinfo->ypixalign; + + /* Determine geometry size. */ + if (orthogonal) { + batch->dstwidth = dstinfo->geom->height + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->width + - dstinfo->ypixalign; + } else { + batch->dstwidth = dstinfo->geom->width + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->ypixalign; + } + + /* Determine the physical size. */ + dstinfo->physwidth = batch->dstwidth; + dstinfo->physheight = batch->dstheight; + break; + + case ROT_ANGLE_90: + /* Determine the origin offset. */ + dstoffsetX = dstinfo->ypixalign; + dstoffsetY = dstinfo->xpixalign; + + if (orthogonal) { + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->height + - dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->width + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->width + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->height + - dstinfo->ypixalign; + } else { + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->height + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->width + - dstinfo->ypixalign; + } + break; + + case ROT_ANGLE_180: + /* Determine the origin offset. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Determine geometry size. */ + if (orthogonal) { + batch->dstwidth = dstinfo->geom->height + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->width + - dstinfo->ypixalign; + } else { + batch->dstwidth = dstinfo->geom->width + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->ypixalign; + } + + /* Determine the physical size. */ + dstinfo->physwidth = batch->dstwidth; + dstinfo->physheight = batch->dstheight; + break; + + case ROT_ANGLE_270: + /* Determine the origin offset. */ + dstoffsetX = 0; + dstoffsetY = 0; + + if (orthogonal) { + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->height + = dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->width + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->width + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->height + - dstinfo->ypixalign; + } else { + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->height + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->width + - dstinfo->ypixalign; + } + break; + + default: + dstoffsetX = 0; + dstoffsetY = 0; + } + + /* Rotate the original destination rectangle + * to match the new angle. */ + rotate_gcrect(adjangle, + dstinfo->geom, &dstinfo->rect, + &gcfilter->dstgeom, &gcfilter->dstrect); + + /* Rotate the clipped destination rectangle. */ + rotate_gcrect(adjangle, + dstinfo->geom, &batch->dstclipped, + &gcfilter->dstgeom, &gcfilter->dstclipped); + + /* Compute the adjusted the destination rectangle. */ + gcfilter->dstadjusted.left + = gcfilter->dstclipped.left - dstoffsetX; + gcfilter->dstadjusted.top + = gcfilter->dstclipped.top - dstoffsetY; + gcfilter->dstadjusted.right + = gcfilter->dstclipped.right - dstoffsetX; + gcfilter->dstadjusted.bottom + = gcfilter->dstclipped.bottom - dstoffsetY; + + GCPRINT_RECT(GCZONE_DEST, "rotated dstrect", + &gcfilter->dstrect); + GCPRINT_RECT(GCZONE_DEST, "rotated dstclipped", + &gcfilter->dstclipped); + GCPRINT_RECT(GCZONE_DEST, "rotated dstadjusted", + &gcfilter->dstadjusted); + + if (batch->haveaux) { + /* Rotate the original aux destination rectangle + * to match the new angle. */ + rotate_gcrect(adjangle, dstinfo->geom, + &batch->dstrectaux, &gcfilter->dstgeom, + &gcfilter->dstrectaux); + + /* Rotate the aux destination rectangle. */ + rotate_gcrect(adjangle, dstinfo->geom, + &batch->dstclippedaux, &gcfilter->dstgeom, + &gcfilter->dstclippedaux); + + /* Compute the adjust the aux destination rectangle. */ + gcfilter->dstadjustedaux.left + = batch->dstclippedaux.left - dstoffsetX; + gcfilter->dstadjustedaux.top + = batch->dstclippedaux.top - dstoffsetY; + gcfilter->dstadjustedaux.right + = batch->dstclippedaux.right - dstoffsetX; + gcfilter->dstadjustedaux.bottom + = batch->dstclippedaux.bottom - dstoffsetY; + + GCPRINT_RECT(GCZONE_DEST, "rotated dstrectaux", + &gcfilter->dstrectaux); + GCPRINT_RECT(GCZONE_DEST, "rotated dstclippedaux", + &gcfilter->dstclippedaux); + GCPRINT_RECT(GCZONE_DEST, "rotated dstadjustedaux", + &gcfilter->dstadjustedaux); + } + + GCDBG(GCZONE_DEST, "aligned geometry size = %dx%d\n", + batch->dstwidth, batch->dstheight); + GCDBG(GCZONE_DEST, "aligned physical size = %dx%d\n", + dstinfo->physwidth, dstinfo->physheight); + GCDBG(GCZONE_DEST, "origin offset (pixels) = %d,%d\n", + dstoffsetX, dstoffsetY); + } + + GCEXIT(GCZONE_DEST); +} + + +/******************************************************************************* + * Rasterizer setup. + */ + +static enum bverror startvr(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct bvbuffmap *srcmap, + struct bvbuffmap *dstmap, + struct surfaceinfo *srcinfo, + struct surfaceinfo *dstinfo, + unsigned int srcx, + unsigned int srcy, + struct gcrect *dstrect, + int srcangle, + int dstangle, + enum gcscaletype scaletype) +{ + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct gcfilter *gcfilter; + + struct gcmovrdst *gcmovrdst; + struct gcmovrsrc *gcmovrsrc; + struct gcmostartvr *gcmostartvr; + + struct gcrect srcrect; + + GCENTERARG(GCZONE_FILTER, "scaletype = %d\n", scaletype); + + /* Get a shortcut to the filter properties. */ + gcfilter = &batch->op.filter; + + /*********************************************************************** + * Program the destination. + */ + + GCDBG(GCZONE_FILTER, "destination:\n"); + GCDBG(GCZONE_FILTER, " angle = %d\n", dstangle); + GCDBG(GCZONE_FILTER, " pixalign = %d,%d\n", + dstinfo->xpixalign, dstinfo->ypixalign); + GCDBG(GCZONE_FILTER, " bytealign = %d\n", dstinfo->bytealign); + GCDBG(GCZONE_FILTER, " virtstride = %d\n", dstinfo->geom->virtstride); + GCDBG(GCZONE_FILTER, " format = %d\n", dstinfo->format.format); + GCDBG(GCZONE_FILTER, " swizzle = %d\n", dstinfo->format.swizzle); + GCDBG(GCZONE_FILTER, " premul = %d\n", dstinfo->format.premultiplied); + GCDBG(GCZONE_FILTER, " physwidth = %d\n", dstinfo->physwidth); + GCDBG(GCZONE_FILTER, " physheight = %d\n", dstinfo->physheight); + GCPRINT_RECT(GCZONE_FILTER, " rect", dstrect); + + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmovrdst), + (void **) &gcmovrdst); + if (bverror != BVERR_NONE) + goto exit; + + /* Add the address fixup. */ + add_fixup(bvbltparams, batch, &gcmovrdst->address, dstinfo->bytealign); + + /* Set surface parameters. */ + gcmovrdst->config_ldst = gcmovrdst_config_ldst; + gcmovrdst->address = GET_MAP_HANDLE(dstmap); + gcmovrdst->stride = dstinfo->geom->virtstride; + gcmovrdst->config.raw = 0; + gcmovrdst->config.reg.swizzle = dstinfo->format.swizzle; + gcmovrdst->config.reg.format = dstinfo->format.format; + + /* Set surface width and height. */ + gcmovrdst->rotation.raw = 0; + gcmovrdst->rotation.reg.surf_width = dstinfo->physwidth; + gcmovrdst->rotationheight_ldst = gcmovrdst_rotationheight_ldst; + gcmovrdst->rotationheight.raw = 0; + gcmovrdst->rotationheight.reg.height = dstinfo->physheight; + + /*********************************************************************** + * Program the source. + */ + + /* Determine adjusted source bounding rectangle and origin. */ + srcrect = srcinfo->rect; + srcrect.left -= srcinfo->xpixalign; + srcrect.right -= srcinfo->xpixalign; + srcx -= (srcinfo->xpixalign << 16); + + GCDBG(GCZONE_FILTER, "source:\n"); + GCDBG(GCZONE_FILTER, " angle = %d\n", srcangle); + GCDBG(GCZONE_FILTER, " pixalign = %d,%d\n", + srcinfo->xpixalign, srcinfo->ypixalign); + GCDBG(GCZONE_FILTER, " bytealign = %d\n", srcinfo->bytealign); + GCDBG(GCZONE_FILTER, " virtstride = %d\n", srcinfo->geom->virtstride); + GCDBG(GCZONE_FILTER, " format = %d\n", srcinfo->format.format); + GCDBG(GCZONE_FILTER, " swizzle = %d\n", srcinfo->format.swizzle); + GCDBG(GCZONE_FILTER, " premul = %d\n", srcinfo->format.premultiplied); + GCDBG(GCZONE_FILTER, " physwidth = %d\n", srcinfo->physwidth); + GCDBG(GCZONE_FILTER, " physheight = %d\n", srcinfo->physheight); + GCPRINT_RECT(GCZONE_FILTER, " rect", &srcrect); + + GCDBG(GCZONE_FILTER, "src origin: 0x%08X,0x%08X\n", srcx, srcy); + + /* Allocate command buffer. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmovrsrc), + (void **) &gcmovrsrc); + if (bverror != BVERR_NONE) + goto exit; + + add_fixup(bvbltparams, batch, &gcmovrsrc->address, srcinfo->bytealign); + + gcmovrsrc->config_ldst = gcmovrsrc_config_ldst; + + gcmovrsrc->address = GET_MAP_HANDLE(srcmap); + gcmovrsrc->stride = srcinfo->geom->virtstride; + + gcmovrsrc->rotation.raw = 0; + gcmovrsrc->rotation.reg.surf_width = srcinfo->physwidth; + + gcmovrsrc->config.raw = 0; + gcmovrsrc->config.reg.swizzle = srcinfo->format.swizzle; + gcmovrsrc->config.reg.format = srcinfo->format.format; + + if (gccontext->gcfeatures2.reg.l2cachefor420 && + (srcinfo->format.type == BVFMT_YUV) && + (srcinfo->format.cs.yuv.planecount > 1) && + ((srcinfo->angle & 1) != 0)) + gcmovrsrc->config.reg.disable420L2cache + = GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_DISABLED; + + gcmovrsrc->pos_ldst = gcmovrsrc_pos_ldst; + + /* Source image bounding box. */ + gcmovrsrc->lt.reg.left = srcrect.left; + gcmovrsrc->lt.reg.top = srcrect.top; + gcmovrsrc->rb.reg.right = srcrect.right; + gcmovrsrc->rb.reg.bottom = srcrect.bottom; + + /* Fractional origin. */ + gcmovrsrc->x = srcx; + gcmovrsrc->y = srcy; + + /* Program rotation. */ + gcmovrsrc->rotation_ldst = gcmovrsrc_rotation_ldst; + gcmovrsrc->rotationheight.reg.height = srcinfo->physheight; + gcmovrsrc->rotationangle.raw = 0; + gcmovrsrc->rotationangle.reg.src = rotencoding[srcangle]; + gcmovrsrc->rotationangle.reg.dst = rotencoding[dstangle]; + gcmovrsrc->rotationangle.reg.src_mirror = srcinfo->mirror; + gcmovrsrc->rotationangle.reg.dst_mirror = dstinfo->mirror; + + gcmovrsrc->rop_ldst = gcmovrsrc_rop_ldst; + gcmovrsrc->rop.raw = 0; + gcmovrsrc->rop.reg.type = GCREG_ROP_TYPE_ROP3; + gcmovrsrc->rop.reg.fg = 0xCC; + + /* Program multiply modes. */ + gcmovrsrc->mult_ldst = gcmovrsrc_mult_ldst; + gcmovrsrc->mult.raw = 0; + gcmovrsrc->mult.reg.srcglobalpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE; + + if (srcinfo->format.premultiplied) + gcmovrsrc->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + else + gcmovrsrc->mult.reg.srcpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + if (dstinfo->format.premultiplied) { + gcmovrsrc->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE; + + gcmovrsrc->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE; + } else { + gcmovrsrc->mult.reg.dstpremul + = GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE; + + gcmovrsrc->mult.reg.dstdemul + = GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE; + } + + /* Program YUV source. */ + if (srcinfo->format.type == BVFMT_YUV) { + bverror = set_yuvsrc(bvbltparams, batch, srcinfo, srcmap); + if (bverror != BVERR_NONE) + goto exit; + } + + /*********************************************************************** + * Program blending. + */ + + bverror = set_blending(bvbltparams, batch, srcinfo); + if (bverror != BVERR_NONE) + goto exit; + + /*********************************************************************** + * Start the operation. + */ + + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmostartvr), + (void **) &gcmostartvr); + if (bverror != BVERR_NONE) + goto exit; + + switch (scaletype) { + case GC_SCALE_OPF: + gcmostartvr->scalex = gcfilter->horscalefactor; + gcmostartvr->scaley = gcfilter->verscalefactor; + gcmostartvr->config = gcregvrconfig_onepass; + break; + + case GC_SCALE_HOR: + gcmostartvr->scalex = gcfilter->horscalefactor; + gcmostartvr->scaley = 0; + gcmostartvr->config = gcregvrconfig_horizontal; + break; + + case GC_SCALE_VER: + gcmostartvr->scalex = 0; + gcmostartvr->scaley = gcfilter->verscalefactor; + gcmostartvr->config = gcregvrconfig_vertical; + break; + + case GC_SCALE_HOR_FLIPPED: + gcmostartvr->scalex = 0; + gcmostartvr->scaley = gcfilter->horscalefactor; + gcmostartvr->config = gcregvrconfig_vertical; + break; + + case GC_SCALE_VER_FLIPPED: + gcmostartvr->scalex = gcfilter->verscalefactor; + gcmostartvr->scaley = 0; + gcmostartvr->config = gcregvrconfig_horizontal; + break; + } + + gcmostartvr->scale_ldst = gcmostartvr_scale_ldst; + gcmostartvr->rect_ldst = gcmostartvr_rect_ldst; + gcmostartvr->config_ldst = gcmostartvr_config_ldst; + + gcmostartvr->lt.left = dstrect->left; + gcmostartvr->lt.top = dstrect->top; + gcmostartvr->rb.right = dstrect->right; + gcmostartvr->rb.bottom = dstrect->bottom; + +exit: + GCEXITARG(GCZONE_FILTER, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + + +/******************************************************************************* + * Main fiter entry. + */ + +enum bverror do_filter(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct surfaceinfo *srcinfo) +{ + enum bverror bverror = BVERR_NONE; + struct gccontext *gccontext = get_context(); + + struct gcfilter *gcfilter; + struct surfaceinfo *dstinfo; + + bool scalex, scaley; + bool singlepass, twopass; + + struct gcrect *srcrect; + struct gcrect *dstrect; + struct gcrect *dstclipped; + struct gcrect *dstadjusted; + + struct bvsurfgeom dstrotated0geom; + struct gcrect dstrotated0; + + struct gcrect dstdelta; + struct gcrect srcdelta; + struct gcrect srcclipped; + + struct bvbuffmap *srcmap = NULL; + struct bvbuffmap *tmpmap = NULL; + struct bvbuffmap *dstmap = NULL; + + struct gcmovrconfigex *gcmovrconfigex; + + int adjangle; + unsigned int srcx, srcy; + unsigned int srcwidth, srcheight; + unsigned int dstwidth, dstheight; + unsigned int horscalefactor, verscalefactor; + unsigned int kernelsize; + + GCENTER(GCZONE_FILTER); + + /* Get some shortcuts. */ + dstinfo = &batch->dstinfo; + gcfilter = &batch->op.filter; + + /* Finish previous batch if any. */ + bverror = batch->batchend(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* ROP is not supported by the filters. */ + if ((srcinfo->rop & 0xFF) != 0xCC) { + BVSETBLTERROR(BVERR_ROP, + "only copy ROP is supported in scaling mode"); + goto exit; + } + + /* Parse the scale mode. */ + bverror = parse_scalemode(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Parse destination parameters. */ + bverror = parse_destination(bvbltparams, batch); + if (bverror != BVERR_NONE) + goto exit; + + /* Compute the source alignments needed to compensate + * for the surface base address misalignment if any. */ + srcinfo->xpixalign = get_pixel_offset(srcinfo, 0); + srcinfo->ypixalign = 0; + srcinfo->bytealign = (srcinfo->xpixalign + * (int) srcinfo->format.bitspp) / 8; + GCDBG(GCZONE_SRC, "source surface offset (pixels) = %d,%d\n", + srcinfo->xpixalign, srcinfo->ypixalign); + GCDBG(GCZONE_SRC, "source surface offset (bytes) = %d\n", + srcinfo->bytealign); + + /* Compute U/V plane offsets. */ + if ((srcinfo->format.type == BVFMT_YUV) && + (srcinfo->format.cs.yuv.planecount > 1)) + set_computeyuv(srcinfo, 0, 0); + + /* Determine physical size. */ + if ((srcinfo->angle % 2) == 0) { + srcinfo->physwidth = srcinfo->geom->width + - srcinfo->xpixalign; + srcinfo->physheight = srcinfo->geom->height + - srcinfo->ypixalign; + } else { + srcinfo->physwidth = srcinfo->geom->height + - srcinfo->xpixalign; + srcinfo->physheight = srcinfo->geom->width + - srcinfo->ypixalign; + } + GCDBG(GCZONE_SRC, "source physical size = %dx%d\n", + srcinfo->physwidth, srcinfo->physheight); + + /* OPF does not support source rotation, which can be compensated by + * using destination rotation. Compute the adjustment angle. + * For simplicity use the same algorythm for both OPF and TPF. */ + adjangle = (4 - srcinfo->angle) % 4; + GCDBG(GCZONE_DEST, "adjangle = %d\n", adjangle); + + /* Compute destination rotation. */ + process_rotation(bvbltparams, batch, srcinfo, adjangle); + + /* Rotate the source rectangle to 0 degree. */ + srcrect = &srcinfo->rect; + GCPRINT_RECT(GCZONE_FILTER, "full src", srcrect); + rotate_gcrect(adjangle, + srcinfo->geom, srcrect, + srcinfo->geom, srcrect); + GCPRINT_RECT(GCZONE_FILTER, "full adjusted src", srcrect); + + /* Get destination rect shortcuts. */ + if ((srcinfo->index == 1) && batch->haveaux) { + dstrect = &gcfilter->dstrectaux; + dstclipped = &gcfilter->dstclippedaux; + dstadjusted = &gcfilter->dstadjustedaux; + } else { + dstrect = &gcfilter->dstrect; + dstclipped = &gcfilter->dstclipped; + dstadjusted = &gcfilter->dstadjusted; + } + + GCPRINT_RECT(GCZONE_FILTER, "full adjusted dst", dstrect); + GCPRINT_RECT(GCZONE_FILTER, "clipped adjusted dst", dstclipped); + GCPRINT_RECT(GCZONE_FILTER, "aligned adjusted dst", dstadjusted); + + /* Determine the source and destination rectangles. */ + srcwidth = srcrect->right - srcrect->left; + srcheight = srcrect->bottom - srcrect->top; + dstwidth = dstrect->right - dstrect->left; + dstheight = dstrect->bottom - dstrect->top; + + GCDBG(GCZONE_FILTER, "adjusted input src size: %dx%d\n", + srcwidth, srcheight); + GCDBG(GCZONE_FILTER, "adjusted input dst size: %dx%d\n", + dstwidth, dstheight); + + /* Determine the data path. */ + scalex = (srcwidth != dstwidth); + scaley = (srcheight != dstheight); + + twopass = scalex && scaley; + if (twopass) { + if (((gcfilter->horkernelsize == 3) || + (gcfilter->horkernelsize == 5)) && + ((gcfilter->verkernelsize == 3) || + (gcfilter->verkernelsize == 5))) { + singlepass = true; + twopass = false; + } else { + singlepass = false; + } + } else { + /* Two pass filter in one pass mode. */ + if (!scalex && !scaley) + GCERR("no scaling needed.\n"); + + GCDBG(GCZONE_FILTER, "only %s scaling needed.\n", + scalex ? "horizontal" : "vertical"); + + singlepass = false; + } + + /* Compute the scale factors. */ + gcfilter->horscalefactor = + horscalefactor = get_scale_factor(srcwidth, dstwidth); + GCDBG(GCZONE_FILTER, "horscalefactor = 0x%08X\n", horscalefactor); + + gcfilter->verscalefactor = + verscalefactor = get_scale_factor(srcheight, dstheight); + GCDBG(GCZONE_FILTER, "verscalefactor = 0x%08X\n", verscalefactor); + + /* Compute the destination offsets. */ + dstdelta.left = dstclipped->left - dstrect->left; + dstdelta.top = dstclipped->top - dstrect->top; + dstdelta.right = dstclipped->right - dstrect->left; + dstdelta.bottom = dstclipped->bottom - dstrect->top; + GCDBG(GCZONE_FILTER, "dst deltas = (%d,%d)-(%d,%d)\n", + dstdelta.left, dstdelta.top, dstdelta.right, dstdelta.bottom); + + /* Compute the source offsets. */ + srcdelta.left = dstdelta.left * horscalefactor; + srcdelta.top = dstdelta.top * verscalefactor; + srcdelta.right = (dstdelta.right - 1) * horscalefactor + (1 << 16); + srcdelta.bottom = (dstdelta.bottom - 1) * verscalefactor + (1 << 16); + + /* Before rendering each destination pixel, the HW will select the + * corresponding source center pixel to apply the kernel around. + * To make this process precise we need to add 0.5 to source initial + * coordinates here; this will make HW pick the next source pixel if + * the fraction is equal or greater then 0.5. */ + srcdelta.left += 0x00008000; + srcdelta.top += 0x00008000; + srcdelta.right += 0x00008000; + srcdelta.bottom += 0x00008000; + GCDBG(GCZONE_FILTER, "src deltas = " + "(0x%08X,0x%08X)-(0x%08X,0x%08X)\n", + srcdelta.left, srcdelta.top, srcdelta.right, srcdelta.bottom); + GCDBG(GCZONE_FILTER, "src deltas (int) = (%d,%d)-(%d,%d)\n", + srcdelta.left >> 16, srcdelta.top >> 16, + srcdelta.right >> 16, srcdelta.bottom >> 16); + + /* Determine clipped source rectangle. */ + srcclipped.left = srcrect->left + (srcdelta.left >> 16); + srcclipped.top = srcrect->top + (srcdelta.top >> 16); + srcclipped.right = srcrect->left + (srcdelta.right >> 16); + srcclipped.bottom = srcrect->top + (srcdelta.bottom >> 16); + + GCDBG(GCZONE_FILTER, "source:\n"); + GCDBG(GCZONE_FILTER, " stride = %d, geom = %dx%d\n", + srcinfo->geom->virtstride, + srcinfo->geom->width, srcinfo->geom->height); + GCDBG(GCZONE_FILTER, " rotation = %d\n", + srcinfo->angle); + GCPRINT_RECT(GCZONE_FILTER, " clipped rect", &srcclipped); + + GCDBG(GCZONE_FILTER, "destination:\n"); + GCDBG(GCZONE_FILTER, " stride = %d, geom size = %dx%d\n", + dstinfo->geom->virtstride, + dstinfo->geom->width, dstinfo->geom->height); + GCDBG(GCZONE_FILTER, " rotation = %d\n", + dstinfo->angle); + GCPRINT_RECT(GCZONE_FILTER, " clipped rect", dstclipped); + + /* Validate the source rectangle. */ + if (!valid_rect(srcinfo->geom, &srcclipped)) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1RECT + : BVERR_SRC2RECT, + "invalid source rectangle."); + goto exit; + } + + /* Map the source. */ + bverror = do_map(srcinfo->buf.desc, batch, &srcmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /* Map the destination. */ + bverror = do_map(dstinfo->buf.desc, batch, &dstmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /* Do single pass filter if we can. */ + if (singlepass) { + GCDBG(GCZONE_TYPE, "single pass\n"); + + /* Determine the kernel size to use. */ + kernelsize = max(gcfilter->horkernelsize, + gcfilter->verkernelsize); + + /* Set kernel size. */ + bverror = claim_buffer(bvbltparams, batch, + sizeof(struct gcmovrconfigex), + (void **) &gcmovrconfigex); + if (bverror != BVERR_NONE) + goto exit; + + gcmovrconfigex->config_ldst = gcmovrconfigex_config_ldst; + gcmovrconfigex->config.raw = ~0U; + gcmovrconfigex->config.reg.kernelsize = kernelsize; + gcmovrconfigex->config.reg.mask_kernelsize + = GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_ENABLED; + + /* Setup single pass. */ + srcx = (srcrect->left << 16) + srcdelta.left; + srcy = (srcrect->top << 16) + srcdelta.top; + GCDBG(GCZONE_SRC, "src origin: 0x%08X,0x%08X\n", srcx, srcy); + + /* Load the horizontal filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->horkernelsize, + gcfilter->horscalefactor, + srcwidth, dstwidth, + gcmofilterkernel_horizontal_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Load the vertical filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->verkernelsize, + gcfilter->verscalefactor, + srcheight, dstheight, + gcmofilterkernel_vertical_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Start the operation. */ + bverror = startvr(bvbltparams, batch, + srcmap, dstmap, srcinfo, dstinfo, + srcx, srcy, dstadjusted, + ROT_ANGLE_0, gcfilter->dstangle, + GC_SCALE_OPF); + } else if (twopass) { + unsigned int horkernelhalf; + unsigned int leftextra, rightextra; + unsigned int tmprectwidth, tmprectheight; + unsigned int tmpalignmask, dstalignmask; + unsigned int tmpsize; + struct surfaceinfo tmpinfo; + struct bvsurfgeom tmpgeom; + + GCDBG(GCZONE_TYPE, "two pass\n"); + + /* Initialize the temporaty surface geometry. */ + tmpgeom.structsize = sizeof(struct bvsurfgeom); + tmpgeom.orientation = 0; + tmpgeom.paletteformat = 0; + tmpgeom.palette = NULL; + + /* Initialize the temporaty surface descriptor. */ + tmpinfo.index = -1; + tmpinfo.geom = &tmpgeom; + tmpinfo.angle = gcfilter->dstangle; + tmpinfo.mirror = GCREG_MIRROR_NONE; + tmpinfo.rop = 0; + GCDBG(GCZONE_FILTER, "tmp angle = %d\n", tmpinfo.angle); + + /* Transfer blending parameters from the source to the + * temporary buffer so that the blending would happen + * on the second pass. */ + tmpinfo.gca = srcinfo->gca; + srcinfo->gca = NULL; + + /* Determine temporary surface format. */ + if (srcinfo->format.type == BVFMT_YUV) { + if (tmpinfo.angle == ROT_ANGLE_0) { + GCDBG(GCZONE_FILTER, + "tmp format = 4:2:2\n"); + tmpgeom.format = OCDFMT_YUYV; + parse_format(bvbltparams, &tmpinfo); + } else { + GCDBG(GCZONE_FILTER, + "tmp format = dst format\n"); + tmpgeom.format = dstinfo->geom->format; + tmpinfo.format = dstinfo->format; + } + } else { + GCDBG(GCZONE_FILTER, + "tmp format = src format\n"); + tmpgeom.format = srcinfo->geom->format; + tmpinfo.format = srcinfo->format; + } + + /* Determine pixel alignment masks. */ + tmpalignmask = GC_BITS_PER_CACHELINE + / tmpinfo.format.bitspp - 1; + dstalignmask = GC_BITS_PER_CACHELINE + / dstinfo->format.bitspp - 1; + + /* In partial filter blit cases, the vertical pass has to render + * more pixel information to the left and to the right of the + * temporary image so that the next pass has its necessary + * kernel information on the edges of the image. */ + horkernelhalf = gcfilter->horkernelsize >> 1; + + leftextra = srcdelta.left >> 16; + rightextra = srcwidth - (srcdelta.right >> 16); + + if (leftextra > horkernelhalf) + leftextra = horkernelhalf; + + if (rightextra > horkernelhalf) + rightextra = horkernelhalf; + + GCDBG(GCZONE_FILTER, "leftextra = %d, rightextra = %d\n", + leftextra, rightextra); + + /* Determine the source origin. */ + srcx = ((srcrect->left - leftextra) << 16) + srcdelta.left; + srcy = (srcrect->top << 16) + srcdelta.top; + GCDBG(GCZONE_SRC, "src origin: 0x%08X,0x%08X\n", srcx, srcy); + GCDBG(GCZONE_SRC, "src origin (int): %d,%d\n", + srcx >> 16, srcy >> 16); + + /* Determine the size of the temporary rectangle. */ + tmprectwidth = leftextra + rightextra + + ((srcdelta.right >> 16) - (srcdelta.left >> 16)); + tmprectheight = dstadjusted->bottom - dstadjusted->top; + GCDBG(GCZONE_FILTER, "tmp rect size: %dx%d\n", + tmprectwidth, tmprectheight); + + /* Determine the temporary destination coordinates. */ + switch (tmpinfo.angle) { + case ROT_ANGLE_0: + case ROT_ANGLE_180: + tmpinfo.rect.left = (srcx >> 16) & tmpalignmask; + tmpinfo.rect.top = 0; + tmpinfo.rect.right = tmpinfo.rect.left + tmprectwidth; + tmpinfo.rect.bottom = tmprectheight; + + tmpgeom.width = (tmpinfo.rect.right + tmpalignmask) + & ~tmpalignmask; + tmpgeom.height = tmprectheight; + + tmpinfo.physwidth = tmpgeom.width; + tmpinfo.physheight = tmpgeom.height; + break; + + case ROT_ANGLE_90: + tmpinfo.rect.left = 0; + tmpinfo.rect.top = dstadjusted->left & dstalignmask; + tmpinfo.rect.right = tmprectwidth; + tmpinfo.rect.bottom = tmpinfo.rect.top + tmprectheight; + + tmpgeom.width = tmprectwidth; + tmpgeom.height = (tmpinfo.rect.bottom + tmpalignmask) + & ~tmpalignmask; + + tmpinfo.physwidth = tmpgeom.height; + tmpinfo.physheight = tmpgeom.width; + break; + + case ROT_ANGLE_270: + tmpinfo.rect.left = 0; + tmpinfo.rect.right = tmprectwidth; + tmpinfo.rect.bottom = dstadjusted->left & dstalignmask; + + tmpgeom.width = tmprectwidth; + tmpgeom.height = (tmpinfo.rect.bottom + tmprectheight + + tmpalignmask) & ~tmpalignmask; + + tmpinfo.rect.bottom = tmpgeom.height + - tmpinfo.rect.bottom; + tmpinfo.rect.top = tmpinfo.rect.bottom + - tmprectheight; + + tmpinfo.physwidth = tmpgeom.height; + tmpinfo.physheight = tmpgeom.width; + break; + } + + GCPRINT_RECT(GCZONE_DEST, "tmp dest", &tmpinfo.rect); + GCDBG(GCZONE_FILTER, "tmp geometry size = %dx%d\n", + tmpgeom.width, tmpgeom.height); + GCDBG(GCZONE_FILTER, "tmp physical size = %dx%d\n", + tmpinfo.physwidth, tmpinfo.physheight); + + /* Determine the size of the temporaty surface. */ + tmpgeom.virtstride = (tmpinfo.physwidth + * tmpinfo.format.bitspp) / 8; + tmpsize = tmpgeom.virtstride * tmpinfo.physheight; + tmpsize += GC_BYTES_PER_CACHELINE; + tmpsize = (tmpsize + ~PAGE_MASK) & PAGE_MASK; + GCDBG(GCZONE_FILTER, "tmp stride = %d\n", tmpgeom.virtstride); + GCDBG(GCZONE_FILTER, "tmp size (bytes) = %d\n", tmpsize); + + /* Allocate the temporary buffer. */ + bverror = allocate_temp(bvbltparams, tmpsize); + if (bverror != BVERR_NONE) + goto exit; + + /* Map the temporary buffer. */ + tmpinfo.buf.desc = gccontext->tmpbuffdesc; + bverror = do_map(tmpinfo.buf.desc, batch, &tmpmap); + if (bverror != BVERR_NONE) { + bvbltparams->errdesc = gccontext->bverrorstr; + goto exit; + } + + /* Compute the temp buffer alignments needed to compensate + * for the surface base address misalignment if any. */ + tmpinfo.xpixalign = 0; + tmpinfo.ypixalign = 0; + tmpinfo.bytealign = (get_pixel_offset(&tmpinfo, 0) + * (int) tmpinfo.format.bitspp) / 8; + GCDBG(GCZONE_SRC, "tmp offset (pixels) = %d,%d\n", + tmpinfo.xpixalign, tmpinfo.ypixalign); + GCDBG(GCZONE_SRC, "tmp offset (bytes) = %d\n", + tmpinfo.bytealign); + + /* Load the vertical filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->verkernelsize, + gcfilter->verscalefactor, + srcheight, dstheight, + gcmofilterkernel_shared_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Start the operation. */ + GCDBG(GCZONE_TYPE, "vertical pass\n"); + bverror = startvr(bvbltparams, batch, + srcmap, tmpmap, srcinfo, &tmpinfo, + srcx, srcy, &tmpinfo.rect, + ROT_ANGLE_0, tmpinfo.angle, + GC_SCALE_VER); + if (bverror != BVERR_NONE) + goto exit; + + /* Fake no rotation. */ + adjangle = (4 - tmpinfo.angle) % 4; + GCDBG(GCZONE_DEST, "adjangle = %d\n", adjangle); + + /* Rotate the source rectangle to 0 degree. */ + rotate_gcrect(adjangle, + tmpinfo.geom, &tmpinfo.rect, + tmpinfo.geom, &tmpinfo.rect); + GCPRINT_RECT(GCZONE_DEST, "tmp src", &tmpinfo.rect); + + /* Rotate the destination rectangle to 0 degree. */ + rotate_gcrect(adjangle, + &gcfilter->dstgeom, dstclipped, + &dstrotated0geom, &dstrotated0); + GCPRINT_RECT(GCZONE_DEST, "dest", &dstrotated0); + + /* Apply adjustment. */ + dstrotated0.left -= dstinfo->xpixalign; + dstrotated0.right -= dstinfo->xpixalign; + + /* Determine the source origin. */ + switch (tmpinfo.angle) { + case ROT_ANGLE_0: + srcx = ((tmpinfo.rect.left + leftextra) << 16) + + (srcdelta.left & 0xFFFF); + srcy = (tmpinfo.rect.top << 16) + + (srcdelta.top & 0xFFFF); + break; + + case ROT_ANGLE_90: + srcx = (tmpinfo.rect.left << 16) + + (srcdelta.top & 0xFFFF); + srcy = ((tmpinfo.rect.top + rightextra) << 16) + + (srcdelta.left & 0xFFFF); + break; + + case ROT_ANGLE_180: + srcx = ((tmpinfo.rect.left + rightextra) << 16) + + (srcdelta.left & 0xFFFF); + srcy = (tmpinfo.rect.top << 16) + + (srcdelta.top & 0xFFFF); + break; + + case ROT_ANGLE_270: + srcx = (tmpinfo.rect.left << 16) + + (srcdelta.top & 0xFFFF); + srcy = ((tmpinfo.rect.top + leftextra) << 16) + + (srcdelta.left & 0xFFFF); + break; + } + + GCDBG(GCZONE_SRC, "src origin: 0x%08X,0x%08X\n", srcx, srcy); + + /* Load the horizontal filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->horkernelsize, + gcfilter->horscalefactor, + srcwidth, dstwidth, + gcmofilterkernel_shared_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Start the operation. */ + GCDBG(GCZONE_TYPE, "horizontal pass\n"); + bverror = startvr(bvbltparams, batch, + tmpmap, dstmap, &tmpinfo, dstinfo, + srcx, srcy, &dstrotated0, + ROT_ANGLE_0, ROT_ANGLE_0, + ((gcfilter->dstangle % 2) == 0) + ? GC_SCALE_HOR + : GC_SCALE_HOR_FLIPPED); + if (bverror != BVERR_NONE) + goto exit; + } else { + GCDBG(GCZONE_TYPE, "two pass (%s pass config).\n", + scalex ? "horizontal" : "vertical"); + + /* Setup single pass. */ + srcx = (srcrect->left << 16) + srcdelta.left; + srcy = (srcrect->top << 16) + srcdelta.top; + GCDBG(GCZONE_SRC, "src origin: 0x%08X,0x%08X\n", srcx, srcy); + + if (scalex) { + /* Load the horizontal filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->horkernelsize, + gcfilter->horscalefactor, + srcwidth, dstwidth, + gcmofilterkernel_shared_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Start the operation. */ + bverror = startvr(bvbltparams, batch, + srcmap, dstmap, srcinfo, dstinfo, + srcx, srcy, dstadjusted, + ROT_ANGLE_0, gcfilter->dstangle, + GC_SCALE_HOR); + if (bverror != BVERR_NONE) + goto exit; + } else { + /* Load the vertical filter. */ + bverror = load_filter(bvbltparams, batch, + GC_FILTER_SYNC, + gcfilter->verkernelsize, + gcfilter->verscalefactor, + srcheight, dstheight, + gcmofilterkernel_shared_ldst); + if (bverror != BVERR_NONE) + goto exit; + + /* Start the operation. */ + bverror = startvr(bvbltparams, batch, + srcmap, dstmap, srcinfo, dstinfo, + srcx, srcy, dstadjusted, + ROT_ANGLE_0, gcfilter->dstangle, + GC_SCALE_VER); + if (bverror != BVERR_NONE) + goto exit; + } + } + +exit: + GCEXITARG(GCZONE_FILTER, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} diff --git a/bltsville/gcbv/mirror/gcmap.c b/bltsville/gcbv/mirror/gcmap.c new file mode 100644 index 0000000..3f2b3f3 --- /dev/null +++ b/bltsville/gcbv/mirror/gcmap.c @@ -0,0 +1,342 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_MAPPING (1 << 0) + +GCDBG_FILTERDEF(map, GCZONE_NONE, + "mapping") + + +/******************************************************************************* + * Memory management. + */ + +enum bverror do_map(struct bvbuffdesc *bvbuffdesc, + struct gcbatch *batch, + struct bvbuffmap **map) +{ + static const int mapsize + = sizeof(struct bvbuffmap) + + sizeof(struct bvbuffmapinfo); + + enum bverror bverror; + struct gccontext *gccontext = get_context(); + struct bvbuffmap *bvbuffmap; + struct bvbuffmapinfo *bvbuffmapinfo; + struct bvphysdesc *bvphysdesc; + bool mappedbyothers; + struct gcimap gcimap; + struct gcschedunmap *gcschedunmap; + + GCENTERARG(GCZONE_MAPPING, "bvbuffdesc = 0x%08X\n", + (unsigned int) bvbuffdesc); + + /* Lock access to the mapping list. */ + GCLOCK(&gccontext->maplock); + + /* Try to find existing mapping. */ + bvbuffmap = bvbuffdesc->map; + while (bvbuffmap != NULL) { + if (bvbuffmap->bv_unmap == bv_unmap) + break; + bvbuffmap = bvbuffmap->nextmap; + } + + /* Not mapped yet? */ + if (bvbuffmap == NULL) { + /* New mapping, allocate a record. */ + if (gccontext->buffmapvac == NULL) { + bvbuffmap = gcalloc(struct bvbuffmap, mapsize); + if (bvbuffmap == NULL) { + BVSETERROR(BVERR_OOM, + "failed to allocate mapping record"); + goto fail; + } + + bvbuffmap->structsize = sizeof(struct bvbuffmap); + bvbuffmap->bv_unmap = bv_unmap; + bvbuffmap->handle = (unsigned long) (bvbuffmap + 1); + } else { + bvbuffmap = gccontext->buffmapvac; + gccontext->buffmapvac = bvbuffmap->nextmap; + } + + /* Setup buffer mapping. Here we need to check and make sure + * that the buffer starts at a location that is supported by + * the hw. If it is not, offset is computed and the buffer is + * extended by the value of the offset. */ + gcimap.gcerror = GCERR_NONE; + gcimap.handle = 0; + + if (bvbuffdesc->auxtype == BVAT_PHYSDESC) { + bvphysdesc = (struct bvphysdesc *) bvbuffdesc->auxptr; + + if (bvphysdesc->structsize < + STRUCTSIZE(bvphysdesc, pageoffset)) { + BVSETERROR(BVERR_BUFFERDESC_VERS, + "unsupported bvphysdesc version"); + goto fail; + } + + gcimap.buf.offset = bvphysdesc->pageoffset; + gcimap.pagesize = bvphysdesc->pagesize; + gcimap.pagearray = bvphysdesc->pagearray; + gcimap.size = bvbuffdesc->length; + + GCDBG(GCZONE_MAPPING, "new mapping (%s):\n", + (batch == NULL) ? "explicit" : "implicit"); + GCDBG(GCZONE_MAPPING, "pagesize = %lu\n", + bvphysdesc->pagesize); + GCDBG(GCZONE_MAPPING, "pagearray = 0x%08X\n", + (unsigned int) bvphysdesc->pagearray); + GCDBG(GCZONE_MAPPING, "pageoffset = %lu\n", + bvphysdesc->pageoffset); + GCDBG(GCZONE_MAPPING, "mapping size = %d\n", + gcimap.size); + } else { + gcimap.buf.logical = bvbuffdesc->virtaddr; + gcimap.pagesize = 0; + gcimap.pagearray = NULL; + gcimap.size = bvbuffdesc->length; + + GCDBG(GCZONE_MAPPING, "new mapping (%s):\n", + (batch == NULL) ? "explicit" : "implicit"); + GCDBG(GCZONE_MAPPING, "specified virtaddr = 0x%08X\n", + (unsigned int) bvbuffdesc->virtaddr); + GCDBG(GCZONE_MAPPING, "aligned virtaddr = 0x%08X\n", + (unsigned int) gcimap.buf.logical); + GCDBG(GCZONE_MAPPING, "mapping size = %d\n", + gcimap.size); + } + + gc_map_wrapper(&gcimap); + if (gcimap.gcerror != GCERR_NONE) { + BVSETERROR(BVERR_OOM, + "unable to allocate gccore memory"); + goto fail; + } + + /* Set map handle. */ + bvbuffmapinfo = (struct bvbuffmapinfo *) bvbuffmap->handle; + bvbuffmapinfo->handle = gcimap.handle; + + /* Initialize reference counters. */ + if (batch == NULL) { + /* Explicit mapping. */ + bvbuffmapinfo->usermap = 1; + bvbuffmapinfo->automap = 0; + } else { + /* Implicit mapping; if there are existing mappings + * from other implementations, mark this an explicit + * mapping as well. */ + mappedbyothers = (bvbuffdesc->map != NULL); + GCDBG(GCZONE_MAPPING, "%smapped by others.\n", + mappedbyothers ? "" : "not "); + + bvbuffmapinfo->usermap = mappedbyothers ? 1 : 0; + bvbuffmapinfo->automap = 1; + } + + /* Add the record to the list of mappings. */ + bvbuffmap->nextmap = bvbuffdesc->map; + bvbuffdesc->map = bvbuffmap; + } else { + /* Mapping already exists. */ + bvbuffmapinfo = (struct bvbuffmapinfo *) bvbuffmap->handle; + + /* Advance reference counters. */ + if (batch == NULL) { + /* Explicit mapping. */ + GCDBG(GCZONE_MAPPING, "explicit map.\n"); + bvbuffmapinfo->usermap += 1; + } else { + /* Implicit mapping. */ + GCDBG(GCZONE_MAPPING, "implicit map.\n"); + bvbuffmapinfo->automap += 1; + } + + GCDBG(GCZONE_MAPPING, "mapping exists.\n"); + } + + GCDBG(GCZONE_MAPPING, "bvbuffmap = 0x%08X\n", + (unsigned int) bvbuffmap); + GCDBG(GCZONE_MAPPING, "explicit count = %d\n", + bvbuffmapinfo->usermap); + GCDBG(GCZONE_MAPPING, "implicit count = %d\n", + bvbuffmapinfo->automap); + + /* Schedule for unmapping. */ + if (batch != NULL) { + if (list_empty(&gccontext->unmapvac)) { + gcschedunmap = gcalloc(struct gcschedunmap, + sizeof(struct gcschedunmap)); + if (gcschedunmap == NULL) { + BVSETERROR(BVERR_OOM, + "failed to schedule unmapping"); + goto fail; + } + list_add(&gcschedunmap->link, &batch->unmap); + } else { + struct list_head *head; + head = gccontext->unmapvac.next; + gcschedunmap = list_entry(head, + struct gcschedunmap, + link); + list_move(&gcschedunmap->link, &batch->unmap); + } + + gcschedunmap->handle = (unsigned long) bvbuffdesc; + + GCDBG(GCZONE_MAPPING, "scheduled for unmapping.\n"); + } + + /* Set the map pointer. */ + *map = bvbuffmap; + + /* Unlock access to the mapping list. */ + GCUNLOCK(&gccontext->maplock); + + GCEXITARG(GCZONE_MAPPING, "handle = 0x%08X\n", + bvbuffmapinfo->handle); + return BVERR_NONE; + +fail: + if (bvbuffmap != NULL) { + bvbuffmap->nextmap = gccontext->buffmapvac; + gccontext->buffmapvac = bvbuffmap; + } + + /* Unlock access to the mapping list. */ + GCUNLOCK(&gccontext->maplock); + + GCEXITARG(GCZONE_MAPPING, "bverror = %d\n", bverror); + return bverror; +} + +void do_unmap_implicit(struct gcbatch *batch) +{ + struct gccontext *gccontext = get_context(); + struct list_head *head, *temphead; + struct gcschedunmap *gcschedunmap; + struct bvbuffdesc *bvbuffdesc; + struct bvbuffmap *prev, *bvbuffmap; + struct bvbuffmapinfo *bvbuffmapinfo; + + GCENTER(GCZONE_MAPPING); + + /* Lock access to the mapping list. */ + GCLOCK(&gccontext->maplock); + + /* Scan scheduled unmappings and remove the ones that are still + * in use. */ + list_for_each_safe(head, temphead, &batch->unmap) { + gcschedunmap = list_entry(head, struct gcschedunmap, link); + + /* Cast the handle. */ + bvbuffdesc = (struct bvbuffdesc *) gcschedunmap->handle; + + /* Find our mapping. */ + prev = NULL; + bvbuffmap = bvbuffdesc->map; + while (bvbuffmap != NULL) { + if (bvbuffmap->bv_unmap == bv_unmap) + break; + prev = bvbuffmap; + bvbuffmap = bvbuffmap->nextmap; + } + + /* Not found? */ + if (bvbuffmap == NULL) { + GCERR("mapping not found for bvbuffdesc 0x%08X.\n", + (unsigned int) bvbuffdesc); + + /* Remove scheduled unmapping. */ + list_move(head, &gccontext->unmapvac); + continue; + } + + /* Get the info structure. */ + bvbuffmapinfo = (struct bvbuffmapinfo *) bvbuffmap->handle; + + GCDBG(GCZONE_MAPPING, "head = 0x%08X\n", + (unsigned int) gcschedunmap); + GCDBG(GCZONE_MAPPING, " bvbuffmap = 0x%08X\n", + (unsigned int) bvbuffmap); + GCDBG(GCZONE_MAPPING, " handle = 0x%08X\n", + bvbuffmapinfo->handle); + + /* Implicit unmapping. */ + bvbuffmapinfo->automap -= 1; + if (bvbuffmapinfo->automap < 0) { + GCERR("implicit count negative.\n"); + bvbuffmapinfo->automap = 0; + } + + GCDBG(GCZONE_MAPPING, " explicit count = %d\n", + bvbuffmapinfo->usermap); + GCDBG(GCZONE_MAPPING, " implicit count = %d\n", + bvbuffmapinfo->automap); + + /* Still referenced? */ + if (bvbuffmapinfo->usermap || bvbuffmapinfo->automap) { + GCDBG(GCZONE_MAPPING, " still referenced.\n"); + + /* Remove scheduled unmapping. */ + list_move(head, &gccontext->unmapvac); + continue; + } + + GCDBG(GCZONE_MAPPING, " ready for unmapping.\n"); + + /* Set the handle. */ + gcschedunmap->handle = bvbuffmapinfo->handle; + + /* Remove from the buffer descriptor. */ + if (prev == NULL) + bvbuffdesc->map = bvbuffmap->nextmap; + else + prev->nextmap = bvbuffmap->nextmap; + + /* Add to the vacant list. */ + bvbuffmap->nextmap = gccontext->buffmapvac; + gccontext->buffmapvac = bvbuffmap; + } + + /* Unlock access to the mapping list. */ + GCUNLOCK(&gccontext->maplock); + + GCEXIT(GCZONE_MAPPING); +} diff --git a/bltsville/gcbv/mirror/gcparser.c b/bltsville/gcbv/mirror/gcparser.c new file mode 100644 index 0000000..5bfbdb6 --- /dev/null +++ b/bltsville/gcbv/mirror/gcparser.c @@ -0,0 +1,2090 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "gcbv.h" + +#define GCZONE_NONE 0 +#define GCZONE_ALL (~0U) +#define GCZONE_FORMAT (1 << 0) +#define GCZONE_FORMAT_VERBOSE (1 << 1) +#define GCZONE_BLEND (1 << 2) +#define GCZONE_OFFSET (1 << 3) +#define GCZONE_DEST (1 << 4) +#define GCZONE_SRC (1 << 5) +#define GCZONE_SCALING (1 << 6) + +GCDBG_FILTERDEF(parser, GCZONE_NONE, + "format", + "formatverbose", + "blend", + "offset", + "dest", + "src", + "scaling") + + +/******************************************************************************* + * Internal macros. + */ + +#define GCCONVERT_RECT(zone, name, bvrect, gcrect) \ +{ \ + (gcrect)->left = (bvrect)->left; \ + (gcrect)->top = (bvrect)->top; \ + (gcrect)->right = (bvrect)->left + (bvrect)->width; \ + (gcrect)->bottom = (bvrect)->top + (bvrect)->height; \ + \ + GCPRINT_RECT(zone, name, gcrect); \ +} + + +/******************************************************************************* + * Pixel format parser. + */ + +#define OCDFMTDEF_PLACEMENT_SHIFT 9 +#define OCDFMTDEF_PLACEMENT_MASK (3 << OCDFMTDEF_PLACEMENT_SHIFT) + +#define BVCOMP(Shift, Size) \ + { Shift, Size, ((1 << Size) - 1) << Shift } + +#define BVRED(Shift, Size) \ + BVCOMP(Shift, Size) + +#define BVGREEN(Shift, Size) \ + BVCOMP(Shift, Size) + +#define BVBLUE(Shift, Size) \ + BVCOMP(Shift, Size) + +#define BVALPHA(Shift, Size) \ + BVCOMP(Shift, Size) + +static const unsigned int rgba16swizzle[] = { + GCREG_DE_SWIZZLE_ARGB, + GCREG_DE_SWIZZLE_RGBA, + GCREG_DE_SWIZZLE_ABGR, + GCREG_DE_SWIZZLE_BGRA +}; + +static const unsigned int rgb16swizzle[] = { + GCREG_DE_SWIZZLE_ARGB, + GCREG_DE_SWIZZLE_ARGB, + GCREG_DE_SWIZZLE_ABGR, + GCREG_DE_SWIZZLE_ABGR +}; + +static const unsigned int rgba32swizzle[] = { + GCREG_DE_SWIZZLE_BGRA, + GCREG_DE_SWIZZLE_ABGR, + GCREG_DE_SWIZZLE_RGBA, + GCREG_DE_SWIZZLE_ARGB +}; + +static const struct bvcsrgb xrgb4444_bits[] = { + { BVRED(8, 4), BVGREEN(4, 4), BVBLUE(0, 4), BVALPHA(12, 0) }, + { BVRED(12, 4), BVGREEN(8, 4), BVBLUE(4, 4), BVALPHA(0, 0) }, + { BVRED(0, 4), BVGREEN(4, 4), BVBLUE(8, 4), BVALPHA(12, 0) }, + { BVRED(4, 4), BVGREEN(8, 4), BVBLUE(12, 4), BVALPHA(0, 0) } +}; + +static const struct bvcsrgb argb4444_bits[] = { + { BVRED(8, 4), BVGREEN(4, 4), BVBLUE(0, 4), BVALPHA(12, 4) }, + { BVRED(12, 4), BVGREEN(8, 4), BVBLUE(4, 4), BVALPHA(0, 4) }, + { BVRED(0, 4), BVGREEN(4, 4), BVBLUE(8, 4), BVALPHA(12, 4) }, + { BVRED(4, 4), BVGREEN(8, 4), BVBLUE(12, 4), BVALPHA(0, 4) } +}; + +static const struct bvcsrgb xrgb1555_bits[] = { + { BVRED(10, 5), BVGREEN(5, 5), BVBLUE(0, 5), BVALPHA(15, 0) }, + { BVRED(11, 5), BVGREEN(6, 5), BVBLUE(1, 5), BVALPHA(0, 0) }, + { BVRED(0, 5), BVGREEN(5, 5), BVBLUE(10, 5), BVALPHA(15, 0) }, + { BVRED(1, 5), BVGREEN(6, 5), BVBLUE(11, 5), BVALPHA(0, 0) } +}; + +static const struct bvcsrgb argb1555_bits[] = { + { BVRED(10, 5), BVGREEN(5, 5), BVBLUE(0, 5), BVALPHA(15, 1) }, + { BVRED(11, 5), BVGREEN(6, 5), BVBLUE(1, 5), BVALPHA(0, 1) }, + { BVRED(0, 5), BVGREEN(5, 5), BVBLUE(10, 5), BVALPHA(15, 1) }, + { BVRED(1, 5), BVGREEN(6, 5), BVBLUE(11, 5), BVALPHA(0, 1) } +}; + +static const struct bvcsrgb rgb565_bits[] = { + { BVRED(11, 5), BVGREEN(5, 6), BVBLUE(0, 5), BVALPHA(0, 0) }, + { BVRED(11, 5), BVGREEN(5, 6), BVBLUE(0, 5), BVALPHA(0, 0) }, + { BVRED(0, 5), BVGREEN(5, 6), BVBLUE(11, 5), BVALPHA(0, 0) }, + { BVRED(0, 5), BVGREEN(5, 6), BVBLUE(11, 5), BVALPHA(0, 0) } +}; + +static const struct bvcsrgb xrgb8888_bits[] = { + { BVRED(8, 8), BVGREEN(16, 8), BVBLUE(24, 8), BVALPHA(0, 0) }, + { BVRED(0, 8), BVGREEN(8, 8), BVBLUE(16, 8), BVALPHA(24, 0) }, + { BVRED(24, 8), BVGREEN(16, 8), BVBLUE(8, 8), BVALPHA(0, 0) }, + { BVRED(16, 8), BVGREEN(8, 8), BVBLUE(0, 8), BVALPHA(24, 0) } +}; + +static const struct bvcsrgb argb8888_bits[] = { + { BVRED(8, 8), BVGREEN(16, 8), BVBLUE(24, 8), BVALPHA(0, 8) }, + { BVRED(0, 8), BVGREEN(8, 8), BVBLUE(16, 8), BVALPHA(24, 8) }, + { BVRED(24, 8), BVGREEN(16, 8), BVBLUE(8, 8), BVALPHA(0, 8) }, + { BVRED(16, 8), BVGREEN(8, 8), BVBLUE(0, 8), BVALPHA(24, 8) } +}; + +static const unsigned int container[] = { + 8, /* OCDFMTDEF_CONTAINER_8BIT */ + 16, /* OCDFMTDEF_CONTAINER_16BIT */ + 24, /* OCDFMTDEF_CONTAINER_24BIT */ + 32, /* OCDFMTDEF_CONTAINER_32BIT */ + ~0U, /* reserved */ + 48, /* OCDFMTDEF_CONTAINER_48BIT */ + ~0U, /* reserved */ + 64 /* OCDFMTDEF_CONTAINER_64BIT */ +}; + +enum bverror parse_format(struct bvbltparams *bvbltparams, + struct surfaceinfo *surfaceinfo) +{ + enum bverror bverror = BVERR_NONE; + struct bvformatxlate *format; + enum ocdformat ocdformat; + unsigned int cs, std, alpha, subsample, layout; + unsigned int reversed, leftjust, swizzle, cont, bits; + + format = &surfaceinfo->format; + ocdformat = surfaceinfo->geom->format; + GCENTERARG(GCZONE_FORMAT, "ocdformat = 0x%08X\n", ocdformat); + + cs = (ocdformat & OCDFMTDEF_CS_MASK) + >> OCDFMTDEF_CS_SHIFT; + std = (ocdformat & OCDFMTDEF_STD_MASK) + >> OCDFMTDEF_STD_SHIFT; + alpha = ocdformat & OCDFMTDEF_ALPHA; + subsample = (ocdformat & OCDFMTDEF_SUBSAMPLE_MASK) + >> OCDFMTDEF_SUBSAMPLE_SHIFT; + layout = (ocdformat & OCDFMTDEF_LAYOUT_MASK) + >> OCDFMTDEF_LAYOUT_SHIFT; + cont = (ocdformat & OCDFMTDEF_CONTAINER_MASK) + >> OCDFMTDEF_CONTAINER_SHIFT; + bits = ((ocdformat & OCDFMTDEF_COMPONENTSIZEMINUS1_MASK) + >> OCDFMTDEF_COMPONENTSIZEMINUS1_SHIFT) + 1; + + GCDBG(GCZONE_FORMAT_VERBOSE, "std = %d\n", std); + GCDBG(GCZONE_FORMAT_VERBOSE, "cs = %d\n", cs); + GCDBG(GCZONE_FORMAT_VERBOSE, "alpha = %d\n", alpha ? 1 : 0); + GCDBG(GCZONE_FORMAT_VERBOSE, "subsample = %d\n", subsample); + GCDBG(GCZONE_FORMAT_VERBOSE, "layout = %d\n", layout); + GCDBG(GCZONE_FORMAT_VERBOSE, "cont = %d\n", cont); + GCDBG(GCZONE_FORMAT_VERBOSE, "bits = %d\n", bits); + + switch (cs) { + case (OCDFMTDEF_CS_RGB >> OCDFMTDEF_CS_SHIFT): + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_CS_RGB\n"); + + /* Determine the swizzle. */ + swizzle = (ocdformat & OCDFMTDEF_PLACEMENT_MASK) + >> OCDFMTDEF_PLACEMENT_SHIFT; + GCDBG(GCZONE_FORMAT, "swizzle = %d\n", swizzle); + + /* RGB color space. */ + format->type = BVFMT_RGB; + + /* Has to be 0 for RGB. */ + if (std != 0) { + BVSETBLTERROR(BVERR_UNK, + "unsupported standard"); + goto exit; + } + + /* Determine premultuplied or not. */ + if (alpha == OCDFMTDEF_ALPHA) { + format->premultiplied + = ((ocdformat & OCDFMTDEF_NON_PREMULT) == 0); + } else { + format->premultiplied = true; + + if ((ocdformat & OCDFMTDEF_FILL_EMPTY_0) != 0) { + BVSETBLTERROR(BVERR_UNK, + "0 filling is not supported"); + goto exit; + } + } + GCDBG(GCZONE_FORMAT, "premultiplied = %d\n", + format->premultiplied); + + /* No subsample support. */ + if (subsample != + (OCDFMTDEF_SUBSAMPLE_NONE >> OCDFMTDEF_SUBSAMPLE_SHIFT)) { + BVSETBLTERROR(BVERR_UNK, + "subsampling for RGB is not supported"); + goto exit; + } + + /* Only packed RGB is supported. */ + if (layout != + (OCDFMTDEF_PACKED >> OCDFMTDEF_LAYOUT_SHIFT)) { + BVSETBLTERROR(BVERR_UNK, + "only packed RGBA formats are supported"); + goto exit; + } + + /* Determine the format. */ + switch (bits) { + case 12: + format->bitspp = 16; + format->allocbitspp = 16; + format->swizzle = rgba16swizzle[swizzle]; + + if (alpha == OCDFMTDEF_ALPHA) { + format->format = GCREG_DE_FORMAT_A4R4G4B4; + format->cs.rgb.comp = &argb4444_bits[swizzle]; + } else { + format->format = GCREG_DE_FORMAT_X4R4G4B4; + format->cs.rgb.comp = &xrgb4444_bits[swizzle]; + } + break; + + case 15: + format->bitspp = 16; + format->allocbitspp = 16; + format->swizzle = rgba16swizzle[swizzle]; + + if (alpha == OCDFMTDEF_ALPHA) { + format->format = GCREG_DE_FORMAT_A1R5G5B5; + format->cs.rgb.comp = &argb1555_bits[swizzle]; + } else { + format->format = GCREG_DE_FORMAT_X1R5G5B5; + format->cs.rgb.comp = &xrgb1555_bits[swizzle]; + } + break; + + case 16: + if (alpha == OCDFMTDEF_ALPHA) { + BVSETBLTERROR(BVERR_UNK, + "alpha component is not supported" + "for this format."); + goto exit; + } + + format->bitspp = 16; + format->allocbitspp = 16; + format->swizzle = rgb16swizzle[swizzle]; + format->format = GCREG_DE_FORMAT_R5G6B5; + format->cs.rgb.comp = &rgb565_bits[swizzle]; + break; + + case 24: + format->bitspp = 32; + format->allocbitspp = 32; + format->swizzle = rgba32swizzle[swizzle]; + + if (alpha == OCDFMTDEF_ALPHA) { + format->format = GCREG_DE_FORMAT_A8R8G8B8; + format->cs.rgb.comp = &argb8888_bits[swizzle]; + } else { + format->format = GCREG_DE_FORMAT_X8R8G8B8; + format->cs.rgb.comp = &xrgb8888_bits[swizzle]; + } + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "unsupported bit width %d", bits); + goto exit; + } + + if (format->allocbitspp != container[cont]) { + BVSETBLTERROR(BVERR_UNK, + "unsupported container"); + goto exit; + } + break; + + case (OCDFMTDEF_CS_YCbCr >> OCDFMTDEF_CS_SHIFT): + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_CS_YCbCr\n"); + + /* YUV color space. */ + format->type = BVFMT_YUV; + + /* Determine the swizzle. */ + reversed = ocdformat & OCDFMTDEF_REVERSED; + leftjust = ocdformat & OCDFMTDEF_LEFT_JUSTIFIED; + GCDBG(GCZONE_FORMAT_VERBOSE, "reversed = %d\n", + reversed ? 1 : 0); + GCDBG(GCZONE_FORMAT_VERBOSE, "leftjust = %d\n", + leftjust ? 1 : 0); + + /* Parse the standard. */ + switch (std) { + case OCDFMTDEF_STD_ITUR_601_YCbCr >> OCDFMTDEF_STD_SHIFT: + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_STD_ITUR_601_YCbCr\n"); + format->cs.yuv.std = GCREG_PE_CONTROL_YUV_601; + break; + + case OCDFMTDEF_STD_ITUR_709_YCbCr >> OCDFMTDEF_STD_SHIFT: + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_STD_ITUR_709_YCbCr\n"); + format->cs.yuv.std = GCREG_PE_CONTROL_YUV_709; + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "unsupported color standard"); + goto exit; + } + + /* Alpha is not supported. */ + if (alpha == OCDFMTDEF_ALPHA) { + BVSETBLTERROR(BVERR_UNK, + "alpha channel is not supported"); + goto exit; + } + + format->premultiplied = true; + + /* Parse subsampling. */ + switch (subsample) { + case OCDFMTDEF_SUBSAMPLE_422_YCbCr >> OCDFMTDEF_SUBSAMPLE_SHIFT: + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_SUBSAMPLE_422_YCbCr\n"); + + /* Parse layout. */ + switch (layout) { + case OCDFMTDEF_PACKED >> OCDFMTDEF_LAYOUT_SHIFT: + GCDBG(GCZONE_FORMAT, "OCDFMTDEF_PACKED\n"); + + if (container[cont] != 32) { + BVSETBLTERROR(BVERR_UNK, + "unsupported container"); + goto exit; + } + + format->bitspp = 16; + format->allocbitspp = 16; + format->format = leftjust + ? GCREG_DE_FORMAT_YUY2 + : GCREG_DE_FORMAT_UYVY; + format->swizzle = reversed + ? GCREG_PE_CONTROL_UV_SWIZZLE_VU + : GCREG_PE_CONTROL_UV_SWIZZLE_UV; + format->cs.yuv.planecount = 1; + format->cs.yuv.xsample = 2; + format->cs.yuv.ysample = 1; + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "specified 4:2:2 layout " + "is not supported"); + goto exit; + } + break; + + case OCDFMTDEF_SUBSAMPLE_420_YCbCr >> OCDFMTDEF_SUBSAMPLE_SHIFT: + + /* Parse layout. */ + switch (layout) { + case OCDFMTDEF_2_PLANE_YCbCr + >> OCDFMTDEF_LAYOUT_SHIFT: + GCDBG(GCZONE_FORMAT, + "OCDFMTDEF_2_PLANE_YCbCr\n"); + + if (container[cont] != 48) { + BVSETBLTERROR(BVERR_UNK, + "unsupported container"); + goto exit; + } + + format->bitspp = 8; + format->allocbitspp = 12; + format->format = GCREG_DE_FORMAT_NV12; + format->swizzle = reversed + ? GCREG_PE_CONTROL_UV_SWIZZLE_VU + : GCREG_PE_CONTROL_UV_SWIZZLE_UV; + format->cs.yuv.planecount = 2; + format->cs.yuv.xsample = 2; + format->cs.yuv.ysample = 2; + break; + + case OCDFMTDEF_3_PLANE_STACKED + >> OCDFMTDEF_LAYOUT_SHIFT: + GCDBG(GCZONE_FORMAT, + "OCDFMTDEF_3_PLANE_STACKED\n"); + + if (container[cont] != 48) { + BVSETBLTERROR(BVERR_UNK, + "unsupported container"); + goto exit; + } + + format->bitspp = 8; + format->allocbitspp = 12; + format->format = GCREG_DE_FORMAT_YV12; + format->swizzle = reversed + ? GCREG_PE_CONTROL_UV_SWIZZLE_VU + : GCREG_PE_CONTROL_UV_SWIZZLE_UV; + format->cs.yuv.planecount = 3; + format->cs.yuv.xsample = 2; + format->cs.yuv.ysample = 2; + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "specified 4:2:2 layout " + "is not supported"); + goto exit; + } + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "specified subsampling is not supported"); + goto exit; + } + + if (format->allocbitspp != bits) { + BVSETBLTERROR(BVERR_UNK, + "unsupported bit width %d", bits); + goto exit; + } + break; + + default: + BVSETBLTERROR(BVERR_UNK, + "unsupported color space %d", cs); + goto exit; + } + + GCDBG(GCZONE_FORMAT, "bpp = %d\n", format->bitspp); + GCDBG(GCZONE_FORMAT, "gcformat = %d\n", format->format); + GCDBG(GCZONE_FORMAT, "gcswizzle = %d\n", format->swizzle); + + bverror = BVERR_NONE; + +exit: + GCEXITARG(GCZONE_FORMAT, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + + +/******************************************************************************* + * Alpha blending parser. + */ + +#define BVBLENDMATCH(Mode, Inverse, Normal) \ +( \ + BVBLENDDEF_ ## Mode | \ + BVBLENDDEF_ ## Inverse | \ + BVBLENDDEF_ ## Normal \ +) + +#define BVSRC1USE(Use) \ + Use + +#define BVSRC2USE(Use) \ + Use + +#define BVBLENDUNDEFINED() \ + { ~0, ~0, { 0, 0, 0, 0 }, { 0, 0, 0, 0 } } + +struct bvblendxlate { + unsigned char match1; + unsigned char match2; + + struct gcblendconfig k1; + struct gcblendconfig k2; +}; + +static struct bvblendxlate blendxlate[64] = { + /**********************************************************************/ + /* #0: color factor: 00 00 00 A:(1-C1,C1)=zero + alpha factor: zero ==> 00 00 00 */ + { + 0x00, + 0x00, + + { + GCREG_BLENDING_MODE_ZERO, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(false), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_ZERO, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(false), BVSRC2USE(false) + } + }, + + /* #1: color factor: 00 00 01 A:(1-C1,A1)=A1 + alpha factor: A1 ==> 00 00 01 or 00 10 01 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A1), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A1), + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #2: color factor: 00 00 10 A:(1-C1,C2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #3: color factor: 00 00 11 A:(1-C1,A2)=A2 + alpha factor: A2 ==> 00 00 11 or 00 10 11 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A2), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A2), + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #4: color factor: 00 01 00 A:(1-A1,C1)=1-A1 + alpha factor: 1-A1 ==> 00 01 00 or 00 01 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C2), + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #5: color factor: 00 01 01 A:(1-A1,A1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #6: color factor: 00 01 10 A:(1-A1,C2)=1-A1 + alpha factor: 1-A1 ==> 00 01 00 or 00 01 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C2), + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #7: color factor: 00 01 11 A:(1-A1,A2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #8: color factor: 00 10 00 A:(1-C2,C1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #9: color factor: 00 10 01 A:(1-C2,A1)=A1 + alpha factor: A1 ==> 00 00 01 or 00 10 01 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A1), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A1), + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #10: color factor: 00 10 10 A:(1-C2,C2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #11: color factor: 00 10 11 A:(1-C2,A2)=A2 + alpha factor: A2 ==> 00 00 11 or 00 10 11 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A2), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A2), + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_NORMAL, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #12: color factor: 00 11 00 A:(1-A2,C1)=1-A2 + alpha factor: 1-A2 ==> 00 11 00 or 00 11 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C2), + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #13: color factor: 00 11 01 A:(1-A2,A1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #14: color factor: 00 11 10 A:(1-A2,C2)=1-A2 + alpha factor: 1-A2 ==> 00 11 00 or 00 11 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C2), + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #15: color factor: 00 11 11 A:(1-A2,A2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /**********************************************************************/ + /* #16: color factor: 01 00 00 MIN:(1-C1,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #17: color factor: 01 00 01 MIN:(1-C1,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #18: color factor: 01 00 10 MIN:(1-C1,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #19: color factor: 01 00 11 MIN:(1-C1,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #20: color factor: 01 01 00 MIN:(1-A1,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #21: color factor: 01 01 01 MIN:(1-A1,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #22: color factor: 01 01 10 MIN:(1-A1,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #23: color factor: 01 01 11 MIN:(1-A1,A2) + alpha factor: one ==> 11 11 11 */ + { + 0x3F, + 0x3F, + + { + GCREG_BLENDING_MODE_SATURATED_DEST_ALPHA, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_SATURATED_ALPHA, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #24: color factor: 01 10 00 MIN:(1-C2,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #25: color factor: 01 10 01 MIN:(1-C2,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #26: color factor: 01 10 10 MIN:(1-C2,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #27: color factor: 01 10 11 MIN:(1-C2,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #28: color factor: 01 11 00 MIN:(1-A2,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #29: color factor: 01 11 01 MIN:(1-A2,A1) + alpha factor: one ==> 11 11 11 */ + { + 0x3F, + 0x3F, + + { + GCREG_BLENDING_MODE_SATURATED_ALPHA, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_SATURATED_DEST_ALPHA, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #30: color factor: 01 11 10 MIN:(1-A2,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #31: color factor: 01 11 11 MIN:(1-A2,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /**********************************************************************/ + /* #32: color factor: 10 00 00 MAX:(1-C1,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #33: color factor: 10 00 01 MAX:(1-C1,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #34: color factor: 10 00 10 MAX:(1-C1,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #35: color factor: 10 00 11 MAX:(1-C1,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #36: color factor: 10 01 00 MAX:(1-A1,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #37: color factor: 10 01 01 MAX:(1-A1,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #38: color factor: 10 01 10 MAX:(1-A1,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #39: color factor: 10 01 11 MAX:(1-A1,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #40: color factor: 10 10 00 MAX:(1-C2,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #41: color factor: 10 10 01 MAX:(1-C2,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #42: color factor: 10 10 10 MAX:(1-C2,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #43: color factor: 10 10 11 MAX:(1-C2,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #44: color factor: 10 11 00 MAX:(1-A2,C1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #45: color factor: 10 11 01 MAX:(1-A2,A1) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #46: color factor: 10 11 10 MAX:(1-A2,C2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #47: color factor: 10 11 11 MAX:(1-A2,A2) ==> not supported + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /**********************************************************************/ + /* #48: color factor: 11 00 00 C:(1-C1,C1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #49: color factor: 11 00 01 C:(1-C1,A1)=1-C1 + alpha factor: 1-A1 ==> 00 01 00 or 00 01 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C2), + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #50: color factor: 11 00 10 C:(1-C1,C2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #51: color factor: 11 00 11 C:(1-C1,A2)=1-C1 + alpha factor: 1-A1 ==> 00 01 00 or 00 01 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A1, NORM_C2), + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #52: color factor: 11 01 00 C:(1-A1,C1)=C1 + alpha factor: A1 ==> 00 00 01 or 00 10 01 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A1), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A1), + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #53: color factor: 11 01 01 C:(1-A1,A1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #54: color factor: 11 01 10 C:(1-A1,C2)=C2 + alpha factor: A2 ==> 00 00 11 or 00 10 11 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A2), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A2), + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #55: color factor: 11 01 11 C:(1-A1,A2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #56: color factor: 11 10 00 C:(1-C2,C1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #57: color factor: 11 10 01 C:(1-C2,A1)=1-C2 + alpha factor: 1-A2 ==> 00 11 00 or 00 11 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C2), + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #58: color factor: 11 10 10 C:(1-C2,C2)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #59: color factor: 11 10 11 C:(1-C2,A2)=1-C2 + alpha factor: 1-A2 ==> 00 11 00 or 00 11 10 */ + { + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C1), + BVBLENDMATCH(ONLY_A, INV_A2, NORM_C2), + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_COLOR_INVERSED, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(false) + } + }, + + /* #60: color factor: 11 11 00 C:(1-A2,C1)=C1 + alpha factor: A1 ==> 00 00 01 or 00 10 01 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A1), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A1), + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + } + }, + + /* #61: color factor: 11 11 01 C:(1-A2,A1)=undefined + alpha factor: N/A */ + BVBLENDUNDEFINED(), + + /* #62: color factor: 11 11 10 C:(1-A2,C2)=C2 + alpha factor: A2 ==> 00 00 11 or 00 10 11 */ + { + BVBLENDMATCH(ONLY_A, INV_C1, NORM_A2), + BVBLENDMATCH(ONLY_A, INV_C2, NORM_A2), + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(true) + }, + + { + GCREG_BLENDING_MODE_COLOR, + GCREG_FACTOR_INVERSE_ENABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + }, + + /* #63: color factor: 11 11 11 C:(1-A2,A2)=one + alpha factor: one ==> 11 11 11 */ + { + 0x3F, + 0x3F, + + { + GCREG_BLENDING_MODE_ONE, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(true), BVSRC2USE(false) + }, + + { + GCREG_BLENDING_MODE_ONE, + GCREG_FACTOR_INVERSE_DISABLE, + BVSRC1USE(false), BVSRC2USE(true) + } + } +}; + +enum bverror parse_blend(struct bvbltparams *bvbltparams, + enum bvblend blend, + struct gcalpha *gca) +{ + enum bverror bverror; + unsigned int global; + unsigned int k1, k2, k3, k4; + struct bvblendxlate *k1_xlate; + struct bvblendxlate *k2_xlate; + unsigned int alpha; + + GCENTERARG(GCZONE_BLEND, "blend = 0x%08X (%s)\n", + blend, gc_bvblend_name(blend)); + + if ((blend & BVBLENDDEF_REMOTE) != 0) { + BVSETBLTERROR(BVERR_BLEND, "remote alpha not supported"); + goto exit; + } + + global = (blend & BVBLENDDEF_GLOBAL_MASK) >> BVBLENDDEF_GLOBAL_SHIFT; + + switch (global) { + case (BVBLENDDEF_GLOBAL_NONE >> BVBLENDDEF_GLOBAL_SHIFT): + GCDBG(GCZONE_BLEND, "BVBLENDDEF_GLOBAL_NONE\n"); + + gca->src_global_color = + gca->dst_global_color = 0; + + gca->src_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_NORMAL; + gca->dst_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_NORMAL; + break; + + case (BVBLENDDEF_GLOBAL_UCHAR >> BVBLENDDEF_GLOBAL_SHIFT): + GCDBG(GCZONE_BLEND, "BVBLENDDEF_GLOBAL_UCHAR\n"); + + gca->src_global_color = + gca->dst_global_color = + ((unsigned int) bvbltparams->globalalpha.size8) << 24; + + gca->src_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_GLOBAL; + gca->dst_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_GLOBAL; + break; + + case (BVBLENDDEF_GLOBAL_FLOAT >> BVBLENDDEF_GLOBAL_SHIFT): + GCDBG(GCZONE_BLEND, "BVBLENDDEF_GLOBAL_FLOAT\n"); + + alpha = gcfp2norm8(bvbltparams->globalalpha.fp); + + gca->src_global_color = + gca->dst_global_color = alpha << 24; + + gca->src_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_GLOBAL; + gca->dst_global_alpha_mode = GCREG_GLOBAL_ALPHA_MODE_GLOBAL; + break; + + default: + BVSETBLTERROR(BVERR_BLEND, "invalid global alpha mode"); + goto exit; + } + + /* + Co = k1 x C1 + k2 x C2 + Ao = k3 x A1 + k4 x A2 + */ + + k1 = (blend >> 18) & 0x3F; + k2 = (blend >> 12) & 0x3F; + k3 = (blend >> 6) & 0x3F; + k4 = blend & 0x3F; + + GCDBG(GCZONE_BLEND, "k1 = %d\n", k1); + GCDBG(GCZONE_BLEND, "k2 = %d\n", k2); + GCDBG(GCZONE_BLEND, "k3 = %d\n", k3); + GCDBG(GCZONE_BLEND, "k4 = %d\n", k4); + + k1_xlate = &blendxlate[k1]; + k2_xlate = &blendxlate[k2]; + + if (((k3 != k1_xlate->match1) && (k3 != k1_xlate->match2)) || + ((k4 != k2_xlate->match1) && (k4 != k2_xlate->match2))) { + BVSETBLTERROR(BVERR_BLEND, + "not supported coefficient combination"); + goto exit; + } + + gca->k1 = &k1_xlate->k1; + gca->k2 = &k2_xlate->k2; + + gca->src1used = gca->k1->src1used | gca->k2->src1used; + gca->src2used = gca->k1->src2used | gca->k2->src2used; + + bverror = BVERR_NONE; + +exit: + GCEXITARG(BVERR_BLEND, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + + +/******************************************************************************* + * Rotation and mirror. + */ + +#define BVFLAG_FLIP_MASK 0x00000003 + +#define BVFLAG_FLIP_SRC1_SHIFT 14 +#define BVFLAG_FLIP_SRC2_SHIFT 16 +#define BVFLAG_FLIP_MASK_SHIFT 18 + +#define GCREG_MIRROR_NONE 0x0 +#define GCREG_MIRROR_X 0x1 +#define GCREG_MIRROR_Y 0x2 +#define GCREG_MIRROR_XY 0x3 + +#define GCREG_ROT_ANGLE_ROT0 0x0 +#define GCREG_ROT_ANGLE_ROT90 0x4 +#define GCREG_ROT_ANGLE_ROT180 0x5 +#define GCREG_ROT_ANGLE_ROT270 0x6 + +#define ROT_ANGLE_INVALID -1 +#define ROT_ANGLE_0 0 +#define ROT_ANGLE_90 1 +#define ROT_ANGLE_180 2 +#define ROT_ANGLE_270 3 + +/* NOTE: BLTsville rotation is defined conunter clock wise. */ +const unsigned int rotencoding[] = { + GCREG_ROT_ANGLE_ROT0, /* ROT_ANGLE_0 */ + GCREG_ROT_ANGLE_ROT270, /* ROT_ANGLE_90 */ + GCREG_ROT_ANGLE_ROT180, /* ROT_ANGLE_180 */ + GCREG_ROT_ANGLE_ROT90 /* ROT_ANGLE_270 */ +}; + +static inline int get_angle(int orientation) +{ + int angle; + + /* Normalize the angle. */ + angle = orientation % 360; + + /* Flip to positive. */ + if (angle < 0) + angle = 360 + angle; + + /* Translate the angle. */ + switch (angle) { + case 0: return ROT_ANGLE_0; + case 90: return ROT_ANGLE_90; + case 180: return ROT_ANGLE_180; + case 270: return ROT_ANGLE_270; + } + + /* Not supported angle. */ + return ROT_ANGLE_INVALID; +} + + +/******************************************************************************* + * Surface compare and validation. + */ + +bool valid_rect(struct bvsurfgeom *bvsurfgeom, struct gcrect *gcrect) +{ + int width, height; + + if ((gcrect->left < 0) || (gcrect->top < 0)) { + GCERR("invalid rectangle origin: %d,%d.\n", + gcrect->left, gcrect->top); + return false; + } + + width = gcrect->right - gcrect->left; + height = gcrect->bottom - gcrect->top; + if ((width <= 0) || (height <= 0)) { + GCERR("invalid rectangle size: %d,%d.\n", + width, height); + return false; + } + + if (gcrect->right > (int) bvsurfgeom->width) { + GCERR("right coordinate (%d) exceeds surface width (%d).\n", + gcrect->right, bvsurfgeom->width); + return false; + } + + if (gcrect->bottom > (int) bvsurfgeom->height) { + GCERR("bottom coordinate (%d) exceeds surface height (%d).\n", + gcrect->bottom, bvsurfgeom->height); + return false; + } + + return true; +} + +static bool valid_geom(struct surfaceinfo *surfaceinfo) +{ + unsigned int size; + unsigned int height; + + /* Compute the size of the surface. */ + size = (surfaceinfo->geom->width * + surfaceinfo->geom->height * + surfaceinfo->format.allocbitspp) / 8; + + /* Make sure the size is not greater then the surface. */ + if (size > surfaceinfo->buf.desc->length) { + GCERR("invalid geometry detected:\n"); + GCERR(" specified dimensions: %dx%d, %d bitspp\n", + surfaceinfo->geom->width, + surfaceinfo->geom->height, + surfaceinfo->format.bitspp); + GCERR(" surface size based on the dimensions: %d\n", + size); + GCERR(" specified surface size: %lu\n", + surfaceinfo->buf.desc->length); + return false; + } + + /* Determine the height of the image. */ + height = ((surfaceinfo->angle % 2) == 0) + ? surfaceinfo->geom->height + : surfaceinfo->geom->width; + + /* Compute the size using the stide. */ + size = surfaceinfo->geom->virtstride * height; + + /* Make sure the size is not greater then the surface. */ + if (size > surfaceinfo->buf.desc->length) { + GCERR("invalid geometry detected:\n"); + GCERR(" specified dimensions: %dx%d, %d bitspp\n", + surfaceinfo->geom->width, + surfaceinfo->geom->height, + surfaceinfo->format.bitspp); + GCERR(" physical image height = %d\n", height); + GCERR(" image stride = %d\n", surfaceinfo->geom->virtstride); + GCERR(" computed surface size = %d\n", size); + GCERR(" specified surface size: %lu\n", + surfaceinfo->buf.desc->length); + return false; + } + + return true; +} + +int get_pixel_offset(struct surfaceinfo *surfaceinfo, int offset) +{ + unsigned int alignment; + int byteoffset; + unsigned int alignedoffset; + int pixeloffset; + + GCENTERARG(GCZONE_OFFSET, "surfaceinfo=0x%08X, offset=%d\n", + surfaceinfo, offset); + + alignment = (surfaceinfo->format.type == BVFMT_YUV) + ? (64 - 1) + : (16 - 1); + + GCDBG(GCZONE_OFFSET, "bpp = %d\n", surfaceinfo->format.bitspp); + GCDBG(GCZONE_OFFSET, "alignment = %d\n", alignment); + + /* Determine offset in bytes from the base modified by the + * given offset. */ + if (surfaceinfo->buf.desc->auxtype == BVAT_PHYSDESC) { + struct bvphysdesc *bvphysdesc; + bvphysdesc = (struct bvphysdesc *) + surfaceinfo->buf.desc->auxptr; + GCDBG(GCZONE_OFFSET, "physical descriptor = 0x%08X\n", + bvphysdesc); + GCDBG(GCZONE_OFFSET, "first page = 0x%08X\n", + bvphysdesc->pagearray[0]); + GCDBG(GCZONE_OFFSET, "page offset = 0x%08X\n", + bvphysdesc->pageoffset); + + byteoffset = bvphysdesc->pageoffset + offset; + } else { + GCDBG(GCZONE_OFFSET, "no physical descriptor.\n"); + byteoffset = (unsigned int) + surfaceinfo->buf.desc->virtaddr + offset; + } + + GCDBG(GCZONE_OFFSET, "byteoffset = %d\n", byteoffset); + + /* Compute the aligned offset. */ + alignedoffset = byteoffset & alignment; + + /* Convert to pixels. */ + pixeloffset = alignedoffset * 8 / surfaceinfo->format.bitspp; + + GCDBG(GCZONE_OFFSET, "alignedoffset = %d\n", alignedoffset); + GCDBG(GCZONE_OFFSET, "pixeloffset = %d\n", -pixeloffset); + + GCEXIT(GCZONE_OFFSET); + return -pixeloffset; +} + +enum bverror parse_destination(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + enum bverror bverror = BVERR_NONE; + + GCENTER(GCZONE_DEST); + + GCDBG(GCZONE_DEST, "parsing destination\n"); + + /* Did the destination surface change? */ + if ((batch->batchflags & BVBATCH_DST) != 0) { + struct surfaceinfo *dstinfo; + + /* Initialize the destination descriptor. */ + dstinfo = &batch->dstinfo; + dstinfo->index = -1; + dstinfo->buf.desc = bvbltparams->dstdesc; + dstinfo->geom = bvbltparams->dstgeom; + + /* Initialize members that are not used. */ + dstinfo->mirror = GCREG_MIRROR_NONE; + dstinfo->rop = 0; + dstinfo->gca = NULL; + + /* Parse the destination format. */ + if (parse_format(bvbltparams, dstinfo) != BVERR_NONE) { + bverror = BVERR_DSTGEOM_FORMAT; + goto exit; + } + + /* Parse orientation. */ + dstinfo->angle = get_angle(dstinfo->geom->orientation); + if (dstinfo->angle == ROT_ANGLE_INVALID) { + BVSETBLTERROR(BVERR_DSTGEOM, + "unsupported destination orientation %d.", + dstinfo->geom->orientation); + goto exit; + } + + /* Compute the destination alignments needed to compensate + * for the surface base address misalignment if any. */ + dstinfo->xpixalign = get_pixel_offset(dstinfo, 0); + dstinfo->ypixalign = 0; + dstinfo->bytealign = (dstinfo->xpixalign + * (int) dstinfo->format.bitspp) / 8; + + GCDBG(GCZONE_DEST, " buffer length = %d\n", + dstinfo->buf.desc->length); + GCDBG(GCZONE_DEST, " rotation %d degrees.\n", + dstinfo->angle * 90); + + if (dstinfo->buf.desc->auxtype == BVAT_PHYSDESC) { + struct bvphysdesc *bvphysdesc; + bvphysdesc = (struct bvphysdesc *) + dstinfo->buf.desc->auxptr; + GCDBG(GCZONE_DEST, " physical descriptor = 0x%08X\n", + bvphysdesc); + GCDBG(GCZONE_DEST, " first page = 0x%08X\n", + bvphysdesc->pagearray[0]); + GCDBG(GCZONE_DEST, " page offset = 0x%08X\n", + bvphysdesc->pageoffset); + } else { + GCDBG(GCZONE_DEST, " virtual address = 0x%08X\n", + (unsigned int) dstinfo->buf.desc->virtaddr); + } + + GCDBG(GCZONE_DEST, " stride = %ld\n", + dstinfo->geom->virtstride); + GCDBG(GCZONE_DEST, " geometry size = %dx%d\n", + dstinfo->geom->width, dstinfo->geom->height); + GCDBG(GCZONE_DEST, " surface offset (pixels) = %d,%d\n", + dstinfo->xpixalign, dstinfo->ypixalign); + GCDBG(GCZONE_DEST, " surface offset (bytes) = %d\n", + dstinfo->bytealign); + + /* Check for unsupported dest formats. */ + if ((dstinfo->format.type == BVFMT_YUV) && + (dstinfo->format.cs.yuv.planecount > 1)) { + BVSETBLTERROR(BVERR_DSTGEOM_FORMAT, + "destination format unsupported"); + goto exit; + } + + /* Destination stride must be 8 pixel aligned. */ + if ((dstinfo->geom->virtstride + & (dstinfo->format.bitspp - 1)) != 0) { + BVSETBLTERROR(BVERR_DSTGEOM_STRIDE, + "destination stride must be 8 pixel " + "aligned."); + goto exit; + } + + /* Validate geometry. */ + if (!valid_geom(dstinfo)) { + BVSETBLTERROR(BVERR_DSTGEOM, + "destination geom exceeds surface size"); + goto exit; + } + } + + /* Did clipping/destination rects change? */ + if ((batch->batchflags & (BVBATCH_CLIPRECT | + BVBATCH_DESTRECT | + BVBATCH_DST)) != 0) { + struct surfaceinfo *dstinfo; + struct gcrect cliprect; + struct gcrect *dstrect; + struct gcrect *dstrectaux; + + /* Get a shortcut to the destination surface. */ + dstinfo = &batch->dstinfo; + + /* Determine destination rectangle. */ + dstrect = &dstinfo->rect; + GCCONVERT_RECT(GCZONE_DEST, + " rect", + &bvbltparams->dstrect, + dstrect); + + /* Determine whether aux destination is specified. */ + batch->haveaux + = ((bvbltparams->flags & BVFLAG_SRC2_AUXDSTRECT) != 0); + GCDBG(GCZONE_DEST, " have aux dest = %d\n", batch->haveaux); + + /* Is clipping rectangle specified? */ + if ((bvbltparams->flags & BVFLAG_CLIP) == BVFLAG_CLIP) { + /* Convert the clipping rectangle. */ + GCCONVERT_RECT(GCZONE_DEST, + " clipping", + &bvbltparams->cliprect, + &cliprect); + + if ((cliprect.left < GC_CLIP_RESET_LEFT) || + (cliprect.top < GC_CLIP_RESET_TOP) || + (cliprect.right > GC_CLIP_RESET_RIGHT) || + (cliprect.bottom > GC_CLIP_RESET_BOTTOM)) { + BVSETERROR(BVERR_CLIP_RECT, + "clip rect is invalid"); + goto exit; + } + + /* Compute clipping deltas and the adjusted + * destination rect. */ + if (cliprect.left <= dstrect->left) { + batch->clipdelta.left = 0; + batch->dstclipped.left = dstrect->left; + } else { + batch->clipdelta.left = cliprect.left + - dstrect->left; + batch->dstclipped.left = cliprect.left; + } + + if (cliprect.top <= dstrect->top) { + batch->clipdelta.top = 0; + batch->dstclipped.top = dstrect->top; + } else { + batch->clipdelta.top = cliprect.top + - dstrect->top; + batch->dstclipped.top = cliprect.top; + } + + if (cliprect.right >= dstrect->right) { + batch->clipdelta.right = 0; + batch->dstclipped.right = dstrect->right; + } else { + batch->clipdelta.right = cliprect.right + - dstrect->right; + batch->dstclipped.right = cliprect.right; + } + + if (cliprect.bottom >= dstrect->bottom) { + batch->clipdelta.bottom = 0; + batch->dstclipped.bottom = dstrect->bottom; + } else { + batch->clipdelta.bottom = cliprect.bottom + - dstrect->bottom; + batch->dstclipped.bottom = cliprect.bottom; + } + + /* Clip the aux destination. */ + if (batch->haveaux) { + /* Convert the aux rectangle. */ + dstrectaux = &batch->dstrectaux; + GCCONVERT_RECT(GCZONE_DEST, + " aux rect", + &bvbltparams->src2auxdstrect, + dstrectaux); + + if (cliprect.left <= dstrectaux->left) + batch->dstclippedaux.left + = dstrectaux->left; + else + batch->dstclippedaux.left + = cliprect.left; + + if (cliprect.top <= dstrectaux->top) + batch->dstclippedaux.top + = dstrectaux->top; + else + batch->dstclippedaux.top + = cliprect.top; + + if (cliprect.right >= dstrectaux->right) + batch->dstclippedaux.right + = dstrectaux->right; + else + batch->dstclippedaux.right + = cliprect.right; + + if (cliprect.bottom >= dstrectaux->bottom) + batch->dstclippedaux.bottom + = dstrectaux->bottom; + else + batch->dstclippedaux.bottom + = cliprect.bottom; + } + } else { + batch->clipdelta.left = + batch->clipdelta.top = + batch->clipdelta.right = + batch->clipdelta.bottom = 0; + + batch->dstclipped = *dstrect; + if (batch->haveaux) + /* Convert the aux rectangle. */ + GCCONVERT_RECT(GCZONE_DEST, + " aux rect", + &bvbltparams->src2auxdstrect, + &batch->dstclippedaux); + } + + GCPRINT_RECT(GCZONE_DEST, " clipped dest", + &batch->dstclipped); + + /* Validate the destination rectangle. */ + if (!valid_rect(dstinfo->geom, &batch->dstclipped)) { + BVSETBLTERROR(BVERR_DSTRECT, + "invalid destination rectangle."); + goto exit; + } + + if (batch->haveaux) { + GCPRINT_RECT(GCZONE_DEST, " clipped aux dest", + &batch->dstclippedaux); + + /* Validate the aux destination rectangle. */ + if (!valid_rect(dstinfo->geom, &batch->dstclippedaux)) { + BVSETBLTERROR(BVERR_DSTRECT, + "invalid aux destination " + "rectangle."); + goto exit; + } + } + + GCDBG(GCZONE_DEST, + " clipping delta = (%d,%d)-(%d,%d)\n", + batch->clipdelta.left, + batch->clipdelta.top, + batch->clipdelta.right, + batch->clipdelta.bottom); + } + +exit: + GCEXITARG(GCZONE_DEST, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +void process_dest_rotation(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + GCENTER(GCZONE_DEST); + + /* Did clipping/destination rects change? */ + if ((batch->batchflags & (BVBATCH_CLIPRECT | + BVBATCH_DESTRECT | + BVBATCH_DST)) != 0) { + struct surfaceinfo *dstinfo; + int dstoffsetX, dstoffsetY; + + /* Initialize the destination descriptor. */ + dstinfo = &batch->dstinfo; + + switch (dstinfo->angle) { + case ROT_ANGLE_0: + /* Determine the origin offset. */ + dstoffsetX = dstinfo->xpixalign; + dstoffsetY = dstinfo->ypixalign; + + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->ypixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = batch->dstwidth; + dstinfo->physheight = batch->dstheight; + break; + + case ROT_ANGLE_90: + /* Determine the origin offset. */ + dstoffsetX = dstinfo->ypixalign; + dstoffsetY = dstinfo->xpixalign; + + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->height + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->width + - dstinfo->ypixalign; + break; + + case ROT_ANGLE_180: + /* Determine the origin offset. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->xpixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->ypixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = batch->dstwidth; + dstinfo->physheight = batch->dstheight; + break; + + case ROT_ANGLE_270: + /* Determine the origin offset. */ + dstoffsetX = 0; + dstoffsetY = 0; + + /* Determine geometry size. */ + batch->dstwidth = dstinfo->geom->width + - dstinfo->ypixalign; + batch->dstheight = dstinfo->geom->height + - dstinfo->xpixalign; + + /* Determine the physical size. */ + dstinfo->physwidth = dstinfo->geom->height + - dstinfo->xpixalign; + dstinfo->physheight = dstinfo->geom->width + - dstinfo->ypixalign; + break; + + default: + dstoffsetX = 0; + dstoffsetY = 0; + } + + /* Compute adjusted destination rectangles. */ + batch->dstadjusted.left + = batch->dstclipped.left + - dstoffsetX; + batch->dstadjusted.top + = batch->dstclipped.top + - dstoffsetY; + batch->dstadjusted.right + = batch->dstclipped.right + - dstoffsetX; + batch->dstadjusted.bottom + = batch->dstclipped.bottom + - dstoffsetY; + + GCPRINT_RECT(GCZONE_DEST, "adjusted dest", + &batch->dstadjusted); + + GCDBG(GCZONE_DEST, "aligned geometry size = %dx%d\n", + batch->dstwidth, batch->dstheight); + GCDBG(GCZONE_DEST, "aligned physical size = %dx%d\n", + dstinfo->physwidth, dstinfo->physheight); + GCDBG(GCZONE_DEST, "origin offset (pixels) = %d,%d\n", + dstoffsetX, dstoffsetY); + } + + GCEXIT(GCZONE_DEST); +} + +enum bverror parse_source(struct bvbltparams *bvbltparams, + struct gcbatch *batch, + struct bvrect *srcrect, + struct surfaceinfo *srcinfo) +{ + enum bverror bverror = BVERR_NONE; + + GCENTER(GCZONE_SRC); + GCDBG(GCZONE_SRC, "parsing source #%d\n", + srcinfo->index + 1); + + /* Parse the source format. */ + if (parse_format(bvbltparams, srcinfo) != BVERR_NONE) { + bverror = (srcinfo->index == 0) + ? BVERR_SRC1GEOM_FORMAT + : BVERR_SRC2GEOM_FORMAT; + goto exit; + } + + /* Parse orientation. */ + srcinfo->angle = get_angle(srcinfo->geom->orientation); + if (srcinfo->angle == ROT_ANGLE_INVALID) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1GEOM + : BVERR_SRC2GEOM, + "unsupported source%d orientation %d.", + srcinfo->index + 1, + srcinfo->geom->orientation); + goto exit; + } + + /* Determine source mirror. */ + srcinfo->mirror = (srcinfo->index == 0) + ? (bvbltparams->flags >> BVFLAG_FLIP_SRC1_SHIFT) + & BVFLAG_FLIP_MASK + : (bvbltparams->flags >> BVFLAG_FLIP_SRC2_SHIFT) + & BVFLAG_FLIP_MASK; + + GCDBG(GCZONE_SRC, " buffer length = %d\n", srcinfo->buf.desc->length); + GCDBG(GCZONE_SRC, " rotation %d degrees.\n", srcinfo->angle * 90); + + if (srcinfo->buf.desc->auxtype == BVAT_PHYSDESC) { + struct bvphysdesc *bvphysdesc; + bvphysdesc = (struct bvphysdesc *) srcinfo->buf.desc->auxptr; + GCDBG(GCZONE_SRC, " physical descriptor = 0x%08X\n", + bvphysdesc); + GCDBG(GCZONE_SRC, " first page = 0x%08X\n", + bvphysdesc->pagearray[0]); + GCDBG(GCZONE_SRC, " page offset = 0x%08X\n", + bvphysdesc->pageoffset); + } else { + GCDBG(GCZONE_SRC, " virtual address = 0x%08X\n", + (unsigned int) srcinfo->buf.desc->virtaddr); + } + + GCDBG(GCZONE_SRC, " stride = %ld\n", + srcinfo->geom->virtstride); + GCDBG(GCZONE_SRC, " geometry size = %dx%d\n", + srcinfo->geom->width, srcinfo->geom->height); + GCDBG(GCZONE_SRC, " mirror = %d\n", srcinfo->mirror); + + /* Convert the rectangle. */ + GCCONVERT_RECT(GCZONE_SRC, + " rect", srcrect, &srcinfo->rect); + + /* Source must be 8 pixel aligned. */ + if ((srcinfo->geom->virtstride + & (srcinfo->format.bitspp - 1)) != 0) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1GEOM_STRIDE + : BVERR_SRC2GEOM_STRIDE, + "source stride must be 8 pixel aligned."); + goto exit; + } + + /* Planar YUV? */ + if ((srcinfo->format.type == BVFMT_YUV) && + (srcinfo->format.cs.yuv.planecount > 1)) { + int xpixalign; + + /* Source rotation is not supported. */ + if (srcinfo->angle != ROT_ANGLE_0) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1_ROT + : BVERR_SRC2_ROT, + "rotation of planar YUV is " + "not supported"); + goto exit; + } + + /* Check base address alignment. */ + xpixalign = get_pixel_offset(srcinfo, 0); + if (xpixalign != 0) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1DESC_ALIGNMENT + : BVERR_SRC2DESC_ALIGNMENT, + "planar YUV base address must be " + "64 byte aligned."); + goto exit; + } + } + + /* Validate source geometry. */ + if (!valid_geom(srcinfo)) { + BVSETBLTERROR((srcinfo->index == 0) + ? BVERR_SRC1GEOM + : BVERR_SRC2GEOM, + "source%d geom exceeds surface size.", + srcinfo->index + 1); + goto exit; + } + +exit: + GCEXITARG(GCZONE_SRC, "bv%s = %d\n", + (bverror == BVERR_NONE) ? "result" : "error", bverror); + return bverror; +} + +static enum bverror parse_implicitscale(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + enum bverror bverror = BVERR_NONE; + unsigned int quality; + unsigned int technique; + unsigned int imagetype; + + GCENTER(GCZONE_SCALING); + + quality = (bvbltparams->scalemode & BVSCALEDEF_QUALITY_MASK) + >> BVSCALEDEF_QUALITY_SHIFT; + technique = (bvbltparams->scalemode & BVSCALEDEF_TECHNIQUE_MASK) + >> BVSCALEDEF_TECHNIQUE_SHIFT; + imagetype = (bvbltparams->scalemode & BVSCALEDEF_TYPE_MASK) + >> BVSCALEDEF_TYPE_SHIFT; + + GCDBG(GCZONE_SCALING, "quality = %d\n", quality); + GCDBG(GCZONE_SCALING, "technique = %d\n", technique); + GCDBG(GCZONE_SCALING, "imagetype = %d\n", imagetype); + + switch (quality) { + case BVSCALEDEF_FASTEST >> BVSCALEDEF_QUALITY_SHIFT: + batch->op.filter.horkernelsize = 3; + batch->op.filter.verkernelsize = 3; + break; + + case BVSCALEDEF_GOOD >> BVSCALEDEF_QUALITY_SHIFT: + batch->op.filter.horkernelsize = 5; + batch->op.filter.verkernelsize = 5; + break; + + case BVSCALEDEF_BETTER >> BVSCALEDEF_QUALITY_SHIFT: + batch->op.filter.horkernelsize = 7; + batch->op.filter.verkernelsize = 7; + break; + + case BVSCALEDEF_BEST >> BVSCALEDEF_QUALITY_SHIFT: + batch->op.filter.horkernelsize = 9; + batch->op.filter.verkernelsize = 9; + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported scale quality 0x%02X", quality); + goto exit; + } + + switch (technique) { + case BVSCALEDEF_DONT_CARE >> BVSCALEDEF_TECHNIQUE_SHIFT: + case BVSCALEDEF_NOT_NEAREST_NEIGHBOR >> BVSCALEDEF_TECHNIQUE_SHIFT: + break; + + case BVSCALEDEF_POINT_SAMPLE >> BVSCALEDEF_TECHNIQUE_SHIFT: + batch->op.filter.horkernelsize = 1; + batch->op.filter.verkernelsize = 1; + break; + + case BVSCALEDEF_INTERPOLATED >> BVSCALEDEF_TECHNIQUE_SHIFT: + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported scale technique %d", technique); + goto exit; + } + + switch (imagetype) { + case 0: + case BVSCALEDEF_PHOTO >> BVSCALEDEF_TYPE_SHIFT: + case BVSCALEDEF_DRAWING >> BVSCALEDEF_TYPE_SHIFT: + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported image type %d", imagetype); + goto exit; + } + + GCDBG(GCZONE_SCALING, "kernel size = %dx%d\n", + batch->op.filter.horkernelsize, + batch->op.filter.verkernelsize); + +exit: + GCEXIT(GCZONE_SCALING); + return bverror; +} + +static enum bverror parse_explicitscale(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + enum bverror bverror = BVERR_NONE; + unsigned int horsize; + unsigned int versize; + + GCENTER(GCZONE_SCALING); + + horsize = (bvbltparams->scalemode & BVSCALEDEF_HORZ_MASK) + >> BVSCALEDEF_HORZ_SHIFT; + versize = (bvbltparams->scalemode & BVSCALEDEF_VERT_MASK) + >> BVSCALEDEF_VERT_SHIFT; + + GCDBG(GCZONE_SCALING, "horsize = %d\n", horsize); + GCDBG(GCZONE_SCALING, "versize = %d\n", versize); + + switch (horsize) { + case BVSCALEDEF_NEAREST_NEIGHBOR: + batch->op.filter.horkernelsize = 1; + break; + + case BVSCALEDEF_LINEAR: + case BVSCALEDEF_CUBIC: + case BVSCALEDEF_3_TAP: + batch->op.filter.horkernelsize = 3; + break; + + case BVSCALEDEF_5_TAP: + batch->op.filter.horkernelsize = 5; + break; + + case BVSCALEDEF_7_TAP: + batch->op.filter.horkernelsize = 7; + break; + + case BVSCALEDEF_9_TAP: + batch->op.filter.horkernelsize = 9; + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported horizontal kernel size %d", horsize); + goto exit; + } + + switch (versize) { + case BVSCALEDEF_NEAREST_NEIGHBOR: + batch->op.filter.verkernelsize = 1; + break; + + case BVSCALEDEF_LINEAR: + case BVSCALEDEF_CUBIC: + case BVSCALEDEF_3_TAP: + batch->op.filter.verkernelsize = 3; + break; + + case BVSCALEDEF_5_TAP: + batch->op.filter.verkernelsize = 5; + break; + + case BVSCALEDEF_7_TAP: + batch->op.filter.verkernelsize = 7; + break; + + case BVSCALEDEF_9_TAP: + batch->op.filter.verkernelsize = 9; + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported vertical kernel size %d", versize); + goto exit; + } + + GCDBG(GCZONE_SCALING, "kernel size = %dx%d\n", + batch->op.filter.horkernelsize, + batch->op.filter.verkernelsize); + +exit: + GCEXIT(GCZONE_SCALING); + return bverror; +} + +enum bverror parse_scalemode(struct bvbltparams *bvbltparams, + struct gcbatch *batch) +{ + enum bverror bverror; + unsigned int scaleclass; + + GCENTER(GCZONE_SCALING); + + scaleclass = (bvbltparams->scalemode & BVSCALEDEF_CLASS_MASK) + >> BVSCALEDEF_CLASS_SHIFT; + + GCDBG(GCZONE_SCALING, "scaleclass = %d\n", scaleclass); + + switch (scaleclass) { + case BVSCALEDEF_IMPLICIT >> BVSCALEDEF_CLASS_SHIFT: + bverror = parse_implicitscale(bvbltparams, batch); + break; + + case BVSCALEDEF_EXPLICIT >> BVSCALEDEF_CLASS_SHIFT: + bverror = parse_explicitscale(bvbltparams, batch); + break; + + default: + BVSETBLTERROR(BVERR_SCALE_MODE, + "unsupported scale class %d", scaleclass); + goto exit; + } + +exit: + GCEXIT(GCZONE_SCALING); + return bverror; +} diff --git a/bltsville/gcbv/mirror/include/cache-2dmanager.h b/bltsville/gcbv/mirror/include/cache-2dmanager.h new file mode 100644 index 0000000..9740314 --- /dev/null +++ b/bltsville/gcbv/mirror/include/cache-2dmanager.h @@ -0,0 +1,75 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef CACHE_2DMANAGER_H_ +#define CACHE_2DMANAGER_H_ + +/* The value below only applies to OMAP4 */ +#define L1CACHE_SIZE 32768 +#define L2CACHE_SIZE 1048576 + +#define L1THRESHOLD L1CACHE_SIZE +#define L2THRESHOLD L2CACHE_SIZE + +struct c2dmrgn { + char *start; /* addr of upper left of rect */ + size_t span; /* bytes to be operated on per line */ + size_t lines; /* lines to be operated on */ + long stride; /* bytes per line */ +}; + +/* + * c2dm_l1cache(count, rgns, dir) + * + * L1 Cache operations in 2D + * + * - count - number of regions + * - rgns - array of regions + * - dir - cache operation direction + * + */ +void c2dm_l1cache(int count, struct c2dmrgn rgns[], int dir); + +/* + * c2dm_l2cache(count, rgns, dir) + * + * L2 Cache operations in 2D + * + * - count - number of regions + * - rgns - array of regions + * - dir - cache operation direction + * + */ +void c2dm_l2cache(int count, struct c2dmrgn rgns[], int dir); + + +#endif /* CACHE_2DMANAGER_H_ */ diff --git a/bltsville/gcbv/mirror/include/gcdbglog.h b/bltsville/gcbv/mirror/include/gcdbglog.h new file mode 100644 index 0000000..a4e759a --- /dev/null +++ b/bltsville/gcbv/mirror/include/gcdbglog.h @@ -0,0 +1,384 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCDBGLOG_H +#define GCDBGLOG_H + +#include "gclist.h" +#include +struct gcmmucontext; + + +/******************************************************************************* + * Debug logging switches. + */ + +/* Enables internal gccore logging backend. */ +#if !defined(GCDEBUG_ENABLE) +#define GCDEBUG_ENABLE 0 /* Enabled for development branch only. */ +#endif + +/* Enables linux builtin logging backend. */ +#if !defined(GCDEBUG_LINUXLOGS) +#define GCDEBUG_LINUXLOGS 0 +#endif + +#if GCDEBUG_ENABLE && GCDEBUG_LINUXLOGS +#error GCDEBUG_ENABLE and GCDEBUG_LINUXLOGS cannot be enabled simultaneously. +#endif + + +/******************************************************************************* + * Dumping interface macro for release mode. + */ + +#if !GCDEBUG_ENABLE && !GCDEBUG_LINUXLOGS +#define GCDBG_INIT(...) +#define GCDBG_EXIT(...) +#define GCDBG_FILTERDEF(...) +#define GCDBG_REGISTER(...) +#define GCENTER(...) +#define GCEXIT(...) +#define GCENTERARG(...) +#define GCEXITARG(...) +#define GCDBG(...) {} +#define GCERR(...) {} +#define GCDUMPSTRING(...) {} +#define GCDUMPBUFFER(...) {} +#define GCDUMPARENA(...) {} +#define GCDUMPARENAS(...) {} +#define GCGPUSTATUS(...) {} +#endif + +#if !GCDEBUG_ENABLE +#define GCDBG_REPORT_MISSING() \ + printf("gcx logging is not integrated.\n") + +#define GCDBG_SHOWENABLED(s) \ + GCDBG_REPORT_MISSING() + +#define GCDBG_ENABLEDUMP() \ + GCDBG_REPORT_MISSING() + +#define GCDBG_DISABLEDUMP() \ + GCDBG_REPORT_MISSING() + +#define GCDBG_SETFILTER(filtername, zone) \ + GCDBG_REPORT_MISSING() + +#define GCDBG_FLUSHDUMP(s) \ + GCDBG_REPORT_MISSING() + +#define GCDBG_RESETDUMP() \ + GCDBG_REPORT_MISSING() + +#endif + + +/******************************************************************************* + * Dumping macros not specific to a particular logging backend. + */ + +#if GCDEBUG_ENABLE || GCDEBUG_LINUXLOGS + +#define GC_MOD_PREFIX \ + GC_DEV_NAME ": %s(%d) " + +#define GCDUMPARENA(zone, text, arena) \ +do { \ + GCDBG(zone, text " @ 0x%08X:\n", (unsigned int) arena); \ + GCDBG(zone, " number of pages = %u\n", \ + (arena)->count); \ + GCDBG(zone, " from (absolute/mtlb/stlb) = 0x%08X / %u / %u\n", \ + (arena)->start.absolute, \ + (arena)->start.loc.mtlb, \ + (arena)->start.loc.stlb); \ + GCDBG(zone, " to (absolute/mtlb/stlb) = 0x%08X / %u / %u\n", \ + (arena)->end.absolute, \ + (arena)->end.loc.mtlb, \ + (arena)->end.loc.stlb); \ +} while (false) + +#define GCDUMPARENAS(zone, text, arenahead) \ +do { \ + GCDBG(zone, "%s:\n", text); \ + \ + if (list_empty(arenahead)) { \ + GCDBG(zone, " no arenas defined in the list.\n"); \ + } else { \ + struct list_head *entry; \ + struct gcmmuarena *arena; \ + \ + list_for_each(entry, arenahead) { \ + arena = list_entry(entry, struct gcmmuarena, link); \ + GCDUMPARENA(zone, "arena", arena); \ + } \ + } \ +} while (false) + +#endif + +#define GC_FUNC_ENTER "++" +#define GC_FUNC_EXIT "--" + + +/******************************************************************************* + * Dumping macros for internal gccore logging backend. + */ + +#if GCDEBUG_ENABLE + +#define GCDBGFILTER \ + g_gcdbgfilter + +#define GCDBG_INIT() \ + gcdbg_init() + +#define GCDBG_EXIT() \ + gcdbg_exit() + +#define GCDBG_FILTERDEF(name, initzone, ...) \ + static struct gcdbgfilter GCDBGFILTER = { \ + .link = LIST_HEAD_INIT(GCDBGFILTER.link), \ + .filtername = #name, \ + .zone = initzone, \ + .zonename = { __VA_ARGS__, NULL } \ + }; \ + \ + struct gcdbgfilter *name ## _dbgfilter(void) \ + { \ + return &GCDBGFILTER; \ + } + +#define GCDBG_REGISTER(name) \ +do { \ + struct gcdbgfilter *name ## _dbgfilter(void); \ + gc_dbg_add_client(name ## _dbgfilter()); \ +} while (0) + +#define GCDBG_SHOWENABLED(s) \ + gc_dump_show_enabled(s) + +#define GCDBG_ENABLEDUMP() \ + gc_dump_enable() + +#define GCDBG_DISABLEDUMP() \ + gc_dump_disable() + +#define GCDBG_SETFILTER(filtername, zone) \ + gc_dump_filter_enable(filtername, zone) + +#define GCDBG_FLUSHDUMP(s) \ + gc_dump_flush(s) + +#define GCDBG_RESETDUMP() \ + gc_dump_reset() + +#define GCENTER(zone) \ + gc_dump_string(&GCDBGFILTER, zone, GC_FUNC_ENTER GC_MOD_PREFIX "\n", \ + __func__, __LINE__) + +#define GCEXIT(zone) \ + gc_dump_string(&GCDBGFILTER, zone, GC_FUNC_EXIT GC_MOD_PREFIX "\n", \ + __func__, __LINE__) + +#define GCENTERARG(zone, msg, ...) \ + gc_dump_string(&GCDBGFILTER, zone, GC_FUNC_ENTER GC_MOD_PREFIX msg, \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCEXITARG(zone, msg, ...) \ + gc_dump_string(&GCDBGFILTER, zone, GC_FUNC_EXIT GC_MOD_PREFIX msg, \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCDBG(zone, msg, ...) \ + gc_dump_string(&GCDBGFILTER, zone, GC_MOD_PREFIX msg, \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCERR(msg, ...) \ + gc_dump_string(NULL, 0, GC_MOD_PREFIX "[ERROR] " msg, \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCDUMPSTRING(msg, ...) \ + gc_dump_string(NULL, 0, msg, ##__VA_ARGS__) + +#define GCDUMPBUFFER(zone, ptr, gpuaddr, datasize) \ + gc_dump_cmd_buffer(&GCDBGFILTER, zone, ptr, gpuaddr, datasize) + +#endif + + +/******************************************************************************* + * Dumping macros for linux builtin logging backend. + */ + +#if GCDEBUG_LINUXLOGS + +#define GCDBG_INIT() +#define GCDBG_EXIT() +#define GCDBG_FILTERDEF(...) +#define GCDBG_REGISTER(...) + +#define GCENTER(zone) \ + GCDBG(zone, GC_FUNC_ENTER " %s(%d)\n", __func__, __LINE__) + +#define GCEXIT(zone) \ + GCDBG(zone, GC_FUNC_EXIT " %s(%d)\n", __func__, __LINE__) + +#define GCENTERARG(zone, msg, ...) \ + GCDBG(zone, GC_FUNC_ENTER " %s(%d) " msg "\n", \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCEXITARG(zone, msg, ...) \ + GCDBG(zone, GC_FUNC_EXIT " %s(%d) " msg "\n", \ + __func__, __LINE__, ##__VA_ARGS__) + +#define GCDBG(zone, msg, ...) \ + dev_dbg(gc_get_dev(), msg, ##__VA_ARGS__) + +#define GCERR(msg, ...) \ + GCDBG(0, msg, ##__VA_ARGS__) + +#define GCDUMPSTRING(msg, ...) \ + GCDBG(0, msg, ##__VA_ARGS__) + +#define GCDUMPBUFFER(...) {} +#define GCGPUSTATUS(...) {} + +#endif + + +/******************************************************************************* + * Command buffer parser. + */ + +struct gcsurfaceinfo { + unsigned int width; + unsigned int height; + unsigned int address; + unsigned int stride; + unsigned int swizzle; + unsigned int format; + unsigned int bpp; +}; + +struct gcrect { + int left; + int top; + int right; + int bottom; +}; + +struct gcsourceinfo { + struct gcsurfaceinfo surf; + struct gcrect rect; +}; + +struct gcdestinfo { + struct gcsurfaceinfo surf; + unsigned int rectcount; + struct gcrect rect[256]; +}; + +struct gccommandinfo { + unsigned int command; + unsigned int srccount; + struct gcsourceinfo src[4]; + struct gcdestinfo dst; +}; + +/* Parse the specified command buffer and fill in the structure. */ +int gc_parse_command_buffer(unsigned int *buffer, unsigned int size, + struct gccommandinfo *info); + + +/******************************************************************************* + * Filter structure. + */ + +struct gcdbgfilter { + struct list_head link; + char *filtername; + unsigned int zone; + const char *zonename[]; +}; + + +/******************************************************************************* + * Debug init/exit functions. + */ + +void gcdbg_init(void); +void gcdbg_exit(void); + + +/******************************************************************************* + * Dumping functions. + */ + +/* String dumping. */ +void gc_dump_string(struct gcdbgfilter *filter, unsigned int zone, + const char *message, ...); +void gc_dump_string_sized(struct gcdbgfilter *filter, unsigned int zone, + unsigned int argsize, const char *message, ...); + +/* Dump command buffer. */ +void gc_dump_cmd_buffer(struct gcdbgfilter *filter, unsigned int zone, + void *ptr, unsigned int gpuaddr, unsigned int datasize); + +/* Dump generic buffer. */ +void gc_dump_buffer(struct gcdbgfilter *filter, unsigned int zone, + void *ptr, unsigned int gpuaddr, unsigned int datasize); + + +/******************************************************************************* + * Bltsville debugging. + */ + +char *gc_bvblend_name(enum bvblend blend); + + +/******************************************************************************* + * Dumping control. + */ + +struct seq_file; + +struct device *gc_get_dev(void); +void gc_dump_show_enabled(struct seq_file *s); +void gc_dump_enable(void); +void gc_dump_disable(void); +void gc_dump_filter_enable(const char *filtername, int zone); +void gc_dump_flush(struct seq_file *s); +void gc_dump_reset(void); +void gc_dbg_add_client(struct gcdbgfilter *filter); + +#endif diff --git a/bltsville/gcbv/mirror/include/gcerror.h b/bltsville/gcbv/mirror/include/gcerror.h new file mode 100644 index 0000000..2efcf39 --- /dev/null +++ b/bltsville/gcbv/mirror/include/gcerror.h @@ -0,0 +1,226 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCERROR_H +#define GCERROR_H + +#define GCERR_SETGRP(error, group) \ +( \ + (enum gcerror) \ + ((error & GCERR_GENERIC_MASK) | group) \ +) + +#define GCERR_GENERIC(error) \ +( \ + (error & GCERR_GENERIC_MASK) << GCERR_GENERIC_SHIFT \ +) + +#define GCERR_GROUP(error) \ +( \ + (error & GCERR_GROUP_MASK) << GCERR_GROUP_SHIFT \ +) + +enum gcerror { + /*********************************************************************** + ** No error / success. + */ + GCERR_NONE = 0, + + /*********************************************************************** + ** Error code zones. + */ + + /* Generic error code zone. These errors inform of the low level + reason of the faulure, but don't carry information about which + logical part of the code generated the error. */ + GCERR_GENERIC_SIZE = 12, + GCERR_GENERIC_SHIFT = 0, + GCERR_GENERIC_MASK + = ((1 << GCERR_GENERIC_SIZE) - 1) << GCERR_GENERIC_SHIFT, + + /* Group error code zone. These errors inform about the logical part + of the code where the error occurred. */ + GCERR_GROUP_SIZE = (32 - GCERR_GENERIC_SIZE), + GCERR_GROUP_SHIFT = GCERR_GENERIC_SIZE, + GCERR_GROUP_MASK + = ((1 << GCERR_GROUP_SIZE) - 1) << GCERR_GROUP_SHIFT, + + /*********************************************************************** + ** Generic zone errors. + */ + + GCERR_OODM /* Out of dynamic memory. */ + = GCERR_GENERIC(1), + + GCERR_OOPM /* Out of paged memory. */ + = GCERR_GENERIC(2), + + GCERR_PMMAP /* Paged memory mapping. */ + = GCERR_GENERIC(3), + + GCERR_USER_READ /* Reading user input. */ + = GCERR_GENERIC(4), + + GCERR_USER_WRITE /* Writing user output. */ + = GCERR_GENERIC(5), + + GCERR_INTERRUPTED /* Interrupted by a signal. */ + = GCERR_GENERIC(6), + + GCERR_TIMEOUT /* Timeout. */ + = GCERR_GENERIC(7), + + GCERR_NOT_FOUND /* Data/entry not found. */ + = GCERR_GENERIC(8), + + GCERR_IOCTL /* IOCTL failed. */ + = GCERR_GENERIC(9), + + /*********************************************************************** + ** Group zone errors. + */ + + /**** Context errors. */ + GCERR_CTX_ALLOC /* Context allocation. */ + = GCERR_GROUP(0x01000), + + GCERR_CTX_CHANGE /* Lock/unlock error. */ + = GCERR_GROUP(0x01010), + + GCERR_CTX_NULL /* Context not set. */ + = GCERR_GROUP(0x01020), + + /**** Command queue errors. */ + GCERR_CMD_ENTRY_PIPE /* Entry pipe is invalid. */ + = GCERR_GROUP(0x02000), + + GCERR_CMD_EXIT_PIPE /* Exit pipe is invalid. */ + = GCERR_GROUP(0x02010), + + GCERR_CMD_MAPPED /* Command buffer mapping error. */ + = GCERR_GROUP(0x02020), + + GCERR_CMD_CONSISTENCY /* Inconsistent mapping. */ + = GCERR_GROUP(0x02030), + + GCERR_CMD_ALLOC /* Buffer allocation. */ + = GCERR_GROUP(0x02040), + + GCERR_CMD_QUEUE_ALLOC /* Buffer queue allocation. */ + = GCERR_GROUP(0x02050), + + GCERR_CMD_EVENT_ALLOC /* Event allocation. */ + = GCERR_GROUP(0x02060), + + GCERR_CMD_INT_ALLOC /* Interrupt allocation. */ + = GCERR_GROUP(0x02070), + + GCERR_CMD_ISR /* ISR initialization. */ + = GCERR_GROUP(0x02080), + + GCERR_CMD_THREAD /* Thread initialization. */ + = GCERR_GROUP(0x02090), + + /**** MMU errors. */ + GCERR_MMU_CTXT_BAD /* Invalid context. */ + = GCERR_GROUP(0x03000), + + GCERR_MMU_MTLB_ALLOC /* MTLB allocation. */ + = GCERR_GROUP(0x03010), + + GCERR_MMU_MTLB_SET /* MTLB setting. */ + = GCERR_GROUP(0x03020), + + GCERR_MMU_STLB_ALLOC /* STLB allocation. */ + = GCERR_GROUP(0x03030), + + GCERR_MMU_STLBIDX_ALLOC /* STLB index allocation. */ + = GCERR_GROUP(0x03040), + + GCERR_MMU_ARENA_ALLOC /* Vacant arena allocation. */ + = GCERR_GROUP(0x03050), + + GCERR_MMU_OOM /* No available arenas to allocate. */ + = GCERR_GROUP(0x03060), + + GCERR_MMU_SAFE_ALLOC /* Safe zone allocation. */ + = GCERR_GROUP(0x03070), + + GCERR_MMU_INIT /* MMU initialization. */ + = GCERR_GROUP(0x03080), + + GCERR_MMU_ARG /* Invalid argument. */ + = GCERR_GROUP(0x03090), + + GCERR_MMU_CLIENT /* Client initialization. */ + = GCERR_GROUP(0x030A0), + + GCERR_MMU_BUFFER_BAD /* Invalid buffer to map. */ + = GCERR_GROUP(0x030B0), + + GCERR_MMU_PAGE_BAD /* Bad page within the buffer. */ + = GCERR_GROUP(0x030C0), + + GCERR_MMU_DESC_ALLOC /* Bad page within the buffer. */ + = GCERR_GROUP(0x030D0), + + GCERR_MMU_PHYS_ALLOC /* Bad page within the buffer. */ + = GCERR_GROUP(0x030E0), + + GCERR_MMU_OFFSET /* Bad buffer offset. */ + = GCERR_GROUP(0x030F0), + + /**** Power management. */ + GCERR_POWER_MODE /* Invlalid power mode requested. */ + = GCERR_GROUP(0x04000), + + GCERR_POWER_CLOCK_ON /* Failed to enable clock. */ + = GCERR_GROUP(0x04010), + + GCERR_POWER_IRQ_ON /* Failed to install IRQ handler. */ + = GCERR_GROUP(0x04020), + + GCERR_POWER_PULSE /* Pulse skipping error. */ + = GCERR_GROUP(0x04030), + + /**** GCIOCTL module errors. */ + GCERR_IOCTL_CTX_ALLOC /* Context wrapper allocation. */ + = GCERR_GROUP(0x11000), + + GCERR_IOCTL_BUF_ALLOC /* Command buffer allocation. */ + = GCERR_GROUP(0x11010), + + GCERR_IOCTL_FIXUP_ALLOC /* Fixup buffer allocation. */ + = GCERR_GROUP(0x11020), +}; + +#endif diff --git a/bltsville/gcbv/mirror/include/gcioctl.h b/bltsville/gcbv/mirror/include/gcioctl.h new file mode 100644 index 0000000..4f31b5a --- /dev/null +++ b/bltsville/gcbv/mirror/include/gcioctl.h @@ -0,0 +1,293 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCIOCTL_H +#define GCIOCTL_H + +#include "gclist.h" +#include "gcerror.h" +#include "gcreg.h" +#include "cache-2dmanager.h" +#include + +/* IOCTL parameters. */ +#define GCIOCTL_TYPE 0x5D +#define GCIOCTL_BASE 0x5D + + +/******************************************************************************* + * Capability query API entry. + */ + +#define GCIOCTL_GETCAPS _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x00, \ + struct gcicaps) + +/* GCIOCTL_CALLBACK_ALLOC / GCIOCTL_CALLBACK_FREE: + * To be able to use the callback mechanism each user space client must + * use the ALLOC/FREE APIs to manage a kernel side callback object + * represented by the handle member of struct gcicallback. + * ALLOC API allocates the object and returns the handle to it. */ +struct gcicaps { + /* Error code. */ + enum gcerror gcerror; + + /* Capabilities and characteristics. */ + unsigned int gcmodel; + unsigned int gcrevision; + unsigned int gcdate; + unsigned int gctime; + union gcfeatures gcfeatures; + union gcfeatures0 gcfeatures0; + union gcfeatures1 gcfeatures1; + union gcfeatures2 gcfeatures2; + union gcfeatures3 gcfeatures3; +}; + +/******************************************************************************* + * Commit API entry. + */ + +#define GCIOCTL_COMMIT _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x10, \ + struct gcicommit) + +/* GPU graphics pipe definition. */ +enum gcpipe { + GCPIPE_UNKNOWN, + GCPIPE_2D, + GCPIPE_3D +}; + +/* Commit header; contains pointers to the head and the tail of a linked list + of command buffers to execute. */ +struct gcicommit { + /* Return status code. */ + enum gcerror gcerror; + + /* Entry graphics pipe specifies the pipe the GPU is expected to be in + * for successfull execution of the specified command buffers in this + * call. Exit graphics pipe specifies the state of the GPU after the + * buffers are executed. */ + enum gcpipe entrypipe; + enum gcpipe exitpipe; + + /* List of command buffers to be executed (gcbuffer). */ + struct list_head buffer; + + /* Pointer to the callback function to be called when the GPU completes + * execution of all buffers specified in this call. This member can be + * NULL if no callback is desired. callbackparam specifies data to be + * passed to the callback. */ + void (*callback) (void *callbackparam); + void *callbackparam; + + /* Callback object handle allocated with GCIOCTL_CALLBACK_ALLOC API. */ + unsigned long handle; + + /* If asynchronous is set to true, the call returns immediately without + * waiting until all specified buffers have been executed. If set to + * false, the call does not return until execution is finished. */ + bool asynchronous; + + /* Scheduled unmappings (gcschedunmap). */ + struct list_head unmap; +}; + +/* Command buffer header. */ +#define GC_BUFFER_SIZE (32 * 1024) +struct gcbuffer { + /* Fixup list (gcfixup). */ + struct list_head fixup; + + /* Number of pixels to be rendered. */ + unsigned int pixelcount; + + /* Pointers to the head and tail of the command buffer list. */ + unsigned int *head; + unsigned int *tail; + + /* Number of bytes available in the buffer for allocation. */ + unsigned int available; + + /* Commmand buffer list (gcbuffer). */ + struct list_head link; +}; + +/* Fixup entry. */ +struct gcfixupentry { + /* Offset into the commmand buffer where fixup is to be performed. */ + unsigned int dataoffset; + + /* Offset to be added to the translated address. */ + unsigned int surfoffset; +}; + +/* Address fixup array. */ +#define GC_FIXUP_MAX 1024 +struct gcfixup { + /* Fixup list (gcfixup). */ + struct list_head link; + + /* Fixup array. */ + unsigned int count; + struct gcfixupentry fixup[GC_FIXUP_MAX]; +}; + +/* Defines a link list of scheduled unmappings. */ +struct gcschedunmap { + /* Map handle. */ + unsigned long handle; + + /* Previous/next unmapping info (gcschedunmap). */ + struct list_head link; +}; + + +/******************************************************************************* + * Map/unmap API entries. + */ + +#define GCIOCTL_MAP _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x20, \ + struct gcimap) +#define GCIOCTL_UNMAP _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x21, \ + struct gcimap) + +struct gcimap { + /* Return status code. */ + enum gcerror gcerror; + + /* Mapped handle of the buffer. */ + unsigned long handle; + + union { + /* Pointer to the buffer to be mapped; + * used when pagearray is not provided (set to NULL). */ + void *logical; + + /* Page offset of the buffer to be mapped; + * used when pagearray is provided. */ + unsigned int offset; + } buf; + + /* Size of a physical page, 0 for default. */ + unsigned int pagesize; + + /* Pointer to array of physical pages. */ + unsigned long *pagearray; + + /* Size of the buffer to be mappped. */ + unsigned int size; +}; + + +/******************************************************************************* + * Cache manipulation API entries. + */ + +#define GCIOCTL_CACHE _IOW(GCIOCTL_TYPE, GCIOCTL_BASE + 0x30, \ + struct gcicache) + +struct gcicache { + /* Number of regions. */ + int count; + + /* The most regions that we deal with is 3. */ + struct c2dmrgn rgn[3]; + + /* Direction of data. */ + int dir; +}; + + +/******************************************************************************* + * Callback API entry. + */ + +#define GCIOCTL_CALLBACK_ALLOC _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x40, \ + struct gcicallback) +#define GCIOCTL_CALLBACK_FREE _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x41, \ + struct gcicallback) +#define GCIOCTL_CALLBACK_WAIT _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x42, \ + struct gcicallbackwait) +#define GCIOCTL_CALLBACK_ARM _IOWR(GCIOCTL_TYPE, GCIOCTL_BASE + 0x43, \ + struct gcicallbackarm) + +/* GCIOCTL_CALLBACK_ALLOC / GCIOCTL_CALLBACK_FREE: + * To be able to use the callback mechanism each user space client must + * use the ALLOC/FREE APIs to manage a kernel side callback object + * represented by the handle member of struct gcicallback. + * ALLOC API allocates the object and returns the handle to it. */ +struct gcicallback { + /* Error code. */ + enum gcerror gcerror; + + /* Callback object handle. */ + unsigned long handle; +}; + +/* GCIOCTL_CALLBACK_WAIT: + * Called by the user level client to block and wait until the hardware + * has executed a callback that was previosuly scheduled for the handle. */ +struct gcicallbackwait { + /* Error code. */ + enum gcerror gcerror; + + /* Callback object handle. */ + unsigned long handle; + + /* Timeout in milliseconds. */ + unsigned long timeoutms; + + /* OUT: if the call succeeds, callback and callbackparam are + * initialized with the callback to call. */ + void (*callback) (void *callbackparam); + void *callbackparam; +}; + +/* GCIOCTL_CALLBACK_ARM: + * Called by the client to arm a callback. This is similar to what + * COMMIT API does, but in a separate API. */ +struct gcicallbackarm { + /* Return status code. */ + enum gcerror gcerror; + + /* Pointer to the callback function to be called when the GPU completes + * execution of all buffers specified in this call. This member can be + * NULL if no callback is desired. callbackparam specifies data to be + * passed to the callback. */ + void (*callback) (void *callbackparam); + void *callbackparam; + + /* Callback object handle allocated with GCIOCTL_CALLBACK_ALLOC API. */ + unsigned long handle; +}; + +#endif diff --git a/bltsville/gcbv/mirror/include/gclist.h b/bltsville/gcbv/mirror/include/gclist.h new file mode 100644 index 0000000..614f76e --- /dev/null +++ b/bltsville/gcbv/mirror/include/gclist.h @@ -0,0 +1,594 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + */ + +#ifndef _GCLIST_H +#define _GCLIST_H + +/* Adaptation of Linux kernel double linked list. */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define LIST_POISON1 ((void *) 0x00100100) +#define LIST_POISON2 ((void *) 0x00200200) + +#if !defined(countof) +#define countof(a) \ + (sizeof(a) / sizeof(a[0])) +#endif + +#if !defined(offsetof) +#define offsetof(type, member) \ + ((size_t) &((type *) 0)->member) +#endif + +#if !defined(containerof) +#define containerof(ptr, type, member) \ + ((type *) ((char *) ptr - offsetof(type, member))) +#endif + +struct list_head { + struct list_head *next, *prev; +}; + +#define LIST_HEAD_INIT(name) { &(name), &(name) } + +#define LIST_HEAD(name) \ + struct list_head name = LIST_HEAD_INIT(name) + +static void INIT_LIST_HEAD(struct list_head *list) +{ + list->next = list; + list->prev = list; +} + +/* Insert a new entry between two known consecutive entries. + * This is only for internal list manipulation where we know + * the prev/next entries already! */ +static void __list_add(struct list_head *entry, + struct list_head *prev, + struct list_head *next) +{ + next->prev = entry; + entry->next = next; + entry->prev = prev; + prev->next = entry; +} + +/** + * list_add - add a new entry + * @newentry: new entry to be added + * @head: list head to add it after + * + * Insert a new entry after the specified head. + * This is good for implementing stacks. + */ +static void list_add(struct list_head *newentry, + struct list_head *head) +{ + __list_add(newentry, head, head->next); +} + + +/** + * list_add_tail - add a new entry + * @newentry: new entry to be added + * @head: list head to add it before + * + * Insert a new entry before the specified head. + * This is useful for implementing queues. + */ +static void list_add_tail(struct list_head *newentry, + struct list_head *head) +{ + __list_add(newentry, head->prev, head); +} + +/* Delete a list entry by making the prev/next entries point to each other. + * This is only for internal list manipulation where we know + * the prev/next entries already! */ +static void __list_del(struct list_head *prev, + struct list_head *next) +{ + next->prev = prev; + prev->next = next; +} + +/** + * list_del - deletes entry from list. + * @entry: the element to delete from the list. + * Note: list_empty() on entry does not return true after this, + * the entry is in an undefined state. + */ +static void __list_del_entry(struct list_head *entry) +{ + __list_del(entry->prev, entry->next); +} + +static void list_del(struct list_head *entry) +{ + __list_del(entry->prev, entry->next); + entry->next = LIST_POISON1; + entry->prev = LIST_POISON2; +} + +/** + * list_replace - replace old entry by new one + * @oldentry : the element to be replaced + * @newentry : the new element to insert + * + * If @old was empty, it will be overwritten. + */ +static void list_replace(struct list_head *oldentry, + struct list_head *newentry) +{ + newentry->next = oldentry->next; + newentry->next->prev = newentry; + newentry->prev = oldentry->prev; + newentry->prev->next = newentry; +} + +static void list_replace_init(struct list_head *oldentry, + struct list_head *newentry) +{ + list_replace(oldentry, newentry); + INIT_LIST_HEAD(oldentry); +} + +/** + * list_del_init - deletes entry from list and reinitialize it. + * @entry: the element to delete from the list. + */ +static void list_del_init(struct list_head *entry) +{ + __list_del_entry(entry); + INIT_LIST_HEAD(entry); +} + +/** + * list_move - delete from one list and add as another's head + * @list: the entry to move + * @head: the head that will precede our entry + */ +static void list_move(struct list_head *list, + struct list_head *head) +{ + __list_del_entry(list); + list_add(list, head); +} + +/** + * list_move_tail - delete from one list and add as another's tail + * @list: the entry to move + * @head: the head that will follow our entry + */ +static void list_move_tail(struct list_head *list, + struct list_head *head) +{ + __list_del_entry(list); + list_add_tail(list, head); +} + +/** + * list_is_last - tests whether @list is the last entry in list @head + * @list: the entry to test + * @head: the head of the list + */ +static int list_is_last(const struct list_head *list, + const struct list_head *head) +{ + return list->next == head; +} + +/** + * list_empty - tests whether a list is empty + * @head: the list to test. + */ +static int list_empty(const struct list_head *head) +{ + return (head->next == NULL) || (head->next == head); +} + +/** + * list_empty_careful - tests whether a list is empty and not being modified + * @head: the list to test + * + * Description: + * tests whether a list is empty _and_ checks that no other CPU might be + * in the process of modifying either member (next or prev) + * + * NOTE: using list_empty_careful() without synchronization + * can only be safe if the only activity that can happen + * to the list entry is list_del_init(). Eg. it cannot be used + * if another CPU could re-list_add() it. + */ +static int list_empty_careful(const struct list_head *head) +{ + struct list_head *next = head->next; + return (next == head) && (next == head->prev); +} + +/** + * list_rotate_left - rotate the list to the left + * @head: the head of the list + */ +static void list_rotate_left(struct list_head *head) +{ + struct list_head *first; + + if (!list_empty(head)) { + first = head->next; + list_move_tail(first, head); + } +} + +/** + * list_is_singular - tests whether a list has just one entry. + * @head: the list to test. + */ +static int list_is_singular(const struct list_head *head) +{ + return !list_empty(head) && (head->next == head->prev); +} + +static void __list_cut_position(struct list_head *list, + struct list_head *head, + struct list_head *entry) +{ + struct list_head *new_first = entry->next; + list->next = head->next; + list->next->prev = list; + list->prev = entry; + entry->next = list; + head->next = new_first; + new_first->prev = head; +} + +/** + * list_cut_position - cut a list into two + * @list: a new list to add all removed entries + * @head: a list with entries + * @entry: an entry within head, could be the head itself + * and if so we won't cut the list + * + * This helper moves the initial part of @head, up to and + * including @entry, from @head to @list. You should + * pass on @entry an element you know is on @head. @list + * should be an empty list or a list you do not care about + * losing its data. + */ +static void list_cut_position(struct list_head *list, + struct list_head *head, + struct list_head *entry) +{ + if (list_empty(head)) + return; + if (list_is_singular(head) && + (head->next != entry && head != entry)) + return; + if (entry == head) + INIT_LIST_HEAD(list); + else + __list_cut_position(list, head, entry); +} + +static void __list_splice(const struct list_head *list, + struct list_head *prev, + struct list_head *next) +{ + struct list_head *first = list->next; + struct list_head *last = list->prev; + + first->prev = prev; + prev->next = first; + + last->next = next; + next->prev = last; +} + +/** + * list_splice - join two lists, this is designed for stacks + * @list: the new list to add. + * @head: the place to add it in the first list. + */ +static void list_splice(const struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) + __list_splice(list, head, head->next); +} + +/** + * list_splice_tail - join two lists, each list being a queue + * @list: the new list to add. + * @head: the place to add it in the first list. + */ +static void list_splice_tail(struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) + __list_splice(list, head->prev, head); +} + +/** + * list_splice_init - join two lists and reinitialise the emptied list. + * @list: the new list to add. + * @head: the place to add it in the first list. + * + * The list at @list is reinitialised + */ +static void list_splice_init(struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) { + __list_splice(list, head, head->next); + INIT_LIST_HEAD(list); + } +} + +/** + * list_splice_tail_init - join two lists and reinitialise the emptied list + * @list: the new list to add. + * @head: the place to add it in the first list. + * + * Each of the lists is a queue. + * The list at @list is reinitialised + */ +static void list_splice_tail_init(struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) { + __list_splice(list, head->prev, head); + INIT_LIST_HEAD(list); + } +} + +/** + * list_entry - get the struct for this entry + * @ptr: the &struct list_head pointer. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + */ +#define list_entry(ptr, type, member) \ + containerof(ptr, type, member) + +/** + * list_first_entry - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + * + * Note, that list is expected to be not empty. + */ +#define list_first_entry(ptr, type, member) \ + list_entry((ptr)->next, type, member) + +/** + * list_for_each - iterate over a list + * @pos: the &struct list_head to use as a loop cursor. + * @head: the head for your list. + */ +#define list_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +/** + * __list_for_each - iterate over a list + * @pos: the &struct list_head to use as a loop cursor. + * @head: the head for your list. + * + * This variant doesn't differ from list_for_each() any more. + * We don't do prefetching in either case. + */ +#define __list_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +/** + * list_for_each_prev - iterate over a list backwards + * @pos: the &struct list_head to use as a loop cursor. + * @head: the head for your list. + */ +#define list_for_each_prev(pos, head) \ + for (pos = (head)->prev; pos != (head); pos = pos->prev) + +/** + * list_for_each_safe - iterate over a list safe against removal of list entry + * @pos: the &struct list_head to use as a loop cursor. + * @n: another &struct list_head to use as temporary storage + * @head: the head for your list. + */ +#define list_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +/** + * list_for_each_prev_safe - iterate over a list backwards safe against removal + * of list entry + * @pos: the &struct list_head to use as a loop cursor. + * @n: another &struct list_head to use as temporary storage + * @head: the head for your list. + */ +#define list_for_each_prev_safe(pos, n, head) \ + for (pos = (head)->prev, n = pos->prev; \ + pos != (head); \ + pos = n, n = pos->prev) + +/** + * list_for_each_entry - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define list_for_each_entry(pos, head, member) \ + for (pos = list_entry((head)->next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.next, typeof(*pos), member)) + +/** + * list_for_each_entry_reverse - iterate backwards over list of given type. + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define list_for_each_entry_reverse(pos, head, member) \ + for (pos = list_entry((head)->prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.prev, typeof(*pos), member)) + +/** + * list_prepare_entry - prepare a pos entry for use in + * list_for_each_entry_continue() + * @pos: the type * to use as a start point + * @head: the head of the list + * @member: the name of the list_struct within the struct. + * + * Prepares a pos entry for use as a start point in + * list_for_each_entry_continue(). + */ +#define list_prepare_entry(pos, head, member) \ + ((pos) ? : list_entry(head, typeof(*pos), member)) + +/** + * list_for_each_entry_continue - continue iteration over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Continue to iterate over list of given type, continuing after + * the current position. + */ + #define list_for_each_entry_continue(pos, head, member) \ + for (pos = list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.next, typeof(*pos), member)) + +/** + * list_for_each_entry_continue_reverse - iterate backwards from the given point + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Start to iterate over list of given type backwards, continuing after + * the current position. + */ +#define list_for_each_entry_continue_reverse(pos, head, member) \ + for (pos = list_entry(pos->member.prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.prev, typeof(*pos), member)) + +/** + * list_for_each_entry_from - iterate over list of given type from the current + * point + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Iterate over list of given type, continuing from current position. + */ +#define list_for_each_entry_from(pos, head, member) \ + for (; &pos->member != (head); \ + pos = list_entry(pos->member.next, typeof(*pos), member)) + +/** + * list_for_each_entry_safe - iterate over list of given type safe against + * removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define list_for_each_entry_safe(pos, n, head, member) \ + for (pos = list_entry((head)->next, typeof(*pos), member), \ + n = list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = list_entry(n->member.next, typeof(*n), member)) + +/** + * list_for_each_entry_safe_continue - continue list iteration safe against + * removal + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Iterate over list of given type, continuing after current point, + * safe against removal of list entry. + */ +#define list_for_each_entry_safe_continue(pos, n, head, member) \ + for (pos = list_entry(pos->member.next, typeof(*pos), member), \ + n = list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = list_entry(n->member.next, typeof(*n), member)) + +/** + * list_for_each_entry_safe_from - iterate over list from current point + * safe against removal + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Iterate over list of given type from current point, safe against + * removal of list entry. + */ +#define list_for_each_entry_safe_from(pos, n, head, member) \ + for (n = list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = list_entry(n->member.next, typeof(*n), member)) + +/** + * list_for_each_entry_safe_reverse - iterate backwards over list safe + * against removal + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + * + * Iterate backwards over list of given type, safe against removal + * of list entry. + */ +#define list_for_each_entry_safe_reverse(pos, n, head, member) \ + for (pos = list_entry((head)->prev, typeof(*pos), member), \ + n = list_entry(pos->member.prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = list_entry(n->member.prev, typeof(*n), member)) + +/** + * list_safe_reset_next - reset a stale list_for_each_entry_safe loop + * @pos: the loop cursor used in the list_for_each_entry_safe loop + * @n: temporary storage used in list_for_each_entry_safe + * @member: the name of the list_struct within the struct. + * + * list_safe_reset_next is not safe to use in general if the list may be + * modified concurrently (eg. the lock is dropped in the loop body). An + * exception to this is if the cursor element (pos) is pinned in the list, + * and list_safe_reset_next is called after re-taking the lock and before + * completing the current iteration of the loop body. + */ +#define list_safe_reset_next(pos, n, member) \ + n = list_entry(pos->member.next, typeof(*pos), member) + +#ifdef __cplusplus +} +#endif +#endif diff --git a/bltsville/gcbv/mirror/include/gcreg.h b/bltsville/gcbv/mirror/include/gcreg.h new file mode 100644 index 0000000..0328c25 --- /dev/null +++ b/bltsville/gcbv/mirror/include/gcreg.h @@ -0,0 +1,10269 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __gcreg_h +#define __gcreg_h + +/******************************************************************************* +** Register access macros. +*/ + +#define GCREGSTART(reg_field) \ +( \ + 0 ? reg_field \ +) + +#define GCREGEND(reg_field) \ +( \ + 1 ? reg_field \ +) + +#define GCREGSIZE(reg_field) \ +( \ + GCREGEND(reg_field) - GCREGSTART(reg_field) + 1 \ +) + +#define GCREGALIGN(data, reg_field) \ +( \ + ((unsigned int) (data)) << GCREGSTART(reg_field) \ +) + +#define GCREGMASK(reg_field) \ +( \ + GCREGALIGN(~0UL >> (32 - GCREGSIZE(reg_field)), reg_field) \ +) + +#define GCSETFIELDVAL(data, reg, field, value) \ +( \ + (((unsigned int) (data)) & ~GCREGMASK(reg##_##field)) \ + | (GCREGALIGN(reg##_##field##_##value, reg##_##field) \ + & GCREGMASK(reg##_##field)) \ +) + +#define GCSETFIELD(data, reg, field, value) \ +( \ + (((unsigned int) (data)) & ~GCREGMASK(reg##_##field)) \ + | (GCREGALIGN((unsigned int) (value), reg##_##field) \ + & GCREGMASK(reg##_##field)) \ +) + +#define GCGETFIELD(data, reg, field) \ +( \ + (((unsigned int) (data)) & GCREGMASK(reg##_##field)) \ + >> GCREGSTART(reg##_##field) \ +) + +#define GCREGVALUE(reg, field, val) \ +( \ + reg##_##field##_##val \ +) + +/******************************************************************************* +** Register gcregHiClockControl +*/ + +#define GCREG_HI_CLOCK_CONTROL_Address 0x00000 +#define GCREG_HI_CLOCK_CONTROL_MSB 15 +#define GCREG_HI_CLOCK_CONTROL_LSB 0 +#define GCREG_HI_CLOCK_CONTROL_BLK 0 +#define GCREG_HI_CLOCK_CONTROL_Count 1 +#define GCREG_HI_CLOCK_CONTROL_FieldMask 0x000A17FE +#define GCREG_HI_CLOCK_CONTROL_ReadMask 0x000A17FE +#define GCREG_HI_CLOCK_CONTROL_WriteMask 0x000817FE +#define GCREG_HI_CLOCK_CONTROL_ResetValue 0x00000100 + +/* Disable 3D clock. */ +#define GCREG_HI_CLOCK_CONTROL_CLK3D_DIS 0 : 0 +#define GCREG_HI_CLOCK_CONTROL_CLK3D_DIS_End 0 +#define GCREG_HI_CLOCK_CONTROL_CLK3D_DIS_Start 0 +#define GCREG_HI_CLOCK_CONTROL_CLK3D_DIS_Type U01 + +/* Disable 2D clock. */ +#define GCREG_HI_CLOCK_CONTROL_CLK2D_DIS 1 : 1 +#define GCREG_HI_CLOCK_CONTROL_CLK2D_DIS_End 1 +#define GCREG_HI_CLOCK_CONTROL_CLK2D_DIS_Start 1 +#define GCREG_HI_CLOCK_CONTROL_CLK2D_DIS_Type U01 + +#define GCREG_HI_CLOCK_CONTROL_FSCALE_VAL 8 : 2 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_VAL_End 8 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_VAL_Start 2 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_VAL_Type U07 + +#define GCREG_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD 9 : 9 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD_End 9 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD_Start 9 +#define GCREG_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD_Type U01 + +/* Disables clock gating for rams. */ +#define GCREG_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING 10 : 10 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING_End 10 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING_Start 10 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING_Type U01 + +/* Disable debug registers. If this bit is 1, debug regs are clock gated. */ +#define GCREG_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS 11 : 11 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS_End 11 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS_Start 11 +#define GCREG_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS_Type U01 + +/* Soft resets the IP. */ +#define GCREG_HI_CLOCK_CONTROL_SOFT_RESET 12 : 12 +#define GCREG_HI_CLOCK_CONTROL_SOFT_RESET_End 12 +#define GCREG_HI_CLOCK_CONTROL_SOFT_RESET_Start 12 +#define GCREG_HI_CLOCK_CONTROL_SOFT_RESET_Type U01 + +/* 3D pipe is idle. */ +#define GCREG_HI_CLOCK_CONTROL_IDLE_3D 16 : 16 +#define GCREG_HI_CLOCK_CONTROL_IDLE_3D_End 16 +#define GCREG_HI_CLOCK_CONTROL_IDLE_3D_Start 16 +#define GCREG_HI_CLOCK_CONTROL_IDLE_3D_Type U01 + +/* 2D pipe is idle. */ +#define GCREG_HI_CLOCK_CONTROL_IDLE_2D 17 : 17 +#define GCREG_HI_CLOCK_CONTROL_IDLE_2D_End 17 +#define GCREG_HI_CLOCK_CONTROL_IDLE_2D_Start 17 +#define GCREG_HI_CLOCK_CONTROL_IDLE_2D_Type U01 + +/* VG pipe is idle. */ +#define GCREG_HI_CLOCK_CONTROL_IDLE_VG 18 : 18 +#define GCREG_HI_CLOCK_CONTROL_IDLE_VG_End 18 +#define GCREG_HI_CLOCK_CONTROL_IDLE_VG_Start 18 +#define GCREG_HI_CLOCK_CONTROL_IDLE_VG_Type U01 + +/* Isolate GPU bit */ +#define GCREG_HI_CLOCK_CONTROL_ISOLATE_GPU 19 : 19 +#define GCREG_HI_CLOCK_CONTROL_ISOLATE_GPU_End 19 +#define GCREG_HI_CLOCK_CONTROL_ISOLATE_GPU_Start 19 +#define GCREG_HI_CLOCK_CONTROL_ISOLATE_GPU_Type U01 + +union gcclockcontrol { + struct { + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_CLK3D_DIS */ + unsigned int disable3d:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_CLK2D_DIS */ + unsigned int disable2d:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_FSCALE_VAL */ + unsigned int pulsecount:7; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD */ + unsigned int pulseset:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING */ + unsigned int ramgate:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS */ + unsigned int disabledbg:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_SOFT_RESET */ + unsigned int reset:1; + + /* gcregHiClockControl: + reserved */ + unsigned int _reserved_13_15:3; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_IDLE_3D */ + unsigned int idle3d:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_IDLE_2D */ + unsigned int idle2d:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_IDLE_VG */ + unsigned int idlevg:1; + + /* gcregHiClockControl: + GCREG_HI_CLOCK_CONTROL_ISOLATE_GPU */ + unsigned int isolate:1; + + /* gcregHiClockControl: + reserved */ + unsigned int _reserved_20_31:12; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register gcregHiIdle +*/ + +#define GCREG_HI_IDLE_Address 0x00004 +#define GCREG_HI_IDLE_MSB 15 +#define GCREG_HI_IDLE_LSB 0 +#define GCREG_HI_IDLE_BLK 0 +#define GCREG_HI_IDLE_Count 1 +#define GCREG_HI_IDLE_FieldMask 0x80000007 +#define GCREG_HI_IDLE_ReadMask 0x80000007 +#define GCREG_HI_IDLE_WriteMask 0x00000000 +#define GCREG_HI_IDLE_ResetValue 0x00000007 + +/* FE is idle. */ +#define GCREG_HI_IDLE_IDLE_FE 0 : 0 +#define GCREG_HI_IDLE_IDLE_FE_End 0 +#define GCREG_HI_IDLE_IDLE_FE_Start 0 +#define GCREG_HI_IDLE_IDLE_FE_Type U01 + +/* DE is idle. */ +#define GCREG_HI_IDLE_IDLE_DE 1 : 1 +#define GCREG_HI_IDLE_IDLE_DE_End 1 +#define GCREG_HI_IDLE_IDLE_DE_Start 1 +#define GCREG_HI_IDLE_IDLE_DE_Type U01 + +/* PE is idle. */ +#define GCREG_HI_IDLE_IDLE_PE 2 : 2 +#define GCREG_HI_IDLE_IDLE_PE_End 2 +#define GCREG_HI_IDLE_IDLE_PE_Start 2 +#define GCREG_HI_IDLE_IDLE_PE_Type U01 + +/* AXI is in low power mode. */ +#define GCREG_HI_IDLE_AXI_LP 31 : 31 +#define GCREG_HI_IDLE_AXI_LP_End 31 +#define GCREG_HI_IDLE_AXI_LP_Start 31 +#define GCREG_HI_IDLE_AXI_LP_Type U01 + +union gcidle { + struct { + /* gcregHiIdle: GCREG_HI_IDLE_IDLE_FE */ + unsigned int fe:1; + + /* gcregHiIdle: GCREG_HI_IDLE_IDLE_DE */ + unsigned int de:1; + + /* gcregHiIdle: GCREG_HI_IDLE_IDLE_PE */ + unsigned int pe:1; + + /* gcregHiIdle: reserved */ + unsigned int _reserved_3_30:28; + + /* gcregHiIdle: GCREG_HI_IDLE_AXI_LP */ + unsigned int axilp:1; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register gcregAxiConfig +*/ + +#define GCREG_AXI_CONFIG_Address 0x00008 +#define GCREG_AXI_CONFIG_MSB 15 +#define GCREG_AXI_CONFIG_LSB 0 +#define GCREG_AXI_CONFIG_BLK 0 +#define GCREG_AXI_CONFIG_Count 1 +#define GCREG_AXI_CONFIG_FieldMask 0x0000FFFF +#define GCREG_AXI_CONFIG_ReadMask 0x0000FFFF +#define GCREG_AXI_CONFIG_WriteMask 0x0000FFFF +#define GCREG_AXI_CONFIG_ResetValue 0x00000000 + +#define GCREG_AXI_CONFIG_AWID 3 : 0 +#define GCREG_AXI_CONFIG_AWID_End 3 +#define GCREG_AXI_CONFIG_AWID_Start 0 +#define GCREG_AXI_CONFIG_AWID_Type U04 + +#define GCREG_AXI_CONFIG_ARID 7 : 4 +#define GCREG_AXI_CONFIG_ARID_End 7 +#define GCREG_AXI_CONFIG_ARID_Start 4 +#define GCREG_AXI_CONFIG_ARID_Type U04 + +#define GCREG_AXI_CONFIG_AWCACHE 11 : 8 +#define GCREG_AXI_CONFIG_AWCACHE_End 11 +#define GCREG_AXI_CONFIG_AWCACHE_Start 8 +#define GCREG_AXI_CONFIG_AWCACHE_Type U04 + +#define GCREG_AXI_CONFIG_ARCACHE 15 : 12 +#define GCREG_AXI_CONFIG_ARCACHE_End 15 +#define GCREG_AXI_CONFIG_ARCACHE_Start 12 +#define GCREG_AXI_CONFIG_ARCACHE_Type U04 + +/******************************************************************************* +** Register gcregAxiStatus +*/ + +#define GCREG_AXI_STATUS_Address 0x0000C +#define GCREG_AXI_STATUS_MSB 15 +#define GCREG_AXI_STATUS_LSB 0 +#define GCREG_AXI_STATUS_BLK 0 +#define GCREG_AXI_STATUS_Count 1 +#define GCREG_AXI_STATUS_FieldMask 0x000003FF +#define GCREG_AXI_STATUS_ReadMask 0x000003FF +#define GCREG_AXI_STATUS_WriteMask 0x00000000 +#define GCREG_AXI_STATUS_ResetValue 0x00000000 + +#define GCREG_AXI_STATUS_DET_RD_ERR 9 : 9 +#define GCREG_AXI_STATUS_DET_RD_ERR_End 9 +#define GCREG_AXI_STATUS_DET_RD_ERR_Start 9 +#define GCREG_AXI_STATUS_DET_RD_ERR_Type U01 + +#define GCREG_AXI_STATUS_DET_WR_ERR 8 : 8 +#define GCREG_AXI_STATUS_DET_WR_ERR_End 8 +#define GCREG_AXI_STATUS_DET_WR_ERR_Start 8 +#define GCREG_AXI_STATUS_DET_WR_ERR_Type U01 + +#define GCREG_AXI_STATUS_RD_ERR_ID 7 : 4 +#define GCREG_AXI_STATUS_RD_ERR_ID_End 7 +#define GCREG_AXI_STATUS_RD_ERR_ID_Start 4 +#define GCREG_AXI_STATUS_RD_ERR_ID_Type U04 + +#define GCREG_AXI_STATUS_WR_ERR_ID 3 : 0 +#define GCREG_AXI_STATUS_WR_ERR_ID_End 3 +#define GCREG_AXI_STATUS_WR_ERR_ID_Start 0 +#define GCREG_AXI_STATUS_WR_ERR_ID_Type U04 + +/******************************************************************************* +** Register gcregIntrAcknowledge +*/ + +/* Interrupt acknowledge register. Each bit represents a corresponding event +** being triggered. Reading from this register clears the outstanding interrupt. +*/ + +#define GCREG_INTR_ACKNOWLEDGE_Address 0x00010 +#define GCREG_INTR_ACKNOWLEDGE_MSB 15 +#define GCREG_INTR_ACKNOWLEDGE_LSB 0 +#define GCREG_INTR_ACKNOWLEDGE_BLK 0 +#define GCREG_INTR_ACKNOWLEDGE_Count 1 +#define GCREG_INTR_ACKNOWLEDGE_FieldMask 0xFFFFFFFF +#define GCREG_INTR_ACKNOWLEDGE_ReadMask 0xFFFFFFFF +#define GCREG_INTR_ACKNOWLEDGE_WriteMask 0x00000000 +#define GCREG_INTR_ACKNOWLEDGE_ResetValue 0x00000000 + +#define GCREG_INTR_ACKNOWLEDGE_INTR_VEC 31 : 0 +#define GCREG_INTR_ACKNOWLEDGE_INTR_VEC_End 31 +#define GCREG_INTR_ACKNOWLEDGE_INTR_VEC_Start 0 +#define GCREG_INTR_ACKNOWLEDGE_INTR_VEC_Type U32 + +/******************************************************************************* +** Register gcregIntrEnbl +*/ + +/* Interrupt enable register. Each bit enables a corresponding event. */ + +#define GCREG_INTR_ENBL_Address 0x00014 +#define GCREG_INTR_ENBL_MSB 15 +#define GCREG_INTR_ENBL_LSB 0 +#define GCREG_INTR_ENBL_BLK 0 +#define GCREG_INTR_ENBL_Count 1 +#define GCREG_INTR_ENBL_FieldMask 0xFFFFFFFF +#define GCREG_INTR_ENBL_ReadMask 0xFFFFFFFF +#define GCREG_INTR_ENBL_WriteMask 0xFFFFFFFF +#define GCREG_INTR_ENBL_ResetValue 0x00000000 + +#define GCREG_INTR_ENBL_INTR_ENBL_VEC 31 : 0 +#define GCREG_INTR_ENBL_INTR_ENBL_VEC_End 31 +#define GCREG_INTR_ENBL_INTR_ENBL_VEC_Start 0 +#define GCREG_INTR_ENBL_INTR_ENBL_VEC_Type U32 + +/******************************************************************************* +** Register GCFeatures +*/ + +/* Shows which features are enabled in this chip. This register has no set +** reset value. It varies with the implementation. +*/ + +#define GC_FEATURES_Address 0x0001C +#define GC_FEATURES_MSB 15 +#define GC_FEATURES_LSB 0 +#define GC_FEATURES_BLK 0 +#define GC_FEATURES_Count 1 +#define GC_FEATURES_FieldMask 0xFFFFFFFF +#define GC_FEATURES_ReadMask 0xFFFFFFFF +#define GC_FEATURES_WriteMask 0x00000000 +#define GC_FEATURES_ResetValue 0x00000000 + +/* Fast clear. */ +#define GC_FEATURES_FAST_CLEAR 0 : 0 +#define GC_FEATURES_FAST_CLEAR_End 0 +#define GC_FEATURES_FAST_CLEAR_Start 0 +#define GC_FEATURES_FAST_CLEAR_Type U01 +#define GC_FEATURES_FAST_CLEAR_NONE 0x0 +#define GC_FEATURES_FAST_CLEAR_AVAILABLE 0x1 + +/* Full-screen anti-aliasing. */ +#define GC_FEATURES_SPECIAL_ANTI_ALIASING 1 : 1 +#define GC_FEATURES_SPECIAL_ANTI_ALIASING_End 1 +#define GC_FEATURES_SPECIAL_ANTI_ALIASING_Start 1 +#define GC_FEATURES_SPECIAL_ANTI_ALIASING_Type U01 +#define GC_FEATURES_SPECIAL_ANTI_ALIASING_NONE 0x0 +#define GC_FEATURES_SPECIAL_ANTI_ALIASING_AVAILABLE 0x1 + +/* 3D pipe. */ +#define GC_FEATURES_PIPE_3D 2 : 2 +#define GC_FEATURES_PIPE_3D_End 2 +#define GC_FEATURES_PIPE_3D_Start 2 +#define GC_FEATURES_PIPE_3D_Type U01 +#define GC_FEATURES_PIPE_3D_NONE 0x0 +#define GC_FEATURES_PIPE_3D_AVAILABLE 0x1 + +/* DXT texture compression. */ +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION 3 : 3 +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION_End 3 +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION_Start 3 +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION_Type U01 +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION_NONE 0x0 +#define GC_FEATURES_DXT_TEXTURE_COMPRESSION_AVAILABLE 0x1 + +/* Debug registers. */ +#define GC_FEATURES_DEBUG_MODE 4 : 4 +#define GC_FEATURES_DEBUG_MODE_End 4 +#define GC_FEATURES_DEBUG_MODE_Start 4 +#define GC_FEATURES_DEBUG_MODE_Type U01 +#define GC_FEATURES_DEBUG_MODE_NONE 0x0 +#define GC_FEATURES_DEBUG_MODE_AVAILABLE 0x1 + +/* Depth and color compression. */ +#define GC_FEATURES_ZCOMPRESSION 5 : 5 +#define GC_FEATURES_ZCOMPRESSION_End 5 +#define GC_FEATURES_ZCOMPRESSION_Start 5 +#define GC_FEATURES_ZCOMPRESSION_Type U01 +#define GC_FEATURES_ZCOMPRESSION_NONE 0x0 +#define GC_FEATURES_ZCOMPRESSION_AVAILABLE 0x1 + +/* YUV 4:2:0 support in filter blit. */ +#define GC_FEATURES_YUV420_FILTER 6 : 6 +#define GC_FEATURES_YUV420_FILTER_End 6 +#define GC_FEATURES_YUV420_FILTER_Start 6 +#define GC_FEATURES_YUV420_FILTER_Type U01 +#define GC_FEATURES_YUV420_FILTER_NONE 0x0 +#define GC_FEATURES_YUV420_FILTER_AVAILABLE 0x1 + +/* MSAA support. */ +#define GC_FEATURES_MSAA 7 : 7 +#define GC_FEATURES_MSAA_End 7 +#define GC_FEATURES_MSAA_Start 7 +#define GC_FEATURES_MSAA_Type U01 +#define GC_FEATURES_MSAA_NONE 0x0 +#define GC_FEATURES_MSAA_AVAILABLE 0x1 + +/* Shows if there is a display controller in the IP. */ +#define GC_FEATURES_DC 8 : 8 +#define GC_FEATURES_DC_End 8 +#define GC_FEATURES_DC_Start 8 +#define GC_FEATURES_DC_Type U01 +#define GC_FEATURES_DC_NONE 0x0 +#define GC_FEATURES_DC_AVAILABLE 0x1 + +/* Shows if there is 2D engine. */ +#define GC_FEATURES_PIPE_2D 9 : 9 +#define GC_FEATURES_PIPE_2D_End 9 +#define GC_FEATURES_PIPE_2D_Start 9 +#define GC_FEATURES_PIPE_2D_Type U01 +#define GC_FEATURES_PIPE_2D_NONE 0x0 +#define GC_FEATURES_PIPE_2D_AVAILABLE 0x1 + +/* ETC1 texture compression. */ +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION 10 : 10 +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION_End 10 +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION_Start 10 +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION_Type U01 +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION_NONE 0x0 +#define GC_FEATURES_ETC1_TEXTURE_COMPRESSION_AVAILABLE 0x1 + +/* Shows if the IP has HD scaler. */ +#define GC_FEATURES_FAST_SCALER 11 : 11 +#define GC_FEATURES_FAST_SCALER_End 11 +#define GC_FEATURES_FAST_SCALER_Start 11 +#define GC_FEATURES_FAST_SCALER_Type U01 +#define GC_FEATURES_FAST_SCALER_NONE 0x0 +#define GC_FEATURES_FAST_SCALER_AVAILABLE 0x1 + +/* Shows if the IP has HDR support. */ +#define GC_FEATURES_HIGH_DYNAMIC_RANGE 12 : 12 +#define GC_FEATURES_HIGH_DYNAMIC_RANGE_End 12 +#define GC_FEATURES_HIGH_DYNAMIC_RANGE_Start 12 +#define GC_FEATURES_HIGH_DYNAMIC_RANGE_Type U01 +#define GC_FEATURES_HIGH_DYNAMIC_RANGE_NONE 0x0 +#define GC_FEATURES_HIGH_DYNAMIC_RANGE_AVAILABLE 0x1 + +/* YUV 4:2:0 tiler is available. */ +#define GC_FEATURES_YUV420_TILER 13 : 13 +#define GC_FEATURES_YUV420_TILER_End 13 +#define GC_FEATURES_YUV420_TILER_Start 13 +#define GC_FEATURES_YUV420_TILER_Type U01 +#define GC_FEATURES_YUV420_TILER_NONE 0x0 +#define GC_FEATURES_YUV420_TILER_AVAILABLE 0x1 + +/* Second level clock gating is available. */ +#define GC_FEATURES_MODULE_CG 14 : 14 +#define GC_FEATURES_MODULE_CG_End 14 +#define GC_FEATURES_MODULE_CG_Start 14 +#define GC_FEATURES_MODULE_CG_Type U01 +#define GC_FEATURES_MODULE_CG_NONE 0x0 +#define GC_FEATURES_MODULE_CG_AVAILABLE 0x1 + +/* IP is configured to have minimum area. */ +#define GC_FEATURES_MIN_AREA 15 : 15 +#define GC_FEATURES_MIN_AREA_End 15 +#define GC_FEATURES_MIN_AREA_Start 15 +#define GC_FEATURES_MIN_AREA_Type U01 +#define GC_FEATURES_MIN_AREA_NONE 0x0 +#define GC_FEATURES_MIN_AREA_AVAILABLE 0x1 + +/* IP does not have early-Z. */ +#define GC_FEATURES_NO_EZ 16 : 16 +#define GC_FEATURES_NO_EZ_End 16 +#define GC_FEATURES_NO_EZ_Start 16 +#define GC_FEATURES_NO_EZ_Type U01 +#define GC_FEATURES_NO_EZ_NONE 0x0 +#define GC_FEATURES_NO_EZ_AVAILABLE 0x1 + +/* IP does not have 422 texture input format. */ +#define GC_FEATURES_NO422_TEXTURE 17 : 17 +#define GC_FEATURES_NO422_TEXTURE_End 17 +#define GC_FEATURES_NO422_TEXTURE_Start 17 +#define GC_FEATURES_NO422_TEXTURE_Type U01 +#define GC_FEATURES_NO422_TEXTURE_NONE 0x0 +#define GC_FEATURES_NO422_TEXTURE_AVAILABLE 0x1 + +/* IP supports interleaving depth and color buffers. */ +#define GC_FEATURES_BUFFER_INTERLEAVING 18 : 18 +#define GC_FEATURES_BUFFER_INTERLEAVING_End 18 +#define GC_FEATURES_BUFFER_INTERLEAVING_Start 18 +#define GC_FEATURES_BUFFER_INTERLEAVING_Type U01 +#define GC_FEATURES_BUFFER_INTERLEAVING_NONE 0x0 +#define GC_FEATURES_BUFFER_INTERLEAVING_AVAILABLE 0x1 + +/* Supports byte write in 2D. */ +#define GC_FEATURES_BYTE_WRITE_2D 19 : 19 +#define GC_FEATURES_BYTE_WRITE_2D_End 19 +#define GC_FEATURES_BYTE_WRITE_2D_Start 19 +#define GC_FEATURES_BYTE_WRITE_2D_Type U01 +#define GC_FEATURES_BYTE_WRITE_2D_NONE 0x0 +#define GC_FEATURES_BYTE_WRITE_2D_AVAILABLE 0x1 + +/* IP does not have 2D scaler. */ +#define GC_FEATURES_NO_SCALER 20 : 20 +#define GC_FEATURES_NO_SCALER_End 20 +#define GC_FEATURES_NO_SCALER_Start 20 +#define GC_FEATURES_NO_SCALER_Type U01 +#define GC_FEATURES_NO_SCALER_NONE 0x0 +#define GC_FEATURES_NO_SCALER_AVAILABLE 0x1 + +/* YUY2 averaging support in resolve. */ +#define GC_FEATURES_YUY2_AVERAGING 21 : 21 +#define GC_FEATURES_YUY2_AVERAGING_End 21 +#define GC_FEATURES_YUY2_AVERAGING_Start 21 +#define GC_FEATURES_YUY2_AVERAGING_Type U01 +#define GC_FEATURES_YUY2_AVERAGING_NONE 0x0 +#define GC_FEATURES_YUY2_AVERAGING_AVAILABLE 0x1 + +/* PE cache is half. */ +#define GC_FEATURES_HALF_PE_CACHE 22 : 22 +#define GC_FEATURES_HALF_PE_CACHE_End 22 +#define GC_FEATURES_HALF_PE_CACHE_Start 22 +#define GC_FEATURES_HALF_PE_CACHE_Type U01 +#define GC_FEATURES_HALF_PE_CACHE_NONE 0x0 +#define GC_FEATURES_HALF_PE_CACHE_AVAILABLE 0x1 + +/* TX cache is half. */ +#define GC_FEATURES_HALF_TX_CACHE 23 : 23 +#define GC_FEATURES_HALF_TX_CACHE_End 23 +#define GC_FEATURES_HALF_TX_CACHE_Start 23 +#define GC_FEATURES_HALF_TX_CACHE_Type U01 +#define GC_FEATURES_HALF_TX_CACHE_NONE 0x0 +#define GC_FEATURES_HALF_TX_CACHE_AVAILABLE 0x1 + +/* YUY2 support in PE and YUY2 to RGB conversion in resolve. */ +#define GC_FEATURES_YUY2_RENDER_TARGET 24 : 24 +#define GC_FEATURES_YUY2_RENDER_TARGET_End 24 +#define GC_FEATURES_YUY2_RENDER_TARGET_Start 24 +#define GC_FEATURES_YUY2_RENDER_TARGET_Type U01 +#define GC_FEATURES_YUY2_RENDER_TARGET_NONE 0x0 +#define GC_FEATURES_YUY2_RENDER_TARGET_AVAILABLE 0x1 + +/* 32 bit memory address support. */ +#define GC_FEATURES_MEM32_BIT_SUPPORT 25 : 25 +#define GC_FEATURES_MEM32_BIT_SUPPORT_End 25 +#define GC_FEATURES_MEM32_BIT_SUPPORT_Start 25 +#define GC_FEATURES_MEM32_BIT_SUPPORT_Type U01 +#define GC_FEATURES_MEM32_BIT_SUPPORT_NONE 0x0 +#define GC_FEATURES_MEM32_BIT_SUPPORT_AVAILABLE 0x1 + +/* VG pipe is present. */ +#define GC_FEATURES_PIPE_VG 26 : 26 +#define GC_FEATURES_PIPE_VG_End 26 +#define GC_FEATURES_PIPE_VG_Start 26 +#define GC_FEATURES_PIPE_VG_Type U01 +#define GC_FEATURES_PIPE_VG_NONE 0x0 +#define GC_FEATURES_PIPE_VG_AVAILABLE 0x1 + +/* VG tesselator is present. */ +#define GC_FEATURES_VGTS 27 : 27 +#define GC_FEATURES_VGTS_End 27 +#define GC_FEATURES_VGTS_Start 27 +#define GC_FEATURES_VGTS_Type U01 +#define GC_FEATURES_VGTS_NONE 0x0 +#define GC_FEATURES_VGTS_AVAILABLE 0x1 + +/* FE 2.0 is present. */ +#define GC_FEATURES_FE20 28 : 28 +#define GC_FEATURES_FE20_End 28 +#define GC_FEATURES_FE20_Start 28 +#define GC_FEATURES_FE20_Type U01 +#define GC_FEATURES_FE20_NONE 0x0 +#define GC_FEATURES_FE20_AVAILABLE 0x1 + +/* 3D PE has byte write capability. */ +#define GC_FEATURES_BYTE_WRITE_3D 29 : 29 +#define GC_FEATURES_BYTE_WRITE_3D_End 29 +#define GC_FEATURES_BYTE_WRITE_3D_Start 29 +#define GC_FEATURES_BYTE_WRITE_3D_Type U01 +#define GC_FEATURES_BYTE_WRITE_3D_NONE 0x0 +#define GC_FEATURES_BYTE_WRITE_3D_AVAILABLE 0x1 + +/* Supports resolveing into YUV target. */ +#define GC_FEATURES_RS_YUV_TARGET 30 : 30 +#define GC_FEATURES_RS_YUV_TARGET_End 30 +#define GC_FEATURES_RS_YUV_TARGET_Start 30 +#define GC_FEATURES_RS_YUV_TARGET_Type U01 +#define GC_FEATURES_RS_YUV_TARGET_NONE 0x0 +#define GC_FEATURES_RS_YUV_TARGET_AVAILABLE 0x1 + +/* Supports 20 bit index. */ +#define GC_FEATURES_FE20_BIT_INDEX 31 : 31 +#define GC_FEATURES_FE20_BIT_INDEX_End 31 +#define GC_FEATURES_FE20_BIT_INDEX_Start 31 +#define GC_FEATURES_FE20_BIT_INDEX_Type U01 +#define GC_FEATURES_FE20_BIT_INDEX_NONE 0x0 +#define GC_FEATURES_FE20_BIT_INDEX_AVAILABLE 0x1 + +union gcfeatures { + struct { + /* GC_FEATURES_Address:FAST_CLEAR */ + unsigned int fastclear:1; + + /* GC_FEATURES_Address:SPECIAL_ANTI_ALIASING */ + unsigned int specialantialiasing:1; + + /* GC_FEATURES_Address:PIPE_3D */ + unsigned int pipe3d:1; + + /* GC_FEATURES_Address:DXT_TEXTURE_COMPRESSION */ + unsigned int dxt:1; + + /* GC_FEATURES_Address:DEBUG_MODE */ + unsigned int debugmode:1; + + /* GC_FEATURES_Address:ZCOMPRESSION */ + unsigned int zcompression:1; + + /* GC_FEATURES_Address:YUV420_FILTER */ + unsigned int yuv420filter:1; + + /* GC_FEATURES_Address:MSAA */ + unsigned int msaa:1; + + /* GC_FEATURES_Address:DC */ + unsigned int dc:1; + + /* GC_FEATURES_Address:PIPE_2D */ + unsigned int pipe2d:1; + + /* GC_FEATURES_Address:ETC1_TEXTURE_COMPRESSION */ + unsigned int etc:1; + + /* GC_FEATURES_Address:FAST_SCALER */ + unsigned int fastscaler:1; + + /* GC_FEATURES_Address:HIGH_DYNAMIC_RANGE */ + unsigned int hdr:1; + + /* GC_FEATURES_Address:YUV420_TILER */ + unsigned int yuv420tiler:1; + + /* GC_FEATURES_Address:MODULE_CG */ + unsigned int clockgating:1; + + /* GC_FEATURES_Address:MIN_AREA */ + unsigned int minarea:1; + + /* GC_FEATURES_Address:NO_EZ */ + unsigned int noez:1; + + /* GC_FEATURES_Address:NO422_TEXTURE */ + unsigned int no422texture:1; + + /* GC_FEATURES_Address:BUFFER_INTERLEAVING */ + unsigned int bufinterleaving:1; + + /* GC_FEATURES_Address:BYTE_WRITE_2D */ + unsigned int bytewrite2d:1; + + /* GC_FEATURES_Address:NO_SCALER */ + unsigned int noscaler:1; + + /* GC_FEATURES_Address:YUY2_AVERAGING */ + unsigned int yuy2averaging:1; + + /* GC_FEATURES_Address:HALF_PE_CACHE */ + unsigned int halfpecache:1; + + /* GC_FEATURES_Address:HALF_TX_CACHE */ + unsigned int halftxcache:1; + + /* GC_FEATURES_Address:YUY2_RENDER_TARGET */ + unsigned int yuy2target:1; + + /* GC_FEATURES_Address:MEM32_BIT_SUPPORT */ + unsigned int mem32:1; + + /* GC_FEATURES_Address:PIPE_VG */ + unsigned int pipevg:1; + + /* GC_FEATURES_Address:VGTS */ + unsigned int vgts:1; + + /* GC_FEATURES_Address:FE20 */ + unsigned int fe20:1; + + /* GC_FEATURES_Address:BYTE_WRITE_3D */ + unsigned int bytewrite3d:1; + + /* GC_FEATURES_Address:RS_YUV_TARGET */ + unsigned int rsyuvtarget:1; + + /* GC_FEATURES_Address:FE20_BIT_INDEX */ + unsigned int fe20bit:1; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register GCChipId +*/ + +/* Shows the ID for the chip in BCD. This register has no set reset value. +** It varies with the implementation. +*/ + +#define GC_CHIP_ID_Address 0x00020 +#define GC_CHIP_ID_MSB 15 +#define GC_CHIP_ID_LSB 0 +#define GC_CHIP_ID_BLK 0 +#define GC_CHIP_ID_Count 1 +#define GC_CHIP_ID_FieldMask 0xFFFFFFFF +#define GC_CHIP_ID_ReadMask 0xFFFFFFFF +#define GC_CHIP_ID_WriteMask 0x00000000 +#define GC_CHIP_ID_ResetValue 0x00000000 + +/* Id. */ +#define GC_CHIP_ID_ID 31 : 0 +#define GC_CHIP_ID_ID_End 31 +#define GC_CHIP_ID_ID_Start 0 +#define GC_CHIP_ID_ID_Type U32 + +/******************************************************************************* +** Register GCChipRev +*/ + +/* Shows the revision for the chip in BCD. This register has no set reset +** value. It varies with the implementation. +*/ + +#define GC_CHIP_REV_Address 0x00024 +#define GC_CHIP_REV_MSB 15 +#define GC_CHIP_REV_LSB 0 +#define GC_CHIP_REV_BLK 0 +#define GC_CHIP_REV_Count 1 +#define GC_CHIP_REV_FieldMask 0xFFFFFFFF +#define GC_CHIP_REV_ReadMask 0xFFFFFFFF +#define GC_CHIP_REV_WriteMask 0x00000000 +#define GC_CHIP_REV_ResetValue 0x00000000 + +/* Revision. */ +#define GC_CHIP_REV_REV 31 : 0 +#define GC_CHIP_REV_REV_End 31 +#define GC_CHIP_REV_REV_Start 0 +#define GC_CHIP_REV_REV_Type U32 + +/******************************************************************************* +** Register GCChipDate +*/ + +/* Shows the release date for the IP. This register has no set reset value. +** It varies with the implementation. +*/ + +#define GC_CHIP_DATE_Address 0x00028 +#define GC_CHIP_DATE_MSB 15 +#define GC_CHIP_DATE_LSB 0 +#define GC_CHIP_DATE_BLK 0 +#define GC_CHIP_DATE_Count 1 +#define GC_CHIP_DATE_FieldMask 0xFFFFFFFF +#define GC_CHIP_DATE_ReadMask 0xFFFFFFFF +#define GC_CHIP_DATE_WriteMask 0x00000000 +#define GC_CHIP_DATE_ResetValue 0x00000000 + +/* Date. */ +#define GC_CHIP_DATE_DATE 31 : 0 +#define GC_CHIP_DATE_DATE_End 31 +#define GC_CHIP_DATE_DATE_Start 0 +#define GC_CHIP_DATE_DATE_Type U32 + +/******************************************************************************* +** Register GCChipTime +*/ + +/* Shows the release time for the IP. This register has no set reset value. +** It varies with the implementation. +*/ + +#define GC_CHIP_TIME_Address 0x0002C +#define GC_CHIP_TIME_MSB 15 +#define GC_CHIP_TIME_LSB 0 +#define GC_CHIP_TIME_BLK 0 +#define GC_CHIP_TIME_Count 1 +#define GC_CHIP_TIME_FieldMask 0xFFFFFFFF +#define GC_CHIP_TIME_ReadMask 0xFFFFFFFF +#define GC_CHIP_TIME_WriteMask 0x00000000 +#define GC_CHIP_TIME_ResetValue 0x00000000 + +/* Time. */ +#define GC_CHIP_TIME_TIME 31 : 0 +#define GC_CHIP_TIME_TIME_End 31 +#define GC_CHIP_TIME_TIME_Start 0 +#define GC_CHIP_TIME_TIME_Type U32 + +/******************************************************************************* +** Register GCMinorFeatures0 +*/ + +/* Shows which minor features are enabled in this chip. This register has no +** set reset value. It varies with the implementation. +*/ + +#define GC_FEATURES0_Address 0x00034 +#define GC_FEATURES0_MSB 15 +#define GC_FEATURES0_LSB 0 +#define GC_FEATURES0_BLK 0 +#define GC_FEATURES0_Count 1 +#define GC_FEATURES0_FieldMask 0xFFFFFFFF +#define GC_FEATURES0_ReadMask 0xFFFFFFFF +#define GC_FEATURES0_WriteMask 0x00000000 +#define GC_FEATURES0_ResetValue 0x00000000 + +/* Y flipping capability is added to resolve. */ +#define GC_FEATURES0_FLIP_Y 0 : 0 +#define GC_FEATURES0_FLIP_Y_End 0 +#define GC_FEATURES0_FLIP_Y_Start 0 +#define GC_FEATURES0_FLIP_Y_Type U01 +#define GC_FEATURES0_FLIP_Y_NONE 0x0 +#define GC_FEATURES0_FLIP_Y_AVAILABLE 0x1 + +/* Dual Return Bus from HI to clients. */ +#define GC_FEATURES0_DUAL_RETURN_BUS 1 : 1 +#define GC_FEATURES0_DUAL_RETURN_BUS_End 1 +#define GC_FEATURES0_DUAL_RETURN_BUS_Start 1 +#define GC_FEATURES0_DUAL_RETURN_BUS_Type U01 +#define GC_FEATURES0_DUAL_RETURN_BUS_NONE 0x0 +#define GC_FEATURES0_DUAL_RETURN_BUS_AVAILABLE 0x1 + +/* Configurable endianness support. */ +#define GC_FEATURES0_ENDIANNESS_CONFIG 2 : 2 +#define GC_FEATURES0_ENDIANNESS_CONFIG_End 2 +#define GC_FEATURES0_ENDIANNESS_CONFIG_Start 2 +#define GC_FEATURES0_ENDIANNESS_CONFIG_Type U01 +#define GC_FEATURES0_ENDIANNESS_CONFIG_NONE 0x0 +#define GC_FEATURES0_ENDIANNESS_CONFIG_AVAILABLE 0x1 + +/* Supports 8Kx8K textures. */ +#define GC_FEATURES0_TEXTURE8_K 3 : 3 +#define GC_FEATURES0_TEXTURE8_K_End 3 +#define GC_FEATURES0_TEXTURE8_K_Start 3 +#define GC_FEATURES0_TEXTURE8_K_Type U01 +#define GC_FEATURES0_TEXTURE8_K_NONE 0x0 +#define GC_FEATURES0_TEXTURE8_K_AVAILABLE 0x1 + +/* Driver hack is not needed. */ +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER 4 : 4 +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER_End 4 +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER_Start 4 +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER_Type U01 +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER_NONE 0x0 +#define GC_FEATURES0_CORRECT_TEXTURE_CONVERTER_AVAILABLE 0x1 + +/* Special LOD calculation when MSAA is on. */ +#define GC_FEATURES0_SPECIAL_MSAA_LOD 5 : 5 +#define GC_FEATURES0_SPECIAL_MSAA_LOD_End 5 +#define GC_FEATURES0_SPECIAL_MSAA_LOD_Start 5 +#define GC_FEATURES0_SPECIAL_MSAA_LOD_Type U01 +#define GC_FEATURES0_SPECIAL_MSAA_LOD_NONE 0x0 +#define GC_FEATURES0_SPECIAL_MSAA_LOD_AVAILABLE 0x1 + +/* Proper flush is done in fast clear cache. */ +#define GC_FEATURES0_FAST_CLEAR_FLUSH 6 : 6 +#define GC_FEATURES0_FAST_CLEAR_FLUSH_End 6 +#define GC_FEATURES0_FAST_CLEAR_FLUSH_Start 6 +#define GC_FEATURES0_FAST_CLEAR_FLUSH_Type U01 +#define GC_FEATURES0_FAST_CLEAR_FLUSH_NONE 0x0 +#define GC_FEATURES0_FAST_CLEAR_FLUSH_AVAILABLE 0x1 + +/* 2D PE 2.0 is present. */ +#define GC_FEATURES0_2DPE20 7 : 7 +#define GC_FEATURES0_2DPE20_End 7 +#define GC_FEATURES0_2DPE20_Start 7 +#define GC_FEATURES0_2DPE20_Type U01 +#define GC_FEATURES0_2DPE20_NONE 0x0 +#define GC_FEATURES0_2DPE20_AVAILABLE 0x1 + +/* Reserved. */ +#define GC_FEATURES0_CORRECT_AUTO_DISABLE 8 : 8 +#define GC_FEATURES0_CORRECT_AUTO_DISABLE_End 8 +#define GC_FEATURES0_CORRECT_AUTO_DISABLE_Start 8 +#define GC_FEATURES0_CORRECT_AUTO_DISABLE_Type U01 +#define GC_FEATURES0_CORRECT_AUTO_DISABLE_NONE 0x0 +#define GC_FEATURES0_CORRECT_AUTO_DISABLE_AVAILABLE 0x1 + +/* Supports 8K render target. */ +#define GC_FEATURES0_RENDER_8K 9 : 9 +#define GC_FEATURES0_RENDER_8K_End 9 +#define GC_FEATURES0_RENDER_8K_Start 9 +#define GC_FEATURES0_RENDER_8K_Type U01 +#define GC_FEATURES0_RENDER_8K_NONE 0x0 +#define GC_FEATURES0_RENDER_8K_AVAILABLE 0x1 + +/* 2 bits are used instead of 4 bits for tile status. */ +#define GC_FEATURES0_TILE_STATUS_2BITS 10 : 10 +#define GC_FEATURES0_TILE_STATUS_2BITS_End 10 +#define GC_FEATURES0_TILE_STATUS_2BITS_Start 10 +#define GC_FEATURES0_TILE_STATUS_2BITS_Type U01 +#define GC_FEATURES0_TILE_STATUS_2BITS_NONE 0x0 +#define GC_FEATURES0_TILE_STATUS_2BITS_AVAILABLE 0x1 + +/* Use 2 separate tile status buffers in interleaved mode. */ +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED 11 : 11 +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_End 11 +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_Start 11 +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_Type U01 +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_NONE 0x0 +#define GC_FEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_AVAILABLE 0x1 + +/* 32x32 super tile is available. */ +#define GC_FEATURES0_SUPER_TILED_32X32 12 : 12 +#define GC_FEATURES0_SUPER_TILED_32X32_End 12 +#define GC_FEATURES0_SUPER_TILED_32X32_Start 12 +#define GC_FEATURES0_SUPER_TILED_32X32_Type U01 +#define GC_FEATURES0_SUPER_TILED_32X32_NONE 0x0 +#define GC_FEATURES0_SUPER_TILED_32X32_AVAILABLE 0x1 + +/* Major updates to VG pipe (TS buffer tiling. State masking.). */ +#define GC_FEATURES0_VG_20 13 : 13 +#define GC_FEATURES0_VG_20_End 13 +#define GC_FEATURES0_VG_20_Start 13 +#define GC_FEATURES0_VG_20_Type U01 +#define GC_FEATURES0_VG_20_NONE 0x0 +#define GC_FEATURES0_VG_20_AVAILABLE 0x1 + +/* New commands added to the tessellator. */ +#define GC_FEATURES0_TS_EXTENDED_COMMANDS 14 : 14 +#define GC_FEATURES0_TS_EXTENDED_COMMANDS_End 14 +#define GC_FEATURES0_TS_EXTENDED_COMMANDS_Start 14 +#define GC_FEATURES0_TS_EXTENDED_COMMANDS_Type U01 +#define GC_FEATURES0_TS_EXTENDED_COMMANDS_NONE 0x0 +#define GC_FEATURES0_TS_EXTENDED_COMMANDS_AVAILABLE 0x1 + +/* If this bit is not set, the FIFO counter should be set to 50. Else, the ** +** default should remain. */ +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED 15 : 15 +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED_End 15 +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED_Start 15 +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED_Type U01 +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED_NONE 0x0 +#define GC_FEATURES0_COMPRESSION_FIFO_FIXED_AVAILABLE 0x1 + +/* Floor, ceil, and sign instructions are available. */ +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0 16 : 16 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0_End 16 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0_Start 16 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0_Type U01 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0_NONE 0x0 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS0_AVAILABLE 0x1 + +/* VG filter is available. */ +#define GC_FEATURES0_VG_FILTER 17 : 17 +#define GC_FEATURES0_VG_FILTER_End 17 +#define GC_FEATURES0_VG_FILTER_Start 17 +#define GC_FEATURES0_VG_FILTER_Type U01 +#define GC_FEATURES0_VG_FILTER_NONE 0x0 +#define GC_FEATURES0_VG_FILTER_AVAILABLE 0x1 + +/* Minor updates to VG pipe (Event generation from VG, TS, PE). Tiled image ** +** support. */ +#define GC_FEATURES0_VG_21 18 : 18 +#define GC_FEATURES0_VG_21_End 18 +#define GC_FEATURES0_VG_21_Start 18 +#define GC_FEATURES0_VG_21_Type U01 +#define GC_FEATURES0_VG_21_NONE 0x0 +#define GC_FEATURES0_VG_21_AVAILABLE 0x1 + +/* W is sent to SH from RA. */ +#define GC_FEATURES0_SHADER_GETS_W 19 : 19 +#define GC_FEATURES0_SHADER_GETS_W_End 19 +#define GC_FEATURES0_SHADER_GETS_W_Start 19 +#define GC_FEATURES0_SHADER_GETS_W_Type U01 +#define GC_FEATURES0_SHADER_GETS_W_NONE 0x0 +#define GC_FEATURES0_SHADER_GETS_W_AVAILABLE 0x1 + +/* Sqrt, sin, cos instructions are available. */ +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1 20 : 20 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1_End 20 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1_Start 20 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1_Type U01 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1_NONE 0x0 +#define GC_FEATURES0_EXTRA_SHADER_INSTRUCTIONS1_AVAILABLE 0x1 + +/* Unavailable registers will return 0. */ +#define GC_FEATURES0_DEFAULT_REG0 21 : 21 +#define GC_FEATURES0_DEFAULT_REG0_End 21 +#define GC_FEATURES0_DEFAULT_REG0_Start 21 +#define GC_FEATURES0_DEFAULT_REG0_Type U01 +#define GC_FEATURES0_DEFAULT_REG0_NONE 0x0 +#define GC_FEATURES0_DEFAULT_REG0_AVAILABLE 0x1 + +/* New style MC with separate paths for color and depth. */ +#define GC_FEATURES0_MC_20 22 : 22 +#define GC_FEATURES0_MC_20_End 22 +#define GC_FEATURES0_MC_20_Start 22 +#define GC_FEATURES0_MC_20_Type U01 +#define GC_FEATURES0_MC_20_NONE 0x0 +#define GC_FEATURES0_MC_20_AVAILABLE 0x1 + +/* Put the MSAA data into sideband fifo. */ +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND 23 : 23 +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND_End 23 +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND_Start 23 +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND_Type U01 +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND_NONE 0x0 +#define GC_FEATURES0_SHADER_MSAA_SIDEBAND_AVAILABLE 0x1 + +#define GC_FEATURES0_BUG_FIXES0 24 : 24 +#define GC_FEATURES0_BUG_FIXES0_End 24 +#define GC_FEATURES0_BUG_FIXES0_Start 24 +#define GC_FEATURES0_BUG_FIXES0_Type U01 +#define GC_FEATURES0_BUG_FIXES0_NONE 0x0 +#define GC_FEATURES0_BUG_FIXES0_AVAILABLE 0x1 + +/* VAA is available or not. */ +#define GC_FEATURES0_VAA 25 : 25 +#define GC_FEATURES0_VAA_End 25 +#define GC_FEATURES0_VAA_Start 25 +#define GC_FEATURES0_VAA_Type U01 +#define GC_FEATURES0_VAA_NONE 0x0 +#define GC_FEATURES0_VAA_AVAILABLE 0x1 + +/* Shader supports bypass mode when MSAA is enabled. */ +#define GC_FEATURES0_BYPASS_IN_MSAA 26 : 26 +#define GC_FEATURES0_BYPASS_IN_MSAA_End 26 +#define GC_FEATURES0_BYPASS_IN_MSAA_Start 26 +#define GC_FEATURES0_BYPASS_IN_MSAA_Type U01 +#define GC_FEATURES0_BYPASS_IN_MSAA_NONE 0x0 +#define GC_FEATURES0_BYPASS_IN_MSAA_AVAILABLE 0x1 + +/* Hierarchiccal Z is supported. */ +#define GC_FEATURES0_HIERARCHICAL_Z 27 : 27 +#define GC_FEATURES0_HIERARCHICAL_Z_End 27 +#define GC_FEATURES0_HIERARCHICAL_Z_Start 27 +#define GC_FEATURES0_HIERARCHICAL_Z_Type U01 +#define GC_FEATURES0_HIERARCHICAL_Z_NONE 0x0 +#define GC_FEATURES0_HIERARCHICAL_Z_AVAILABLE 0x1 + +/* New texture unit is available. */ +#define GC_FEATURES0_NEW_TEXTURE 28 : 28 +#define GC_FEATURES0_NEW_TEXTURE_End 28 +#define GC_FEATURES0_NEW_TEXTURE_Start 28 +#define GC_FEATURES0_NEW_TEXTURE_Type U01 +#define GC_FEATURES0_NEW_TEXTURE_NONE 0x0 +#define GC_FEATURES0_NEW_TEXTURE_AVAILABLE 0x1 + +/* 2D engine supports A8 target. */ +#define GC_FEATURES0_A8_TARGET_SUPPORT 29 : 29 +#define GC_FEATURES0_A8_TARGET_SUPPORT_End 29 +#define GC_FEATURES0_A8_TARGET_SUPPORT_Start 29 +#define GC_FEATURES0_A8_TARGET_SUPPORT_Type U01 +#define GC_FEATURES0_A8_TARGET_SUPPORT_NONE 0x0 +#define GC_FEATURES0_A8_TARGET_SUPPORT_AVAILABLE 0x1 + +/* Correct stencil behavior in depth only. */ +#define GC_FEATURES0_CORRECT_STENCIL 30 : 30 +#define GC_FEATURES0_CORRECT_STENCIL_End 30 +#define GC_FEATURES0_CORRECT_STENCIL_Start 30 +#define GC_FEATURES0_CORRECT_STENCIL_Type U01 +#define GC_FEATURES0_CORRECT_STENCIL_NONE 0x0 +#define GC_FEATURES0_CORRECT_STENCIL_AVAILABLE 0x1 + +/* Enhance VR and add a mode to walk 16 pixels in 16-bit mode in Vertical ** +** pass to improve $ hit rate when rotating 90/270. */ +#define GC_FEATURES0_ENHANCE_VR 31 : 31 +#define GC_FEATURES0_ENHANCE_VR_End 31 +#define GC_FEATURES0_ENHANCE_VR_Start 31 +#define GC_FEATURES0_ENHANCE_VR_Type U01 +#define GC_FEATURES0_ENHANCE_VR_NONE 0x0 +#define GC_FEATURES0_ENHANCE_VR_AVAILABLE 0x1 + +union gcfeatures0 { + struct { + /* GC_FEATURES0_Address:FLIP_Y */ + unsigned int flipy:1; + + /* GC_FEATURES0_Address:DUAL_RETURN_BUS */ + unsigned int dualreturnbus:1; + + /* GC_FEATURES0_Address:ENDIANNESS_CONFIG */ + unsigned int endianessconfig:1; + + /* GC_FEATURES0_Address:TEXTURE8_K */ + unsigned int texture8k:1; + + /* GC_FEATURES0_Address:CORRECT_TEXTURE_CONVERTER */ + unsigned int correcttextureconverter:1; + + /* GC_FEATURES0_Address:SPECIAL_MSAA_LOD */ + unsigned int specialmsaalod:1; + + /* GC_FEATURES0_Address:FAST_CLEAR_FLUSH */ + unsigned int fastclearflush:1; + + /* GC_FEATURES0_Address:2DPE20 */ + unsigned int pe2d20:1; + + /* GC_FEATURES0_Address:CORRECT_AUTO_DISABLE */ + unsigned int correctautodisable:1; + + /* GC_FEATURES0_Address:RENDER_8K */ + unsigned int render8k:1; + + /* GC_FEATURES0_Address:TILE_STATUS_2BITS */ + unsigned int tilestatus2bits:1; + + /* GC_FEATURES0_Address:SEPARATE_TILE_STATUS_WHEN_INTERLEAVED */ + unsigned int separatetilestatus:1; + + /* GC_FEATURES0_Address:SUPER_TILED_32X32 */ + unsigned int supertiled32x32:1; + + /* GC_FEATURES0_Address:VG_20 */ + unsigned int vg20:1; + + /* GC_FEATURES0_Address:TS_EXTENDED_COMMANDS */ + unsigned int tsplus:1; + + /* GC_FEATURES0_Address:COMPRESSION_FIFO_FIXED */ + unsigned int compressionfifo:1; + + /* GC_FEATURES0_Address:EXTRA_SHADER_INSTRUCTIONS0 */ + unsigned int shaderinst0:1; + + /* GC_FEATURES0_Address:VG_FILTER */ + unsigned int vgfilter:1; + + /* GC_FEATURES0_Address:VG_21 */ + unsigned int vg21:1; + + /* GC_FEATURES0_Address:SHADER_GETS_W */ + unsigned int shadergetsw:1; + + /* GC_FEATURES0_Address:EXTRA_SHADER_INSTRUCTIONS1 */ + unsigned int shaderinst1:1; + + /* GC_FEATURES0_Address:DEFAULT_REG0 */ + unsigned int defaultreg0:1; + + /* GC_FEATURES0_Address:MC_20 */ + unsigned int mc20:1; + + /* GC_FEATURES0_Address:SHADER_MSAA_SIDEBAND */ + unsigned int shadermsaasideband:1; + + /* GC_FEATURES0_Address:BUG_FIXES0 */ + unsigned int bugfixes0:1; + + /* GC_FEATURES0_Address:VAA */ + unsigned int vaa:1; + + /* GC_FEATURES0_Address:BYPASS_IN_MSAA */ + unsigned int bypassmsaa:1; + + /* GC_FEATURES0_Address:HIERARCHICAL_Z */ + unsigned int hz:1; + + /* GC_FEATURES0_Address:NEW_TEXTURE */ + unsigned int newtx:1; + + /* GC_FEATURES0_Address:A8_TARGET_SUPPORT */ + unsigned int a8target:1; + + /* GC_FEATURES0_Address:CORRECT_STENCIL */ + unsigned int correctstencil:1; + + /* GC_FEATURES0_Address:ENHANCE_VR */ + unsigned int vr20:1; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register GCMinorFeatures1 +*/ + +/* Shows which features are enabled in this chip. This register has no set +** reset value. It varies with the implementation. +*/ + +#define GC_FEATURES1_Address 0x00074 +#define GC_FEATURES1_MSB 15 +#define GC_FEATURES1_LSB 0 +#define GC_FEATURES1_BLK 0 +#define GC_FEATURES1_Count 1 +#define GC_FEATURES1_FieldMask 0xFFFFFFFF +#define GC_FEATURES1_ReadMask 0xFFFFFFFF +#define GC_FEATURES1_WriteMask 0x00000000 +#define GC_FEATURES1_ResetValue 0x00000000 + +/* Resolve UV swizzle. */ +#define GC_FEATURES1_RSUV_SWIZZLE 0 : 0 +#define GC_FEATURES1_RSUV_SWIZZLE_End 0 +#define GC_FEATURES1_RSUV_SWIZZLE_Start 0 +#define GC_FEATURES1_RSUV_SWIZZLE_Type U01 +#define GC_FEATURES1_RSUV_SWIZZLE_NONE 0x0 +#define GC_FEATURES1_RSUV_SWIZZLE_AVAILABLE 0x1 + +/* V2 compression. */ +#define GC_FEATURES1_V2_COMPRESSION 1 : 1 +#define GC_FEATURES1_V2_COMPRESSION_End 1 +#define GC_FEATURES1_V2_COMPRESSION_Start 1 +#define GC_FEATURES1_V2_COMPRESSION_Type U01 +#define GC_FEATURES1_V2_COMPRESSION_NONE 0x0 +#define GC_FEATURES1_V2_COMPRESSION_AVAILABLE 0x1 + +/* Double buffering support for VG (second TS-->VG semaphore is present). */ +#define GC_FEATURES1_VG_DOUBLE_BUFFER 2 : 2 +#define GC_FEATURES1_VG_DOUBLE_BUFFER_End 2 +#define GC_FEATURES1_VG_DOUBLE_BUFFER_Start 2 +#define GC_FEATURES1_VG_DOUBLE_BUFFER_Type U01 +#define GC_FEATURES1_VG_DOUBLE_BUFFER_NONE 0x0 +#define GC_FEATURES1_VG_DOUBLE_BUFFER_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES1 3 : 3 +#define GC_FEATURES1_BUG_FIXES1_End 3 +#define GC_FEATURES1_BUG_FIXES1_Start 3 +#define GC_FEATURES1_BUG_FIXES1_Type U01 +#define GC_FEATURES1_BUG_FIXES1_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES1_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES2 4 : 4 +#define GC_FEATURES1_BUG_FIXES2_End 4 +#define GC_FEATURES1_BUG_FIXES2_Start 4 +#define GC_FEATURES1_BUG_FIXES2_Type U01 +#define GC_FEATURES1_BUG_FIXES2_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES2_AVAILABLE 0x1 + +/* Texture has stride and memory addressing. */ +#define GC_FEATURES1_TEXTURE_STRIDE 5 : 5 +#define GC_FEATURES1_TEXTURE_STRIDE_End 5 +#define GC_FEATURES1_TEXTURE_STRIDE_Start 5 +#define GC_FEATURES1_TEXTURE_STRIDE_Type U01 +#define GC_FEATURES1_TEXTURE_STRIDE_NONE 0x0 +#define GC_FEATURES1_TEXTURE_STRIDE_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES3 6 : 6 +#define GC_FEATURES1_BUG_FIXES3_End 6 +#define GC_FEATURES1_BUG_FIXES3_Start 6 +#define GC_FEATURES1_BUG_FIXES3_Type U01 +#define GC_FEATURES1_BUG_FIXES3_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES3_AVAILABLE 0x1 + +#define GC_FEATURES1_CORRECT_AUTO_DISABLE 7 : 7 +#define GC_FEATURES1_CORRECT_AUTO_DISABLE_End 7 +#define GC_FEATURES1_CORRECT_AUTO_DISABLE_Start 7 +#define GC_FEATURES1_CORRECT_AUTO_DISABLE_Type U01 +#define GC_FEATURES1_CORRECT_AUTO_DISABLE_NONE 0x0 +#define GC_FEATURES1_CORRECT_AUTO_DISABLE_AVAILABLE 0x1 + +#define GC_FEATURES1_AUTO_RESTART_TS 8 : 8 +#define GC_FEATURES1_AUTO_RESTART_TS_End 8 +#define GC_FEATURES1_AUTO_RESTART_TS_Start 8 +#define GC_FEATURES1_AUTO_RESTART_TS_Type U01 +#define GC_FEATURES1_AUTO_RESTART_TS_NONE 0x0 +#define GC_FEATURES1_AUTO_RESTART_TS_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES4 9 : 9 +#define GC_FEATURES1_BUG_FIXES4_End 9 +#define GC_FEATURES1_BUG_FIXES4_Start 9 +#define GC_FEATURES1_BUG_FIXES4_Type U01 +#define GC_FEATURES1_BUG_FIXES4_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES4_AVAILABLE 0x1 + +#define GC_FEATURES1_L2_WINDOWING 10 : 10 +#define GC_FEATURES1_L2_WINDOWING_End 10 +#define GC_FEATURES1_L2_WINDOWING_Start 10 +#define GC_FEATURES1_L2_WINDOWING_Type U01 +#define GC_FEATURES1_L2_WINDOWING_NONE 0x0 +#define GC_FEATURES1_L2_WINDOWING_AVAILABLE 0x1 + +#define GC_FEATURES1_HALF_FLOAT_PIPE 11 : 11 +#define GC_FEATURES1_HALF_FLOAT_PIPE_End 11 +#define GC_FEATURES1_HALF_FLOAT_PIPE_Start 11 +#define GC_FEATURES1_HALF_FLOAT_PIPE_Type U01 +#define GC_FEATURES1_HALF_FLOAT_PIPE_NONE 0x0 +#define GC_FEATURES1_HALF_FLOAT_PIPE_AVAILABLE 0x1 + +#define GC_FEATURES1_PIXEL_DITHER 12 : 12 +#define GC_FEATURES1_PIXEL_DITHER_End 12 +#define GC_FEATURES1_PIXEL_DITHER_Start 12 +#define GC_FEATURES1_PIXEL_DITHER_Type U01 +#define GC_FEATURES1_PIXEL_DITHER_NONE 0x0 +#define GC_FEATURES1_PIXEL_DITHER_AVAILABLE 0x1 + +#define GC_FEATURES1_TWO_STENCIL_REFERENCE 13 : 13 +#define GC_FEATURES1_TWO_STENCIL_REFERENCE_End 13 +#define GC_FEATURES1_TWO_STENCIL_REFERENCE_Start 13 +#define GC_FEATURES1_TWO_STENCIL_REFERENCE_Type U01 +#define GC_FEATURES1_TWO_STENCIL_REFERENCE_NONE 0x0 +#define GC_FEATURES1_TWO_STENCIL_REFERENCE_AVAILABLE 0x1 + +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT 14 : 14 +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT_End 14 +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT_Start 14 +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT_Type U01 +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT_NONE 0x0 +#define GC_FEATURES1_EXTENDED_PIXEL_FORMAT_AVAILABLE 0x1 + +/* EEZ and HZ are correct. */ +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH 15 : 15 +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH_End 15 +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH_Start 15 +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH_Type U01 +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH_NONE 0x0 +#define GC_FEATURES1_CORRECT_MIN_MAX_DEPTH_AVAILABLE 0x1 + +/* Dither and filter+alpha available. */ +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D 16 : 16 +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_End 16 +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_Start 16 +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_Type U01 +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_NONE 0x0 +#define GC_FEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES5 17 : 17 +#define GC_FEATURES1_BUG_FIXES5_End 17 +#define GC_FEATURES1_BUG_FIXES5_Start 17 +#define GC_FEATURES1_BUG_FIXES5_Type U01 +#define GC_FEATURES1_BUG_FIXES5_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES5_AVAILABLE 0x1 + +#define GC_FEATURES1_NEW_2D 18 : 18 +#define GC_FEATURES1_NEW_2D_End 18 +#define GC_FEATURES1_NEW_2D_Start 18 +#define GC_FEATURES1_NEW_2D_Type U01 +#define GC_FEATURES1_NEW_2D_NONE 0x0 +#define GC_FEATURES1_NEW_2D_AVAILABLE 0x1 + +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC 19 : 19 +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC_End 19 +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC_Start 19 +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC_Type U01 +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC_NONE 0x0 +#define GC_FEATURES1_NEW_FLOATING_POINT_ARITHMETIC_AVAILABLE 0x1 + +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT 20 : 20 +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_End 20 +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_Start 20 +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_Type U01 +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_NONE 0x0 +#define GC_FEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_AVAILABLE 0x1 + +#define GC_FEATURES1_NON_POWER_OF_TWO 21 : 21 +#define GC_FEATURES1_NON_POWER_OF_TWO_End 21 +#define GC_FEATURES1_NON_POWER_OF_TWO_Start 21 +#define GC_FEATURES1_NON_POWER_OF_TWO_Type U01 +#define GC_FEATURES1_NON_POWER_OF_TWO_NONE 0x0 +#define GC_FEATURES1_NON_POWER_OF_TWO_AVAILABLE 0x1 + +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT 22 : 22 +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT_End 22 +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT_Start 22 +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT_Type U01 +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT_NONE 0x0 +#define GC_FEATURES1_LINEAR_TEXTURE_SUPPORT_AVAILABLE 0x1 + +#define GC_FEATURES1_HALTI0 23 : 23 +#define GC_FEATURES1_HALTI0_End 23 +#define GC_FEATURES1_HALTI0_Start 23 +#define GC_FEATURES1_HALTI0_Type U01 +#define GC_FEATURES1_HALTI0_NONE 0x0 +#define GC_FEATURES1_HALTI0_AVAILABLE 0x1 + +#define GC_FEATURES1_CORRECT_OVERFLOW_VG 24 : 24 +#define GC_FEATURES1_CORRECT_OVERFLOW_VG_End 24 +#define GC_FEATURES1_CORRECT_OVERFLOW_VG_Start 24 +#define GC_FEATURES1_CORRECT_OVERFLOW_VG_Type U01 +#define GC_FEATURES1_CORRECT_OVERFLOW_VG_NONE 0x0 +#define GC_FEATURES1_CORRECT_OVERFLOW_VG_AVAILABLE 0x1 + +#define GC_FEATURES1_NEGATIVE_LOG_FIX 25 : 25 +#define GC_FEATURES1_NEGATIVE_LOG_FIX_End 25 +#define GC_FEATURES1_NEGATIVE_LOG_FIX_Start 25 +#define GC_FEATURES1_NEGATIVE_LOG_FIX_Type U01 +#define GC_FEATURES1_NEGATIVE_LOG_FIX_NONE 0x0 +#define GC_FEATURES1_NEGATIVE_LOG_FIX_AVAILABLE 0x1 + +#define GC_FEATURES1_RESOLVE_OFFSET 26 : 26 +#define GC_FEATURES1_RESOLVE_OFFSET_End 26 +#define GC_FEATURES1_RESOLVE_OFFSET_Start 26 +#define GC_FEATURES1_RESOLVE_OFFSET_Type U01 +#define GC_FEATURES1_RESOLVE_OFFSET_NONE 0x0 +#define GC_FEATURES1_RESOLVE_OFFSET_AVAILABLE 0x1 + +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK 27 : 27 +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK_End 27 +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK_Start 27 +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK_Type U01 +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK_NONE 0x0 +#define GC_FEATURES1_OK_TO_GATE_AXI_CLOCK_AVAILABLE 0x1 + +#define GC_FEATURES1_MMU 28 : 28 +#define GC_FEATURES1_MMU_End 28 +#define GC_FEATURES1_MMU_Start 28 +#define GC_FEATURES1_MMU_Type U01 +#define GC_FEATURES1_MMU_NONE 0x0 +#define GC_FEATURES1_MMU_AVAILABLE 0x1 + +#define GC_FEATURES1_WIDE_LINE 29 : 29 +#define GC_FEATURES1_WIDE_LINE_End 29 +#define GC_FEATURES1_WIDE_LINE_Start 29 +#define GC_FEATURES1_WIDE_LINE_Type U01 +#define GC_FEATURES1_WIDE_LINE_NONE 0x0 +#define GC_FEATURES1_WIDE_LINE_AVAILABLE 0x1 + +#define GC_FEATURES1_BUG_FIXES6 30 : 30 +#define GC_FEATURES1_BUG_FIXES6_End 30 +#define GC_FEATURES1_BUG_FIXES6_Start 30 +#define GC_FEATURES1_BUG_FIXES6_Type U01 +#define GC_FEATURES1_BUG_FIXES6_NONE 0x0 +#define GC_FEATURES1_BUG_FIXES6_AVAILABLE 0x1 + +#define GC_FEATURES1_FC_FLUSH_STALL 31 : 31 +#define GC_FEATURES1_FC_FLUSH_STALL_End 31 +#define GC_FEATURES1_FC_FLUSH_STALL_Start 31 +#define GC_FEATURES1_FC_FLUSH_STALL_Type U01 +#define GC_FEATURES1_FC_FLUSH_STALL_NONE 0x0 +#define GC_FEATURES1_FC_FLUSH_STALL_AVAILABLE 0x1 + +union gcfeatures1 { + struct { + /* GC_FEATURES1_Address:RSUV_SWIZZLE */ + unsigned int rsuvswizzle:1; + + /* GC_FEATURES1_Address:V2_COMPRESSION */ + unsigned int v2compression:1; + + /* GC_FEATURES1_Address:VG_DOUBLE_BUFFER */ + unsigned int vgdblbuffer:1; + + /* GC_FEATURES1_Address:BUG_FIXES1 */ + unsigned int bugfixes1:1; + + /* GC_FEATURES1_Address:BUG_FIXES2 */ + unsigned int bugfixes2:1; + + /* GC_FEATURES1_Address:TEXTURE_STRIDE */ + unsigned int txstride:1; + + /* GC_FEATURES1_Address:BUG_FIXES3 */ + unsigned int bugfixes3:1; + + /* GC_FEATURES1_Address:CORRECT_AUTO_DISABLE */ + unsigned int correctautodisable:1; + + /* GC_FEATURES1_Address:AUTO_RESTART_TS */ + unsigned int autorestartts:1; + + /* GC_FEATURES1_Address:BUG_FIXES4 */ + unsigned int bugfixes4:1; + + /* GC_FEATURES1_Address:L2_WINDOWING */ + unsigned int l2win:1; + + /* GC_FEATURES1_Address:HALF_FLOAT_PIPE */ + unsigned int halffloatpipe:1; + + /* GC_FEATURES1_Address:PIXEL_DITHER */ + unsigned int pixeldither:1; + + /* GC_FEATURES1_Address:TWO_STENCIL_REFERENCE */ + unsigned int twostencilref:1; + + /* GC_FEATURES1_Address:EXTENDED_PIXEL_FORMAT */ + unsigned int pixformatex:1; + + /* GC_FEATURES1_Address:CORRECT_MIN_MAX_DEPTH */ + unsigned int correctminmaxdepth:1; + + /* GC_FEATURES1_Address:DITHER_AND_FILTER_PLUS_ALPHA_2D */ + unsigned int ditherfilter:1; + + /* GC_FEATURES1_Address:BUG_FIXES5 */ + unsigned int bugfixes5:1; + + /* GC_FEATURES1_Address:NEW_2D */ + unsigned int new2d:1; + + /* GC_FEATURES1_Address:NEW_FLOATING_POINT_ARITHMETIC */ + unsigned int newfp:1; + + /* GC_FEATURES1_Address:TEXTURE_HORIZONTAL_ALIGNMENT_SELECT */ + unsigned int txalign:1; + + /* GC_FEATURES1_Address:NON_POWER_OF_TWO */ + unsigned int nonpowof2:1; + + /* GC_FEATURES1_Address:LINEAR_TEXTURE_SUPPORT */ + unsigned int lineartx:1; + + /* GC_FEATURES1_Address:HALTI0 */ + unsigned int halti0:1; + + /* GC_FEATURES1_Address:CORRECT_OVERFLOW_VG */ + unsigned int correctoverflowvg:1; + + /* GC_FEATURES1_Address:NEGATIVE_LOG_FIX */ + unsigned int neglogfix:1; + + /* GC_FEATURES1_Address:RESOLVE_OFFSET */ + unsigned int rsoffset:1; + + /* GC_FEATURES1_Address:OK_TO_GATE_AXI_CLOCK */ + unsigned int axiclockgating:1; + + /* GC_FEATURES1_Address:MMU */ + unsigned int mmu:1; + + /* GC_FEATURES1_Address:WIDE_LINE */ + unsigned int wideline:1; + + /* GC_FEATURES1_Address:BUG_FIXES6 */ + unsigned int bugfixes6:1; + + /* GC_FEATURES1_Address:FC_FLUSH_STALL */ + unsigned int fcflushstall:1; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register GCMinorFeatures2 +*/ + +/* Shows which features are enabled in this chip. This register has no set ** +** reset value. It varies with the implementation. */ + +#define GC_FEATURES2_Address 0x00084 +#define GC_FEATURES2_MSB 15 +#define GC_FEATURES2_LSB 0 +#define GC_FEATURES2_BLK 0 +#define GC_FEATURES2_Count 1 +#define GC_FEATURES2_FieldMask 0xFFFFFFFF +#define GC_FEATURES2_ReadMask 0xFFFFFFFF +#define GC_FEATURES2_WriteMask 0x00000000 +#define GC_FEATURES2_ResetValue 0x00000000 + +#define GC_FEATURES2_LINE_LOOP 0 : 0 +#define GC_FEATURES2_LINE_LOOP_End 0 +#define GC_FEATURES2_LINE_LOOP_Start 0 +#define GC_FEATURES2_LINE_LOOP_Type U01 +#define GC_FEATURES2_LINE_LOOP_NONE 0x0 +#define GC_FEATURES2_LINE_LOOP_AVAILABLE 0x1 + +#define GC_FEATURES2_LOGIC_OP 1 : 1 +#define GC_FEATURES2_LOGIC_OP_End 1 +#define GC_FEATURES2_LOGIC_OP_Start 1 +#define GC_FEATURES2_LOGIC_OP_Type U01 +#define GC_FEATURES2_LOGIC_OP_NONE 0x0 +#define GC_FEATURES2_LOGIC_OP_AVAILABLE 0x1 + +#define GC_FEATURES2_SEAMLESS_CUBE_MAP 2 : 2 +#define GC_FEATURES2_SEAMLESS_CUBE_MAP_End 2 +#define GC_FEATURES2_SEAMLESS_CUBE_MAP_Start 2 +#define GC_FEATURES2_SEAMLESS_CUBE_MAP_Type U01 +#define GC_FEATURES2_SEAMLESS_CUBE_MAP_NONE 0x0 +#define GC_FEATURES2_SEAMLESS_CUBE_MAP_AVAILABLE 0x1 + +#define GC_FEATURES2_SUPER_TILED_TEXTURE 3 : 3 +#define GC_FEATURES2_SUPER_TILED_TEXTURE_End 3 +#define GC_FEATURES2_SUPER_TILED_TEXTURE_Start 3 +#define GC_FEATURES2_SUPER_TILED_TEXTURE_Type U01 +#define GC_FEATURES2_SUPER_TILED_TEXTURE_NONE 0x0 +#define GC_FEATURES2_SUPER_TILED_TEXTURE_AVAILABLE 0x1 + +#define GC_FEATURES2_LINEAR_PE 4 : 4 +#define GC_FEATURES2_LINEAR_PE_End 4 +#define GC_FEATURES2_LINEAR_PE_Start 4 +#define GC_FEATURES2_LINEAR_PE_Type U01 +#define GC_FEATURES2_LINEAR_PE_NONE 0x0 +#define GC_FEATURES2_LINEAR_PE_AVAILABLE 0x1 + +#define GC_FEATURES2_RECT_PRIMITIVE 5 : 5 +#define GC_FEATURES2_RECT_PRIMITIVE_End 5 +#define GC_FEATURES2_RECT_PRIMITIVE_Start 5 +#define GC_FEATURES2_RECT_PRIMITIVE_Type U01 +#define GC_FEATURES2_RECT_PRIMITIVE_NONE 0x0 +#define GC_FEATURES2_RECT_PRIMITIVE_AVAILABLE 0x1 + +#define GC_FEATURES2_COMPOSITION 6 : 6 +#define GC_FEATURES2_COMPOSITION_End 6 +#define GC_FEATURES2_COMPOSITION_Start 6 +#define GC_FEATURES2_COMPOSITION_Type U01 +#define GC_FEATURES2_COMPOSITION_NONE 0x0 +#define GC_FEATURES2_COMPOSITION_AVAILABLE 0x1 + +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH 7 : 7 +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_End 7 +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_Start 7 +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_Type U01 +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_NONE 0x0 +#define GC_FEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_AVAILABLE 0x1 + +#define GC_FEATURES2_PE_SWIZZLE 8 : 8 +#define GC_FEATURES2_PE_SWIZZLE_End 8 +#define GC_FEATURES2_PE_SWIZZLE_Start 8 +#define GC_FEATURES2_PE_SWIZZLE_Type U01 +#define GC_FEATURES2_PE_SWIZZLE_NONE 0x0 +#define GC_FEATURES2_PE_SWIZZLE_AVAILABLE 0x1 + +#define GC_FEATURES2_END_EVENT 9 : 9 +#define GC_FEATURES2_END_EVENT_End 9 +#define GC_FEATURES2_END_EVENT_Start 9 +#define GC_FEATURES2_END_EVENT_Type U01 +#define GC_FEATURES2_END_EVENT_NONE 0x0 +#define GC_FEATURES2_END_EVENT_AVAILABLE 0x1 + +#define GC_FEATURES2_S1S8 10 : 10 +#define GC_FEATURES2_S1S8_End 10 +#define GC_FEATURES2_S1S8_Start 10 +#define GC_FEATURES2_S1S8_Type U01 +#define GC_FEATURES2_S1S8_NONE 0x0 +#define GC_FEATURES2_S1S8_AVAILABLE 0x1 + +#define GC_FEATURES2_HALTI1 11 : 11 +#define GC_FEATURES2_HALTI1_End 11 +#define GC_FEATURES2_HALTI1_Start 11 +#define GC_FEATURES2_HALTI1_Type U01 +#define GC_FEATURES2_HALTI1_NONE 0x0 +#define GC_FEATURES2_HALTI1_AVAILABLE 0x1 + +#define GC_FEATURES2_RGB888 12 : 12 +#define GC_FEATURES2_RGB888_End 12 +#define GC_FEATURES2_RGB888_Start 12 +#define GC_FEATURES2_RGB888_Type U01 +#define GC_FEATURES2_RGB888_NONE 0x0 +#define GC_FEATURES2_RGB888_AVAILABLE 0x1 + +#define GC_FEATURES2_TX__YUV_ASSEMBLER 13 : 13 +#define GC_FEATURES2_TX__YUV_ASSEMBLER_End 13 +#define GC_FEATURES2_TX__YUV_ASSEMBLER_Start 13 +#define GC_FEATURES2_TX__YUV_ASSEMBLER_Type U01 +#define GC_FEATURES2_TX__YUV_ASSEMBLER_NONE 0x0 +#define GC_FEATURES2_TX__YUV_ASSEMBLER_AVAILABLE 0x1 + +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING 14 : 14 +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING_End 14 +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING_Start 14 +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING_Type U01 +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING_NONE 0x0 +#define GC_FEATURES2_DYNAMIC_FREQUENCY_SCALING_AVAILABLE 0x1 + +#define GC_FEATURES2_TX_FILTER 15 : 15 +#define GC_FEATURES2_TX_FILTER_End 15 +#define GC_FEATURES2_TX_FILTER_Start 15 +#define GC_FEATURES2_TX_FILTER_Type U01 +#define GC_FEATURES2_TX_FILTER_NONE 0x0 +#define GC_FEATURES2_TX_FILTER_AVAILABLE 0x1 + +#define GC_FEATURES2_FULL_DIRECT_FB 16 : 16 +#define GC_FEATURES2_FULL_DIRECT_FB_End 16 +#define GC_FEATURES2_FULL_DIRECT_FB_Start 16 +#define GC_FEATURES2_FULL_DIRECT_FB_Type U01 +#define GC_FEATURES2_FULL_DIRECT_FB_NONE 0x0 +#define GC_FEATURES2_FULL_DIRECT_FB_AVAILABLE 0x1 + +#define GC_FEATURES2_ONE_PASS_2D_FILTER 17 : 17 +#define GC_FEATURES2_ONE_PASS_2D_FILTER_End 17 +#define GC_FEATURES2_ONE_PASS_2D_FILTER_Start 17 +#define GC_FEATURES2_ONE_PASS_2D_FILTER_Type U01 +#define GC_FEATURES2_ONE_PASS_2D_FILTER_NONE 0x0 +#define GC_FEATURES2_ONE_PASS_2D_FILTER_AVAILABLE 0x1 + +#define GC_FEATURES2_THREAD_WALKER_IN_PS 18 : 18 +#define GC_FEATURES2_THREAD_WALKER_IN_PS_End 18 +#define GC_FEATURES2_THREAD_WALKER_IN_PS_Start 18 +#define GC_FEATURES2_THREAD_WALKER_IN_PS_Type U01 +#define GC_FEATURES2_THREAD_WALKER_IN_PS_NONE 0x0 +#define GC_FEATURES2_THREAD_WALKER_IN_PS_AVAILABLE 0x1 + +#define GC_FEATURES2_TILE_FILLER 19 : 19 +#define GC_FEATURES2_TILE_FILLER_End 19 +#define GC_FEATURES2_TILE_FILLER_Start 19 +#define GC_FEATURES2_TILE_FILLER_Type U01 +#define GC_FEATURES2_TILE_FILLER_NONE 0x0 +#define GC_FEATURES2_TILE_FILLER_AVAILABLE 0x1 + +#define GC_FEATURES2_YUV_STANDARD 20 : 20 +#define GC_FEATURES2_YUV_STANDARD_End 20 +#define GC_FEATURES2_YUV_STANDARD_Start 20 +#define GC_FEATURES2_YUV_STANDARD_Type U01 +#define GC_FEATURES2_YUV_STANDARD_NONE 0x0 +#define GC_FEATURES2_YUV_STANDARD_AVAILABLE 0x1 + +#define GC_FEATURES2_MULTI_SOURCE_BLT 21 : 21 +#define GC_FEATURES2_MULTI_SOURCE_BLT_End 21 +#define GC_FEATURES2_MULTI_SOURCE_BLT_Start 21 +#define GC_FEATURES2_MULTI_SOURCE_BLT_Type U01 +#define GC_FEATURES2_MULTI_SOURCE_BLT_NONE 0x0 +#define GC_FEATURES2_MULTI_SOURCE_BLT_AVAILABLE 0x1 + +#define GC_FEATURES2_YUV_CONVERSION 22 : 22 +#define GC_FEATURES2_YUV_CONVERSION_End 22 +#define GC_FEATURES2_YUV_CONVERSION_Start 22 +#define GC_FEATURES2_YUV_CONVERSION_Type U01 +#define GC_FEATURES2_YUV_CONVERSION_NONE 0x0 +#define GC_FEATURES2_YUV_CONVERSION_AVAILABLE 0x1 + +#define GC_FEATURES2_FLUSH_FIXED_2D 23 : 23 +#define GC_FEATURES2_FLUSH_FIXED_2D_End 23 +#define GC_FEATURES2_FLUSH_FIXED_2D_Start 23 +#define GC_FEATURES2_FLUSH_FIXED_2D_Type U01 +#define GC_FEATURES2_FLUSH_FIXED_2D_NONE 0x0 +#define GC_FEATURES2_FLUSH_FIXED_2D_AVAILABLE 0x1 + +#define GC_FEATURES2_INTERLEAVER 24 : 24 +#define GC_FEATURES2_INTERLEAVER_End 24 +#define GC_FEATURES2_INTERLEAVER_Start 24 +#define GC_FEATURES2_INTERLEAVER_Type U01 +#define GC_FEATURES2_INTERLEAVER_NONE 0x0 +#define GC_FEATURES2_INTERLEAVER_AVAILABLE 0x1 + +#define GC_FEATURES2_MIXED_STREAMS 25 : 25 +#define GC_FEATURES2_MIXED_STREAMS_End 25 +#define GC_FEATURES2_MIXED_STREAMS_Start 25 +#define GC_FEATURES2_MIXED_STREAMS_Type U01 +#define GC_FEATURES2_MIXED_STREAMS_NONE 0x0 +#define GC_FEATURES2_MIXED_STREAMS_AVAILABLE 0x1 + +#define GC_FEATURES2_L2_CACHE_FOR_2D_420 26 : 26 +#define GC_FEATURES2_L2_CACHE_FOR_2D_420_End 26 +#define GC_FEATURES2_L2_CACHE_FOR_2D_420_Start 26 +#define GC_FEATURES2_L2_CACHE_FOR_2D_420_Type U01 +#define GC_FEATURES2_L2_CACHE_FOR_2D_420_NONE 0x0 +#define GC_FEATURES2_L2_CACHE_FOR_2D_420_AVAILABLE 0x1 + +#define GC_FEATURES2_BUG_FIXES7 27 : 27 +#define GC_FEATURES2_BUG_FIXES7_End 27 +#define GC_FEATURES2_BUG_FIXES7_Start 27 +#define GC_FEATURES2_BUG_FIXES7_Type U01 +#define GC_FEATURES2_BUG_FIXES7_NONE 0x0 +#define GC_FEATURES2_BUG_FIXES7_AVAILABLE 0x1 + +#define GC_FEATURES2_NO_INDEX_PATTERN 28 : 28 +#define GC_FEATURES2_NO_INDEX_PATTERN_End 28 +#define GC_FEATURES2_NO_INDEX_PATTERN_Start 28 +#define GC_FEATURES2_NO_INDEX_PATTERN_Type U01 +#define GC_FEATURES2_NO_INDEX_PATTERN_NONE 0x0 +#define GC_FEATURES2_NO_INDEX_PATTERN_AVAILABLE 0x1 + +#define GC_FEATURES2_TEXTURE_TILE_STATUS 29 : 29 +#define GC_FEATURES2_TEXTURE_TILE_STATUS_End 29 +#define GC_FEATURES2_TEXTURE_TILE_STATUS_Start 29 +#define GC_FEATURES2_TEXTURE_TILE_STATUS_Type U01 +#define GC_FEATURES2_TEXTURE_TILE_STATUS_NONE 0x0 +#define GC_FEATURES2_TEXTURE_TILE_STATUS_AVAILABLE 0x1 + +#define GC_FEATURES2_DECOMPRESS_Z16 30 : 30 +#define GC_FEATURES2_DECOMPRESS_Z16_End 30 +#define GC_FEATURES2_DECOMPRESS_Z16_Start 30 +#define GC_FEATURES2_DECOMPRESS_Z16_Type U01 +#define GC_FEATURES2_DECOMPRESS_Z16_NONE 0x0 +#define GC_FEATURES2_DECOMPRESS_Z16_AVAILABLE 0x1 + +#define GC_FEATURES2_BUG_FIXES8 31 : 31 +#define GC_FEATURES2_BUG_FIXES8_End 31 +#define GC_FEATURES2_BUG_FIXES8_Start 31 +#define GC_FEATURES2_BUG_FIXES8_Type U01 +#define GC_FEATURES2_BUG_FIXES8_NONE 0x0 +#define GC_FEATURES2_BUG_FIXES8_AVAILABLE 0x1 + +union gcfeatures2 { + struct { + /* GC_FEATURES2_Address:LINE_LOOP */ + unsigned int lineloop:1; + + /* GC_FEATURES2_Address:LOGIC_OP */ + unsigned int logop:1; + + /* GC_FEATURES2_Address:SEAMLESS_CUBE_MAP */ + unsigned int cubemap:1; + + /* GC_FEATURES2_Address:SUPER_TILED_TEXTURE */ + unsigned int supertiledtx:1; + + /* GC_FEATURES2_Address:LINEAR_PE */ + unsigned int linearpe:1; + + /* GC_FEATURES2_Address:RECT_PRIMITIVE */ + unsigned int rectprim:1; + + /* GC_FEATURES2_Address:COMPOSITION */ + unsigned int composition:1; + + /* GC_FEATURES2_Address:CORRECT_AUTO_DISABLE_COUNT_WIDTH */ + unsigned int correctcountwidth:1; + + /* GC_FEATURES2_Address:PE_SWIZZLE */ + unsigned int peswizzle:1; + + /* GC_FEATURES2_Address:END_EVENT */ + unsigned int endevent:1; + + /* GC_FEATURES2_Address:S1S8 */ + unsigned int s1s8:1; + + /* GC_FEATURES2_Address:HALTI1 */ + unsigned int halti1:1; + + /* GC_FEATURES2_Address:RGB888 */ + unsigned int rgb888:1; + + /* GC_FEATURES2_Address:TX__YUV_ASSEMBLER */ + unsigned int txyuvasm:1; + + /* GC_FEATURES2_Address:DYNAMIC_FREQUENCY_SCALING */ + unsigned int dynscaling:1; + + /* GC_FEATURES2_Address:TX_FILTER */ + unsigned int txfilter:1; + + /* GC_FEATURES2_Address:FULL_DIRECT_FB */ + unsigned int dfb:1; + + /* GC_FEATURES2_Address:ONE_PASS_2D_FILTER */ + unsigned int onepassfilter:1; + + /* GC_FEATURES2_Address:THREAD_WALKER_IN_PS */ + unsigned int pstw:1; + + /* GC_FEATURES2_Address:TILE_FILLER */ + unsigned int tilefiller:1; + + /* GC_FEATURES2_Address:YUV_STANDARD */ + unsigned int yuvstd:1; + + /* GC_FEATURES2_Address:MULTI_SOURCE_BLT */ + unsigned int multisrc:1; + + /* GC_FEATURES2_Address:YUV_CONVERSION */ + unsigned int yuvconvert:1; + + /* GC_FEATURES2_Address:FLUSH_FIXED_2D */ + unsigned int flushfixed2d:1; + + /* GC_FEATURES2_Address:INTERLEAVER */ + unsigned int interleaver:1; + + /* GC_FEATURES2_Address:MIXED_STREAMS */ + unsigned int mixedstreams:1; + + /* GC_FEATURES2_Address:L2_CACHE_FOR_2D_420 */ + unsigned int l2cachefor420:1; + + /* GC_FEATURES2_Address:BUG_FIXES7 */ + unsigned int bugfixes7:1; + + /* GC_FEATURES2_Address:NO_INDEX_PATTERN */ + unsigned int noindexpatern:1; + + /* GC_FEATURES2_Address:TEXTURE_TILE_STATUS */ + unsigned int tilestatustx:1; + + /* GC_FEATURES2_Address:DECOMPRESS_Z16 */ + unsigned int decompressz16:1; + + /* GC_FEATURES2_Address:BUG_FIXES8 */ + unsigned int bugfixes8:1; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register GCMinorFeatures3 +*/ + +/* Shows which features are enabled in this chip. This register has no set ** +** reset value, it varies with the implementation. */ + +#define GC_FEATURES3_Address 0x00088 +#define GC_FEATURES3_MSB 15 +#define GC_FEATURES3_LSB 0 +#define GC_FEATURES3_BLK 0 +#define GC_FEATURES3_Count 1 +#define GC_FEATURES3_FieldMask 0x003FFFFF +#define GC_FEATURES3_ReadMask 0x003FFFFF +#define GC_FEATURES3_WriteMask 0x00000000 +#define GC_FEATURES3_ResetValue 0x00000000 + +#define GC_FEATURES3_DE_ROTATION_STALL_FIX 0 : 0 +#define GC_FEATURES3_DE_ROTATION_STALL_FIX_End 0 +#define GC_FEATURES3_DE_ROTATION_STALL_FIX_Start 0 +#define GC_FEATURES3_DE_ROTATION_STALL_FIX_Type U01 +#define GC_FEATURES3_DE_ROTATION_STALL_FIX_NONE 0x0 +#define GC_FEATURES3_DE_ROTATION_STALL_FIX_AVAILABLE 0x1 + +#define GC_FEATURES3_OCL_ONLY 1 : 1 +#define GC_FEATURES3_OCL_ONLY_End 1 +#define GC_FEATURES3_OCL_ONLY_Start 1 +#define GC_FEATURES3_OCL_ONLY_Type U01 +#define GC_FEATURES3_OCL_ONLY_NONE 0x0 +#define GC_FEATURES3_OCL_ONLY_AVAILABLE 0x1 + +#define GC_FEATURES3_NEW_FEATURES0 2 : 2 +#define GC_FEATURES3_NEW_FEATURES0_End 2 +#define GC_FEATURES3_NEW_FEATURES0_Start 2 +#define GC_FEATURES3_NEW_FEATURES0_Type U01 +#define GC_FEATURES3_NEW_FEATURES0_NONE 0x0 +#define GC_FEATURES3_NEW_FEATURES0_AVAILABLE 0x1 + +#define GC_FEATURES3_INSTRUCTION_CACHE 3 : 3 +#define GC_FEATURES3_INSTRUCTION_CACHE_End 3 +#define GC_FEATURES3_INSTRUCTION_CACHE_Start 3 +#define GC_FEATURES3_INSTRUCTION_CACHE_Type U01 +#define GC_FEATURES3_INSTRUCTION_CACHE_NONE 0x0 +#define GC_FEATURES3_INSTRUCTION_CACHE_AVAILABLE 0x1 + +#define GC_FEATURES3_GEOMETRY_SHADER 4 : 4 +#define GC_FEATURES3_GEOMETRY_SHADER_End 4 +#define GC_FEATURES3_GEOMETRY_SHADER_Start 4 +#define GC_FEATURES3_GEOMETRY_SHADER_Type U01 +#define GC_FEATURES3_GEOMETRY_SHADER_NONE 0x0 +#define GC_FEATURES3_GEOMETRY_SHADER_AVAILABLE 0x1 + +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED 5 : 5 +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED_End 5 +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED_Start 5 +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED_Type U01 +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED_NONE 0x0 +#define GC_FEATURES3_TEX_COMPRESSION_SUPERTILED_AVAILABLE 0x1 + +#define GC_FEATURES3_GENERICS 6 : 6 +#define GC_FEATURES3_GENERICS_End 6 +#define GC_FEATURES3_GENERICS_Start 6 +#define GC_FEATURES3_GENERICS_Type U01 +#define GC_FEATURES3_GENERICS_NONE 0x0 +#define GC_FEATURES3_GENERICS_AVAILABLE 0x1 + +#define GC_FEATURES3_BUG_FIXES9 7 : 7 +#define GC_FEATURES3_BUG_FIXES9_End 7 +#define GC_FEATURES3_BUG_FIXES9_Start 7 +#define GC_FEATURES3_BUG_FIXES9_Type U01 +#define GC_FEATURES3_BUG_FIXES9_NONE 0x0 +#define GC_FEATURES3_BUG_FIXES9_AVAILABLE 0x1 + +#define GC_FEATURES3_FAST_MSAA 8 : 8 +#define GC_FEATURES3_FAST_MSAA_End 8 +#define GC_FEATURES3_FAST_MSAA_Start 8 +#define GC_FEATURES3_FAST_MSAA_Type U01 +#define GC_FEATURES3_FAST_MSAA_NONE 0x0 +#define GC_FEATURES3_FAST_MSAA_AVAILABLE 0x1 + +#define GC_FEATURES3_WCLIP 9 : 9 +#define GC_FEATURES3_WCLIP_End 9 +#define GC_FEATURES3_WCLIP_Start 9 +#define GC_FEATURES3_WCLIP_Type U01 +#define GC_FEATURES3_WCLIP_NONE 0x0 +#define GC_FEATURES3_WCLIP_AVAILABLE 0x1 + +#define GC_FEATURES3_BUG_FIXES10 10 : 10 +#define GC_FEATURES3_BUG_FIXES10_End 10 +#define GC_FEATURES3_BUG_FIXES10_Start 10 +#define GC_FEATURES3_BUG_FIXES10_Type U01 +#define GC_FEATURES3_BUG_FIXES10_NONE 0x0 +#define GC_FEATURES3_BUG_FIXES10_AVAILABLE 0x1 + +#define GC_FEATURES3_UNIFIED_SAMPLERS 11 : 11 +#define GC_FEATURES3_UNIFIED_SAMPLERS_End 11 +#define GC_FEATURES3_UNIFIED_SAMPLERS_Start 11 +#define GC_FEATURES3_UNIFIED_SAMPLERS_Type U01 +#define GC_FEATURES3_UNIFIED_SAMPLERS_NONE 0x0 +#define GC_FEATURES3_UNIFIED_SAMPLERS_AVAILABLE 0x1 + +#define GC_FEATURES3_BUG_FIXES11 12 : 12 +#define GC_FEATURES3_BUG_FIXES11_End 12 +#define GC_FEATURES3_BUG_FIXES11_Start 12 +#define GC_FEATURES3_BUG_FIXES11_Type U01 +#define GC_FEATURES3_BUG_FIXES11_NONE 0x0 +#define GC_FEATURES3_BUG_FIXES11_AVAILABLE 0x1 + +#define GC_FEATURES3_PERFORMANCE_COUNTERS 13 : 13 +#define GC_FEATURES3_PERFORMANCE_COUNTERS_End 13 +#define GC_FEATURES3_PERFORMANCE_COUNTERS_Start 13 +#define GC_FEATURES3_PERFORMANCE_COUNTERS_Type U01 +#define GC_FEATURES3_PERFORMANCE_COUNTERS_NONE 0x0 +#define GC_FEATURES3_PERFORMANCE_COUNTERS_AVAILABLE 0x1 + +/* High precision transcendentals are available. */ +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2 14 : 14 +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2_End 14 +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2_Start 14 +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2_Type U01 +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2_NONE 0x0 +#define GC_FEATURES3_EXTRA_SHADER_INSTRUCTIONS2_AVAILABLE 0x1 + +#define GC_FEATURES3_BUG_FIXES12 15 : 15 +#define GC_FEATURES3_BUG_FIXES12_End 15 +#define GC_FEATURES3_BUG_FIXES12_Start 15 +#define GC_FEATURES3_BUG_FIXES12_Type U01 +#define GC_FEATURES3_BUG_FIXES12_NONE 0x0 +#define GC_FEATURES3_BUG_FIXES12_AVAILABLE 0x1 + +#define GC_FEATURES3_BUG_FIXES13 16 : 16 +#define GC_FEATURES3_BUG_FIXES13_End 16 +#define GC_FEATURES3_BUG_FIXES13_Start 16 +#define GC_FEATURES3_BUG_FIXES13_Type U01 +#define GC_FEATURES3_BUG_FIXES13_NONE 0x0 +#define GC_FEATURES3_BUG_FIXES13_AVAILABLE 0x1 + +#define GC_FEATURES3_DE_ENHANCEMENTS1 17 : 17 +#define GC_FEATURES3_DE_ENHANCEMENTS1_End 17 +#define GC_FEATURES3_DE_ENHANCEMENTS1_Start 17 +#define GC_FEATURES3_DE_ENHANCEMENTS1_Type U01 +#define GC_FEATURES3_DE_ENHANCEMENTS1_NONE 0x0 +#define GC_FEATURES3_DE_ENHANCEMENTS1_AVAILABLE 0x1 + +#define GC_FEATURES3_ACE 18 : 18 +#define GC_FEATURES3_ACE_End 18 +#define GC_FEATURES3_ACE_Start 18 +#define GC_FEATURES3_ACE_Type U01 +#define GC_FEATURES3_ACE_NONE 0x0 +#define GC_FEATURES3_ACE_AVAILABLE 0x1 + +#define GC_FEATURES3_TX_ENHANCEMENTS1 19 : 19 +#define GC_FEATURES3_TX_ENHANCEMENTS1_End 19 +#define GC_FEATURES3_TX_ENHANCEMENTS1_Start 19 +#define GC_FEATURES3_TX_ENHANCEMENTS1_Type U01 +#define GC_FEATURES3_TX_ENHANCEMENTS1_NONE 0x0 +#define GC_FEATURES3_TX_ENHANCEMENTS1_AVAILABLE 0x1 + +#define GC_FEATURES3_SH_ENHANCEMENTS1 20 : 20 +#define GC_FEATURES3_SH_ENHANCEMENTS1_End 20 +#define GC_FEATURES3_SH_ENHANCEMENTS1_Start 20 +#define GC_FEATURES3_SH_ENHANCEMENTS1_Type U01 +#define GC_FEATURES3_SH_ENHANCEMENTS1_NONE 0x0 +#define GC_FEATURES3_SH_ENHANCEMENTS1_AVAILABLE 0x1 + +#define GC_FEATURES3_SH_ENHANCEMENTS2 21 : 21 +#define GC_FEATURES3_SH_ENHANCEMENTS2_End 21 +#define GC_FEATURES3_SH_ENHANCEMENTS2_Start 21 +#define GC_FEATURES3_SH_ENHANCEMENTS2_Type U01 +#define GC_FEATURES3_SH_ENHANCEMENTS2_NONE 0x0 +#define GC_FEATURES3_SH_ENHANCEMENTS2_AVAILABLE 0x1 + +union gcfeatures3 { + struct { + /* GC_FEATURES3_Address:DE_ROTATION_STALL_FIX */ + unsigned int rotationfix:1; + + /* GC_FEATURES3_Address:OCL_ONLY */ + unsigned int ocl:1; + + /* GC_FEATURES3_Address:NEW_FEATURES0 */ + unsigned int newfeatures0:1; + + /* GC_FEATURES3_Address:INSTRUCTION_CACHE */ + unsigned int icache:1; + + /* GC_FEATURES3_Address:GEOMETRY_SHADER */ + unsigned int gs:1; + + /* GC_FEATURES3_Address:TEX_COMPRESSION_SUPERTILED */ + unsigned int supertiledtxcompression:1; + + /* GC_FEATURES3_Address:GENERICS */ + unsigned int generics:1; + + /* GC_FEATURES3_Address:BUG_FIXES9 */ + unsigned int bugfixes9:1; + + /* GC_FEATURES3_Address:FAST_MSAA */ + unsigned int fastmsaa:1; + + /* GC_FEATURES3_Address:WCLIP */ + unsigned int wclip:1; + + /* GC_FEATURES3_Address:BUG_FIXES10 */ + unsigned int bugfixes10:1; + + /* GC_FEATURES3_Address:UNIFIED_SAMPLERS */ + unsigned int unifiedsamplers:1; + + /* GC_FEATURES3_Address:BUG_FIXES11 */ + unsigned int bugfixes11:1; + + /* GC_FEATURES3_Address:PERFORMANCE_COUNTERS */ + unsigned int perfcounters:1; + + /* GC_FEATURES3_Address:EXTRA_SHADER_INSTRUCTIONS2 */ + unsigned int shaderinst2:1; + + /* GC_FEATURES3_Address:BUG_FIXES12 */ + unsigned int bugfixes12:1; + + /* GC_FEATURES3_Address:BUG_FIXES13 */ + unsigned int bugfixes13:1; + + /* GC_FEATURES3_Address:DE_ENHANCEMENTS1 */ + unsigned int deenhancements1:1; + + /* GC_FEATURES3_Address:ACE */ + unsigned int ace:1; + + /* GC_FEATURES3_Address:TX_ENHANCEMENTS1 */ + unsigned int txenhancements1:1; + + /* GC_FEATURES3_Address:SH_ENHANCEMENTS1 */ + unsigned int shenhancements1:1; + + /* GC_FEATURES3_Address:SH_ENHANCEMENTS2 */ + unsigned int shenhancements2:1; + + /* GC_FEATURES3_Address:reserved */ + unsigned int _reserved_22_31:10; + } reg; + + unsigned int raw; +}; + +/******************************************************************************* +** Register GCResetMemCounters +*/ + +/* Writing 1 will reset the counters and stop counting. Write 0 to start +** counting again. This register is write only so it has no reset value. +*/ + +#define GC_RESET_MEM_COUNTERS_Address 0x0003C +#define GC_RESET_MEM_COUNTERS_MSB 15 +#define GC_RESET_MEM_COUNTERS_LSB 0 +#define GC_RESET_MEM_COUNTERS_BLK 0 +#define GC_RESET_MEM_COUNTERS_Count 1 +#define GC_RESET_MEM_COUNTERS_FieldMask 0x00000001 +#define GC_RESET_MEM_COUNTERS_ReadMask 0x00000000 +#define GC_RESET_MEM_COUNTERS_WriteMask 0x00000001 +#define GC_RESET_MEM_COUNTERS_ResetValue 0x00000000 + +#define GC_RESET_MEM_COUNTERS_RESET 0 : 0 +#define GC_RESET_MEM_COUNTERS_RESET_End 0 +#define GC_RESET_MEM_COUNTERS_RESET_Start 0 +#define GC_RESET_MEM_COUNTERS_RESET_Type U01 + +/******************************************************************************* +** Register gcTotalReads +*/ + +/* Total reads in terms of 64bits. */ + +#define GC_TOTAL_READS_Address 0x00040 +#define GC_TOTAL_READS_MSB 15 +#define GC_TOTAL_READS_LSB 0 +#define GC_TOTAL_READS_BLK 0 +#define GC_TOTAL_READS_Count 1 +#define GC_TOTAL_READS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_READS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_READS_WriteMask 0x00000000 +#define GC_TOTAL_READS_ResetValue 0x00000000 + +#define GC_TOTAL_READS_COUNT 31 : 0 +#define GC_TOTAL_READS_COUNT_End 31 +#define GC_TOTAL_READS_COUNT_Start 0 +#define GC_TOTAL_READS_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalWrites +*/ + +/* Total writes in terms of 64bits. */ + +#define GC_TOTAL_WRITES_Address 0x00044 +#define GC_TOTAL_WRITES_MSB 15 +#define GC_TOTAL_WRITES_LSB 0 +#define GC_TOTAL_WRITES_BLK 0 +#define GC_TOTAL_WRITES_Count 1 +#define GC_TOTAL_WRITES_FieldMask 0xFFFFFFFF +#define GC_TOTAL_WRITES_ReadMask 0xFFFFFFFF +#define GC_TOTAL_WRITES_WriteMask 0x00000000 +#define GC_TOTAL_WRITES_ResetValue 0x00000000 + +#define GC_TOTAL_WRITES_COUNT 31 : 0 +#define GC_TOTAL_WRITES_COUNT_End 31 +#define GC_TOTAL_WRITES_COUNT_Start 0 +#define GC_TOTAL_WRITES_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalWriteBursts +*/ + +/* Total write Data Count in terms of 64bits value. */ + +#define GC_TOTAL_WRITE_BURSTS_Address 0x0004C +#define GC_TOTAL_WRITE_BURSTS_MSB 15 +#define GC_TOTAL_WRITE_BURSTS_LSB 0 +#define GC_TOTAL_WRITE_BURSTS_BLK 0 +#define GC_TOTAL_WRITE_BURSTS_Count 1 +#define GC_TOTAL_WRITE_BURSTS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_WRITE_BURSTS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_WRITE_BURSTS_WriteMask 0x00000000 +#define GC_TOTAL_WRITE_BURSTS_ResetValue 0x00000000 + +#define GC_TOTAL_WRITE_BURSTS_COUNT 31 : 0 +#define GC_TOTAL_WRITE_BURSTS_COUNT_End 31 +#define GC_TOTAL_WRITE_BURSTS_COUNT_Start 0 +#define GC_TOTAL_WRITE_BURSTS_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalWriteReqs +*/ + +/* Total write Request Count. */ + +#define GC_TOTAL_WRITE_REQS_Address 0x00050 +#define GC_TOTAL_WRITE_REQS_MSB 15 +#define GC_TOTAL_WRITE_REQS_LSB 0 +#define GC_TOTAL_WRITE_REQS_BLK 0 +#define GC_TOTAL_WRITE_REQS_Count 1 +#define GC_TOTAL_WRITE_REQS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_WRITE_REQS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_WRITE_REQS_WriteMask 0x00000000 +#define GC_TOTAL_WRITE_REQS_ResetValue 0x00000000 + +#define GC_TOTAL_WRITE_REQS_COUNT 31 : 0 +#define GC_TOTAL_WRITE_REQS_COUNT_End 31 +#define GC_TOTAL_WRITE_REQS_COUNT_Start 0 +#define GC_TOTAL_WRITE_REQS_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalReadBursts +*/ + +/* Total Read Data Count in terms of 64bits. */ + +#define GC_TOTAL_READ_BURSTS_Address 0x00058 +#define GC_TOTAL_READ_BURSTS_MSB 15 +#define GC_TOTAL_READ_BURSTS_LSB 0 +#define GC_TOTAL_READ_BURSTS_BLK 0 +#define GC_TOTAL_READ_BURSTS_Count 1 +#define GC_TOTAL_READ_BURSTS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_READ_BURSTS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_READ_BURSTS_WriteMask 0x00000000 +#define GC_TOTAL_READ_BURSTS_ResetValue 0x00000000 + +#define GC_TOTAL_READ_BURSTS_COUNT 31 : 0 +#define GC_TOTAL_READ_BURSTS_COUNT_End 31 +#define GC_TOTAL_READ_BURSTS_COUNT_Start 0 +#define GC_TOTAL_READ_BURSTS_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalReadReqs +*/ + +/* Total Read Request Count. */ + +#define GC_TOTAL_READ_REQS_Address 0x0005C +#define GC_TOTAL_READ_REQS_MSB 15 +#define GC_TOTAL_READ_REQS_LSB 0 +#define GC_TOTAL_READ_REQS_BLK 0 +#define GC_TOTAL_READ_REQS_Count 1 +#define GC_TOTAL_READ_REQS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_READ_REQS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_READ_REQS_WriteMask 0x00000000 +#define GC_TOTAL_READ_REQS_ResetValue 0x00000000 + +#define GC_TOTAL_READ_REQS_COUNT 31 : 0 +#define GC_TOTAL_READ_REQS_COUNT_End 31 +#define GC_TOTAL_READ_REQS_COUNT_Start 0 +#define GC_TOTAL_READ_REQS_COUNT_Type U32 + +/******************************************************************************* +** Register gcTotalReadLasts +*/ + +/* Total RLAST Count. This is used to match with GCTotalReadReqs. */ + +#define GC_TOTAL_READ_LASTS_Address 0x00060 +#define GC_TOTAL_READ_LASTS_MSB 15 +#define GC_TOTAL_READ_LASTS_LSB 0 +#define GC_TOTAL_READ_LASTS_BLK 0 +#define GC_TOTAL_READ_LASTS_Count 1 +#define GC_TOTAL_READ_LASTS_FieldMask 0xFFFFFFFF +#define GC_TOTAL_READ_LASTS_ReadMask 0xFFFFFFFF +#define GC_TOTAL_READ_LASTS_WriteMask 0x00000000 +#define GC_TOTAL_READ_LASTS_ResetValue 0x00000000 + +#define GC_TOTAL_READ_LASTS_COUNT 31 : 0 +#define GC_TOTAL_READ_LASTS_COUNT_End 31 +#define GC_TOTAL_READ_LASTS_COUNT_Start 0 +#define GC_TOTAL_READ_LASTS_COUNT_Type U32 + +/******************************************************************************* +** Register gcGpOut0 +*/ + +/* General Purpose output register0. R/W but not connected to anywhere. */ + +#define GC_GP_OUT0_Address 0x00064 +#define GC_GP_OUT0_MSB 15 +#define GC_GP_OUT0_LSB 0 +#define GC_GP_OUT0_BLK 0 +#define GC_GP_OUT0_Count 1 +#define GC_GP_OUT0_FieldMask 0xFFFFFFFF +#define GC_GP_OUT0_ReadMask 0xFFFFFFFF +#define GC_GP_OUT0_WriteMask 0xFFFFFFFF +#define GC_GP_OUT0_ResetValue 0x00000000 + +#define GC_GP_OUT0_COUNT 31 : 0 +#define GC_GP_OUT0_COUNT_End 31 +#define GC_GP_OUT0_COUNT_Start 0 +#define GC_GP_OUT0_COUNT_Type U32 + +/******************************************************************************* +** Register gcGpOut1 +*/ + +/* General Purpose output register1. R/W but not connected to anywhere. */ + +#define GC_GP_OUT1_Address 0x00068 +#define GC_GP_OUT1_MSB 15 +#define GC_GP_OUT1_LSB 0 +#define GC_GP_OUT1_BLK 0 +#define GC_GP_OUT1_Count 1 +#define GC_GP_OUT1_FieldMask 0xFFFFFFFF +#define GC_GP_OUT1_ReadMask 0xFFFFFFFF +#define GC_GP_OUT1_WriteMask 0xFFFFFFFF +#define GC_GP_OUT1_ResetValue 0x00000000 + +#define GC_GP_OUT1_COUNT 31 : 0 +#define GC_GP_OUT1_COUNT_End 31 +#define GC_GP_OUT1_COUNT_Start 0 +#define GC_GP_OUT1_COUNT_Type U32 + +/******************************************************************************* +** Register gcGpOut2 +*/ + +/* General Purpose output register2. R/W but not connected to anywhere. */ + +#define GC_GP_OUT2_Address 0x0006C +#define GC_GP_OUT2_MSB 15 +#define GC_GP_OUT2_LSB 0 +#define GC_GP_OUT2_BLK 0 +#define GC_GP_OUT2_Count 1 +#define GC_GP_OUT2_FieldMask 0xFFFFFFFF +#define GC_GP_OUT2_ReadMask 0xFFFFFFFF +#define GC_GP_OUT2_WriteMask 0xFFFFFFFF +#define GC_GP_OUT2_ResetValue 0x00000000 + +#define GC_GP_OUT2_COUNT 31 : 0 +#define GC_GP_OUT2_COUNT_End 31 +#define GC_GP_OUT2_COUNT_Start 0 +#define GC_GP_OUT2_COUNT_Type U32 + +/******************************************************************************* +** Register gcAxiControl +*/ + +/* Special Handling on AXI Bus */ + +#define GC_AXI_CONTROL_Address 0x00070 +#define GC_AXI_CONTROL_MSB 15 +#define GC_AXI_CONTROL_LSB 0 +#define GC_AXI_CONTROL_BLK 0 +#define GC_AXI_CONTROL_Count 1 +#define GC_AXI_CONTROL_FieldMask 0x00000001 +#define GC_AXI_CONTROL_ReadMask 0x00000001 +#define GC_AXI_CONTROL_WriteMask 0x00000001 +#define GC_AXI_CONTROL_ResetValue 0x00000000 + +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE 0 : 0 +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE_End 0 +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE_Start 0 +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE_Type U01 +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE_NO_BURST_RESET_VALUE 0x0 +#define GC_AXI_CONTROL_WR_FULL_BURST_MODE_BURST_RESET_VALUE 0x1 + +/******************************************************************************* +** Register gcTotalCycles +*/ + +/* Total cycles. This register is a free running counter. It can be reset by +** writing 0 to it. +*/ + +#define GC_TOTAL_CYCLES_Address 0x00078 +#define GC_TOTAL_CYCLES_MSB 15 +#define GC_TOTAL_CYCLES_LSB 0 +#define GC_TOTAL_CYCLES_BLK 0 +#define GC_TOTAL_CYCLES_Count 1 +#define GC_TOTAL_CYCLES_FieldMask 0xFFFFFFFF +#define GC_TOTAL_CYCLES_ReadMask 0xFFFFFFFF +#define GC_TOTAL_CYCLES_WriteMask 0xFFFFFFFF +#define GC_TOTAL_CYCLES_ResetValue 0x00000000 + +#define GC_TOTAL_CYCLES_CYCLES 31 : 0 +#define GC_TOTAL_CYCLES_CYCLES_End 31 +#define GC_TOTAL_CYCLES_CYCLES_Start 0 +#define GC_TOTAL_CYCLES_CYCLES_Type U32 + +/******************************************************************************* +** Register gcTotalIdleCycles +*/ + +/* Total cycles where the GPU is idle. It is reset when gcTotalCycles register +** is written to. It looks at all the blocks but FE when determining the IP is +** idle. +*/ + +#define GC_TOTAL_IDLE_CYCLES_Address 0x0007C +#define GC_TOTAL_IDLE_CYCLES_MSB 15 +#define GC_TOTAL_IDLE_CYCLES_LSB 0 +#define GC_TOTAL_IDLE_CYCLES_BLK 0 +#define GC_TOTAL_IDLE_CYCLES_Count 1 +#define GC_TOTAL_IDLE_CYCLES_FieldMask 0xFFFFFFFF +#define GC_TOTAL_IDLE_CYCLES_ReadMask 0xFFFFFFFF +#define GC_TOTAL_IDLE_CYCLES_WriteMask 0xFFFFFFFF +#define GC_TOTAL_IDLE_CYCLES_ResetValue 0x00000000 + +#define GC_TOTAL_IDLE_CYCLES_CYCLES 31 : 0 +#define GC_TOTAL_IDLE_CYCLES_CYCLES_End 31 +#define GC_TOTAL_IDLE_CYCLES_CYCLES_Start 0 +#define GC_TOTAL_IDLE_CYCLES_CYCLES_Type U32 + +/******************************************************************************* +** Command opcodes. +*/ + +#define GCREG_COMMAND_OPCODE_LOAD_STATE 0x01 +#define GCREG_COMMAND_OPCODE_END 0x02 +#define GCREG_COMMAND_OPCODE_NOP 0x03 +#define GCREG_COMMAND_OPCODE_STARTDE 0x04 +#define GCREG_COMMAND_OPCODE_WAIT 0x07 +#define GCREG_COMMAND_OPCODE_LINK 0x08 +#define GCREG_COMMAND_OPCODE_STALL 0x09 +#define GCREG_COMMAND_OPCODE_CALL 0x0A +#define GCREG_COMMAND_OPCODE_RETURN 0x0B + +/******************************************************************************* +** Command gcregCommandLoadState +*/ + +/* When enabled, convert 16.16 fixed point into 32-bit floating point. */ +#define GCREG_COMMAND_LOAD_STATE_FLOAT 26 : 26 +#define GCREG_COMMAND_LOAD_STATE_FLOAT_End 26 +#define GCREG_COMMAND_LOAD_STATE_FLOAT_Start 26 +#define GCREG_COMMAND_LOAD_STATE_FLOAT_Type U01 +#define GCREG_COMMAND_LOAD_STATE_FLOAT_NORMAL 0x0 +#define GCREG_COMMAND_LOAD_STATE_FLOAT_FIXED16_DOT16 0x1 + +/* Number of states. 0 = 1024. */ +#define GCREG_COMMAND_LOAD_STATE_COUNT 25 : 16 +#define GCREG_COMMAND_LOAD_STATE_COUNT_End 25 +#define GCREG_COMMAND_LOAD_STATE_COUNT_Start 16 +#define GCREG_COMMAND_LOAD_STATE_COUNT_Type U10 + +/* Starting state address. */ +#define GCREG_COMMAND_LOAD_STATE_ADDRESS 15 : 0 +#define GCREG_COMMAND_LOAD_STATE_ADDRESS_End 15 +#define GCREG_COMMAND_LOAD_STATE_ADDRESS_Start 0 +#define GCREG_COMMAND_LOAD_STATE_ADDRESS_Type U16 + +#define GCREG_COMMAND_LOAD_STATE_OPCODE 31 : 27 +#define GCREG_COMMAND_LOAD_STATE_OPCODE_End 31 +#define GCREG_COMMAND_LOAD_STATE_OPCODE_Start 27 +#define GCREG_COMMAND_LOAD_STATE_OPCODE_Type U05 + +struct gccmdldstate { + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_ADDRESS */ + unsigned int address:16; + + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_COUNT */ + unsigned int count:10; + + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_FLOAT */ + unsigned int fixed:1; + + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_OPCODE */ + unsigned int opcode:5; +}; + +#define GCLDSTATE(Address, Count) \ +{ \ + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_ADDRESS */ \ + Address, \ + \ + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_COUNT */ \ + Count, \ + \ + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_FLOAT */ \ + GCREG_COMMAND_LOAD_STATE_FLOAT_NORMAL, \ + \ + /* gcregCommandLoadState:GCREG_COMMAND_LOAD_STATE_OPCODE */ \ + GCREG_COMMAND_OPCODE_LOAD_STATE \ +} + +/******************************************************************************* +** Command gcregCommandEnd +*/ + +/* Send event when END is completed. */ +#define GCREG_COMMAND_END_EVENT 8 : 8 +#define GCREG_COMMAND_END_EVENT_End 8 +#define GCREG_COMMAND_END_EVENT_Start 8 +#define GCREG_COMMAND_END_EVENT_Type U01 +#define GCREG_COMMAND_END_EVENT_DISABLE 0x0 +#define GCREG_COMMAND_END_EVENT_ENABLE 0x1 + +/* Event ID to be send. */ +#define GCREG_COMMAND_END_EVENT_ID 4 : 0 +#define GCREG_COMMAND_END_EVENT_ID_End 4 +#define GCREG_COMMAND_END_EVENT_ID_Start 0 +#define GCREG_COMMAND_END_EVENT_ID_Type U05 + +#define GCREG_COMMAND_END_OPCODE 31 : 27 +#define GCREG_COMMAND_END_OPCODE_End 31 +#define GCREG_COMMAND_END_OPCODE_Start 27 +#define GCREG_COMMAND_END_OPCODE_Type U05 + +struct gcfldend { + /* gcregCommandEnd:GCREG_COMMAND_END_EVENT_ID */ + unsigned int signalid:5; + + /* gcregCommandEnd:reserved */ + unsigned int _reserved_5_7:3; + + /* gcregCommandEnd:GCREG_COMMAND_END_EVENT_ENABLE */ + unsigned int signal:1; + + /* gcregCommandEnd:reserved */ + unsigned int _reserved_9_26:18; + + /* gcregCommandEnd:GCREG_COMMAND_END_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdend { + union { + struct gcfldend fld; + unsigned int raw; + } + cmd; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gccmdend gccmdend_const = { + /* cmd */ + { + /* fld */ + { + /* gcregCommandEnd:GCREG_COMMAND_END_EVENT_ID */ + 0, + + /* gcregCommandEnd:reserved */ + 0, + + /* gcregCommandEnd:GCREG_COMMAND_END_EVENT */ + GCREG_COMMAND_END_EVENT_DISABLE, + + /* gcregCommandEnd:reserved */ + 0, + + /* gcregCommandEnd:GCREG_COMMAND_END_OPCODE */ + GCREG_COMMAND_OPCODE_END + } + }, + + /* Alignment filler. */ + 0 +}; + +/******************************************************************************* +** Command gcregCommandNop +*/ + +#define GCREG_COMMAND_NOP_OPCODE 31 : 27 +#define GCREG_COMMAND_NOP_OPCODE_End 31 +#define GCREG_COMMAND_NOP_OPCODE_Start 27 +#define GCREG_COMMAND_NOP_OPCODE_Type U05 + +struct gcfldnop { + /* gcregCommandNop:reserved */ + unsigned int _reserved_0_26:27; + + /* gcregCommandNop:GCREG_COMMAND_NOP_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdnop { + union { + struct gcfldnop fld; + unsigned int raw; + } + cmd; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gccmdnop gccmdnop_const = { + /* cmd */ + { + /* fld */ + { + /* gcregCommandNop:reserved */ + 0, + + /* gcregCommandNop:GCREG_COMMAND_NOP_OPCODE */ + GCREG_COMMAND_OPCODE_NOP + } + }, + + /* Alignment filler. */ + 0 +}; + +/******************************************************************************* +** Command gcregCommandStartDE +*/ + +/* Offset Command +** ~~~~~~~~~~~~~~ */ + +/* Number of 32-bit data words to send. +** The data follows the rectangles, aligned at 64-bit. +*/ +#define GCREG_COMMAND_STARTDE_DATA_COUNT 26 : 16 +#define GCREG_COMMAND_STARTDE_DATA_COUNT_End 26 +#define GCREG_COMMAND_STARTDE_DATA_COUNT_Start 16 +#define GCREG_COMMAND_STARTDE_DATA_COUNT_Type U11 + +/* Number of rectangles to send. +** The rectangles follow the command, aligned at 64-bit. +*/ +#define GCREG_COMMAND_STARTDE_COUNT 15 : 8 +#define GCREG_COMMAND_STARTDE_COUNT_End 15 +#define GCREG_COMMAND_STARTDE_COUNT_Start 8 +#define GCREG_COMMAND_STARTDE_COUNT_Type U08 + +#define GCREG_COMMAND_STARTDE_OPCODE 31 : 27 +#define GCREG_COMMAND_STARTDE_OPCODE_End 31 +#define GCREG_COMMAND_STARTDE_OPCODE_Start 27 +#define GCREG_COMMAND_STARTDE_OPCODE_Type U05 + +struct gcfldstartde { + /* gcregCommandStartDE:reserved */ + unsigned int _reserved_0_7:8; + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_COUNT */ + unsigned int rectcount:8; + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_DATA_COUNT */ + unsigned int datacount:11; + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdstartde { + union { + struct gcfldstartde fld; + unsigned int raw; + } cmd; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gcfldstartde gcfldstartde = { + /* gcregCommandStartDE:reserved */ + 0, + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_COUNT */ + 1, + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_DATA_COUNT */ + 0, + + /* gcregCommandStartDE:GCREG_COMMAND_STARTDE_OPCODE */ + GCREG_COMMAND_OPCODE_STARTDE +}; + +/* Offset TopLeft +** ~~~~~~~~~~~~~~ */ + +#define GCREG_COMMAND_TOP_LEFT_Y 31 : 16 +#define GCREG_COMMAND_TOP_LEFT_Y_End 31 +#define GCREG_COMMAND_TOP_LEFT_Y_Start 16 +#define GCREG_COMMAND_TOP_LEFT_Y_Type U16 + +#define GCREG_COMMAND_TOP_LEFT_X 15 : 0 +#define GCREG_COMMAND_TOP_LEFT_X_End 15 +#define GCREG_COMMAND_TOP_LEFT_X_Start 0 +#define GCREG_COMMAND_TOP_LEFT_X_Type U16 + +/* Offset BottomRight +** ~~~~~~~~~~~~~~~~~~ */ + +#define GCREG_COMMAND_BOTTOM_RIGHT_Y 31 : 16 +#define GCREG_COMMAND_BOTTOM_RIGHT_Y_End 31 +#define GCREG_COMMAND_BOTTOM_RIGHT_Y_Start 16 +#define GCREG_COMMAND_BOTTOM_RIGHT_Y_Type U16 + +#define GCREG_COMMAND_BOTTOM_RIGHT_X 15 : 0 +#define GCREG_COMMAND_BOTTOM_RIGHT_X_End 15 +#define GCREG_COMMAND_BOTTOM_RIGHT_X_Start 0 +#define GCREG_COMMAND_BOTTOM_RIGHT_X_Type U16 + +struct gccmdstartderect { + /* GCREG_COMMAND_TOP_LEFT_X */ + unsigned int left:16; + + /* GCREG_COMMAND_TOP_LEFT_Y */ + unsigned int top:16; + + /* GCREG_COMMAND_BOTTOM_RIGHT_X */ + unsigned int right:16; + + /* GCREG_COMMAND_BOTTOM_RIGHT_Y */ + unsigned int bottom:16; +}; + +/******************************************************************************* +** Command gcregCommandWait +*/ + +/* Number of cycles to wait until the next command gets fetched. */ +#define GCREG_COMMAND_WAIT_DELAY 15 : 0 +#define GCREG_COMMAND_WAIT_DELAY_End 15 +#define GCREG_COMMAND_WAIT_DELAY_Start 0 +#define GCREG_COMMAND_WAIT_DELAY_Type U16 + +#define GCREG_COMMAND_WAIT_OPCODE 31 : 27 +#define GCREG_COMMAND_WAIT_OPCODE_End 31 +#define GCREG_COMMAND_WAIT_OPCODE_Start 27 +#define GCREG_COMMAND_WAIT_OPCODE_Type U05 + +struct gcfldwait { + /* gcregCommandWait:GCREG_COMMAND_WAIT_DELAY */ + unsigned int delay:16; + + /* gcregCommandWait:reserved */ + unsigned int _reserved_16_26:11; + + /* gcregCommandWait:GCREG_COMMAND_WAIT_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdwait { + union { + struct gcfldwait fld; + unsigned int raw; + } cmd; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gcfldwait gcfldwait200 = { + /* gcregCommandWait:GCREG_COMMAND_WAIT_DELAY */ + 200, + + /* gcregCommandWait:reserved */ + 0, + + /* gcregCommandWait:GCREG_COMMAND_WAIT_OPCODE */ + GCREG_COMMAND_OPCODE_WAIT +}; + +/******************************************************************************* +** Command gcregCommandLink +*/ + +/* Number of 64-bit words to fetch. Make sure this number is not too low, +** nothing else will be fetched. So, make sure that the last command in the +** new command buffer is either an END, a LINK, a CALL, or a RETURN. +*/ +#define GCREG_COMMAND_LINK_PREFETCH 15 : 0 +#define GCREG_COMMAND_LINK_PREFETCH_End 15 +#define GCREG_COMMAND_LINK_PREFETCH_Start 0 +#define GCREG_COMMAND_LINK_PREFETCH_Type U16 + +#define GCREG_COMMAND_LINK_OPCODE 31 : 27 +#define GCREG_COMMAND_LINK_OPCODE_End 31 +#define GCREG_COMMAND_LINK_OPCODE_Start 27 +#define GCREG_COMMAND_LINK_OPCODE_Type U05 + +/* Offset Address +** ~~~~~~~~~~~~~~ */ +#define GCREG_COMMAND_LINK_ADDRESS_Index 1 +#define GCREG_COMMAND_LINK_ADDRESS_CmdAddrs 0x0F0D + +#define GCREG_COMMAND_LINK_ADDRESS_ADDRESS 31 : 0 +#define GCREG_COMMAND_LINK_ADDRESS_ADDRESS_End 30 +#define GCREG_COMMAND_LINK_ADDRESS_ADDRESS_Start 0 +#define GCREG_COMMAND_LINK_ADDRESS_ADDRESS_Type U31 + +struct gcfldlink { + /* gcregCommandLink:GCREG_COMMAND_LINK_PREFETCH */ + unsigned int count:16; + + /* gcregCommandLink:reserved */ + unsigned int _reserved_16_26:11; + + /* gcregCommandLink:GCREG_COMMAND_LINK_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdlink { + union { + struct gcfldlink fld; + unsigned int raw; + } cmd; + + /* gcregCommandLink:GCREG_COMMAND_LINK_ADDRESS_ADDRESS */ + unsigned int address; +}; + +static const struct gcfldlink gcfldlink2 = { + /* gcregCommandLink:GCREG_COMMAND_LINK_PREFETCH */ + 2, + + /* gcregCommandLink:reserved */ + 0, + + /* gcregCommandLink:GCREG_COMMAND_LINK_OPCODE */ + GCREG_COMMAND_OPCODE_LINK +}; + +static const struct gcfldlink gcfldlink4 = { + /* gcregCommandLink:GCREG_COMMAND_LINK_PREFETCH */ + 4, + + /* gcregCommandLink:reserved */ + 0, + + /* gcregCommandLink:GCREG_COMMAND_LINK_OPCODE */ + GCREG_COMMAND_OPCODE_LINK +}; + +/******************************************************************************* +** Command gcregCommandStall +*/ + +/* Offset Command +** ~~~~~~~~~~~~~~ */ +#define GCREG_COMMAND_STALL_OPCODE 31 : 27 +#define GCREG_COMMAND_STALL_OPCODE_End 31 +#define GCREG_COMMAND_STALL_OPCODE_Start 27 +#define GCREG_COMMAND_STALL_OPCODE_Type U05 + +/* Offset Stall +** ~~~~~~~~~~~~ */ +#define GCREG_COMMAND_STALL_STALL_SOURCE 4 : 0 +#define GCREG_COMMAND_STALL_STALL_SOURCE_End 4 +#define GCREG_COMMAND_STALL_STALL_SOURCE_Start 0 +#define GCREG_COMMAND_STALL_STALL_SOURCE_Type U05 +#define GCREG_COMMAND_STALL_STALL_SOURCE_FRONT_END 0x01 +#define GCREG_COMMAND_STALL_STALL_SOURCE_PIXEL_ENGINE 0x07 +#define GCREG_COMMAND_STALL_STALL_SOURCE_DRAWING_ENGINE 0x0B + +#define GCREG_COMMAND_STALL_STALL_DESTINATION 12 : 8 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_End 12 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_Start 8 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_Type U05 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_FRONT_END 0x01 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_PIXEL_ENGINE 0x07 +#define GCREG_COMMAND_STALL_STALL_DESTINATION_DRAWING_ENGINE 0x0B + +struct gcfldstall { + /* gcregCommandStall:reserved */ + unsigned int _reserved_0_26:27; + + /* gcregCommandStall:GCREG_COMMAND_STALL_OPCODE */ + unsigned int opcode:5; +}; + +struct gcfldstallarg { + /* gcregCommandStall:GCREG_COMMAND_STALL_STALL_SOURCE */ + unsigned int src:5; + + /* gcregCommandStall:reserved */ + unsigned int _reserved_5_7:3; + + /* gcregCommandStall:GCREG_COMMAND_STALL_STALL_DESTINATION */ + unsigned int dst:5; + + /* gcregCommandStall:reserved */ + unsigned int _reserved_13_31:19; +}; + +struct gccmdstall { + union { + struct gcfldstall fld; + unsigned int raw; + } cmd; + + union { + struct gcfldstallarg fld; + unsigned int raw; + } arg; +}; + +static const struct gcfldstall gcfldstall = { + /* gcregCommandStall:reserved */ + 0, + + /* gcregCommandStall:GCREG_COMMAND_STALL_OPCODE */ + GCREG_COMMAND_OPCODE_STALL +}; + +static const struct gcfldstallarg gcfldstall_fe_pe = { + /* gcregCommandStall:GCREG_COMMAND_STALL_STALL_SOURCE */ + GCREG_COMMAND_STALL_STALL_SOURCE_FRONT_END, + + /* gcregCommandStall:reserved */ + 0, + + /* gcregCommandStall:GCREG_COMMAND_STALL_STALL_DESTINATION */ + GCREG_COMMAND_STALL_STALL_DESTINATION_PIXEL_ENGINE, + + /* gcregCommandStall:reserved */ + 0 +}; + +/******************************************************************************* +** Command gcregCommandCall +*/ + +/* Offset Command +** ~~~~~~~~~~~~~~ */ + +/* Number of 64-bit words to fetch. Make sure this number is not too low, +** nothing else will be fetched. So, make sure that the last command in the +** new command buffer is either an END, a LINK, a CALL, or a RETURN. +*/ +#define GCREG_COMMAND_CALL_PREFETCH 15 : 0 +#define GCREG_COMMAND_CALL_PREFETCH_End 15 +#define GCREG_COMMAND_CALL_PREFETCH_Start 0 +#define GCREG_COMMAND_CALL_PREFETCH_Type U16 + +#define GCREG_COMMAND_CALL_OPCODE 31 : 27 +#define GCREG_COMMAND_CALL_OPCODE_End 31 +#define GCREG_COMMAND_CALL_OPCODE_Start 27 +#define GCREG_COMMAND_CALL_OPCODE_Type U05 + +/* Offset Address +** ~~~~~~~~~~~~~~ */ + +#define GCREG_COMMAND_CALL_ADDRESS_ADDRESS 31 : 0 +#define GCREG_COMMAND_CALL_ADDRESS_ADDRESS_End 30 +#define GCREG_COMMAND_CALL_ADDRESS_ADDRESS_Start 0 +#define GCREG_COMMAND_CALL_ADDRESS_ADDRESS_Type U31 + +/* Offset ReturnPrefetch +** ~~~~~~~~~~~~~~~~~~~~~ */ + +/* Number of 64-bit words to fetch after a Return has been issued. Make sure ** +** this number if not too low nothing else will be fetched. So, make sure ** +** the last command in this prefetch block is either an END, a LINK, a CALL, ** +** or a RETURN. */ +#define GCREG_COMMAND_CALL_RETURN_PREFETCH_PREFETCH 15 : 0 +#define GCREG_COMMAND_CALL_RETURN_PREFETCH_PREFETCH_End 15 +#define GCREG_COMMAND_CALL_RETURN_PREFETCH_PREFETCH_Start 0 +#define GCREG_COMMAND_CALL_RETURN_PREFETCH_PREFETCH_Type U16 + +/* Offset ReturnAddress +** ~~~~~~~~~~~~~~~~~~~~ */ + +#define GCREG_COMMAND_CALL_RETURN_ADDRESS_ADDRESS 31 : 0 +#define GCREG_COMMAND_CALL_RETURN_ADDRESS_ADDRESS_End 30 +#define GCREG_COMMAND_CALL_RETURN_ADDRESS_ADDRESS_Start 0 +#define GCREG_COMMAND_CALL_RETURN_ADDRESS_ADDRESS_Type U31 + +struct gccmdcall { + /* gcregCommandCall:GCREG_COMMAND_CALL_PREFETCH */ + unsigned int count:16; + + /* gcregCommandCall:reserved */ + unsigned int _reserved_16_26:11; + + /* gcregCommandCall:GCREG_COMMAND_CALL_OPCODE */ + unsigned int opcode:5; + + /* gcregCommandCall:GCREG_COMMAND_CALL_ADDRESS_ADDRESS */ + unsigned int address; + + /* gcregCommandCall:GCREG_COMMAND_CALL_RETURN_PREFETCH_PREFETCH */ + unsigned int retcount; + + /* gcregCommandCall:GCREG_COMMAND_CALL_RETURN_ADDRESS_ADDRESS */ + unsigned int retaddress; +}; + +/******************************************************************************* +** Command gccmdCommandReturn +*/ + +#define GCREG_COMMAND_RETURN_OPCODE 31 : 27 +#define GCREG_COMMAND_RETURN_OPCODE_End 31 +#define GCREG_COMMAND_RETURN_OPCODE_Start 27 +#define GCREG_COMMAND_RETURN_OPCODE_Type U05 + +struct gcfldret { + /* gccmdCommandReturn:reserved */ + unsigned int _reserved_0_26:27; + + /* gccmdCommandReturn:GCREG_COMMAND_RETURN_OPCODE */ + unsigned int opcode:5; +}; + +struct gccmdret { + union { + struct gcfldret fld; + unsigned int raw; + } + cmd; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gcfldret gcfldret = { + /* gccmdCommandReturn:reserved */ + 0, + + /* gccmdCommandReturn:GCREG_COMMAND_RETURN_OPCODE */ + GCREG_COMMAND_OPCODE_RETURN +}; + +/******************************************************************************* +** State gcregStall +*/ + +#define gcregStallRegAddrs 0x0F00 +#define GCREG_STALL_Count 1 +#define GCREG_STALL_ResetValue 0x00000000 + +#define GCREG_STALL_FLIP0 30 : 30 +#define GCREG_STALL_FLIP0_End 30 +#define GCREG_STALL_FLIP0_Start 30 +#define GCREG_STALL_FLIP0_Type U01 + +#define GCREG_STALL_FLIP1 31 : 31 +#define GCREG_STALL_FLIP1_End 31 +#define GCREG_STALL_FLIP1_Start 31 +#define GCREG_STALL_FLIP1_Type U01 + +#define GCREG_STALL_SOURCE 4 : 0 +#define GCREG_STALL_SOURCE_End 4 +#define GCREG_STALL_SOURCE_Start 0 +#define GCREG_STALL_SOURCE_Type U05 +#define GCREG_STALL_SOURCE_FRONT_END 0x01 +#define GCREG_STALL_SOURCE_PIXEL_ENGINE 0x07 +#define GCREG_STALL_SOURCE_DRAWING_ENGINE 0x0B + +#define GCREG_STALL_DESTINATION 12 : 8 +#define GCREG_STALL_DESTINATION_End 12 +#define GCREG_STALL_DESTINATION_Start 8 +#define GCREG_STALL_DESTINATION_Type U05 +#define GCREG_STALL_DESTINATION_FRONT_END 0x01 +#define GCREG_STALL_DESTINATION_PIXEL_ENGINE 0x07 +#define GCREG_STALL_DESTINATION_DRAWING_ENGINE 0x0B + +/******************************************************************************* +** State gcregPipeSelect +*/ + +/* Select the current graphics pipe. */ + +#define gcregPipeSelectRegAddrs 0x0E00 +#define GCREG_PIPE_SELECT_MSB 15 +#define GCREG_PIPE_SELECT_LSB 0 +#define GCREG_PIPE_SELECT_BLK 0 +#define GCREG_PIPE_SELECT_Count 1 +#define GCREG_PIPE_SELECT_FieldMask 0x00000001 +#define GCREG_PIPE_SELECT_ReadMask 0x00000001 +#define GCREG_PIPE_SELECT_WriteMask 0x00000001 +#define GCREG_PIPE_SELECT_ResetValue 0x00000000 + +/* Selects the pipe to send states and data to. Make sure the PE is idle ** +** before you switch pipes. */ +#define GCREG_PIPE_SELECT_PIPE 0 : 0 +#define GCREG_PIPE_SELECT_PIPE_End 0 +#define GCREG_PIPE_SELECT_PIPE_Start 0 +#define GCREG_PIPE_SELECT_PIPE_Type U01 +#define GCREG_PIPE_SELECT_PIPE_PIPE3D 0x0 +#define GCREG_PIPE_SELECT_PIPE_PIPE2D 0x1 + +struct gcregpipeselect { + /* gcregPipeSelectRegAddrs:GCREG_PIPE_SELECT_PIPE */ + unsigned int pipe:1; + + /* gcregPipeSelectRegAddrs:reserved */ + unsigned int _reserved_1_31:31; +}; + +static const struct gcregpipeselect gcregpipeselect_2D = { + /* gcregPipeSelectRegAddrs:GCREG_PIPE_SELECT_PIPE */ + GCREG_PIPE_SELECT_PIPE_PIPE2D, + + /* gcregPipeSelectRegAddrs:reserved */ + 0 +}; + +static const struct gcregpipeselect gcregpipeselect_3D = { + /* gcregPipeSelectRegAddrs:GCREG_PIPE_SELECT_PIPE */ + GCREG_PIPE_SELECT_PIPE_PIPE3D, + + /* gcregPipeSelectRegAddrs:reserved */ + 0 +}; + +/******************************************************************************* +** State gcregEvent +*/ + +/* Send an event. */ + +#define gcregEventRegAddrs 0x0E01 +#define GCREG_EVENT_MSB 15 +#define GCREG_EVENT_LSB 0 +#define GCREG_EVENT_BLK 0 +#define GCREG_EVENT_Count 1 +#define GCREG_EVENT_FieldMask 0x0000007F +#define GCREG_EVENT_ReadMask 0x0000007F +#define GCREG_EVENT_WriteMask 0x0000007F +#define GCREG_EVENT_ResetValue 0x00000000 + +/* 5-bit event ID to send. */ +#define GCREG_EVENT_EVENT_ID 4 : 0 +#define GCREG_EVENT_EVENT_ID_End 4 +#define GCREG_EVENT_EVENT_ID_Start 0 +#define GCREG_EVENT_EVENT_ID_Type U05 + +/* The event is sent by the FE. */ +#define GCREG_EVENT_FE_SRC 5 : 5 +#define GCREG_EVENT_FE_SRC_End 5 +#define GCREG_EVENT_FE_SRC_Start 5 +#define GCREG_EVENT_FE_SRC_Type U01 +#define GCREG_EVENT_FE_SRC_DISABLE 0x0 +#define GCREG_EVENT_FE_SRC_ENABLE 0x1 + +/* The event is sent by the PE. */ +#define GCREG_EVENT_PE_SRC 6 : 6 +#define GCREG_EVENT_PE_SRC_End 6 +#define GCREG_EVENT_PE_SRC_Start 6 +#define GCREG_EVENT_PE_SRC_Type U01 +#define GCREG_EVENT_PE_SRC_DISABLE 0x0 +#define GCREG_EVENT_PE_SRC_ENABLE 0x1 + +struct gcregevent { + /* gcregEventRegAddrs:GCREG_EVENT_EVENT_ID */ + unsigned int id:5; + + /* gcregEventRegAddrs:GCREG_EVENT_FE_SRC */ + unsigned int fe:1; + + /* gcregEventRegAddrs:GCREG_EVENT_PE_SRC */ + unsigned int pe:1; + + /* gcregEventRegAddrs:reserved */ + unsigned int _reserved_7_31:25; +}; + +/******************************************************************************* +** State gcregSemaphore +*/ + +/* A sempahore state arms the semaphore in the destination. */ + +#define gcregSemaphoreRegAddrs 0x0E02 +#define GCREG_SEMAPHORE_MSB 15 +#define GCREG_SEMAPHORE_LSB 0 +#define GCREG_SEMAPHORE_BLK 0 +#define GCREG_SEMAPHORE_Count 1 +#define GCREG_SEMAPHORE_FieldMask 0x00001F1F +#define GCREG_SEMAPHORE_ReadMask 0x00001F1F +#define GCREG_SEMAPHORE_WriteMask 0x00001F1F +#define GCREG_SEMAPHORE_ResetValue 0x00000000 + +#define GCREG_SEMAPHORE_SOURCE 4 : 0 +#define GCREG_SEMAPHORE_SOURCE_End 4 +#define GCREG_SEMAPHORE_SOURCE_Start 0 +#define GCREG_SEMAPHORE_SOURCE_Type U05 +#define GCREG_SEMAPHORE_SOURCE_FRONT_END 0x01 +#define GCREG_SEMAPHORE_SOURCE_PIXEL_ENGINE 0x07 +#define GCREG_SEMAPHORE_SOURCE_DRAWING_ENGINE 0x0B + +#define GCREG_SEMAPHORE_DESTINATION 12 : 8 +#define GCREG_SEMAPHORE_DESTINATION_End 12 +#define GCREG_SEMAPHORE_DESTINATION_Start 8 +#define GCREG_SEMAPHORE_DESTINATION_Type U05 +#define GCREG_SEMAPHORE_DESTINATION_FRONT_END 0x01 +#define GCREG_SEMAPHORE_DESTINATION_PIXEL_ENGINE 0x07 +#define GCREG_SEMAPHORE_DESTINATION_DRAWING_ENGINE 0x0B + +struct gcregsemaphore { + /* gcregSemaphoreRegAddrs:GCREG_SEMAPHORE_SOURCE */ + unsigned int src:5; + + /* gcregSemaphoreRegAddrs:reserved */ + unsigned int _reserved_5_7:3; + + /* gcregSemaphoreRegAddrs:GCREG_SEMAPHORE_DESTINATION */ + unsigned int dst:5; + + /* gcregSemaphoreRegAddrs:reserved */ + unsigned int _reserved_13_31:19; +}; + +static const struct gcregsemaphore gcregsema_fe_pe = { + /* gcregSemaphoreRegAddrs:GCREG_SEMAPHORE_SOURCE */ + GCREG_SEMAPHORE_SOURCE_FRONT_END, + + /* gcregSemaphoreRegAddrs:reserved */ + 0, + + /* gcregSemaphoreRegAddrs:GCREG_SEMAPHORE_DESTINATION */ + GCREG_SEMAPHORE_DESTINATION_PIXEL_ENGINE, + + /* gcregSemaphoreRegAddrs:reserved */ + 0 +}; + + +/******************************************************************************* +** State gcregFlush +*/ + +/* Flush the current pipe. */ + +#define gcregFlushRegAddrs 0x0E03 +#define GCREG_FLUSH_MSB 15 +#define GCREG_FLUSH_LSB 0 +#define GCREG_FLUSH_BLK 0 +#define GCREG_FLUSH_Count 1 +#define GCREG_FLUSH_FieldMask 0x00000008 +#define GCREG_FLUSH_ReadMask 0x00000008 +#define GCREG_FLUSH_WriteMask 0x00000008 +#define GCREG_FLUSH_ResetValue 0x00000000 + +/* Flush the 2D pixel cache. */ +#define GCREG_FLUSH_PE2D_CACHE 3 : 3 +#define GCREG_FLUSH_PE2D_CACHE_End 3 +#define GCREG_FLUSH_PE2D_CACHE_Start 3 +#define GCREG_FLUSH_PE2D_CACHE_Type U01 +#define GCREG_FLUSH_PE2D_CACHE_DISABLE 0x0 +#define GCREG_FLUSH_PE2D_CACHE_ENABLE 0x1 + +struct gcregflush { + /* gcregFlushRegAddrs:reserved */ + unsigned int _reserved_0_2:3; + + /* gcregFlushRegAddrs:GCREG_FLUSH_PE2D_CACHE */ + unsigned int enable:1; + + /* gcregFlushRegAddrs:reserved */ + unsigned int _reserved_4_31:28; +}; + +static const struct gcregflush gcregflush_pe2D = { + /* gcregFlushRegAddrs:reserved */ + 0, + + /* gcregFlushRegAddrs:GCREG_FLUSH_PE2D_CACHE */ + GCREG_FLUSH_PE2D_CACHE_ENABLE, + + /* gcregFlushRegAddrs:reserved */ + 0 +}; + +/******************************************************************************* +** State gcregMMUFlush +*/ + +/* Flush the virtual addrses lookup cache inside the MC. */ + +#define gcregMMUFlushRegAddrs 0x0E04 +#define gcregMMU_FLUSH_MSB 15 +#define gcregMMU_FLUSH_LSB 0 +#define gcregMMU_FLUSH_BLK 0 +#define gcregMMU_FLUSH_Count 1 +#define gcregMMU_FLUSH_FieldMask 0x00000009 +#define gcregMMU_FLUSH_ReadMask 0x00000009 +#define gcregMMU_FLUSH_WriteMask 0x00000009 +#define gcregMMU_FLUSH_ResetValue 0x00000000 + +/* Flush the FE address translation caches. */ +#define gcregMMU_FLUSH_FEMMU 0 : 0 +#define gcregMMU_FLUSH_FEMMU_End 0 +#define gcregMMU_FLUSH_FEMMU_Start 0 +#define gcregMMU_FLUSH_FEMMU_Type U01 +#define gcregMMU_FLUSH_FEMMU_DISABLE 0x0 +#define gcregMMU_FLUSH_FEMMU_ENABLE 0x1 + +/* Flush the PE render target address translation caches. */ +#define gcregMMU_FLUSH_PEMMU 3 : 3 +#define gcregMMU_FLUSH_PEMMU_End 3 +#define gcregMMU_FLUSH_PEMMU_Start 3 +#define gcregMMU_FLUSH_PEMMU_Type U01 +#define gcregMMU_FLUSH_PEMMU_DISABLE 0x0 +#define gcregMMU_FLUSH_PEMMU_ENABLE 0x1 + +/******************************************************************************* +** Register gcregCmdBufferAddr +*/ + +/* Base address for the command buffer. The address must be 64-bit aligned +** and it is always physical. This register cannot be read. To check the value +** of the current fetch address use gcregFEDebugCurCmdAdr. Since this is a write +** only register is has no reset value. +*/ + +#define GCREG_CMD_BUFFER_ADDR_Address 0x00654 +#define GCREG_CMD_BUFFER_ADDR_MSB 15 +#define GCREG_CMD_BUFFER_ADDR_LSB 0 +#define GCREG_CMD_BUFFER_ADDR_BLK 0 +#define GCREG_CMD_BUFFER_ADDR_Count 1 +#define GCREG_CMD_BUFFER_ADDR_FieldMask 0xFFFFFFFF +#define GCREG_CMD_BUFFER_ADDR_ReadMask 0x00000000 +#define GCREG_CMD_BUFFER_ADDR_WriteMask 0xFFFFFFFC +#define GCREG_CMD_BUFFER_ADDR_ResetValue 0x00000000 + +#define GCREG_CMD_BUFFER_ADDR_ADDRESS 31 : 0 +#define GCREG_CMD_BUFFER_ADDR_ADDRESS_End 30 +#define GCREG_CMD_BUFFER_ADDR_ADDRESS_Start 0 +#define GCREG_CMD_BUFFER_ADDR_ADDRESS_Type U31 + +/******************************************************************************* +** Register gcregCmdBufferCtrl +*/ + +/* Since this is a write only register is has no reset value. */ + +#define GCREG_CMD_BUFFER_CTRL_Address 0x00658 +#define GCREG_CMD_BUFFER_CTRL_MSB 15 +#define GCREG_CMD_BUFFER_CTRL_LSB 0 +#define GCREG_CMD_BUFFER_CTRL_BLK 0 +#define GCREG_CMD_BUFFER_CTRL_Count 1 +#define GCREG_CMD_BUFFER_CTRL_FieldMask 0x0001FFFF +#define GCREG_CMD_BUFFER_CTRL_ReadMask 0x00010000 +#define GCREG_CMD_BUFFER_CTRL_WriteMask 0x0001FFFF +#define GCREG_CMD_BUFFER_CTRL_ResetValue 0x00000000 + +/* Number of 64-bit words to fetch from the command buffer. */ +#define GCREG_CMD_BUFFER_CTRL_PREFETCH 15 : 0 +#define GCREG_CMD_BUFFER_CTRL_PREFETCH_End 15 +#define GCREG_CMD_BUFFER_CTRL_PREFETCH_Start 0 +#define GCREG_CMD_BUFFER_CTRL_PREFETCH_Type U16 + +/* Enable the command parser. */ +#define GCREG_CMD_BUFFER_CTRL_ENABLE 16 : 16 +#define GCREG_CMD_BUFFER_CTRL_ENABLE_End 16 +#define GCREG_CMD_BUFFER_CTRL_ENABLE_Start 16 +#define GCREG_CMD_BUFFER_CTRL_ENABLE_Type U01 +#define GCREG_CMD_BUFFER_CTRL_ENABLE_DISABLE 0x0 +#define GCREG_CMD_BUFFER_CTRL_ENABLE_ENABLE 0x1 + +/******************************************************************************* +** Register gcregFEDebugState +*/ + +#define GCREG_FE_DEBUG_STATE_Address 0x00660 +#define GCREG_FE_DEBUG_STATE_MSB 15 +#define GCREG_FE_DEBUG_STATE_LSB 0 +#define GCREG_FE_DEBUG_STATE_BLK 0 +#define GCREG_FE_DEBUG_STATE_Count 1 +#define GCREG_FE_DEBUG_STATE_FieldMask 0x0003FF1F +#define GCREG_FE_DEBUG_STATE_ReadMask 0x0003FF1F +#define GCREG_FE_DEBUG_STATE_WriteMask 0x00000000 +#define GCREG_FE_DEBUG_STATE_ResetValue 0x00000000 + +#define GCREG_FE_DEBUG_STATE_CMD_STATE 4 : 0 +#define GCREG_FE_DEBUG_STATE_CMD_STATE_End 4 +#define GCREG_FE_DEBUG_STATE_CMD_STATE_Start 0 +#define GCREG_FE_DEBUG_STATE_CMD_STATE_Type U05 + +#define GCREG_FE_DEBUG_STATE_CMD_DMA_STATE 9 : 8 +#define GCREG_FE_DEBUG_STATE_CMD_DMA_STATE_End 9 +#define GCREG_FE_DEBUG_STATE_CMD_DMA_STATE_Start 8 +#define GCREG_FE_DEBUG_STATE_CMD_DMA_STATE_Type U02 + +#define GCREG_FE_DEBUG_STATE_CMD_FETCH_STATE 11 : 10 +#define GCREG_FE_DEBUG_STATE_CMD_FETCH_STATE_End 11 +#define GCREG_FE_DEBUG_STATE_CMD_FETCH_STATE_Start 10 +#define GCREG_FE_DEBUG_STATE_CMD_FETCH_STATE_Type U02 + +#define GCREG_FE_DEBUG_STATE_REQ_DMA_STATE 13 : 12 +#define GCREG_FE_DEBUG_STATE_REQ_DMA_STATE_End 13 +#define GCREG_FE_DEBUG_STATE_REQ_DMA_STATE_Start 12 +#define GCREG_FE_DEBUG_STATE_REQ_DMA_STATE_Type U02 + +#define GCREG_FE_DEBUG_STATE_CAL_STATE 15 : 14 +#define GCREG_FE_DEBUG_STATE_CAL_STATE_End 15 +#define GCREG_FE_DEBUG_STATE_CAL_STATE_Start 14 +#define GCREG_FE_DEBUG_STATE_CAL_STATE_Type U02 + +#define GCREG_FE_DEBUG_STATE_VE_REQ_STATE 17 : 16 +#define GCREG_FE_DEBUG_STATE_VE_REQ_STATE_End 17 +#define GCREG_FE_DEBUG_STATE_VE_REQ_STATE_Start 16 +#define GCREG_FE_DEBUG_STATE_VE_REQ_STATE_Type U02 + +/******************************************************************************* +** Register gcregFEDebugCurCmdAdr +*/ + +/* This is the command decoder address. The address is always physical so +** the MSB should always be 0. It has no reset value. +*/ + +#define GCREG_FE_DEBUG_CUR_CMD_ADR_Address 0x00664 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_MSB 15 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_LSB 0 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_BLK 0 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_Count 1 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_FieldMask 0xFFFFFFF8 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_ReadMask 0xFFFFFFF8 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_WriteMask 0x00000000 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_ResetValue 0x00000000 + +#define GCREG_FE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR 31 : 3 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR_End 31 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR_Start 3 +#define GCREG_FE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR_Type U29 + +/******************************************************************************* +** Register gcregFEDebugCmdLowReg +*/ + +#define GCREG_FE_DEBUG_CMD_LOW_REG_Address 0x00668 +#define GCREG_FE_DEBUG_CMD_LOW_REG_MSB 15 +#define GCREG_FE_DEBUG_CMD_LOW_REG_LSB 0 +#define GCREG_FE_DEBUG_CMD_LOW_REG_BLK 0 +#define GCREG_FE_DEBUG_CMD_LOW_REG_Count 1 +#define GCREG_FE_DEBUG_CMD_LOW_REG_FieldMask 0xFFFFFFFF +#define GCREG_FE_DEBUG_CMD_LOW_REG_ReadMask 0xFFFFFFFF +#define GCREG_FE_DEBUG_CMD_LOW_REG_WriteMask 0x00000000 +#define GCREG_FE_DEBUG_CMD_LOW_REG_ResetValue 0x00000000 + +/* Command register used by CmdState. */ +#define GCREG_FE_DEBUG_CMD_LOW_REG_CMD_LOW_REG 31 : 0 +#define GCREG_FE_DEBUG_CMD_LOW_REG_CMD_LOW_REG_End 31 +#define GCREG_FE_DEBUG_CMD_LOW_REG_CMD_LOW_REG_Start 0 +#define GCREG_FE_DEBUG_CMD_LOW_REG_CMD_LOW_REG_Type U32 + +/******************************************************************************* +** Register gcregFEDebugCmdHiReg +*/ + +#define GCREG_FE_DEBUG_CMD_HI_REG_Address 0x0066C +#define GCREG_FE_DEBUG_CMD_HI_REG_MSB 15 +#define GCREG_FE_DEBUG_CMD_HI_REG_LSB 0 +#define GCREG_FE_DEBUG_CMD_HI_REG_BLK 0 +#define GCREG_FE_DEBUG_CMD_HI_REG_Count 1 +#define GCREG_FE_DEBUG_CMD_HI_REG_FieldMask 0xFFFFFFFF +#define GCREG_FE_DEBUG_CMD_HI_REG_ReadMask 0xFFFFFFFF +#define GCREG_FE_DEBUG_CMD_HI_REG_WriteMask 0x00000000 +#define GCREG_FE_DEBUG_CMD_HI_REG_ResetValue 0x00000000 + +/* Command register used by CmdState. */ +#define GCREG_FE_DEBUG_CMD_HI_REG_CMD_HI_REG 31 : 0 +#define GCREG_FE_DEBUG_CMD_HI_REG_CMD_HI_REG_End 31 +#define GCREG_FE_DEBUG_CMD_HI_REG_CMD_HI_REG_Start 0 +#define GCREG_FE_DEBUG_CMD_HI_REG_CMD_HI_REG_Type U32 + +/******************************************************************************* +** State gcregMMUSafeAddress +*/ + +/* A 64-byte address that will acts as a 'safe' zone. Any address that would +** cause an exception is routed to this safe zone. Reads will happend and +** writes will go to this address, but with a write-enable of 0. This +** register can only be programmed once after a reset - any attempt to write +** to this register after the initial write-after-reset will be ignored. +*/ + +#define gcregMMUSafeAddressRegAddrs 0x0060 +#define GCREG_MMU_SAFE_ADDRESS_MSB 15 +#define GCREG_MMU_SAFE_ADDRESS_LSB 0 +#define GCREG_MMU_SAFE_ADDRESS_BLK 0 +#define GCREG_MMU_SAFE_ADDRESS_Count 1 +#define GCREG_MMU_SAFE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_MMU_SAFE_ADDRESS_ReadMask 0xFFFFFFC0 +#define GCREG_MMU_SAFE_ADDRESS_WriteMask 0xFFFFFFC0 +#define GCREG_MMU_SAFE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_MMU_SAFE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_MMU_SAFE_ADDRESS_ADDRESS_End 31 +#define GCREG_MMU_SAFE_ADDRESS_ADDRESS_Start 0 +#define GCREG_MMU_SAFE_ADDRESS_ADDRESS_Type U32 + +/******************************************************************************* +** State gcregMMUConfiguration +*/ + +/* This register controls the master TLB of the MMU. */ + +#define gcregMMUConfigurationRegAddrs 0x0061 +#define GCREG_MMU_CONFIGURATION_MSB 15 +#define GCREG_MMU_CONFIGURATION_LSB 0 +#define GCREG_MMU_CONFIGURATION_BLK 0 +#define GCREG_MMU_CONFIGURATION_Count 1 +#define GCREG_MMU_CONFIGURATION_FieldMask 0xFFFFFD99 +#define GCREG_MMU_CONFIGURATION_ReadMask 0xFFFFFD99 +#define GCREG_MMU_CONFIGURATION_WriteMask 0xFFFFFD99 +#define GCREG_MMU_CONFIGURATION_ResetValue 0x00000000 + +/* Upper bits of the page aligned (depending on the mode) master TLB. */ +#define GCREG_MMU_CONFIGURATION_ADDRESS 31 : 10 +#define GCREG_MMU_CONFIGURATION_ADDRESS_End 31 +#define GCREG_MMU_CONFIGURATION_ADDRESS_Start 10 +#define GCREG_MMU_CONFIGURATION_ADDRESS_Type U22 + +/* Mask for Address field. */ +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS 8 : 8 +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS_End 8 +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS_Start 8 +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS_Type U01 +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS_ENABLED 0x0 +#define GCREG_MMU_CONFIGURATION_MASK_ADDRESS_MASKED 0x1 + +/* Mask Flush field. */ +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH 7 : 7 +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH_End 7 +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH_Start 7 +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH_Type U01 +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH_ENABLED 0x0 +#define GCREG_MMU_CONFIGURATION_MASK_FLUSH_MASKED 0x1 + +/* Flush the MMU caches. */ +#define GCREG_MMU_CONFIGURATION_FLUSH 4 : 4 +#define GCREG_MMU_CONFIGURATION_FLUSH_End 4 +#define GCREG_MMU_CONFIGURATION_FLUSH_Start 4 +#define GCREG_MMU_CONFIGURATION_FLUSH_Type U01 +#define GCREG_MMU_CONFIGURATION_FLUSH_FLUSH 0x1 + +/* Mask Mode field. */ +#define GCREG_MMU_CONFIGURATION_MASK_MODE 3 : 3 +#define GCREG_MMU_CONFIGURATION_MASK_MODE_End 3 +#define GCREG_MMU_CONFIGURATION_MASK_MODE_Start 3 +#define GCREG_MMU_CONFIGURATION_MASK_MODE_Type U01 +#define GCREG_MMU_CONFIGURATION_MASK_MODE_ENABLED 0x0 +#define GCREG_MMU_CONFIGURATION_MASK_MODE_MASKED 0x1 + +/* Set the mode for the Master TLB. */ +#define GCREG_MMU_CONFIGURATION_MODE 0 : 0 +#define GCREG_MMU_CONFIGURATION_MODE_End 0 +#define GCREG_MMU_CONFIGURATION_MODE_Start 0 +#define GCREG_MMU_CONFIGURATION_MODE_Type U01 +/* The Master TLB is 4kB in size and contains 1024 entries. Each page can be ** +** 4kB or 64kB in size. */ +#define GCREG_MMU_CONFIGURATION_MODE_MODE4_K 0x0 +/* The Master TLB is 1kB in size and contains 256 entries. Each page can be ** +** 4kB, 64kB, 1MB or 16MB in size. */ +#define GCREG_MMU_CONFIGURATION_MODE_MODE1_K 0x1 + +struct gcregmmuconfiguration { + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MODE */ + unsigned int master:1; + + /* gcregMMUConfiguration:reserved */ + unsigned int _reserved_1_2:2; + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_MODE */ + unsigned int master_mask:1; + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_FLUSH */ + unsigned int flush:1; + + /* gcregMMUConfiguration:reserved */ + unsigned int _reserved_5_6:2; + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_FLUSH */ + unsigned int flush_mask:1; + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_ADDRESS */ + unsigned int address_mask:1; + + /* gcregMMUConfiguration:reserved */ + unsigned int _reserved_9:1; + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_ADDRESS */ + unsigned int address:22; +}; + +static const struct gcregmmuconfiguration gcregmmu_flush = { + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MODE */ + 0, + + /* gcregMMUConfiguration:reserved */ + 0, + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_MODE */ + GCREG_MMU_CONFIGURATION_MASK_MODE_MASKED, + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_FLUSH */ + GCREG_MMU_CONFIGURATION_FLUSH_FLUSH, + + /* gcregMMUConfiguration:reserved */ + 0, + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_FLUSH */ + GCREG_MMU_CONFIGURATION_MASK_FLUSH_ENABLED, + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_MASK_ADDRESS */ + GCREG_MMU_CONFIGURATION_MASK_ADDRESS_MASKED, + + /* gcregMMUConfiguration:reserved */ + 0, + + /* gcregMMUConfiguration:GCREG_MMU_CONFIGURATION_ADDRESS */ + 0 +}; + +/******************************************************************************* +** Register gcregMMUStatus +*/ + +/* Status register that holds which MMU generated an exception. */ + +#define GCREG_MMU_STATUS_Address 0x00188 +#define GCREG_MMU_STATUS_MSB 15 +#define GCREG_MMU_STATUS_LSB 0 +#define GCREG_MMU_STATUS_BLK 0 +#define GCREG_MMU_STATUS_Count 1 +#define GCREG_MMU_STATUS_FieldMask 0x00003333 +#define GCREG_MMU_STATUS_ReadMask 0x00003333 +#define GCREG_MMU_STATUS_WriteMask 0x00000000 +#define GCREG_MMU_STATUS_ResetValue 0x00000000 + +/* MMU 3 caused an exception and the fourth gcregMMUException register holds ** +** the offending address. */ +#define GCREG_MMU_STATUS_EXCEPTION3 13 : 12 +#define GCREG_MMU_STATUS_EXCEPTION3_End 13 +#define GCREG_MMU_STATUS_EXCEPTION3_Start 12 +#define GCREG_MMU_STATUS_EXCEPTION3_Type U02 +#define GCREG_MMU_STATUS_EXCEPTION3_SLAVE_NOT_PRESENT 0x1 +#define GCREG_MMU_STATUS_EXCEPTION3_PAGE_NOT_PRESENT 0x2 +#define GCREG_MMU_STATUS_EXCEPTION3_WRITE_VIOLATION 0x3 + +/* MMU 2 caused an exception and the third gcregMMUException register holds ** +** the offending address. */ +#define GCREG_MMU_STATUS_EXCEPTION2 9 : 8 +#define GCREG_MMU_STATUS_EXCEPTION2_End 9 +#define GCREG_MMU_STATUS_EXCEPTION2_Start 8 +#define GCREG_MMU_STATUS_EXCEPTION2_Type U02 +#define GCREG_MMU_STATUS_EXCEPTION2_SLAVE_NOT_PRESENT 0x1 +#define GCREG_MMU_STATUS_EXCEPTION2_PAGE_NOT_PRESENT 0x2 +#define GCREG_MMU_STATUS_EXCEPTION2_WRITE_VIOLATION 0x3 + +/* MMU 1 caused an exception and the second gcregMMUException register holds ** +** the offending address. */ +#define GCREG_MMU_STATUS_EXCEPTION1 5 : 4 +#define GCREG_MMU_STATUS_EXCEPTION1_End 5 +#define GCREG_MMU_STATUS_EXCEPTION1_Start 4 +#define GCREG_MMU_STATUS_EXCEPTION1_Type U02 +#define GCREG_MMU_STATUS_EXCEPTION1_SLAVE_NOT_PRESENT 0x1 +#define GCREG_MMU_STATUS_EXCEPTION1_PAGE_NOT_PRESENT 0x2 +#define GCREG_MMU_STATUS_EXCEPTION1_WRITE_VIOLATION 0x3 + +/* MMU 0 caused an exception and the first gcregMMUException register holds ** +** the offending address. */ +#define GCREG_MMU_STATUS_EXCEPTION0 1 : 0 +#define GCREG_MMU_STATUS_EXCEPTION0_End 1 +#define GCREG_MMU_STATUS_EXCEPTION0_Start 0 +#define GCREG_MMU_STATUS_EXCEPTION0_Type U02 +#define GCREG_MMU_STATUS_EXCEPTION0_SLAVE_NOT_PRESENT 0x1 +#define GCREG_MMU_STATUS_EXCEPTION0_PAGE_NOT_PRESENT 0x2 +#define GCREG_MMU_STATUS_EXCEPTION0_WRITE_VIOLATION 0x3 + +/******************************************************************************* +** Register gcregMMUControl +*/ + +/* Control register that enables the MMU (only time shot). */ + +#define GCREG_MMU_CONTROL_Address 0x0018C +#define GCREG_MMU_CONTROL_MSB 15 +#define GCREG_MMU_CONTROL_LSB 0 +#define GCREG_MMU_CONTROL_BLK 0 +#define GCREG_MMU_CONTROL_Count 1 +#define GCREG_MMU_CONTROL_FieldMask 0x00000001 +#define GCREG_MMU_CONTROL_ReadMask 0x00000000 +#define GCREG_MMU_CONTROL_WriteMask 0x00000001 +#define GCREG_MMU_CONTROL_ResetValue 0x00000000 + +/* Enable the MMU. For security reasons, once the MMU is enabled it cannot ** +** be disabled anymore. */ +#define GCREG_MMU_CONTROL_ENABLE 0 : 0 +#define GCREG_MMU_CONTROL_ENABLE_End 0 +#define GCREG_MMU_CONTROL_ENABLE_Start 0 +#define GCREG_MMU_CONTROL_ENABLE_Type U01 +#define GCREG_MMU_CONTROL_ENABLE_ENABLE 0x1 + +/******************************************************************************* +** State/Register gcregMMUException (4 in total) +*/ + +/* Up to 4 registers that will hold the original address that generated an +** exception. Use load state form for exception resolution. +*/ + +#define gcregMMUExceptionRegAddrs 0x0064 +#define GCREG_MMU_EXCEPTION_Address 0x00190 +#define GCREG_MMU_EXCEPTION_MSB 15 +#define GCREG_MMU_EXCEPTION_LSB 2 +#define GCREG_MMU_EXCEPTION_BLK 2 +#define GCREG_MMU_EXCEPTION_Count 4 +#define GCREG_MMU_EXCEPTION_FieldMask 0xFFFFFFFF +#define GCREG_MMU_EXCEPTION_ReadMask 0xFFFFFFFF +#define GCREG_MMU_EXCEPTION_WriteMask 0xFFFFFFFF +#define GCREG_MMU_EXCEPTION_ResetValue 0x00000000 + +#define GCREG_MMU_EXCEPTION_ADDRESS 31 : 0 +#define GCREG_MMU_EXCEPTION_ADDRESS_End 31 +#define GCREG_MMU_EXCEPTION_ADDRESS_Start 0 +#define GCREG_MMU_EXCEPTION_ADDRESS_Type U32 + +/******************************************************************************* +** Register gcModulePowerControls +*/ + +/* Control register for module level power controls. */ + +#define GC_MODULE_POWER_CONTROLS_Address 0x00100 +#define GC_MODULE_POWER_CONTROLS_MSB 15 +#define GC_MODULE_POWER_CONTROLS_LSB 0 +#define GC_MODULE_POWER_CONTROLS_BLK 0 +#define GC_MODULE_POWER_CONTROLS_Count 1 +#define GC_MODULE_POWER_CONTROLS_FieldMask 0xFFFF00F7 +#define GC_MODULE_POWER_CONTROLS_ReadMask 0xFFFF00F7 +#define GC_MODULE_POWER_CONTROLS_WriteMask 0xFFFF00F7 +#define GC_MODULE_POWER_CONTROLS_ResetValue 0x00140020 + +/* Enables module level clock gating. */ +#define GC_MODULE_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING 0 : 0 +#define GC_MODULE_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING_End 0 +#define GC_MODULE_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING_Start 0 +#define GC_MODULE_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING_Type U01 + +/* Disables module level clock gating for stall condition. */ +#define GC_MODULE_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING 1 : 1 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_End 1 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_Start 1 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_Type U01 + +/* Disables module level clock gating for starve/idle condition. */ +#define GC_MODULE_POWER_CONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING 2 : 2 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_End 2 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_Start 2 +#define GC_MODULE_POWER_CONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_Type U01 + +/* Number of clock cycles to wait after turning on the clock. */ +#define GC_MODULE_POWER_CONTROLS_TURN_ON_COUNTER 7 : 4 +#define GC_MODULE_POWER_CONTROLS_TURN_ON_COUNTER_End 7 +#define GC_MODULE_POWER_CONTROLS_TURN_ON_COUNTER_Start 4 +#define GC_MODULE_POWER_CONTROLS_TURN_ON_COUNTER_Type U04 + +/* Counter value for clock gating the module if the module is idle for this ** +** amount of clock cycles. */ +#define GC_MODULE_POWER_CONTROLS_TURN_OFF_COUNTER 31 : 16 +#define GC_MODULE_POWER_CONTROLS_TURN_OFF_COUNTER_End 31 +#define GC_MODULE_POWER_CONTROLS_TURN_OFF_COUNTER_Start 16 +#define GC_MODULE_POWER_CONTROLS_TURN_OFF_COUNTER_Type U16 + +/******************************************************************************* +** Register gcModulePowerModuleControl +*/ + +/* Module level control registers. */ + +#define GC_MODULE_POWER_MODULE_CONTROL_Address 0x00104 +#define GC_MODULE_POWER_MODULE_CONTROL_MSB 15 +#define GC_MODULE_POWER_MODULE_CONTROL_LSB 0 +#define GC_MODULE_POWER_MODULE_CONTROL_BLK 0 +#define GC_MODULE_POWER_MODULE_CONTROL_Count 1 +#define GC_MODULE_POWER_MODULE_CONTROL_FieldMask 0x00000007 +#define GC_MODULE_POWER_MODULE_CONTROL_ReadMask 0x00000007 +#define GC_MODULE_POWER_MODULE_CONTROL_WriteMask 0x00000007 +#define GC_MODULE_POWER_MODULE_CONTROL_ResetValue 0x00000000 + +/* Disables module level clock gating for FE. */ +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_FE 0 : 0 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_FE_End 0 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_FE_Start 0 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_FE_Type U01 + +/* Disables module level clock gating for DE. */ +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_DE 1 : 1 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_DE_End 1 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_DE_Start 1 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_DE_Type U01 + +/* Disables module level clock gating for PE. */ +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_PE 2 : 2 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_PE_End 2 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_PE_Start 2 +#define GC_MODULE_POWER_MODULE_CONTROL_DISABLE_MODULE_CLOCK_GATING_PE_Type U01 + +/******************************************************************************* +** Register gcModulePowerModuleStatus +*/ + +/* Module level control status. */ + +#define GC_MODULE_POWER_MODULE_STATUS_Address 0x00108 +#define GC_MODULE_POWER_MODULE_STATUS_MSB 15 +#define GC_MODULE_POWER_MODULE_STATUS_LSB 0 +#define GC_MODULE_POWER_MODULE_STATUS_BLK 0 +#define GC_MODULE_POWER_MODULE_STATUS_Count 1 +#define GC_MODULE_POWER_MODULE_STATUS_FieldMask 0x00000007 +#define GC_MODULE_POWER_MODULE_STATUS_ReadMask 0x00000007 +#define GC_MODULE_POWER_MODULE_STATUS_WriteMask 0x00000000 +#define GC_MODULE_POWER_MODULE_STATUS_ResetValue 0x00000000 + +/* Module level clock gating is ON for FE. */ +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_FE 0 : 0 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_FE_End 0 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_FE_Start 0 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_FE_Type U01 + +/* Module level clock gating is ON for DE. */ +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_DE 1 : 1 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_DE_End 1 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_DE_Start 1 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_DE_Type U01 + +/* Module level clock gating is ON for PE. */ +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_PE 2 : 2 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_PE_End 2 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_PE_Start 2 +#define GC_MODULE_POWER_MODULE_STATUS_MODULE_CLOCK_GATED_PE_Type U01 + +/******************************************************************************* +** State gcregSrcAddress +*/ + +/* 32-bit aligned base address of the source surface. */ + +#define gcregSrcAddressRegAddrs 0x0480 +#define GCREG_SRC_ADDRESS_MSB 15 +#define GCREG_SRC_ADDRESS_LSB 0 +#define GCREG_SRC_ADDRESS_BLK 0 +#define GCREG_SRC_ADDRESS_Count 1 +#define GCREG_SRC_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_SRC_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_SRC_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_SRC_ADDRESS_ResetValue 0x00000000 + +#define GCREG_SRC_ADDRESS_ADDRESS 31 : 0 +#define GCREG_SRC_ADDRESS_ADDRESS_End 30 +#define GCREG_SRC_ADDRESS_ADDRESS_Start 0 +#define GCREG_SRC_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregSrcStride +*/ + +/* Stride of the source surface in bytes. To calculate the stride multiply +** the surface width in pixels (8-pixel aligned) by the number of bytes per +** pixel. +*/ + +#define gcregSrcStrideRegAddrs 0x0481 +#define GCREG_SRC_STRIDE_MSB 15 +#define GCREG_SRC_STRIDE_LSB 0 +#define GCREG_SRC_STRIDE_BLK 0 +#define GCREG_SRC_STRIDE_Count 1 +#define GCREG_SRC_STRIDE_FieldMask 0x0003FFFF +#define GCREG_SRC_STRIDE_ReadMask 0x0003FFFC +#define GCREG_SRC_STRIDE_WriteMask 0x0003FFFC +#define GCREG_SRC_STRIDE_ResetValue 0x00000000 + +#define GCREG_SRC_STRIDE_STRIDE 17 : 0 +#define GCREG_SRC_STRIDE_STRIDE_End 17 +#define GCREG_SRC_STRIDE_STRIDE_Start 0 +#define GCREG_SRC_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregSrcRotationConfig +*/ + +/* 90 degree rotation configuration for the source surface. Width field +** specifies the width of the surface in pixels. +*/ + +#define gcregSrcRotationConfigRegAddrs 0x0482 +#define GCREG_SRC_ROTATION_CONFIG_MSB 15 +#define GCREG_SRC_ROTATION_CONFIG_LSB 0 +#define GCREG_SRC_ROTATION_CONFIG_BLK 0 +#define GCREG_SRC_ROTATION_CONFIG_Count 1 +#define GCREG_SRC_ROTATION_CONFIG_FieldMask 0x0001FFFF +#define GCREG_SRC_ROTATION_CONFIG_ReadMask 0x0001FFFF +#define GCREG_SRC_ROTATION_CONFIG_WriteMask 0x0001FFFF +#define GCREG_SRC_ROTATION_CONFIG_ResetValue 0x00000000 + +#define GCREG_SRC_ROTATION_CONFIG_WIDTH 15 : 0 +#define GCREG_SRC_ROTATION_CONFIG_WIDTH_End 15 +#define GCREG_SRC_ROTATION_CONFIG_WIDTH_Start 0 +#define GCREG_SRC_ROTATION_CONFIG_WIDTH_Type U16 + +#define GCREG_SRC_ROTATION_CONFIG_ROTATION 16 : 16 +#define GCREG_SRC_ROTATION_CONFIG_ROTATION_End 16 +#define GCREG_SRC_ROTATION_CONFIG_ROTATION_Start 16 +#define GCREG_SRC_ROTATION_CONFIG_ROTATION_Type U01 +#define GCREG_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x0 +#define GCREG_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x1 + +struct gcregsrcrotationconfig { + /* gcregSrcRotationConfigRegAddrs:GCREG_SRC_ROTATION_CONFIG_WIDTH */ + unsigned int surf_width:16; + + /* gcregSrcRotationConfigRegAddrs:GCREG_SRC_ROTATION_CONFIG_ROTATION */ + unsigned int enable:1; + + /* gcregSrcRotationConfigRegAddrs:reserved */ + unsigned int _reserved_17_31:15; +}; + +/******************************************************************************* +** State gcregSrcConfig +*/ + +/* Source surface configuration register. */ + +#define gcregSrcConfigRegAddrs 0x0483 +#define GCREG_SRC_CONFIG_MSB 15 +#define GCREG_SRC_CONFIG_LSB 0 +#define GCREG_SRC_CONFIG_BLK 0 +#define GCREG_SRC_CONFIG_Count 1 +#define GCREG_SRC_CONFIG_FieldMask 0xFF31B1FF +#define GCREG_SRC_CONFIG_ReadMask 0xFF31B1FF +#define GCREG_SRC_CONFIG_WriteMask 0xFF31B1FF +#define GCREG_SRC_CONFIG_ResetValue 0x00000000 + +/* Control source endianess. */ +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL 31 : 30 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_End 31 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_Start 30 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_Type U02 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_NO_SWAP 0x0 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_SWAP_WORD 0x1 +#define GCREG_SRC_CONFIG_ENDIAN_CONTROL_SWAP_DWORD 0x2 + +/* Disable 420 L2 cache NOTE: the field is valid for chips with 420 L2 cache ** +** defined. */ +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE 29 : 29 +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_End 29 +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_Start 29 +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_Type U01 +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_ENABLED 0x0 +#define GCREG_SRC_CONFIG_DISABLE420_L2_CACHE_DISABLED 0x1 + +/* Defines the pixel format of the source surface. */ +#define GCREG_SRC_CONFIG_SOURCE_FORMAT 28 : 24 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_End 28 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_Start 24 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_Type U05 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_X4R4G4B4 0x00 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_A4R4G4B4 0x01 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_X1R5G5B5 0x02 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_A1R5G5B5 0x03 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_R5G6B5 0x04 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_X8R8G8B8 0x05 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_A8R8G8B8 0x06 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_YUY2 0x07 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_UYVY 0x08 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_INDEX8 0x09 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_MONOCHROME 0x0A +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_YV12 0x0F +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_A8 0x10 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_NV12 0x11 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_NV16 0x12 +#define GCREG_SRC_CONFIG_SOURCE_FORMAT_RG16 0x13 + +/* Color channel swizzles. */ +#define GCREG_SRC_CONFIG_SWIZZLE 21 : 20 +#define GCREG_SRC_CONFIG_SWIZZLE_End 21 +#define GCREG_SRC_CONFIG_SWIZZLE_Start 20 +#define GCREG_SRC_CONFIG_SWIZZLE_Type U02 +#define GCREG_SRC_CONFIG_SWIZZLE_ARGB 0x0 +#define GCREG_SRC_CONFIG_SWIZZLE_RGBA 0x1 +#define GCREG_SRC_CONFIG_SWIZZLE_ABGR 0x2 +#define GCREG_SRC_CONFIG_SWIZZLE_BGRA 0x3 + +/* Mono expansion: if 0, transparency color will be 0, otherwise transparency ** +** color will be 1. */ +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY 15 : 15 +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY_End 15 +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY_Start 15 +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY_Type U01 +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x0 +#define GCREG_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x1 + +/* Mono expansion or masked blit: stream packing in pixels. Determines how ** +** many horizontal pixels are there per each 32-bit chunk. For example, if ** +** set to Packed8, each 32-bit chunk is 8-pixel wide, which also means that ** +** it defines 4 vertical lines of pixels. */ +#define GCREG_SRC_CONFIG_PACK 13 : 12 +#define GCREG_SRC_CONFIG_PACK_End 13 +#define GCREG_SRC_CONFIG_PACK_Start 12 +#define GCREG_SRC_CONFIG_PACK_Type U02 +#define GCREG_SRC_CONFIG_PACK_PACKED8 0x0 +#define GCREG_SRC_CONFIG_PACK_PACKED16 0x1 +#define GCREG_SRC_CONFIG_PACK_PACKED32 0x2 +#define GCREG_SRC_CONFIG_PACK_UNPACKED 0x3 + +/* Source data location: set to STREAM for mono expansion blits or masked ** +** blits. For mono expansion blits the complete bitmap comes from the command ** +** stream. For masked blits the source data comes from the memory and the ** +** mask from the command stream. */ +#define GCREG_SRC_CONFIG_LOCATION 8 : 8 +#define GCREG_SRC_CONFIG_LOCATION_End 8 +#define GCREG_SRC_CONFIG_LOCATION_Start 8 +#define GCREG_SRC_CONFIG_LOCATION_Type U01 +#define GCREG_SRC_CONFIG_LOCATION_MEMORY 0x0 +#define GCREG_SRC_CONFIG_LOCATION_STREAM 0x1 + +/* Source linear/tiled address computation control. */ +#define GCREG_SRC_CONFIG_TILED 7 : 7 +#define GCREG_SRC_CONFIG_TILED_End 7 +#define GCREG_SRC_CONFIG_TILED_Start 7 +#define GCREG_SRC_CONFIG_TILED_Type U01 +#define GCREG_SRC_CONFIG_TILED_DISABLED 0x0 +#define GCREG_SRC_CONFIG_TILED_ENABLED 0x1 + +/* If set to ABSOLUTE, the source coordinates are treated as absolute ** +** coordinates inside the source surface. If set to RELATIVE, the source ** +** coordinates are treated as the offsets from the destination coordinates ** +** with the source size equal to the size of the destination. */ +#define GCREG_SRC_CONFIG_SRC_RELATIVE 6 : 6 +#define GCREG_SRC_CONFIG_SRC_RELATIVE_End 6 +#define GCREG_SRC_CONFIG_SRC_RELATIVE_Start 6 +#define GCREG_SRC_CONFIG_SRC_RELATIVE_Type U01 +#define GCREG_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x0 +#define GCREG_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x1 + +struct gcregsrcconfig { + /* gcregSrcConfigRegAddrs:reserved */ + unsigned int _reserved_0_5:6; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_SRC_RELATIVE */ + unsigned int relative:1; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_TILED */ + unsigned int tiled:1; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_LOCATION */ + unsigned int stream:1; + + /* gcregSrcConfigRegAddrs:reserved */ + unsigned int _reserved_9_11:3; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_PACK */ + unsigned int monopack:2; + + /* gcregSrcConfigRegAddrs:reserved */ + unsigned int _reserved_14:1; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_MONO_TRANSPARENCY */ + unsigned int monotransp:1; + + /* gcregSrcConfigRegAddrs:reserved */ + unsigned int _reserved_16_19:4; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_SWIZZLE */ + unsigned int swizzle:2; + + /* gcregSrcConfigRegAddrs:reserved */ + unsigned int _reserved_22_23:2; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_SOURCE_FORMAT */ + unsigned int format:5; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_DISABLE420_L2_CACHE */ + unsigned int disable420L2cache:1; + + /* gcregSrcConfigRegAddrs:GCREG_SRC_CONFIG_ENDIAN_CONTROL */ + unsigned int endian:2; +}; + +/******************************************************************************* +** State gcregSrcOrigin +*/ + +/* Absolute or relative (see SRC_RELATIVE field of gcregSrcConfig register) X +** and Y coordinates in pixels of the top left corner of the source rectangle +** within the source surface. +*/ + +#define gcregSrcOriginRegAddrs 0x0484 +#define GCREG_SRC_ORIGIN_MSB 15 +#define GCREG_SRC_ORIGIN_LSB 0 +#define GCREG_SRC_ORIGIN_BLK 0 +#define GCREG_SRC_ORIGIN_Count 1 +#define GCREG_SRC_ORIGIN_FieldMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_ReadMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_WriteMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_ResetValue 0x00000000 + +#define GCREG_SRC_ORIGIN_Y 31 : 16 +#define GCREG_SRC_ORIGIN_Y_End 31 +#define GCREG_SRC_ORIGIN_Y_Start 16 +#define GCREG_SRC_ORIGIN_Y_Type U16 + +#define GCREG_SRC_ORIGIN_X 15 : 0 +#define GCREG_SRC_ORIGIN_X_End 15 +#define GCREG_SRC_ORIGIN_X_Start 0 +#define GCREG_SRC_ORIGIN_X_Type U16 + +struct gcregsrcorigin { + /* gcregSrcOriginRegAddrs:GCREG_SRC_ORIGIN_X */ + unsigned int x:16; + + /* gcregSrcOriginRegAddrs:GCREG_SRC_ORIGIN_Y */ + unsigned int y:16; +}; + +static const struct gcregsrcorigin gcregsrcorigin_min = { + /* gcregSrcOriginRegAddrs:GCREG_SRC_ORIGIN_X */ + 0, + + /* gcregSrcOriginRegAddrs:GCREG_SRC_ORIGIN_Y */ + 0 +}; + +/******************************************************************************* +** State gcregSrcSize +*/ + +/* Width and height of the source rectangle in pixels. If the source is +** relative (see SRC_RELATIVE field of gcregSrcConfig register) or a regular +** bitblt is being performed without stretching, this register is ignored and +** the source size is assumed to be the same as the destination. +*/ + +#define gcregSrcSizeRegAddrs 0x0485 +#define GCREG_SRC_SIZE_MSB 15 +#define GCREG_SRC_SIZE_LSB 0 +#define GCREG_SRC_SIZE_BLK 0 +#define GCREG_SRC_SIZE_Count 1 +#define GCREG_SRC_SIZE_FieldMask 0xFFFFFFFF +#define GCREG_SRC_SIZE_ReadMask 0xFFFFFFFF +#define GCREG_SRC_SIZE_WriteMask 0xFFFFFFFF +#define GCREG_SRC_SIZE_ResetValue 0x00000000 + +#define GCREG_SRC_SIZE_Y 31 : 16 +#define GCREG_SRC_SIZE_Y_End 31 +#define GCREG_SRC_SIZE_Y_Start 16 +#define GCREG_SRC_SIZE_Y_Type U16 + +#define GCREG_SRC_SIZE_X 15 : 0 +#define GCREG_SRC_SIZE_X_End 15 +#define GCREG_SRC_SIZE_X_Start 0 +#define GCREG_SRC_SIZE_X_Type U16 + +struct gcregsrcsize { + /* gcregSrcOriginRegAddrs:GCREG_SRC_SIZE_X */ + unsigned int width:16; + + /* gcregSrcOriginRegAddrs:GCREG_SRC_SIZE_Y */ + unsigned int height:16; +}; + +static const struct gcregsrcsize gcregsrcsize_max = { + /* gcregSrcOriginRegAddrs:GCREG_SRC_SIZE_X */ + 32767, + + /* gcregSrcOriginRegAddrs:GCREG_SRC_SIZE_Y */ + 32767 +}; + +/******************************************************************************* +** State gcregSrcColorBg +*/ + +/* In mono expansion defines the source color if the mono pixel is 0. The color +** must be set in A8R8G8B8 format. In color blits defines the source +** transparency color and must be of the same format as the source surface. +*/ + +#define gcregSrcColorBgRegAddrs 0x0486 +#define GCREG_SRC_COLOR_BG_MSB 15 +#define GCREG_SRC_COLOR_BG_LSB 0 +#define GCREG_SRC_COLOR_BG_BLK 0 +#define GCREG_SRC_COLOR_BG_Count 1 +#define GCREG_SRC_COLOR_BG_FieldMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_BG_ReadMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_BG_WriteMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_BG_ResetValue 0x00000000 + +#define GCREG_SRC_COLOR_BG_ALPHA 31 : 24 +#define GCREG_SRC_COLOR_BG_ALPHA_End 31 +#define GCREG_SRC_COLOR_BG_ALPHA_Start 24 +#define GCREG_SRC_COLOR_BG_ALPHA_Type U08 + +#define GCREG_SRC_COLOR_BG_RED 23 : 16 +#define GCREG_SRC_COLOR_BG_RED_End 23 +#define GCREG_SRC_COLOR_BG_RED_Start 16 +#define GCREG_SRC_COLOR_BG_RED_Type U08 + +#define GCREG_SRC_COLOR_BG_GREEN 15 : 8 +#define GCREG_SRC_COLOR_BG_GREEN_End 15 +#define GCREG_SRC_COLOR_BG_GREEN_Start 8 +#define GCREG_SRC_COLOR_BG_GREEN_Type U08 + +#define GCREG_SRC_COLOR_BG_BLUE 7 : 0 +#define GCREG_SRC_COLOR_BG_BLUE_End 7 +#define GCREG_SRC_COLOR_BG_BLUE_Start 0 +#define GCREG_SRC_COLOR_BG_BLUE_Type U08 + +/******************************************************************************* +** State gcregSrcColorFg +*/ + +/* In mono expansion defines the source color if the mono pixel is 1. The color +** must be set in A8R8G8B8. +*/ + +#define gcregSrcColorFgRegAddrs 0x0487 +#define GCREG_SRC_COLOR_FG_MSB 15 +#define GCREG_SRC_COLOR_FG_LSB 0 +#define GCREG_SRC_COLOR_FG_BLK 0 +#define GCREG_SRC_COLOR_FG_Count 1 +#define GCREG_SRC_COLOR_FG_FieldMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_FG_ReadMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_FG_WriteMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_FG_ResetValue 0x00000000 + +#define GCREG_SRC_COLOR_FG_ALPHA 31 : 24 +#define GCREG_SRC_COLOR_FG_ALPHA_End 31 +#define GCREG_SRC_COLOR_FG_ALPHA_Start 24 +#define GCREG_SRC_COLOR_FG_ALPHA_Type U08 + +#define GCREG_SRC_COLOR_FG_RED 23 : 16 +#define GCREG_SRC_COLOR_FG_RED_End 23 +#define GCREG_SRC_COLOR_FG_RED_Start 16 +#define GCREG_SRC_COLOR_FG_RED_Type U08 + +#define GCREG_SRC_COLOR_FG_GREEN 15 : 8 +#define GCREG_SRC_COLOR_FG_GREEN_End 15 +#define GCREG_SRC_COLOR_FG_GREEN_Start 8 +#define GCREG_SRC_COLOR_FG_GREEN_Type U08 + +#define GCREG_SRC_COLOR_FG_BLUE 7 : 0 +#define GCREG_SRC_COLOR_FG_BLUE_End 7 +#define GCREG_SRC_COLOR_FG_BLUE_Start 0 +#define GCREG_SRC_COLOR_FG_BLUE_Type U08 + +/******************************************************************************* +** State gcregStretchFactorLow +*/ + +#define gcregStretchFactorLowRegAddrs 0x0488 +#define GCREG_STRETCH_FACTOR_LOW_MSB 15 +#define GCREG_STRETCH_FACTOR_LOW_LSB 0 +#define GCREG_STRETCH_FACTOR_LOW_BLK 0 +#define GCREG_STRETCH_FACTOR_LOW_Count 1 +#define GCREG_STRETCH_FACTOR_LOW_FieldMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_LOW_ReadMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_LOW_WriteMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_LOW_ResetValue 0x00000000 + +/* Horizontal stretch factor in 15.16 fixed point format. The value is ** +** calculated using the following formula: factor = ((srcWidth - 1) << 16) / ** +** (dstWidth - 1). Stretch blit uses only the integer part of the value, ** +** while Filter blit uses all 31 bits. */ +#define GCREG_STRETCH_FACTOR_LOW_X 30 : 0 +#define GCREG_STRETCH_FACTOR_LOW_X_End 30 +#define GCREG_STRETCH_FACTOR_LOW_X_Start 0 +#define GCREG_STRETCH_FACTOR_LOW_X_Type U31 + +/******************************************************************************* +** State gcregStretchFactorHigh +*/ + +#define gcregStretchFactorHighRegAddrs 0x0489 +#define GCREG_STRETCH_FACTOR_HIGH_MSB 15 +#define GCREG_STRETCH_FACTOR_HIGH_LSB 0 +#define GCREG_STRETCH_FACTOR_LOW_HIGH_BLK 0 +#define GCREG_STRETCH_FACTOR_HIGH_Count 1 +#define GCREG_STRETCH_FACTOR_HIGH_FieldMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_HIGH_ReadMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_HIGH_WriteMask 0x7FFFFFFF +#define GCREG_STRETCH_FACTOR_HIGH_ResetValue 0x00000000 + +/* Vertical stretch factor in 15.16 fixed point format. The value is ** +** calculated using the following formula: factor = ((srcHeight - 1) << 16) / ** +** (dstHeight - 1). Stretch blit uses only the integer part of the value, ** +** while Filter blit uses all 31 bits. */ +#define GCREG_STRETCH_FACTOR_HIGH_Y 30 : 0 +#define GCREG_STRETCH_FACTOR_HIGH_Y_End 30 +#define GCREG_STRETCH_FACTOR_HIGH_Y_Start 0 +#define GCREG_STRETCH_FACTOR_HIGH_Y_Type U31 + +/******************************************************************************* +** State gcregDestAddress +*/ + +/* 32-bit aligned base address of the destination surface. */ + +#define gcregDestAddressRegAddrs 0x048A +#define GCREG_DEST_ADDRESS_MSB 15 +#define GCREG_DEST_ADDRESS_LSB 0 +#define GCREG_DEST_ADDRESS_BLK 0 +#define GCREG_DEST_ADDRESS_Count 1 +#define GCREG_DEST_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_DEST_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_DEST_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_DEST_ADDRESS_ResetValue 0x00000000 + +#define GCREG_DEST_ADDRESS_ADDRESS 31 : 0 +#define GCREG_DEST_ADDRESS_ADDRESS_End 30 +#define GCREG_DEST_ADDRESS_ADDRESS_Start 0 +#define GCREG_DEST_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregDestStride +*/ + +/* Stride of the destination surface in bytes. To calculate the stride +** multiply the surface width in pixels (8-pixel aligned) by the number of +** bytes per pixel. +*/ + +#define gcregDestStrideRegAddrs 0x048B +#define GCREG_DEST_STRIDE_MSB 15 +#define GCREG_DEST_STRIDE_LSB 0 +#define GCREG_DEST_STRIDE_BLK 0 +#define GCREG_DEST_STRIDE_Count 1 +#define GCREG_DEST_STRIDE_FieldMask 0x0003FFFF +#define GCREG_DEST_STRIDE_ReadMask 0x0003FFFC +#define GCREG_DEST_STRIDE_WriteMask 0x0003FFFC +#define GCREG_DEST_STRIDE_ResetValue 0x00000000 + +#define GCREG_DEST_STRIDE_STRIDE 17 : 0 +#define GCREG_DEST_STRIDE_STRIDE_End 17 +#define GCREG_DEST_STRIDE_STRIDE_Start 0 +#define GCREG_DEST_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregDestRotationConfig +*/ + +/* 90 degree rotation configuration for the destination surface. Width field +** specifies the width of the surface in pixels. +*/ + +#define gcregDestRotationConfigRegAddrs 0x048C +#define GCREG_DEST_ROTATION_CONFIG_MSB 15 +#define GCREG_DEST_ROTATION_CONFIG_LSB 0 +#define GCREG_DEST_ROTATION_CONFIG_BLK 0 +#define GCREG_DEST_ROTATION_CONFIG_Count 1 +#define GCREG_DEST_ROTATION_CONFIG_FieldMask 0x0001FFFF +#define GCREG_DEST_ROTATION_CONFIG_ReadMask 0x0001FFFF +#define GCREG_DEST_ROTATION_CONFIG_WriteMask 0x0001FFFF +#define GCREG_DEST_ROTATION_CONFIG_ResetValue 0x00000000 + +#define GCREG_DEST_ROTATION_CONFIG_WIDTH 15 : 0 +#define GCREG_DEST_ROTATION_CONFIG_WIDTH_End 15 +#define GCREG_DEST_ROTATION_CONFIG_WIDTH_Start 0 +#define GCREG_DEST_ROTATION_CONFIG_WIDTH_Type U16 + +#define GCREG_DEST_ROTATION_CONFIG_ROTATION 16 : 16 +#define GCREG_DEST_ROTATION_CONFIG_ROTATION_End 16 +#define GCREG_DEST_ROTATION_CONFIG_ROTATION_Start 16 +#define GCREG_DEST_ROTATION_CONFIG_ROTATION_Type U01 +#define GCREG_DEST_ROTATION_CONFIG_ROTATION_DISABLE 0x0 +#define GCREG_DEST_ROTATION_CONFIG_ROTATION_ENABLE 0x1 + +struct gcregdstrotationconfig { + /* gcregDestRotationConfigRegAddrs:GCREG_DEST_ROTATION_CONFIG_WIDTH */ + unsigned int surf_width:16; + + /* gcregDestRotationConfigRegAddrs:GCREG_DEST_ROTATION_CONFIG_ROTATION*/ + unsigned int enable:1; + + /* gcregDestRotationConfigRegAddrs:reserved */ + unsigned int _reserved_17_31:15; +}; + +/******************************************************************************* +** State gcregDestConfig +*/ + +/* Destination surface configuration register. */ + +#define gcregDestConfigRegAddrs 0x048D +#define GCREG_DEST_CONFIG_MSB 15 +#define GCREG_DEST_CONFIG_LSB 0 +#define GCREG_DEST_CONFIG_BLK 0 +#define GCREG_DEST_CONFIG_Count 1 +#define GCREG_DEST_CONFIG_FieldMask 0x0733F11F +#define GCREG_DEST_CONFIG_ReadMask 0x0733F11F +#define GCREG_DEST_CONFIG_WriteMask 0x0733F11F +#define GCREG_DEST_CONFIG_ResetValue 0x00000000 + +/* MinorTile. */ +#define GCREG_DEST_CONFIG_MINOR_TILED 26 : 26 +#define GCREG_DEST_CONFIG_MINOR_TILED_End 26 +#define GCREG_DEST_CONFIG_MINOR_TILED_Start 26 +#define GCREG_DEST_CONFIG_MINOR_TILED_Type U01 +#define GCREG_DEST_CONFIG_MINOR_TILED_DISABLED 0x0 +#define GCREG_DEST_CONFIG_MINOR_TILED_ENABLED 0x1 + +/* Performance fix for de. */ +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX 25 : 25 +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX_End 25 +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX_Start 25 +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX_Type U01 +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX_DISABLED 0x1 +#define GCREG_DEST_CONFIG_INTER_TILE_PER_FIX_ENABLED 0x0 + +/* Control GDI Strecth Blit. */ +#define GCREG_DEST_CONFIG_GDI_STRE 24 : 24 +#define GCREG_DEST_CONFIG_GDI_STRE_End 24 +#define GCREG_DEST_CONFIG_GDI_STRE_Start 24 +#define GCREG_DEST_CONFIG_GDI_STRE_Type U01 +#define GCREG_DEST_CONFIG_GDI_STRE_DISABLED 0x0 +#define GCREG_DEST_CONFIG_GDI_STRE_ENABLED 0x1 + +/* Control destination endianess. */ +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL 21 : 20 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_End 21 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_Start 20 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_Type U02 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_NO_SWAP 0x0 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_SWAP_WORD 0x1 +#define GCREG_DEST_CONFIG_ENDIAN_CONTROL_SWAP_DWORD 0x2 + +/* Color channel swizzles. */ +#define GCREG_DEST_CONFIG_SWIZZLE 17 : 16 +#define GCREG_DEST_CONFIG_SWIZZLE_End 17 +#define GCREG_DEST_CONFIG_SWIZZLE_Start 16 +#define GCREG_DEST_CONFIG_SWIZZLE_Type U02 +#define GCREG_DEST_CONFIG_SWIZZLE_ARGB 0x0 +#define GCREG_DEST_CONFIG_SWIZZLE_RGBA 0x1 +#define GCREG_DEST_CONFIG_SWIZZLE_ABGR 0x2 +#define GCREG_DEST_CONFIG_SWIZZLE_BGRA 0x3 + +/* Determines the type of primitive to be rendered. BIT_BLT_REVERSED and ** +** INVALID_COMMAND values are defined for internal use and should not be ** +** used. */ +#define GCREG_DEST_CONFIG_COMMAND 15 : 12 +#define GCREG_DEST_CONFIG_COMMAND_End 15 +#define GCREG_DEST_CONFIG_COMMAND_Start 12 +#define GCREG_DEST_CONFIG_COMMAND_Type U04 +#define GCREG_DEST_CONFIG_COMMAND_CLEAR 0x0 +#define GCREG_DEST_CONFIG_COMMAND_LINE 0x1 +#define GCREG_DEST_CONFIG_COMMAND_BIT_BLT 0x2 +#define GCREG_DEST_CONFIG_COMMAND_BIT_BLT_REVERSED 0x3 +#define GCREG_DEST_CONFIG_COMMAND_STRETCH_BLT 0x4 +#define GCREG_DEST_CONFIG_COMMAND_HOR_FILTER_BLT 0x5 +#define GCREG_DEST_CONFIG_COMMAND_VER_FILTER_BLT 0x6 +#define GCREG_DEST_CONFIG_COMMAND_ONE_PASS_FILTER_BLT 0x7 +#define GCREG_DEST_CONFIG_COMMAND_MULTI_SOURCE_BLT 0x8 + +/* Destination linear/tiled address computation control. Reserved field for ** +** future expansion. */ +#define GCREG_DEST_CONFIG_TILED 8 : 8 +#define GCREG_DEST_CONFIG_TILED_End 8 +#define GCREG_DEST_CONFIG_TILED_Start 8 +#define GCREG_DEST_CONFIG_TILED_Type U01 +#define GCREG_DEST_CONFIG_TILED_DISABLED 0x0 +#define GCREG_DEST_CONFIG_TILED_ENABLED 0x1 + +/* Defines the pixel format of the destination surface. */ +#define GCREG_DEST_CONFIG_FORMAT 4 : 0 +#define GCREG_DEST_CONFIG_FORMAT_End 4 +#define GCREG_DEST_CONFIG_FORMAT_Start 0 +#define GCREG_DEST_CONFIG_FORMAT_Type U05 +#define GCREG_DEST_CONFIG_FORMAT_X4R4G4B4 0x00 +#define GCREG_DEST_CONFIG_FORMAT_A4R4G4B4 0x01 +#define GCREG_DEST_CONFIG_FORMAT_X1R5G5B5 0x02 +#define GCREG_DEST_CONFIG_FORMAT_A1R5G5B5 0x03 +#define GCREG_DEST_CONFIG_FORMAT_R5G6B5 0x04 +#define GCREG_DEST_CONFIG_FORMAT_X8R8G8B8 0x05 +#define GCREG_DEST_CONFIG_FORMAT_A8R8G8B8 0x06 +#define GCREG_DEST_CONFIG_FORMAT_YUY2 0x07 +#define GCREG_DEST_CONFIG_FORMAT_UYVY 0x08 +#define GCREG_DEST_CONFIG_FORMAT_INDEX8 0x09 +#define GCREG_DEST_CONFIG_FORMAT_MONOCHROME 0x0A +#define GCREG_DEST_CONFIG_FORMAT_YV12 0x0F +#define GCREG_DEST_CONFIG_FORMAT_A8 0x10 +#define GCREG_DEST_CONFIG_FORMAT_NV12 0x11 +#define GCREG_DEST_CONFIG_FORMAT_NV16 0x12 +#define GCREG_DEST_CONFIG_FORMAT_RG16 0x13 + +struct gcregdstconfig { + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_FORMAT */ + unsigned int format:5; + + /* gcregDestConfigRegAddrs:reserved */ + unsigned int _reserved_5_7:3; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_TILED */ + unsigned int tiled:1; + + /* gcregDestConfigRegAddrs:reserved */ + unsigned int _reserved_9_11:3; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_COMMAND */ + unsigned int command:4; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_SWIZZLE */ + unsigned int swizzle:2; + + /* gcregDestConfigRegAddrs:reserved */ + unsigned int _reserved_18_19:2; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_ENDIAN_CONTROL */ + unsigned int endian:2; + + /* gcregDestConfigRegAddrs:reserved */ + unsigned int _reserved_22_23:2; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_GDI_STRE */ + unsigned int gdi:1; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_INTER_TILE_PER_FIX */ + unsigned int inner_tile_fix:1; + + /* gcregDestConfigRegAddrs:GCREG_DEST_CONFIG_MINOR_TILED */ + unsigned int minor_tile:1; + + /* gcregDestConfigRegAddrs:reserved */ + unsigned int _reserved_27_31:5; +}; + +/******************************************************************************* +** State gcregFilterKernel +*/ + +/* Filter blit coefficient table. The algorithm uses 5 bits of pixel +** coordinate's fraction to index the kernel array, which makes it a 32-entry +** array. Each entry consists of 9 kernel values. In practice we store only a +** half of the table, because the other half is a mirror of the first, +** therefore: +** rows_to_store = 32 / 2 + 1 = 17 +** values_to_store = rows_to_store * 9 = 153 +** even_value_count = (values_to_store + 1) & ~1 = 154 +** dword_count = even_value_count / 2 = 77 +*/ + +#define gcregFilterKernelRegAddrs 0x0600 +#define GCREG_FILTER_KERNEL_MSB 15 +#define GCREG_FILTER_KERNEL_LSB 7 +#define GCREG_FILTER_KERNEL_BLK 7 +#define GCREG_FILTER_KERNEL_Count 128 +#define GCREG_FILTER_KERNEL_FieldMask 0xFFFFFFFF +#define GCREG_FILTER_KERNEL_ReadMask 0xFFFFFFFF +#define GCREG_FILTER_KERNEL_WriteMask 0xFFFFFFFF +#define GCREG_FILTER_KERNEL_ResetValue 0x00000000 + +#define GCREG_FILTER_KERNEL_COEFFICIENT0 15 : 0 +#define GCREG_FILTER_KERNEL_COEFFICIENT0_End 15 +#define GCREG_FILTER_KERNEL_COEFFICIENT0_Start 0 +#define GCREG_FILTER_KERNEL_COEFFICIENT0_Type U16 + +#define GCREG_FILTER_KERNEL_COEFFICIENT1 31 : 16 +#define GCREG_FILTER_KERNEL_COEFFICIENT1_End 31 +#define GCREG_FILTER_KERNEL_COEFFICIENT1_Start 16 +#define GCREG_FILTER_KERNEL_COEFFICIENT1_Type U16 + +struct gcregfilterkernelpair { + /* gcregFilterKernelRegAddrs:COEFFICIENT0 */ + unsigned int coeff0:16; + + /* gcregFilterKernelRegAddrs:COEFFICIENT1 */ + unsigned int coeff1:16; +}; + +struct gcregfilterkernel { + struct gcregfilterkernelpair filter[77]; +}; + +/******************************************************************************* +** State gcregHoriFilterKernel +*/ + +/* One Pass filter Filter blit hori coefficient table. */ + +#define gcregHoriFilterKernelRegAddrs 0x0A00 +#define GCREG_HORI_FILTER_KERNEL_MSB 15 +#define GCREG_HORI_FILTER_KERNEL_LSB 7 +#define GCREG_HORI_FILTER_KERNEL_BLK 7 +#define GCREG_HORI_FILTER_KERNEL_Count 128 +#define GCREG_HORI_FILTER_KERNEL_FieldMask 0xFFFFFFFF +#define GCREG_HORI_FILTER_KERNEL_ReadMask 0xFFFFFFFF +#define GCREG_HORI_FILTER_KERNEL_WriteMask 0xFFFFFFFF +#define GCREG_HORI_FILTER_KERNEL_ResetValue 0x00000000 + +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT0 15 : 0 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT0_End 15 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT0_Start 0 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT0_Type U16 + +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT1 31 : 16 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT1_End 31 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT1_Start 16 +#define GCREG_HORI_FILTER_KERNEL_COEFFICIENT1_Type U16 + +/******************************************************************************* +** State gcregVertiFilterKernel +*/ + +/* One Pass Filter blit vertical coefficient table. */ + +#define gcregVertiFilterKernelRegAddrs 0x0A80 +#define GCREG_VERTI_FILTER_KERNEL_MSB 15 +#define GCREG_VERTI_FILTER_KERNEL_LSB 7 +#define GCREG_VERTI_FILTER_KERNEL_BLK 7 +#define GCREG_VERTI_FILTER_KERNEL_Count 128 +#define GCREG_VERTI_FILTER_KERNEL_FieldMask 0xFFFFFFFF +#define GCREG_VERTI_FILTER_KERNEL_ReadMask 0xFFFFFFFF +#define GCREG_VERTI_FILTER_KERNEL_WriteMask 0xFFFFFFFF +#define GCREG_VERTI_FILTER_KERNEL_ResetValue 0x00000000 + +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT0 15 : 0 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT0_End 15 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT0_Start 0 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT0_Type U16 + +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT1 31 : 16 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT1_End 31 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT1_Start 16 +#define GCREG_VERTI_FILTER_KERNEL_COEFFICIENT1_Type U16 + +/******************************************************************************* +** State gcregVRConfig +*/ + +/* Video Rasterizer kick-off register. */ + +#define gcregVRConfigRegAddrs 0x04A5 +#define GCREG_VR_CONFIG_MSB 15 +#define GCREG_VR_CONFIG_LSB 0 +#define GCREG_VR_CONFIG_BLK 0 +#define GCREG_VR_CONFIG_Count 1 +#define GCREG_VR_CONFIG_FieldMask 0x0000000B +#define GCREG_VR_CONFIG_ReadMask 0x0000000B +#define GCREG_VR_CONFIG_WriteMask 0x0000000B +#define GCREG_VR_CONFIG_ResetValue 0x00000000 + +/* Kick-off command. */ +#define GCREG_VR_CONFIG_START 1 : 0 +#define GCREG_VR_CONFIG_START_End 1 +#define GCREG_VR_CONFIG_START_Start 0 +#define GCREG_VR_CONFIG_START_Type U02 +#define GCREG_VR_CONFIG_START_HORIZONTAL_BLIT 0x0 +#define GCREG_VR_CONFIG_START_VERTICAL_BLIT 0x1 +#define GCREG_VR_CONFIG_START_ONE_PASS_BLIT 0x2 + +#define GCREG_VR_CONFIG_MASK_START 3 : 3 +#define GCREG_VR_CONFIG_MASK_START_End 3 +#define GCREG_VR_CONFIG_MASK_START_Start 3 +#define GCREG_VR_CONFIG_MASK_START_Type U01 +#define GCREG_VR_CONFIG_MASK_START_ENABLED 0x0 +#define GCREG_VR_CONFIG_MASK_START_MASKED 0x1 + +struct gcregvrconfig { + /* gcregVRConfigRegAddrs:START */ + unsigned int start:2; + + /* gcregVRConfigRegAddrs:reserved */ + unsigned int _reserved_2:1; + + /* gcregVRConfigRegAddrs:MASK_START */ + unsigned int start_mask:1; + + /* gcregVRConfigRegAddrs:reserved */ + unsigned int _reserved_4_31:28; +}; + +static const struct gcregvrconfig gcregvrconfig_horizontal = { + /* gcregVRConfigRegAddrs:START */ + GCREG_VR_CONFIG_START_HORIZONTAL_BLIT, + + /* gcregVRConfigRegAddrs:reserved */ + 0, + + /* gcregVRConfigRegAddrs:MASK_START */ + GCREG_VR_CONFIG_MASK_START_ENABLED, + + /* gcregVRConfigRegAddrs:reserved */ + 0 +}; + +static const struct gcregvrconfig gcregvrconfig_vertical = { + /* gcregVRConfigRegAddrs:START */ + GCREG_VR_CONFIG_START_VERTICAL_BLIT, + + /* gcregVRConfigRegAddrs:reserved */ + 0, + + /* gcregVRConfigRegAddrs:MASK_START */ + GCREG_VR_CONFIG_MASK_START_ENABLED, + + /* gcregVRConfigRegAddrs:reserved */ + 0 +}; + +static const struct gcregvrconfig gcregvrconfig_onepass = { + /* gcregVRConfigRegAddrs:START */ + GCREG_VR_CONFIG_START_ONE_PASS_BLIT, + + /* gcregVRConfigRegAddrs:reserved */ + 0, + + /* gcregVRConfigRegAddrs:MASK_START */ + GCREG_VR_CONFIG_MASK_START_ENABLED, + + /* gcregVRConfigRegAddrs:reserved */ + 0 +}; + +/******************************************************************************* +** State gcregVRSourceImageLow +*/ + +/* Bounding box of the source image. */ + +#define gcregVRSourceImageLowRegAddrs 0x04A6 +#define GCREG_VR_SOURCE_IMAGE_LOW_Address 0x01298 +#define GCREG_VR_SOURCE_IMAGE_LOW_MSB 15 +#define GCREG_VR_SOURCE_IMAGE_LOW_LSB 0 +#define GCREG_VR_SOURCE_IMAGE_LOW_BLK 0 +#define GCREG_VR_SOURCE_IMAGE_LOW_Count 1 +#define GCREG_VR_SOURCE_IMAGE_LOW_FieldMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_LOW_ReadMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_LOW_WriteMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_LOW_ResetValue 0x00000000 + +#define GCREG_VR_SOURCE_IMAGE_LOW_LEFT 15 : 0 +#define GCREG_VR_SOURCE_IMAGE_LOW_LEFT_End 15 +#define GCREG_VR_SOURCE_IMAGE_LOW_LEFT_Start 0 +#define GCREG_VR_SOURCE_IMAGE_LOW_LEFT_Type U16 + +#define GCREG_VR_SOURCE_IMAGE_LOW_TOP 31 : 16 +#define GCREG_VR_SOURCE_IMAGE_LOW_TOP_End 31 +#define GCREG_VR_SOURCE_IMAGE_LOW_TOP_Start 16 +#define GCREG_VR_SOURCE_IMAGE_LOW_TOP_Type U16 + +struct gcregvrsourceimagelow { + /* gcregVRSourceImageLowRegAddrs:LEFT */ + unsigned int left:16; + + /* gcregVRSourceImageLowRegAddrs:TOP */ + unsigned int top:16; +}; + +/******************************************************************************* +** State gcregVRSourceImageHigh +*/ + +#define gcregVRSourceImageHighRegAddrs 0x04A7 +#define GCREG_VR_SOURCE_IMAGE_HIGH_MSB 15 +#define GCREG_VR_SOURCE_IMAGE_HIGH_LSB 0 +#define GCREG_VR_SOURCE_IMAGE_LOW_HIGH_BLK 0 +#define GCREG_VR_SOURCE_IMAGE_HIGH_Count 1 +#define GCREG_VR_SOURCE_IMAGE_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_IMAGE_HIGH_ResetValue 0x00000000 + +#define GCREG_VR_SOURCE_IMAGE_HIGH_RIGHT 15 : 0 +#define GCREG_VR_SOURCE_IMAGE_HIGH_RIGHT_End 15 +#define GCREG_VR_SOURCE_IMAGE_HIGH_RIGHT_Start 0 +#define GCREG_VR_SOURCE_IMAGE_HIGH_RIGHT_Type U16 + +#define GCREG_VR_SOURCE_IMAGE_HIGH_BOTTOM 31 : 16 +#define GCREG_VR_SOURCE_IMAGE_HIGH_BOTTOM_End 31 +#define GCREG_VR_SOURCE_IMAGE_HIGH_BOTTOM_Start 16 +#define GCREG_VR_SOURCE_IMAGE_HIGH_BOTTOM_Type U16 + +struct gcregvrsourceimagehigh { + /* gcregVRSourceImageHighRegAddrs:RIGHT */ + unsigned int right:16; + + /* gcregVRSourceImageHighRegAddrs:BOTTOM */ + unsigned int bottom:16; +}; + +/******************************************************************************* +** State gcregVRSourceOriginLow +*/ + +/* Fractional origin of the source window to be rendered within the source +** image. +*/ + +#define gcregVRSourceOriginLowRegAddrs 0x04A8 +#define GCREG_VR_SOURCE_ORIGIN_LOW_MSB 15 +#define GCREG_VR_SOURCE_ORIGIN_LOW_LSB 0 +#define GCREG_VR_SOURCE_ORIGIN_LOW_BLK 0 +#define GCREG_VR_SOURCE_ORIGIN_LOW_Count 1 +#define GCREG_VR_SOURCE_ORIGIN_LOW_FieldMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_LOW_ReadMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_LOW_WriteMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_LOW_ResetValue 0x00000000 + +#define GCREG_VR_SOURCE_ORIGIN_LOW_X 31 : 0 +#define GCREG_VR_SOURCE_ORIGIN_LOW_X_End 31 +#define GCREG_VR_SOURCE_ORIGIN_LOW_X_Start 0 +#define GCREG_VR_SOURCE_ORIGIN_LOW_X_Type U32 + +/******************************************************************************* +** State gcregVRSourceOriginHigh +*/ + +#define gcregVRSourceOriginHighRegAddrs 0x04A9 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_MSB 15 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_LSB 0 +#define GCREG_VR_SOURCE_ORIGIN_LOW_HIGH_BLK 0 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_Count 1 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_VR_SOURCE_ORIGIN_HIGH_ResetValue 0x00000000 + +#define GCREG_VR_SOURCE_ORIGIN_HIGH_Y 31 : 0 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_Y_End 31 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_Y_Start 0 +#define GCREG_VR_SOURCE_ORIGIN_HIGH_Y_Type U32 + +/******************************************************************************* +** State gcregVRTargetWindowLow +*/ + +/* Bounding box of the destination window to be rendered within the +** destination image. +*/ + +#define gcregVRTargetWindowLowRegAddrs 0x04AA +#define GCREG_VR_TARGET_WINDOW_LOW_Address 0x012A8 +#define GCREG_VR_TARGET_WINDOW_LOW_MSB 15 +#define GCREG_VR_TARGET_WINDOW_LOW_LSB 0 +#define GCREG_VR_TARGET_WINDOW_LOW_BLK 0 +#define GCREG_VR_TARGET_WINDOW_LOW_Count 1 +#define GCREG_VR_TARGET_WINDOW_LOW_FieldMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_LOW_ReadMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_LOW_WriteMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_LOW_ResetValue 0x00000000 + +#define GCREG_VR_TARGET_WINDOW_LOW_LEFT 15 : 0 +#define GCREG_VR_TARGET_WINDOW_LOW_LEFT_End 15 +#define GCREG_VR_TARGET_WINDOW_LOW_LEFT_Start 0 +#define GCREG_VR_TARGET_WINDOW_LOW_LEFT_Type U16 + +#define GCREG_VR_TARGET_WINDOW_LOW_TOP 31 : 16 +#define GCREG_VR_TARGET_WINDOW_LOW_TOP_End 31 +#define GCREG_VR_TARGET_WINDOW_LOW_TOP_Start 16 +#define GCREG_VR_TARGET_WINDOW_LOW_TOP_Type U16 + +struct gcregvrtargetwindowlow { + /* gcregVRTargetWindowLowRegAddrs:LEFT */ + unsigned int left:16; + + /* gcregVRTargetWindowLowRegAddrs:TOP */ + unsigned int top:16; +}; + +/******************************************************************************* +** State gcregVRTargetWindowHigh +*/ + +#define gcregVRTargetWindowHighRegAddrs 0x04AB +#define GCREG_VR_TARGET_WINDOW_HIGH_MSB 15 +#define GCREG_VR_TARGET_WINDOW_HIGH_LSB 0 +#define GCREG_VR_TARGET_WINDOW_LOW_HIGH_BLK 0 +#define GCREG_VR_TARGET_WINDOW_HIGH_Count 1 +#define GCREG_VR_TARGET_WINDOW_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_VR_TARGET_WINDOW_HIGH_ResetValue 0x00000000 + +#define GCREG_VR_TARGET_WINDOW_HIGH_RIGHT 15 : 0 +#define GCREG_VR_TARGET_WINDOW_HIGH_RIGHT_End 15 +#define GCREG_VR_TARGET_WINDOW_HIGH_RIGHT_Start 0 +#define GCREG_VR_TARGET_WINDOW_HIGH_RIGHT_Type U16 + +#define GCREG_VR_TARGET_WINDOW_HIGH_BOTTOM 31 : 16 +#define GCREG_VR_TARGET_WINDOW_HIGH_BOTTOM_End 31 +#define GCREG_VR_TARGET_WINDOW_HIGH_BOTTOM_Start 16 +#define GCREG_VR_TARGET_WINDOW_HIGH_BOTTOM_Type U16 + +struct gcregvrtargetwindowhigh { + /* gcregVRTargetWindowHighRegAddrs:LEFT */ + unsigned int right:16; + + /* gcregVRTargetWindowHighRegAddrs:TOP */ + unsigned int bottom:16; +}; + +/******************************************************************************* +** State gcregVRConfigEx +*/ + +/* Video Rasterizer configuration register. */ + +#define gcregVRConfigExRegAddrs 0x04B9 +#define GCREG_VR_CONFIG_EX_Address 0x012E4 +#define GCREG_VR_CONFIG_EX_MSB 15 +#define GCREG_VR_CONFIG_EX_LSB 0 +#define GCREG_VR_CONFIG_EX_BLK 0 +#define GCREG_VR_CONFIG_EX_Count 1 +#define GCREG_VR_CONFIG_EX_FieldMask 0x000001FB +#define GCREG_VR_CONFIG_EX_ReadMask 0x000001FB +#define GCREG_VR_CONFIG_EX_WriteMask 0x000001FB +#define GCREG_VR_CONFIG_EX_ResetValue 0x00000000 + +/* Line width in pixels for vertical pass. */ +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH 1 : 0 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_End 1 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_Start 0 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_Type U02 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_AUTO 0x0 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS16 0x1 +#define GCREG_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS32 0x2 + +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH 3 : 3 +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH_End 3 +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH_Start 3 +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH_Type U01 +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH_ENABLED 0x0 +#define GCREG_VR_CONFIG_EX_MASK_VERTICAL_LINE_WIDTH_MASKED 0x1 + +/* one pass filter tap. */ +#define GCREG_VR_CONFIG_EX_FILTER_TAP 7 : 4 +#define GCREG_VR_CONFIG_EX_FILTER_TAP_End 7 +#define GCREG_VR_CONFIG_EX_FILTER_TAP_Start 4 +#define GCREG_VR_CONFIG_EX_FILTER_TAP_Type U04 + +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP 8 : 8 +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_End 8 +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_Start 8 +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_Type U01 +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_ENABLED 0x0 +#define GCREG_VR_CONFIG_EX_MASK_FILTER_TAP_MASKED 0x1 + +struct gcregvrconfigex { + /* gcregVRConfigExRegAddrs:VERTICAL_LINE_WIDTH */ + unsigned int stripe:2; + + /* gcregVRConfigExRegAddrs:reserved */ + unsigned int _reserved_2:1; + + /* gcregVRConfigExRegAddrs:MASK_VERTICAL_LINE_WIDTH */ + unsigned int mask_stripe:1; + + /* gcregVRConfigExRegAddrs:FILTER_TAP */ + unsigned int kernelsize:4; + + /* gcregVRConfigExRegAddrs:MASK_FILTER_TAP */ + unsigned int mask_kernelsize:1; + + /* gcregVRConfigExRegAddrs:reserved */ + unsigned int _reserved_9_31:23; +}; + +/******************************************************************************* +** State gcregBWConfig +*/ + +#define gcregBWConfigRegAddrs 0x04BC +#define GCREG_BW_CONFIG_MSB 15 +#define GCREG_BW_CONFIG_LSB 0 +#define GCREG_BW_CONFIG_BLK 0 +#define GCREG_BW_CONFIG_Count 1 +#define GCREG_BW_CONFIG_FieldMask 0x00009999 +#define GCREG_BW_CONFIG_ReadMask 0x00009999 +#define GCREG_BW_CONFIG_WriteMask 0x00009999 +#define GCREG_BW_CONFIG_ResetValue 0x00000000 + +/* One Pass Filter Block Config. */ +#define GCREG_BW_CONFIG_BLOCK_CONFIG 0 : 0 +#define GCREG_BW_CONFIG_BLOCK_CONFIG_End 0 +#define GCREG_BW_CONFIG_BLOCK_CONFIG_Start 0 +#define GCREG_BW_CONFIG_BLOCK_CONFIG_Type U01 +#define GCREG_BW_CONFIG_BLOCK_CONFIG_AUTO 0x0 +#define GCREG_BW_CONFIG_BLOCK_CONFIG_CUSTOMIZE 0x1 + +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG 3 : 3 +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG_End 3 +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG_Start 3 +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG_Type U01 +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG_ENABLED 0x0 +#define GCREG_BW_CONFIG_MASK_BLOCK_CONFIG_MASKED 0x1 + +/* block walk direction in one pass filter blit. */ +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION 4 : 4 +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION_End 4 +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION_Start 4 +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION_RIGHT_BOTTOM 0x0 +#define GCREG_BW_CONFIG_BLOCK_WALK_DIRECTION_BOTTOM_RIGHT 0x1 + +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION 7 : 7 +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION_End 7 +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION_Start 7 +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION_ENABLED 0x0 +#define GCREG_BW_CONFIG_MASK_BLOCK_WALK_DIRECTION_MASKED 0x1 + +/* block walk direction in one pass filter blit. */ +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION 8 : 8 +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION_End 8 +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION_Start 8 +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION_RIGHT_BOTTOM 0x0 +#define GCREG_BW_CONFIG_TILE_WALK_DIRECTION_BOTTOM_RIGHT 0x1 + +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION 11 : 11 +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION_End 11 +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION_Start 11 +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION_ENABLED 0x0 +#define GCREG_BW_CONFIG_MASK_TILE_WALK_DIRECTION_MASKED 0x1 + +/* block walk direction in one pass filter blit. */ +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION 12 : 12 +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION_End 12 +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION_Start 12 +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION_RIGHT_BOTTOM 0x0 +#define GCREG_BW_CONFIG_PIXEL_WALK_DIRECTION_BOTTOM_RIGHT 0x1 + +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION 15 : 15 +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION_End 15 +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION_Start 15 +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION_Type U01 +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION_ENABLED 0x0 +#define GCREG_BW_CONFIG_MASK_PIXEL_WALK_DIRECTION_MASKED 0x1 + +/******************************************************************************* +** State gcregBWBlockSize +*/ + +/* Walker Block size. */ + +#define gcregBWBlockSizeRegAddrs 0x04BD +#define GCREG_BW_BLOCK_SIZE_MSB 15 +#define GCREG_BW_BLOCK_SIZE_LSB 0 +#define GCREG_BW_BLOCK_SIZE_BLK 0 +#define GCREG_BW_BLOCK_SIZE_Count 1 +#define GCREG_BW_BLOCK_SIZE_FieldMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_SIZE_ReadMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_SIZE_WriteMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_SIZE_ResetValue 0x00000000 + +#define GCREG_BW_BLOCK_SIZE_WIDTH 15 : 0 +#define GCREG_BW_BLOCK_SIZE_WIDTH_End 15 +#define GCREG_BW_BLOCK_SIZE_WIDTH_Start 0 +#define GCREG_BW_BLOCK_SIZE_WIDTH_Type U16 + +#define GCREG_BW_BLOCK_SIZE_HEIGHT 31 : 16 +#define GCREG_BW_BLOCK_SIZE_HEIGHT_End 31 +#define GCREG_BW_BLOCK_SIZE_HEIGHT_Start 16 +#define GCREG_BW_BLOCK_SIZE_HEIGHT_Type U16 + +/******************************************************************************* +** State gcregBWTileSize +*/ + +/* Walker tile size. */ + +#define gcregBWTileSizeRegAddrs 0x04BE +#define GCREG_BW_TILE_SIZE_MSB 15 +#define GCREG_BW_TILE_SIZE_LSB 0 +#define GCREG_BW_TILE_SIZE_BLK 0 +#define GCREG_BW_TILE_SIZE_Count 1 +#define GCREG_BW_TILE_SIZE_FieldMask 0xFFFFFFFF +#define GCREG_BW_TILE_SIZE_ReadMask 0xFFFFFFFF +#define GCREG_BW_TILE_SIZE_WriteMask 0xFFFFFFFF +#define GCREG_BW_TILE_SIZE_ResetValue 0x00000000 + +#define GCREG_BW_TILE_SIZE_WIDTH 15 : 0 +#define GCREG_BW_TILE_SIZE_WIDTH_End 15 +#define GCREG_BW_TILE_SIZE_WIDTH_Start 0 +#define GCREG_BW_TILE_SIZE_WIDTH_Type U16 + +#define GCREG_BW_TILE_SIZE_HEIGHT 31 : 16 +#define GCREG_BW_TILE_SIZE_HEIGHT_End 31 +#define GCREG_BW_TILE_SIZE_HEIGHT_Start 16 +#define GCREG_BW_TILE_SIZE_HEIGHT_Type U16 + +/******************************************************************************* +** State gcregBWBlockMask +*/ + +/* Walker Block Mask. */ + +#define gcregBWBlockMaskRegAddrs 0x04BF +#define GCREG_BW_BLOCK_MASK_MSB 15 +#define GCREG_BW_BLOCK_MASK_LSB 0 +#define GCREG_BW_BLOCK_MASK_BLK 0 +#define GCREG_BW_BLOCK_MASK_Count 1 +#define GCREG_BW_BLOCK_MASK_FieldMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_MASK_ReadMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_MASK_WriteMask 0xFFFFFFFF +#define GCREG_BW_BLOCK_MASK_ResetValue 0x00000000 + +#define GCREG_BW_BLOCK_MASK_HORIZONTAL 15 : 0 +#define GCREG_BW_BLOCK_MASK_HORIZONTAL_End 15 +#define GCREG_BW_BLOCK_MASK_HORIZONTAL_Start 0 +#define GCREG_BW_BLOCK_MASK_HORIZONTAL_Type U16 + +#define GCREG_BW_BLOCK_MASK_VERTICAL 31 : 16 +#define GCREG_BW_BLOCK_MASK_VERTICAL_End 31 +#define GCREG_BW_BLOCK_MASK_VERTICAL_Start 16 +#define GCREG_BW_BLOCK_MASK_VERTICAL_Type U16 + +/******************************************************************************* +** State gcregIndexColorTable +*/ + +/* 256 color entries for the indexed color mode. Colors are assumed to be in +** the destination format and no color conversion is done on the values. +*/ + +#define gcregIndexColorTableRegAddrs 0x0700 +#define GCREG_INDEX_COLOR_TABLE_MSB 15 +#define GCREG_INDEX_COLOR_TABLE_LSB 8 +#define GCREG_INDEX_COLOR_TABLE_BLK 8 +#define GCREG_INDEX_COLOR_TABLE_Count 256 +#define GCREG_INDEX_COLOR_TABLE_FieldMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE_ReadMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE_WriteMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE_ResetValue 0x00000000 + +#define GCREG_INDEX_COLOR_TABLE_ALPHA 31 : 24 +#define GCREG_INDEX_COLOR_TABLE_ALPHA_End 31 +#define GCREG_INDEX_COLOR_TABLE_ALPHA_Start 24 +#define GCREG_INDEX_COLOR_TABLE_ALPHA_Type U08 + +#define GCREG_INDEX_COLOR_TABLE_RED 23 : 16 +#define GCREG_INDEX_COLOR_TABLE_RED_End 23 +#define GCREG_INDEX_COLOR_TABLE_RED_Start 16 +#define GCREG_INDEX_COLOR_TABLE_RED_Type U08 + +#define GCREG_INDEX_COLOR_TABLE_GREEN 15 : 8 +#define GCREG_INDEX_COLOR_TABLE_GREEN_End 15 +#define GCREG_INDEX_COLOR_TABLE_GREEN_Start 8 +#define GCREG_INDEX_COLOR_TABLE_GREEN_Type U08 + +#define GCREG_INDEX_COLOR_TABLE_BLUE 7 : 0 +#define GCREG_INDEX_COLOR_TABLE_BLUE_End 7 +#define GCREG_INDEX_COLOR_TABLE_BLUE_Start 0 +#define GCREG_INDEX_COLOR_TABLE_BLUE_Type U08 + +/******************************************************************************* +** State gcregIndexColorTable32 +*/ + +/* 256 color entries for the indexed color mode. Colors are assumed to be in +** the A8R8G8B8 format and no color conversion is done on the values. This +** register is used only with chips with PE20 feature available. +*/ + +#define gcregIndexColorTable32RegAddrs 0x0D00 +#define GCREG_INDEX_COLOR_TABLE32_MSB 15 +#define GCREG_INDEX_COLOR_TABLE32_LSB 8 +#define GCREG_INDEX_COLOR_TABLE32_BLK 8 +#define GCREG_INDEX_COLOR_TABLE32_Count 256 +#define GCREG_INDEX_COLOR_TABLE32_FieldMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE32_ReadMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE32_WriteMask 0xFFFFFFFF +#define GCREG_INDEX_COLOR_TABLE32_ResetValue 0x00000000 + +#define GCREG_INDEX_COLOR_TABLE32_ALPHA 31 : 24 +#define GCREG_INDEX_COLOR_TABLE32_ALPHA_End 31 +#define GCREG_INDEX_COLOR_TABLE32_ALPHA_Start 24 +#define GCREG_INDEX_COLOR_TABLE32_ALPHA_Type U08 + +#define GCREG_INDEX_COLOR_TABLE32_RED 23 : 16 +#define GCREG_INDEX_COLOR_TABLE32_RED_End 23 +#define GCREG_INDEX_COLOR_TABLE32_RED_Start 16 +#define GCREG_INDEX_COLOR_TABLE32_RED_Type U08 + +#define GCREG_INDEX_COLOR_TABLE32_GREEN 15 : 8 +#define GCREG_INDEX_COLOR_TABLE32_GREEN_End 15 +#define GCREG_INDEX_COLOR_TABLE32_GREEN_Start 8 +#define GCREG_INDEX_COLOR_TABLE32_GREEN_Type U08 + +#define GCREG_INDEX_COLOR_TABLE32_BLUE 7 : 0 +#define GCREG_INDEX_COLOR_TABLE32_BLUE_End 7 +#define GCREG_INDEX_COLOR_TABLE32_BLUE_Start 0 +#define GCREG_INDEX_COLOR_TABLE32_BLUE_Type U08 + +/******************************************************************************* +** State gcregRop +*/ + +/* Raster operation foreground and background codes. Even though ROP is not +** used in CLEAR, HOR_FILTER_BLT, VER_FILTER_BLT and alpha-eanbled BIT_BLTs, +** ROP code still has to be programmed, because the engine makes the decision +** whether source, destination and pattern are involved in the current +** operation and the correct decision is essential for the engine to complete +** the operation as expected. +*/ + +#define gcregRopRegAddrs 0x0497 +#define GCREG_ROP_MSB 15 +#define GCREG_ROP_LSB 0 +#define GCREG_ROP_BLK 0 +#define GCREG_ROP_Count 1 +#define GCREG_ROP_FieldMask 0x0030FFFF +#define GCREG_ROP_ReadMask 0x0030FFFF +#define GCREG_ROP_WriteMask 0x0030FFFF +#define GCREG_ROP_ResetValue 0x00000000 + +/* ROP type: ROP2, ROP3 or ROP4 */ +#define GCREG_ROP_TYPE 21 : 20 +#define GCREG_ROP_TYPE_End 21 +#define GCREG_ROP_TYPE_Start 20 +#define GCREG_ROP_TYPE_Type U02 +#define GCREG_ROP_TYPE_ROP2_PATTERN 0x0 +#define GCREG_ROP_TYPE_ROP2_SOURCE 0x1 +#define GCREG_ROP_TYPE_ROP3 0x2 +#define GCREG_ROP_TYPE_ROP4 0x3 + +/* Background ROP code is used for transparent pixels. */ +#define GCREG_ROP_ROP_BG 15 : 8 +#define GCREG_ROP_ROP_BG_End 15 +#define GCREG_ROP_ROP_BG_Start 8 +#define GCREG_ROP_ROP_BG_Type U08 + +/* Background ROP code is used for opaque pixels. */ +#define GCREG_ROP_ROP_FG 7 : 0 +#define GCREG_ROP_ROP_FG_End 7 +#define GCREG_ROP_ROP_FG_Start 0 +#define GCREG_ROP_ROP_FG_Type U08 + +struct gcregrop { + /* gcregRopRegAddrs:ROP_FG */ + unsigned int fg:8; + + /* gcregRopRegAddrs:ROP_BG */ + unsigned int bg:8; + + /* gcregRopRegAddrs:reserved */ + unsigned int _reserved_16_19:4; + + /* gcregRopRegAddrs:ROP_TYPE */ + unsigned int type:2; + + /* gcregRopRegAddrs:reserved */ + unsigned int _reserved_22_31:10; +}; + +/******************************************************************************* +** State gcregClipTopLeft +*/ + +/* Top left corner of the clipping rectangle defined in pixels. Clipping is +** always on and everything beyond the clipping rectangle will be clipped +** out. Clipping is not used with filter blits. +*/ + +#define gcregClipTopLeftRegAddrs 0x0498 +#define GCREG_CLIP_TOP_LEFT_MSB 15 +#define GCREG_CLIP_TOP_LEFT_LSB 0 +#define GCREG_CLIP_TOP_LEFT_BLK 0 +#define GCREG_CLIP_TOP_LEFT_Count 1 +#define GCREG_CLIP_TOP_LEFT_FieldMask 0x7FFF7FFF +#define GCREG_CLIP_TOP_LEFT_ReadMask 0x7FFF7FFF +#define GCREG_CLIP_TOP_LEFT_WriteMask 0x7FFF7FFF +#define GCREG_CLIP_TOP_LEFT_ResetValue 0x00000000 + +#define GCREG_CLIP_TOP_LEFT_Y 30 : 16 +#define GCREG_CLIP_TOP_LEFT_Y_End 30 +#define GCREG_CLIP_TOP_LEFT_Y_Start 16 +#define GCREG_CLIP_TOP_LEFT_Y_Type U15 + +#define GCREG_CLIP_TOP_LEFT_X 14 : 0 +#define GCREG_CLIP_TOP_LEFT_X_End 14 +#define GCREG_CLIP_TOP_LEFT_X_Start 0 +#define GCREG_CLIP_TOP_LEFT_X_Type U15 + +struct gcregcliplt { + /* gcregClipTopLeftRegAddrs:X */ + unsigned int left:15; + + /* gcregClipTopLeftRegAddrs:reserved */ + unsigned int _reserved_15:1; + + /* gcregClipTopLeftRegAddrs:Y */ + unsigned int top:15; + + /* gcregClipTopLeftRegAddrs:reserved */ + unsigned int _reserved_31:1; +}; + +/******************************************************************************* +** State gcregClipBottomRight +*/ + +/* Bottom right corner of the clipping rectangle defined in pixels. Clipping +** is always on and everything beyond the clipping rectangle will be clipped +** out. Clipping is not used with filter blits. +*/ + +#define gcregClipBottomRightRegAddrs 0x0499 +#define GCREG_CLIP_BOTTOM_RIGHT_MSB 15 +#define GCREG_CLIP_BOTTOM_RIGHT_LSB 0 +#define GCREG_CLIP_BOTTOM_RIGHT_BLK 0 +#define GCREG_CLIP_BOTTOM_RIGHT_Count 1 +#define GCREG_CLIP_BOTTOM_RIGHT_FieldMask 0x7FFF7FFF +#define GCREG_CLIP_BOTTOM_RIGHT_ReadMask 0x7FFF7FFF +#define GCREG_CLIP_BOTTOM_RIGHT_WriteMask 0x7FFF7FFF +#define GCREG_CLIP_BOTTOM_RIGHT_ResetValue 0x00000000 + +#define GCREG_CLIP_BOTTOM_RIGHT_Y 30 : 16 +#define GCREG_CLIP_BOTTOM_RIGHT_Y_End 30 +#define GCREG_CLIP_BOTTOM_RIGHT_Y_Start 16 +#define GCREG_CLIP_BOTTOM_RIGHT_Y_Type U15 + +#define GCREG_CLIP_BOTTOM_RIGHT_X 14 : 0 +#define GCREG_CLIP_BOTTOM_RIGHT_X_End 14 +#define GCREG_CLIP_BOTTOM_RIGHT_X_Start 0 +#define GCREG_CLIP_BOTTOM_RIGHT_X_Type U15 + +struct gcregcliprb { + /* gcregClipBottomRightRegAddrs:X */ + unsigned int right:15; + + /* gcregClipBottomRightRegAddrs:reserved */ + unsigned int _reserved_15:1; + + /* gcregClipBottomRightRegAddrs:Y */ + unsigned int bottom:15; + + /* gcregClipBottomRightRegAddrs:reserved */ + unsigned int _reserved_31:1; +}; + +/******************************************************************************* +** State gcregConfig +*/ + +#define gcregConfigRegAddrs 0x049B +#define GCREG_CONFIG_MSB 15 +#define GCREG_CONFIG_LSB 0 +#define GCREG_CONFIG_BLK 0 +#define GCREG_CONFIG_Count 1 +#define GCREG_CONFIG_FieldMask 0x00370031 +#define GCREG_CONFIG_ReadMask 0x00370031 +#define GCREG_CONFIG_WriteMask 0x00370031 +#define GCREG_CONFIG_ResetValue 0x00000000 + +#define GCREG_CONFIG_MIRROR_BLT_MODE 5 : 4 +#define GCREG_CONFIG_MIRROR_BLT_MODE_End 5 +#define GCREG_CONFIG_MIRROR_BLT_MODE_Start 4 +#define GCREG_CONFIG_MIRROR_BLT_MODE_Type U02 +#define GCREG_CONFIG_MIRROR_BLT_MODE_NORMAL 0x0 +#define GCREG_CONFIG_MIRROR_BLT_MODE_HMIRROR 0x1 +#define GCREG_CONFIG_MIRROR_BLT_MODE_VMIRROR 0x2 +#define GCREG_CONFIG_MIRROR_BLT_MODE_FULL_MIRROR 0x3 + +#define GCREG_CONFIG_MIRROR_BLT_ENABLE 0 : 0 +#define GCREG_CONFIG_MIRROR_BLT_ENABLE_End 0 +#define GCREG_CONFIG_MIRROR_BLT_ENABLE_Start 0 +#define GCREG_CONFIG_MIRROR_BLT_ENABLE_Type U01 +#define GCREG_CONFIG_MIRROR_BLT_ENABLE_OFF 0x0 +#define GCREG_CONFIG_MIRROR_BLT_ENABLE_ON 0x1 + +/* Source select for the old walkers. */ +#define GCREG_CONFIG_SOURCE_SELECT 18 : 16 +#define GCREG_CONFIG_SOURCE_SELECT_End 18 +#define GCREG_CONFIG_SOURCE_SELECT_Start 16 +#define GCREG_CONFIG_SOURCE_SELECT_Type U03 + +/* Destination select for the old walkers. */ +#define GCREG_CONFIG_DESTINATION_SELECT 21 : 20 +#define GCREG_CONFIG_DESTINATION_SELECT_End 21 +#define GCREG_CONFIG_DESTINATION_SELECT_Start 20 +#define GCREG_CONFIG_DESTINATION_SELECT_Type U02 + +/******************************************************************************* +** State gcregSrcOriginFraction +*/ + +/* Fraction for the source origin. Together with values in gcregSrcOrigin +** these values form signed 16.16 fixed point origin for the source +** rectangle. Fractions are only used in filter blit in split frame mode. +*/ + +#define gcregSrcOriginFractionRegAddrs 0x049E +#define GCREG_SRC_ORIGIN_FRACTION_MSB 15 +#define GCREG_SRC_ORIGIN_FRACTION_LSB 0 +#define GCREG_SRC_ORIGIN_FRACTION_BLK 0 +#define GCREG_SRC_ORIGIN_FRACTION_Count 1 +#define GCREG_SRC_ORIGIN_FRACTION_FieldMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_FRACTION_ReadMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_FRACTION_WriteMask 0xFFFFFFFF +#define GCREG_SRC_ORIGIN_FRACTION_ResetValue 0x00000000 + +#define GCREG_SRC_ORIGIN_FRACTION_Y 31 : 16 +#define GCREG_SRC_ORIGIN_FRACTION_Y_End 31 +#define GCREG_SRC_ORIGIN_FRACTION_Y_Start 16 +#define GCREG_SRC_ORIGIN_FRACTION_Y_Type U16 + +#define GCREG_SRC_ORIGIN_FRACTION_X 15 : 0 +#define GCREG_SRC_ORIGIN_FRACTION_X_End 15 +#define GCREG_SRC_ORIGIN_FRACTION_X_Start 0 +#define GCREG_SRC_ORIGIN_FRACTION_X_Type U16 + +/******************************************************************************* +** State gcregAlphaControl +*/ + +#define gcregAlphaControlRegAddrs 0x049F +#define GCREG_ALPHA_CONTROL_MSB 15 +#define GCREG_ALPHA_CONTROL_LSB 0 +#define GCREG_ALPHA_CONTROL_BLK 0 +#define GCREG_ALPHA_CONTROL_Count 1 +#define GCREG_ALPHA_CONTROL_FieldMask 0xFFFF0001 +#define GCREG_ALPHA_CONTROL_ReadMask 0xFFFF0001 +#define GCREG_ALPHA_CONTROL_WriteMask 0xFFFF0001 +#define GCREG_ALPHA_CONTROL_ResetValue 0x00000000 + +#define GCREG_ALPHA_CONTROL_ENABLE 0 : 0 +#define GCREG_ALPHA_CONTROL_ENABLE_End 0 +#define GCREG_ALPHA_CONTROL_ENABLE_Start 0 +#define GCREG_ALPHA_CONTROL_ENABLE_Type U01 +#define GCREG_ALPHA_CONTROL_ENABLE_OFF 0x0 +#define GCREG_ALPHA_CONTROL_ENABLE_ON 0x1 + +struct gcregalphacontrol { + /* gcregAlphaControlRegAddrs:GCREG_ALPHA_CONTROL_ENABLE */ + unsigned int enable:1; + + /* gcregAlphaControlRegAddrs:reserved */ + unsigned int _reserved_1_31:31; +}; + +static const struct gcregalphacontrol gcregalpha_off = { + /* gcregAlphaControlRegAddrs:GCREG_ALPHA_CONTROL_ENABLE */ + GCREG_ALPHA_CONTROL_ENABLE_OFF, + + /* gcregAlphaControlRegAddrs:reserved */ + 0 +}; + +static const struct gcregalphacontrol gcregalpha_on = { + /* gcregAlphaControlRegAddrs:GCREG_ALPHA_CONTROL_ENABLE */ + GCREG_ALPHA_CONTROL_ENABLE_ON, + + /* gcregAlphaControlRegAddrs:reserved */ + 0 +}; + +/******************************************************************************* +** State gcregAlphaModes +*/ + +#define gcregAlphaModesRegAddrs 0x04A0 +#define GCREG_ALPHA_MODES_MSB 15 +#define GCREG_ALPHA_MODES_LSB 0 +#define GCREG_ALPHA_MODES_BLK 0 +#define GCREG_ALPHA_MODES_Count 1 +#define GCREG_ALPHA_MODES_FieldMask 0xFF113311 +#define GCREG_ALPHA_MODES_ReadMask 0xFF113311 +#define GCREG_ALPHA_MODES_WriteMask 0xFF113311 +#define GCREG_ALPHA_MODES_ResetValue 0x00000000 + +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE 0 : 0 +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE_End 0 +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE_Start 0 +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE_Type U01 +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE 4 : 4 +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE_End 4 +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE_Start 4 +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE_Type U01 +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE 9 : 8 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_End 9 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Start 8 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Type U02 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x2 + +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE 13 : 12 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_End 13 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Start 12 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Type U02 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x2 + +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE 26 : 24 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_End 26 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_Start 24 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_Type U03 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_ZERO 0x0 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_ONE 0x1 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_NORMAL 0x2 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_INVERSED 0x3 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_COLOR 0x4 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Src Blending factor is calculate from Src alpha. */ +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR 27 : 27 +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR_End 27 +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR_Start 27 +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR_Type U01 +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLED 0x1 + +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE 30 : 28 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_End 30 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_Start 28 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_Type U03 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_ZERO 0x0 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_ONE 0x1 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_NORMAL 0x2 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_INVERSED 0x3 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_COLOR 0x4 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Dst Blending factor is calculate from Dst alpha. */ +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR 31 : 31 +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR_End 31 +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR_Start 31 +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR_Type U01 +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLED 0x1 + +struct gcregalphamodes { + /* gcregAlphaModes:GCREG_ALPHA_MODES_SRC_ALPHA_MODE */ + unsigned int src_inverse:1; + + /* gcregAlphaModes:reserved */ + unsigned int _reserved_1_3:3; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_DST_ALPHA_MODE */ + unsigned int dst_inverse:1; + + /* gcregAlphaModes:reserved */ + unsigned int _reserved_5_7:3; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE */ + unsigned int src_global_alpha_mode:2; + + /* gcregAlphaModes:reserved */ + unsigned int _reserved_10_11:2; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE */ + unsigned int dst_global_alpha_mode:2; + + /* gcregAlphaModes:reserved */ + unsigned int _reserved_14_23:10; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_SRC_BLENDING_MODE */ + unsigned int src_blend:3; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_SRC_ALPHA_FACTOR */ + unsigned int src_color_reverse:1; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_DST_BLENDING_MODE */ + unsigned int dst_blend:3; + + /* gcregAlphaModes:GCREG_ALPHA_MODES_DST_ALPHA_FACTOR */ + unsigned int dst_color_reverse:1; +}; + +/******************************************************************************* +** State UPlaneAddress +*/ + +/* 32-bit aligned base address of the source U plane. */ + +#define gcregUPlaneAddressRegAddrs 0x04A1 +#define GCREG_UPLANE_ADDRESS_MSB 15 +#define GCREG_UPLANE_ADDRESS_LSB 0 +#define GCREG_UPLANE_ADDRESS_BLK 0 +#define GCREG_UPLANE_ADDRESS_Count 1 +#define GCREG_UPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_UPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_UPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_UPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_UPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_UPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_UPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_UPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State UPlaneStride +*/ + +/* Stride of the source U plane in bytes. */ + +#define gcregUPlaneStrideRegAddrs 0x04A2 +#define GCREG_UPLANE_STRIDE_MSB 15 +#define GCREG_UPLANE_STRIDE_LSB 0 +#define GCREG_UPLANE_STRIDE_BLK 0 +#define GCREG_UPLANE_STRIDE_Count 1 +#define GCREG_UPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_UPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_UPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_UPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_UPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_UPLANE_STRIDE_STRIDE_End 17 +#define GCREG_UPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_UPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State VPlaneAddress +*/ + +/* 32-bit aligned base address of the source V plane. */ + +#define gcregVPlaneAddressRegAddrs 0x04A3 +#define GCREG_VPLANE_ADDRESS_MSB 15 +#define GCREG_VPLANE_ADDRESS_LSB 0 +#define GCREG_VPLANE_ADDRESS_BLK 0 +#define GCREG_VPLANE_ADDRESS_Count 1 +#define GCREG_VPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_VPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_VPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_VPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_VPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_VPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_VPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_VPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State VPlaneStride +*/ + +/* Stride of the source V plane in bytes. */ + +#define gcregVPlaneStrideRegAddrs 0x04A4 +#define GCREG_VPLANE_STRIDE_MSB 15 +#define GCREG_VPLANE_STRIDE_LSB 0 +#define GCREG_VPLANE_STRIDE_BLK 0 +#define GCREG_VPLANE_STRIDE_Count 1 +#define GCREG_VPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_VPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_VPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_VPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_VPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_VPLANE_STRIDE_STRIDE_End 17 +#define GCREG_VPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_VPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregPEConfig +*/ + +/* PE debug register. */ + +#define gcregPEConfigRegAddrs 0x04AC +#define GCREG_PE_CONFIG_Address 0x012B0 +#define GCREG_PE_CONFIG_MSB 15 +#define GCREG_PE_CONFIG_LSB 0 +#define GCREG_PE_CONFIG_BLK 0 +#define GCREG_PE_CONFIG_Count 1 +#define GCREG_PE_CONFIG_FieldMask 0x0000000B +#define GCREG_PE_CONFIG_ReadMask 0x0000000B +#define GCREG_PE_CONFIG_WriteMask 0x0000000B +#define GCREG_PE_CONFIG_ResetValue 0x00000000 + +#define GCREG_PE_CONFIG_DESTINATION_FETCH 1 : 0 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_End 1 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_Start 0 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_Type U02 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_DISABLE 0x0 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_DEFAULT 0x1 +#define GCREG_PE_CONFIG_DESTINATION_FETCH_ALWAYS 0x2 + +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH 3 : 3 +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH_End 3 +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH_Start 3 +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH_Type U01 +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH_ENABLED 0x0 +#define GCREG_PE_CONFIG_MASK_DESTINATION_FETCH_MASKED 0x1 + +/******************************************************************************* +** State gcregDstRotationHeight +*/ + +/* 180/270 degree rotation configuration for the destination surface. Height +** field specifies the height of the surface in pixels. +*/ + +#define gcregDstRotationHeightRegAddrs 0x04AD +#define GCREG_DST_ROTATION_HEIGHT_MSB 15 +#define GCREG_DST_ROTATION_HEIGHT_LSB 0 +#define GCREG_DST_ROTATION_HEIGHT_BLK 0 +#define GCREG_DST_ROTATION_HEIGHT_Count 1 +#define GCREG_DST_ROTATION_HEIGHT_FieldMask 0x0000FFFF +#define GCREG_DST_ROTATION_HEIGHT_ReadMask 0x0000FFFF +#define GCREG_DST_ROTATION_HEIGHT_WriteMask 0x0000FFFF +#define GCREG_DST_ROTATION_HEIGHT_ResetValue 0x00000000 + +#define GCREG_DST_ROTATION_HEIGHT_HEIGHT 15 : 0 +#define GCREG_DST_ROTATION_HEIGHT_HEIGHT_End 15 +#define GCREG_DST_ROTATION_HEIGHT_HEIGHT_Start 0 +#define GCREG_DST_ROTATION_HEIGHT_HEIGHT_Type U16 + +struct gcregdstrotationheight { + /* gcregDstRotationHeightRegAddrs:GCREG_DST_ROTATION_HEIGHT_HEIGHT */ + unsigned int height:16; + + /* gcregDstRotationHeightRegAddrs:reserved */ + unsigned int _reserved_16_31:16; +}; + +/******************************************************************************* +** State gcregSrcRotationHeight +*/ + +/* 180/270 degree rotation configuration for the Source surface. Height field +** specifies the height of the surface in pixels. +*/ + +#define gcregSrcRotationHeightRegAddrs 0x04AE +#define GCREG_SRC_ROTATION_HEIGHT_MSB 15 +#define GCREG_SRC_ROTATION_HEIGHT_LSB 0 +#define GCREG_SRC_ROTATION_HEIGHT_BLK 0 +#define GCREG_SRC_ROTATION_HEIGHT_Count 1 +#define GCREG_SRC_ROTATION_HEIGHT_FieldMask 0x0000FFFF +#define GCREG_SRC_ROTATION_HEIGHT_ReadMask 0x0000FFFF +#define GCREG_SRC_ROTATION_HEIGHT_WriteMask 0x0000FFFF +#define GCREG_SRC_ROTATION_HEIGHT_ResetValue 0x00000000 + +#define GCREG_SRC_ROTATION_HEIGHT_HEIGHT 15 : 0 +#define GCREG_SRC_ROTATION_HEIGHT_HEIGHT_End 15 +#define GCREG_SRC_ROTATION_HEIGHT_HEIGHT_Start 0 +#define GCREG_SRC_ROTATION_HEIGHT_HEIGHT_Type U16 + +struct gcregsrcrotationheight { + /* gcregSrcRotationHeightRegAddrs:GCREG_SRC_ROTATION_HEIGHT_HEIGHT */ + unsigned int height:16; + + /* gcregSrcRotationHeightRegAddrs:reserved */ + unsigned int _reserved_16_31:16; +}; + +/******************************************************************************* +** State gcregRotAngle +*/ + +/* 0/90/180/270 degree rotation configuration for the Source surface. Height +** field specifies the height of the surface in pixels. +*/ + +#define gcregRotAngleRegAddrs 0x04AF +#define GCREG_ROT_ANGLE_MSB 15 +#define GCREG_ROT_ANGLE_LSB 0 +#define GCREG_ROT_ANGLE_BLK 0 +#define GCREG_ROT_ANGLE_Count 1 +#define GCREG_ROT_ANGLE_FieldMask 0x000BB33F +#define GCREG_ROT_ANGLE_ReadMask 0x000BB33F +#define GCREG_ROT_ANGLE_WriteMask 0x000BB33F +#define GCREG_ROT_ANGLE_ResetValue 0x00000000 + +#define GCREG_ROT_ANGLE_SRC 2 : 0 +#define GCREG_ROT_ANGLE_SRC_End 2 +#define GCREG_ROT_ANGLE_SRC_Start 0 +#define GCREG_ROT_ANGLE_SRC_Type U03 +#define GCREG_ROT_ANGLE_SRC_ROT0 0x0 +#define GCREG_ROT_ANGLE_SRC_FLIP_X 0x1 +#define GCREG_ROT_ANGLE_SRC_FLIP_Y 0x2 +#define GCREG_ROT_ANGLE_SRC_ROT90 0x4 +#define GCREG_ROT_ANGLE_SRC_ROT180 0x5 +#define GCREG_ROT_ANGLE_SRC_ROT270 0x6 + +#define GCREG_ROT_ANGLE_DST 5 : 3 +#define GCREG_ROT_ANGLE_DST_End 5 +#define GCREG_ROT_ANGLE_DST_Start 3 +#define GCREG_ROT_ANGLE_DST_Type U03 +#define GCREG_ROT_ANGLE_DST_ROT0 0x0 +#define GCREG_ROT_ANGLE_DST_FLIP_X 0x1 +#define GCREG_ROT_ANGLE_DST_FLIP_Y 0x2 +#define GCREG_ROT_ANGLE_DST_ROT90 0x4 +#define GCREG_ROT_ANGLE_DST_ROT180 0x5 +#define GCREG_ROT_ANGLE_DST_ROT270 0x6 + +#define GCREG_ROT_ANGLE_MASK_SRC 8 : 8 +#define GCREG_ROT_ANGLE_MASK_SRC_End 8 +#define GCREG_ROT_ANGLE_MASK_SRC_Start 8 +#define GCREG_ROT_ANGLE_MASK_SRC_Type U01 +#define GCREG_ROT_ANGLE_MASK_SRC_ENABLED 0x0 +#define GCREG_ROT_ANGLE_MASK_SRC_MASKED 0x1 + +#define GCREG_ROT_ANGLE_MASK_DST 9 : 9 +#define GCREG_ROT_ANGLE_MASK_DST_End 9 +#define GCREG_ROT_ANGLE_MASK_DST_Start 9 +#define GCREG_ROT_ANGLE_MASK_DST_Type U01 +#define GCREG_ROT_ANGLE_MASK_DST_ENABLED 0x0 +#define GCREG_ROT_ANGLE_MASK_DST_MASKED 0x1 + +#define GCREG_ROT_ANGLE_SRC_MIRROR 13 : 12 +#define GCREG_ROT_ANGLE_SRC_MIRROR_End 13 +#define GCREG_ROT_ANGLE_SRC_MIRROR_Start 12 +#define GCREG_ROT_ANGLE_SRC_MIRROR_Type U02 +#define GCREG_ROT_ANGLE_SRC_MIRROR_NONE 0x0 +#define GCREG_ROT_ANGLE_SRC_MIRROR_MIRROR_X 0x1 +#define GCREG_ROT_ANGLE_SRC_MIRROR_MIRROR_Y 0x2 +#define GCREG_ROT_ANGLE_SRC_MIRROR_MIRROR_XY 0x3 + +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR 15 : 15 +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR_End 15 +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR_Start 15 +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR_Type U01 +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR_ENABLED 0x0 +#define GCREG_ROT_ANGLE_MASK_SRC_MIRROR_MASKED 0x1 + +#define GCREG_ROT_ANGLE_DST_MIRROR 17 : 16 +#define GCREG_ROT_ANGLE_DST_MIRROR_End 17 +#define GCREG_ROT_ANGLE_DST_MIRROR_Start 16 +#define GCREG_ROT_ANGLE_DST_MIRROR_Type U02 +#define GCREG_ROT_ANGLE_DST_MIRROR_NONE 0x0 +#define GCREG_ROT_ANGLE_DST_MIRROR_MIRROR_X 0x1 +#define GCREG_ROT_ANGLE_DST_MIRROR_MIRROR_Y 0x2 +#define GCREG_ROT_ANGLE_DST_MIRROR_MIRROR_XY 0x3 + +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR 19 : 19 +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR_End 19 +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR_Start 19 +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR_Type U01 +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR_ENABLED 0x0 +#define GCREG_ROT_ANGLE_MASK_DST_MIRROR_MASKED 0x1 + +struct gcregrotangle { + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_SRC */ + unsigned int src:3; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_DST */ + unsigned int dst:3; + + /* gcregRotAngleRegAddrs:reserved */ + unsigned int _reserved_6_7:2; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_MASK_SRC */ + unsigned int src_mask:1; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_MASK_DST */ + unsigned int dst_mask:1; + + /* gcregRotAngleRegAddrs:reserved */ + unsigned int _reserved_10_11:2; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_SRC_MIRROR */ + unsigned int src_mirror:2; + + /* gcregRotAngleRegAddrs:reserved */ + unsigned int _reserved_14:1; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_MASK_SRC_MIRROR */ + unsigned int src_mirror_mask:1; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_DST_MIRROR */ + unsigned int dst_mirror:2; + + /* gcregRotAngleRegAddrs:reserved */ + unsigned int _reserved_18:1; + + /* gcregRotAngleRegAddrs:GCREG_ROT_ANGLE_MASK_DST_MIRROR */ + unsigned int dst_mirror_mask:1; + + /* gcregRotAngleRegAddrs:reserved */ + unsigned int _reserved_20_31:12; +}; + +/******************************************************************************* +** State gcregClearPixelValue32 +*/ + +/* Clear color value in A8R8G8B8 format. */ + +#define gcregClearPixelValue32RegAddrs 0x04B0 +#define GCREG_CLEAR_PIXEL_VALUE32_MSB 15 +#define GCREG_CLEAR_PIXEL_VALUE32_LSB 0 +#define GCREG_CLEAR_PIXEL_VALUE32_BLK 0 +#define GCREG_CLEAR_PIXEL_VALUE32_Count 1 +#define GCREG_CLEAR_PIXEL_VALUE32_FieldMask 0xFFFFFFFF +#define GCREG_CLEAR_PIXEL_VALUE32_ReadMask 0xFFFFFFFF +#define GCREG_CLEAR_PIXEL_VALUE32_WriteMask 0xFFFFFFFF +#define GCREG_CLEAR_PIXEL_VALUE32_ResetValue 0x00000000 + +#define GCREG_CLEAR_PIXEL_VALUE32_ALPHA 31 : 24 +#define GCREG_CLEAR_PIXEL_VALUE32_ALPHA_End 31 +#define GCREG_CLEAR_PIXEL_VALUE32_ALPHA_Start 24 +#define GCREG_CLEAR_PIXEL_VALUE32_ALPHA_Type U08 + +#define GCREG_CLEAR_PIXEL_VALUE32_RED 23 : 16 +#define GCREG_CLEAR_PIXEL_VALUE32_RED_End 23 +#define GCREG_CLEAR_PIXEL_VALUE32_RED_Start 16 +#define GCREG_CLEAR_PIXEL_VALUE32_RED_Type U08 + +#define GCREG_CLEAR_PIXEL_VALUE32_GREEN 15 : 8 +#define GCREG_CLEAR_PIXEL_VALUE32_GREEN_End 15 +#define GCREG_CLEAR_PIXEL_VALUE32_GREEN_Start 8 +#define GCREG_CLEAR_PIXEL_VALUE32_GREEN_Type U08 + +#define GCREG_CLEAR_PIXEL_VALUE32_BLUE 7 : 0 +#define GCREG_CLEAR_PIXEL_VALUE32_BLUE_End 7 +#define GCREG_CLEAR_PIXEL_VALUE32_BLUE_Start 0 +#define GCREG_CLEAR_PIXEL_VALUE32_BLUE_Type U08 + +struct gcregclearcolor { + /* gcregClearPixelValue32RegAddrs:GCREG_CLEAR_PIXEL_VALUE32_BLUE */ + unsigned int b:8; + + /* gcregClearPixelValue32RegAddrs:GCREG_CLEAR_PIXEL_VALUE32_GREEN */ + unsigned int g:8; + + /* gcregClearPixelValue32RegAddrs:GCREG_CLEAR_PIXEL_VALUE32_RED */ + unsigned int r:8; + + /* gcregClearPixelValue32RegAddrs:GCREG_CLEAR_PIXEL_VALUE32_ALPHA */ + unsigned int a:8; +}; + +/******************************************************************************* +** State gcregDestColorKey +*/ + +/* Defines the destination transparency color in destination format. */ + +#define gcregDestColorKeyRegAddrs 0x04B1 +#define GCREG_DEST_COLOR_KEY_MSB 15 +#define GCREG_DEST_COLOR_KEY_LSB 0 +#define GCREG_DEST_COLOR_KEY_BLK 0 +#define GCREG_DEST_COLOR_KEY_Count 1 +#define GCREG_DEST_COLOR_KEY_FieldMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_ReadMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_WriteMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_ResetValue 0x00000000 + +#define GCREG_DEST_COLOR_KEY_ALPHA 31 : 24 +#define GCREG_DEST_COLOR_KEY_ALPHA_End 31 +#define GCREG_DEST_COLOR_KEY_ALPHA_Start 24 +#define GCREG_DEST_COLOR_KEY_ALPHA_Type U08 + +#define GCREG_DEST_COLOR_KEY_RED 23 : 16 +#define GCREG_DEST_COLOR_KEY_RED_End 23 +#define GCREG_DEST_COLOR_KEY_RED_Start 16 +#define GCREG_DEST_COLOR_KEY_RED_Type U08 + +#define GCREG_DEST_COLOR_KEY_GREEN 15 : 8 +#define GCREG_DEST_COLOR_KEY_GREEN_End 15 +#define GCREG_DEST_COLOR_KEY_GREEN_Start 8 +#define GCREG_DEST_COLOR_KEY_GREEN_Type U08 + +#define GCREG_DEST_COLOR_KEY_BLUE 7 : 0 +#define GCREG_DEST_COLOR_KEY_BLUE_End 7 +#define GCREG_DEST_COLOR_KEY_BLUE_Start 0 +#define GCREG_DEST_COLOR_KEY_BLUE_Type U08 + +/******************************************************************************* +** State gcregGlobalSrcColor +*/ + +/* Defines the global source color and alpha values. */ + +#define gcregGlobalSrcColorRegAddrs 0x04B2 +#define GCREG_GLOBAL_SRC_COLOR_MSB 15 +#define GCREG_GLOBAL_SRC_COLOR_LSB 0 +#define GCREG_GLOBAL_SRC_COLOR_BLK 0 +#define GCREG_GLOBAL_SRC_COLOR_Count 1 +#define GCREG_GLOBAL_SRC_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_GLOBAL_SRC_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_GLOBAL_SRC_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_GLOBAL_SRC_COLOR_ResetValue 0x00000000 + +#define GCREG_GLOBAL_SRC_COLOR_ALPHA 31 : 24 +#define GCREG_GLOBAL_SRC_COLOR_ALPHA_End 31 +#define GCREG_GLOBAL_SRC_COLOR_ALPHA_Start 24 +#define GCREG_GLOBAL_SRC_COLOR_ALPHA_Type U08 + +#define GCREG_GLOBAL_SRC_COLOR_RED 23 : 16 +#define GCREG_GLOBAL_SRC_COLOR_RED_End 23 +#define GCREG_GLOBAL_SRC_COLOR_RED_Start 16 +#define GCREG_GLOBAL_SRC_COLOR_RED_Type U08 + +#define GCREG_GLOBAL_SRC_COLOR_GREEN 15 : 8 +#define GCREG_GLOBAL_SRC_COLOR_GREEN_End 15 +#define GCREG_GLOBAL_SRC_COLOR_GREEN_Start 8 +#define GCREG_GLOBAL_SRC_COLOR_GREEN_Type U08 + +#define GCREG_GLOBAL_SRC_COLOR_BLUE 7 : 0 +#define GCREG_GLOBAL_SRC_COLOR_BLUE_End 7 +#define GCREG_GLOBAL_SRC_COLOR_BLUE_Start 0 +#define GCREG_GLOBAL_SRC_COLOR_BLUE_Type U08 + +struct gcregglobalsrccolor { + /* gcregGlobalSrcColorRegAddrs:GCREG_GLOBAL_SRC_COLOR_BLUE */ + unsigned int b:8; + + /* gcregGlobalSrcColorRegAddrs:GCREG_GLOBAL_SRC_COLOR_GREEN */ + unsigned int g:8; + + /* gcregGlobalSrcColorRegAddrs:GCREG_GLOBAL_SRC_COLOR_RED */ + unsigned int r:8; + + /* gcregGlobalSrcColorRegAddrs:GCREG_GLOBAL_SRC_COLOR_ALPHA */ + unsigned int a:8; +}; + +/******************************************************************************* +** State gcregGlobalDestColor +*/ + +/* Defines the global destination color and alpha values. */ + +#define gcregGlobalDestColorRegAddrs 0x04B3 +#define GCREG_GLOBAL_DEST_COLOR_MSB 15 +#define GCREG_GLOBAL_DEST_COLOR_LSB 0 +#define GCREG_GLOBAL_DEST_COLOR_BLK 0 +#define GCREG_GLOBAL_DEST_COLOR_Count 1 +#define GCREG_GLOBAL_DEST_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_GLOBAL_DEST_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_GLOBAL_DEST_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_GLOBAL_DEST_COLOR_ResetValue 0x00000000 + +#define GCREG_GLOBAL_DEST_COLOR_ALPHA 31 : 24 +#define GCREG_GLOBAL_DEST_COLOR_ALPHA_End 31 +#define GCREG_GLOBAL_DEST_COLOR_ALPHA_Start 24 +#define GCREG_GLOBAL_DEST_COLOR_ALPHA_Type U08 + +#define GCREG_GLOBAL_DEST_COLOR_RED 23 : 16 +#define GCREG_GLOBAL_DEST_COLOR_RED_End 23 +#define GCREG_GLOBAL_DEST_COLOR_RED_Start 16 +#define GCREG_GLOBAL_DEST_COLOR_RED_Type U08 + +#define GCREG_GLOBAL_DEST_COLOR_GREEN 15 : 8 +#define GCREG_GLOBAL_DEST_COLOR_GREEN_End 15 +#define GCREG_GLOBAL_DEST_COLOR_GREEN_Start 8 +#define GCREG_GLOBAL_DEST_COLOR_GREEN_Type U08 + +#define GCREG_GLOBAL_DEST_COLOR_BLUE 7 : 0 +#define GCREG_GLOBAL_DEST_COLOR_BLUE_End 7 +#define GCREG_GLOBAL_DEST_COLOR_BLUE_Start 0 +#define GCREG_GLOBAL_DEST_COLOR_BLUE_Type U08 + +struct gcregglobaldstcolor { + /* gcregGlobalDestColorRegAddrs:GCREG_GLOBAL_DEST_COLOR_BLUE */ + unsigned int b:8; + + /* gcregGlobalDestColorRegAddrs:GCREG_GLOBAL_DEST_COLOR_GREEN */ + unsigned int g:8; + + /* gcregGlobalDestColorRegAddrs:GCREG_GLOBAL_DEST_COLOR_RED */ + unsigned int r:8; + + /* gcregGlobalDestColorRegAddrs:GCREG_GLOBAL_DEST_COLOR_ALPHA */ + unsigned int a:8; +}; + +/******************************************************************************* +** State gcregColorMultiplyModes +*/ + +/* Color modes to multiply Source or Destination pixel color by alpha +** channel. Alpha can be from global color source or current pixel. +*/ + +#define gcregColorMultiplyModesRegAddrs 0x04B4 +#define GCREG_COLOR_MULTIPLY_MODES_MSB 15 +#define GCREG_COLOR_MULTIPLY_MODES_LSB 0 +#define GCREG_COLOR_MULTIPLY_MODES_BLK 0 +#define GCREG_COLOR_MULTIPLY_MODES_Count 1 +#define GCREG_COLOR_MULTIPLY_MODES_FieldMask 0x00100311 +#define GCREG_COLOR_MULTIPLY_MODES_ReadMask 0x00100311 +#define GCREG_COLOR_MULTIPLY_MODES_WriteMask 0x00100311 +#define GCREG_COLOR_MULTIPLY_MODES_ResetValue 0x00000000 + +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY 0 : 0 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_End 0 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Start 0 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Type U01 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x0 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY 4 : 4 +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_End 4 +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Start 4 +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Type U01 +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x0 +#define GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY 9 : 8 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_End 9 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Start 8 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Type U02 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x0 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x1 +#define GCREG_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x2 + +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY 20 : 20 +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_End 20 +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Start 20 +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Type U01 +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x0 +#define GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x1 + +struct gcregcolormultiplymodes { + /* gcregColorMultiplyModesRegAddrs: + GCREG_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY */ + unsigned int srcpremul:1; + + /* gcregColorMultiplyModesRegAddrs: + reserved */ + unsigned int _reserved_1_3:3; + + /* gcregColorMultiplyModesRegAddrs: + GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY */ + unsigned int dstpremul:1; + + /* gcregColorMultiplyModesRegAddrs: + reserved */ + unsigned int _reserved_5_7:3; + + /* gcregColorMultiplyModesRegAddrs: + GCREG_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY */ + unsigned int srcglobalpremul:2; + + /* gcregColorMultiplyModesRegAddrs: + reserved */ + unsigned int _reserved_10_19:10; + + /* gcregColorMultiplyModesRegAddrs: + GCREG_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY */ + unsigned int dstdemul:1; + + /* gcregColorMultiplyModesRegAddrs: + reserved */ + unsigned int _reserved_21_31:11; +}; + +/******************************************************************************* +** State gcregPETransparency +*/ + +#define gcregPETransparencyRegAddrs 0x04B5 +#define GCREG_PE_TRANSPARENCY_MSB 15 +#define GCREG_PE_TRANSPARENCY_LSB 0 +#define GCREG_PE_TRANSPARENCY_BLK 0 +#define GCREG_PE_TRANSPARENCY_Count 1 +#define GCREG_PE_TRANSPARENCY_FieldMask 0xB3331333 +#define GCREG_PE_TRANSPARENCY_ReadMask 0xB3331333 +#define GCREG_PE_TRANSPARENCY_WriteMask 0xB3331333 +#define GCREG_PE_TRANSPARENCY_ResetValue 0x00000000 + +/* Source transparency mode. */ +#define GCREG_PE_TRANSPARENCY_SOURCE 1 : 0 +#define GCREG_PE_TRANSPARENCY_SOURCE_End 1 +#define GCREG_PE_TRANSPARENCY_SOURCE_Start 0 +#define GCREG_PE_TRANSPARENCY_SOURCE_Type U02 +#define GCREG_PE_TRANSPARENCY_SOURCE_OPAQUE 0x0 +#define GCREG_PE_TRANSPARENCY_SOURCE_MASK 0x1 +#define GCREG_PE_TRANSPARENCY_SOURCE_KEY 0x2 + +/* Pattern transparency mode. KEY transparency mode is reserved. */ +#define GCREG_PE_TRANSPARENCY_PATTERN 5 : 4 +#define GCREG_PE_TRANSPARENCY_PATTERN_End 5 +#define GCREG_PE_TRANSPARENCY_PATTERN_Start 4 +#define GCREG_PE_TRANSPARENCY_PATTERN_Type U02 +#define GCREG_PE_TRANSPARENCY_PATTERN_OPAQUE 0x0 +#define GCREG_PE_TRANSPARENCY_PATTERN_MASK 0x1 +#define GCREG_PE_TRANSPARENCY_PATTERN_KEY 0x2 + +/* Destination transparency mode. MASK transparency mode is reserved. */ +#define GCREG_PE_TRANSPARENCY_DESTINATION 9 : 8 +#define GCREG_PE_TRANSPARENCY_DESTINATION_End 9 +#define GCREG_PE_TRANSPARENCY_DESTINATION_Start 8 +#define GCREG_PE_TRANSPARENCY_DESTINATION_Type U02 +#define GCREG_PE_TRANSPARENCY_DESTINATION_OPAQUE 0x0 +#define GCREG_PE_TRANSPARENCY_DESTINATION_MASK 0x1 +#define GCREG_PE_TRANSPARENCY_DESTINATION_KEY 0x2 + +/* Mask field for Source/Pattern/Destination fields. */ +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY 12 : 12 +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY_End 12 +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY_Start 12 +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY_Type U01 +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY_ENABLED 0x0 +#define GCREG_PE_TRANSPARENCY_MASK_TRANSPARENCY_MASKED 0x1 + +/* Source usage override. */ +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE 17 : 16 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_End 17 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_Start 16 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_Type U02 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x0 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x2 + +/* Pattern usage override. */ +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE 21 : 20 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_End 21 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_Start 20 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_Type U02 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x0 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x2 + +/* Destination usage override. */ +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE 25 : 24 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_End 25 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_Start 24 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_Type U02 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x0 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x2 + +/* 2D resource usage override mask field. */ +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE 28 : 28 +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_End 28 +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Start 28 +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Type U01 +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_ENABLED 0x0 +#define GCREG_PE_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_MASKED 0x1 + +/* DEB Color Key. */ +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY 29 : 29 +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY_End 29 +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY_Start 29 +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY_Type U01 +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY_DISABLED 0x0 +#define GCREG_PE_TRANSPARENCY_DFB_COLOR_KEY_ENABLED 0x1 + +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY 31 : 31 +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY_End 31 +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY_Start 31 +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY_Type U01 +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY_ENABLED 0x0 +#define GCREG_PE_TRANSPARENCY_MASK_DFB_COLOR_KEY_MASKED 0x1 + +/******************************************************************************* +** State gcregPEControl +*/ + +/* General purpose control register. */ + +#define gcregPEControlRegAddrs 0x04B6 +#define GCREG_PE_CONTROL_MSB 15 +#define GCREG_PE_CONTROL_LSB 0 +#define GCREG_PE_CONTROL_BLK 0 +#define GCREG_PE_CONTROL_Count 1 +#define GCREG_PE_CONTROL_FieldMask 0x00000999 +#define GCREG_PE_CONTROL_ReadMask 0x00000999 +#define GCREG_PE_CONTROL_WriteMask 0x00000999 +#define GCREG_PE_CONTROL_ResetValue 0x00000000 + +#define GCREG_PE_CONTROL_YUV 0 : 0 +#define GCREG_PE_CONTROL_YUV_End 0 +#define GCREG_PE_CONTROL_YUV_Start 0 +#define GCREG_PE_CONTROL_YUV_Type U01 +#define GCREG_PE_CONTROL_YUV_601 0x0 +#define GCREG_PE_CONTROL_YUV_709 0x1 + +#define GCREG_PE_CONTROL_MASK_YUV 3 : 3 +#define GCREG_PE_CONTROL_MASK_YUV_End 3 +#define GCREG_PE_CONTROL_MASK_YUV_Start 3 +#define GCREG_PE_CONTROL_MASK_YUV_Type U01 +#define GCREG_PE_CONTROL_MASK_YUV_ENABLED 0x0 +#define GCREG_PE_CONTROL_MASK_YUV_MASKED 0x1 + +#define GCREG_PE_CONTROL_UV_SWIZZLE 4 : 4 +#define GCREG_PE_CONTROL_UV_SWIZZLE_End 4 +#define GCREG_PE_CONTROL_UV_SWIZZLE_Start 4 +#define GCREG_PE_CONTROL_UV_SWIZZLE_Type U01 +#define GCREG_PE_CONTROL_UV_SWIZZLE_UV 0x0 +#define GCREG_PE_CONTROL_UV_SWIZZLE_VU 0x1 + +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE 7 : 7 +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE_End 7 +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE_Start 7 +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE_Type U01 +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE_ENABLED 0x0 +#define GCREG_PE_CONTROL_MASK_UV_SWIZZLE_MASKED 0x1 + +/* YUV to RGB convert enable */ +#define GCREG_PE_CONTROL_YUVRGB 8 : 8 +#define GCREG_PE_CONTROL_YUVRGB_End 8 +#define GCREG_PE_CONTROL_YUVRGB_Start 8 +#define GCREG_PE_CONTROL_YUVRGB_Type U01 +#define GCREG_PE_CONTROL_YUVRGB_DISABLED 0x0 +#define GCREG_PE_CONTROL_YUVRGB_ENABLED 0x1 + +#define GCREG_PE_CONTROL_MASK_YUVRGB 11 : 11 +#define GCREG_PE_CONTROL_MASK_YUVRGB_End 11 +#define GCREG_PE_CONTROL_MASK_YUVRGB_Start 11 +#define GCREG_PE_CONTROL_MASK_YUVRGB_Type U01 +#define GCREG_PE_CONTROL_MASK_YUVRGB_ENABLED 0x0 +#define GCREG_PE_CONTROL_MASK_YUVRGB_MASKED 0x1 + +struct gcregpecontrol { + /* gcregPEControlRegAddrs:YUV */ + unsigned int standard:1; + + /* gcregPEControlRegAddrs:reserved */ + unsigned int _reserved_1_2:2; + + /* gcregPEControlRegAddrs:MASK_YUV */ + unsigned int standard_mask:1; + + /* gcregPEControlRegAddrs:UV_SWIZZLE */ + unsigned int swizzle:1; + + /* gcregPEControlRegAddrs:reserved */ + unsigned int _reserved_5_6:2; + + /* gcregPEControlRegAddrs:MASK_UV_SWIZZLE */ + unsigned int swizzle_mask:1; + + /* gcregPEControlRegAddrs:YUVRGB */ + unsigned int convert:1; + + /* gcregPEControlRegAddrs:reserved */ + unsigned int _reserved_9_10:2; + + /* gcregPEControlRegAddrs:MASK_YUVRGB */ + unsigned int convert_mask:1; + + /* gcregPEControlRegAddrs:reserved */ + unsigned int _reserved_12_31:20; +}; + +/******************************************************************************* +** State gcregSrcColorKeyHigh +*/ + +/* Defines the source transparency color in source format. */ + +#define gcregSrcColorKeyHighRegAddrs 0x04B7 +#define GCREG_SRC_COLOR_KEY_HIGH_Address 0x012DC +#define GCREG_SRC_COLOR_KEY_HIGH_MSB 15 +#define GCREG_SRC_COLOR_KEY_HIGH_LSB 0 +#define GCREG_SRC_COLOR_KEY_HIGH_BLK 0 +#define GCREG_SRC_COLOR_KEY_HIGH_Count 1 +#define GCREG_SRC_COLOR_KEY_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_KEY_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_KEY_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_SRC_COLOR_KEY_HIGH_ResetValue 0x00000000 + +#define GCREG_SRC_COLOR_KEY_HIGH_ALPHA 31 : 24 +#define GCREG_SRC_COLOR_KEY_HIGH_ALPHA_End 31 +#define GCREG_SRC_COLOR_KEY_HIGH_ALPHA_Start 24 +#define GCREG_SRC_COLOR_KEY_HIGH_ALPHA_Type U08 + +#define GCREG_SRC_COLOR_KEY_HIGH_RED 23 : 16 +#define GCREG_SRC_COLOR_KEY_HIGH_RED_End 23 +#define GCREG_SRC_COLOR_KEY_HIGH_RED_Start 16 +#define GCREG_SRC_COLOR_KEY_HIGH_RED_Type U08 + +#define GCREG_SRC_COLOR_KEY_HIGH_GREEN 15 : 8 +#define GCREG_SRC_COLOR_KEY_HIGH_GREEN_End 15 +#define GCREG_SRC_COLOR_KEY_HIGH_GREEN_Start 8 +#define GCREG_SRC_COLOR_KEY_HIGH_GREEN_Type U08 + +#define GCREG_SRC_COLOR_KEY_HIGH_BLUE 7 : 0 +#define GCREG_SRC_COLOR_KEY_HIGH_BLUE_End 7 +#define GCREG_SRC_COLOR_KEY_HIGH_BLUE_Start 0 +#define GCREG_SRC_COLOR_KEY_HIGH_BLUE_Type U08 + +/******************************************************************************* +** State gcregDestColorKeyHigh +*/ + +/* Defines the destination transparency color in destination format. */ + +#define gcregDestColorKeyHighRegAddrs 0x04B8 +#define GCREG_DEST_COLOR_KEY_HIGH_MSB 15 +#define GCREG_DEST_COLOR_KEY_HIGH_LSB 0 +#define GCREG_DEST_COLOR_KEY_HIGH_BLK 0 +#define GCREG_DEST_COLOR_KEY_HIGH_Count 1 +#define GCREG_DEST_COLOR_KEY_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_DEST_COLOR_KEY_HIGH_ResetValue 0x00000000 + +#define GCREG_DEST_COLOR_KEY_HIGH_ALPHA 31 : 24 +#define GCREG_DEST_COLOR_KEY_HIGH_ALPHA_End 31 +#define GCREG_DEST_COLOR_KEY_HIGH_ALPHA_Start 24 +#define GCREG_DEST_COLOR_KEY_HIGH_ALPHA_Type U08 + +#define GCREG_DEST_COLOR_KEY_HIGH_RED 23 : 16 +#define GCREG_DEST_COLOR_KEY_HIGH_RED_End 23 +#define GCREG_DEST_COLOR_KEY_HIGH_RED_Start 16 +#define GCREG_DEST_COLOR_KEY_HIGH_RED_Type U08 + +#define GCREG_DEST_COLOR_KEY_HIGH_GREEN 15 : 8 +#define GCREG_DEST_COLOR_KEY_HIGH_GREEN_End 15 +#define GCREG_DEST_COLOR_KEY_HIGH_GREEN_Start 8 +#define GCREG_DEST_COLOR_KEY_HIGH_GREEN_Type U08 + +#define GCREG_DEST_COLOR_KEY_HIGH_BLUE 7 : 0 +#define GCREG_DEST_COLOR_KEY_HIGH_BLUE_End 7 +#define GCREG_DEST_COLOR_KEY_HIGH_BLUE_Start 0 +#define GCREG_DEST_COLOR_KEY_HIGH_BLUE_Type U08 + +/******************************************************************************* +** State gcregPEDitherLow +*/ + +/* PE dither register. +** If you don't want dither, set all fields to their reset values. +*/ + +#define gcregPEDitherLowRegAddrs 0x04BA +#define GCREG_PE_DITHER_LOW_MSB 15 +#define GCREG_PE_DITHER_LOW_LSB 0 +#define GCREG_PE_DITHER_LOW_BLK 0 +#define GCREG_PE_DITHER_LOW_Count 1 +#define GCREG_PE_DITHER_LOW_FieldMask 0xFFFFFFFF +#define GCREG_PE_DITHER_LOW_ReadMask 0xFFFFFFFF +#define GCREG_PE_DITHER_LOW_WriteMask 0xFFFFFFFF +#define GCREG_PE_DITHER_LOW_ResetValue 0xFFFFFFFF + +/* X,Y = 0,0 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y0 3 : 0 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y0_End 3 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y0_Start 0 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y0_Type U04 + +/* X,Y = 1,0 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y0 7 : 4 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y0_End 7 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y0_Start 4 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y0_Type U04 + +/* X,Y = 2,0 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y0 11 : 8 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y0_End 11 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y0_Start 8 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y0_Type U04 + +/* X,Y = 3,0 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y0 15 : 12 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y0_End 15 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y0_Start 12 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y0_Type U04 + +/* X,Y = 0,1 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y1 19 : 16 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y1_End 19 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y1_Start 16 +#define GCREG_PE_DITHER_LOW_PIXEL_X0_Y1_Type U04 + +/* X,Y = 1,1 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y1 23 : 20 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y1_End 23 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y1_Start 20 +#define GCREG_PE_DITHER_LOW_PIXEL_X1_Y1_Type U04 + +/* X,Y = 2,1 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y1 27 : 24 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y1_End 27 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y1_Start 24 +#define GCREG_PE_DITHER_LOW_PIXEL_X2_Y1_Type U04 + +/* X,Y = 3,1 */ +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y1 31 : 28 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y1_End 31 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y1_Start 28 +#define GCREG_PE_DITHER_LOW_PIXEL_X3_Y1_Type U04 + +/******************************************************************************* +** State gcregPEDitherHigh +*/ + +#define gcregPEDitherHighRegAddrs 0x04BB +#define GCREG_PE_DITHER_HIGH_MSB 15 +#define GCREG_PE_DITHER_HIGH_LSB 0 +#define GCREG_PE_DITHER_LOW_HIGH_BLK 0 +#define GCREG_PE_DITHER_HIGH_Count 1 +#define GCREG_PE_DITHER_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_PE_DITHER_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_PE_DITHER_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_PE_DITHER_HIGH_ResetValue 0xFFFFFFFF + +/* X,Y = 0,2 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y2 3 : 0 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y2_End 3 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y2_Start 0 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y2_Type U04 + +/* X,Y = 1,2 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y2 7 : 4 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y2_End 7 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y2_Start 4 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y2_Type U04 + +/* X,Y = 2,2 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y2 11 : 8 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y2_End 11 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y2_Start 8 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y2_Type U04 + +/* X,Y = 0,3 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y2 15 : 12 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y2_End 15 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y2_Start 12 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y2_Type U04 + +/* X,Y = 1,3 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y3 19 : 16 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y3_End 19 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y3_Start 16 +#define GCREG_PE_DITHER_HIGH_PIXEL_X0_Y3_Type U04 + +/* X,Y = 2,3 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y3 23 : 20 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y3_End 23 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y3_Start 20 +#define GCREG_PE_DITHER_HIGH_PIXEL_X1_Y3_Type U04 + +/* X,Y = 3,3 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y3 27 : 24 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y3_End 27 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y3_Start 24 +#define GCREG_PE_DITHER_HIGH_PIXEL_X2_Y3_Type U04 + +/* X,Y = 3,2 */ +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y3 31 : 28 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y3_End 31 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y3_Start 28 +#define GCREG_PE_DITHER_HIGH_PIXEL_X3_Y3_Type U04 + +/******************************************************************************* +** State gcregSrcExConfig +*/ + +#define gcregSrcExConfigRegAddrs 0x04C0 +#define GCREG_SRC_EX_CONFIG_MSB 15 +#define GCREG_SRC_EX_CONFIG_LSB 0 +#define GCREG_SRC_EX_CONFIG_BLK 0 +#define GCREG_SRC_EX_CONFIG_Count 1 +#define GCREG_SRC_EX_CONFIG_FieldMask 0x00000109 +#define GCREG_SRC_EX_CONFIG_ReadMask 0x00000109 +#define GCREG_SRC_EX_CONFIG_WriteMask 0x00000109 +#define GCREG_SRC_EX_CONFIG_ResetValue 0x00000000 + +/* Source multi tiled address computation control. */ +#define GCREG_SRC_EX_CONFIG_MULTI_TILED 0 : 0 +#define GCREG_SRC_EX_CONFIG_MULTI_TILED_End 0 +#define GCREG_SRC_EX_CONFIG_MULTI_TILED_Start 0 +#define GCREG_SRC_EX_CONFIG_MULTI_TILED_Type U01 +#define GCREG_SRC_EX_CONFIG_MULTI_TILED_DISABLED 0x0 +#define GCREG_SRC_EX_CONFIG_MULTI_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_SRC_EX_CONFIG_SUPER_TILED 3 : 3 +#define GCREG_SRC_EX_CONFIG_SUPER_TILED_End 3 +#define GCREG_SRC_EX_CONFIG_SUPER_TILED_Start 3 +#define GCREG_SRC_EX_CONFIG_SUPER_TILED_Type U01 +#define GCREG_SRC_EX_CONFIG_SUPER_TILED_DISABLED 0x0 +#define GCREG_SRC_EX_CONFIG_SUPER_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_SRC_EX_CONFIG_MINOR_TILED 8 : 8 +#define GCREG_SRC_EX_CONFIG_MINOR_TILED_End 8 +#define GCREG_SRC_EX_CONFIG_MINOR_TILED_Start 8 +#define GCREG_SRC_EX_CONFIG_MINOR_TILED_Type U01 +#define GCREG_SRC_EX_CONFIG_MINOR_TILED_DISABLED 0x0 +#define GCREG_SRC_EX_CONFIG_MINOR_TILED_ENABLED 0x1 + +/* Source CacheMode. */ +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE 12 : 12 +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE_End 12 +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE_Start 12 +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE_Type U01 +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE_DISABLED 0x0 +#define GCREG_SRC_SRC_EX_CONFIG_CACHE_MODE_ENABLED 0x1 + +/******************************************************************************* +** State gcregSrcExAddress +*/ + +/* 32-bit aligned base address of the source extra surface. */ + +#define gcregSrcExAddressRegAddrs 0x04C1 +#define GCREG_SRC_EX_ADDRESS_MSB 15 +#define GCREG_SRC_EX_ADDRESS_LSB 0 +#define GCREG_SRC_EX_ADDRESS_BLK 0 +#define GCREG_SRC_EX_ADDRESS_Count 1 +#define GCREG_SRC_EX_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_SRC_EX_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_SRC_EX_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_SRC_EX_ADDRESS_ResetValue 0x00000000 + +#define GCREG_SRC_EX_ADDRESS_ADDRESS 31 : 0 +#define GCREG_SRC_EX_ADDRESS_ADDRESS_End 30 +#define GCREG_SRC_EX_ADDRESS_ADDRESS_Start 0 +#define GCREG_SRC_EX_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregDEMultiSource +*/ + +/* MutiSource control register. */ + +#define gcregDEMultiSourceRegAddrs 0x04C2 +#define GCREG_DE_MULTI_SOURCE_MSB 15 +#define GCREG_DE_MULTI_SOURCE_LSB 0 +#define GCREG_DE_MULTI_SOURCE_BLK 0 +#define GCREG_DE_MULTI_SOURCE_Count 1 +#define GCREG_DE_MULTI_SOURCE_FieldMask 0x00070707 +#define GCREG_DE_MULTI_SOURCE_ReadMask 0x00070707 +#define GCREG_DE_MULTI_SOURCE_WriteMask 0x00070707 +#define GCREG_DE_MULTI_SOURCE_ResetValue 0x00000000 + +/* Number of source surfaces minus 1. */ +#define GCREG_DE_MULTI_SOURCE_MAX_SOURCE 2 : 0 +#define GCREG_DE_MULTI_SOURCE_MAX_SOURCE_End 2 +#define GCREG_DE_MULTI_SOURCE_MAX_SOURCE_Start 0 +#define GCREG_DE_MULTI_SOURCE_MAX_SOURCE_Type U03 + +/* Number of pixels for horizontal block walker. */ +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK 10 : 8 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_End 10 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_Start 8 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_Type U03 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL16 0x0 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL32 0x1 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL64 0x2 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL128 0x3 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL256 0x4 +#define GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL512 0x5 + +/* Number of lines for vertical block walker. */ +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK 18 : 16 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_End 18 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_Start 16 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_Type U03 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE1 0x0 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE2 0x1 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE4 0x2 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE8 0x3 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE16 0x4 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE32 0x5 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE64 0x6 +#define GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE128 0x7 + +struct gcregmultisource { + /* gcregDEMultiSourceRegAddrs:GCREG_DE_MULTI_SOURCE_MAX_SOURCE */ + unsigned int srccount:3; + + /* gcregDEMultiSourceRegAddrs:reserved */ + unsigned int _reserved_3_7:5; + + /* gcregDEMultiSourceRegAddrs:GCREG_DE_MULTI_SOURCE_HORIZONTAL_BLOCK */ + unsigned int horblock:3; + + /* gcregDEMultiSourceRegAddrs:reserved */ + unsigned int _reserved_11_15:5; + + /* gcregDEMultiSourceRegAddrs:GCREG_DE_MULTI_SOURCE_VERTICAL_BLOCK */ + unsigned int verblock:3; + + /* gcregDEMultiSourceRegAddrs:reserved */ + unsigned int _reserved_19_31:13; +}; + +/******************************************************************************* +** State gcregDEYUVConversion +*/ + +/* Configure the YUV to YUV conversion. */ + +#define gcregDEYUVConversionRegAddrs 0x04C3 +#define GCREG_DEYUV_CONVERSION_MSB 15 +#define GCREG_DEYUV_CONVERSION_LSB 0 +#define GCREG_DEYUV_CONVERSION_BLK 0 +#define GCREG_DEYUV_CONVERSION_Count 1 +#define GCREG_DEYUV_CONVERSION_FieldMask 0xFFFFFFFF +#define GCREG_DEYUV_CONVERSION_ReadMask 0xFFFFFFFF +#define GCREG_DEYUV_CONVERSION_WriteMask 0xFFFFFFFF +#define GCREG_DEYUV_CONVERSION_ResetValue 0x00000000 + +/* Select the number of planes we need to process. */ +#define GCREG_DEYUV_CONVERSION_ENABLE 1 : 0 +#define GCREG_DEYUV_CONVERSION_ENABLE_End 1 +#define GCREG_DEYUV_CONVERSION_ENABLE_Start 0 +#define GCREG_DEYUV_CONVERSION_ENABLE_Type U02 +/* YUV to YUV conversion is turned off. */ +#define GCREG_DEYUV_CONVERSION_ENABLE_OFF 0x0 +/* YUV to YUV conversion is writing to 1 plane. */ +#define GCREG_DEYUV_CONVERSION_ENABLE_PLANE1 0x1 +/* YUV to YUV conversion is writing to 2 planes. */ +#define GCREG_DEYUV_CONVERSION_ENABLE_PLANE2 0x2 +/* YUV to YUV conversion is writing to 3 planes. */ +#define GCREG_DEYUV_CONVERSION_ENABLE_PLANE3 0x3 + +/* Number of channels to process - 1 for plane 1. */ +#define GCREG_DEYUV_CONVERSION_PLANE1_COUNT 3 : 2 +#define GCREG_DEYUV_CONVERSION_PLANE1_COUNT_End 3 +#define GCREG_DEYUV_CONVERSION_PLANE1_COUNT_Start 2 +#define GCREG_DEYUV_CONVERSION_PLANE1_COUNT_Type U02 + +/* Number of channels to process - 1 for plane 2. */ +#define GCREG_DEYUV_CONVERSION_PLANE2_COUNT 5 : 4 +#define GCREG_DEYUV_CONVERSION_PLANE2_COUNT_End 5 +#define GCREG_DEYUV_CONVERSION_PLANE2_COUNT_Start 4 +#define GCREG_DEYUV_CONVERSION_PLANE2_COUNT_Type U02 + +/* Number of channels to process - 1 for plane 3. */ +#define GCREG_DEYUV_CONVERSION_PLANE3_COUNT 7 : 6 +#define GCREG_DEYUV_CONVERSION_PLANE3_COUNT_End 7 +#define GCREG_DEYUV_CONVERSION_PLANE3_COUNT_Start 6 +#define GCREG_DEYUV_CONVERSION_PLANE3_COUNT_Type U02 + +/* Select which color channel to pick for B channel for plane 1. */ +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B 9 : 8 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_End 9 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_Start 8 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_B_ALPHA 0x3 + +/* Select which color channel to pick for G channel for plane 1. */ +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G 11 : 10 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_End 11 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_Start 10 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_G_ALPHA 0x3 + +/* Select which color channel to pick for R channel for plane 1. */ +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R 13 : 12 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_End 13 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_Start 12 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_R_ALPHA 0x3 + +/* Select which color channel to pick for A channel for plane 1. */ +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A 15 : 14 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_End 15 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_Start 14 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE1_SWIZZLE_A_ALPHA 0x3 + +/* Select which color channel to pick for B channel for plane 2. */ +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B 17 : 16 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_End 17 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_Start 16 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_B_ALPHA 0x3 + +/* Select which color channel to pick for G channel for plane 2. */ +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G 19 : 18 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_End 19 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_Start 18 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_G_ALPHA 0x3 + +/* Select which color channel to pick for R channel for plane 2. */ +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R 21 : 20 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_End 21 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_Start 20 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_R_ALPHA 0x3 + +/* Select which color channel to pick for A channel for plane 2. */ +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A 23 : 22 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_End 23 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_Start 22 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE2_SWIZZLE_A_ALPHA 0x3 + +/* Select which color channel to pick for B channel for plane 3. */ +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B 25 : 24 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_End 25 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_Start 24 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_B_ALPHA 0x3 + +/* Select which color channel to pick for G channel for plane 3. */ +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G 27 : 26 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_End 27 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_Start 26 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_G_ALPHA 0x3 + +/* Select which color channel to pick for R channel for plane 3. */ +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R 29 : 28 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_End 29 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_Start 28 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_R_ALPHA 0x3 + +/* Select which color channel to pick for A channel for plane 3. */ +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A 31 : 30 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_End 31 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_Start 30 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_Type U02 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_BLUE 0x0 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_GREEN 0x1 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_RED 0x2 +#define GCREG_DEYUV_CONVERSION_PLANE3_SWIZZLE_A_ALPHA 0x3 + +/******************************************************************************* +** State gcregDEPlane2Address +*/ + +/* Address for plane 2 if gcregDEYUVConversion. +** Enable is set to Plane2 or Plane3. +*/ + +#define gcregDEPlane2AddressRegAddrs 0x04C4 +#define GCREG_DE_PLANE2_ADDRESS_Address 0x01310 +#define GCREG_DE_PLANE2_ADDRESS_MSB 15 +#define GCREG_DE_PLANE2_ADDRESS_LSB 0 +#define GCREG_DE_PLANE2_ADDRESS_BLK 0 +#define GCREG_DE_PLANE2_ADDRESS_Count 1 +#define GCREG_DE_PLANE2_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_DE_PLANE2_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_DE_PLANE2_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_DE_PLANE2_ADDRESS_ResetValue 0x00000000 + +#define GCREG_DE_PLANE2_ADDRESS_ADDRESS 31 : 0 +#define GCREG_DE_PLANE2_ADDRESS_ADDRESS_End 30 +#define GCREG_DE_PLANE2_ADDRESS_ADDRESS_Start 0 +#define GCREG_DE_PLANE2_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregDEPlane2Stride +*/ + +/* Stride for plane 2 if gcregDEYUVConversion. +** Enable is set to Plane2 or Plane3. +*/ + +#define gcregDEPlane2StrideRegAddrs 0x04C5 +#define GCREG_DE_PLANE2_STRIDE_MSB 15 +#define GCREG_DE_PLANE2_STRIDE_LSB 0 +#define GCREG_DE_PLANE2_STRIDE_BLK 0 +#define GCREG_DE_PLANE2_STRIDE_Count 1 +#define GCREG_DE_PLANE2_STRIDE_FieldMask 0x0003FFFF +#define GCREG_DE_PLANE2_STRIDE_ReadMask 0x0003FFFC +#define GCREG_DE_PLANE2_STRIDE_WriteMask 0x0003FFFC +#define GCREG_DE_PLANE2_STRIDE_ResetValue 0x00000000 + +#define GCREG_DE_PLANE2_STRIDE_STRIDE 17 : 0 +#define GCREG_DE_PLANE2_STRIDE_STRIDE_End 17 +#define GCREG_DE_PLANE2_STRIDE_STRIDE_Start 0 +#define GCREG_DE_PLANE2_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregDEPlane3Address +*/ + +/* Address for plane 3 if gcregDEYUVConversion. +** Enable is set to Plane3. +*/ + +#define gcregDEPlane3AddressRegAddrs 0x04C6 +#define GCREG_DE_PLANE3_ADDRESS_MSB 15 +#define GCREG_DE_PLANE3_ADDRESS_LSB 0 +#define GCREG_DE_PLANE3_ADDRESS_BLK 0 +#define GCREG_DE_PLANE3_ADDRESS_Count 1 +#define GCREG_DE_PLANE3_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_DE_PLANE3_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_DE_PLANE3_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_DE_PLANE3_ADDRESS_ResetValue 0x00000000 + +#define GCREG_DE_PLANE3_ADDRESS_ADDRESS 31 : 0 +#define GCREG_DE_PLANE3_ADDRESS_ADDRESS_End 30 +#define GCREG_DE_PLANE3_ADDRESS_ADDRESS_Start 0 +#define GCREG_DE_PLANE3_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregDEPlane3Stride +*/ + +/* Stride for plane 3 if gcregDEYUVConversion. +** Enable is set to Plane3. +*/ + +#define gcregDEPlane3StrideRegAddrs 0x04C7 +#define GCREG_DE_PLANE3_STRIDE_MSB 15 +#define GCREG_DE_PLANE3_STRIDE_LSB 0 +#define GCREG_DE_PLANE3_STRIDE_BLK 0 +#define GCREG_DE_PLANE3_STRIDE_Count 1 +#define GCREG_DE_PLANE3_STRIDE_FieldMask 0x0003FFFF +#define GCREG_DE_PLANE3_STRIDE_ReadMask 0x0003FFFC +#define GCREG_DE_PLANE3_STRIDE_WriteMask 0x0003FFFC +#define GCREG_DE_PLANE3_STRIDE_ResetValue 0x00000000 + +#define GCREG_DE_PLANE3_STRIDE_STRIDE 17 : 0 +#define GCREG_DE_PLANE3_STRIDE_STRIDE_End 17 +#define GCREG_DE_PLANE3_STRIDE_STRIDE_Start 0 +#define GCREG_DE_PLANE3_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregDEStallDE +*/ + +#define gcregDEStallDERegAddrs 0x04C8 +#define GCREG_DE_STALL_DE_MSB 15 +#define GCREG_DE_STALL_DE_LSB 0 +#define GCREG_DE_STALL_DE_BLK 0 +#define GCREG_DE_STALL_DE_Count 1 +#define GCREG_DE_STALL_DE_FieldMask 0x00000001 +#define GCREG_DE_STALL_DE_ReadMask 0x00000001 +#define GCREG_DE_STALL_DE_WriteMask 0x00000001 +#define GCREG_DE_STALL_DE_ResetValue 0x00000000 + +/* Stall de enable. */ +#define GCREG_DE_STALL_DE_ENABLE 0 : 0 +#define GCREG_DE_STALL_DE_ENABLE_End 0 +#define GCREG_DE_STALL_DE_ENABLE_Start 0 +#define GCREG_DE_STALL_DE_ENABLE_Type U01 +#define GCREG_DE_STALL_DE_ENABLE_DISABLED 0x0 +#define GCREG_DE_STALL_DE_ENABLE_ENABLED 0x1 + +/******************************************************************************* +** State gcregBlock4SrcAddress +*/ + +/* 32-bit aligned base address of the source surface. */ + +#define gcregBlock4SrcAddressRegAddrs 0x4A00 +#define GCREG_BLOCK4_SRC_ADDRESS_MSB 15 +#define GCREG_BLOCK4_SRC_ADDRESS_LSB 2 +#define GCREG_BLOCK4_SRC_ADDRESS_BLK 0 +#define GCREG_BLOCK4_SRC_ADDRESS_Count 4 +#define GCREG_BLOCK4_SRC_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK4_SRC_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK4_SRC_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK4_SRC_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK4_SRC_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK4_SRC_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock4SrcStride +*/ + +/* Stride of the source surface in bytes. To calculate the stride multiply +** the surface width in pixels by the number of bytes per pixel. +*/ + +#define gcregBlock4SrcStrideRegAddrs 0x4A04 +#define GCREG_BLOCK4_SRC_STRIDE_MSB 15 +#define GCREG_BLOCK4_SRC_STRIDE_LSB 2 +#define GCREG_BLOCK4_SRC_STRIDE_BLK 0 +#define GCREG_BLOCK4_SRC_STRIDE_Count 4 +#define GCREG_BLOCK4_SRC_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK4_SRC_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK4_SRC_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK4_SRC_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK4_SRC_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK4_SRC_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK4_SRC_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock4SrcRotationConfig +*/ + +/* 90 degree rotation configuration for the source surface. Width field +** specifies the width of the surface in pixels. +*/ + +#define gcregBlock4SrcRotationConfigRegAddrs 0x4A08 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_MSB 15 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_LSB 2 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_BLK 0 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_Count 4 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_FieldMask 0x0001FFFF +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ReadMask 0x0001FFFF +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_WriteMask 0x0001FFFF +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_WIDTH 15 : 0 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_WIDTH_End 15 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_WIDTH_Start 0 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_WIDTH_Type U16 + +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION 16 : 16 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_End 16 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_Start 16 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_Type U01 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x0 +#define GCREG_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x1 + +/******************************************************************************* +** State gcregBlock4SrcConfig +*/ + +/* Source surface configuration register. */ + +#define gcregBlock4SrcConfigRegAddrs 0x4A0C +#define GCREG_BLOCK4_SRC_CONFIG_MSB 15 +#define GCREG_BLOCK4_SRC_CONFIG_LSB 2 +#define GCREG_BLOCK4_SRC_CONFIG_BLK 0 +#define GCREG_BLOCK4_SRC_CONFIG_Count 4 +#define GCREG_BLOCK4_SRC_CONFIG_FieldMask 0xDF30B1C0 +#define GCREG_BLOCK4_SRC_CONFIG_ReadMask 0xDF30B1C0 +#define GCREG_BLOCK4_SRC_CONFIG_WriteMask 0xDF30B1C0 +#define GCREG_BLOCK4_SRC_CONFIG_ResetValue 0x00000000 + +/* Control source endianess. */ +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL 31 : 30 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_End 31 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_Start 30 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_Type U02 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_NO_SWAP 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_SWAP_WORD 0x1 +#define GCREG_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL_SWAP_DWORD 0x2 + +/* Defines the pixel format of the source surface. */ +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT 28 : 24 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_End 28 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_Start 24 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_Type U05 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_X4R4G4B4 0x00 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_A4R4G4B4 0x01 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_X1R5G5B5 0x02 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_A1R5G5B5 0x03 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_R5G6B5 0x04 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_X8R8G8B8 0x05 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_A8R8G8B8 0x06 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_YUY2 0x07 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_UYVY 0x08 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_INDEX8 0x09 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_MONOCHROME 0x0A +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_YV12 0x0F +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_A8 0x10 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_NV12 0x11 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_NV16 0x12 +#define GCREG_BLOCK4_SRC_CONFIG_SOURCE_FORMAT_RG16 0x13 + +/* Color channel swizzles. */ +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE 21 : 20 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_End 21 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_Start 20 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_Type U02 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_ARGB 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_RGBA 0x1 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_ABGR 0x2 +#define GCREG_BLOCK4_SRC_CONFIG_SWIZZLE_BGRA 0x3 + +/* Mono expansion: if 0, transparency color will be 0, otherwise transparency ** +** color will be 1. */ +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY 15 : 15 +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_End 15 +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_Start 15 +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_Type U01 +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x1 + +/* Mono expansion or masked blit: stream packing in pixels. Determines how ** +** many horizontal pixels are there per each 32-bit chunk. For example, if ** +** set to Packed8, each 32-bit chunk is 8-pixel wide, which also means that ** +** it defines 4 vertical lines of pixels. */ +#define GCREG_BLOCK4_SRC_CONFIG_PACK 13 : 12 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_End 13 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_Start 12 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_Type U02 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_PACKED8 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_PACKED16 0x1 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_PACKED32 0x2 +#define GCREG_BLOCK4_SRC_CONFIG_PACK_UNPACKED 0x3 + +/* Source data location: set to STREAM for mono expansion blits or masked ** +** blits. For mono expansion blits the complete bitmap comes from the command ** +** stream. For masked blits the source data comes from the memory and the ** +** mask from the command stream. */ +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION 8 : 8 +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION_End 8 +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION_Start 8 +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION_Type U01 +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION_MEMORY 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_LOCATION_STREAM 0x1 + +/* Source linear/tiled address computation control. */ +#define GCREG_BLOCK4_SRC_CONFIG_TILED 7 : 7 +#define GCREG_BLOCK4_SRC_CONFIG_TILED_End 7 +#define GCREG_BLOCK4_SRC_CONFIG_TILED_Start 7 +#define GCREG_BLOCK4_SRC_CONFIG_TILED_Type U01 +#define GCREG_BLOCK4_SRC_CONFIG_TILED_DISABLED 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_TILED_ENABLED 0x1 + +/* If set to ABSOLUTE, the source coordinates are treated as absolute ** +** coordinates inside the source surface. If set to RELATIVE, the source ** +** coordinates are treated as the offsets from the destination coordinates ** +** with the source size equal to the size of the destination. */ +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE 6 : 6 +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE_End 6 +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE_Start 6 +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE_Type U01 +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x0 +#define GCREG_BLOCK4_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x1 + +/******************************************************************************* +** State gcregBlock4SrcOrigin +*/ + +/* Absolute or relative (see SRC_RELATIVE field of gcregBlock4SrcConfig +** register) X and Y coordinates in pixels of the top left corner of the +** source rectangle within the source surface. +*/ + +#define gcregBlock4SrcOriginRegAddrs 0x4A10 +#define GCREG_BLOCK4_SRC_ORIGIN_MSB 15 +#define GCREG_BLOCK4_SRC_ORIGIN_LSB 2 +#define GCREG_BLOCK4_SRC_ORIGIN_BLK 0 +#define GCREG_BLOCK4_SRC_ORIGIN_Count 4 +#define GCREG_BLOCK4_SRC_ORIGIN_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_ORIGIN_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_ORIGIN_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_ORIGIN_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_ORIGIN_Y 31 : 16 +#define GCREG_BLOCK4_SRC_ORIGIN_Y_End 31 +#define GCREG_BLOCK4_SRC_ORIGIN_Y_Start 16 +#define GCREG_BLOCK4_SRC_ORIGIN_Y_Type U16 + +#define GCREG_BLOCK4_SRC_ORIGIN_X 15 : 0 +#define GCREG_BLOCK4_SRC_ORIGIN_X_End 15 +#define GCREG_BLOCK4_SRC_ORIGIN_X_Start 0 +#define GCREG_BLOCK4_SRC_ORIGIN_X_Type U16 + +/******************************************************************************* +** State gcregBlock4SrcSize +*/ + +/* Width and height of the source rectangle in pixels. If the source is +** relative (see SRC_RELATIVE field of gcregBlock4SrcConfig register) or a +** regular bitblt is being performed without stretching, this register is +** ignored and the source size is assumed to be the same as the destination. +*/ + +#define gcregBlock4SrcSizeRegAddrs 0x4A14 +#define GCREG_BLOCK4_SRC_SIZE_MSB 15 +#define GCREG_BLOCK4_SRC_SIZE_LSB 2 +#define GCREG_BLOCK4_SRC_SIZE_BLK 0 +#define GCREG_BLOCK4_SRC_SIZE_Count 4 +#define GCREG_BLOCK4_SRC_SIZE_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_SIZE_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_SIZE_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_SIZE_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_SIZE_Y 31 : 16 +#define GCREG_BLOCK4_SRC_SIZE_Y_End 31 +#define GCREG_BLOCK4_SRC_SIZE_Y_Start 16 +#define GCREG_BLOCK4_SRC_SIZE_Y_Type U16 + +#define GCREG_BLOCK4_SRC_SIZE_X 15 : 0 +#define GCREG_BLOCK4_SRC_SIZE_X_End 15 +#define GCREG_BLOCK4_SRC_SIZE_X_Start 0 +#define GCREG_BLOCK4_SRC_SIZE_X_Type U16 + +/******************************************************************************* +** State gcregBlock4SrcColorBg +*/ + +/* Select the color where source becomes transparent. It must be programmed +** in A8R8G8B8 format. +*/ + +#define gcregBlock4SrcColorBgRegAddrs 0x4A18 +#define GCREG_BLOCK4_SRC_COLOR_BG_MSB 15 +#define GCREG_BLOCK4_SRC_COLOR_BG_LSB 2 +#define GCREG_BLOCK4_SRC_COLOR_BG_BLK 0 +#define GCREG_BLOCK4_SRC_COLOR_BG_Count 4 +#define GCREG_BLOCK4_SRC_COLOR_BG_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_BG_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_BG_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_BG_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_COLOR_BG_ALPHA 31 : 24 +#define GCREG_BLOCK4_SRC_COLOR_BG_ALPHA_End 31 +#define GCREG_BLOCK4_SRC_COLOR_BG_ALPHA_Start 24 +#define GCREG_BLOCK4_SRC_COLOR_BG_ALPHA_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_BG_RED 23 : 16 +#define GCREG_BLOCK4_SRC_COLOR_BG_RED_End 23 +#define GCREG_BLOCK4_SRC_COLOR_BG_RED_Start 16 +#define GCREG_BLOCK4_SRC_COLOR_BG_RED_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_BG_GREEN 15 : 8 +#define GCREG_BLOCK4_SRC_COLOR_BG_GREEN_End 15 +#define GCREG_BLOCK4_SRC_COLOR_BG_GREEN_Start 8 +#define GCREG_BLOCK4_SRC_COLOR_BG_GREEN_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_BG_BLUE 7 : 0 +#define GCREG_BLOCK4_SRC_COLOR_BG_BLUE_End 7 +#define GCREG_BLOCK4_SRC_COLOR_BG_BLUE_Start 0 +#define GCREG_BLOCK4_SRC_COLOR_BG_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock4Rop +*/ + +/* Raster operation foreground and background codes. Even though ROP is not +** used in CLEAR, HOR_FILTER_BLT, VER_FILTER_BLT and alpha-eanbled BIT_BLTs, +** ROP code still has to be programmed, because the engine makes the decision +** whether source, destination and pattern are involved in the current +** operation and the correct decision is essential for the engine to complete +** the operation as expected. +*/ + +#define gcregBlock4RopRegAddrs 0x4A1C +#define GCREG_BLOCK4_ROP_MSB 15 +#define GCREG_BLOCK4_ROP_LSB 2 +#define GCREG_BLOCK4_ROP_BLK 0 +#define GCREG_BLOCK4_ROP_Count 4 +#define GCREG_BLOCK4_ROP_FieldMask 0x0030FFFF +#define GCREG_BLOCK4_ROP_ReadMask 0x0030FFFF +#define GCREG_BLOCK4_ROP_WriteMask 0x0030FFFF +#define GCREG_BLOCK4_ROP_ResetValue 0x00000000 + +/* ROP type: ROP2, ROP3 or ROP4 */ +#define GCREG_BLOCK4_ROP_TYPE 21 : 20 +#define GCREG_BLOCK4_ROP_TYPE_End 21 +#define GCREG_BLOCK4_ROP_TYPE_Start 20 +#define GCREG_BLOCK4_ROP_TYPE_Type U02 +#define GCREG_BLOCK4_ROP_TYPE_ROP2_PATTERN 0x0 +#define GCREG_BLOCK4_ROP_TYPE_ROP2_SOURCE 0x1 +#define GCREG_BLOCK4_ROP_TYPE_ROP3 0x2 +#define GCREG_BLOCK4_ROP_TYPE_ROP4 0x3 + +/* Background ROP code is used for transparent pixels. */ +#define GCREG_BLOCK4_ROP_ROP_BG 15 : 8 +#define GCREG_BLOCK4_ROP_ROP_BG_End 15 +#define GCREG_BLOCK4_ROP_ROP_BG_Start 8 +#define GCREG_BLOCK4_ROP_ROP_BG_Type U08 + +/* Background ROP code is used for opaque pixels. */ +#define GCREG_BLOCK4_ROP_ROP_FG 7 : 0 +#define GCREG_BLOCK4_ROP_ROP_FG_End 7 +#define GCREG_BLOCK4_ROP_ROP_FG_Start 0 +#define GCREG_BLOCK4_ROP_ROP_FG_Type U08 + +/******************************************************************************* +** State gcregBlock4AlphaControl +*/ + +#define gcregBlock4AlphaControlRegAddrs 0x4A20 +#define GCREG_BLOCK4_ALPHA_CONTROL_MSB 15 +#define GCREG_BLOCK4_ALPHA_CONTROL_LSB 2 +#define GCREG_BLOCK4_ALPHA_CONTROL_BLK 0 +#define GCREG_BLOCK4_ALPHA_CONTROL_Count 4 +#define GCREG_BLOCK4_ALPHA_CONTROL_FieldMask 0x00000001 +#define GCREG_BLOCK4_ALPHA_CONTROL_ReadMask 0x00000001 +#define GCREG_BLOCK4_ALPHA_CONTROL_WriteMask 0x00000001 +#define GCREG_BLOCK4_ALPHA_CONTROL_ResetValue 0x00000000 + +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE 0 : 0 +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE_End 0 +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE_Start 0 +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE_Type U01 +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE_OFF 0x0 +#define GCREG_BLOCK4_ALPHA_CONTROL_ENABLE_ON 0x1 + +/******************************************************************************* +** State gcregBlock4AlphaModes +*/ + +#define gcregBlock4AlphaModesRegAddrs 0x4A24 +#define GCREG_BLOCK4_ALPHA_MODES_MSB 15 +#define GCREG_BLOCK4_ALPHA_MODES_LSB 2 +#define GCREG_BLOCK4_ALPHA_MODES_BLK 0 +#define GCREG_BLOCK4_ALPHA_MODES_Count 4 +#define GCREG_BLOCK4_ALPHA_MODES_FieldMask 0xFF003311 +#define GCREG_BLOCK4_ALPHA_MODES_ReadMask 0xFF003311 +#define GCREG_BLOCK4_ALPHA_MODES_WriteMask 0xFF003311 +#define GCREG_BLOCK4_ALPHA_MODES_ResetValue 0x00000000 + +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE 0 : 0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_End 0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_Start 0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_Type U01 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE 4 : 4 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_End 4 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_Start 4 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_Type U01 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE 9 : 8 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_End 9 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Start 8 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Type U02 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x2 + +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE 13 : 12 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_End 13 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Start 12 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Type U02 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x2 + +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE 26 : 24 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_End 26 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_Start 24 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_Type U03 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_ZERO 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_ONE 0x1 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_NORMAL 0x2 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_INVERSED 0x3 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_COLOR 0x4 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Src Blending factor is calculate from Src alpha. */ +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR 27 : 27 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_End 27 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_Start 27 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_Type U01 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLED 0x1 + +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE 30 : 28 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_End 30 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_Start 28 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_Type U03 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_ZERO 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_ONE 0x1 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_NORMAL 0x2 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_INVERSED 0x3 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_COLOR 0x4 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Dst Blending factor is calculate from Dst alpha. */ +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR 31 : 31 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_End 31 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_Start 31 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_Type U01 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLED 0x1 + +/******************************************************************************* +** State gcregBlock4AddressU +*/ + +/* 32-bit aligned base address of the source U plane. */ + +#define gcregBlock4UPlaneAddressRegAddrs 0x4A28 +#define GCREG_BLOCK4_UPLANE_ADDRESS_MSB 15 +#define GCREG_BLOCK4_UPLANE_ADDRESS_LSB 2 +#define GCREG_BLOCK4_UPLANE_ADDRESS_BLK 0 +#define GCREG_BLOCK4_UPLANE_ADDRESS_Count 4 +#define GCREG_BLOCK4_UPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_UPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK4_UPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK4_UPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK4_UPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK4_UPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK4_UPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK4_UPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock4StrideU +*/ + +/* Stride of the source U plane in bytes. */ + +#define gcregBlock4UPlaneStrideRegAddrs 0x4A2C +#define GCREG_BLOCK4_UPLANE_STRIDE_MSB 15 +#define GCREG_BLOCK4_UPLANE_STRIDE_LSB 2 +#define GCREG_BLOCK4_UPLANE_STRIDE_BLK 0 +#define GCREG_BLOCK4_UPLANE_STRIDE_Count 4 +#define GCREG_BLOCK4_UPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK4_UPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK4_UPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK4_UPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK4_UPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK4_UPLANE_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK4_UPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK4_UPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock4AddressV +*/ + +/* 32-bit aligned base address of the source V plane. */ + +#define gcregBlock4VPlaneAddressRegAddrs 0x4A30 +#define GCREG_BLOCK4_VPLANE_ADDRESS_MSB 15 +#define GCREG_BLOCK4_VPLANE_ADDRESS_LSB 2 +#define GCREG_BLOCK4_VPLANE_ADDRESS_BLK 0 +#define GCREG_BLOCK4_VPLANE_ADDRESS_Count 4 +#define GCREG_BLOCK4_VPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_VPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK4_VPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK4_VPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK4_VPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK4_VPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK4_VPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK4_VPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock4StrideV +*/ + +/* Stride of the source V plane in bytes. */ + +#define gcregBlock4VPlaneStrideRegAddrs 0x4A34 +#define GCREG_BLOCK4_VPLANE_STRIDE_MSB 15 +#define GCREG_BLOCK4_VPLANE_STRIDE_LSB 2 +#define GCREG_BLOCK4_VPLANE_STRIDE_BLK 0 +#define GCREG_BLOCK4_VPLANE_STRIDE_Count 4 +#define GCREG_BLOCK4_VPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK4_VPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK4_VPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK4_VPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK4_VPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK4_VPLANE_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK4_VPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK4_VPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock4SrcRotationHeight +*/ + +/* 180/270 degree rotation configuration for the Source surface. Height field +** specifies the height of the surface in pixels. +*/ + +#define gcregBlock4SrcRotationHeightRegAddrs 0x4A38 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_MSB 15 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_LSB 2 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_BLK 0 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_Count 4 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_FieldMask 0x0000FFFF +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_ReadMask 0x0000FFFF +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_WriteMask 0x0000FFFF +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT 15 : 0 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT_End 15 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT_Start 0 +#define GCREG_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT_Type U16 + +/******************************************************************************* +** State gcregBlock4RotAngle +*/ + +/* 0/90/180/270 degree rotation configuration for the Source surface. Height +** field specifies the height of the surface in pixels. +*/ + +#define gcregBlock4RotAngleRegAddrs 0x4A3C +#define GCREG_BLOCK4_ROT_ANGLE_MSB 15 +#define GCREG_BLOCK4_ROT_ANGLE_LSB 2 +#define GCREG_BLOCK4_ROT_ANGLE_BLK 0 +#define GCREG_BLOCK4_ROT_ANGLE_Count 4 +#define GCREG_BLOCK4_ROT_ANGLE_FieldMask 0x000BB33F +#define GCREG_BLOCK4_ROT_ANGLE_ReadMask 0x000BB33F +#define GCREG_BLOCK4_ROT_ANGLE_WriteMask 0x000BB33F +#define GCREG_BLOCK4_ROT_ANGLE_ResetValue 0x00000000 + +#define GCREG_BLOCK4_ROT_ANGLE_SRC 2 : 0 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_End 2 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_Start 0 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_Type U03 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_ROT0 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_FLIP_X 0x1 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_FLIP_Y 0x2 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_ROT90 0x4 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_ROT180 0x5 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_ROT270 0x6 + +#define GCREG_BLOCK4_ROT_ANGLE_DST 5 : 3 +#define GCREG_BLOCK4_ROT_ANGLE_DST_End 5 +#define GCREG_BLOCK4_ROT_ANGLE_DST_Start 3 +#define GCREG_BLOCK4_ROT_ANGLE_DST_Type U03 +#define GCREG_BLOCK4_ROT_ANGLE_DST_ROT0 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_DST_FLIP_X 0x1 +#define GCREG_BLOCK4_ROT_ANGLE_DST_FLIP_Y 0x2 +#define GCREG_BLOCK4_ROT_ANGLE_DST_ROT90 0x4 +#define GCREG_BLOCK4_ROT_ANGLE_DST_ROT180 0x5 +#define GCREG_BLOCK4_ROT_ANGLE_DST_ROT270 0x6 + +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC 8 : 8 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_End 8 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_Start 8 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_Type U01 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_ENABLED 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MASKED 0x1 + +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST 9 : 9 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_End 9 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_Start 9 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_Type U01 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_ENABLED 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MASKED 0x1 + +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR 13 : 12 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_End 13 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_Start 12 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_Type U02 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_NONE 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_MIRROR_X 0x1 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_MIRROR_Y 0x2 +#define GCREG_BLOCK4_ROT_ANGLE_SRC_MIRROR_MIRROR_XY 0x3 + +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR 15 : 15 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR_End 15 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR_Start 15 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR_Type U01 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR_ENABLED 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_SRC_MIRROR_MASKED 0x1 + +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR 17 : 16 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_End 17 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_Start 16 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_Type U02 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_NONE 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_MIRROR_X 0x1 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_MIRROR_Y 0x2 +#define GCREG_BLOCK4_ROT_ANGLE_DST_MIRROR_MIRROR_XY 0x3 + +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR 19 : 19 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR_End 19 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR_Start 19 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR_Type U01 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR_ENABLED 0x0 +#define GCREG_BLOCK4_ROT_ANGLE_MASK_DST_MIRROR_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock4GlobalSrcColor +*/ + +/* Defines the global source color and alpha values. */ + +#define gcregBlock4GlobalSrcColorRegAddrs 0x4A40 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_MSB 15 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_LSB 2 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_BLK 0 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_Count 4 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ResetValue 0x00000000 + +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ALPHA 31 : 24 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ALPHA_End 31 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ALPHA_Start 24 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_ALPHA_Type U08 + +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_RED 23 : 16 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_RED_End 23 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_RED_Start 16 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_RED_Type U08 + +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_GREEN 15 : 8 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_GREEN_End 15 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_GREEN_Start 8 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_GREEN_Type U08 + +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_BLUE 7 : 0 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_BLUE_End 7 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_BLUE_Start 0 +#define GCREG_BLOCK4_GLOBAL_SRC_COLOR_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock4GlobalDestColor +*/ + +/* Defines the global destination color and alpha values. */ + +#define gcregBlock4GlobalDestColorRegAddrs 0x4A44 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_MSB 15 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_LSB 2 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_BLK 0 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_Count 4 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ResetValue 0x00000000 + +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ALPHA 31 : 24 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ALPHA_End 31 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ALPHA_Start 24 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_ALPHA_Type U08 + +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_RED 23 : 16 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_RED_End 23 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_RED_Start 16 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_RED_Type U08 + +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_GREEN 15 : 8 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_GREEN_End 15 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_GREEN_Start 8 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_GREEN_Type U08 + +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_BLUE 7 : 0 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_BLUE_End 7 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_BLUE_Start 0 +#define GCREG_BLOCK4_GLOBAL_DEST_COLOR_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock4ColorMultiplyModes +*/ + +/* Color modes to multiply Source or Destination pixel color by alpha +** channel. Alpha can be from global color source or current pixel. +*/ + +#define gcregBlock4ColorMultiplyModesRegAddrs 0x4A48 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_MSB 15 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_LSB 2 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_BLK 0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_Count 4 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_FieldMask 0x00100311 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_ReadMask 0x00100311 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_WriteMask 0x00100311 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_ResetValue 0x00000000 + +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY 0 : 0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_End 0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Start 0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Type U01 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY 4 : 4 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_End 4 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Start 4 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Type U01 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY 9 : 8 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_End 9 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Start 8 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Type U02 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x1 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x2 + +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY 20 : 20 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_End 20 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Start 20 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Type U01 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x1 + +/******************************************************************************* +** State gcregBlock4Transparency +*/ + +#define gcregBlock4TransparencyRegAddrs 0x4A4C +#define GCREG_BLOCK4_TRANSPARENCY_MSB 15 +#define GCREG_BLOCK4_TRANSPARENCY_LSB 2 +#define GCREG_BLOCK4_TRANSPARENCY_BLK 0 +#define GCREG_BLOCK4_TRANSPARENCY_Count 4 +#define GCREG_BLOCK4_TRANSPARENCY_FieldMask 0xB3331333 +#define GCREG_BLOCK4_TRANSPARENCY_ReadMask 0xB3331333 +#define GCREG_BLOCK4_TRANSPARENCY_WriteMask 0xB3331333 +#define GCREG_BLOCK4_TRANSPARENCY_ResetValue 0x00000000 + +/* Source transparency mode. */ +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE 1 : 0 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_End 1 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_Start 0 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_OPAQUE 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_MASK 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_SOURCE_KEY 0x2 + +/* Pattern transparency mode. KEY transparency mode is reserved. */ +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN 5 : 4 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_End 5 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_Start 4 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_OPAQUE 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_MASK 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_PATTERN_KEY 0x2 + +/* Destination transparency mode. MASK transparency mode is reserved. */ +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION 9 : 8 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_End 9 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_Start 8 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_OPAQUE 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_MASK 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_DESTINATION_KEY 0x2 + +/* Mask field for Source/Pattern/Destination fields. */ +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY 12 : 12 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY_End 12 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY_Start 12 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY_Type U01 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY_ENABLED 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_TRANSPARENCY_MASKED 0x1 + +/* Source usage override. */ +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE 17 : 16 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_End 17 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_Start 16 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x2 + +/* Pattern usage override. */ +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE 21 : 20 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_End 21 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_Start 20 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x2 + +/* Destination usage override. */ +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE 25 : 24 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_End 25 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_Start 24 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_Type U02 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x2 + +/* 2D resource usage override mask field. */ +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE 28 : 28 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_End 28 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Start 28 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Type U01 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_ENABLED 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_MASKED 0x1 + +/* DFB Color Key. */ +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY 29 : 29 +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_End 29 +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_Start 29 +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_Type U01 +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_DISABLED 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_ENABLED 0x1 + +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY 31 : 31 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY_End 31 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY_Start 31 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY_Type U01 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY_ENABLED 0x0 +#define GCREG_BLOCK4_TRANSPARENCY_MASK_DFB_COLOR_KEY_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock4Control +*/ + +/* General purpose control register. */ + +#define gcregBlock4PEControlRegAddrs 0x4A50 +#define GCREG_BLOCK4_PE_CONTROL_MSB 15 +#define GCREG_BLOCK4_PE_CONTROL_LSB 2 +#define GCREG_BLOCK4_PE_CONTROL_BLK 0 +#define GCREG_BLOCK4_PE_CONTROL_Count 4 +#define GCREG_BLOCK4_PE_CONTROL_FieldMask 0x00000999 +#define GCREG_BLOCK4_PE_CONTROL_ReadMask 0x00000999 +#define GCREG_BLOCK4_PE_CONTROL_WriteMask 0x00000999 +#define GCREG_BLOCK4_PE_CONTROL_ResetValue 0x00000000 + +#define GCREG_BLOCK4_PE_CONTROL_YUV 0 : 0 +#define GCREG_BLOCK4_PE_CONTROL_YUV_End 0 +#define GCREG_BLOCK4_PE_CONTROL_YUV_Start 0 +#define GCREG_BLOCK4_PE_CONTROL_YUV_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_YUV_601 0x0 +#define GCREG_BLOCK4_PE_CONTROL_YUV_709 0x1 + +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV 3 : 3 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV_End 3 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV_Start 3 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV_ENABLED 0x0 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUV_MASKED 0x1 + +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE 4 : 4 +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE_End 4 +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE_Start 4 +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE_UV 0x0 +#define GCREG_BLOCK4_PE_CONTROL_UV_SWIZZLE_VU 0x1 + +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE 7 : 7 +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE_End 7 +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE_Start 7 +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE_ENABLED 0x0 +#define GCREG_BLOCK4_PE_CONTROL_MASK_UV_SWIZZLE_MASKED 0x1 + +/* YUV to RGB convert enable */ +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB 8 : 8 +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB_End 8 +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB_Start 8 +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB_DISABLED 0x0 +#define GCREG_BLOCK4_PE_CONTROL_YUVRGB_ENABLED 0x1 + +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB 11 : 11 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB_End 11 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB_Start 11 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB_Type U01 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB_ENABLED 0x0 +#define GCREG_BLOCK4_PE_CONTROL_MASK_YUVRGB_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock4SrcColorKeyHigh +*/ + +/* Defines the source transparency color in source format. */ + +#define gcregBlock4SrcColorKeyHighRegAddrs 0x4A54 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_MSB 15 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_LSB 2 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_BLK 0 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_Count 4 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ALPHA 31 : 24 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ALPHA_End 31 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ALPHA_Start 24 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_ALPHA_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_RED 23 : 16 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_RED_End 23 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_RED_Start 16 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_RED_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_GREEN 15 : 8 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_GREEN_End 15 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_GREEN_Start 8 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_GREEN_Type U08 + +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_BLUE 7 : 0 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_BLUE_End 7 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_BLUE_Start 0 +#define GCREG_BLOCK4_SRC_COLOR_KEY_HIGH_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock4SrcExConfig +*/ + +#define gcregBlock4SrcExConfigRegAddrs 0x4A58 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MSB 15 +#define GCREG_BLOCK4_SRC_EX_CONFIG_LSB 2 +#define GCREG_BLOCK4_SRC_EX_CONFIG_BLK 0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_Count 4 +#define GCREG_BLOCK4_SRC_EX_CONFIG_FieldMask 0x00000109 +#define GCREG_BLOCK4_SRC_EX_CONFIG_ReadMask 0x00000109 +#define GCREG_BLOCK4_SRC_EX_CONFIG_WriteMask 0x00000109 +#define GCREG_BLOCK4_SRC_EX_CONFIG_ResetValue 0x00000000 + +/* Source multi tiled address computation control. */ +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED 0 : 0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_End 0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_Start 0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_Type U01 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_DISABLED 0x0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED 3 : 3 +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_End 3 +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_Start 3 +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_Type U01 +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_DISABLED 0x0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED 8 : 8 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_End 8 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_Start 8 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_Type U01 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_DISABLED 0x0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_ENABLED 0x1 + +/* Source CacheMode. */ +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE 12 : 12 +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE_End 12 +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE_Start 12 +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE_Type U01 +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE_DISABLED 0x0 +#define GCREG_BLOCK4_SRC_EX_CONFIG_CACHE_MODE_ENABLED 0x1 + +/******************************************************************************* +** State gcregBlock4SrcExAddress +*/ + +/* 32-bit aligned base address of the source extra surface. */ + +#define gcregBlock4SrcExAddressRegAddrs 0x4A5C +#define GCREG_BLOCK4_SRC_EX_ADDRESS_MSB 15 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_LSB 2 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_BLK 0 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_Count 4 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK4_SRC_EX_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK4_SRC_EX_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock8SrcAddressEx +*/ + +/* 32-bit aligned base address of the source surface. */ + +#define gcregBlock8SrcAddressRegAddrs 0x4A80 +#define GCREG_BLOCK8_SRC_ADDRESS_MSB 15 +#define GCREG_BLOCK8_SRC_ADDRESS_LSB 3 +#define GCREG_BLOCK8_SRC_ADDRESS_BLK 0 +#define GCREG_BLOCK8_SRC_ADDRESS_Count 8 +#define GCREG_BLOCK8_SRC_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK8_SRC_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK8_SRC_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK8_SRC_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK8_SRC_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK8_SRC_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock8SrcStride +*/ + +/* Stride of the source surface in bytes. To calculate the stride multiply +** the surface width in pixels by the number of bytes per pixel. +*/ + +#define gcregBlock8SrcStrideRegAddrs 0x4A88 +#define GCREG_BLOCK8_SRC_STRIDE_MSB 15 +#define GCREG_BLOCK8_SRC_STRIDE_LSB 3 +#define GCREG_BLOCK8_SRC_STRIDE_BLK 0 +#define GCREG_BLOCK8_SRC_STRIDE_Count 8 +#define GCREG_BLOCK8_SRC_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK8_SRC_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK8_SRC_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK8_SRC_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK8_SRC_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK8_SRC_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK8_SRC_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock8SrcRotationConfig +*/ + +/* 90 degree rotation configuration for the source surface. Width field +** specifies the width of the surface in pixels. +*/ + +#define gcregBlock8SrcRotationConfigRegAddrs 0x4A90 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_MSB 15 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_LSB 3 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_BLK 0 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_Count 8 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_FieldMask 0x0001FFFF +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ReadMask 0x0001FFFF +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_WriteMask 0x0001FFFF +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_WIDTH 15 : 0 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_WIDTH_End 15 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_WIDTH_Start 0 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_WIDTH_Type U16 + +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION 16 : 16 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_End 16 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_Start 16 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_Type U01 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_NORMAL 0x0 +#define GCREG_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_ROTATED 0x1 + +/******************************************************************************* +** State gcregBlock8SrcConfig +*/ + +/* Source surface configuration register. */ + +#define gcregBlock8SrcConfigRegAddrs 0x4A98 +#define GCREG_BLOCK8_SRC_CONFIG_MSB 15 +#define GCREG_BLOCK8_SRC_CONFIG_LSB 3 +#define GCREG_BLOCK8_SRC_CONFIG_BLK 0 +#define GCREG_BLOCK8_SRC_CONFIG_Count 8 +#define GCREG_BLOCK8_SRC_CONFIG_FieldMask 0xDF30B1C0 +#define GCREG_BLOCK8_SRC_CONFIG_ReadMask 0xDF30B1C0 +#define GCREG_BLOCK8_SRC_CONFIG_WriteMask 0xDF30B1C0 +#define GCREG_BLOCK8_SRC_CONFIG_ResetValue 0x00000000 + +/* Control source endianess. */ +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL 31 : 30 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_End 31 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_Start 30 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_Type U02 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_NO_SWAP 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_SWAP_WORD 0x1 +#define GCREG_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL_SWAP_DWORD 0x2 + +/* Defines the pixel format of the source surface. */ +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT 28 : 24 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_End 28 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_Start 24 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_Type U05 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_X4R4G4B4 0x00 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_A4R4G4B4 0x01 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_X1R5G5B5 0x02 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_A1R5G5B5 0x03 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_R5G6B5 0x04 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_X8R8G8B8 0x05 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_A8R8G8B8 0x06 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_YUY2 0x07 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_UYVY 0x08 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_INDEX8 0x09 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_MONOCHROME 0x0A +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_YV12 0x0F +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_A8 0x10 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_NV12 0x11 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_NV16 0x12 +#define GCREG_BLOCK8_SRC_CONFIG_SOURCE_FORMAT_RG16 0x13 + +/* Color channel swizzles. */ +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE 21 : 20 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_End 21 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_Start 20 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_Type U02 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_ARGB 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_RGBA 0x1 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_ABGR 0x2 +#define GCREG_BLOCK8_SRC_CONFIG_SWIZZLE_BGRA 0x3 + +/* Mono expansion: if 0, transparency color will be 0, otherwise transparency ** +** color will be 1. */ +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY 15 : 15 +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_End 15 +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_Start 15 +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_Type U01 +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x1 + +/* Mono expansion or masked blit: stream packing in pixels. Determines how ** +** many horizontal pixels are there per each 32-bit chunk. For example, if ** +** set to Packed8, each 32-bit chunk is 8-pixel wide, which also means that ** +** it defines 4 vertical lines of pixels. */ +#define GCREG_BLOCK8_SRC_CONFIG_PACK 13 : 12 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_End 13 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_Start 12 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_Type U02 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_PACKED8 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_PACKED16 0x1 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_PACKED32 0x2 +#define GCREG_BLOCK8_SRC_CONFIG_PACK_UNPACKED 0x3 + +/* Source data location: set to STREAM for mono expansion blits or masked ** +** blits. For mono expansion blits the complete bitmap comes from the command ** +** stream. For masked blits the source data comes from the memory and the ** +** mask from the command stream. */ +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION 8 : 8 +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION_End 8 +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION_Start 8 +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION_Type U01 +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION_MEMORY 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_LOCATION_STREAM 0x1 + +/* Source linear/tiled address computation control. */ +#define GCREG_BLOCK8_SRC_CONFIG_TILED 7 : 7 +#define GCREG_BLOCK8_SRC_CONFIG_TILED_End 7 +#define GCREG_BLOCK8_SRC_CONFIG_TILED_Start 7 +#define GCREG_BLOCK8_SRC_CONFIG_TILED_Type U01 +#define GCREG_BLOCK8_SRC_CONFIG_TILED_DISABLED 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_TILED_ENABLED 0x1 + +/* If set to ABSOLUTE, the source coordinates are treated as absolute ** +** coordinates inside the source surface. If set to RELATIVE, the source ** +** coordinates are treated as the offsets from the destination coordinates ** +** with the source size equal to the size of the destination. */ +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE 6 : 6 +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE_End 6 +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE_Start 6 +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE_Type U01 +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x0 +#define GCREG_BLOCK8_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x1 + +/******************************************************************************* +** State gcregBlock8SrcOrigin +*/ + +/* Absolute or relative (see SRC_RELATIVE field of gcregBlock8SrcConfig +** register) X and Y coordinates in pixels of the top left corner of the +** source rectangle within the source surface. +*/ + +#define gcregBlock8SrcOriginRegAddrs 0x4AA0 +#define GCREG_BLOCK8_SRC_ORIGIN_MSB 15 +#define GCREG_BLOCK8_SRC_ORIGIN_LSB 3 +#define GCREG_BLOCK8_SRC_ORIGIN_BLK 0 +#define GCREG_BLOCK8_SRC_ORIGIN_Count 8 +#define GCREG_BLOCK8_SRC_ORIGIN_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_ORIGIN_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_ORIGIN_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_ORIGIN_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_ORIGIN_Y 31 : 16 +#define GCREG_BLOCK8_SRC_ORIGIN_Y_End 31 +#define GCREG_BLOCK8_SRC_ORIGIN_Y_Start 16 +#define GCREG_BLOCK8_SRC_ORIGIN_Y_Type U16 + +#define GCREG_BLOCK8_SRC_ORIGIN_X 15 : 0 +#define GCREG_BLOCK8_SRC_ORIGIN_X_End 15 +#define GCREG_BLOCK8_SRC_ORIGIN_X_Start 0 +#define GCREG_BLOCK8_SRC_ORIGIN_X_Type U16 + +/******************************************************************************* +** State gcregBlock8SrcSize +*/ + +/* Width and height of the source rectangle in pixels. If the source is +** relative (see SRC_RELATIVE field of gcregBlock8SrcConfig register) or a +** regular bitblt is being performed without stretching, this register is +** ignored and the source size is assumed to be the same as the destination. +*/ + +#define gcregBlock8SrcSizeRegAddrs 0x4AA8 +#define GCREG_BLOCK8_SRC_SIZE_MSB 15 +#define GCREG_BLOCK8_SRC_SIZE_LSB 3 +#define GCREG_BLOCK8_SRC_SIZE_BLK 0 +#define GCREG_BLOCK8_SRC_SIZE_Count 8 +#define GCREG_BLOCK8_SRC_SIZE_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_SIZE_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_SIZE_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_SIZE_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_SIZE_Y 31 : 16 +#define GCREG_BLOCK8_SRC_SIZE_Y_End 31 +#define GCREG_BLOCK8_SRC_SIZE_Y_Start 16 +#define GCREG_BLOCK8_SRC_SIZE_Y_Type U16 + +#define GCREG_BLOCK8_SRC_SIZE_X 15 : 0 +#define GCREG_BLOCK8_SRC_SIZE_X_End 15 +#define GCREG_BLOCK8_SRC_SIZE_X_Start 0 +#define GCREG_BLOCK8_SRC_SIZE_X_Type U16 + +/******************************************************************************* +** State gcregBlock8SrcColorBg +*/ + +/* Select the color where source becomes transparent. It must be programmed +** in A8R8G8B8 format. +*/ + +#define gcregBlock8SrcColorBgRegAddrs 0x4AB0 +#define GCREG_BLOCK8_SRC_COLOR_BG_MSB 15 +#define GCREG_BLOCK8_SRC_COLOR_BG_LSB 3 +#define GCREG_BLOCK8_SRC_COLOR_BG_BLK 0 +#define GCREG_BLOCK8_SRC_COLOR_BG_Count 8 +#define GCREG_BLOCK8_SRC_COLOR_BG_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_BG_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_BG_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_BG_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_COLOR_BG_ALPHA 31 : 24 +#define GCREG_BLOCK8_SRC_COLOR_BG_ALPHA_End 31 +#define GCREG_BLOCK8_SRC_COLOR_BG_ALPHA_Start 24 +#define GCREG_BLOCK8_SRC_COLOR_BG_ALPHA_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_BG_RED 23 : 16 +#define GCREG_BLOCK8_SRC_COLOR_BG_RED_End 23 +#define GCREG_BLOCK8_SRC_COLOR_BG_RED_Start 16 +#define GCREG_BLOCK8_SRC_COLOR_BG_RED_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_BG_GREEN 15 : 8 +#define GCREG_BLOCK8_SRC_COLOR_BG_GREEN_End 15 +#define GCREG_BLOCK8_SRC_COLOR_BG_GREEN_Start 8 +#define GCREG_BLOCK8_SRC_COLOR_BG_GREEN_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_BG_BLUE 7 : 0 +#define GCREG_BLOCK8_SRC_COLOR_BG_BLUE_End 7 +#define GCREG_BLOCK8_SRC_COLOR_BG_BLUE_Start 0 +#define GCREG_BLOCK8_SRC_COLOR_BG_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock8Rop +*/ + +/* Raster operation foreground and background codes. Even though ROP is not +** used in CLEAR, HOR_FILTER_BLT, VER_FILTER_BLT and alpha-eanbled BIT_BLTs, +** ROP code still has to be programmed, because the engine makes the decision +** whether source, destination and pattern are involved in the current +** operation and the correct decision is essential for the engine to complete +** the operation as expected. +*/ + +#define gcregBlock8RopRegAddrs 0x4AB8 +#define GCREG_BLOCK8_ROP_MSB 15 +#define GCREG_BLOCK8_ROP_LSB 3 +#define GCREG_BLOCK8_ROP_BLK 0 +#define GCREG_BLOCK8_ROP_Count 8 +#define GCREG_BLOCK8_ROP_FieldMask 0x0030FFFF +#define GCREG_BLOCK8_ROP_ReadMask 0x0030FFFF +#define GCREG_BLOCK8_ROP_WriteMask 0x0030FFFF +#define GCREG_BLOCK8_ROP_ResetValue 0x00000000 + +/* ROP type: ROP2, ROP3 or ROP4 */ +#define GCREG_BLOCK8_ROP_TYPE 21 : 20 +#define GCREG_BLOCK8_ROP_TYPE_End 21 +#define GCREG_BLOCK8_ROP_TYPE_Start 20 +#define GCREG_BLOCK8_ROP_TYPE_Type U02 +#define GCREG_BLOCK8_ROP_TYPE_ROP2_PATTERN 0x0 +#define GCREG_BLOCK8_ROP_TYPE_ROP2_SOURCE 0x1 +#define GCREG_BLOCK8_ROP_TYPE_ROP3 0x2 +#define GCREG_BLOCK8_ROP_TYPE_ROP4 0x3 + +/* Background ROP code is used for transparent pixels. */ +#define GCREG_BLOCK8_ROP_ROP_BG 15 : 8 +#define GCREG_BLOCK8_ROP_ROP_BG_End 15 +#define GCREG_BLOCK8_ROP_ROP_BG_Start 8 +#define GCREG_BLOCK8_ROP_ROP_BG_Type U08 + +/* Background ROP code is used for opaque pixels. */ +#define GCREG_BLOCK8_ROP_ROP_FG 7 : 0 +#define GCREG_BLOCK8_ROP_ROP_FG_End 7 +#define GCREG_BLOCK8_ROP_ROP_FG_Start 0 +#define GCREG_BLOCK8_ROP_ROP_FG_Type U08 + +/******************************************************************************* +** State gcregBlock8AlphaControl +*/ + +#define gcregBlock8AlphaControlRegAddrs 0x4AC0 +#define GCREG_BLOCK8_ALPHA_CONTROL_MSB 15 +#define GCREG_BLOCK8_ALPHA_CONTROL_LSB 3 +#define GCREG_BLOCK8_ALPHA_CONTROL_BLK 0 +#define GCREG_BLOCK8_ALPHA_CONTROL_Count 8 +#define GCREG_BLOCK8_ALPHA_CONTROL_FieldMask 0x00000001 +#define GCREG_BLOCK8_ALPHA_CONTROL_ReadMask 0x00000001 +#define GCREG_BLOCK8_ALPHA_CONTROL_WriteMask 0x00000001 +#define GCREG_BLOCK8_ALPHA_CONTROL_ResetValue 0x00000000 + +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE 0 : 0 +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE_End 0 +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE_Start 0 +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE_Type U01 +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE_OFF 0x0 +#define GCREG_BLOCK8_ALPHA_CONTROL_ENABLE_ON 0x1 + +/******************************************************************************* +** State gcregBlock8AlphaModes +*/ + +#define gcregBlock8AlphaModesRegAddrs 0x4AC8 +#define GCREG_BLOCK8_ALPHA_MODES_MSB 15 +#define GCREG_BLOCK8_ALPHA_MODES_LSB 3 +#define GCREG_BLOCK8_ALPHA_MODES_BLK 0 +#define GCREG_BLOCK8_ALPHA_MODES_Count 8 +#define GCREG_BLOCK8_ALPHA_MODES_FieldMask 0xFF003311 +#define GCREG_BLOCK8_ALPHA_MODES_ReadMask 0xFF003311 +#define GCREG_BLOCK8_ALPHA_MODES_WriteMask 0xFF003311 +#define GCREG_BLOCK8_ALPHA_MODES_ResetValue 0x00000000 + +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE 0 : 0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_End 0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_Start 0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_Type U01 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE 4 : 4 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_End 4 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_Start 4 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_Type U01 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE 9 : 8 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_End 9 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Start 8 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_Type U02 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x2 + +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE 13 : 12 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_End 13 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Start 12 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_Type U02 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x2 + +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE 26 : 24 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_End 26 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_Start 24 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_Type U03 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_ZERO 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_ONE 0x1 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_NORMAL 0x2 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_INVERSED 0x3 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_COLOR 0x4 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Src Blending factor is calculate from Src alpha. */ +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR 27 : 27 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_End 27 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_Start 27 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_Type U01 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLED 0x1 + +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE 30 : 28 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_End 30 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_Start 28 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_Type U03 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_ZERO 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_ONE 0x1 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_NORMAL 0x2 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_INVERSED 0x3 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_COLOR 0x4 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* Dst Blending factor is calculate from Dst alpha. */ +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR 31 : 31 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_End 31 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_Start 31 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_Type U01 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLED 0x0 +#define GCREG_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLED 0x1 + +/******************************************************************************* +** State gcregBlock8AddressU +*/ + +/* 32-bit aligned base address of the source U plane. */ + +#define gcregBlock8AddressURegAddrs 0x4AD0 +#define GCREG_BLOCK8_UPLANE_ADDRESS_MSB 15 +#define GCREG_BLOCK8_UPLANE_ADDRESS_LSB 3 +#define GCREG_BLOCK8_UPLANE_ADDRESS_BLK 0 +#define GCREG_BLOCK8_UPLANE_ADDRESS_Count 8 +#define GCREG_BLOCK8_UPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_UPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK8_UPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK8_UPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK8_UPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK8_UPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK8_UPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK8_UPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock8StrideU +*/ + +/* Stride of the source U plane in bytes. */ + +#define gcregBlock8StrideURegAddrs 0x4AD8 +#define GCREG_BLOCK8_UPLANE_STRIDE_MSB 15 +#define GCREG_BLOCK8_UPLANE_STRIDE_LSB 3 +#define GCREG_BLOCK8_UPLANE_STRIDE_BLK 0 +#define GCREG_BLOCK8_UPLANE_STRIDE_Count 8 +#define GCREG_BLOCK8_UPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK8_UPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK8_UPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK8_UPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK8_UPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK8_UPLANE_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK8_UPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK8_UPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock8AddressV +*/ + +/* 32-bit aligned base address of the source V plane. */ + +#define gcregBlock8AddressVRegAddrs 0x4AE0 +#define GCREG_BLOCK8_VPLANE_ADDRESS_MSB 15 +#define GCREG_BLOCK8_VPLANE_ADDRESS_LSB 3 +#define GCREG_BLOCK8_VPLANE_ADDRESS_BLK 0 +#define GCREG_BLOCK8_VPLANE_ADDRESS_Count 8 +#define GCREG_BLOCK8_VPLANE_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_VPLANE_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK8_VPLANE_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK8_VPLANE_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK8_VPLANE_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK8_VPLANE_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK8_VPLANE_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK8_VPLANE_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** State gcregBlock8StrideV +*/ + +/* Stride of the source V plane in bytes. */ + +#define gcregBlock8StrideVRegAddrs 0x4AE8 +#define GCREG_BLOCK8_VPLANE_STRIDE_MSB 15 +#define GCREG_BLOCK8_VPLANE_STRIDE_LSB 3 +#define GCREG_BLOCK8_VPLANE_STRIDE_BLK 0 +#define GCREG_BLOCK8_VPLANE_STRIDE_Count 8 +#define GCREG_BLOCK8_VPLANE_STRIDE_FieldMask 0x0003FFFF +#define GCREG_BLOCK8_VPLANE_STRIDE_ReadMask 0x0003FFFC +#define GCREG_BLOCK8_VPLANE_STRIDE_WriteMask 0x0003FFFC +#define GCREG_BLOCK8_VPLANE_STRIDE_ResetValue 0x00000000 + +#define GCREG_BLOCK8_VPLANE_STRIDE_STRIDE 17 : 0 +#define GCREG_BLOCK8_VPLANE_STRIDE_STRIDE_End 17 +#define GCREG_BLOCK8_VPLANE_STRIDE_STRIDE_Start 0 +#define GCREG_BLOCK8_VPLANE_STRIDE_STRIDE_Type U18 + +/******************************************************************************* +** State gcregBlock8SrcRotationHeight +*/ + +/* 180/270 degree rotation configuration for the Source surface. Height field +** specifies the height of the surface in pixels. +*/ + +#define gcregBlock8SrcRotationHeightRegAddrs 0x4AF0 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_MSB 15 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_LSB 3 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_BLK 0 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_Count 8 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_FieldMask 0x0000FFFF +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_ReadMask 0x0000FFFF +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_WriteMask 0x0000FFFF +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT 15 : 0 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT_End 15 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT_Start 0 +#define GCREG_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT_Type U16 + +/******************************************************************************* +** State gcregBlock8RotAngle +*/ + +/* 0/90/180/270 degree rotation configuration for the Source surface. Height +** field specifies the height of the surface in pixels. +*/ + +#define gcregBlock8RotAngleRegAddrs 0x4AF8 +#define GCREG_BLOCK8_ROT_ANGLE_MSB 15 +#define GCREG_BLOCK8_ROT_ANGLE_LSB 3 +#define GCREG_BLOCK8_ROT_ANGLE_BLK 0 +#define GCREG_BLOCK8_ROT_ANGLE_Count 8 +#define GCREG_BLOCK8_ROT_ANGLE_FieldMask 0x000BB33F +#define GCREG_BLOCK8_ROT_ANGLE_ReadMask 0x000BB33F +#define GCREG_BLOCK8_ROT_ANGLE_WriteMask 0x000BB33F +#define GCREG_BLOCK8_ROT_ANGLE_ResetValue 0x00000000 + +#define GCREG_BLOCK8_ROT_ANGLE_SRC 2 : 0 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_End 2 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_Start 0 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_Type U03 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_ROT0 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_FLIP_X 0x1 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_FLIP_Y 0x2 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_ROT90 0x4 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_ROT180 0x5 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_ROT270 0x6 + +#define GCREG_BLOCK8_ROT_ANGLE_DST 5 : 3 +#define GCREG_BLOCK8_ROT_ANGLE_DST_End 5 +#define GCREG_BLOCK8_ROT_ANGLE_DST_Start 3 +#define GCREG_BLOCK8_ROT_ANGLE_DST_Type U03 +#define GCREG_BLOCK8_ROT_ANGLE_DST_ROT0 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_DST_FLIP_X 0x1 +#define GCREG_BLOCK8_ROT_ANGLE_DST_FLIP_Y 0x2 +#define GCREG_BLOCK8_ROT_ANGLE_DST_ROT90 0x4 +#define GCREG_BLOCK8_ROT_ANGLE_DST_ROT180 0x5 +#define GCREG_BLOCK8_ROT_ANGLE_DST_ROT270 0x6 + +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC 8 : 8 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_End 8 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_Start 8 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_Type U01 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_ENABLED 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MASKED 0x1 + +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST 9 : 9 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_End 9 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_Start 9 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_Type U01 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_ENABLED 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MASKED 0x1 + +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR 13 : 12 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_End 13 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_Start 12 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_Type U02 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_NONE 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_MIRROR_X 0x1 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_MIRROR_Y 0x2 +#define GCREG_BLOCK8_ROT_ANGLE_SRC_MIRROR_MIRROR_XY 0x3 + +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR 15 : 15 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR_End 15 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR_Start 15 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR_Type U01 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR_ENABLED 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_SRC_MIRROR_MASKED 0x1 + +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR 17 : 16 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_End 17 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_Start 16 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_Type U02 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_NONE 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_MIRROR_X 0x1 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_MIRROR_Y 0x2 +#define GCREG_BLOCK8_ROT_ANGLE_DST_MIRROR_MIRROR_XY 0x3 + +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR 19 : 19 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR_End 19 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR_Start 19 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR_Type U01 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR_ENABLED 0x0 +#define GCREG_BLOCK8_ROT_ANGLE_MASK_DST_MIRROR_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock8GlobalSrcColor +*/ + +/* Defines the global source color and alpha values. */ + +#define gcregBlock8GlobalSrcColorRegAddrs 0x4B00 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_MSB 15 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_LSB 3 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_BLK 0 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_Count 8 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ResetValue 0x00000000 + +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ALPHA 31 : 24 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ALPHA_End 31 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ALPHA_Start 24 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_ALPHA_Type U08 + +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_RED 23 : 16 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_RED_End 23 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_RED_Start 16 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_RED_Type U08 + +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_GREEN 15 : 8 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_GREEN_End 15 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_GREEN_Start 8 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_GREEN_Type U08 + +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_BLUE 7 : 0 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_BLUE_End 7 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_BLUE_Start 0 +#define GCREG_BLOCK8_GLOBAL_SRC_COLOR_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock8GlobalDestColor +*/ + +/* Defines the global destination color and alpha values. */ + +#define gcregBlock8GlobalDestColorRegAddrs 0x4B08 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_MSB 15 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_LSB 3 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_BLK 0 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_Count 8 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ResetValue 0x00000000 + +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ALPHA 31 : 24 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ALPHA_End 31 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ALPHA_Start 24 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_ALPHA_Type U08 + +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_RED 23 : 16 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_RED_End 23 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_RED_Start 16 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_RED_Type U08 + +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_GREEN 15 : 8 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_GREEN_End 15 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_GREEN_Start 8 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_GREEN_Type U08 + +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_BLUE 7 : 0 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_BLUE_End 7 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_BLUE_Start 0 +#define GCREG_BLOCK8_GLOBAL_DEST_COLOR_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock8ColorMultiplyModes +*/ + +/* Color modes to multiply Source or Destination pixel color by alpha +** channel. Alpha can be from global color source or current pixel. +*/ + +#define gcregBlock8ColorMultiplyModesRegAddrs 0x4B10 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_MSB 15 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_LSB 3 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_BLK 0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_Count 8 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_FieldMask 0x00100311 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_ReadMask 0x00100311 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_WriteMask 0x00100311 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_ResetValue 0x00000000 + +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY 0 : 0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_End 0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Start 0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_Type U01 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY 4 : 4 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_End 4 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Start 4 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_Type U01 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x1 + +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY 9 : 8 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_End 9 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Start 8 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_Type U02 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x1 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x2 + +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY 20 : 20 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_End 20 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Start 20 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_Type U01 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x0 +#define GCREG_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x1 + +/******************************************************************************* +** State gcregBlock8Transparency +*/ + +#define gcregBlock8TransparencyRegAddrs 0x4B18 +#define GCREG_BLOCK8_TRANSPARENCY_MSB 15 +#define GCREG_BLOCK8_TRANSPARENCY_LSB 3 +#define GCREG_BLOCK8_TRANSPARENCY_BLK 0 +#define GCREG_BLOCK8_TRANSPARENCY_Count 8 +#define GCREG_BLOCK8_TRANSPARENCY_FieldMask 0xB3331333 +#define GCREG_BLOCK8_TRANSPARENCY_ReadMask 0xB3331333 +#define GCREG_BLOCK8_TRANSPARENCY_WriteMask 0xB3331333 +#define GCREG_BLOCK8_TRANSPARENCY_ResetValue 0x00000000 + +/* Source transparency mode. */ +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE 1 : 0 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_End 1 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_Start 0 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_OPAQUE 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_MASK 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_SOURCE_KEY 0x2 + +/* Pattern transparency mode. KEY transparency mode is reserved. */ +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN 5 : 4 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_End 5 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_Start 4 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_OPAQUE 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_MASK 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_PATTERN_KEY 0x2 + +/* Destination transparency mode. MASK transparency mode is reserved. */ +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION 9 : 8 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_End 9 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_Start 8 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_OPAQUE 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_MASK 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_DESTINATION_KEY 0x2 + +/* Mask field for Source/Pattern/Destination fields. */ +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY 12 : 12 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY_End 12 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY_Start 12 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY_Type U01 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY_ENABLED 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_TRANSPARENCY_MASKED 0x1 + +/* Source usage override. */ +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE 17 : 16 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_End 17 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_Start 16 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x2 + +/* Pattern usage override. */ +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE 21 : 20 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_End 21 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_Start 20 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x2 + +/* Destination usage override. */ +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE 25 : 24 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_End 25 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_Start 24 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_Type U02 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x2 + +/* 2D resource usage override mask field. */ +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE 28 : 28 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_End 28 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Start 28 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_Type U01 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_ENABLED 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_RESOURCE_OVERRIDE_MASKED 0x1 + +/* DFB Color Key. */ +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY 29 : 29 +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_End 29 +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_Start 29 +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_Type U01 +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_DISABLED 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_ENABLED 0x1 + +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY 31 : 31 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY_End 31 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY_Start 31 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY_Type U01 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY_ENABLED 0x0 +#define GCREG_BLOCK8_TRANSPARENCY_MASK_DFB_COLOR_KEY_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock8Control +*/ + +/* General purpose control register. */ + +#define gcregBlock8PEControlRegAddrs 0x4B20 +#define GCREG_BLOCK8_PE_CONTROL_MSB 15 +#define GCREG_BLOCK8_PE_CONTROL_LSB 3 +#define GCREG_BLOCK8_PE_CONTROL_BLK 0 +#define GCREG_BLOCK8_PE_CONTROL_Count 8 +#define GCREG_BLOCK8_PE_CONTROL_FieldMask 0x00000999 +#define GCREG_BLOCK8_PE_CONTROL_ReadMask 0x00000999 +#define GCREG_BLOCK8_PE_CONTROL_WriteMask 0x00000999 +#define GCREG_BLOCK8_PE_CONTROL_ResetValue 0x00000000 + +#define GCREG_BLOCK8_PE_CONTROL_YUV 0 : 0 +#define GCREG_BLOCK8_PE_CONTROL_YUV_End 0 +#define GCREG_BLOCK8_PE_CONTROL_YUV_Start 0 +#define GCREG_BLOCK8_PE_CONTROL_YUV_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_YUV_601 0x0 +#define GCREG_BLOCK8_PE_CONTROL_YUV_709 0x1 + +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV 3 : 3 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV_End 3 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV_Start 3 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV_ENABLED 0x0 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUV_MASKED 0x1 + +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE 4 : 4 +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE_End 4 +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE_Start 4 +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE_UV 0x0 +#define GCREG_BLOCK8_PE_CONTROL_UV_SWIZZLE_VU 0x1 + +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE 7 : 7 +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE_End 7 +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE_Start 7 +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE_ENABLED 0x0 +#define GCREG_BLOCK8_PE_CONTROL_MASK_UV_SWIZZLE_MASKED 0x1 + +/* YUV to RGB convert enable */ +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB 8 : 8 +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB_End 8 +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB_Start 8 +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB_DISABLED 0x0 +#define GCREG_BLOCK8_PE_CONTROL_YUVRGB_ENABLED 0x1 + +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB 11 : 11 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB_End 11 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB_Start 11 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB_Type U01 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB_ENABLED 0x0 +#define GCREG_BLOCK8_PE_CONTROL_MASK_YUVRGB_MASKED 0x1 + +/******************************************************************************* +** State gcregBlock8SrcColorKeyHigh +*/ + +/* Defines the source transparency color in source format. */ + +#define gcregBlock8SrcColorKeyHighRegAddrs 0x4B28 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_MSB 15 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_LSB 3 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_BLK 0 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_Count 8 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ReadMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_WriteMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ALPHA 31 : 24 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ALPHA_End 31 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ALPHA_Start 24 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_ALPHA_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_RED 23 : 16 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_RED_End 23 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_RED_Start 16 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_RED_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_GREEN 15 : 8 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_GREEN_End 15 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_GREEN_Start 8 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_GREEN_Type U08 + +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_BLUE 7 : 0 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_BLUE_End 7 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_BLUE_Start 0 +#define GCREG_BLOCK8_SRC_COLOR_KEY_HIGH_BLUE_Type U08 + +/******************************************************************************* +** State gcregBlock8SrcExConfig +*/ + +#define gcregBlock8SrcExConfigRegAddrs 0x4B30 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MSB 15 +#define GCREG_BLOCK8_SRC_EX_CONFIG_LSB 3 +#define GCREG_BLOCK8_SRC_EX_CONFIG_BLK 0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_Count 8 +#define GCREG_BLOCK8_SRC_EX_CONFIG_FieldMask 0x00000109 +#define GCREG_BLOCK8_SRC_EX_CONFIG_ReadMask 0x00000109 +#define GCREG_BLOCK8_SRC_EX_CONFIG_WriteMask 0x00000109 +#define GCREG_BLOCK8_SRC_EX_CONFIG_ResetValue 0x00000000 + +/* Source multi tiled address computation control. */ +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED 0 : 0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_End 0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_Start 0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_Type U01 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_DISABLED 0x0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED 3 : 3 +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_End 3 +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_Start 3 +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_Type U01 +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_DISABLED 0x0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_ENABLED 0x1 + +/* Source super tiled address computation control. */ +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED 8 : 8 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_End 8 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_Start 8 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_Type U01 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_DISABLED 0x0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_ENABLED 0x1 + +/* Source CacheMode. */ +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE 12 : 12 +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE_End 12 +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE_Start 12 +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE_Type U01 +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE_DISABLED 0x0 +#define GCREG_BLOCK8_SRC_EX_CONFIG_CACHE_MODE_ENABLED 0x1 + +/******************************************************************************* +** State gcregBlock8SrcExAddress +*/ + +/* 32-bit aligned base address of the source extra surface. */ + +#define gcregBlock8SrcExAddressRegAddrs 0x4B38 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_MSB 15 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_LSB 3 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_BLK 0 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_Count 8 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_FieldMask 0xFFFFFFFF +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ReadMask 0xFFFFFFFC +#define GCREG_BLOCK8_SRC_EX_ADDRESS_WriteMask 0xFFFFFFFC +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ResetValue 0x00000000 + +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ADDRESS 31 : 0 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ADDRESS_End 30 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ADDRESS_Start 0 +#define GCREG_BLOCK8_SRC_EX_ADDRESS_ADDRESS_Type U31 + +/******************************************************************************* +** Generic defines +*/ + +#define GCREG_FORMAT_SUB_SAMPLE_MODE_YUV_MODE422 0x0 +#define GCREG_FORMAT_SUB_SAMPLE_MODE_YUV_MODE420 0x1 + +#define GCREG_DE_SWIZZLE_ARGB 0x0 +#define GCREG_DE_SWIZZLE_RGBA 0x1 +#define GCREG_DE_SWIZZLE_ABGR 0x2 +#define GCREG_DE_SWIZZLE_BGRA 0x3 + +#define GCREG_DE_FORMAT_X4R4G4B4 0x00 +#define GCREG_DE_FORMAT_A4R4G4B4 0x01 +#define GCREG_DE_FORMAT_X1R5G5B5 0x02 +#define GCREG_DE_FORMAT_A1R5G5B5 0x03 +#define GCREG_DE_FORMAT_R5G6B5 0x04 +#define GCREG_DE_FORMAT_X8R8G8B8 0x05 +#define GCREG_DE_FORMAT_A8R8G8B8 0x06 +#define GCREG_DE_FORMAT_YUY2 0x07 +#define GCREG_DE_FORMAT_UYVY 0x08 +#define GCREG_DE_FORMAT_INDEX8 0x09 +#define GCREG_DE_FORMAT_MONOCHROME 0x0A +#define GCREG_DE_FORMAT_YV12 0x0F +#define GCREG_DE_FORMAT_A8 0x10 +#define GCREG_DE_FORMAT_NV12 0x11 +#define GCREG_DE_FORMAT_NV16 0x12 +#define GCREG_DE_FORMAT_RG16 0x13 + +/* ~~~~~~~~~~~~~ */ + +#define GCREG_ALPHA_MODE_NORMAL 0x0 +#define GCREG_ALPHA_MODE_INVERSED 0x1 + +#define GCREG_GLOBAL_ALPHA_MODE_NORMAL 0x0 +#define GCREG_GLOBAL_ALPHA_MODE_GLOBAL 0x1 +#define GCREG_GLOBAL_ALPHA_MODE_SCALED 0x2 + +#define GCREG_COLOR_MODE_NORMAL 0x0 +#define GCREG_COLOR_MODE_MULTIPLY 0x1 + +#define GCREG_BLENDING_MODE_ZERO 0x0 +#define GCREG_BLENDING_MODE_ONE 0x1 +#define GCREG_BLENDING_MODE_NORMAL 0x2 +#define GCREG_BLENDING_MODE_INVERSED 0x3 +#define GCREG_BLENDING_MODE_COLOR 0x4 +#define GCREG_BLENDING_MODE_COLOR_INVERSED 0x5 +#define GCREG_BLENDING_MODE_SATURATED_ALPHA 0x6 +#define GCREG_BLENDING_MODE_SATURATED_DEST_ALPHA 0x7 + +/* ~~~~~~~~~~~~~ */ + +#define GCREG_FACTOR_INVERSE_DISABLE 0x0 +#define GCREG_FACTOR_INVERSE_ENABLE 0x1 + +/* ~~~~~~~~~~~~~ */ + +#define GCREG_RESOURCE_USAGE_OVERRIDE_DEFAULT 0x0 +#define GCREG_RESOURCE_USAGE_OVERRIDE_USE_ENABLE 0x1 +#define GCREG_RESOURCE_USAGE_OVERRIDE_USE_DISABLE 0x2 + +/******************************************************************************* +** Modular operations: pipesel +*/ + +static const struct gccmdldstate gcmopipesel_pipesel_ldst = + GCLDSTATE(gcregPipeSelectRegAddrs, 1); + +struct gcmopipesel { + /* gcregPipeSelectRegAddrs */ + struct gccmdldstate pipesel_ldst; + + /* gcregPipeSelectRegAddrs */ + union { + struct gcregpipeselect reg; + unsigned int raw; + } pipesel; +}; + +/******************************************************************************* +** Modular operations: signal +*/ + +static const struct gccmdldstate gcmosignal_signal_ldst = + GCLDSTATE(gcregEventRegAddrs, 1); + +struct gcmosignal { + /* gcregEventRegAddrs */ + struct gccmdldstate signal_ldst; + + /* gcregEventRegAddrs */ + union { + struct gcregevent reg; + unsigned int raw; + } signal; +}; + +/******************************************************************************* +** Modular operations: flush +*/ + +static const struct gccmdldstate gcmoflush_flush_ldst = + GCLDSTATE(gcregFlushRegAddrs, 1); + +struct gcmoflush { + /* gcregFlushRegAddrs */ + struct gccmdldstate flush_ldst; + + /* gcregFlushRegAddrs */ + union { + struct gcregflush reg; + unsigned int raw; + } flush; +}; + +/******************************************************************************* +** Modular operations: semaphore +*/ + +static const struct gccmdldstate gcmosema_sema_ldst = + GCLDSTATE(gcregSemaphoreRegAddrs, 1); + +struct gcmosema { + /* gcregSemaphoreRegAddrs */ + struct gccmdldstate sema_ldst; + + /* gcregSemaphoreRegAddrs */ + union { + struct gcregsemaphore reg; + unsigned int raw; + } sema; +}; + +/******************************************************************************* +** Modular operations: mmuinit +*/ + +struct gcmoterminator { + union { + struct gcmosignal done; + struct gccmdnop nop; + } u1; + + union { + struct gccmdwait wait; + struct gccmdlink linknext; + struct gccmdend end; + } u2; + + union { + struct gccmdlink linkwait; + struct gccmdnop nop; + } u3; +}; + +/******************************************************************************* +** Modular operations: mmuinit +*/ + +static const struct gccmdldstate gcmommuinit_safe_ldst = + GCLDSTATE(gcregMMUSafeAddressRegAddrs, 2); + +struct gcmommuinit { + /* gcregMMUSafeAddressRegAddrs */ + struct gccmdldstate safe_ldst; + + /* gcregMMUSafeAddressRegAddrs */ + unsigned int safe; + + /* gcregMMUConfigurationRegAddrs */ + unsigned int mtlb; + + /* Alignment filler. */ + unsigned int _filler; +}; + +/******************************************************************************* +** Modular operations: mmumaster +*/ + +static const struct gccmdldstate gcmommumaster_master_ldst = + GCLDSTATE(gcregMMUConfigurationRegAddrs, 1); + +struct gcmommumaster { + /* gcregMMUConfigurationRegAddrs */ + struct gccmdldstate master_ldst; + + /* gcregMMUConfigurationRegAddrs */ + unsigned int master; +}; + +/******************************************************************************* +** Modular operations: mmuflush +*/ + +static const struct gccmdldstate gcmommuflush_mmuflush_ldst = + GCLDSTATE(gcregMMUConfigurationRegAddrs, 1); + +struct gcmommuflush { + /* PE cache flush. */ + struct gcmoflush peflush; + + /* Semaphore/stall after PE flush. */ + struct gcmosema peflushsema; + struct gccmdstall peflushstall; + + /* Link to flush FE FIFO. */ + struct gccmdlink feflush; + + /* MMU flush. */ + struct gccmdldstate mmuflush_ldst; + + /* gcregMMUConfigurationRegAddrs */ + union { + struct gcregmmuconfiguration reg; + unsigned int raw; + } mmuflush; + + /* Semaphore/stall after MMU flush. */ + struct gcmosema mmuflushsema; + struct gccmdstall mmuflushstall; + + /* Link to the user buffer. */ + struct gccmdlink link; +}; + +/******************************************************************************* +** Modular operations: dst +*/ + +static const struct gccmdldstate gcmodst_config_ldst = + GCLDSTATE(gcregDestAddressRegAddrs, 3); + +static const struct gccmdldstate gcmodst_rotationheight_ldst = + GCLDSTATE(gcregDstRotationHeightRegAddrs, 1); + +static const struct gccmdldstate gcmodst_clip_ldst = + GCLDSTATE(gcregClipTopLeftRegAddrs, 2); + +struct gcmodst { + /* Configuration block. */ + struct gccmdldstate config_ldst; + + /* gcregDestAddressRegAddrs */ + unsigned int address; + + /* gcregDestStrideRegAddrs */ + unsigned int stride; + + /* gcregDestRotationConfigRegAddrs */ + union { + struct gcregdstrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregDstRotationHeightRegAddrs */ + struct gccmdldstate rotationheight_ldst; + + /* gcregDstRotationHeightRegAddrs */ + union { + struct gcregdstrotationheight reg; + unsigned int raw; + } rotationheight; + + /* Clipping block. */ + struct gccmdldstate clip_ldst; + + /* gcregClipTopLeftRegAddrs */ + union { + struct gcregcliplt reg; + unsigned int raw; + } cliplt; + + /* gcregClipBottomRight */ + union { + struct gcregcliprb reg; + unsigned int raw; + } cliprb; + + /* Alignment filler. */ + unsigned int _filler; +}; + +/******************************************************************************* +** Modular operations: alphaoff +*/ + +static const struct gccmdldstate gcmoalphaoff_control_ldst[4] = { + GCLDSTATE(gcregAlphaControlRegAddrs, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 3, 1), +}; + +struct gcmoalphaoff { + /* gcregAlphaControlRegAddrs */ + struct gccmdldstate control_ldst; + + /* gcregAlphaControlRegAddrs */ + union { + struct gcregalphacontrol reg; + unsigned int raw; + } control; +}; + +/******************************************************************************* +** Modular operations: alpha +*/ + +static const struct gccmdldstate gcmoalpha_config_ldst = + GCLDSTATE(gcregAlphaControlRegAddrs, 2); + +struct gcmoalpha { + /* Alpha control block. */ + struct gccmdldstate config_ldst; + + /* gcregAlphaControlRegAddrs */ + union { + struct gcregalphacontrol reg; + unsigned int raw; + } control; + + /* gcregAlphaModesRegAddrs */ + union { + struct gcregalphamodes reg; + unsigned int raw; + } mode; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gccmdldstate gcmoxsrcalpha_control_ldst[4] = { + GCLDSTATE(gcregAlphaControlRegAddrs, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4AlphaControlRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcalpha_mode_ldst[4] = { + GCLDSTATE(gcregAlphaModesRegAddrs, 1), + GCLDSTATE(gcregBlock4AlphaModesRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4AlphaModesRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4AlphaModesRegAddrs + 3, 1), +}; + +struct gcmoxsrcalpha { + /* gcregBlock4AlphaControlRegAddrs */ + struct gccmdldstate control_ldst; + + /* gcregBlock4AlphaControlRegAddrs */ + union { + struct gcregalphacontrol reg; + unsigned int raw; + } control; + + /* gcregBlock4AlphaModesRegAddrs */ + struct gccmdldstate mode_ldst; + + /* gcregBlock4AlphaModesRegAddrs */ + union { + struct gcregalphamodes reg; + unsigned int raw; + } mode; +}; + +/******************************************************************************* +** Modular operations: alphaglobal +*/ + +static const struct gccmdldstate gcmoglobal_color_ldst = + GCLDSTATE(gcregGlobalSrcColorRegAddrs, 2); + +struct gcmoglobal { + /* Global color block. */ + struct gccmdldstate color_ldst; + + /* gcregGlobalSrcColorRegAddrs */ + union { + struct gcregglobalsrccolor reg; + unsigned int raw; + } srcglobal; + + /* gcregGlobalDestColorRegAddrs */ + union { + struct gcregglobaldstcolor reg; + unsigned int raw; + } dstglobal; + + /* Alignment filler. */ + unsigned int _filler; +}; + +static const struct gccmdldstate gcmoxsrcglobal_srcglobal_ldst[4] = { + GCLDSTATE(gcregGlobalSrcColorRegAddrs, 1), + GCLDSTATE(gcregBlock4GlobalSrcColorRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4GlobalSrcColorRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4GlobalSrcColorRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcglobal_dstglobal_ldst[4] = { + GCLDSTATE(gcregGlobalDestColorRegAddrs, 1), + GCLDSTATE(gcregBlock4GlobalDestColorRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4GlobalDestColorRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4GlobalDestColorRegAddrs + 3, 1), +}; + +struct gcmoxsrcglobal { + /* gcregBlock4GlobalSrcColorRegAddrs */ + struct gccmdldstate srcglobal_ldst; + + /* gcregBlock4GlobalSrcColorRegAddrs */ + union { + struct gcregglobalsrccolor reg; + unsigned int raw; + } srcglobal; + + /* gcregBlock4GlobalDestColorRegAddrs */ + struct gccmdldstate dstglobal_ldst; + + /* gcregBlock4GlobalDestColorRegAddrs */ + union { + struct gcregglobaldstcolor reg; + unsigned int raw; + } dstglobal; +}; + +/******************************************************************************* +** Modular operations: yuv +*/ + +static const struct gccmdldstate gcmoyuv_pectrl_ldst = + GCLDSTATE(gcregPEControlRegAddrs, 1); + +static const struct gccmdldstate gcmoyuv2_plane_ldst = + GCLDSTATE(gcregUPlaneAddressRegAddrs, 2); + +static const struct gccmdldstate gcmoyuv3_plane_ldst = + GCLDSTATE(gcregUPlaneAddressRegAddrs, 4); + +struct gcmoyuv1 { + /* gcregPEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregPEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; +}; + +struct gcmoyuv2 { + /* gcregPEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregPEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; + + /* Plane state block. */ + struct gccmdldstate plane_ldst; + + /* gcregUPlaneAddressRegAddrs */ + unsigned int uplaneaddress; + + /* gcregUPlaneStrideRegAddrs */ + unsigned int uplanestride; + + /* Alignment filler. */ + unsigned int _filler1; +}; + +struct gcmoyuv3 { + /* gcregPEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregPEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; + + /* Plane state block. */ + struct gccmdldstate plane_ldst; + + /* gcregUPlaneAddressRegAddrs */ + unsigned int uplaneaddress; + + /* gcregUPlaneStrideRegAddrs */ + unsigned int uplanestride; + + /* gcregVPlaneAddressRegAddrs */ + unsigned int vplaneaddress; + + /* gcregVPlaneStrideRegAddrs */ + unsigned int vplanestride; + + /* Alignment filler. */ + unsigned int _filler1; +}; + +/******************************************************************************* +** Modular operations: xsrcyuv +*/ + +static const struct gccmdldstate gcmoxsrcyuv_uplaneaddress_ldst[4] = { + GCLDSTATE(gcregUPlaneAddressRegAddrs, 1), + GCLDSTATE(gcregBlock4UPlaneAddressRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4UPlaneAddressRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4UPlaneAddressRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcyuv_uplanestride_ldst[4] = { + GCLDSTATE(gcregUPlaneStrideRegAddrs, 1), + GCLDSTATE(gcregBlock4UPlaneStrideRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4UPlaneStrideRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4UPlaneStrideRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcyuv_vplaneaddress_ldst[4] = { + GCLDSTATE(gcregVPlaneAddressRegAddrs, 1), + GCLDSTATE(gcregBlock4VPlaneAddressRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4VPlaneAddressRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4VPlaneAddressRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcyuv_vplanestride_ldst[4] = { + GCLDSTATE(gcregVPlaneStrideRegAddrs, 1), + GCLDSTATE(gcregBlock4VPlaneStrideRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4VPlaneStrideRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4VPlaneStrideRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmoxsrcyuv_pectrl_ldst[4] = { + GCLDSTATE(gcregPEControlRegAddrs, 1), + GCLDSTATE(gcregBlock4PEControlRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4PEControlRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4PEControlRegAddrs + 3, 1), +}; + +struct gcmoxsrcyuv1 { + /* gcregBlock4PEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregBlock4PEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; +}; + +struct gcmoxsrcyuv2 { + /* gcregBlock4PEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregBlock4PEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; + + /* gcregBlock4UPlaneAddressRegAddrs */ + struct gccmdldstate uplaneaddress_ldst; + + /* gcregBlock4UPlaneAddressRegAddrs */ + unsigned int uplaneaddress; + + /* gcregBlock4UPlaneStrideRegAddrs */ + struct gccmdldstate uplanestride_ldst; + + /* gcregBlock4UPlaneStrideRegAddrs */ + unsigned int uplanestride; +}; + +struct gcmoxsrcyuv3 { + /* gcregBlock4PEControlRegAddrs */ + struct gccmdldstate pectrl_ldst; + + /* gcregBlock4PEControlRegAddrs */ + union { + struct gcregpecontrol reg; + unsigned int raw; + } pectrl; + + /* gcregBlock4UPlaneAddressRegAddrs */ + struct gccmdldstate uplaneaddress_ldst; + + /* gcregBlock4UPlaneAddressRegAddrs */ + unsigned int uplaneaddress; + + /* gcregBlock4UPlaneStrideRegAddrs */ + struct gccmdldstate uplanestride_ldst; + + /* gcregBlock4UPlaneStrideRegAddrs */ + unsigned int uplanestride; + + /* gcregBlock4VPlaneAddressRegAddrs */ + struct gccmdldstate vplaneaddress_ldst; + + /* gcregBlock4VPlaneAddressRegAddrs */ + unsigned int vplaneaddress; + + /* gcregBlock4VPlaneStrideRegAddrs */ + struct gccmdldstate vplanestride_ldst; + + /* gcregBlock4VPlaneStrideRegAddrs */ + unsigned int vplanestride; +}; + +/******************************************************************************* +** Modular operations: src +*/ + +static const struct gccmdldstate gcmosrc0_config_ldst = + GCLDSTATE(gcregSrcAddressRegAddrs, 6); + +static const struct gccmdldstate gcmosrc0_rotation_ldst = + GCLDSTATE(gcregSrcRotationHeightRegAddrs, 2); + +static const struct gccmdldstate gcmosrc0_rop_ldst = + GCLDSTATE(gcregRopRegAddrs, 1); + +static const struct gccmdldstate gcmosrc0_mult_ldst = + GCLDSTATE(gcregColorMultiplyModesRegAddrs, 1); + +struct gcmosrc0 { + /* Configuration block. */ + struct gccmdldstate config_ldst; + + /* gcregSrcAddressRegAddrs */ + unsigned int address; + + /* gcregSrcStrideRegAddrs */ + unsigned int stride; + + /* gcregSrcRotationConfigRegAddrs */ + union { + struct gcregsrcrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregSrcConfigRegAddrs */ + union { + struct gcregsrcconfig reg; + unsigned int raw; + } config; + + /* gcregSrcOriginRegAddrs */ + union { + struct gcregsrcorigin reg; + unsigned int raw; + } origin; + + /* gcregSrcSizeRegAddrs */ + union { + struct gcregsrcsize reg; + unsigned int raw; + } size; + + /* Alignment filler. */ + unsigned int _filler1; + + /* Rotation block. */ + struct gccmdldstate rotation_ldst; + + /* gcregSrcRotationHeightRegAddrs */ + union { + struct gcregsrcrotationheight reg; + unsigned int raw; + } rotationheight; + + /* gcregRotAngleRegAddrs */ + union { + struct gcregrotangle reg; + unsigned int raw; + } rotationangle; + + /* Alignment filler. */ + unsigned int _filler2; + + /* gcregRopRegAddrs */ + struct gccmdldstate rop_ldst; + + /* gcregRopRegAddrs */ + union { + struct gcregrop reg; + unsigned int raw; + } rop; + + /* gcregColorMultiplyModesRegAddrs */ + struct gccmdldstate mult_ldst; + + /* gcregColorMultiplyModesRegAddrs */ + union { + struct gcregcolormultiplymodes reg; + unsigned int raw; + } mult; +}; + +static const struct gccmdldstate gcmosrc_address_ldst[4] = { + GCLDSTATE(gcregSrcAddressRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcAddressRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcAddressRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcAddressRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_stride_ldst[4] = { + GCLDSTATE(gcregSrcStrideRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcStrideRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcStrideRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcStrideRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_rotation_ldst[4] = { + GCLDSTATE(gcregSrcRotationConfigRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcRotationConfigRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcRotationConfigRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcRotationConfigRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_config_ldst[4] = { + GCLDSTATE(gcregSrcConfigRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcConfigRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcConfigRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcConfigRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_origin_ldst[4] = { + GCLDSTATE(gcregSrcOriginRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcOriginRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcOriginRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcOriginRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_size_ldst[4] = { + GCLDSTATE(gcregSrcSizeRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcSizeRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcSizeRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcSizeRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_rotationheight_ldst[4] = { + GCLDSTATE(gcregSrcRotationHeightRegAddrs, 1), + GCLDSTATE(gcregBlock4SrcRotationHeightRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4SrcRotationHeightRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4SrcRotationHeightRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_rotationangle_ldst[4] = { + GCLDSTATE(gcregRotAngleRegAddrs, 1), + GCLDSTATE(gcregBlock4RotAngleRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4RotAngleRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4RotAngleRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_rop_ldst[4] = { + GCLDSTATE(gcregRopRegAddrs, 1), + GCLDSTATE(gcregBlock4RopRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4RopRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4RopRegAddrs + 3, 1), +}; + +static const struct gccmdldstate gcmosrc_mult_ldst[4] = { + GCLDSTATE(gcregColorMultiplyModesRegAddrs, 1), + GCLDSTATE(gcregBlock4ColorMultiplyModesRegAddrs + 1, 1), + GCLDSTATE(gcregBlock4ColorMultiplyModesRegAddrs + 2, 1), + GCLDSTATE(gcregBlock4ColorMultiplyModesRegAddrs + 3, 1), +}; + +struct gcmosrc { + /* gcregBlock4SrcAddressRegAddrs */ + struct gccmdldstate address_ldst; + + /* gcregBlock4SrcAddressRegAddrs */ + unsigned int address; + + /* gcregBlock4SrcStrideRegAddrs */ + struct gccmdldstate stride_ldst; + + /* gcregBlock4SrcStrideRegAddrs */ + unsigned int stride; + + /* gcregBlock4SrcRotationConfigRegAddrs */ + struct gccmdldstate rotation_ldst; + + /* gcregBlock4SrcRotationConfigRegAddrs */ + union { + struct gcregsrcrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregBlock4SrcConfigRegAddrs */ + struct gccmdldstate config_ldst; + + /* gcregBlock4SrcConfigRegAddrs */ + union { + struct gcregsrcconfig reg; + unsigned int raw; + } config; + + /* gcregBlock4SrcOriginRegAddrs */ + struct gccmdldstate origin_ldst; + + /* gcregBlock4SrcOriginRegAddrs */ + union { + struct gcregsrcorigin reg; + unsigned int raw; + } origin; + + /* gcregBlock4SrcSizeRegAddrs */ + struct gccmdldstate size_ldst; + + /* gcregBlock4SrcSizeRegAddrs */ + union { + struct gcregsrcsize reg; + unsigned int raw; + } size; + + /* gcregBlock4SrcRotationHeightRegAddrs */ + struct gccmdldstate rotationheight_ldst; + + /* gcregBlock4SrcRotationHeightRegAddrs */ + union { + struct gcregsrcrotationheight reg; + unsigned int raw; + } rotationheight; + + /* gcregBlock4RotAngleRegAddrs */ + struct gccmdldstate rotationangle_ldst; + + /* gcregBlock4RotAngleRegAddrs */ + union { + struct gcregrotangle reg; + unsigned int raw; + } rotationangle; + + /* gcregBlock4RopRegAddrs */ + struct gccmdldstate rop_ldst; + + /* gcregBlock4RopRegAddrs */ + union { + struct gcregrop reg; + unsigned int raw; + } rop; + + /* gcregBlock4ColorMultiplyModesRegAddrs */ + struct gccmdldstate mult_ldst; + + /* gcregBlock4ColorMultiplyModesRegAddrs */ + union { + struct gcregcolormultiplymodes reg; + unsigned int raw; + } mult; +}; + +static const struct gccmdldstate gcmovrsrc_config_ldst = + GCLDSTATE(gcregSrcAddressRegAddrs, 4); + +static const struct gccmdldstate gcmovrsrc_pos_ldst = + GCLDSTATE(gcregVRSourceImageLowRegAddrs, 4); + +static const struct gccmdldstate gcmovrsrc_rotation_ldst = + GCLDSTATE(gcregSrcRotationHeightRegAddrs, 2); + +static const struct gccmdldstate gcmovrsrc_rop_ldst = + GCLDSTATE(gcregRopRegAddrs, 1); + +static const struct gccmdldstate gcmovrsrc_mult_ldst = + GCLDSTATE(gcregColorMultiplyModesRegAddrs, 1); + +struct gcmovrsrc { + /* Configuration block. */ + struct gccmdldstate config_ldst; + + /* gcregSrcAddressRegAddrs */ + unsigned int address; + + /* gcregSrcStrideRegAddrs */ + unsigned int stride; + + /* gcregSrcRotationConfigRegAddrs */ + union { + struct gcregsrcrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregSrcConfigRegAddrs */ + union { + struct gcregsrcconfig reg; + unsigned int raw; + } config; + + /* Alignment filler. */ + unsigned int _filler1; + + /* Source position block. */ + struct gccmdldstate pos_ldst; + + /* gcregVRSourceImageLowRegAddrs */ + union { + struct gcregvrsourceimagelow reg; + unsigned int raw; + } lt; + + /* gcregVRSourceImageHighRegAddrs */ + union { + struct gcregvrsourceimagehigh reg; + unsigned int raw; + } rb; + + /* gcregVRSourceOriginLowRegAddrs */ + unsigned int x; + + /* gcregVRSourceOriginHighRegAddrs */ + unsigned int y; + + /* Alignment filler. */ + unsigned int _filler2; + + /* Rotation block. */ + struct gccmdldstate rotation_ldst; + + /* gcregSrcRotationHeightRegAddrs */ + union { + struct gcregsrcrotationheight reg; + unsigned int raw; + } rotationheight; + + /* gcregRotAngleRegAddrs */ + union { + struct gcregrotangle reg; + unsigned int raw; + } rotationangle; + + /* Alignment filler. */ + unsigned int _filler3; + + /* gcregRopRegAddrs */ + struct gccmdldstate rop_ldst; + + /* gcregRopRegAddrs */ + union { + struct gcregrop reg; + unsigned int raw; + } rop; + + /* gcregColorMultiplyModesRegAddrs */ + struct gccmdldstate mult_ldst; + + /* gcregColorMultiplyModesRegAddrs */ + union { + struct gcregcolormultiplymodes reg; + unsigned int raw; + } mult; +}; + +/******************************************************************************* +** Modular operations: bltconfig +*/ + +static const struct gccmdldstate gcmobltconfig_multisource_ldst = + GCLDSTATE(gcregDEMultiSourceRegAddrs, 1); + +static const struct gccmdldstate gcmobltconfig_dstconfig_ldst = + GCLDSTATE(gcregDestConfigRegAddrs, 1); + +struct gcmobltconfig { + /* gcregDEMultiSourceRegAddrs */ + struct gccmdldstate multisource_ldst; + + /* gcregDEMultiSourceRegAddrs */ + union { + struct gcregmultisource reg; + unsigned int raw; + } multisource; + + /* gcregDestConfigRegAddrs */ + struct gccmdldstate dstconfig_ldst; + + /* gcregDestConfigRegAddrs */ + union { + struct gcregdstconfig reg; + unsigned int raw; + } dstconfig; +}; + +/******************************************************************************* +** Modular operations: startde +*/ + +struct gcmostartde { + /* Start DE command. */ + struct gccmdstartde startde; + struct gccmdstartderect rect; +}; + +/******************************************************************************* +** Modular operations: fillsrc +*/ + +static const struct gccmdldstate gcmofillsrc_rotation_ldst = + GCLDSTATE(gcregSrcRotationConfigRegAddrs, 2); + +static const struct gccmdldstate gcmofillsrc_rotationheight_ldst = + GCLDSTATE(gcregSrcRotationHeightRegAddrs, 2); + +static const struct gccmdldstate gcmofillsrc_alphacontrol_ldst = + GCLDSTATE(gcregAlphaControlRegAddrs, 1); + +struct gcmofillsrc { + /* gcregSrcRotationConfigRegAddrs */ + struct gccmdldstate rotation_ldst; + + /* gcregSrcRotationConfigRegAddrs */ + union { + struct gcregsrcrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregSrcConfigRegAddrs */ + union { + struct gcregsrcconfig reg; + unsigned int raw; + } config; + + /* Alignment filler. */ + unsigned int _filler1; + + /* gcregSrcRotationHeightRegAddrs */ + struct gccmdldstate rotationheight_ldst; + + /* gcregSrcRotationHeightRegAddrs */ + union { + struct gcregsrcrotationheight reg; + unsigned int raw; + } rotationheight; + + /* gcregRotAngleRegAddrs */ + union { + struct gcregrotangle reg; + unsigned int raw; + } rotationangle; + + /* Alignment filler. */ + unsigned int _filler2; + + /* gcregAlphaControlRegAddrs */ + struct gccmdldstate alphacontrol_ldst; + + /* gcregAlphaControlRegAddrs */ + union { + struct gcregalphacontrol reg; + unsigned int raw; + } alphacontrol; +}; + +/******************************************************************************* +** Modular operations: fill +*/ + +static const struct gccmdldstate gcmofill_clearcolor_ldst = + GCLDSTATE(gcregClearPixelValue32RegAddrs, 1); + +static const struct gccmdldstate gcmofill_dstconfig_ldst = + GCLDSTATE(gcregDestConfigRegAddrs, 1); + +static const struct gccmdldstate gcmofill_rop_ldst = + GCLDSTATE(gcregRopRegAddrs, 1); + +struct gcmofill { + struct gcmofillsrc src; + + /* gcregClearPixelValue32RegAddrs */ + struct gccmdldstate clearcolor_ldst; + + /* gcregClearPixelValue32RegAddrs */ + union { + struct gcregclearcolor reg; + unsigned int raw; + } clearcolor; + + /* gcregDestConfigRegAddrs */ + struct gccmdldstate dstconfig_ldst; + + /* gcregDestConfigRegAddrs */ + union { + struct gcregdstconfig reg; + unsigned int raw; + } dstconfig; + + /* gcregRopRegAddrs */ + struct gccmdldstate rop_ldst; + + /* gcregRopRegAddrs */ + union { + struct gcregrop reg; + unsigned int raw; + } rop; + + /* Start DE command. */ + struct gccmdstartde startde; + struct gccmdstartderect rect; +}; + +/******************************************************************************* +** Modular operations: filterkernel +*/ + +static const struct gccmdldstate gcmofilterkernel_shared_ldst = + GCLDSTATE(gcregFilterKernelRegAddrs, 77); + +static const struct gccmdldstate gcmofilterkernel_horizontal_ldst = + GCLDSTATE(gcregHoriFilterKernelRegAddrs, 77); + +static const struct gccmdldstate gcmofilterkernel_vertical_ldst = + GCLDSTATE(gcregVertiFilterKernelRegAddrs, 77); + +struct gcmofilterkernel { + /* Kernel array block. */ + struct gccmdldstate kernelarray_ldst; + + /* Array of kernel coefficients. */ + struct gcregfilterkernel kernelarray; +}; + +/******************************************************************************* +** Modular operations: vrdst +*/ + +static const struct gccmdldstate gcmovrdst_config_ldst = + GCLDSTATE(gcregDestAddressRegAddrs, 4); + +static const struct gccmdldstate gcmovrdst_rotationheight_ldst = + GCLDSTATE(gcregDstRotationHeightRegAddrs, 1); + +struct gcmovrdst { + /* Configuration block. */ + struct gccmdldstate config_ldst; + + /* gcregDestAddressRegAddrs */ + unsigned int address; + + /* gcregDestStrideRegAddrs */ + unsigned int stride; + + /* gcregDestRotationConfigRegAddrs */ + union { + struct gcregdstrotationconfig reg; + unsigned int raw; + } rotation; + + /* gcregDestConfigRegAddrs */ + union { + struct gcregdstconfig reg; + unsigned int raw; + } config; + + /* Alignment filler. */ + unsigned int _filler; + + /* gcregDstRotationHeightRegAddrs */ + struct gccmdldstate rotationheight_ldst; + + /* gcregDstRotationHeightRegAddrs */ + union { + struct gcregdstrotationheight reg; + unsigned int raw; + } rotationheight; +}; + +/******************************************************************************* +** Modular operations: vrconfigex +*/ + +static const struct gccmdldstate gcmovrconfigex_config_ldst = + GCLDSTATE(gcregVRConfigExRegAddrs, 1); + +struct gcmovrconfigex { + /* gcregVRConfigExRegAddrs */ + struct gccmdldstate config_ldst; + + /* gcregVRConfigExRegAddrs */ + union { + struct gcregvrconfigex reg; + unsigned int raw; + } config; +}; + +/******************************************************************************* +** Modular operations: startvr +*/ + +static const struct gccmdldstate gcmostartvr_scale_ldst = + GCLDSTATE(gcregStretchFactorLowRegAddrs, 2); + +static const struct gccmdldstate gcmostartvr_rect_ldst = + GCLDSTATE(gcregVRTargetWindowLowRegAddrs, 2); + +static const struct gccmdldstate gcmostartvr_config_ldst = + GCLDSTATE(gcregVRConfigRegAddrs, 1); + +struct gcmostartvr { + /* Scale factor block. */ + struct gccmdldstate scale_ldst; + + /* gcregStretchFactorLowRegAddrs */ + unsigned int scalex; + + /* gcregStretchFactorHighRegAddrs */ + unsigned int scaley; + + /* Alignment filler. */ + unsigned int _filler1; + + /* Target rectangle. */ + struct gccmdldstate rect_ldst; + + /* gcregVRTargetWindowLowRegAddrs */ + struct gcregvrtargetwindowlow lt; + + /* gcregVRTargetWindowHighRegAddrs */ + struct gcregvrtargetwindowhigh rb; + + /* Alignment filler. */ + unsigned int _filler2; + + /* Start video raster commad. */ + struct gccmdldstate config_ldst; + + /* gcregVRConfigRegAddrs */ + struct gcregvrconfig config; +}; + +#endif diff --git a/bltsville/gcbv/mirror/include/gcx.h b/bltsville/gcbv/mirror/include/gcx.h new file mode 100644 index 0000000..285762f --- /dev/null +++ b/bltsville/gcbv/mirror/include/gcx.h @@ -0,0 +1,87 @@ +/* + * Copyright(c) 2012, + * Texas Instruments, Inc. and Vivante Corporation. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Vivante Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef GCX_H +#define GCX_H + +#include +#include "gcerror.h" +#include "gcreg.h" +#include "gcdbglog.h" + +#ifndef countof +#define countof(a) \ +( \ + sizeof(a) / sizeof(a[0]) \ +) +#endif + +#define GC_PTR2INT(p) \ +( \ + (unsigned int) (p) \ +) + +#define GC_ALIGN(n, align) \ +( \ + ((n) + ((align) - 1)) & ~((align) - 1) \ +) + +#define GCLOCK_TIMEOUT_SEC 10 +#define GCLOCK_TIMEOUT_JIF (msecs_to_jiffies(GCLOCK_TIMEOUT_SEC * 1000)) + +#define GCLOCK_TYPE \ + pthread_mutex_t + +#define GCDEFINE_LOCK(name) \ + pthread_mutex_t name = PTHREAD_MUTEX_INITIALIZER + +#define GCLOCK_INIT(lock) \ + if (pthread_mutex_init(lock, NULL)) { \ + GCERR("failed to init mutex.\n"); \ + } + +#define GCLOCK_DESTROY(lock) \ + if (pthread_mutex_destroy(lock)) { \ + GCERR("failed to destroy mutex.\n"); \ + } + +#define GCLOCK(lock) \ + if (pthread_mutex_lock(lock)) { \ + GCERR("failed to lock mutex.\n"); \ + } + +#define GCUNLOCK(lock) \ + if (pthread_mutex_unlock(lock)) { \ + GCERR("failed to unlock mutex.\n"); \ + } + +#endif diff --git a/bltsville/gcbv/version.h b/bltsville/gcbv/version.h new file mode 100644 index 0000000..431cb96 --- /dev/null +++ b/bltsville/gcbv/version.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2012, + * Texas Instruments, Inc. and Vivante Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Texas Instruments, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL TEXAS INSTRUMENTS, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#define VER_FILEVERSION 2,2,2,0 +#define VER_FILEVERSION_STR "2.2.2.0\0" +#define VER_PRODUCTVERSION 2,2,2,0 +#define VER_PRODUCTVERSION_STR "2.2\0" diff --git a/bltsville/ocd/README b/bltsville/ocd/README new file mode 100644 index 0000000..20a1485 --- /dev/null +++ b/bltsville/ocd/README @@ -0,0 +1 @@ +git://github.com/graphics/ocd.git diff --git a/bltsville/ocd/include/ocd.h b/bltsville/ocd/include/ocd.h new file mode 100755 index 0000000..14e6fc6 --- /dev/null +++ b/bltsville/ocd/include/ocd.h @@ -0,0 +1,801 @@ +/* + * ocd.h + * + * Open Color format Definitions + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file defines the Open Color format Definitions (OCD), an open, + * extensible, color format definition. + * + * This work is licensed under the Creative Commons Attribution-NoDerivs 3.0 + * Unported License. To view a copy of this license, visit + * http://creativecommons.org/licenses/by-nd/3.0/ or send a letter to + * Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, + * 94041, USA. + */ + +#ifndef OCD_H +#define OCD_H + +/* + * ocdformat - specifies one of the supported color formats + * + * ocdformat consists of 8 bits indicating the vendor ID, followed by 24 bits + * specified by the vendor. + * + * VENDOR_ALL is a common ID with formats defined below. + */ + +/****** Bits 31-24 are the vendor ID. The other 24 are vendor defined. ******/ +#define OCDFMTDEF_VENDOR_SHIFT 24 +#define OCDFMTDEF_VENDOR_MASK (0xFF << OCDFMTDEF_VENDOR_SHIFT) + +#define OCDFMTDEF_VENDOR_ALL \ + (0x00 << OCDFMTDEF_VENDOR_SHIFT) /* Common format */ +#define OCDFMTDEF_VENDOR_TI \ + (0x01 << OCDFMTDEF_VENDOR_SHIFT) /* Texas Instruments, Inc. */ +/* 0xF0-0xFF reserved */ + +/***** OCDFMTDEF_VENDOR_ALL *****/ +/* The formats in this group are created using combinations of the values + listed below. */ + +/* + * 33222222 222 21 1 1 1 11 111 1 + * 10987654 321 09 8 7 6 54 321 0 9 876 543210 + * [------] [-] [] | | | [] [-] | | [-] [----] + * | | | | | | | | | | | | + * | | | | | | | | | | | color bits minus 1 + * | | | | | | | | | | | + * | | | | | | | | | | container + * | | | | | | | | | | + * | | | | | | | | | left justified + * | | | | | | | | | + * | | | | | | | | reversed + * | | | | | | | | + * | | | | | | | layout + * | | | | | | | + * | | | | | | subsampling + * | | | | | | + * | | | | | subsample position \ + * | | | | | | + * | | | | non-premult/fill empty 0 > alpha components + * | | | | | + * | | | alpha / + * | | | + * | | standard + * | | + * | color space + * | + * vendor ID (VENDOR_ALL = 0x00) + */ + +/**** Bits 23-21 define the color space. ****/ +#define OCDFMTDEF_CS_SHIFT 21 +#define OCDFMTDEF_CS_MASK (7 << OCDFMTDEF_CS_SHIFT) + +#define OCDFMTDEF_CS_MONO \ + (0 << OCDFMTDEF_CS_SHIFT) /* Monochrome (luma only) */ +#define OCDFMTDEF_CS_LUT \ + (1 << OCDFMTDEF_CS_SHIFT) /* Look-up table (using palette) */ +#define OCDFMTDEF_CS_RGB \ + (2 << OCDFMTDEF_CS_SHIFT) /* Red, green, blue */ +#define OCDFMTDEF_CS_YCbCr \ + (3 << OCDFMTDEF_CS_SHIFT) /* YCbCr (YUV) (luma & chroma) */ +#define OCDFMTDEF_CS_ALPHA \ + (4 << OCDFMTDEF_CS_SHIFT) /* Alpha only (transparency) */ +/* 5 reserved */ +/* 6 reserved */ +/* 7 reserved */ + +/**** Bits 20-19 define the standard ****/ +#define OCDFMTDEF_STD_SHIFT 19 +#define OCDFMTDEF_STD_MASK (3 << OCDFMTDEF_STD_SHIFT) + +#define OCDFMTDEF_STD_ITUR_601_YCbCr \ + (0 << OCDFMTDEF_STD_SHIFT) /* ITU-R BT.601 - YCbCr only */ +/* 0 default for non-YCbCr */ +#define OCDFMTDEF_STD_ITUR_709_YCbCr \ + (1 << OCDFMTDEF_STD_SHIFT) /* ITU-R BT.709 - YCbCr only */ +/* 1 reserved for non-YCbCr */ +/* 2 reserved */ +#define OCDFMTDEF_FULLSCALE_YCbCr \ + (3 << OCDFMTDEF_STD_SHIFT) /* RGB 0 to 255 => + YCbCr 0 to 255, -128 to 127 */ +/* 3 reserved for non-YCbCr */ + +/**** Bits 18-16 are component modifiers for non-alpha c/s only ****/ +#define OCDFMTDEF_ALPHA_SHIFT 18 +#define OCDFMTDEF_ALPHA \ + (1 << OCDFMTDEF_ALPHA_SHIFT) /* An alpha component is added to the + format */ +#define OCDFMTDEF_NON_PREMULT_SHIFT 17 +#define OCDFMTDEF_NON_PREMULT \ + (1 << OCDFMTDEF_NON_PREMULT_SHIFT) /* Component(s) is(are) not + premultiplied by the alpha + (default is + premultiplied) */ +#define OCDFMTDEF_FILL_EMPTY_0_SHIFT \ + OCDFMTDEF_NON_PREMULT_SHIFT +#define OCDFMTDEF_FILL_EMPTY_0 \ + OCDFMTDEF_NON_PREMULT /* Empty bits are hard-wired to 0 + (default is 1) */ +#define OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNMENT_SHIFT 16 +#define OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED \ + (0 << OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNMENT_SHIFT) /* Subsamples aligned + w/1st non-subsample + (e.g. MPEG-2) */ +#define OCDFMTDEF_SUBSAMPLE_HORZ_CENTERED \ + (1 << OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNMENT_SHIFT) /* Subsamples are + between + non-subsamples + (e.g. MPEG-1) */ + +/*** Bits 18-16 are used differently for alpha c/s ***/ +/* Bit 18 is reserved */ +/*** Bits 17-16 define the number of alpha components for alpha c/s ***/ +#define OCDFMTDEF_ALPHA_COMPONENTS_SHIFT 16 +#define OCDFMTDEF_ALPHA_COMPONENTS_MASK \ + (3 << OCDFMTDEF_ALPHA_COMPONENTS_SHIFT) + +#define OCDFMTDEF_ALPHA_COMPONENTS_1 (0 << OCDFMTDEF_ALPHA_COMPONENTS_SHIFT) +#define OCDFMTDEF_ALPHA_COMPONENTS_2 (1 << OCDFMTDEF_ALPHA_COMPONENTS_SHIFT) +#define OCDFMTDEF_ALPHA_COMPONENTS_3 (2 << OCDFMTDEF_ALPHA_COMPONENTS_SHIFT) +#define OCDFMTDEF_ALPHA_COMPONENTS_4 (3 << OCDFMTDEF_ALPHA_COMPONENTS_SHIFT) + +/**** Bits 15-14 define subsampling ****/ +#define OCDFMTDEF_SUBSAMPLE_SHIFT 14 +#define OCDFMTDEF_SUBSAMPLE_MASK (3 << OCDFMTDEF_SUBSAMPLE_SHIFT) + +#define OCDFMTDEF_SUBSAMPLE_NONE \ + (0 << OCDFMTDEF_SUBSAMPLE_SHIFT) /* No subsampling; + each pixel has each component */ +#define OCDFMTDEF_SUBSAMPLE_422_YCbCr \ + (1 << OCDFMTDEF_SUBSAMPLE_SHIFT) /* 4:2:2 subsampling; + each horizontal pair of pixels + has one Y (luma) component each, + but shares one Cb and Cr (chroma) + component. */ +/* 1 reserved for non-YCbCr */ +#define OCDFMTDEF_SUBSAMPLE_420_YCbCr \ + (2 << OCDFMTDEF_SUBSAMPLE_SHIFT) /* 4:2:0 subsampling; + each square of four pixels has + one Y (luma) component each, but + shares one Cb and Cr (chroma) + component. */ +/* 2 reserved for non-YCbCr */ +#define OCDFMTDEF_SUBSAMPLE_411_YCbCr \ + (3 << OCDFMTDEF_SUBSAMPLE_SHIFT) /* 4:1:1 subsampling; + each horizontal four pixels have + one Y (luma) component each, but + shares one Cb and Cr (chroma) + component. */ +/* 3 reserved for non-YCbCr */ + +/**** Bits 13-11 define the memory layout + (combined with _REVERSED and _LEFT_JUSTIFIED) ****/ +#define OCDFMTDEF_LAYOUT_SHIFT 11 +#define OCDFMTDEF_LAYOUT_MASK (7 << OCDFMTDEF_LAYOUT_SHIFT) + +#define OCDFMTDEF_PACKED \ + (0 << OCDFMTDEF_LAYOUT_SHIFT) /* Components interleaved together */ +#define OCDFMTDEF_DISTRIBUTED \ + (1 << OCDFMTDEF_LAYOUT_SHIFT) /* Components are distributed evenly + across the container; e.g. a 64-bit + container with four 8-bit components + are distributed with 8 bits between + them: __C0__C1__C2__C3 */ +#define OCDFMTDEF_2_PLANE_YCbCr \ + (2 << OCDFMTDEF_LAYOUT_SHIFT) /* Y component is separated from Cb & Cr + components. After the Y plane, an + interleaved CbCr plane follows. */ +/* 2 reserved for non-YCbCr */ +#define OCDFMTDEF_3_PLANE_STACKED \ + (3 << OCDFMTDEF_LAYOUT_SHIFT) /* Y, Cb, and Cr components are + separated. After the Y plane is a Cb + plane, and then a Cr plane. */ +/* 3 reserved for non-YCbCr and non-RGB */ +/* 4 reserved */ +/* 5 reserved */ +/* 6 reserved */ +#define OCDFMTDEF_3_PLANE_SIDE_BY_SIDE_YCbCr \ + (7 << OCDFMTDEF_LAYOUT_SHIFT) /* Y, Cb, and Cr components are + separated. After the Y plane the Cb + and Cr planes are separated but + side-by-side in memory (interleaved + on a line-by-line basis). */ +/* 7 reserved for non-YCbCr */ + +/**** Bits 10-9 are layout modifiers. ****/ +#define OCDFMTDEF_REVERSED_SHIFT 10 +#define OCDFMTDEF_REVERSED \ + (1 << OCDFMTDEF_REVERSED_SHIFT) /* Order of components reversed + (default is RGB or CbCr) */ +#define OCDFMTDEF_LEFT_JUSTIFIED_SHIFT 9 +#define OCDFMTDEF_LEFT_JUSTIFIED \ + (1 << OCDFMTDEF_LEFT_JUSTIFIED_SHIFT) /* Components are shifted + left (default is shifted + right); for 3-plane YCbCr, + this indicates wasted space + to the right of the Cb & Cr + planes (stride matches Y + plane). */ + +/**** Bits 6-8 specify the container type. ****/ +#define OCDFMTDEF_CONTAINER_SHIFT 6 +#define OCDFMTDEF_CONTAINER_MASK (7 << OCDFMTDEF_CONTAINER_SHIFT) + +#define OCDFMTDEF_CONTAINER_8BIT (0 << OCDFMTDEF_CONTAINER_SHIFT) +#define OCDFMTDEF_CONTAINER_16BIT (1 << OCDFMTDEF_CONTAINER_SHIFT) +#define OCDFMTDEF_CONTAINER_24BIT (2 << OCDFMTDEF_CONTAINER_SHIFT) +#define OCDFMTDEF_CONTAINER_32BIT (3 << OCDFMTDEF_CONTAINER_SHIFT) +/* 4 (0x008000) reserved */ +#define OCDFMTDEF_CONTAINER_48BIT (5 << OCDFMTDEF_CONTAINER_SHIFT) +/* 6 (0x00C000) reserved */ +#define OCDFMTDEF_CONTAINER_64BIT (7 << OCDFMTDEF_CONTAINER_SHIFT) + +/**** Bits 0-5 contain the total number of component bits minus one. ****/ +/* To calculate the number of bits for each RGBA component, use the following + * formula: + * + * green bits = int((color bits + 2) / 3) + * blue bits = int((color bits - green bits) / 2) + * red bits = color bits - green bits - blue bits + * alpha bits (when present) = container size - color bits + * + * Ex. 1: RGB16 -> 16 bits + * green bits = int((16 + 2) / 3) = 6 + * blue bits = int((16 - 6) / 2) = 5 + * red bits = 16 - 6 - 5 = 5 + * alpha bits = n/a + * Ex. 2: ARGB16 -> 16 bits + * green bits = int((16 + 2) / 3) = 6 + * blue bits = int((16 - 6) / 2) = 5 + * red bits = 16 - 6 - 5 = 5 + * alpha bits = 24 - 16 = 8 + * Ex. 3: RGB32 -> 32 bits + * green bits = int((32 + 2) / 3) = 11 + * blue bits = int((32 - 11) / 2) = 10 + * red bits = 32 - 11 - 10 = 11 + * alpha bits = n/a + * + * For planar formats, the container indicates the total number of bits on the + * subsampled boundary, while the component bits are the average number of + * bits per pixel. + * + * Ex. 1: YV12 -> YCbCr 4:2:0 w/8-bit samples -> 4x8 + 2x8 = 48 bit container + * 48 bits / 4 pixels = 12 bpp + * Ex. 2: NV16 -> YCbCr 4:2:2 w/8-bit samples -> 2x8 + 2x8 = 32 bit container + * 24 bits / 2 pixels = 16 bpp + */ +#define OCDFMTDEF_COMPONENTSIZEMINUS1_SHIFT 0 +#define OCDFMTDEF_COMPONENTSIZEMINUS1_MASK \ + (0x3F << OCDFMTDEF_COMPONENTSIZEMINUS1_SHIFT) + + +/* + * The formats below are constructed from the definitions above. However, not + * all formats possible are specified (and named) below. The other formats + * which can be uniquely formed using the above definitions are legitimate + * formats, and may be used as well. + */ +enum ocdformat { + OCDFMT_UNKNOWN = -1, + OCDFMT_NONE = OCDFMT_UNKNOWN, + + /*** Alpha only ***/ + /** Packed **/ + OCDFMT_ALPHA1 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_1 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (1 - 1), + OCDFMT_ALPHA2 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_1 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (2 - 1), + OCDFMT_ALPHA4 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_1 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (4 - 1), + OCDFMT_ALPHA8 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_1 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (8 - 1), + /* Sub-pixel */ + OCDFMT_ALPHA4x1 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_4 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (4 - 1), + OCDFMT_ALPHA3x8 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_3 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_24BIT | + (24 - 1), + OCDFMT_ALPHA4x8 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_ALPHA | + OCDFMTDEF_ALPHA_COMPONENTS_4 | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_32BIT | + (32 - 1), + + /*** Monochrome ***/ + /** Packed **/ + OCDFMT_MONO1 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_MONO | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (1 - 1), + OCDFMT_MONO2 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_MONO | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (2 - 1), + OCDFMT_MONO4 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_MONO | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (4 - 1), + OCDFMT_MONO8 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_MONO | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (8 - 1), + + /*** Palettized (look-up-table) ***/ + /** Packed **/ + OCDFMT_LUT1 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_LUT | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (1 - 1), + OCDFMT_LUT2 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_LUT | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (2 - 1), + OCDFMT_LUT4 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_LUT | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (4 - 1), + OCDFMT_LUT8 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_LUT | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_8BIT | + (8 - 1), + + /*** RGB ***/ + /** Packed **/ + /* No subsampling */ + OCDFMT_RGB12 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_16BIT | + (12 - 1), /* (15):4:4:4 */ + OCDFMT_xRGB12 = OCDFMT_RGB12, + OCDFMT_1RGB12 = OCDFMT_xRGB12, + OCDFMT_0RGB12 = OCDFMT_xRGB12 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):4:4:4 */ + + OCDFMT_BGR12 = OCDFMT_RGB12 | + OCDFMTDEF_REVERSED, /* (15):4:4:4 */ + OCDFMT_xBGR12 = OCDFMT_BGR12, + OCDFMT_1BGR12 = OCDFMT_xBGR12, + OCDFMT_0BGR12 = OCDFMT_xBGR12 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):4:4:4 */ + + OCDFMT_RGBx12 = OCDFMT_xRGB12 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 4:4:4:(15) */ + OCDFMT_RGB112 = OCDFMT_RGBx12, + OCDFMT_RGB012 = OCDFMT_RGBx12 | + OCDFMTDEF_FILL_EMPTY_0, /* 4:4:4:(0) */ + + OCDFMT_BGRx12 = OCDFMT_xRGB12 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 4:4:4:(15) */ + OCDFMT_BGR112 = OCDFMT_BGRx12, + OCDFMT_BGR012 = OCDFMT_BGRx12 | + OCDFMTDEF_FILL_EMPTY_0, /* 4:4:4:(0) */ + + OCDFMT_RGB15 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_16BIT | + (15 - 1), /* (1):5:5:5 */ + OCDFMT_xRGB15 = OCDFMT_RGB15, + OCDFMT_1RGB15 = OCDFMT_xRGB15, + OCDFMT_0RGB15 = OCDFMT_xRGB15 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):5:5:5 */ + + OCDFMT_BGR15 = OCDFMT_RGB15 | + OCDFMTDEF_REVERSED, /* (1):5:5:5 */ + OCDFMT_xBGR15 = OCDFMT_BGR15, + OCDFMT_1BGR15 = OCDFMT_xBGR15, + OCDFMT_0BGR15 = OCDFMT_xBGR15 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):5:5:5 */ + + OCDFMT_RGBx15 = OCDFMT_RGB15 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 5:5:5:(1) */ + OCDFMT_RGB115 = OCDFMT_RGBx15, + OCDFMT_RGB015 = OCDFMT_RGBx15 | + OCDFMTDEF_FILL_EMPTY_0, /* 5:5:5:(0) */ + + OCDFMT_BGRx15 = OCDFMT_RGB15 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 5:5:5:(1) */ + OCDFMT_BGR115 = OCDFMT_BGRx15, + OCDFMT_BGR015 = OCDFMT_BGRx15 | + OCDFMTDEF_FILL_EMPTY_0, /* 5:5:5:(0) */ + + OCDFMT_RGB16 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_16BIT | + (16 - 1), /* 5:6:5 */ + OCDFMT_BGR16 = OCDFMT_RGB16 | + OCDFMTDEF_REVERSED, /* 5:6:5 */ + + OCDFMT_RGB24 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_24BIT | + (24 - 1), /* 8:8:8 */ + OCDFMT_BGR24 = OCDFMT_RGB24 | + OCDFMTDEF_REVERSED, /* 8:8:8 */ + + OCDFMT_xRGB16 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_24BIT | + (16 - 1), /* (255):5:6:5 */ + OCDFMT_1RGB16 = OCDFMT_xRGB16, + OCDFMT_0RGB16 = OCDFMT_xRGB16 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):5:6:5 */ + + OCDFMT_xBGR16 = OCDFMT_xRGB16 | + OCDFMTDEF_REVERSED, /* (255):5:6:5 */ + OCDFMT_1BGR16 = OCDFMT_xBGR16, + OCDFMT_0BGR16 = OCDFMT_xBGR16 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):5:6:5 */ + + OCDFMT_RGBx16 = OCDFMT_xRGB16 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 5:6:5:(255) */ + OCDFMT_RGB116 = OCDFMT_RGBx16, + OCDFMT_RGB016 = OCDFMT_RGBx16 | + OCDFMTDEF_FILL_EMPTY_0, /* 5:6:5:(0) */ + + OCDFMT_BGRx16 = OCDFMT_xRGB16 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 5:6:5:(255) */ + OCDFMT_BGR116 = OCDFMT_BGRx16, + OCDFMT_BGR016 = OCDFMT_BGRx16 | + OCDFMTDEF_FILL_EMPTY_0, /* 5:6:5:(0) */ + + OCDFMT_xRGB24 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_32BIT | + (24 - 1), /* (255):8:8:8 */ + OCDFMT_1RGB24 = OCDFMT_xRGB24, + OCDFMT_0RGB24 = OCDFMT_xRGB24 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):8:8:8 */ + + OCDFMT_xBGR24 = OCDFMT_xRGB24 | + OCDFMTDEF_REVERSED, /* (255):8:8:8 */ + OCDFMT_1BGR24 = OCDFMT_xBGR24, + OCDFMT_0BGR24 = OCDFMT_xBGR24 | + OCDFMTDEF_FILL_EMPTY_0, /* (0):8:8:8 */ + + OCDFMT_RGBx24 = OCDFMT_xRGB24 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 8:8:8:(255) */ + OCDFMT_RGB124 = OCDFMT_RGBx24, + OCDFMT_RGB024 = OCDFMT_RGBx24 | + OCDFMTDEF_FILL_EMPTY_0, /* 8:8:8:(0) */ + + OCDFMT_BGRx24 = OCDFMT_xRGB24 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 8:8:8:(255) */ + OCDFMT_BGR124 = OCDFMT_BGRx24, + OCDFMT_BGR024 = OCDFMT_BGRx24 | + OCDFMTDEF_FILL_EMPTY_0, /* 8:8:8:(0) */ + + /* Premultiplied ARGB */ + OCDFMT_ARGB12 = OCDFMT_xRGB12 | + OCDFMTDEF_ALPHA, /* 4:4:4:4 */ + OCDFMT_ABGR12 = OCDFMT_xBGR12 | + OCDFMTDEF_ALPHA, /* 4:4:4:4 */ + OCDFMT_RGBA12 = OCDFMT_RGBx12 | + OCDFMTDEF_ALPHA, /* 4:4:4:4 */ + OCDFMT_BGRA12 = OCDFMT_BGRx12 | + OCDFMTDEF_ALPHA, /* 4:4:4:4 */ + + OCDFMT_ARGB16 = OCDFMT_xRGB16 | + OCDFMTDEF_ALPHA, /* 8:5:6:5 */ + OCDFMT_ABGR16 = OCDFMT_ARGB16 | + OCDFMTDEF_REVERSED, /* 8:5:6:5 */ + OCDFMT_RGBA16 = OCDFMT_ARGB16 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 5:6:5:8 */ + OCDFMT_BGRA16 = OCDFMT_ARGB16 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 5:6:5:8 */ + + OCDFMT_ARGB24 = OCDFMT_xRGB24 | + OCDFMTDEF_ALPHA, /* 8:8:8:8 */ + OCDFMT_ABGR24 = OCDFMT_xBGR24 | + OCDFMTDEF_ALPHA, /* 8:8:8:8 */ + OCDFMT_RGBA24 = OCDFMT_RGBx24 | + OCDFMTDEF_ALPHA, /* 8:8:8:8 */ + OCDFMT_BGRA24 = OCDFMT_BGRx24 | + OCDFMTDEF_ALPHA, /* 8:8:8:8 */ + + /* Non-premultiplied ARGB */ + OCDFMT_nARGB12 = OCDFMT_ARGB12 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ARGB12_NON_PREMULT = OCDFMT_nARGB12, + + OCDFMT_nABGR12 = OCDFMT_ABGR12 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ABGR12_NON_PREMULT = OCDFMT_nABGR12, + + OCDFMT_nRGBA12 = OCDFMT_RGBA12 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_RGBA12_NON_PREMULT = OCDFMT_nRGBA12, + + OCDFMT_nBGRA12 = OCDFMT_BGRA12 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_BGRA12_NON_PREMULT = OCDFMT_nBGRA12, + + OCDFMT_ARGB15 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_RGB | + OCDFMTDEF_ALPHA | + OCDFMTDEF_NON_PREMULT | + OCDFMTDEF_SUBSAMPLE_NONE | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_16BIT | + (15 - 1), /* 1:5:5:5 - "normal" + format is not + premultiplied */ + OCDFMT_nARGB15 = OCDFMT_ARGB15, + OCDFMT_ARGB15_NON_PREMULT = OCDFMT_nARGB15, + + OCDFMT_ABGR15 = OCDFMT_ARGB15 | + OCDFMTDEF_REVERSED, /* 1:5:5:5 - "normal" + format is not + premultiplied */ + OCDFMT_nABGR15 = OCDFMT_ABGR15, + OCDFMT_ABGR15_NON_PREMULT = OCDFMT_nABGR15, + + OCDFMT_RGBA15 = OCDFMT_ARGB15 | + OCDFMTDEF_LEFT_JUSTIFIED, /* 5:5:5:1 - "normal" + format is not + premultiplied */ + OCDFMT_nRGBA15 = OCDFMT_RGBA15, + OCDFMT_RGBA15_NON_PREMULT = OCDFMT_nRGBA15, + + OCDFMT_BGRA15 = OCDFMT_ARGB15 | + OCDFMTDEF_LEFT_JUSTIFIED | + OCDFMTDEF_REVERSED, /* 5:5:5:1 - "normal" + format is not + premultiplied */ + OCDFMT_nBGRA15 = OCDFMT_BGRA15, + OCDFMT_BGRA15_NON_PREMULT = OCDFMT_nRGBA15, + + OCDFMT_nARGB16 = OCDFMT_ARGB16 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ARGB16_NON_PREMULT = OCDFMT_nARGB16, + + OCDFMT_nABGR16 = OCDFMT_ABGR16 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ABGR16_NON_PREMULT = OCDFMT_nABGR16, + + OCDFMT_nRGBA16 = OCDFMT_RGBA16 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_RGBA16_NON_PREMULT = OCDFMT_nRGBA16, + + OCDFMT_nBGRA16 = OCDFMT_BGRA16 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_BGRA16_NON_PREMULT = OCDFMT_nBGRA16, + + OCDFMT_nARGB24 = OCDFMT_ARGB24 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ARGB24_NON_PREMULT = OCDFMT_nARGB24, + + OCDFMT_nABGR24 = OCDFMT_ABGR24 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_ABGR24_NON_PREMULT = OCDFMT_nABGR24, + + OCDFMT_nRGBA24 = OCDFMT_RGBA24 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_RGBA24_NON_PREMULT = OCDFMT_nRGBA24, + + OCDFMT_nBGRA24 = OCDFMT_BGRA24 | + OCDFMTDEF_NON_PREMULT, + OCDFMT_BGRA24_NON_PREMULT = OCDFMT_nBGRA24, + + /*** YCbCr ***/ + /** Packed **/ + /* YCbCr 4:2:2 */ + OCDFMT_UYVY = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_SUBSAMPLE_422_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_PACKED | + OCDFMTDEF_CONTAINER_32BIT | + (16 - 1), + OCDFMT_UYVY_601 = OCDFMT_UYVY | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_UYVY_709 = OCDFMT_UYVY | + OCDFMTDEF_STD_ITUR_709_YCbCr, + OCDFMT_Y422 = OCDFMT_UYVY, + OCDFMT_Y422_601 = OCDFMT_UYVY_601, + OCDFMT_Y422_709 = OCDFMT_UYVY_709, + + OCDFMT_VYUY = OCDFMT_UYVY | + OCDFMTDEF_REVERSED, + OCDFMT_VYUY_601 = OCDFMT_VYUY | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_VYUY_709 = OCDFMT_VYUY | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_YUYV = OCDFMT_UYVY | + OCDFMTDEF_LEFT_JUSTIFIED, + OCDFMT_YUYV_601 = OCDFMT_YUYV | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_YUYV_709 = OCDFMT_YUYV | + OCDFMTDEF_STD_ITUR_709_YCbCr, + OCDFMT_YUY2 = OCDFMT_YUYV, + OCDFMT_YUY2_601 = OCDFMT_YUYV_601, + OCDFMT_YUY2_709 = OCDFMT_YUYV_709, + + OCDFMT_YVYU = OCDFMT_VYUY | + OCDFMTDEF_LEFT_JUSTIFIED, + OCDFMT_YVYU_601 = OCDFMT_YVYU | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_YVYU_709 = OCDFMT_YVYU | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + /** 3-plane **/ + /* YCbCr 4:2:2 */ + OCDFMT_YV16 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_SUBSAMPLE_422_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_3_PLANE_STACKED | + OCDFMTDEF_CONTAINER_32BIT | + (16 - 1), + OCDFMT_YV16_601 = OCDFMT_YV16 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_YV16_709 = OCDFMT_YV16 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + /* YCbCr 4:2:0 */ + OCDFMT_IYUV = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_SUBSAMPLE_420_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_3_PLANE_STACKED | + OCDFMTDEF_CONTAINER_48BIT | + (12 - 1), + OCDFMT_IYUV_601 = OCDFMT_IYUV | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_IYUV_709 = OCDFMT_IYUV | + OCDFMTDEF_STD_ITUR_709_YCbCr, + OCDFMT_I420 = OCDFMT_IYUV, + OCDFMT_I420_601 = OCDFMT_IYUV_601, + OCDFMT_I420_709 = OCDFMT_IYUV_709, + + OCDFMT_YV12 = OCDFMT_IYUV | + OCDFMTDEF_REVERSED, + OCDFMT_YV12_601 = OCDFMT_YV12 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_YV12_709 = OCDFMT_YV12 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_IMC3 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_SUBSAMPLE_420_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_3_PLANE_STACKED | + OCDFMTDEF_LEFT_JUSTIFIED | /* Indicates wasted + space to the + right */ + OCDFMTDEF_CONTAINER_48BIT | + (12 - 1), + OCDFMT_IMC3_601 = OCDFMT_IMC3 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_IMC3_709 = OCDFMT_IMC3 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_IMC1 = OCDFMT_IMC3 | + OCDFMTDEF_REVERSED, + OCDFMT_IMC1_601 = OCDFMT_IMC1 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_IMC1_709 = OCDFMT_IMC1 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_IMC4 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_STD_ITUR_601_YCbCr | + OCDFMTDEF_SUBSAMPLE_420_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_3_PLANE_SIDE_BY_SIDE_YCbCr | + OCDFMTDEF_CONTAINER_48BIT | + (12 - 1), + OCDFMT_IMC4_601 = OCDFMT_IMC4 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_IMC4_709 = OCDFMT_IMC4 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_IMC2 = OCDFMT_IMC4 | + OCDFMTDEF_REVERSED, + OCDFMT_IMC2_601 = OCDFMT_IMC2 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_IMC2_709 = OCDFMT_IMC2 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + /** 2-plane **/ + /* YCbCr 4:2:2 */ + OCDFMT_NV16 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_SUBSAMPLE_422_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_2_PLANE_YCbCr | + OCDFMTDEF_CONTAINER_32BIT | + (16 - 1), + OCDFMT_NV16_601 = OCDFMT_NV16 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_NV16_709 = OCDFMT_NV16 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_NV61 = OCDFMT_NV16 | + OCDFMTDEF_REVERSED, + OCDFMT_NV61_601 = OCDFMT_NV61 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_NV61_709 = OCDFMT_NV61 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + /* YCbCr 4:2:0 */ + OCDFMT_NV12 = OCDFMTDEF_VENDOR_ALL | + OCDFMTDEF_CS_YCbCr | + OCDFMTDEF_STD_ITUR_601_YCbCr | + OCDFMTDEF_SUBSAMPLE_420_YCbCr | + OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED | + OCDFMTDEF_2_PLANE_YCbCr | + OCDFMTDEF_CONTAINER_48BIT | + (12 - 1), + OCDFMT_NV12_601 = OCDFMT_NV12 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_NV12_709 = OCDFMT_NV12 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + + OCDFMT_NV21 = OCDFMT_NV12 | + OCDFMTDEF_REVERSED, + OCDFMT_NV21_601 = OCDFMT_NV21 | + OCDFMTDEF_STD_ITUR_601_YCbCr, + OCDFMT_NV21_709 = OCDFMT_NV21 | + OCDFMTDEF_STD_ITUR_709_YCbCr, + +#ifdef OCD_EXTERNAL_INCLUDE +#include OCD_EXTERNAL_INCLUDE +#endif +}; + +#endif /* OCD_H */ diff --git a/bltsville/ocd/index.html b/bltsville/ocd/index.html new file mode 100755 index 0000000..52eaa11 --- /dev/null +++ b/bltsville/ocd/index.html @@ -0,0 +1,617 @@ + + + + + + +Need OCD? + + + + + + + + + + +
+ +

OCD is a set of Open Color format Definitions.

+

Color formats are used in everything from BLTers to video codecs, and from cameras to displays.  But although +there are plenty of common formats, the definition of the code specifying them is never the same.

+

OCD attempts to solve this problem.  It provides logical color format codes, and + is extensible.

+
+ + + + + + + +
+
CC BY-ND
+

License

+
+
+

The definitions are designed and maintained by Texas Instruments, Inc., but anyone is free to use them with no +cost or obligation.

+

This project is licensed under the Creative Commons +Attribution-NoDerivs 3.0 Unported License.

+
+
+
+ + + + + + + + +
+

Source

+
+
+ + download zip + + download tar +
+
+ Get the source code on GitHub at graphics/ocd, or download this + project in either + zip or + tar formats.
+

You can also clone the project with Git by running:

+ 
$ git clone git://github.com/graphics/ocd
+
+ + + + + + + +
Wiki
https://github.com/graphics/ocd/wiki
+
+
+
+

Header File

+

ocd.h contains the Open Color format Definitions.

+

How does it work?

+

OCD was designed to allow a single 32-bit word (int) to specify the +color format.  The color format is specified as an enumeration.  The +enumeration values are constructed using bitfields.

+

OCD breaks off a chunk of those 32 bits to specify a vendor ID.  With +this, OCD can allow vendors with very unique formats to obtain their own vendor +ID and specify any of 16 million formats of their own.  Minimum sharing +here, but maximum flexibility.

+

OCDFMTDEF_VENDOR_ALL

+

The power of OCD lies in the shared vendor ID.  The +OCDFMTDEF_VENDOR_ALL vendor ID indicates that the common set of definitions is +being used.  And this set of definitions is designed to specify pretty much +any reasonably common color format in use today.

+

When OCDFMTDEF_VENDOR_ALL is chosen, the remaining 24 bits of the format are +sub-divided into bitfields used to describe the format.

+

Predefined Names

+

A set of enumeration values are already provided with predefined names.  +It is easiest for clients to use these predefined values.  They already cover most of +the formats likely to be encountered.

+

NOTE:  The naming conventions of the predefined formats are based on their byte +ordering, so they are not endian-dependent.  The exceptions are the 16-bit +packed formats, which are little-endian.

+

Some examples:

+

OCDFMT_RGB24 is a format +where each pixel consists of 3 bytes (24 bits).  The first byte in memory +(at address A, read as a byte) is the red component.  The second byte in +memory (at address A+1, read as a byte) is the green component.  The third +byte in memory (at address A+2, read as a byte) is the blue component.

+

OCDFMT_xRGB24 is a format where each pixel consists of 4 bytes +(32 bits), but only 3 of these (24 bits) contain color information.  The +remaining 8 bits are ignored on a read, or filled with 0s on a write.

+

If the format of interest is not already specified, it is still likely that +the format is supported by the VENDOR_ALL design.  Using the bitfields below, new combinations can be constructed.  These +combinations are already legal, but they just have not been given names.  +Users of OCD can define their own names in a separate header file and include it +using the OCD_EXTERNAL_INCLUDE mechanism:

+

file: myocdfmts.h

+

MYOCDFMT_ALPHAMONO8 = OCDFMT_MONO8 |
+                      +OCDFMTDEF_ALPHA,

+

file:  mysource.c

+

#define OCD_EXTERNAL_INCLUDE "myocdfmts.h"
+#include <ocd.h>

+

VENDOR_ALL Bitfields

+

The following bitfields only apply to the +OCDFMTDEF_VENDOR_ALL color formats.

+

Color Space

+

The first field specifies the color space.  Currently there are five +color spaces defined, but there is room for three more if the need arises:

+
    +
  • Monochrome - OCDFMTDEF_CS_MONO
    • +
  • Look-Up Table - OCDFMTDEF_CS_LUT
    • +
  • RGB - OCDFMTDEF_CS_RGB
    • +
  • YCbCr (a.k.a. YUV) - + OCDFMTDEF_CS_YCbCr
    • +
  • Alpha - OCDFMTDEF_CS_ALPHA
    • +
+

Once the color space has been selected, the remaining bits depend on that +choice:

+

OCDFMTDEF_CS_MONO

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
31:2423:2120:1918171615:1413:111098:65:0
00000000000reserved
+ (00)		alphanon-premult/
+ fill empty 0		reserved
+ (0)		reserved
+ (0)		reserved
+ (0)		reversedreserved
+ (0)		container
+ size		color
+ bits-1
+

OCDFMTDEF_CS_LUT

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
31:2423:2120:1918171615:1413:111098:65:0
00000000001reserved
+ (00)		reserved
+ (0)		reserved
+ (0)		reserved
+ (0)		reserved
+ (0)		reserved
+ (0)		reversedreserved
+ (0)		container
+ size		color
+ bits-1
+

OCDFMTDEF_CS_RGB

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
31:2423:2120:1918171615:1413:111098:65:0
00000000010reserved
+ (00)		alphanon-premult/
+ fill empty 0		reserved
+ (0)		reserved
+ (00)		layoutreversedleft
+ justified		container
+ size		color
+ bits-1
+

OCDFMTDEF_CS_YCbCr

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
31:2423:2120:1918171615:1413:111098:65:0
00000000011standardalphanon-premult/
+ fill empty 0		subsample
+ position		subsamplinglayoutreversedleft
+ justified		container
+ size		color
+ bits-1
+

OCDFMTDEF_CS_ALPHA

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
31:2423:2120:1918171615:1413:111098:65:0
00000000100reserved
+ (00)		reserved
+ (0)		reserved
+ (0)		reserved
+ (0)		reserved
+ (00)		reserved
+ (00)		reversedreserved
+ (0)		container
+ size		alpha
+ bits-1
+

 

+

Standard (YCbCr)

+

This field specifies the standard being used for this color space.

+

Currently, this field is only defined for the YCbCr color space:

+ +

We believe that this field will be used to add linear format support in the +very near future.

+

Fill Empty 0 (Mono, RGB, YCbCr)

+

When there is no alpha included with a format, but the color components don't +fill up the container, the remainder of the bits must be filled with something +when written.  When the OCDFMTDEF_FILL_EMPTY_0 +flag is not set, they are filled with 1.  This is done in case they are +later used as an alpha value, which will already represent an opaque pixel +(whether the pixel is premultiplied or not).  When the flag is set, they are +filled with 0, to accommodate those environments where they are required to be +cleared when unused.

+

Alpha (Mono, RGB, YCbCr)

+

The OCDFMTDEF_ALPHA bit indicates that the +format includes an alpha channel along with the main color components.

+

Non-Premult (Mono, RGB, YCbCr)

+

Formats with alpha can have their color components pre-multiplied by the +alpha component or not.  When the +OCDFMTDEF_NON_PREMULT bit is set, the color components are not +premultiplied by the accompanying alpha.  When the bit is not set, the +color components are already multiplied by the alpha.

+

Subsampling (YCbCr)

+

Some formats can be subsampled.  At this point, only subsampled YCbCr is +supported.

+
    +
  • No subsampling - + OCDFMTDEF_SUBSAMPLE_NONE
    • +
  • 4:2:2 subsampling - + OCDFMTDEF_SUBSAMPLE_422_YCbCr
    • +
  • 4:2:0 subsampling - + OCDFMTDEF_SUBSAMPLE_420_YCbCr
    • +
  • 4:1:1 subsampling - + OCDFMTDEF_SUBSAMPLE_411_YCbCr
    • +
+

Subsample Position (YCbCr)

+

Subsampling can have different equivalent positions relative to the pixels.  +Vertical subsampling positions are consistent, so the following are supported to +control the horizontal subsampling position:

+
    +
  • OCDFMTDEF_SUBSAMPLE_HORZ_ALIGNED - subsamples are aligned with first pixel (e.g. MPEG-2 + spec)
    • +
  • OCDFMTDEF_SUBSAMPLE_HORZ_CENTERED + - subsamples are centered between the pixels (e.g. MPEG-1 + spec)
    • +
+

NOTE:  It is encouraged that users of OCD be generous when handling +subsampling positions.  Allowing misaligned subsampling is preferable to +complete failure.

+

Alpha Components (Alpha)

+

To support applying alpha values to the individual components of other color +spaces, the alpha color space can have more than one alpha value per pixel.  +This field specifies how many:

+
    +
  • OCDFMTDEF_ALPHA_COMPONENTS_1 - pixel contains 1 alpha value (default)
    • +
  • OCDFMTDEF_ALPHA_COMPONENTS_2 + - pixel contains 2 alpha values
    • +
  • OCDFMTDEF_ALPHA_COMPONENTS_3 + - pixel contains 3 alpha values; suitable for RGB + manipulation (e.g. FreeType/ClearType)
    • +
  • OCDFMTDEF_ALPHA_COMPONENTS_4 + -- pixel contains 4 alpha values
    • +
+

Layout (RGB, YCbCr)

+

The layout values, in conjunction with the reversed and left-justified +modifiers, specify how the pixel components are placed into memory.  All +non-RGB/YCbCr formats are packed.

+
    +
  • OCDFMTDEF_PACKED - pixel + components are sequential in memory, defaulting to RGB or CbCr + order, right justified
    • +
  • OCDFMTDEF_DISTRIBUTED - + pixel components that don't fill the container are evenly + distributed within the container (e.g. 32 bits of ARGB in a + 64-bit container is distributed 8 bits every 16 bits: xAxRxGxB)
    • +
  • OCDFMTDEF_2_PLANE_YCbCr - + for subsampled formats only, Y plane is followed by subsampled + interleaved CbCr plane
    • +
  • OCDFMTDEF_3_PLANE_STACKED - + pixel components are divided into planes that are sequential in + memory
    • +
  • + OCDFMTDEF_3_PLANE_SIDE_BY_SIDE_YCbCr - for subsampled + formats only pixel components are divided into planes, with the + non-subsampled component followed by the subsampled components + stored side-by-side (lines interleaved)
    • +
+

Reversed (RGB, YCbCr)

+

OCDFMTDEF_REVERSED indicates that the order +of the color components is the opposite of the defaults.  For RGB formats, +this means BGR.  For YCbCr formats, this means CrCb.

+

Left-Justified (RGB, YCbCr)

+

OCDFMTDEF_LEFT_JUSTIFIED indicates that the +color components are shifted to the left, as opposed to the default of shifting +to the right.

+

Some examples for OCDFMTDEF_REVERSED and +OCDFMTDEF_LEFT_JUSTIFIED:

+
    +
  • Packed RGB:  x,R,G,B is the default byte order
      +
    • x,B,G,R is the format if + OCDFMTDEF_REVERSED + is set
      • +
    • R,G,B,x is the format if + + OCDFMTDEF_LEFT_JUSTIFIED is set
      • +
    • B,G,R,x is the format if + OCDFMTDEF_REVERSED + and + OCDFMTDEF_LEFT_JUSTIFIED are set
      • +
    +
    • +
  • Packed YCbCr 4:2:2:  U,Y,V,Y is the default byte order
      +
    • V,Y,U,Y is the format if + OCDFMTDEF_REVERSED + is set
      • +
    • Y,U,Y,V is the format if + + OCDFMTDEF_LEFT_JUSTIFIED is set
      • +
    • Y,V,Y,U is the format if + OCDFMTDEF_REVERSED + and + OCDFMTDEF_LEFT_JUSTIFIED are set
      • +
    +
    • +
  • 3-Plane YCbCr 4:2:2 or 4:2:0:  The default is the Y + plane, followed by the Cb plane and then the Cr plane.  The + Cb and Cr planes have half of the stride of the Y plane.
      +
    • If + OCDFMTDEF_REVERSED is set, the Cb and Cr + planes are reversed.
      • +
    • + OCDFMTDEF_LEFT_JUSTIFIED has a special + case for this layout.  When set, it + indicates that the Cb and Cr planes have the + same stride as the Y plane, and the Cb and Cr + data is shifted to the left.
      • +
    • If both + OCDFMTDEF_LEFT_REVERSED and + + OCDFMTDEF_LEFT_JUSTIFIED are set, the Cb + and Cr planes are reversed and double width.
      • +
    +
    • +
  • 2-Plane YCbCr 4:2:2 or 4:2:0:  The default is the Y + plane, followed by the CbCr interleaved plane, with the same + stride as the Y plane.
      +
    • OCDFMTDEF_REVERSED + swaps the Cb and Cr components.
      • +
    +
    • +
+

Container (All)

+

The container field indicates the total size of all the bits of the color +components of a color format.  This does not include the alpha component, +if it is present.

+
    +
  • OCDFMTDEF_CONTAINER_8BIT - + Indicates the container is 8 bits.  When the pixel + component size is 4 bits or less, multiple pixels are stored in + the container.
    • +
  • OCDFMTDEF_CONTAINER_16BIT - + Indicates the container is 16 bits.  When the pixel + component size is less than 16 bits, the remaining bits are + available to be used as an alpha channel.
    • +
  • OCDFMTDEF_CONTAINER_24BIT - + Indicates the container is 24 bits.  When the pixel + component size is less than 24 bits, the remaining bits are + available to be used as an alpha channel.
    • +
  • OCDFMTDEF_CONTAINER_32BIT - + Indicates the container is 32 bits.  When the pixel + component size is less than 32 bits, the remaining bits are + available to be used as an alpha channel.
    • +
  • OCDFMTDEF_CONTAINER_48BIT - + Indicates the container is 48 bits.  When the pixel + component size is less than 48 bits, the remaining bits are + available to be used as an alpha channel.
    • +
  • OCDFMTDEF_CONTAINER_64BIT - + Indicates the container is 64 bits.  When the pixel + component size is less than 64 bits, the remaining bits are + available to be used as an alpha channel.
    • +
+

Component Size (All)

+

The component size field specifies the total number of bits in the color +components, not including the alpha component.  (It is specified in the +code with one subtracted.)

+

NOTE:  The alpha only color space uses this to specify the total number +of alpha bits.

+ + + diff --git a/bltsville/ocd/ocdlogo.jpg b/bltsville/ocd/ocdlogo.jpg new file mode 100755 index 0000000..0537386 Binary files /dev/null and b/bltsville/ocd/ocdlogo.jpg differ diff --git a/bltsville/ticpu/Android.mk b/bltsville/ticpu/Android.mk new file mode 100755 index 0000000..1b855c8 --- /dev/null +++ b/bltsville/ticpu/Android.mk @@ -0,0 +1,53 @@ +# +# Copyright (C) 2011 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +LOCAL_PATH := $(call my-dir) + +#Copying libbltsville_ticpu.BV_CPUVERSION.so +include $(CLEAR_VARS) +BV_CPUVERSION :=$(shell ls $(COMMON_PATH)/bltsville/ticpu/lib/android/libbltsville_*.*.so|\ + sed 's/device\/samsung\/omap4-common\/bltsville\/ticpu\/lib\/android\/libbltsville_ticpu.//') +LOCAL_MODULE_TAGS := optional +LOCAL_MODULE_CLASS := SHARED_LIBRARIES +LOCAL_MODULE := libbltsville_ticpu.$(BV_CPUVERSION) +LOCAL_SRC_FILES := lib/android/libbltsville_ticpu.$(BV_CPUVERSION) +LOCAL_MODULE_PATH:= $(TARGET_OUT_VENDOR)/lib +include $(BUILD_PREBUILT) + +#Creating SymLinks +#libbltsville_ticpu.so -> libbltsville_ticpu.BV_CPUVERSION.so +#libbltsville_cpu.so -> libbltsville_ticpu.so +SYMLINKS := $(TARGET_OUT_VENDOR)/lib/libbltsville_ticpu.so +$(SYMLINKS): TICPU_BINARY := ./libbltsville_ticpu.$(BV_CPUVERSION) +$(SYMLINKS): $(LOCAL_INSTALLED_MODULE) $(LOCAL_PATH)/Android.mk + @echo "Symlink: $@ -> $(TICPU_BINARY)" + @mkdir -p $(dir $@) + @rm -rf $@ + $(hide) ln -fs $(TICPU_BINARY) $@ + @cp -afr $(COMMON_PATH)/bltsville/ticpu/lib/android/libbltsville_ticpu_license.txt $(TARGET_OUT_VENDOR)/lib +ALL_DEFAULT_INSTALLED_MODULES += $(SYMLINKS) + +SYMLINKS1 := $(TARGET_OUT_VENDOR)/lib/libbltsville_cpu.so +$(SYMLINKS1): LINK_BINARY := ./libbltsville_ticpu.so +$(SYMLINKS1): $(LOCAL_INSTALLED_MODULE) $(LOCAL_PATH)/Android.mk + @echo "Symlink: $@ -> $(LINK_BINARY)" + @mkdir -p $(dir $@) + @rm -rf $@ + $(hide) ln -fs $(LINK_BINARY) $@ +ALL_DEFAULT_INSTALLED_MODULES += $(SYMLINKS1) + +# for mm +all_modules: $(SYMLINKS) $(SYMLINKS1) diff --git a/bltsville/ticpu/doc/android/BLTsville-Android-Release-Notes.html b/bltsville/ticpu/doc/android/BLTsville-Android-Release-Notes.html new file mode 100755 index 0000000..21461b9 --- /dev/null +++ b/bltsville/ticpu/doc/android/BLTsville-Android-Release-Notes.html @@ -0,0 +1,15129 @@ + + + + + + + + +Welcome to BLTsville + + + +BLTsville for Android +

+ CPU Implementation - Version 2.1.0.0 +

+
+

+ Copyright © 2012 Texas Instruments, Inc. +

+

+ By using this software you agree that you have read, understood, and agree to be bound by the terms in the accompanying + license file, and to comply with all applicable laws and regulations regarding use of this software.  If you do not agree to these terms, you do not have permission to use this software. +

+
+

+ What is BLTsville? +

+

+ BLTsville is an open, non-implementation specific API for performing 2-D operations.  It can control software and hardware implementations alike.  Details are at + http://bltsville.github.com. +

+
+

+ What is this? +

+

+ This is a CPU-based implementation which uses optimized ARM and Neon code to perform the 2-D operations.  It can be distributed for use any Texas Instruments device.  See the license file for details. +

+
+

+ Known issues: +

+ + + + +
+
    +
  • Blend types BVBLEND_SRC1 and BVBLEND_SRC2 are functionally equivalent to ROPs of 0xCCCC and 0xF0F0, respectively.  But these two ways of specifying the same operation currently take two different code paths, so:
    • +
+
    +
  1. When a conversion is supported by both paths, the performance of them will differ.  In general, the ROP path will be faster.
    2. +
  2. When a conversion is not supported in the ROP path, it may be supported in the blend path.
    3. +
  3. When a conversion is supported in the blend path, it may not be supported in the ROP path.
    4. +
+
+

+ Bugfixes/Additions: +

+ + + + +
+

+ 2.1.0.0

+
    +
  • Updated headers to 2.1.0.0 (forwards and backwards compatible with clients).
    • +
  • Changed test for surface equality to use bvbuffdesc and + bvsurfgeom pointers (as per spec) instead of members.
    • +
  • Corrected inconsistent initial scaling phase when clipping.
    • +
  • Added error returns for rectangles in subsampled surfaces that split subsamples.
    • +
  • Corrected incorrect validation during scaling which could return error for properly clipped rectangles.
    • +
  • Loosened validation of bvbuffmap structures in + bvbuffdesc.map to avoid other implementation errors causing problems.
    • +
  • Improved errdesc messages to help with debugging.
    • +
  • Corrected color component error when using an RGBx24 solid color with a blend.
    • +
+

+ 2.0.0.10

+
    +
  • Fixed segfault when doing vertical scaling, but not horizontal.
    • +
+

+ 2.0.0.9

+
    +
  • Improved structure validation checks.
    • +
  • Fixed two issues that could cause access of bvbltparams members associated with unused surfaces.
    • +
  • Added validation of dithermode when doing fills (dithering not currently supported for fills).
    • +
  • Added support for BVDITHER_GOOD_ON, BVDITHER_BETTER_ON, and BVDITHER_BEST_ON.
    • +
  • Fixed issue with rotated surfaces and fills.
    • +
  • Added 4 new conversions:
      +
    • RGBx24 to UYVY
      • +
    • UYVY to RGBx24
      • +
    • NV12 to RGBx24
      • +
    • NV12 to BGRx24
      • +
    +
    • +
  • Added scaled RGBA24 SRC1OVER blend into RGB16 (source2 and destination must be the same).
    • +
  • Added scaled RGBA24 SRC1OVER blend into RGB16 with dithering (source2 and destination must be the same).
    • +
  • Changed method of non-interpolated upscaling for better pixel distribution.
    • +
  • Fixed incorrect color in RGBx24 to RGB16 dithering for images without a multiple of 8 width.
    • +
+

+ 2.0.0.8

+
    +
  • Fixed occasional failure to initialize that caused return of BVERR_RSRC.
    • +
+

+ 2.0.0.7

+
    +
  • Fixed typedef of bv_unmap member of bvbuffmap structure (bvinternal.h issue).
    • +
  • Fixed access-after-free bug in bv_unmap().
    • +
  • Changed method of handling over-read on last source line during scaling.
    • +
+

+ 2.0.0.6

+
    +
  • Added more dither validation.
    • +
  • Extended non-interpolated scaling to all supported 32-bit formats.
    • +
  • Added ordered 2x2/4x4 dither for RGBx24 to RGB16.
    • +
  • Fixed issue with NV12 rectangle offset that caused incorrect colors on right edge of images.
    • +
  • Added support for ALPHA8 as mask (instead of MONO8).
    • +
+

+ 2.0.0.5

+
    +
  • Fix for clipping regression of negative coordinates and clips result in NULL rectangles.
    • +
  • Fixed YUV to RGB conversion overflow if the YUV is out of (ITU-R Bt.601) range.
    • +
  • Fixed scaling and dithering for multi-threaded clients.
    • +
+

+ 2.0.0.4 +

+
    +
  • Fix for clipping of scaled images.
    • +
  • Fix for random alpha value when converting from RGB16 to RGB124.
    • +
  • Fix for incorrect alpha used for right edge of scaled blend of RGBA24 to RGB124.
    • +
  • Fix for occasionally incorrect blend in scaled blend of RGBA24 to RGB124.
    • +
  • Fix to recognize global alpha supplied with SRC1 blend and return unsupported error.
    • +
+

+ 2.0.0.3 +

+
    +
  • Fixed YV12 to NV12 bug which used wrong dimensions for source U and V planes.
    • +
  • Fixed clipping for blends.
    • +
  • Speed improvement for non-interpolated scale of RGB16 to RGB124.
    • +
  • Added SRC1OVER blend of non-interpolated scaled RGBA24 source 1 into RGBA24 or RGB124 destination (source 2 == destination).
    • +
  • Fixed error clipping images scaled vertically but not horizontally.
    • +
  • Added debug output (from errors) to logcat.
    • +
+

+ 2.0.0.2 +

+
    +
  • Clipping added for all supported ROP operations +
      +
    • Solid Fill
      • +
    • Copy/Conversion
      • +
    • Rotation
      • +
    +
    • +
  • Fix for UYVY/VYUY 180° rotation
    • +
  • Fix for rotation normalization (calculating difference between surface orientations)
    • +
  • Removed double-rotation in some cases
    • +
  • Added check for NULL and inverted rectangles
    • +
  • 8 new NV12 operations: +
      +
    • NV12 to RGB24
      • +
    • NV12 to BGR24
      • +
    • RGB16 to NV12
      • +
    • BGR16 to NV12
      • +
    • RGB24 to NV12
      • +
    • BGR24 to NV12
      • +
    • RGBx24 to NV12
      • +
    • BGRx24 to NV12
      • +
    +
    • +
+

+ 2.0.0.1 +

+
    +
  • Fixed bad calculations when clipping.
    • +
  • Fixed clipping of negative rectangles when scaling.
    • +
  • Added rejection of scaled/clipped rectangles outside of surfaces.
    • +
  • Fixed error blending when local and global alphas are both used.
    • +
+

+ 2.0.0.0 +

+

+ Initial release +

+
+

+ Contents: +

+ + + + + + + + + + + + + +
+ .../lib/android/libbltsville_cpu.so + + Client entry point for CPU-based implementations. Softlink to libbltsville_ticpu.so. +
+ .../lib/android/libbltsville_ticpu.so + + Client entry point for special cases.  Softlink to libbltsville_ticpu.2.0.0.10.so.  (Most clients should not use this entry.) +
+ .../lib/android/libbltsville_ticpu.2.0.0.10.so + + Version 2.0.0.10 of the TI BLTsville CPU-based library of 2-D functions for Android.  (Do not directly load this file.) +
+

+ To Install: +

+
    +
  1. + Copy .../lib/android/* to /system/vendor/lib on the target device.
    2. +
+
+ NOTE: Two of the files are symbolic links, which require care when copying to avoid being replaced with a copy of the target library. +
+
    +
  • + It may be necessary to reconstruct the links on the target platform using:  ln -s <tgt> <lnk> +
    • +
+

+ NOTE: The license file must be installed on the target system with the binaries. +

+

+ Functions supported: +

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ Solid Fill (1x1 Source 1) +
+ Destination +
+ LUT8 + + RGB16 + + BGR24 + + RGB24 + + BGR024 + + RGB024 + + BGR124 + + RGB124 + + BGRA24 + + RGBA24 + + 0BGR24 + + 0RGB24 + + 1BGR24 + + 1RGB24 + + ABGR24 + + ARGB24 + + nBGRA24 + + nRGBA24 + + nABGR24 + + nARGB24 + + UYVY/Y422 + + YUYV/YUY2 + + IYUV/I420 + + NV12 + + YV12 +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +   + +   + +   + +   + +   +
+

+   +

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+ UYVY/Y422 + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+

+   +

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ Non-Interpolated Scale (Nearest Neighbor) + Blend: SRC1OVER
+ (uses only Source 1 and Source 2/Destination alphas, if present) +
+ Source 1 + + Source 2 + + Destination +
+   + +   + + RGB16 + RGB124 + + RGBA24 +
+ RGBA24 +
+ RGB16 + +*,** +   +  
+ RGBx24 + +   + +* + +   +
+ RGBA24 + +   +   + + +* +
+

+ * Source 2 and Destination must be the same surface (and have the same geometry) and share the same rectangle.
+ ** With and without ordered dither.

+ + \ No newline at end of file diff --git a/bltsville/ticpu/doc/android/check.png b/bltsville/ticpu/doc/android/check.png new file mode 100755 index 0000000..5577b45 Binary files /dev/null and b/bltsville/ticpu/doc/android/check.png differ diff --git a/bltsville/ticpu/doc/linux/BLTsville-Linux-Release-Notes.html b/bltsville/ticpu/doc/linux/BLTsville-Linux-Release-Notes.html new file mode 100755 index 0000000..32478ba --- /dev/null +++ b/bltsville/ticpu/doc/linux/BLTsville-Linux-Release-Notes.html @@ -0,0 +1,15127 @@ + + + + + + + + +Welcome to BLTsville + + + +BLTsville for Linux +

+ CPU Implementation - Version 2.1.0.0

+
+

+ Copyright © 2012 Texas Instruments, Inc. +

+

+ By using this software you agree that you have read, understood, and agree to be bound by the terms in the accompanying + license file, and to comply with all applicable laws and regulations regarding use of this software.  If you do not agree to these terms, you do not have permission to use this software. +

+
+

+ What is BLTsville? +

+

+ BLTsville is an open, non-implementation specific API for performing 2-D operations.  It can control software and hardware implementations alike.  Details are at + http://bltsville.github.com. +

+
+

+ What is this? +

+

+ This is a CPU-based implementation which uses optimized ARM and Neon code to perform the 2-D operations.  It can be distributed for use any Texas Instruments device.  See the license file for details. +

+
+

+ Known issues: +

+ + + + +
+
    +
  • Blend types BVBLEND_SRC1 and BVBLEND_SRC2 are functionally equivalent to ROPs of 0xCCCC and 0xF0F0, respectively.  But these two ways of specifying the same operation currently take two different code paths, so:
    • +
+
    +
  1. When a conversion is supported by both paths, the performance of them will differ.  In general, the ROP path will be faster.
    2. +
  2. When a conversion is not supported in the ROP path, it may be supported in the blend path.
    3. +
  3. When a conversion is supported in the blend path, it may not be supported in the ROP path.
    4. +
+
+

+ Bugfixes/Additions: +

+ + + + +
+

+ 2.1.0.0

+
    +
  • Updated headers to 2.1.0.0 (forwards and backwards compatible with clients).
    • +
  • Changed test for surface equality to use bvbuffdesc and + bvsurfgeom pointers (as per spec) instead of members.
    • +
  • Corrected inconsistent initial scaling phase when clipping.
    • +
  • Added error returns for rectangles in subsampled surfaces that split subsamples.
    • +
  • Corrected incorrect validation during scaling which could return error for properly clipped rectangles.
    • +
  • Loosened validation of bvbuffmap structures in + bvbuffdesc.map to avoid other implementation errors causing problems.
    • +
  • Improved errdesc messages to help with debugging.
    • +
  • Corrected color component error when using an RGBx24 solid color with a blend.
    • +
+

+ 2.0.0.10

+
    +
  • Fixed segfault when doing vertical scaling, but not horizontal.
    • +
+

+ 2.0.0.9

+
    +
  • Improved structure validation checks.
    • +
  • Fixed two issues that could cause access of bvbltparams members associated with unused surfaces.
    • +
  • Added validation of dithermode when doing fills (dithering not currently supported for fills).
    • +
  • Added support for BVDITHER_GOOD_ON, BVDITHER_BETTER_ON, and BVDITHER_BEST_ON.
    • +
  • Fixed issue with rotated surfaces and fills.
    • +
  • Added 4 new conversions:
      +
    • RGBx24 to UYVY
      • +
    • UYVY to RGBx24
      • +
    • NV12 to RGBx24
      • +
    • NV12 to BGRx24
      • +
    +
    • +
  • Added scaled RGBA24 SRC1OVER blend into RGB16 (source2 and destination must be the same).
    • +
  • Added scaled RGBA24 SRC1OVER blend into RGB16 with dithering (source2 and destination must be the same).
    • +
  • Changed method of non-interpolated upscaling for better pixel distribution.
    • +
  • Fixed incorrect color in RGBx24 to RGB16 dithering for images without a multiple of 8 width.
    • +
+

+ 2.0.0.8

+
    +
  • Fixed occasional failure to initialize that caused return of BVERR_RSRC.
    • +
+

+ 2.0.0.7

+
    +
  • Fixed typedef of bv_unmap member of bvbuffmap structure (bvinternal.h issue).
    • +
  • Fixed access-after-free bug in bv_unmap().
    • +
  • Changed method of handling over-read on last source line during scaling.
    • +
+

+ 2.0.0.6

+
    +
  • Added more dither validation.
    • +
  • Extended non-interpolated scaling to all supported 32-bit formats.
    • +
  • Added ordered 2x2/4x4 dither for RGBx24 to RGB16.
    • +
  • Fixed issue with NV12 rectangle offset that caused incorrect colors on right edge of images.
    • +
  • Added support for ALPHA8 as mask (instead of MONO8).
    • +
+

+ 2.0.0.5

+
    +
  • Fix for clipping regression of negative coordinates and clips result in NULL rectangles.
    • +
  • Fixed YUV to RGB conversion overflow if the YUV is out of (ITU-R Bt.601) range.
    • +
  • Fixed scaling and dithering for multi-threaded clients.
    • +
+

+ 2.0.0.4 +

+
    +
  • Fix for clipping of scaled images.
    • +
  • Fix for random alpha value when converting from RGB16 to RGB124.
    • +
  • Fix for incorrect alpha used for right edge of scaled blend of RGBA24 to RGB124.
    • +
  • Fix for occasionally incorrect blend in scaled blend of RGBA24 to RGB124.
    • +
  • Fix to recognize global alpha supplied with SRC1 blend and return unsupported error.
    • +
+

+ 2.0.0.3 +

+
    +
  • Fixed YV12 to NV12 bug which used wrong dimensions for source U and V planes.
    • +
  • Fixed clipping for blends.
    • +
  • Speed improvement for non-interpolated scale of RGB16 to RGB124.
    • +
  • Added SRC1OVER blend of non-interpolated scaled RGBA24 source 1 into RGBA24 or RGB124 destination (source 2 == destination).
    • +
  • Fixed error clipping images scaled vertically but not horizontally.
    • +
+

+ 2.0.0.2 +

+
    +
  • Clipping added for all supported ROP operations +
      +
    • Solid Fill
      • +
    • Copy/Conversion
      • +
    • Rotation
      • +
    +
    • +
  • Fix for UYVY/VYUY 180° rotation
    • +
  • Fix for rotation normalization (calculating difference between surface orientations)
    • +
  • Removed double-rotation in some cases
    • +
  • Added check for NULL and inverted rectangles
    • +
  • 8 new NV12 operations: +
      +
    • NV12 to RGB24
      • +
    • NV12 to BGR24
      • +
    • RGB16 to NV12
      • +
    • BGR16 to NV12
      • +
    • RGB24 to NV12
      • +
    • BGR24 to NV12
      • +
    • RGBx24 to NV12
      • +
    • BGRx24 to NV12
      • +
    +
    • +
+

+ 2.0.0.1 +

+
    +
  • Fixed bad calculations when clipping.
    • +
  • Fixed clipping of negative rectangles when scaling.
    • +
  • Added rejection of scaled/clipped rectangles outside of surfaces.
    • +
  • Fixed error blending when local and global alphas are both used.
    • +
+

+ 2.0.0.0 +

+

+ Initial release +

+
+

+ Contents: +

+ + + + + + + + + + + + + +
+ .../lib/linux/libbltsville_cpu.so + + Client entry point for CPU-based implementations. Softlink to libbltsville_ticpu.so. +
+ .../lib/linux/libbltsville_ticpu.so + + Client entry point for special cases.  Softlink to libbltsville_ticpu.so.2.0.0.10.  (Most clients should not use this entry.) +
+ .../lib/linux/libbltsville_ticpu.so.2.0.0.10 + + Version 2.0.0.10 of the TI BLTsville CPU-based library of 2-D functions for Linux.  (Do not directly load this file.) +
+

+ To Install: +

+
    +
  1. + Copy .../lib/linux/* to /lib on the target device.
    2. +
+
+ NOTE: Two of the files are symbolic links, which require care when copying to avoid being replaced with a copy of the target library. +
+
    +
  • + It may be necessary to reconstruct the links on the target platform using:  ln -s <tgt> <lnk> +
    • +
+

+ NOTE: The license file must be installed on the target system with the binaries. +

+

+ Functions supported: +

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ Solid Fill (1x1 Source 1) +
+ Destination +
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+ * = Rotation has width/height limitations.. See the chart below +

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+ Rotation Limitations +
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+ 90 Degrees + + Multiple of 4 x 8  + + Multiple of 8 x 8 + + Multiple of 2 x 8 + + Multiple of 2 x 8 + + Multiple of 8 x 16 + + Multiple of 16 x 16 +
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+ 270 Degrees + + Multiple of 4 x 8 + + Multiple of 8 x 8 + + Multiple of 2 x 8 + + Multiple of 2 x 8 + + Multiple of 8 x 16 + + Multiple of 16 x 16 +
+

+ (Rotation does not support scaling.) +

+

+   +

+

+ (Blends do not support clipping or scaling.)
+ (Source 1 or Source 2 can be a 1x1 rectangle for solid color.)
+ (Color space conversion is performed as indicated.) +

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+ ** With and without ordered dither.

+ + \ No newline at end of file diff --git a/bltsville/ticpu/doc/linux/check.png b/bltsville/ticpu/doc/linux/check.png new file mode 100755 index 0000000..5577b45 Binary files /dev/null and b/bltsville/ticpu/doc/linux/check.png differ diff --git a/bltsville/ticpu/lib/android/libbltsville_cpu.so b/bltsville/ticpu/lib/android/libbltsville_cpu.so new file mode 120000 index 0000000..bd98087 --- /dev/null +++ b/bltsville/ticpu/lib/android/libbltsville_cpu.so @@ -0,0 +1 @@ +./libbltsville_ticpu.so \ No newline at end of file diff --git a/bltsville/ticpu/lib/android/libbltsville_ticpu.2.1.0.0.so b/bltsville/ticpu/lib/android/libbltsville_ticpu.2.1.0.0.so new file mode 100755 index 0000000..00ca919 Binary files /dev/null and b/bltsville/ticpu/lib/android/libbltsville_ticpu.2.1.0.0.so differ diff --git a/bltsville/ticpu/lib/android/libbltsville_ticpu.so b/bltsville/ticpu/lib/android/libbltsville_ticpu.so new file mode 120000 index 0000000..7a8974c --- /dev/null +++ b/bltsville/ticpu/lib/android/libbltsville_ticpu.so @@ -0,0 +1 @@ +./libbltsville_ticpu.2.1.0.0.so \ No newline at end of file diff --git a/bltsville/ticpu/lib/android/libbltsville_ticpu_license.txt b/bltsville/ticpu/lib/android/libbltsville_ticpu_license.txt new file mode 100755 index 0000000..a96c003 --- /dev/null +++ b/bltsville/ticpu/lib/android/libbltsville_ticpu_license.txt @@ -0,0 +1,172 @@ +Texas Instruments Incorporated +Technology and Software Publicly Available +Software License Agreement + +Copyright (c) 2012 Texas Instruments Incorporated + +Important: Please read the following license agreement carefully. This +is a legally binding agreement. Do not use or redistribute the Licensed +Materials unless: (1) you are authorized to accept and agree to the terms +of this software license agreement and (2) you intend to enter into and to +be bound by the terms of this agreement. + +This Software License Agreement ("License") is a legal agreement between you +(either an individual or entity) and Texas Instruments Incorporated ("TI"), +12500 TI Boulevard, Dallas, Texas 75243. The "Licensed Materials" subject +to this License include, in whole or in part, the software programs that +accompany this License. By installing, copying or otherwise using the +Licensed Materials you agree to abide by the terms of this License. If you +choose not to accept or agree with these terms, you must immediately cease +any use, copying or redistribution and destroy the Licensed Materials. + +NOTE: The Licensed Materials may be bundled with open source software and +separate license terms may apply. For clarification, this License does not +license, limit your rights under, nor does it grant you rights that +supersede, the license terms of any applicable open source license agreement. + +1. Object Code License. TI hereby grants to you a limited, non-exclusive +license to reproduce and use the Licensed Materials provided to you in object +code format and to distribute an unlimited number of object or executable +copies of such Licensed Materials provided that Licensed Materials are used +solely and exclusively on devices manufactured by or for TI. Redistributions +must reproduce the copyright notices and all the terms of this License in the +documentation and/or other materials provided with the Licensed Materials. +Licensed Materials may not be distributed under terms different than this +License. + +2. Termination. This license is effective until terminated. Without +prejudice to any other rights, TI may terminate your right to use the +Licensed Materials under this License if you fail to comply with the terms +of this License. In such event, you shall destroy all copies of the Licensed +Materials, including all portions and derivatives thereof. + +3. Intellectual Property Rights. + +a. The Licensed Materials being provided to you hereunder are being made +publicly available by TI, even though they contain copyrighted material of TI +and its licensors, if applicable. In no event may you alter, remove or +destroy any copyright notice included in the Licensed Materials. To the +extent that any of the Licensed Materials are provided in binary or object +code only, you may not unlock, decompile, reverse engineer, disassemble or +otherwise translate such binary or object code to human-perceivable form. +The source code of such reverse engineered code may contain TI trade secret +and other proprietary information. Further, nothing shall obligate TI to +provide you with source code for the Licensed Materials licensed to you in +binary or object code only under this License. TI reserves all rights not +specifically granted under this License. + +b. Certain Licensed Materials may +(i) require patent licenses from third parties claiming patent rights +covering implementation of the Licensed Materials or +(ii) be based on industry recognized standards or software programs +published by industry recognized standards bodies and certain third parties +may claim to own patents or copyrights that cover implementation of those +standards. You acknowledge and agree that this License does not convey a +license to any such third party patents and copyrights. + +c. YOU ACKNOWLEDGE AND AGREE THAT TI SHALL NOT BE LIABLE FOR AND SHALL NOT +DEFEND OR INDEMNIFY YOU AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT +RELATES TO OR IS BASED ON YOUR MANUFACTURE, USE, OR DISTRIBUTION OF THE +LICENSED MATERIALS OR YOUR MANUFACTURE, USE, OFFER FOR SALE, SALE, +IMPORTATION OR DISTRIBUTION OF YOUR PRODUCTS THAT INCLUDE OR INCORPORATE +THE LICENSED MATERIALS. + +d. You acknowledge and agree that you are responsible for any fees or +royalties that may be payable to any third party based on such third party's +interests in the Licensed Materials described in Section 3(b) above (the +"Third Party Payment Obligations"). You agree to indemnify TI against any +Third Party Payment Obligations and will defend any claim, suit or +proceeding brought against TI insofar as such claim, suit or proceeding is +based on your failure to pay any Third Party Payment Obligations. + +4. Warranties and Limitations. THE LICENSED MATERIALS ARE PROVIDED "AS IS". +TI AND ITS LICENSORS MAKE NO WARRANTY OR REPRESENTATION, EXPRESS, IMPLIED +OR STATUTORY, INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTIBILITY, FITNESS +FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS OF +RESPONSES, RESULTS AND LACK OF NEGLIGENCE. TI DISCLAIMS ANY WARRANTY OF +TITLE, QUIET ENJOYMENT, QUIET POSESSION, AND NON-INFRINGEMENT OF ANY THIRD +PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE LICENSED MATERIALS OR +USE OF THOSE MATERIALS. + +YOU ACKNOWLEDGE AND AGREE THAT THE LICENSED MATERIALS MAY NOT BE INTENDED FOR +PRODUCTION APPLICATIONS AND MAY CONTAIN IRREGULARITIES AND DEFECTS NOT FOUND +IN PRODUCTION SOFTWARE. FURTHERMORE, YOU ACKNOWLEDGE AND AGREE THAT THE +LICENSED MATERIALS HAVE NOT BEEN TESTED OR CERTIFIED BY ANY GOVERNMENT AGENCY +OR INDUSTRY REGULATORY ORGANIZATION OR ANY OTHER THIRD PARTY ORGANIZATION. +YOU AGREE THAT PRIOR TO USING, INCORPORATING OR DISTRIBUTING THE LICENSED +MATERIALS IN OR WITH ANY COMMERCIAL PRODUCT THAT YOU WILL THOROUGHLY TEST THE +PRODUCT AND THE FUNCTIONALITY OF THE LICENSED MATERIALS IN OR WITH THAT +PRODUCT AND BE SOLELY RESPONSIBLE FOR ANY PROBLEMS OR FAILURES. + +IN NO EVENT SHALL TI OR ITS LICENSORS BE LIABLE FOR ANY SPECIAL, INDIRECT, +INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED ON ANY THEORY OF +LIABILITY, ARISING IN ANY WAY OUT OF THIS LICENSE, OR YOUR USE OF THE +LICENSED MATERIALS, WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF +SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF +REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OR +CORRUPTION OF DATA, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR +LOSS OF USE OR INTERRUPTION OF BUSINESS OR ANY OTHER ECONOMIC LOSS. IN NO +EVENT WILL TI'S AGGREGATE LIABILITY UNDER THIS LICENSE OR ARISING OUT OF YOUR +USE OF THE LICENSED MATERIALS EXCEED FIVE HUNDRED U.S. DOLLARS (US$500). + +Because some jurisdictions do not allow the exclusion or limitation of +incidental or consequential damages or limitation on how long an implied +warranty lasts, the above limitations or exclusions may not apply to you. + +5. Export Control. The software programs and any on-line documentation as +well as any updates or upgrades to such software programs or documentation may +be subject to the export or import regulations of certain countries. You agree +to comply with all such regulations and acknowledge that you have the +responsibility to obtain any licenses or other authorizations that may be +required to export, re-export or import the Licensed Materials. + +6. Governing Law, Jurisdiction and Severability. This License will be +governed by and interpreted in accordance with the laws of the State of +Texas, without reference to that state's conflict of laws principles. This +License shall not be governed by the United Nations Convention on Contracts +for the International Sale of Goods, nor shall it be governed by the Uniform +Computer Information Transactions Act (UCITA). Any dispute arising out of or +related to this License will be brought in, and each party consents to the +exclusive jurisdiction and venue in the state and federal courts sitting in +Dallas Country, Texas. Each party waives all defenses of lack of personal +jurisdiction and forum non-conveniens and agrees that process may be served on +either party in a manner authorized by applicable law or court rule. If for +any reason a court of competent jurisdiction finds any provision of the +License to be unenforceable, that provision will be enforced to the maximum +extent possible to effectuate the intent of the parties and the remainder +of the License shall continue in full force and effect. + +7. PRC Provisions. If you are located in the People's Republic of China +("PRC") or if the Licensed Materials will be sent to the PRC, the following +provisions shall apply and shall supersede any other provisions in this +License concerning the same subject matter as the following provisions: + + a. Registration Requirements. You shall be solely responsible for performing + all acts and obtaining all approvals that may be required in connection with + this License by the government of the PRC, including but not limited to + registering pursuant to, and otherwise complying with, the PRC Measures on + the Administration of Software Products, Management Regulations on Technology + Import-Export, and Technology Import and Export Contract Registration + Management Rules. Upon receipt of such approvals from the government + authorities, you shall forward evidence of all such approvals to TI for its + records. In the event that you fail to obtain any such approval or + registration, you shall be solely responsible for any and all losses, damages + or costs resulting therefrom, and shall indemnify TI for all such losses, + damages or costs. + + b. Governing Language. This License is written and executed in the English + language. If a translation of this License is required for any purpose, + including but not limited to registration of the License pursuant to any + governmental laws, regulations or rules, you shall be solely responsible for + creating such translation. Any translation of this License into a language + other than English is intended solely in order to comply with such laws or + for reference purposes, and the English language version shall be + authoritative and controlling. + +8. Entire Agreement. This License is the entire agreement between you and TI +and supersedes any prior agreement between the parties related to the subject +matter of this License. No amendment or modification of this License will be +effective unless in writing and signed by a duly authorized representative of +TI. You hereby warrant and represent that you have obtained all +authorizations and other applicable consents required empowering you to enter +into this License. diff --git a/bltsville/ticpu/lib/linux/libbltsville_cpu.so b/bltsville/ticpu/lib/linux/libbltsville_cpu.so new file mode 120000 index 0000000..bd98087 --- /dev/null +++ b/bltsville/ticpu/lib/linux/libbltsville_cpu.so @@ -0,0 +1 @@ +./libbltsville_ticpu.so \ No newline at end of file diff --git a/bltsville/ticpu/lib/linux/libbltsville_ticpu.so b/bltsville/ticpu/lib/linux/libbltsville_ticpu.so new file mode 120000 index 0000000..d6f50f9 --- /dev/null +++ b/bltsville/ticpu/lib/linux/libbltsville_ticpu.so @@ -0,0 +1 @@ +./libbltsville_ticpu.so.2.1.0.0 \ No newline at end of file diff --git a/bltsville/ticpu/lib/linux/libbltsville_ticpu.so.2.1.0.0 b/bltsville/ticpu/lib/linux/libbltsville_ticpu.so.2.1.0.0 new file mode 100755 index 0000000..31866f7 Binary files /dev/null and b/bltsville/ticpu/lib/linux/libbltsville_ticpu.so.2.1.0.0 differ diff --git a/bltsville/ticpu/lib/linux/libbltsville_ticpu_license.txt b/bltsville/ticpu/lib/linux/libbltsville_ticpu_license.txt new file mode 100755 index 0000000..a96c003 --- /dev/null +++ b/bltsville/ticpu/lib/linux/libbltsville_ticpu_license.txt @@ -0,0 +1,172 @@ +Texas Instruments Incorporated +Technology and Software Publicly Available +Software License Agreement + +Copyright (c) 2012 Texas Instruments Incorporated + +Important: Please read the following license agreement carefully. This +is a legally binding agreement. Do not use or redistribute the Licensed +Materials unless: (1) you are authorized to accept and agree to the terms +of this software license agreement and (2) you intend to enter into and to +be bound by the terms of this agreement. + +This Software License Agreement ("License") is a legal agreement between you +(either an individual or entity) and Texas Instruments Incorporated ("TI"), +12500 TI Boulevard, Dallas, Texas 75243. The "Licensed Materials" subject +to this License include, in whole or in part, the software programs that +accompany this License. By installing, copying or otherwise using the +Licensed Materials you agree to abide by the terms of this License. If you +choose not to accept or agree with these terms, you must immediately cease +any use, copying or redistribution and destroy the Licensed Materials. + +NOTE: The Licensed Materials may be bundled with open source software and +separate license terms may apply. For clarification, this License does not +license, limit your rights under, nor does it grant you rights that +supersede, the license terms of any applicable open source license agreement. + +1. Object Code License. TI hereby grants to you a limited, non-exclusive +license to reproduce and use the Licensed Materials provided to you in object +code format and to distribute an unlimited number of object or executable +copies of such Licensed Materials provided that Licensed Materials are used +solely and exclusively on devices manufactured by or for TI. Redistributions +must reproduce the copyright notices and all the terms of this License in the +documentation and/or other materials provided with the Licensed Materials. +Licensed Materials may not be distributed under terms different than this +License. + +2. Termination. This license is effective until terminated. Without +prejudice to any other rights, TI may terminate your right to use the +Licensed Materials under this License if you fail to comply with the terms +of this License. In such event, you shall destroy all copies of the Licensed +Materials, including all portions and derivatives thereof. + +3. Intellectual Property Rights. + +a. The Licensed Materials being provided to you hereunder are being made +publicly available by TI, even though they contain copyrighted material of TI +and its licensors, if applicable. In no event may you alter, remove or +destroy any copyright notice included in the Licensed Materials. To the +extent that any of the Licensed Materials are provided in binary or object +code only, you may not unlock, decompile, reverse engineer, disassemble or +otherwise translate such binary or object code to human-perceivable form. +The source code of such reverse engineered code may contain TI trade secret +and other proprietary information. Further, nothing shall obligate TI to +provide you with source code for the Licensed Materials licensed to you in +binary or object code only under this License. TI reserves all rights not +specifically granted under this License. + +b. Certain Licensed Materials may +(i) require patent licenses from third parties claiming patent rights +covering implementation of the Licensed Materials or +(ii) be based on industry recognized standards or software programs +published by industry recognized standards bodies and certain third parties +may claim to own patents or copyrights that cover implementation of those +standards. You acknowledge and agree that this License does not convey a +license to any such third party patents and copyrights. + +c. YOU ACKNOWLEDGE AND AGREE THAT TI SHALL NOT BE LIABLE FOR AND SHALL NOT +DEFEND OR INDEMNIFY YOU AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT +RELATES TO OR IS BASED ON YOUR MANUFACTURE, USE, OR DISTRIBUTION OF THE +LICENSED MATERIALS OR YOUR MANUFACTURE, USE, OFFER FOR SALE, SALE, +IMPORTATION OR DISTRIBUTION OF YOUR PRODUCTS THAT INCLUDE OR INCORPORATE +THE LICENSED MATERIALS. + +d. You acknowledge and agree that you are responsible for any fees or +royalties that may be payable to any third party based on such third party's +interests in the Licensed Materials described in Section 3(b) above (the +"Third Party Payment Obligations"). You agree to indemnify TI against any +Third Party Payment Obligations and will defend any claim, suit or +proceeding brought against TI insofar as such claim, suit or proceeding is +based on your failure to pay any Third Party Payment Obligations. + +4. Warranties and Limitations. THE LICENSED MATERIALS ARE PROVIDED "AS IS". +TI AND ITS LICENSORS MAKE NO WARRANTY OR REPRESENTATION, EXPRESS, IMPLIED +OR STATUTORY, INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTIBILITY, FITNESS +FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS OF +RESPONSES, RESULTS AND LACK OF NEGLIGENCE. TI DISCLAIMS ANY WARRANTY OF +TITLE, QUIET ENJOYMENT, QUIET POSESSION, AND NON-INFRINGEMENT OF ANY THIRD +PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE LICENSED MATERIALS OR +USE OF THOSE MATERIALS. + +YOU ACKNOWLEDGE AND AGREE THAT THE LICENSED MATERIALS MAY NOT BE INTENDED FOR +PRODUCTION APPLICATIONS AND MAY CONTAIN IRREGULARITIES AND DEFECTS NOT FOUND +IN PRODUCTION SOFTWARE. FURTHERMORE, YOU ACKNOWLEDGE AND AGREE THAT THE +LICENSED MATERIALS HAVE NOT BEEN TESTED OR CERTIFIED BY ANY GOVERNMENT AGENCY +OR INDUSTRY REGULATORY ORGANIZATION OR ANY OTHER THIRD PARTY ORGANIZATION. +YOU AGREE THAT PRIOR TO USING, INCORPORATING OR DISTRIBUTING THE LICENSED +MATERIALS IN OR WITH ANY COMMERCIAL PRODUCT THAT YOU WILL THOROUGHLY TEST THE +PRODUCT AND THE FUNCTIONALITY OF THE LICENSED MATERIALS IN OR WITH THAT +PRODUCT AND BE SOLELY RESPONSIBLE FOR ANY PROBLEMS OR FAILURES. + +IN NO EVENT SHALL TI OR ITS LICENSORS BE LIABLE FOR ANY SPECIAL, INDIRECT, +INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED ON ANY THEORY OF +LIABILITY, ARISING IN ANY WAY OUT OF THIS LICENSE, OR YOUR USE OF THE +LICENSED MATERIALS, WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF +SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF +REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OR +CORRUPTION OF DATA, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR +LOSS OF USE OR INTERRUPTION OF BUSINESS OR ANY OTHER ECONOMIC LOSS. IN NO +EVENT WILL TI'S AGGREGATE LIABILITY UNDER THIS LICENSE OR ARISING OUT OF YOUR +USE OF THE LICENSED MATERIALS EXCEED FIVE HUNDRED U.S. DOLLARS (US$500). + +Because some jurisdictions do not allow the exclusion or limitation of +incidental or consequential damages or limitation on how long an implied +warranty lasts, the above limitations or exclusions may not apply to you. + +5. Export Control. The software programs and any on-line documentation as +well as any updates or upgrades to such software programs or documentation may +be subject to the export or import regulations of certain countries. You agree +to comply with all such regulations and acknowledge that you have the +responsibility to obtain any licenses or other authorizations that may be +required to export, re-export or import the Licensed Materials. + +6. Governing Law, Jurisdiction and Severability. This License will be +governed by and interpreted in accordance with the laws of the State of +Texas, without reference to that state's conflict of laws principles. This +License shall not be governed by the United Nations Convention on Contracts +for the International Sale of Goods, nor shall it be governed by the Uniform +Computer Information Transactions Act (UCITA). Any dispute arising out of or +related to this License will be brought in, and each party consents to the +exclusive jurisdiction and venue in the state and federal courts sitting in +Dallas Country, Texas. Each party waives all defenses of lack of personal +jurisdiction and forum non-conveniens and agrees that process may be served on +either party in a manner authorized by applicable law or court rule. If for +any reason a court of competent jurisdiction finds any provision of the +License to be unenforceable, that provision will be enforced to the maximum +extent possible to effectuate the intent of the parties and the remainder +of the License shall continue in full force and effect. + +7. PRC Provisions. If you are located in the People's Republic of China +("PRC") or if the Licensed Materials will be sent to the PRC, the following +provisions shall apply and shall supersede any other provisions in this +License concerning the same subject matter as the following provisions: + + a. Registration Requirements. You shall be solely responsible for performing + all acts and obtaining all approvals that may be required in connection with + this License by the government of the PRC, including but not limited to + registering pursuant to, and otherwise complying with, the PRC Measures on + the Administration of Software Products, Management Regulations on Technology + Import-Export, and Technology Import and Export Contract Registration + Management Rules. Upon receipt of such approvals from the government + authorities, you shall forward evidence of all such approvals to TI for its + records. In the event that you fail to obtain any such approval or + registration, you shall be solely responsible for any and all losses, damages + or costs resulting therefrom, and shall indemnify TI for all such losses, + damages or costs. + + b. Governing Language. This License is written and executed in the English + language. If a translation of this License is required for any purpose, + including but not limited to registration of the License pursuant to any + governmental laws, regulations or rules, you shall be solely responsible for + creating such translation. Any translation of this License into a language + other than English is intended solely in order to comply with such laws or + for reference purposes, and the English language version shall be + authoritative and controlling. + +8. Entire Agreement. This License is the entire agreement between you and TI +and supersedes any prior agreement between the parties related to the subject +matter of this License. No amendment or modification of this License will be +effective unless in writing and signed by a duly authorized representative of +TI. You hereby warrant and represent that you have obtained all +authorizations and other applicable consents required empowering you to enter +into this License. diff --git a/bltsville/ticpu/license b/bltsville/ticpu/license new file mode 100755 index 0000000..998bb60 --- /dev/null +++ b/bltsville/ticpu/license @@ -0,0 +1,173 @@ +Texas Instruments Incorporated +Technology and Software Publicly Available +Software License Agreement + +Copyright © 2011 Texas Instruments Incorporated +Copyright Imagination Technology, Ltd. + +Important: Please read the following license agreement carefully. This +is a legally binding agreement. Do not use or redistribute the Licensed +Materials unless: (1) you are authorized to accept and agree to the terms +of this software license agreement and (2) you intend to enter into and to +be bound by the terms of this agreement. + +This Software License Agreement ("License") is a legal agreement between you +(either an individual or entity) and Texas Instruments Incorporated ("TI"), +12500 TI Boulevard, Dallas, Texas 75243. The "Licensed Materials" subject +to this License include, in whole or in part, the software programs that +accompany this License. By installing, copying or otherwise using the +Licensed Materials you agree to abide by the terms of this License. If you +choose not to accept or agree with these terms, you must immediately cease +any use, copying or redistribution and destroy the Licensed Materials. + +NOTE: The Licensed Materials may be bundled with open source software and +separate license terms may apply. For clarification, this License does not +license, limit your rights under, nor does it grant you rights that +supersede, the license terms of any applicable open source license agreement. + +1. Object Code License. TI hereby grants to you a limited, non-exclusive +license to reproduce and use the Licensed Materials provided to you in object +code format and to distribute an unlimited number of object or executable +copies of such Licensed Materials provided that Licensed Materials are used +solely and exclusively on devices manufactured by or for TI. Redistributions +must reproduce the copyright notices and all the terms of this License in the +documentation and/or other materials provided with the Licensed Materials. +Licensed Materials may not be distributed under terms different than this +License. + +2. Termination. This license is effective until terminated. Without +prejudice to any other rights, TI may terminate your right to use the +Licensed Materials under this License if you fail to comply with the terms +of this License. In such event, you shall destroy all copies of the Licensed +Materials, including all portions and derivatives thereof. + +3. Intellectual Property Rights. + +a. The Licensed Materials being provided to you hereunder are being made +publicly available by TI, even though they contain copyrighted material of TI +and its licensors, if applicable. In no event may you alter, remove or +destroy any copyright notice included in the Licensed Materials. To the +extent that any of the Licensed Materials are provided in binary or object +code only, you may not unlock, decompile, reverse engineer, disassemble or +otherwise translate such binary or object code to human-perceivable form. +The source code of such reverse engineered code may contain TI trade secret +and other proprietary information. Further, nothing shall obligate TI to +provide you with source code for the Licensed Materials licensed to you in +binary or object code only under this License. TI reserves all rights not +specifically granted under this License. + +b. Certain Licensed Materials may +(i) require patent licenses from third parties claiming patent rights +covering implementation of the Licensed Materials or +(ii) be based on industry recognized standards or software programs +published by industry recognized standards bodies and certain third parties +may claim to own patents or copyrights that cover implementation of those +standards. You acknowledge and agree that this License does not convey a +license to any such third party patents and copyrights. + +c. YOU ACKNOWLEDGE AND AGREE THAT TI SHALL NOT BE LIABLE FOR AND SHALL NOT +DEFEND OR INDEMNIFY YOU AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT +RELATES TO OR IS BASED ON YOUR MANUFACTURE, USE, OR DISTRIBUTION OF THE +LICENSED MATERIALS OR YOUR MANUFACTURE, USE, OFFER FOR SALE, SALE, +IMPORTATION OR DISTRIBUTION OF YOUR PRODUCTS THAT INCLUDE OR INCORPORATE +THE LICENSED MATERIALS. + +d. You acknowledge and agree that you are responsible for any fees or +royalties that may be payable to any third party based on such third party's +interests in the Licensed Materials described in Section 3(b) above (the +"Third Party Payment Obligations"). You agree to indemnify TI against any +Third Party Payment Obligations and will defend any claim, suit or +proceeding brought against TI insofar as such claim, suit or proceeding is +based on your failure to pay any Third Party Payment Obligations. + +4. Warranties and Limitations. THE LICENSED MATERIALS ARE PROVIDED "AS IS". +TI AND ITS LICENSORS MAKE NO WARRANTY OR REPRESENTATION, EXPRESS, IMPLIED +OR STATUTORY, INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTIBILITY, FITNESS +FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS OF +RESPONSES, RESULTS AND LACK OF NEGLIGENCE. TI DISCLAIMS ANY WARRANTY OF +TITLE, QUIET ENJOYMENT, QUIET POSESSION, AND NON-INFRINGEMENT OF ANY THIRD +PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE LICENSED MATERIALS OR +USE OF THOSE MATERIALS. + +YOU ACKNOWLEDGE AND AGREE THAT THE LICENSED MATERIALS MAY NOT BE INTENDED FOR +PRODUCTION APPLICATIONS AND MAY CONTAIN IRREGULARITIES AND DEFECTS NOT FOUND +IN PRODUCTION SOFTWARE. FURTHERMORE, YOU ACKNOWLEDGE AND AGREE THAT THE +LICENSED MATERIALS HAVE NOT BEEN TESTED OR CERTIFIED BY ANY GOVERNMENT AGENCY +OR INDUSTRY REGULATORY ORGANIZATION OR ANY OTHER THIRD PARTY ORGANIZATION. +YOU AGREE THAT PRIOR TO USING, INCORPORATING OR DISTRIBUTING THE LICENSED +MATERIALS IN OR WITH ANY COMMERCIAL PRODUCT THAT YOU WILL THOROUGHLY TEST THE +PRODUCT AND THE FUNCTIONALITY OF THE LICENSED MATERIALS IN OR WITH THAT +PRODUCT AND BE SOLELY RESPONSIBLE FOR ANY PROBLEMS OR FAILURES. + +IN NO EVENT SHALL TI OR ITS LICENSORS BE LIABLE FOR ANY SPECIAL, INDIRECT, +INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED ON ANY THEORY OF +LIABILITY, ARISING IN ANY WAY OUT OF THIS LICENSE, OR YOUR USE OF THE +LICENSED MATERIALS, WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF +SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF +REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OR +CORRUPTION OF DATA, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR +LOSS OF USE OR INTERRUPTION OF BUSINESS OR ANY OTHER ECONOMIC LOSS. IN NO +EVENT WILL TI'S AGGREGATE LIABILITY UNDER THIS LICENSE OR ARISING OUT OF YOUR +USE OF THE LICENSED MATERIALS EXCEED FIVE HUNDRED U.S. DOLLARS (US$500). + +Because some jurisdictions do not allow the exclusion or limitation of +incidental or consequential damages or limitation on how long an implied +warranty lasts, the above limitations or exclusions may not apply to you. + +5. Export Control. The software programs and any on-line documentation as +well as any updates or upgrades to such software programs or documentation may +be subject to the export or import regulations of certain countries. You agree +to comply with all such regulations and acknowledge that you have the +responsibility to obtain any licenses or other authorizations that may be +required to export, re-export or import the Licensed Materials. + +6. Governing Law, Jurisdiction and Severability. This License will be +governed by and interpreted in accordance with the laws of the State of +Texas, without reference to that state's conflict of laws principles. This +License shall not be governed by the United Nations Convention on Contracts +for the International Sale of Goods, nor shall it be governed by the Uniform +Computer Information Transactions Act (UCITA). Any dispute arising out of or +related to this License will be brought in, and each party consents to the +exclusive jurisdiction and venue in the state and federal courts sitting in +Dallas Country, Texas. Each party waives all defenses of lack of personal +jurisdiction and forum non-conveniens and agrees that process may be served on +either party in a manner authorized by applicable law or court rule. If for +any reason a court of competent jurisdiction finds any provision of the +License to be unenforceable, that provision will be enforced to the maximum +extent possible to effectuate the intent of the parties and the remainder +of the License shall continue in full force and effect. + +7. PRC Provisions. If you are located in the People's Republic of China +("PRC") or if the Licensed Materials will be sent to the PRC, the following +provisions shall apply and shall supersede any other provisions in this +License concerning the same subject matter as the following provisions: + + a. Registration Requirements. You shall be solely responsible for performing + all acts and obtaining all approvals that may be required in connection with + this License by the government of the PRC, including but not limited to + registering pursuant to, and otherwise complying with, the PRC Measures on + the Administration of Software Products, Management Regulations on Technology + Import-Export, and Technology Import and Export Contract Registration + Management Rules. Upon receipt of such approvals from the government + authorities, you shall forward evidence of all such approvals to TI for its + records. In the event that you fail to obtain any such approval or + registration, you shall be solely responsible for any and all losses, damages + or costs resulting therefrom, and shall indemnify TI for all such losses, + damages or costs. + + b. Governing Language. This License is written and executed in the English + language. If a translation of this License is required for any purpose, + including but not limited to registration of the License pursuant to any + governmental laws, regulations or rules, you shall be solely responsible for + creating such translation. Any translation of this License into a language + other than English is intended solely in order to comply with such laws or + for reference purposes, and the English language version shall be + authoritative and controlling. + +8. Entire Agreement. This License is the entire agreement between you and TI +and supersedes any prior agreement between the parties related to the subject +matter of this License. No amendment or modification of this License will be +effective unless in writing and signed by a duly authorized representative of +TI. You hereby warrant and represent that you have obtained all +authorizations and other applicable consents required empowering you to enter +into this License. diff --git a/common.mk b/common.mk new file mode 100644 index 0000000..3fe7fe6 --- /dev/null +++ b/common.mk @@ -0,0 +1,56 @@ +# +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +COMMON_PATH := device/samsung/omap4-common + +DEVICE_PACKAGE_OVERLAYS += $(COMMON_PATH)/overlay + +# Omap4 Packages +PRODUCT_PACKAGES += \ + libedid \ + libion_ti \ + libstagefrighthw \ + smc_pa_ctrl \ + tf_daemon + +PRODUCT_PACKAGES += \ + audio.a2dp.default \ + audio.usb.default \ + libtinyalsa \ + libaudioutils \ + libnetcmdiface \ + tinyplay \ + tinycap \ + tinymix + +# Filesystem management tools +PRODUCT_PACKAGES += \ + static_busybox \ + make_ext4fs \ + setup_fs + +PRODUCT_PROPERTY_OVERRIDES += \ + com.ti.omap_enhancement=true \ + omap.enhancement=true \ + +# Set default USB interface +PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \ + persist.sys.usb.config=mtp + +$(call inherit-product, hardware/ti/omap4xxx/omap4.mk) + +# Include non-opensource parts if available +$(call inherit-product-if-exists, vendor/samsung/omap4-common/common-vendor.mk) diff --git a/edid/Android.mk b/edid/Android.mk new file mode 100644 index 0000000..d1bace0 --- /dev/null +++ b/edid/Android.mk @@ -0,0 +1,45 @@ +# Copyright (C) Texas Instruments - http://www.ti.com/ +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# AOSP specific +ifneq ($(TARGET_PRODUCT),full_$(TARGET_BOOTLOADER_BOARD_NAME)) + +LOCAL_PATH:= $(call my-dir) + +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + lib/edid_parser.c + +LOCAL_MODULE_TAGS := optional +LOCAL_MODULE := libedid + +include $(BUILD_SHARED_LIBRARY) + +# ==================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES:= \ + cmd/parse_hdmi_edid.c + +LOCAL_SHARED_LIBRARIES:= \ + libutils \ + libedid + +LOCAL_MODULE:= parse_hdmi_edid +LOCAL_MODULE_TAGS:= optional + +include $(BUILD_EXECUTABLE) + +endif diff --git a/edid/cmd/parse_hdmi_edid.c b/edid/cmd/parse_hdmi_edid.c new file mode 100644 index 0000000..9f84505 --- /dev/null +++ b/edid/cmd/parse_hdmi_edid.c @@ -0,0 +1,154 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include + +#define LOG_TAG "EDID" +#include + +#include + +static const char kHdmiEdidPathName[] = "/sys/devices/platform/omapdss/display1/edid"; + +static void print_s3d_format_info(struct edid_t *edid, const struct hdmi_s3d_format_info_t *info) +{ + unsigned int i; + if(info == NULL) { + return; + } + + switch(info->format) { + case HDMI_FRAME_PACKING: + fprintf(stdout, "--Frame Packing"); + break; + case HDMI_FIELD_ALTERNATIVE: + fprintf(stdout, "--Filed Alternative"); + break; + case HDMI_LINE_ALTERNATIVE: + fprintf(stdout, "--Line Alternative"); + break; + case HDMI_SIDE_BY_SIDE_FULL: + fprintf(stdout, "--Side by Side FULL"); + break; + case HDMI_L_DEPTH: + fprintf(stdout, "--L + Depth"); + break; + case HDMI_L_DEPTH_GFX_GFX_DEPTH: + fprintf(stdout, "--L + Depth + Graphics + Graphics + Depth"); + break; + case HDMI_TOPBOTTOM: + fprintf(stdout, "--Top Bottom"); + break; + case HDMI_SIDE_BY_SIDE_HALF: + fprintf(stdout, "--Side by Side HALF"); + break; + default: + fprintf(stdout, "--Unkown format"); + break; + } + fprintf(stdout, "\n"); + + for (i = 0; i < info->num_valid_vic; i++) { + const struct svd_t * svd = edid_get_svd_descriptor(edid, info->vic_info[i].vic_pos); + fprintf(stdout, "----Mode:%s sub-sampling: ", svd->info.name); + switch(info->vic_info[i].subsampling) { + case HDMI_SS_HORZANDQUINCUNX: + fprintf(stdout, "Horizontal and Quincunx"); + break; + case HDMI_SS_HORIZONTAL: + fprintf(stdout, "Horizontal"); + break; + case HDMI_SS_QUINCUNX_ALL: + fprintf(stdout, "Quincunx"); + break; + case HDMI_SS_QUINCUNX_OLOR: + fprintf(stdout, "Quincunx Odd-Left/Odd-Right"); + break; + case HDMI_SS_QUINCUNX_OLER: + fprintf(stdout, "Quincunx Odd-Left/Even-Right"); + break; + case HDMI_SS_QUINCUNX_ELOR: + fprintf(stdout, "Quincunx Even-Left/Odd-Right"); + break; + case HDMI_SS_QUINCUNX_ELER: + fprintf(stdout, "Quincunx Even-Left/Even-Right"); + break; + case HDMI_SS_VERTICAL: + fprintf(stdout, "Vertical"); + break; + case HDMI_SS_NONE: + fprintf(stdout, "None"); + break; + default: + break; + } + fprintf(stdout, "\n"); + } + +} +int main() +{ + unsigned int i; + struct svd_t *svd_list; + unsigned int num_svds; + + int fd = open(kHdmiEdidPathName, O_RDONLY); + + if (!fd) { + return 1; + } + + uint8_t edid_data[EDID_SIZE]; + size_t bytes_read = read(fd, edid_data, EDID_SIZE); + close(fd); + + if (bytes_read < EDID_SIZE) { + fprintf(stderr, "Could not read EDID data\n"); + return 1; + } + + struct edid_t *edid = NULL; + if(edid_parser_init(&edid, edid_data)) { + fprintf(stderr, "Could not init parser\n"); + return 1; + } + + edid_get_svd_list(edid, &svd_list, &num_svds); + + fprintf(stdout, "EDID Info\n"); + fprintf(stdout, "[Short Video Descriptors]\n"); + for (i = 0; i < num_svds; i++) { + fprintf(stdout, "----%d: %s [code:%d, native:%d] [xres:%d, yres:%d Hz:%d]\n", + i, svd_list[i].info.name, svd_list[i].code, svd_list[i].native, + svd_list[i].info.xres, svd_list[i].info.yres, svd_list[i].info.hz); + } + + fprintf(stdout, "\n[S3D Optional Formats]\n"); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_FRAME_PACKING)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_FIELD_ALTERNATIVE)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_LINE_ALTERNATIVE)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_SIDE_BY_SIDE_FULL)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_L_DEPTH)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_L_DEPTH_GFX_GFX_DEPTH)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_TOPBOTTOM)); + print_s3d_format_info(edid, edid_get_s3d_format_info(edid, HDMI_SIDE_BY_SIDE_HALF)); + + edid_parser_deinit(edid); + + return 0; +} diff --git a/edid/inc/edid_parser.h b/edid/inc/edid_parser.h new file mode 100644 index 0000000..9dba5f4 --- /dev/null +++ b/edid/inc/edid_parser.h @@ -0,0 +1,113 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _EDID_PARSER_ +#define _EDID_PARSER_ + +#define EDID_SIZE 256 +#define MAX_VIC_CODES_PER_3D_FORMAT 16 + +struct edid_t; + +enum datablock_id { + DATABLOCK_AUDIO = 1, + DATABLOCK_VIDEO = 2, + DATABLOCK_VENDOR = 3, + DATABLOCK_SPEAKERS = 4, +}; + +enum hdmi_3d_format { + HDMI_FRAME_PACKING = 0, + HDMI_FIELD_ALTERNATIVE = 1, + HDMI_LINE_ALTERNATIVE = 2, + HDMI_SIDE_BY_SIDE_FULL = 3, + HDMI_L_DEPTH = 4, + HDMI_L_DEPTH_GFX_GFX_DEPTH = 5, + HDMI_TOPBOTTOM = 6, + HDMI_SIDE_BY_SIDE_HALF = 8, +}; + +enum hdmi_3d_format_bits { + HDMI_FRAME_PACKING_BIT = 1 << HDMI_FRAME_PACKING, + HDMI_FIELD_ALTERNATIVE_BIT = 1 << HDMI_FIELD_ALTERNATIVE, + HDMI_LINE_ALTERNATIVE_BIT = 1 << HDMI_LINE_ALTERNATIVE, + HDMI_SIDE_BY_SIDE_FULL_BIT = 1 << HDMI_SIDE_BY_SIDE_FULL, + HDMI_L_DEPTH_BIT = 1 << HDMI_L_DEPTH , + HDMI_L_DEPTH_GFX_GFX_DEPTH_BIT = 1 << HDMI_L_DEPTH_GFX_GFX_DEPTH, + HDMI_TOPBOTTOM_BIT = 1 << HDMI_TOPBOTTOM, + HDMI_SIDE_BY_SIDE_HALF_BIT = 1 << HDMI_SIDE_BY_SIDE_HALF, + HDMI_SIDE_BY_SIDE_HALF_QUINCUNX_BIT = 1 << 15, +}; + +//ALL = both horizontal and quincunx modes are supported +//HDMI_SS_QUINCUNX_ALL = all quincunx subsampling modes are supported +//OL = Odd left viewHorizontal sub +//OR = Odd right view +//ER = Even left view +//EL = Even right view +enum hdmi_3d_subsampling { + HDMI_SS_HORZANDQUINCUNX = 0, + HDMI_SS_HORIZONTAL = 1, + HDMI_SS_QUINCUNX_ALL = 6, + HDMI_SS_QUINCUNX_OLOR = 7, + HDMI_SS_QUINCUNX_OLER = 8, + HDMI_SS_QUINCUNX_ELOR = 9, + HDMI_SS_QUINCUNX_ELER = 10, + HDMI_SS_VERTICAL = 0xF0000, + HDMI_SS_NONE = 0xF0001, +}; + +enum hdmi_scan_type { + HDMI_SCAN_PROGRESSIVE, + HDMI_SCAN_INTERLACED, +}; + +struct svd_info_t { + uint32_t xres; + uint32_t yres; + uint32_t hz; + enum hdmi_scan_type scan_type; + char name[9]; +}; + +struct svd_t { + uint8_t code; + bool native; + struct svd_info_t info; +}; + +struct hdmi_s3d_format_vic_info_t { + uint8_t vic_pos; + enum hdmi_3d_subsampling subsampling; +}; + +struct hdmi_s3d_format_info_t { + enum hdmi_3d_format format; + unsigned int num_valid_vic; + struct hdmi_s3d_format_vic_info_t vic_info[MAX_VIC_CODES_PER_3D_FORMAT]; +}; + +int edid_parser_init(struct edid_t **edid, const uint8_t *raw_edid_data); +void edid_parser_deinit(struct edid_t *edid); + +bool edid_s3d_capable(struct edid_t *edid); +bool edid_supports_s3d_format(struct edid_t *edid, enum hdmi_3d_format format); +const struct hdmi_s3d_format_info_t * edid_get_s3d_format_info(struct edid_t *edid, enum hdmi_3d_format format); + +void edid_get_svd_list(struct edid_t *edid, struct svd_t **list, unsigned int *num_elements); +const struct svd_t *edid_get_svd_descriptor(struct edid_t *edid, uint8_t vic_pos); + +#endif //_EDID_PARSER_ \ No newline at end of file diff --git a/edid/lib/edid_parser.c b/edid/lib/edid_parser.c new file mode 100644 index 0000000..e08822c --- /dev/null +++ b/edid/lib/edid_parser.c @@ -0,0 +1,410 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#include +#include +#include + +#include +#include "edid_parser_priv.h" + +const struct svd_info_t svd_table[] = +{ + {0, 0, 0, HDMI_SCAN_PROGRESSIVE, "reserved"}, + {640, 480, 60, HDMI_SCAN_PROGRESSIVE, "DMT0659"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480p"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480pH"}, + {1280, 720, 60, HDMI_SCAN_PROGRESSIVE, "720p"}, + {1920, 1080, 60, HDMI_SCAN_INTERLACED, "1080i"}, + {720, 480, 60, HDMI_SCAN_INTERLACED, "480i"}, + {720, 480, 60, HDMI_SCAN_INTERLACED, "480iH"}, + {720, 240, 60, HDMI_SCAN_PROGRESSIVE, "240p"}, + {1280, 720, 60, HDMI_SCAN_PROGRESSIVE, "240pH"}, + {720, 480, 60, HDMI_SCAN_INTERLACED, "480i4x"}, + {720, 480, 60, HDMI_SCAN_INTERLACED, "480i4xH"}, + {720, 240, 60, HDMI_SCAN_PROGRESSIVE, "240p4x"}, + {720, 240, 60, HDMI_SCAN_PROGRESSIVE, "240p4xH"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480p2x"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480p2xH"}, + {1920, 1080, 60, HDMI_SCAN_PROGRESSIVE, "1080p"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576p"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576pH"}, + {1280, 720, 50, HDMI_SCAN_PROGRESSIVE, "720p50"}, + {1920, 1080, 50, HDMI_SCAN_INTERLACED, "1080i25"}, + {720, 576, 50, HDMI_SCAN_INTERLACED, "576i"}, + {720, 576, 50, HDMI_SCAN_INTERLACED, "576iH"}, + {720, 288, 50, HDMI_SCAN_PROGRESSIVE, "288p"}, + {720, 288, 50, HDMI_SCAN_PROGRESSIVE, "288pH"}, + {720, 576, 50, HDMI_SCAN_INTERLACED, "576i4x"}, + {720, 576, 50, HDMI_SCAN_INTERLACED, "576i4xH"}, + {720, 288, 50, HDMI_SCAN_PROGRESSIVE, "288p4x"}, + {720, 288, 50, HDMI_SCAN_PROGRESSIVE, "288p4xH"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576p2x"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576p2xH"}, + {1920, 1080, 50, HDMI_SCAN_PROGRESSIVE, "1080p50"}, + {1920, 1080, 24, HDMI_SCAN_PROGRESSIVE, "1080p24"}, + {1920, 1080, 25, HDMI_SCAN_PROGRESSIVE, "1080p25"}, + {1920, 1080, 30, HDMI_SCAN_PROGRESSIVE, "1080p30"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480p4x"}, + {720, 480, 60, HDMI_SCAN_PROGRESSIVE, "480p4xH"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576p4x"}, + {720, 576, 50, HDMI_SCAN_PROGRESSIVE, "576p4xH"}, + {1920, 1080, 50, HDMI_SCAN_INTERLACED, "1080i25"}, + {1920, 1080, 100, HDMI_SCAN_INTERLACED, "1080i50"}, + {1280, 720, 100, HDMI_SCAN_PROGRESSIVE, "720p100"}, + {720, 576, 100, HDMI_SCAN_PROGRESSIVE, "576p100"}, + {720, 576, 100, HDMI_SCAN_PROGRESSIVE, "576p100H"}, + {720, 576, 100, HDMI_SCAN_INTERLACED, "576i50"}, + {720, 576, 100, HDMI_SCAN_INTERLACED, "576i50H"}, + {1920, 1080, 120, HDMI_SCAN_INTERLACED, "1080i60"}, + {1280, 720, 120, HDMI_SCAN_PROGRESSIVE, "720p120"}, + {720, 480, 120, HDMI_SCAN_PROGRESSIVE, "480p120"}, + {720, 480, 120, HDMI_SCAN_PROGRESSIVE, "480p120H"}, + {720, 480, 120, HDMI_SCAN_INTERLACED, "480i60"}, + {720, 480, 120, HDMI_SCAN_INTERLACED, "480i60H"}, + {720, 576, 200, HDMI_SCAN_PROGRESSIVE, "576p200"}, + {720, 576, 200, HDMI_SCAN_PROGRESSIVE, "576p200H"}, + {720, 576, 200, HDMI_SCAN_INTERLACED, "576i100"}, + {720, 576, 200, HDMI_SCAN_INTERLACED, "576i100H"}, + {720, 480, 240, HDMI_SCAN_PROGRESSIVE, "480p240"}, + {720, 480, 240, HDMI_SCAN_PROGRESSIVE, "480p240H"}, + {720, 480, 240, HDMI_SCAN_INTERLACED, "480i120"}, + {720, 480, 240, HDMI_SCAN_INTERLACED, "480i120H"}, + {1280, 720, 24, HDMI_SCAN_PROGRESSIVE, "720p24"}, + {1280, 720, 25, HDMI_SCAN_PROGRESSIVE, "720p25"}, + {1280, 720, 30, HDMI_SCAN_PROGRESSIVE, "720p30"}, + {1920, 1080, 120, HDMI_SCAN_PROGRESSIVE, "1080p120"} +}; + +const int NUM_SVD_ENTRIES = sizeof(svd_table)/sizeof(svd_table[0]); + +static unsigned int count_set_bits(uint16_t value) +{ + unsigned int count; + for (count = 0; value; count++) + value &= value - 1; + return count; +} + +static void set_s3d_format_bits(const uint8_t *edid_data, int off, int hdmi_3d_len, uint16_t *s3d_struct_bits) +{ + //These are 3D formats signaled through 2D VIC order and 3D_structure-3D_Detail + while (hdmi_3d_len > 0) { + unsigned int val = edid_data[off++] & 0x0F; + *s3d_struct_bits |= 1 << val; + //3D Detail_x is included for 3D_Structure_x range 0x8-0xF + if ( val >= HDMI_SIDE_BY_SIDE_HALF) { + hdmi_3d_len--; + off++; + } + hdmi_3d_len--; + } +} + +static void update_s3d_format(struct edid_t *edid, enum hdmi_3d_format format, + uint8_t vic_pos, enum hdmi_3d_subsampling subsamp) +{ + unsigned int format_ix, vic_pos_ix; + if (vic_pos > edid->num_svds) { + return; + } + + for (format_ix = 0; format_ix < edid->num_s3d_formats; format_ix++) { + if (edid->s3d_format_list[format_ix].format == format) { + break; + } + } + + if (format_ix >= edid->num_s3d_formats) { + return; + } + + //In case this has already been signaled, we'll update the subsampling mode + for (vic_pos_ix = 0; vic_pos_ix < edid->s3d_format_list[format_ix].num_valid_vic; vic_pos_ix++) { + if (edid->s3d_format_list[format_ix].vic_info[vic_pos_ix].vic_pos == vic_pos) { + break; + } + } + + if (vic_pos_ix >= edid->s3d_format_list[format_ix].num_valid_vic) { + vic_pos_ix = edid->s3d_format_list[format_ix].num_valid_vic; + edid->s3d_format_list[format_ix].num_valid_vic += 1; + } + + edid->s3d_format_list[format_ix].vic_info[vic_pos_ix].vic_pos = vic_pos; + edid->s3d_format_list[format_ix].vic_info[vic_pos_ix].subsampling = subsamp; +} + +/* This function was originally written by Mythri pk */ +static int edid_get_datablock_offset(const uint8_t *edid_data, enum datablock_id type, unsigned int *off) +{ + uint8_t val; + uint8_t ext_length; + uint8_t offset; + + //CEA extension signaled? If not, then no datablocks are contained + if (edid_data[0x7e] == 0x00) { + return 1; + } + + //18-byte descriptors only? Otherwise, there are datablocks present + ext_length = edid_data[0x82]; + if (ext_length == 0x4) { + return 1; + } + + //Start of first extended data block + offset = 0x84; + while (offset < (0x80 + ext_length)) { + val = edid_data[offset]; + //Upper 3 bits indicate block type + if ((val >> 5) == type) { + *off = offset; + return 0; + } else { + //lower 5 bits indicate block length + offset += (val & 0x1F) + 1; + } + } + return 1; +} + +static void edid_parse_s3d_support(struct edid_t *edid, const uint8_t *edid_data) +{ + unsigned int off; + unsigned int i, count; + uint8_t val; + uint8_t s3d_multi_present; + uint8_t hdmi_3d_len; + uint16_t s3d_struct_all = 0; + uint16_t s3d_struct_bits = 0; + uint16_t hdmi_vic_pos_bits = 0; + + //memset(edid->s3d_formats, 0, sizeof(edid->s3d_formats)); + + //S3D HDMI information is signaled in the Vendor Specific datablock + if(edid_get_datablock_offset(edid_data, DATABLOCK_VENDOR, &off)) + return; + + //Skip header and other non-S3D related fields + off += 8; + val = edid_data[off++]; + + //HDMI_Video_present? + if (!(val & 0x20)) { + return; + } + + //Latency_Fields_Present? Skip + if (val & 0x80) { + off += 2; + } + + //I_Latency_Fields_Present? Skip + if (val & 0x40) { + off += 2; + } + + val = edid_data[off++]; + //3D_Present? + if (!(val & 0x80)) { + return; + } + + edid->s3d_capable = true; + + s3d_multi_present = (val & 0x60) >> 5; + + //Skip HDMI_XX_LEN + val = edid_data[off++]; + off += (val & 0xE0) >> 5; + hdmi_3d_len = (val & 0x1F); + + //3D capabilities signaled through bitmasks + //s3d_struct_all has all the 3D formats supported (per bit) + //hdmi_vic_mask has which of the corresponding VIC codes the 3D formats apply to + //if s3d_multi_present = 1, then the 3D formats apply to all the first 16 VIC codes + if (s3d_multi_present == 1 || s3d_multi_present == 2) { + s3d_struct_all = (edid_data[off] << 8) | edid_data[off+1]; + hdmi_vic_pos_bits = 0xFFFF; + hdmi_3d_len -= 2; + off += 2; + } + + if (s3d_multi_present == 2) { + hdmi_vic_pos_bits = (edid_data[off] << 8) | edid_data[off+1]; + hdmi_3d_len -= 2; + off += 2; + } + + //Bit 15 signals same format as Bit 8 - HDMI_SIDE_BY_SIDE_HALF, they only differ in subsampling options + s3d_struct_bits = s3d_struct_all & 0x7FFF; + set_s3d_format_bits(edid_data, off, hdmi_3d_len, &s3d_struct_bits); + + edid->num_s3d_formats = count_set_bits(s3d_struct_bits); + edid->s3d_format_list = (struct hdmi_s3d_format_info_t *) malloc(edid->num_s3d_formats * sizeof(struct hdmi_s3d_format_info_t)); + + count = 0; + for (i = 0; i <= HDMI_SIDE_BY_SIDE_HALF; i++) { + if (s3d_struct_bits & (1 << i)) { + edid->s3d_format_list[count++].format = (enum hdmi_3d_format)i; + } + } + + for (i = 0; i < edid->num_s3d_formats; i++) { + unsigned int j; + enum hdmi_3d_subsampling subsampling; + if (edid->s3d_format_list[i].format == HDMI_SIDE_BY_SIDE_HALF) { + uint16_t bitmask = HDMI_SIDE_BY_SIDE_HALF_QUINCUNX_BIT | HDMI_SIDE_BY_SIDE_HALF_BIT; + if ( (s3d_struct_all & bitmask) == bitmask) { + subsampling = HDMI_SS_HORZANDQUINCUNX; + } else if ((s3d_struct_all & bitmask) == HDMI_SIDE_BY_SIDE_HALF_QUINCUNX_BIT) { + subsampling = HDMI_SS_QUINCUNX_ALL; + } else if ((s3d_struct_all & bitmask) == HDMI_SIDE_BY_SIDE_HALF_BIT) { + subsampling = HDMI_SS_HORIZONTAL; + } + } else if (edid->s3d_format_list[i].format == HDMI_TOPBOTTOM) { + subsampling = HDMI_SS_VERTICAL; + } else { + subsampling = HDMI_SS_NONE; + } + count = 0; + for (j = 0; j < 16; j++) { + if ((s3d_struct_all & (1 << edid->s3d_format_list[i].format)) && + (hdmi_vic_pos_bits & (1 << j))) { + edid->s3d_format_list[i].vic_info[count].subsampling = subsampling; + edid->s3d_format_list[i].vic_info[count++].vic_pos = j; + } + } + edid->s3d_format_list[i].num_valid_vic = count; + } + + //In this case, the 3D formats signaled only apply to the VIC codes signaled per bit + //i.e. bit0 = VIC code 0 from the Short video descriptors list + while (hdmi_3d_len > 0) { + //Upper 4 bits indicate vic position, lower 4 bits are the 3D structure value + enum hdmi_3d_subsampling subsampling = HDMI_SS_NONE; + uint8_t vic_pos = (edid_data[off] & 0xF0) >> 4; + enum hdmi_3d_format format = (enum hdmi_3d_format) (edid_data[off++] & 0x0F); + if (format >= HDMI_SIDE_BY_SIDE_HALF) { + subsampling = (enum hdmi_3d_subsampling)((edid_data[off++] & 0xF0) >> 4); + hdmi_3d_len--; + } + if (format == HDMI_TOPBOTTOM) { + subsampling = HDMI_SS_VERTICAL; + } + update_s3d_format(edid, format, vic_pos, subsampling); + hdmi_3d_len--; + } +} + +static void edid_fill_svd_info(uint8_t code, struct svd_info_t *info) +{ + if(code > NUM_SVD_ENTRIES) + code = 0; + memcpy(info, &svd_table[code], sizeof(struct svd_info_t)); +} + +static void edid_parse_svds(struct edid_t *edid, const uint8_t *raw_edid_data) +{ + unsigned int offset; + unsigned int i; + if (edid_get_datablock_offset(raw_edid_data, DATABLOCK_VIDEO, &offset)) { + edid->num_svds = 0; + edid->svd_list = NULL; + return ; + } + + edid->num_svds = raw_edid_data[offset] & 0x1F; + edid->svd_list = (struct svd_t *) malloc(edid->num_svds * sizeof(struct svd_t)); + for (i = 0; i < edid->num_svds; i++) { + struct svd_t *svd = &edid->svd_list[i]; + svd->code = raw_edid_data[offset + i] & 0x7F; + svd->native = (raw_edid_data[offset + i] & 0x80) == 0x80; + edid_fill_svd_info(svd->code, &svd->info); + } +} + +/*=======================================================*/ +int edid_parser_init(struct edid_t **edid_handle, const uint8_t *raw_edid_data) +{ + if(edid_handle == NULL) { + return -1; + } + + struct edid_t *edid = (struct edid_t *) malloc(sizeof(struct edid_t)); + if (edid == NULL) { + return -1; + } + + memset(edid, 0, sizeof(struct edid_t)); + edid_parse_svds(edid, raw_edid_data); + edid_parse_s3d_support(edid, raw_edid_data); + + *edid_handle = edid; + return 0; +} + +void edid_parser_deinit(struct edid_t *edid) +{ + free(edid->s3d_format_list); + free(edid->svd_list); + free(edid); +} + +bool edid_s3d_capable(struct edid_t *edid) +{ + return edid->s3d_capable; +} + +bool edid_supports_s3d_format(struct edid_t *edid, enum hdmi_3d_format format) +{ + unsigned int i; + for (i = 0; i < edid->num_s3d_formats; i++) { + if (edid->s3d_format_list[i].format == format) { + return true; + } + } + return false; +} + +const struct hdmi_s3d_format_info_t * edid_get_s3d_format_info(struct edid_t *edid, enum hdmi_3d_format format) +{ + unsigned int i; + for (i = 0; i < edid->num_s3d_formats; i++) { + if (edid->s3d_format_list[i].format == format) { + return &edid->s3d_format_list[i]; + } + } + return NULL; +} + +void edid_get_svd_list(struct edid_t *edid, struct svd_t **list, unsigned int *num_elements) +{ + if(list == NULL || num_elements == NULL) + return; + + *list = edid->svd_list; + *num_elements = edid->num_svds; +} + +const struct svd_t *edid_get_svd_descriptor(struct edid_t *edid, uint8_t vic_pos) +{ + if(vic_pos > edid->num_svds) + return NULL; + return &edid->svd_list[vic_pos]; +} diff --git a/edid/lib/edid_parser_priv.h b/edid/lib/edid_parser_priv.h new file mode 100644 index 0000000..69ba513 --- /dev/null +++ b/edid/lib/edid_parser_priv.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +struct hdmi_s3d_format_t { + bool supported; + struct hdmi_s3d_format_info_t f; +}; + +struct edid_t { + bool s3d_capable; + + unsigned int num_s3d_formats; + struct hdmi_s3d_format_info_t *s3d_format_list; + + unsigned int num_svds; + struct svd_t *svd_list; +}; diff --git a/extract-files.sh b/extract-files.sh new file mode 100755 index 0000000..3731cab --- /dev/null +++ b/extract-files.sh @@ -0,0 +1,142 @@ +#!/bin/sh + +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +VENDOR=samsung +COMMON=omap4-common +COMMONOUTDIR=vendor/$VENDOR/$COMMON +COMMONBASE=../../../$COMMONOUTDIR/proprietary +COMMONMAKEFILE=../../../$COMMONOUTDIR/common-vendor-blobs.mk +COMMONPROPS=../$COMMON/proprietary-files.txt + +mkdir -p ../../../vendor/$VENDOR/$COMMON/proprietary + +adb root +adb wait-for-device + +echo "Pulling common files..." +for FILE in `cat $COMMONPROPS | grep -v ^# | grep -v ^$`; do + DIR=`dirname $FILE` + if [ ! -d $COMMONBASE/$DIR ]; then + mkdir -p $COMMONBASE/$DIR + fi + adb pull /$FILE $COMMONBASE/$FILE +done + + +(cat << EOF) | sed s/__COMMON__/$COMMON/g | sed s/__VENDOR__/$VENDOR/g > $COMMONMAKEFILE +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +LOCAL_PATH := vendor/samsung/__COMMON__ + +PRODUCT_COPY_FILES += \\ +EOF + +LINEEND=" \\" +COUNT=`cat $COMMONPROPS | grep -v ^# | grep -v ^$ | wc -l | awk {'print $1'}` +for FILE in `cat $COMMONPROPS | grep -v ^# | grep -v ^$`; do + COUNT=`expr $COUNT - 1` + if [ $COUNT = "0" ]; then + LINEEND="" + fi + echo " \$(LOCAL_PATH)/proprietary/$FILE:$FILE$LINEEND" >> $COMMONMAKEFILE +done + +(cat << EOF) | sed s/__COMMON__/$COMMON/g | sed s/__VENDOR__/$VENDOR/g > $COMMONBASE/Android.mk +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +ifneq (\$(filter i9100g p3100 p3110 p5100 p5110,\$(TARGET_DEVICE)),) + +LOCAL_PATH := \$(call my-dir) + +# Creating Gralloc SymLink +GRALLOC_SYMLINK := \$(TARGET_OUT_VENDOR)/lib/hw/gralloc.\$(TARGET_BOARD_PLATFORM).so +\$(GRALLOC_SYMLINK): GRALLOC_FILE := gralloc.omap\$(TARGET_BOARD_OMAP_CPU).so +\$(GRALLOC_SYMLINK): \$(LOCAL_INSTALLED_MODULE) \$(LOCAL_PATH)/Android.mk + @echo "Symlink: \$@ -> \$(GRALLOC_FILE)" + @rm -rf \$@ + \$(hide) ln -fs \$(GRALLOC_FILE) \$@ + +ALL_DEFAULT_INSTALLED_MODULES += \$(GRALLOC_SYMLINK) + +# for mm/mmm +all_modules: \$(GRALLOC_SYMLINK) + +endif + +EOF + +(cat << EOF) | sed s/__COMMON__/$COMMON/g | sed s/__VENDOR__/$VENDOR/g > ../../../$COMMONOUTDIR/common-vendor.mk +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# Pick up overlay for features that depend on non-open-source files +DEVICE_PACKAGE_OVERLAYS += vendor/__VENDOR__/__COMMON__/overlay + +\$(call inherit-product, vendor/__VENDOR__/__COMMON__/common-vendor-blobs.mk) +EOF + +(cat << EOF) | sed s/__COMMON__/$COMMON/g | sed s/__VENDOR__/$VENDOR/g > ../../../$COMMONOUTDIR/BoardConfigVendor.mk +# Copyright (C) 2013 The CyanogenMod Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +EOF + diff --git a/hwc/Android.mk b/hwc/Android.mk new file mode 100644 index 0000000..dc0c713 --- /dev/null +++ b/hwc/Android.mk @@ -0,0 +1,31 @@ +LOCAL_PATH := $(call my-dir) + +# HAL module implementation, not prelinked and stored in +# hw/..so +include $(CLEAR_VARS) +LOCAL_PRELINK_MODULE := false +LOCAL_ARM_MODE := arm +LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/../vendor/lib/hw +LOCAL_SHARED_LIBRARIES := liblog libEGL libcutils libutils libhardware libhardware_legacy libz \ + libion_ti +LOCAL_SRC_FILES := hwc.c rgz_2d.c dock_image.c sw_vsync.c +LOCAL_STATIC_LIBRARIES := libpng + +LOCAL_MODULE_TAGS := optional + +LOCAL_MODULE := hwcomposer.$(TARGET_BOOTLOADER_BOARD_NAME) +LOCAL_CFLAGS := -DLOG_TAG=\"ti_hwc\" +LOCAL_C_INCLUDES += external/libpng external/zlib + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/../edid/inc \ + $(LOCAL_PATH)/../include +LOCAL_SHARED_LIBRARIES += libedid + +ifeq ($(BOARD_USE_SYSFS_VSYNC_NOTIFICATION),true) +LOCAL_CFLAGS += -DSYSFS_VSYNC_NOTIFICATION +endif + +# LOG_NDEBUG=0 means verbose logging enabled +# LOCAL_CFLAGS += -DLOG_NDEBUG=0 +include $(BUILD_SHARED_LIBRARY) diff --git a/hwc/dock_image.c b/hwc/dock_image.c new file mode 100644 index 0000000..b74a17e --- /dev/null +++ b/hwc/dock_image.c @@ -0,0 +1,196 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "hwc_dev.h" +#include "dock_image.h" + +static struct dock_image_state { + void *buffer; /* start of fb for hdmi */ + uint32_t buffer_size; /* size of fb for hdmi */ + + uint32_t max_width; + uint32_t max_height; + + image_info_t image; +} dock_image; + +static void free_png_image(image_info_t *img) +{ + memset(img, 0, sizeof(*img)); +} + +static int load_png_image(char *path, image_info_t *img) +{ + void *ptr = NULL; + png_bytepp row_pointers = NULL; + + FILE *fd = fopen(path, "rb"); + if (!fd) { + ALOGE("failed to open PNG file %s: (%d)", path, errno); + return -EINVAL; + } + + const int SIZE_PNG_HEADER = 8; + uint8_t header[SIZE_PNG_HEADER]; + fread(header, 1, SIZE_PNG_HEADER, fd); + if (png_sig_cmp(header, 0, SIZE_PNG_HEADER)) { + ALOGE("%s is not a PNG file", path); + goto fail; + } + + png_structp png_ptr = png_create_read_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL); + if (!png_ptr) + goto fail_alloc; + png_infop info_ptr = png_create_info_struct(png_ptr); + if (!info_ptr) + goto fail_alloc; + + if (setjmp(png_jmpbuf(png_ptr))) + goto fail_alloc; + + png_init_io(png_ptr, fd); + png_set_sig_bytes(png_ptr, SIZE_PNG_HEADER); + png_set_user_limits(png_ptr, dock_image.max_width, dock_image.max_height); + png_read_info(png_ptr, info_ptr); + + uint8_t bit_depth = png_get_bit_depth(png_ptr, info_ptr); + uint32_t width = png_get_image_width(png_ptr, info_ptr); + uint32_t height = png_get_image_height(png_ptr, info_ptr); + uint8_t color_type = png_get_color_type(png_ptr, info_ptr); + + switch (color_type) { + case PNG_COLOR_TYPE_PALETTE: + png_set_palette_to_rgb(png_ptr); + png_set_filler(png_ptr, 128, PNG_FILLER_AFTER); + break; + case PNG_COLOR_TYPE_GRAY: + if (bit_depth < 8) { + png_set_expand_gray_1_2_4_to_8(png_ptr); + if (png_get_valid(png_ptr, info_ptr, PNG_INFO_tRNS)) + png_set_tRNS_to_alpha(png_ptr); + } else { + png_set_filler(png_ptr, 128, PNG_FILLER_AFTER); + } + /* fall through */ + case PNG_COLOR_TYPE_GRAY_ALPHA: + png_set_gray_to_rgb(png_ptr); + break; + case PNG_COLOR_TYPE_RGB: + png_set_filler(png_ptr, 128, PNG_FILLER_AFTER); + /* fall through */ + case PNG_COLOR_TYPE_RGB_ALPHA: + png_set_bgr(png_ptr); + break; + default: + ALOGE("unsupported PNG color: %x", color_type); + goto fail_alloc; + } + + if (bit_depth == 16) + png_set_strip_16(png_ptr); + + const uint32_t bpp = 4; + img->size = ALIGN(width * height * bpp, 4096); + if ((uint32_t)img->size > dock_image.buffer_size) { + ALOGE("image does not fit into framebuffer area (%d > %d)", img->size, dock_image.buffer_size); + goto fail_alloc; + } + img->ptr = dock_image.buffer; + + row_pointers = calloc(height, sizeof(*row_pointers)); + if (!row_pointers) { + ALOGE("failed to allocate row pointers"); + goto fail_alloc; + } + uint32_t i; + for (i = 0; i < height; i++) + row_pointers[i] = img->ptr + i * width * bpp; + png_set_rows(png_ptr, info_ptr, row_pointers); + png_read_update_info(png_ptr, info_ptr); + img->rowbytes = png_get_rowbytes(png_ptr, info_ptr); + + png_read_image(png_ptr, row_pointers); + png_read_end(png_ptr, NULL); + free(row_pointers); + png_destroy_read_struct(&png_ptr, &info_ptr, NULL); + fclose(fd); + img->width = width; + img->height = height; + return 0; + +fail_alloc: + free_png_image(img); + free(row_pointers); + if (!png_ptr || !info_ptr) + ALOGE("failed to allocate PNG structures"); + png_destroy_read_struct(&png_ptr, &info_ptr, NULL); +fail: + fclose(fd); + return -EINVAL; +} + +int init_dock_image(omap_hwc_device_t *hwc_dev, uint32_t max_width, uint32_t max_height) +{ + int err = 0; + + struct fb_fix_screeninfo fix; + if (ioctl(hwc_dev->fb_fd, FBIOGET_FSCREENINFO, &fix)) { + ALOGE("failed to get fb info (%d)", errno); + err = -errno; + goto done; + } + + dock_image.buffer_size = fix.smem_len; + dock_image.buffer = mmap(NULL, fix.smem_len, PROT_WRITE, MAP_SHARED, hwc_dev->fb_fd, 0); + if (dock_image.buffer == MAP_FAILED) { + ALOGE("failed to map fb memory"); + err = -errno; + goto done; + } + + dock_image.max_width = max_width; + dock_image.max_height = max_height; + + done: + return err; +} + +void load_dock_image() +{ + if (!dock_image.image.rowbytes) { + char value[PROPERTY_VALUE_MAX]; + property_get("persist.hwc.dock_image", value, "/vendor/res/images/dock/dock.png"); + load_png_image(value, &dock_image.image); + } +} + +image_info_t *get_dock_image() +{ + return &dock_image.image; +} + diff --git a/hwc/dock_image.h b/hwc/dock_image.h new file mode 100644 index 0000000..44a3271 --- /dev/null +++ b/hwc/dock_image.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __DOCK_IMAGE__ +#define __DOCK_IMAGE__ + +#include + +/* ARGB image */ +struct image_info { + int width; + int height; + int rowbytes; + int size; + uint8_t *ptr; +}; +typedef struct image_info image_info_t; + +typedef struct omap_hwc_device omap_hwc_device_t; + +int init_dock_image(omap_hwc_device_t *hwc_dev, uint32_t max_width, uint32_t max_height); +void load_dock_image(); +image_info_t *get_dock_image(); + +#endif diff --git a/hwc/hal_public.h b/hwc/hal_public.h new file mode 100644 index 0000000..a7dfb08 --- /dev/null +++ b/hwc/hal_public.h @@ -0,0 +1,188 @@ +/* Copyright (c) Imagination Technologies Ltd. + * + * The contents of this file are subject to the MIT license as set out below. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef HAL_PUBLIC_H +#define HAL_PUBLIC_H + +/* Authors of third party hardware composer (HWC) modules will need to include + * this header to access functionality in the gralloc and framebuffer HALs. + */ + +#include + +#define ALIGN(x,a) (((x) + (a) - 1L) & ~((a) - 1L)) +#define HW_ALIGN 32 + +/* This can be tuned down as appropriate for the SOC. + * + * IMG formats are usually a single sub-alloc. + * Some OEM video formats are two sub-allocs (Y, UV planes). + * Future OEM video formats might be three sub-allocs (Y, U, V planes). + */ +#define MAX_SUB_ALLOCS 3 + +typedef struct +{ + native_handle_t base; + + /* These fields can be sent cross process. They are also valid + * to duplicate within the same process. + * + * A table is stored within psPrivateData on gralloc_module_t (this + * is obviously per-process) which maps stamps to a mapped + * PVRSRV_CLIENT_MEM_INFO in that process. Each map entry has a lock + * count associated with it, satisfying the requirements of the + * Android API. This also prevents us from leaking maps/allocations. + * + * This table has entries inserted either by alloc() + * (alloc_device_t) or map() (gralloc_module_t). Entries are removed + * by free() (alloc_device_t) and unmap() (gralloc_module_t). + * + * As a special case for framebuffer_device_t, framebuffer_open() + * will add and framebuffer_close() will remove from this table. + */ + +#define IMG_NATIVE_HANDLE_NUMFDS MAX_SUB_ALLOCS + /* The `fd' field is used to "export" a meminfo to another process. + * Therefore, it is allocated by alloc_device_t, and consumed by + * gralloc_module_t. The framebuffer_device_t does not need a handle, + * and the special value IMG_FRAMEBUFFER_FD is used instead. + */ + int fd[MAX_SUB_ALLOCS]; + +#define IMG_NATIVE_HANDLE_NUMINTS ((sizeof(unsigned long long) / sizeof(int)) + 5) + /* A KERNEL unique identifier for any exported kernel meminfo. Each + * exported kernel meminfo will have a unique stamp, but note that in + * userspace, several meminfos across multiple processes could have + * the same stamp. As the native_handle can be dup(2)'d, there could be + * multiple handles with the same stamp but different file descriptors. + */ + unsigned long long ui64Stamp; + + /* This is used for buffer usage validation when locking a buffer, + * and also in WSEGL (for the composition bypass feature). + */ + int usage; + + /* In order to do efficient cache flushes we need the buffer dimensions + * and format. These are available on the ANativeWindowBuffer, + * but the platform doesn't pass them down to the graphics HAL. + * + * These fields are also used in the composition bypass. In this + * capacity, these are the "real" values for the backing allocation. + */ + int iWidth; + int iHeight; + int iFormat; + unsigned int uiBpp; +} +__attribute__((aligned(sizeof(int)),packed)) IMG_native_handle_t; + +typedef struct +{ + framebuffer_device_t base; + + /* The HWC was loaded. post() is no longer responsible for presents */ + int bBypassPost; + + /* HWC path for present posts */ + int (*Post2)(framebuffer_device_t *fb, buffer_handle_t *buffers, + int num_buffers, void *data, int data_length); +} +IMG_framebuffer_device_public_t; + +typedef struct IMG_gralloc_module_public_t +{ + gralloc_module_t base; + + /* If the framebuffer has been opened, this will point to the + * framebuffer device data required by the allocator, WSEGL + * modules and composerhal. + */ + IMG_framebuffer_device_public_t *psFrameBufferDevice; + + int (*GetPhyAddrs)(struct IMG_gralloc_module_public_t const* module, + buffer_handle_t handle, + unsigned int auiPhyAddr[MAX_SUB_ALLOCS]); + + /* Custom-blit components in lieu of overlay hardware */ + int (*Blit)(struct IMG_gralloc_module_public_t const *module, + buffer_handle_t src, + void *dest[MAX_SUB_ALLOCS], int format); + + int (*Blit2)(struct IMG_gralloc_module_public_t const *module, + buffer_handle_t src, buffer_handle_t dest, + int w, int h, int x, int y); +} +IMG_gralloc_module_public_t; + +typedef struct +{ + int l, t, w, h; +} +IMG_write_lock_rect_t; + +typedef struct IMG_buffer_format_public_t +{ + /* Buffer formats are returned as a linked list */ + struct IMG_buffer_format_public_t *psNext; + + /* HAL_PIXEL_FORMAT_... enumerant */ + int iHalPixelFormat; + + /* WSEGL_PIXELFORMAT_... enumerant */ + int iWSEGLPixelFormat; + + /* Friendly name for format */ + const char *const szName; + + /* Bits (not bytes) per pixel */ + unsigned int uiBpp; + + /* GPU output format (creates EGLConfig for format) */ + int bGPURenderable; +} +IMG_buffer_format_public_t; + +/* + * These are vendor specific pixel formats, by (informal) convention IMGTec + * formats start from the top of the range, TI formats start from the bottom + */ +#define HAL_PIXEL_FORMAT_BGRX_8888 0x1FF +#define HAL_PIXEL_FORMAT_TI_NV12 0x100 +#define HAL_PIXEL_FORMAT_TI_UNUSED 0x101 /* Free for use */ +#define HAL_PIXEL_FORMAT_TI_NV12_1D 0x102 + +#ifndef GRALLOC_USAGE_SYSTEM_HEAP +#define GRALLOC_USAGE_SYSTEM_HEAP GRALLOC_USAGE_PRIVATE_0 +#else +#error GRALLOC_USAGE_SYSTEM_HEAP should only be defined by hal_public.h +#endif + +#ifndef GRALLOC_USAGE_PHYS_CONTIG +#define GRALLOC_USAGE_PHYS_CONTIG GRALLOC_USAGE_PRIVATE_1 +#else +#error GRALLOC_USAGE_PHYS_CONTIG should only be defined by hal_public.h +#endif +#endif /* HAL_PUBLIC_H */ + diff --git a/hwc/hwc.c b/hwc/hwc.c new file mode 100644 index 0000000..855942b --- /dev/null +++ b/hwc/hwc.c @@ -0,0 +1,2747 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef SYSFS_VSYNC_NOTIFICATION +#include +#endif + +#include +#include +#include +#define HWC_REMOVE_DEPRECATED_VERSIONS 1 +#include +#include +#include +#include +#include +#include +#include +#ifdef OMAP_ENHANCEMENT_S3D +#include +#endif + +#include +#include +#include + +#include "hwc_dev.h" +#include "dock_image.h" +#include "sw_vsync.h" + +#define min(a, b) ( { typeof(a) __a = (a), __b = (b); __a < __b ? __a : __b; } ) +#define max(a, b) ( { typeof(a) __a = (a), __b = (b); __a > __b ? __a : __b; } ) +#define swap(a, b) do { typeof(a) __a = (a); (a) = (b); (b) = __a; } while (0) + +#define WIDTH(rect) ((rect).right - (rect).left) +#define HEIGHT(rect) ((rect).bottom - (rect).top) + +#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + +#define MAX_HWC_LAYERS 32 +#define MAX_HW_OVERLAYS 4 +#define NUM_NONSCALING_OVERLAYS 1 +#define NUM_EXT_DISPLAY_BACK_BUFFERS 2 +#define ASPECT_RATIO_TOLERANCE 0.02f + +/* used by property settings */ +enum { + EXT_ROTATION = 3, /* rotation while mirroring */ + EXT_HFLIP = (1 << 2), /* flip l-r on output (after rotation) */ +}; + +#define HAL_FMT(f) ((f) == HAL_PIXEL_FORMAT_TI_NV12 ? "NV12" : \ + (f) == HAL_PIXEL_FORMAT_TI_NV12_1D ? "NV12" : \ + (f) == HAL_PIXEL_FORMAT_YV12 ? "YV12" : \ + (f) == HAL_PIXEL_FORMAT_BGRX_8888 ? "xRGB32" : \ + (f) == HAL_PIXEL_FORMAT_RGBX_8888 ? "xBGR32" : \ + (f) == HAL_PIXEL_FORMAT_BGRA_8888 ? "ARGB32" : \ + (f) == HAL_PIXEL_FORMAT_RGBA_8888 ? "ABGR32" : \ + (f) == HAL_PIXEL_FORMAT_RGB_565 ? "RGB565" : "??") + +#define DSS_FMT(f) ((f) == OMAP_DSS_COLOR_NV12 ? "NV12" : \ + (f) == OMAP_DSS_COLOR_RGB24U ? "xRGB32" : \ + (f) == OMAP_DSS_COLOR_ARGB32 ? "ARGB32" : \ + (f) == OMAP_DSS_COLOR_RGB16 ? "RGB565" : "??") + +static bool debug = false; +static bool debugpost2 = false; +static bool debugblt = false; +static rgz_t grgz; +static rgz_ext_layer_list_t grgz_ext_layer_list; +static struct bvsurfgeom gscrngeom; + +static void showfps(void) +{ + static int framecount = 0; + static int lastframecount = 0; + static nsecs_t lastfpstime = 0; + static float fps = 0; + char value[PROPERTY_VALUE_MAX]; + + property_get("debug.hwc.showfps", value, "0"); + if (!atoi(value)) { + return; + } + + framecount++; + if (!(framecount & 0x7)) { + nsecs_t now = systemTime(SYSTEM_TIME_MONOTONIC); + nsecs_t diff = now - lastfpstime; + fps = ((framecount - lastframecount) * (float)(s2ns(1))) / diff; + lastfpstime = now; + lastframecount = framecount; + ALOGI("%d Frames, %f FPS", framecount, fps); + } +} + +static void dump_layer(hwc_layer_1_t const* l) +{ + ALOGD("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, {%d,%d,%d,%d}, {%d,%d,%d,%d}", + l->compositionType, l->flags, l->handle, l->transform, l->blending, + l->sourceCrop.left, + l->sourceCrop.top, + l->sourceCrop.right, + l->sourceCrop.bottom, + l->displayFrame.left, + l->displayFrame.top, + l->displayFrame.right, + l->displayFrame.bottom); +} + +static void dump_dsscomp(struct dsscomp_setup_dispc_data *d) +{ + uint32_t i; + + ALOGD("[%08x] set: %c%c%c %d ovls\n", + d->sync_id, + (d->mode & DSSCOMP_SETUP_MODE_APPLY) ? 'A' : '-', + (d->mode & DSSCOMP_SETUP_MODE_DISPLAY) ? 'D' : '-', + (d->mode & DSSCOMP_SETUP_MODE_CAPTURE) ? 'C' : '-', + d->num_ovls); + + for (i = 0; i < d->num_mgrs; i++) { + struct dss2_mgr_info *mi = &d->mgrs[i]; + ALOGD(" (dis%d alpha=%d col=%08x ilace=%d)\n", + mi->ix, + mi->alpha_blending, mi->default_color, + mi->interlaced); + } + + for (i = 0; i < d->num_ovls; i++) { + struct dss2_ovl_info *oi = &d->ovls[i]; + struct dss2_ovl_cfg *c = &oi->cfg; + if (c->zonly) + ALOGD("ovl%d(%s z%d)\n", + c->ix, c->enabled ? "ON" : "off", c->zorder); + else + ALOGD("ovl%d(%s z%d %s%s *%d%% %d*%d:%d,%d+%d,%d rot%d%s => %d,%d+%d,%d %p/%p|%d)\n", + c->ix, c->enabled ? "ON" : "off", c->zorder, DSS_FMT(c->color_mode), + c->pre_mult_alpha ? " premult" : "", + (c->global_alpha * 100 + 128) / 255, + c->width, c->height, c->crop.x, c->crop.y, + c->crop.w, c->crop.h, + c->rotation, c->mirror ? "+mir" : "", + c->win.x, c->win.y, c->win.w, c->win.h, + (void *) oi->ba, (void *) oi->uv, c->stride); + } +} + +struct dump_buf { + char *buf; + int buf_len; + int len; +}; + +static void dump_printf(struct dump_buf *buf, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + buf->len += vsnprintf(buf->buf + buf->len, buf->buf_len - buf->len, fmt, ap); + va_end(ap); +} + +static void dump_set_info(omap_hwc_device_t *hwc_dev, hwc_display_contents_1_t* list) +{ + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + char logbuf[1024]; + struct dump_buf log = { + .buf = logbuf, + .buf_len = sizeof(logbuf), + }; + uint32_t i; + + dump_printf(&log, "set H{"); + for (i = 0; list && i < list->numHwLayers; i++) { + if (i) + dump_printf(&log, " "); + hwc_layer_1_t *layer = &list->hwLayers[i]; + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + if (hwc_dev->post2_blit_buffers) { + if ((i + 1) < hwc_dev->post2_layers) + dump_printf(&log, "%p:%s,", handle, "DSS"); + else + dump_printf(&log, "%p:%s,", handle, "BV2D"); + } + else + dump_printf(&log, "%p:%s,", handle, layer->compositionType == HWC_OVERLAY ? "DSS" : "SGX"); + if ((layer->flags & HWC_SKIP_LAYER) || !handle) { + dump_printf(&log, "SKIP"); + continue; + } + if (layer->flags & HWC_HINT_CLEAR_FB) + dump_printf(&log, "CLR,"); + dump_printf(&log, "%d*%d(%s)", handle->iWidth, handle->iHeight, HAL_FMT(handle->iFormat)); + if (layer->transform) + dump_printf(&log, "~%d", layer->transform); + } + dump_printf(&log, "} D{"); + for (i = 0; i < dsscomp->num_ovls; i++) { + if (i) + dump_printf(&log, " "); + dump_printf(&log, "%d=", dsscomp->ovls[i].cfg.ix); + if (dsscomp->ovls[i].cfg.enabled) + dump_printf(&log, "%08x:%d*%d,%s", + dsscomp->ovls[i].ba, + dsscomp->ovls[i].cfg.width, + dsscomp->ovls[i].cfg.height, + DSS_FMT(dsscomp->ovls[i].cfg.color_mode)); + else + dump_printf(&log, "-"); + } + dump_printf(&log, "} L{"); + for (i = 0; i < hwc_dev->post2_layers; i++) { + if (i) + dump_printf(&log, " "); + dump_printf(&log, "%p", hwc_dev->buffers[i]); + } + if (hwc_dev->post2_blit_buffers) { + dump_printf(&log, "} B{"); + for (i = hwc_dev->post2_layers; + i < hwc_dev->post2_blit_buffers + hwc_dev->post2_layers; i++) { + dump_printf(&log, "%p ", hwc_dev->buffers[i]); + } + } + dump_printf(&log, "}%s\n", hwc_dev->use_sgx ? " swap" : ""); + + ALOGD("%s", log.buf); +} + +static int sync_id = 0; + +static bool is_valid_format(uint32_t format) +{ + switch(format) { + case HAL_PIXEL_FORMAT_RGB_565: + case HAL_PIXEL_FORMAT_RGBX_8888: + case HAL_PIXEL_FORMAT_RGBA_8888: + case HAL_PIXEL_FORMAT_BGRA_8888: + case HAL_PIXEL_FORMAT_BGRX_8888: + case HAL_PIXEL_FORMAT_TI_NV12: + case HAL_PIXEL_FORMAT_TI_NV12_1D: + return true; + + default: + return false; + } +} +#ifdef OMAP_ENHANCEMENT_S3D +static uint32_t get_s3d_layout_type(hwc_layer_1_t *layer) +{ + return (layer->flags & S3DLayoutTypeMask) >> S3DLayoutTypeShift; +} + +static uint32_t get_s3d_layout_order(hwc_layer_1_t *layer) +{ + return (layer->flags & S3DLayoutOrderMask) >> S3DLayoutOrderShift; +} +#endif + +static bool scaled(hwc_layer_1_t *layer) +{ + int w = WIDTH(layer->sourceCrop); + int h = HEIGHT(layer->sourceCrop); + + if (layer->transform & HWC_TRANSFORM_ROT_90) + swap(w, h); + + bool res = WIDTH(layer->displayFrame) != w || HEIGHT(layer->displayFrame) != h; +#ifdef OMAP_ENHANCEMENT_S3D + /* An S3D layer also needs scaling due to subsampling */ + res = res || (get_s3d_layout_type(layer) != eMono); +#endif + + return res; +} + +static bool is_protected(hwc_layer_1_t *layer) +{ + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + + return (handle->usage & GRALLOC_USAGE_PROTECTED) != 0; +} + +#define is_BLENDED(layer) ((layer)->blending != HWC_BLENDING_NONE) + +static bool is_RGB(IMG_native_handle_t *handle) +{ + switch(handle->iFormat) + { + case HAL_PIXEL_FORMAT_BGRA_8888: + case HAL_PIXEL_FORMAT_BGRX_8888: + case HAL_PIXEL_FORMAT_RGB_565: + return true; + default: + return false; + } +} +static uint32_t get_format_bpp(uint32_t format) +{ + switch(format) { + case HAL_PIXEL_FORMAT_BGRA_8888: + case HAL_PIXEL_FORMAT_BGRX_8888: + case HAL_PIXEL_FORMAT_RGBX_8888: + case HAL_PIXEL_FORMAT_RGBA_8888: + return 32; + case HAL_PIXEL_FORMAT_RGB_565: + return 16; + case HAL_PIXEL_FORMAT_TI_NV12: + case HAL_PIXEL_FORMAT_TI_NV12_1D: + return 8; + default: + return 0; + } +} + +static bool is_BGR_format(uint32_t format) +{ + switch (format) { + case HAL_PIXEL_FORMAT_RGBX_8888: + case HAL_PIXEL_FORMAT_RGBA_8888: + return true; + default: + return false; + } +} + +static bool is_BGR(IMG_native_handle_t *handle) +{ + return is_BGR_format(handle->iFormat); +} + +static bool is_NV12(IMG_native_handle_t *handle) +{ + switch(handle->iFormat) + { + case HAL_PIXEL_FORMAT_TI_NV12: + case HAL_PIXEL_FORMAT_TI_NV12_1D: + return true; + default: + return false; + } +} + +static bool is_upscaled_NV12(omap_hwc_device_t *hwc_dev, hwc_layer_1_t *layer) +{ + if (!layer) + return false; + + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + if (!is_NV12(handle)) + return false; + + int w = WIDTH(layer->sourceCrop); + int h = HEIGHT(layer->sourceCrop); + + if (layer->transform & HWC_TRANSFORM_ROT_90) + swap(w, h); + + return (WIDTH(layer->displayFrame) >= w * hwc_dev->upscaled_nv12_limit || + HEIGHT(layer->displayFrame) >= h * hwc_dev->upscaled_nv12_limit); +} + +static bool dockable(hwc_layer_1_t *layer) +{ + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + + return (handle->usage & GRALLOC_USAGE_EXTERNAL_DISP) != 0; +} + +static uint32_t mem1d(IMG_native_handle_t *handle) +{ + if (handle == NULL || is_NV12(handle)) + return 0; + + int bpp = handle->iFormat == HAL_PIXEL_FORMAT_RGB_565 ? 2 : 4; + int stride = ALIGN(handle->iWidth, HW_ALIGN) * bpp; + return stride * handle->iHeight; +} + +static void setup_layer_base(struct dss2_ovl_cfg *oc, int index, uint32_t format, + bool blended, int width, int height) +{ + /* YUV2RGB conversion */ + const struct omap_dss_cconv_coefs ctbl_bt601_5 = { + 298, 409, 0, 298, -208, -100, 298, 0, 517, 0, + }; + + /* convert color format */ + switch (format) { + case HAL_PIXEL_FORMAT_RGBA_8888: + case HAL_PIXEL_FORMAT_BGRA_8888: + oc->color_mode = OMAP_DSS_COLOR_ARGB32; + if (blended) + break; + + case HAL_PIXEL_FORMAT_RGBX_8888: + case HAL_PIXEL_FORMAT_BGRX_8888: + oc->color_mode = OMAP_DSS_COLOR_RGB24U; + break; + + case HAL_PIXEL_FORMAT_RGB_565: + oc->color_mode = OMAP_DSS_COLOR_RGB16; + break; + + case HAL_PIXEL_FORMAT_TI_NV12: + case HAL_PIXEL_FORMAT_TI_NV12_1D: + oc->color_mode = OMAP_DSS_COLOR_NV12; + oc->cconv = ctbl_bt601_5; + break; + + default: + /* Should have been filtered out */ + ALOGV("Unsupported pixel format"); + return; + } + + oc->width = width; + oc->height = height; + oc->stride = ALIGN(width, HW_ALIGN) * get_format_bpp(format) / 8; + + oc->enabled = 1; + oc->global_alpha = 255; + oc->zorder = index; + oc->ix = 0; + + /* defaults for SGX framebuffer renders */ + oc->crop.w = oc->win.w = width; + oc->crop.h = oc->win.h = height; + + /* for now interlacing and vc1 info is not supplied */ + oc->ilace = OMAP_DSS_ILACE_NONE; + oc->vc1.enable = 0; +} + +static void setup_layer(omap_hwc_device_t *hwc_dev, struct dss2_ovl_info *ovl, + hwc_layer_1_t *layer, int index, uint32_t format, int width, int height) +{ + struct dss2_ovl_cfg *oc = &ovl->cfg; + + //dump_layer(layer); + + setup_layer_base(oc, index, format, is_BLENDED(layer), width, height); + + /* convert transformation - assuming 0-set config */ + if (layer->transform & HWC_TRANSFORM_FLIP_H) + oc->mirror = 1; + if (layer->transform & HWC_TRANSFORM_FLIP_V) { + oc->rotation = 2; + oc->mirror = !oc->mirror; + } + if (layer->transform & HWC_TRANSFORM_ROT_90) { + oc->rotation += oc->mirror ? -1 : 1; + oc->rotation &= 3; + } + + oc->pre_mult_alpha = layer->blending == HWC_BLENDING_PREMULT; + + /* display position */ + oc->win.x = layer->displayFrame.left; + oc->win.y = layer->displayFrame.top; + oc->win.w = WIDTH(layer->displayFrame); + oc->win.h = HEIGHT(layer->displayFrame); + + /* crop */ + oc->crop.x = layer->sourceCrop.left; + oc->crop.y = layer->sourceCrop.top; + oc->crop.w = WIDTH(layer->sourceCrop); + oc->crop.h = HEIGHT(layer->sourceCrop); +} + +const float m_unit[2][3] = { { 1., 0., 0. }, { 0., 1., 0. } }; + +static inline void m_translate(float m[2][3], float dx, float dy) +{ + m[0][2] += dx; + m[1][2] += dy; +} + +static inline void m_scale1(float m[3], int from, int to) +{ + m[0] = m[0] * to / from; + m[1] = m[1] * to / from; + m[2] = m[2] * to / from; +} + +static inline void m_scale(float m[2][3], int x_from, int x_to, int y_from, int y_to) +{ + m_scale1(m[0], x_from, x_to); + m_scale1(m[1], y_from, y_to); +} + +static void m_rotate(float m[2][3], int quarter_turns) +{ + if (quarter_turns & 2) + m_scale(m, 1, -1, 1, -1); + if (quarter_turns & 1) { + float q; + q = m[0][0]; m[0][0] = -m[1][0]; m[1][0] = q; + q = m[0][1]; m[0][1] = -m[1][1]; m[1][1] = q; + q = m[0][2]; m[0][2] = -m[1][2]; m[1][2] = q; + } +} + +static inline int m_round(float x) +{ + /* int truncates towards 0 */ + return (int) (x < 0 ? x - 0.5 : x + 0.5); +} + +/* + * assuming xpy (xratio:yratio) original pixel ratio, calculate the adjusted width + * and height for a screen of xres/yres and physical size of width/height. + * The adjusted size is the largest that fits into the screen. + */ +static void get_max_dimensions(uint32_t orig_xres, uint32_t orig_yres, + float xpy, + uint32_t scr_xres, uint32_t scr_yres, + uint32_t scr_width, uint32_t scr_height, + uint32_t *adj_xres, uint32_t *adj_yres) +{ + /* assume full screen (largest size)*/ + *adj_xres = scr_xres; + *adj_yres = scr_yres; + + /* assume 1:1 pixel ratios if none supplied */ + if (!scr_width || !scr_height) { + scr_width = scr_xres; + scr_height = scr_yres; + } + + /* trim to keep aspect ratio */ + float x_factor = orig_xres * xpy * scr_height; + float y_factor = orig_yres * scr_width; + + /* allow for tolerance so we avoid scaling if framebuffer is standard size */ + if (x_factor < y_factor * (1.f - ASPECT_RATIO_TOLERANCE)) + *adj_xres = (uint32_t) (x_factor * *adj_xres / y_factor + 0.5); + else if (x_factor * (1.f - ASPECT_RATIO_TOLERANCE) > y_factor) + *adj_yres = (uint32_t) (y_factor * *adj_yres / x_factor + 0.5); +} + +static void set_ext_matrix(omap_hwc_ext_t *ext, struct hwc_rect region) +{ + int orig_w = WIDTH(region); + int orig_h = HEIGHT(region); + float xpy = ext->lcd_xpy; + + /* reorientation matrix is: + m = (center-from-target-center) * (scale-to-target) * (mirror) * (rotate) * (center-to-original-center) */ + + memcpy(ext->m, m_unit, sizeof(m_unit)); + m_translate(ext->m, -(orig_w / 2.0f) - region.left, -(orig_h / 2.0f) - region.top); + m_rotate(ext->m, ext->current.rotation); + if (ext->current.hflip) + m_scale(ext->m, 1, -1, 1, 1); + + if (ext->current.rotation & 1) { + swap(orig_w, orig_h); + xpy = 1. / xpy; + } + + /* get target size */ + uint32_t adj_xres, adj_yres; + get_max_dimensions(orig_w, orig_h, xpy, + ext->xres, ext->yres, ext->width, ext->height, + &adj_xres, &adj_yres); + + m_scale(ext->m, orig_w, adj_xres, orig_h, adj_yres); + m_translate(ext->m, ext->xres >> 1, ext->yres >> 1); +} + +static int +crop_to_rect(struct dss2_ovl_cfg *cfg, struct hwc_rect vis_rect) +{ + struct { + int xy[2]; + int wh[2]; + } crop, win; + struct { + int lt[2]; + int rb[2]; + } vis; + win.xy[0] = cfg->win.x; win.xy[1] = cfg->win.y; + win.wh[0] = cfg->win.w; win.wh[1] = cfg->win.h; + crop.xy[0] = cfg->crop.x; crop.xy[1] = cfg->crop.y; + crop.wh[0] = cfg->crop.w; crop.wh[1] = cfg->crop.h; + vis.lt[0] = vis_rect.left; vis.lt[1] = vis_rect.top; + vis.rb[0] = vis_rect.right; vis.rb[1] = vis_rect.bottom; + + int c; + bool swap = cfg->rotation & 1; + + /* align crop window with display coordinates */ + if (swap) + crop.xy[1] -= (crop.wh[1] = -crop.wh[1]); + if (cfg->rotation & 2) + crop.xy[!swap] -= (crop.wh[!swap] = -crop.wh[!swap]); + if ((!cfg->mirror) ^ !(cfg->rotation & 2)) + crop.xy[swap] -= (crop.wh[swap] = -crop.wh[swap]); + + for (c = 0; c < 2; c++) { + /* see if complete buffer is outside the vis or it is + fully cropped or scaled to 0 */ + if (win.wh[c] <= 0 || vis.rb[c] <= vis.lt[c] || + win.xy[c] + win.wh[c] <= vis.lt[c] || + win.xy[c] >= vis.rb[c] || + !crop.wh[c ^ swap]) + return -ENOENT; + + /* crop left/top */ + if (win.xy[c] < vis.lt[c]) { + /* correction term */ + int a = (vis.lt[c] - win.xy[c]) * crop.wh[c ^ swap] / win.wh[c]; + crop.xy[c ^ swap] += a; + crop.wh[c ^ swap] -= a; + win.wh[c] -= vis.lt[c] - win.xy[c]; + win.xy[c] = vis.lt[c]; + } + /* crop right/bottom */ + if (win.xy[c] + win.wh[c] > vis.rb[c]) { + crop.wh[c ^ swap] = crop.wh[c ^ swap] * (vis.rb[c] - win.xy[c]) / win.wh[c]; + win.wh[c] = vis.rb[c] - win.xy[c]; + } + + if (!crop.wh[c ^ swap] || !win.wh[c]) + return -ENOENT; + } + + /* realign crop window to buffer coordinates */ + if (cfg->rotation & 2) + crop.xy[!swap] -= (crop.wh[!swap] = -crop.wh[!swap]); + if ((!cfg->mirror) ^ !(cfg->rotation & 2)) + crop.xy[swap] -= (crop.wh[swap] = -crop.wh[swap]); + if (swap) + crop.xy[1] -= (crop.wh[1] = -crop.wh[1]); + + cfg->win.x = win.xy[0]; cfg->win.y = win.xy[1]; + cfg->win.w = win.wh[0]; cfg->win.h = win.wh[1]; + cfg->crop.x = crop.xy[0]; cfg->crop.y = crop.xy[1]; + cfg->crop.w = crop.wh[0]; cfg->crop.h = crop.wh[1]; + + return 0; +} + +static void apply_transform(float transform[2][3],struct dss2_ovl_cfg *oc) +{ + float x, y, w, h; + + /* display position */ + x = transform[0][0] * oc->win.x + transform[0][1] * oc->win.y + transform[0][2]; + y = transform[1][0] * oc->win.x + transform[1][1] * oc->win.y + transform[1][2]; + w = transform[0][0] * oc->win.w + transform[0][1] * oc->win.h; + h = transform[1][0] * oc->win.w + transform[1][1] * oc->win.h; + oc->win.x = m_round(w > 0 ? x : x + w); + oc->win.y = m_round(h > 0 ? y : y + h); + oc->win.w = m_round(w > 0 ? w : -w); + oc->win.h = m_round(h > 0 ? h : -h); +} + +static void adjust_ext_layer(omap_hwc_ext_t *ext, struct dss2_ovl_info *ovl) +{ + struct dss2_ovl_cfg *oc = &ovl->cfg; + + /* crop to clone region if mirroring */ + if (!ext->current.docking && + crop_to_rect(&ovl->cfg, ext->mirror_region) != 0) { + ovl->cfg.enabled = 0; + return; + } + + apply_transform(ext->m, oc); + + /* combining transformations: F^a*R^b*F^i*R^j = F^(a+b)*R^(j+b*(-1)^i), because F*R = R^(-1)*F */ + oc->rotation += (oc->mirror ? -1 : 1) * ext->current.rotation; + oc->rotation &= 3; + if (ext->current.hflip) + oc->mirror = !oc->mirror; +} + +static struct dsscomp_platform_info limits; + +static void adjust_primary_display_layer(omap_hwc_device_t *hwc_dev, struct dss2_ovl_info *ovl) +{ + struct dss2_ovl_cfg *oc = &ovl->cfg; + + if (crop_to_rect(&ovl->cfg, hwc_dev->primary_region) != 0) { + ovl->cfg.enabled = 0; + return; + } + + apply_transform(hwc_dev->primary_m, oc); + + /* combining transformations: F^a*R^b*F^i*R^j = F^(a+b)*R^(j+b*(-1)^i), because F*R = R^(-1)*F */ + oc->rotation += (oc->mirror ? -1 : 1) * hwc_dev->primary_rotation; + oc->rotation &= 3; +} + +static bool can_scale(uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, bool is_2d, + struct dsscomp_display_info *dis, struct dsscomp_platform_info *limits, + uint32_t pclk, IMG_native_handle_t *handle) +{ + uint32_t fclk = limits->fclk / 1000; + uint32_t min_src_w = DIV_ROUND_UP(src_w, is_2d ? limits->max_xdecim_2d : limits->max_xdecim_1d); + uint32_t min_src_h = DIV_ROUND_UP(src_h, is_2d ? limits->max_ydecim_2d : limits->max_ydecim_1d); + + /* ERRATAs */ + /* cannot render 1-width layers on DSI video mode panels - we just disallow all 1-width LCD layers */ + if (dis->channel != OMAP_DSS_CHANNEL_DIGIT && dst_w < limits->min_width) + return false; + + /* NOTE: no support for checking YUV422 layers that are tricky to scale */ + + /* FIXME: limit vertical downscale well below theoretical limit as we saw display artifacts */ + if (dst_h < src_h / 4) + return false; + + /* max downscale */ + if (dst_h * limits->max_downscale < min_src_h) + return false; + + /* for manual panels pclk is 0, and there are no pclk based scaling limits */ + if (!pclk) + return !(dst_w < src_w / limits->max_downscale / (is_2d ? limits->max_xdecim_2d : limits->max_xdecim_1d)); + + /* :HACK: limit horizontal downscale well below theoretical limit as we saw display artifacts */ + if (dst_w * 4 < src_w) + return false; + + if (handle) + if (get_format_bpp(handle->iFormat) == 32 && src_w > 1280 && dst_w * 3 < src_w) + return false; + + /* max horizontal downscale is 4, or the fclk/pixclk */ + if (fclk > pclk * limits->max_downscale) + fclk = pclk * limits->max_downscale; + /* for small parts, we need to use integer fclk/pixclk */ + if (src_w < limits->integer_scale_ratio_limit) + fclk = fclk / pclk * pclk; + if ((uint32_t) dst_w * fclk < min_src_w * pclk) + return false; + + return true; +} + +static bool can_scale_layer(omap_hwc_device_t *hwc_dev, hwc_layer_1_t *layer, IMG_native_handle_t *handle) +{ + int src_w = WIDTH(layer->sourceCrop); + int src_h = HEIGHT(layer->sourceCrop); + int dst_w = WIDTH(layer->displayFrame); + int dst_h = HEIGHT(layer->displayFrame); + + /* account for 90-degree rotation */ + if (layer->transform & HWC_TRANSFORM_ROT_90) + swap(src_w, src_h); + + /* NOTE: layers should be able to be scaled externally since + framebuffer is able to be scaled on selected external resolution */ + return can_scale(src_w, src_h, dst_w, dst_h, is_NV12(handle), &hwc_dev->fb_dis, &limits, + hwc_dev->fb_dis.timings.pixel_clock, handle); +} + +static bool is_valid_layer(omap_hwc_device_t *hwc_dev, hwc_layer_1_t *layer, IMG_native_handle_t *handle) +{ + /* Skip layers are handled by SF */ + if ((layer->flags & HWC_SKIP_LAYER) || !handle) + return false; + + if (!is_valid_format(handle->iFormat)) + return false; + + /* 1D buffers: no transform, must fit in TILER slot */ + if (!is_NV12(handle)) { + if (layer->transform) + return false; + if (mem1d(handle) > limits.tiler1d_slot_size) + return false; + } + + return can_scale_layer(hwc_dev, layer, handle); +} + +static uint32_t add_scaling_score(uint32_t score, + uint32_t xres, uint32_t yres, uint32_t refresh, + uint32_t ext_xres, uint32_t ext_yres, + uint32_t mode_xres, uint32_t mode_yres, uint32_t mode_refresh) +{ + uint32_t area = xres * yres; + uint32_t ext_area = ext_xres * ext_yres; + uint32_t mode_area = mode_xres * mode_yres; + + /* prefer to upscale (1% tolerance) [0..1] (insert after 1st bit) */ + int upscale = (ext_xres >= xres * 99 / 100 && ext_yres >= yres * 99 / 100); + score = (((score & ~1) | upscale) << 1) | (score & 1); + + /* pick minimum scaling [0..16] */ + if (ext_area > area) + score = (score << 5) | (16 * area / ext_area); + else + score = (score << 5) | (16 * ext_area / area); + + /* pick smallest leftover area [0..16] */ + score = (score << 5) | ((16 * ext_area + (mode_area >> 1)) / mode_area); + + /* adjust mode refresh rate */ + mode_refresh += mode_refresh % 6 == 5; + + /* prefer same or higher frame rate */ + upscale = (mode_refresh >= refresh); + score = (score << 1) | upscale; + + /* pick closest frame rate */ + if (mode_refresh > refresh) + score = (score << 8) | (240 * refresh / mode_refresh); + else + score = (score << 8) | (240 * mode_refresh / refresh); + + return score; +} + +static int set_best_hdmi_mode(omap_hwc_device_t *hwc_dev, uint32_t xres, uint32_t yres, float xpy) +{ + int dis_ix = hwc_dev->on_tv ? 0 : 1; + struct _qdis { + struct dsscomp_display_info dis; + struct dsscomp_videomode modedb[32]; + } d = { .dis = { .ix = dis_ix } }; + omap_hwc_ext_t *ext = &hwc_dev->ext; + + d.dis.modedb_len = sizeof(d.modedb) / sizeof(*d.modedb); + int ret = ioctl(hwc_dev->dsscomp_fd, DSSCIOC_QUERY_DISPLAY, &d); + if (ret) + return ret; + + if (d.dis.timings.x_res * d.dis.timings.y_res == 0 || + xres * yres == 0) + return -EINVAL; + + uint32_t i, best = ~0, best_score = 0; + ext->width = d.dis.width_in_mm; + ext->height = d.dis.height_in_mm; + ext->xres = d.dis.timings.x_res; + ext->yres = d.dis.timings.y_res; + + /* use VGA external resolution as default */ + if (!ext->xres || !ext->yres) { + ext->xres = 640; + ext->yres = 480; + } + + uint32_t ext_fb_xres, ext_fb_yres; + for (i = 0; i < d.dis.modedb_len; i++) { + uint32_t score = 0; + uint32_t mode_xres = d.modedb[i].xres; + uint32_t mode_yres = d.modedb[i].yres; + uint32_t ext_width = d.dis.width_in_mm; + uint32_t ext_height = d.dis.height_in_mm; + + if (d.modedb[i].vmode & FB_VMODE_INTERLACED) + mode_yres /= 2; + + if (d.modedb[i].flag & FB_FLAG_RATIO_4_3) { + ext_width = 4; + ext_height = 3; + } else if (d.modedb[i].flag & FB_FLAG_RATIO_16_9) { + ext_width = 16; + ext_height = 9; + } + + if (!mode_xres || !mode_yres) + continue; + + get_max_dimensions(xres, yres, xpy, mode_xres, mode_yres, + ext_width, ext_height, &ext_fb_xres, &ext_fb_yres); + + /* we need to ensure that even TILER2D buffers can be scaled */ + if (!d.modedb[i].pixclock || + (d.modedb[i].vmode & ~FB_VMODE_INTERLACED) || + !can_scale(xres, yres, ext_fb_xres, ext_fb_yres, + 1, &d.dis, &limits, + 1000000000 / d.modedb[i].pixclock, NULL)) + continue; + + /* prefer CEA modes */ + if (d.modedb[i].flag & (FB_FLAG_RATIO_4_3 | FB_FLAG_RATIO_16_9)) + score = 1; + + /* prefer the same mode as we use for mirroring to avoid mode change */ + score = (score << 1) | (i == ~ext->mirror_mode && ext->avoid_mode_change); + + score = add_scaling_score(score, xres, yres, 60, ext_fb_xres, ext_fb_yres, + mode_xres, mode_yres, d.modedb[i].refresh ? : 1); + + ALOGD("#%d: %dx%d %dHz", i, mode_xres, mode_yres, d.modedb[i].refresh); + if (debug) + ALOGD(" score=0x%x adj.res=%dx%d", score, ext_fb_xres, ext_fb_yres); + if (best_score < score) { + ext->width = ext_width; + ext->height = ext_height; + ext->xres = mode_xres; + ext->yres = mode_yres; + best = i; + best_score = score; + } + } + if (~best) { + struct dsscomp_setup_display_data sdis = { .ix = dis_ix }; + sdis.mode = d.dis.modedb[best]; + ALOGD("picking #%d", best); + /* only reconfigure on change */ + if (ext->last_mode != ~best) + ioctl(hwc_dev->dsscomp_fd, DSSCIOC_SETUP_DISPLAY, &sdis); + ext->last_mode = ~best; + } else { + uint32_t ext_width = d.dis.width_in_mm; + uint32_t ext_height = d.dis.height_in_mm; + uint32_t ext_fb_xres, ext_fb_yres; + + get_max_dimensions(xres, yres, xpy, d.dis.timings.x_res, d.dis.timings.y_res, + ext_width, ext_height, &ext_fb_xres, &ext_fb_yres); + if (!d.dis.timings.pixel_clock || + !can_scale(xres, yres, ext_fb_xres, ext_fb_yres, + 1, &d.dis, &limits, + d.dis.timings.pixel_clock, NULL)) { + ALOGW("DSS scaler cannot support HDMI cloning"); + return -1; + } + } + ext->last_xres_used = xres; + ext->last_yres_used = yres; + ext->last_xpy = xpy; + if (d.dis.channel == OMAP_DSS_CHANNEL_DIGIT) + ext->on_tv = 1; + return 0; +} + +static void gather_layer_statistics(omap_hwc_device_t *hwc_dev, hwc_display_contents_1_t *list) +{ + uint32_t i; + counts_t *num = &hwc_dev->counts; + + memset(num, 0, sizeof(*num)); + + num->composited_layers = list ? list->numHwLayers : 0; + + /* Figure out how many layers we can support via DSS */ + for (i = 0; list && i < list->numHwLayers; i++) { + hwc_layer_1_t *layer = &list->hwLayers[i]; + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; +#ifdef OMAP_ENHANCEMENT_S3D + uint32_t s3d_layout_type = get_s3d_layout_type(layer); +#endif + + layer->compositionType = HWC_FRAMEBUFFER; + + if (is_valid_layer(hwc_dev, layer, handle)) { +#ifdef OMAP_ENHANCEMENT_S3D + if (s3d_layout_type != eMono) { + /* For now we can only handle 1 S3D layer, skip any additional ones */ + if (num->s3d > 0 || !hwc_dev->ext.dock.enabled || !hwc_dev->ext.s3d_capable) { + layer->flags |= HWC_SKIP_LAYER; + continue; + } else if (num->s3d == 0) { + /* For now, S3D layer is made a dockable layer to trigger docking logic. */ + if (!dockable(layer)) { + num->dockable++; + } + num->s3d++; + hwc_dev->s3d_input_type = s3d_layout_type; + hwc_dev->s3d_input_order = get_s3d_layout_order(layer); + } + } +#endif + num->possible_overlay_layers++; + + /* NV12 layers can only be rendered on scaling overlays */ + if (scaled(layer) || is_NV12(handle) || hwc_dev->primary_transform) + num->scaled_layers++; + + if (is_BGR(handle)) + num->BGR++; + else if (is_RGB(handle)) + num->RGB++; + else if (is_NV12(handle)) + num->NV12++; + + if (dockable(layer)) + num->dockable++; + + if (is_protected(layer)) + num->protected++; + + num->mem += mem1d(handle); + } + } +} + +static void decide_supported_cloning(omap_hwc_device_t *hwc_dev) +{ + omap_hwc_ext_t *ext = &hwc_dev->ext; + counts_t *num = &hwc_dev->counts; + int nonscaling_ovls = NUM_NONSCALING_OVERLAYS; + num->max_hw_overlays = MAX_HW_OVERLAYS; + + /* + * We cannot atomically switch overlays from one display to another. First, they + * have to be disabled, and the disabling has to take effect on the current display. + * We keep track of the available number of overlays here. + */ + if (ext->dock.enabled && !(ext->mirror.enabled && !(num->dockable || ext->force_dock))) { + /* some overlays may already be used by the external display, so we account for this */ + + /* reserve just a video pipeline for HDMI if docking */ + hwc_dev->ext_ovls = (num->dockable || ext->force_dock) ? 1 : 0; +#ifdef OMAP_ENHANCEMENT_S3D + if (num->s3d && (hwc_dev->ext.s3d_type != hwc_dev->s3d_input_type)) { + /* S3D layers are dockable, and they need two overlays */ + hwc_dev->ext_ovls += 1; + } +#endif + num->max_hw_overlays -= max(hwc_dev->ext_ovls, hwc_dev->last_ext_ovls); + + /* use mirroring transform if we are auto-switching to docking mode while mirroring*/ + if (ext->mirror.enabled) { + ext->current = ext->mirror; + ext->current.docking = 1; + } else { + ext->current = ext->dock; + } + } else if (ext->mirror.enabled) { + /* + * otherwise, manage just from half the pipelines. NOTE: there is + * no danger of having used too many overlays for external display here. + */ + num->max_hw_overlays >>= 1; + nonscaling_ovls >>= 1; + hwc_dev->ext_ovls = MAX_HW_OVERLAYS - num->max_hw_overlays; + ext->current = ext->mirror; + } else { + num->max_hw_overlays -= hwc_dev->last_ext_ovls; + hwc_dev->ext_ovls = 0; + ext->current.enabled = 0; + } + + /* + * :TRICKY: We may not have enough overlays on the external display. We "reserve" them + * here to figure out if mirroring is supported, but may not do mirroring for the first + * frame while the overlays required for it are cleared. + */ + hwc_dev->ext_ovls_wanted = hwc_dev->ext_ovls; + hwc_dev->ext_ovls = min(MAX_HW_OVERLAYS - hwc_dev->last_int_ovls, hwc_dev->ext_ovls); + + /* if mirroring, we are limited by both internal and external overlays. However, + ext_ovls is always <= MAX_HW_OVERLAYS / 2 <= max_hw_overlays */ + if (!num->protected && hwc_dev->ext_ovls && ext->current.enabled && !ext->current.docking) + num->max_hw_overlays = hwc_dev->ext_ovls; + + /* If FB is not same resolution as LCD don't use GFX pipe line*/ + if (hwc_dev->primary_transform) { + num->max_hw_overlays -= NUM_NONSCALING_OVERLAYS; + num->max_scaling_overlays = num->max_hw_overlays; + } else + num->max_scaling_overlays = num->max_hw_overlays - nonscaling_ovls; +} + +static bool can_dss_render_all(omap_hwc_device_t *hwc_dev) +{ + omap_hwc_ext_t *ext = &hwc_dev->ext; + counts_t *num = &hwc_dev->counts; + bool on_tv = hwc_dev->on_tv || (ext->on_tv && ext->current.enabled); + bool tform = ext->current.enabled && (ext->current.rotation || ext->current.hflip); + + return !hwc_dev->force_sgx && + /* must have at least one layer if using composition bypass to get sync object */ + num->possible_overlay_layers && + num->possible_overlay_layers <= num->max_hw_overlays && + num->possible_overlay_layers == num->composited_layers && + num->scaled_layers <= num->max_scaling_overlays && + num->NV12 <= num->max_scaling_overlays && + /* fits into TILER slot */ + num->mem <= limits.tiler1d_slot_size && + /* we cannot clone non-NV12 transformed layers */ + (!tform || (num->NV12 == num->possible_overlay_layers) || + (num->NV12 && ext->current.docking)) && + /* HDMI cannot display BGR */ + (num->BGR == 0 || (num->RGB == 0 && !on_tv) || !hwc_dev->flags_rgb_order) && + /* If nv12_only flag is set DSS should only render NV12 */ + (!hwc_dev->flags_nv12_only || (num->BGR == 0 && num->RGB == 0)); +} + +static inline bool can_dss_render_layer(omap_hwc_device_t *hwc_dev, hwc_layer_1_t *layer) +{ + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + + omap_hwc_ext_t *ext = &hwc_dev->ext; + bool cloning = ext->current.enabled && (!ext->current.docking || (handle!=NULL ? dockable(layer) : 0)); + bool on_tv = hwc_dev->on_tv || (ext->on_tv && cloning); + bool tform = cloning && (ext->current.rotation || ext->current.hflip); + + return is_valid_layer(hwc_dev, layer, handle) && + /* cannot rotate non-NV12 layers on external display */ + (!tform || is_NV12(handle)) && + /* skip non-NV12 layers if also using SGX (if nv12_only flag is set) */ + (!hwc_dev->flags_nv12_only || (!hwc_dev->use_sgx || is_NV12(handle))) && + /* make sure RGB ordering is consistent (if rgb_order flag is set) */ + (!(hwc_dev->swap_rb ? is_RGB(handle) : is_BGR(handle)) || + !hwc_dev->flags_rgb_order) && + /* TV can only render RGB */ + !(on_tv && is_BGR(handle)); +} + +static inline int display_area(struct dss2_ovl_info *o) +{ + return o->cfg.win.w * o->cfg.win.h; +} + +static int clone_layer(omap_hwc_device_t *hwc_dev, int ix) { + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + omap_hwc_ext_t *ext = &hwc_dev->ext; + int ext_ovl_ix = dsscomp->num_ovls - hwc_dev->post2_layers; + struct dss2_ovl_info *o = &dsscomp->ovls[dsscomp->num_ovls]; + + if (dsscomp->num_ovls >= MAX_HW_OVERLAYS) { + ALOGE("**** cannot clone layer #%d. using all %d overlays.", ix, dsscomp->num_ovls); + return -EBUSY; + } + + memcpy(o, dsscomp->ovls + ix, sizeof(*o)); + + /* reserve overlays at end for other display */ + o->cfg.ix = MAX_HW_OVERLAYS - 1 - ext_ovl_ix; + o->cfg.mgr_ix = 1; + /* + * Here the assumption is that overlay0 is the one attached to FB. + * Hence this clone_layer call is for FB cloning (provided use_sgx is true). + */ + /* For the external displays whose transform is the same as + * that of primary display, ion_handles would be NULL hence + * the below logic doesn't execute. + */ + if (ix == 0 && hwc_dev->ion_handles[sync_id%2] && hwc_dev->use_sgx) { + o->addressing = OMAP_DSS_BUFADDR_ION; + o->ba = (int)hwc_dev->ion_handles[sync_id%2]; + } else { + o->addressing = OMAP_DSS_BUFADDR_OVL_IX; + o->ba = ix; + } + + /* use distinct z values (to simplify z-order checking) */ + o->cfg.zorder += hwc_dev->post2_layers; + + adjust_ext_layer(&hwc_dev->ext, o); + dsscomp->num_ovls++; + return 0; +} + +static int clone_external_layer(omap_hwc_device_t *hwc_dev, int ix) { + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + omap_hwc_ext_t *ext = &hwc_dev->ext; + + /* mirror only 1 external layer */ + struct dss2_ovl_info *o = &dsscomp->ovls[ix]; + + /* full screen video after transformation */ + uint32_t xres = o->cfg.crop.w, yres = o->cfg.crop.h; + if ((ext->current.rotation + o->cfg.rotation) & 1) + swap(xres, yres); + float xpy = ext->lcd_xpy * o->cfg.win.w / o->cfg.win.h; + if (o->cfg.rotation & 1) + xpy = o->cfg.crop.h / xpy / o->cfg.crop.w; + else + xpy = o->cfg.crop.h * xpy / o->cfg.crop.w; + if (ext->current.rotation & 1) + xpy = 1. / xpy; + + /* adjust hdmi mode based on resolution */ + if (xres != ext->last_xres_used || + yres != ext->last_yres_used || + xpy < ext->last_xpy * (1.f - ASPECT_RATIO_TOLERANCE) || + xpy * (1.f - ASPECT_RATIO_TOLERANCE) > ext->last_xpy) { + ALOGD("set up HDMI for %d*%d\n", xres, yres); + if (set_best_hdmi_mode(hwc_dev, xres, yres, xpy)) { + ext->current.enabled = 0; + return -ENODEV; + } + } + + struct hwc_rect region = { + .left = o->cfg.win.x, .top = o->cfg.win.y, + .right = o->cfg.win.x + o->cfg.win.w, + .bottom = o->cfg.win.y + o->cfg.win.h + }; + set_ext_matrix(&hwc_dev->ext, region); + + return clone_layer(hwc_dev, ix); +} + +#ifdef OMAP_ENHANCEMENT_S3D +const char hdmiS3DTypePath[] = "/sys/devices/platform/omapdss/display1/s3d_type"; +const char hdmiS3DEnablePath[] = "/sys/devices/platform/omapdss/display1/s3d_enable"; + +static void enable_s3d_hdmi(omap_hwc_device_t *hwc_dev, bool enable) +{ + size_t bytesWritten; + char data; + int fd; + + if (hwc_dev->ext.s3d_enabled == enable) { + return; + } + + if (enable) { + char type[2]; + + switch(hwc_dev->ext.s3d_type) { + case eSideBySide: + snprintf(type, sizeof(type), "%d", HDMI_SIDE_BY_SIDE_HALF); + break; + case eTopBottom: + snprintf(type, sizeof(type), "%d", HDMI_TOPBOTTOM); + break; + default: + return; + } + + fd = open(hdmiS3DTypePath, O_WRONLY); + if (fd < 0) { + ALOGE("Failed to open sysfs %s", hdmiS3DTypePath); + return; + } + bytesWritten = write(fd, type, sizeof(type)); + close(fd); + + if (bytesWritten != sizeof(type)) { + ALOGE("Failed to write (%s) to sysfs %s", type, hdmiS3DTypePath); + return; + } + } + data = enable ? '1' : '0'; + + fd = open(hdmiS3DEnablePath, O_WRONLY); + if (fd < 0) { + ALOGE("Failed to open sysfs %s", hdmiS3DEnablePath); + return; + } + bytesWritten = write(fd, &data, 1); + close(fd); + + if (bytesWritten != 1) { + ALOGE("Failed to write(%d) to sysfs %s", enable, hdmiS3DEnablePath); + return; + } + + hwc_dev->ext.s3d_enabled = enable; +} + +static void adjust_ext_s3d_layer(omap_hwc_device_t *hwc_dev, + struct dss2_ovl_info *ovl, bool left_view) +{ + struct dss2_ovl_cfg *oc = &ovl->cfg; + float x, y, w, h; + + switch (hwc_dev->s3d_input_type) { + case eSideBySide: + oc->crop.w = oc->crop.w/2; + if ((left_view && hwc_dev->s3d_input_order == eRightViewFirst) || + (!left_view && hwc_dev->s3d_input_order == eLeftViewFirst)) { + oc->crop.x = oc->crop.x + oc->crop.w; + } + break; + case eTopBottom: + oc->crop.h = oc->crop.h/2; + if ((left_view && hwc_dev->s3d_input_order == eRightViewFirst) || + (!left_view && hwc_dev->s3d_input_order == eLeftViewFirst)) { + oc->crop.y = oc->crop.y + oc->crop.h; + } + break; + default: + /* Should never fall here! */ + ALOGE("Unsupported S3D layer type!"); + break; + } + + switch (hwc_dev->ext.s3d_type) { + case eSideBySide: + oc->win.w = oc->win.w/2; + if ((left_view && hwc_dev->ext.s3d_order == eRightViewFirst) || + (!left_view && hwc_dev->ext.s3d_order == eLeftViewFirst)) { + oc->win.x = oc->win.x/2 + hwc_dev->ext.xres/2; + } else { + oc->win.x = oc->win.x/2; + } + break; + case eTopBottom: + oc->win.h = oc->win.h/2; + if ((left_view && hwc_dev->ext.s3d_order == eRightViewFirst) || + (!left_view && hwc_dev->ext.s3d_order == eLeftViewFirst)) { + oc->win.y = oc->win.y/2 + hwc_dev->ext.yres/2; + } else { + oc->win.y = oc->win.y/2; + } + break; + default: + /* Currently unhandled!!! */ + ALOGE("Unsupported S3D display type!"); + break; + } +} + +static int clone_s3d_external_layer(omap_hwc_device_t *hwc_dev, int ix_s3d) +{ + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + int r; + + /* S3D layers are forced into docking layers. If the display layout and + * the layer layout don't match, we have to use 2 overlay pipelines */ + r = clone_external_layer(hwc_dev, ix_s3d); + if (r) { + ALOGE("Failed to clone s3d layer (%d)", r); + return r; + } + + r = clone_layer(hwc_dev, ix_s3d); + if (r) { + ALOGE("Failed to clone s3d layer (%d)", r); + return r; + } + + if (dsscomp->num_ovls < 2) { + ALOGE("Number of overlays is inconsistent (%d)", dsscomp->num_ovls); + return -EINVAL; + } + + adjust_ext_s3d_layer(hwc_dev, &dsscomp->ovls[dsscomp->num_ovls - 1], true); + adjust_ext_s3d_layer(hwc_dev, &dsscomp->ovls[dsscomp->num_ovls - 2], false); + + return 0; +} +#endif +static int setup_mirroring(omap_hwc_device_t *hwc_dev) +{ + omap_hwc_ext_t *ext = &hwc_dev->ext; + + uint32_t xres = WIDTH(ext->mirror_region); + uint32_t yres = HEIGHT(ext->mirror_region); + if (ext->current.rotation & 1) + swap(xres, yres); + if (set_best_hdmi_mode(hwc_dev, xres, yres, ext->lcd_xpy)) + return -ENODEV; + set_ext_matrix(ext, ext->mirror_region); + return 0; +} + +/* + * We're using "implicit" synchronization, so make sure we aren't passing any + * sync object descriptors around. + */ +static void check_sync_fds(size_t numDisplays, hwc_display_contents_1_t** displays) +{ + //ALOGD("checking sync FDs"); + unsigned int i, j; + for (i = 0; i < numDisplays; i++) { + hwc_display_contents_1_t* list = displays[i]; + if (list->retireFenceFd >= 0) { + ALOGW("retireFenceFd[%u] was %d", i, list->retireFenceFd); + list->retireFenceFd = -1; + } + + for (j = 0; j < list->numHwLayers; j++) { + hwc_layer_1_t* layer = &list->hwLayers[j]; + if (layer->acquireFenceFd >= 0) { + ALOGW("acquireFenceFd[%u][%u] was %d, closing", i, j, layer->acquireFenceFd); + close(layer->acquireFenceFd); + layer->acquireFenceFd = -1; + } + if (layer->releaseFenceFd >= 0) { + ALOGW("releaseFenceFd[%u][%u] was %d", i, j, layer->releaseFenceFd); + layer->releaseFenceFd = -1; + } + } + } +} + +static void blit_reset(omap_hwc_device_t *hwc_dev) +{ + hwc_dev->blit_flags = 0; + hwc_dev->blit_num = 0; + hwc_dev->post2_blit_buffers = 0; + hwc_dev->comp_data.blit_data.rgz_items = 0; +} + +static bool blit_layers(omap_hwc_device_t *hwc_dev, hwc_display_contents_1_t *list, int bufoff) +{ + if (!list || hwc_dev->ext.mirror.enabled) + goto err_out; + + int rgz_in_op; + int rgz_out_op; + + switch (hwc_dev->blt_mode) { + case BLTMODE_PAINT: + rgz_in_op = RGZ_IN_HWCCHK; + rgz_out_op = RGZ_OUT_BVCMD_PAINT; + break; + case BLTMODE_REGION: + default: + rgz_in_op = RGZ_IN_HWC; + rgz_out_op = RGZ_OUT_BVCMD_REGION; + break; + } + + /* + * Request the layer identities to SurfaceFlinger, first figure out if the + * operation is supported + */ + if (!(list->flags & HWC_EXTENDED_API) || !hwc_dev->procs || + hwc_dev->procs->extension_cb(hwc_dev->procs, HWC_EXTENDED_OP_LAYERDATA, NULL, -1) != 0) + goto err_out; + + /* Check if we have enough space in the extended layer list */ + if ((sizeof(hwc_layer_extended_t) * list->numHwLayers) > sizeof(grgz_ext_layer_list)) + goto err_out; + + uint32_t i; + for (i = 0; i < list->numHwLayers; i++) { + hwc_layer_extended_t *ext_layer = &grgz_ext_layer_list.layers[i]; + ext_layer->idx = i; + if (hwc_dev->procs->extension_cb(hwc_dev->procs, HWC_EXTENDED_OP_LAYERDATA, + (void **) &ext_layer, sizeof(hwc_layer_extended_t)) != 0) + goto err_out; + } + + rgz_in_params_t in = { + .op = rgz_in_op, + .data = { + .hwc = { + .dstgeom = &gscrngeom, + .layers = list->hwLayers, + .extlayers = grgz_ext_layer_list.layers, + .layerno = list->numHwLayers + } + } + }; + + /* + * This means if all the layers marked for the FRAMEBUFFER cannot be + * blitted, do not blit, for e.g. SKIP layers + */ + if (rgz_in(&in, &grgz) != RGZ_ALL) + goto err_out; + + uint32_t count = 0; + for (i = 0; i < list->numHwLayers; i++) { + if (list->hwLayers[i].compositionType != HWC_OVERLAY) { + count++; + } + } + + rgz_out_params_t out = { + .op = rgz_out_op, + .data = { + .bvc = { + .dstgeom = &gscrngeom, + .noblend = 0, + } + } + }; + + if (rgz_out(&grgz, &out) != 0) { + ALOGE("Failed generating blits"); + goto err_out; + } + + /* This is a special situation where the regionizer decided no blits are + * needed for this frame but there are blit buffers to synchronize with. Can + * happen only if the regionizer is enabled otherwise it's likely a bug + */ + if (rgz_out_op != RGZ_OUT_BVCMD_REGION && out.data.bvc.out_blits == 0 && out.data.bvc.out_nhndls > 0) { + ALOGE("Regionizer invalid output blit_num %d, post2_blit_buffers %d", out.data.bvc.out_blits, out.data.bvc.out_nhndls); + goto err_out; + } + + hwc_dev->blit_flags |= HWC_BLT_FLAG_USE_FB; + hwc_dev->blit_num = out.data.bvc.out_blits; + hwc_dev->post2_blit_buffers = out.data.bvc.out_nhndls; + for (i = 0; i < hwc_dev->post2_blit_buffers; i++) { + //ALOGI("blit buffers[%d] = %p", bufoff, out.data.bvc.out_hndls[i]); + hwc_dev->buffers[bufoff++] = out.data.bvc.out_hndls[i]; + } + + struct rgz_blt_entry *res_blit_ops = (struct rgz_blt_entry *) out.data.bvc.cmdp; + memcpy(hwc_dev->comp_data.blit_data.rgz_blts, res_blit_ops, sizeof(*res_blit_ops) * out.data.bvc.cmdlen); + ALOGI_IF(debugblt, "blt struct sz %d", sizeof(*res_blit_ops) * out.data.bvc.cmdlen); + ALOGE_IF(hwc_dev->blit_num != out.data.bvc.cmdlen,"blit_num != out.data.bvc.cmdlen, %d != %d", hwc_dev->blit_num, out.data.bvc.cmdlen); + + /* all layers will be rendered without SGX help either via DSS or blitter */ + for (i = 0; i < list->numHwLayers; i++) { + if (list->hwLayers[i].compositionType != HWC_OVERLAY) { + list->hwLayers[i].compositionType = HWC_OVERLAY; + //ALOGI("blitting layer %d", i); + list->hwLayers[i].hints &= ~HWC_HINT_TRIPLE_BUFFER; + } + list->hwLayers[i].hints &= ~HWC_HINT_CLEAR_FB; + } + return true; + +err_out: + rgz_release(&grgz); + return false; +} + +void debug_post2(omap_hwc_device_t *hwc_dev, int nbufs) +{ + if (!debugpost2) + return; + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + int i; + for (i=0; ibuffers[i]); + } + for (i=0; i < dsscomp->num_ovls; i++) { + ALOGI("ovl[%d] ba %d", i, dsscomp->ovls[i].ba); + } +} + +static int free_tiler2d_buffers(omap_hwc_device_t *hwc_dev) +{ + int i; + + for (i = 0 ; i < NUM_EXT_DISPLAY_BACK_BUFFERS; i++) { + ion_free(hwc_dev->ion_fd, hwc_dev->ion_handles[i]); + hwc_dev->ion_handles[i] = NULL; + } + return 0; +} + +static int allocate_tiler2d_buffers(omap_hwc_device_t *hwc_dev) +{ + int ret, i; + size_t stride; + + if (hwc_dev->ion_fd < 0) { + ALOGE("No ion fd, hence can't allocate tiler2d buffers"); + return -1; + } + + for (i = 0; i < NUM_EXT_DISPLAY_BACK_BUFFERS; i++) { + if (hwc_dev->ion_handles[i]) + return 0; + } + + for (i = 0 ; i < NUM_EXT_DISPLAY_BACK_BUFFERS; i++) { + ret = ion_alloc_tiler(hwc_dev->ion_fd, hwc_dev->fb_dev->base.width, hwc_dev->fb_dev->base.height, + TILER_PIXEL_FMT_32BIT, 0, &hwc_dev->ion_handles[i], &stride); + if (ret) + goto handle_error; + + ALOGI("ion handle[%d][%p]", i, hwc_dev->ion_handles[i]); + } + return 0; + +handle_error: + free_tiler2d_buffers(hwc_dev); + return -1; +} + +static int hwc_prepare(struct hwc_composer_device_1 *dev, size_t numDisplays, + hwc_display_contents_1_t** displays) +{ + if (!numDisplays || displays == NULL) { + return 0; + } + + hwc_display_contents_1_t* list = displays[0]; // ignore displays beyond the first + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *)dev; + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + counts_t *num = &hwc_dev->counts; + uint32_t i, ix; + + pthread_mutex_lock(&hwc_dev->lock); + memset(dsscomp, 0x0, sizeof(*dsscomp)); + dsscomp->sync_id = sync_id++; + + gather_layer_statistics(hwc_dev, list); + + decide_supported_cloning(hwc_dev); + + /* phase 3 logic */ + if (can_dss_render_all(hwc_dev)) { + /* All layers can be handled by the DSS -- don't use SGX for composition */ + hwc_dev->use_sgx = 0; + hwc_dev->swap_rb = num->BGR != 0; + } else { + /* Use SGX for composition plus first 3 layers that are DSS renderable */ + hwc_dev->use_sgx = 1; + hwc_dev->swap_rb = is_BGR_format(hwc_dev->fb_dev->base.format); + } + + /* setup pipes */ + int z = 0; + int fb_z = -1; + int ix_docking = -1; +#ifdef OMAP_ENHANCEMENT_S3D + int ix_s3d = -1; +#endif + bool scaled_gfx = false; + bool blit_all = false; + blit_reset(hwc_dev); + + /* If the SGX is used or we are going to blit something we need a framebuffer + * and a DSS pipe + */ + bool needs_fb = hwc_dev->use_sgx; + + if (hwc_dev->blt_policy == BLTPOLICY_ALL) { + /* Check if we can blit everything */ + blit_all = blit_layers(hwc_dev, list, 0); + if (blit_all) { + needs_fb = 1; + hwc_dev->use_sgx = 0; + /* No need to swap red and blue channels */ + hwc_dev->swap_rb = 0; + } + } + + /* If a framebuffer is needed, begin using VID1 for DSS overlay layers, + * we need GFX for FB + */ + dsscomp->num_ovls = needs_fb ? 1 /*VID1*/ : 0 /*GFX*/; + + /* set up if DSS layers */ + uint32_t mem_used = 0; + for (i = 0; list && i < list->numHwLayers && !blit_all; i++) { + hwc_layer_1_t *layer = &list->hwLayers[i]; + IMG_native_handle_t *handle = (IMG_native_handle_t *)layer->handle; + + if (dsscomp->num_ovls < num->max_hw_overlays && + can_dss_render_layer(hwc_dev, layer) && + (!hwc_dev->force_sgx || + /* render protected and dockable layers via DSS */ + is_protected(layer) || + is_upscaled_NV12(hwc_dev, layer) || + (hwc_dev->ext.current.docking && hwc_dev->ext.current.enabled && dockable(layer))) && + mem_used + mem1d(handle) <= limits.tiler1d_slot_size && + /* can't have a transparent overlay in the middle of the framebuffer stack */ + !(is_BLENDED(layer) && fb_z >= 0)) { + + /* render via DSS overlay */ + mem_used += mem1d(handle); + layer->compositionType = HWC_OVERLAY; + /* + * This hint will not be used in vanilla ICS, but maybe in + * JellyBean, it is useful to distinguish between blts and true + * overlays + */ + layer->hints |= HWC_HINT_TRIPLE_BUFFER; + + /* clear FB above all opaque layers if rendering via SGX */ + if (hwc_dev->use_sgx && !is_BLENDED(layer)) + layer->hints |= HWC_HINT_CLEAR_FB; + + hwc_dev->buffers[dsscomp->num_ovls] = layer->handle; + //ALOGI("dss buffers[%d] = %p", dsscomp->num_ovls, hwc_dev->buffers[dsscomp->num_ovls]); + + setup_layer(hwc_dev, + &dsscomp->ovls[dsscomp->num_ovls], + layer, + z, + handle->iFormat, + handle->iWidth, + handle->iHeight); + + dsscomp->ovls[dsscomp->num_ovls].cfg.ix = dsscomp->num_ovls + hwc_dev->primary_transform; + dsscomp->ovls[dsscomp->num_ovls].addressing = OMAP_DSS_BUFADDR_LAYER_IX; + dsscomp->ovls[dsscomp->num_ovls].ba = dsscomp->num_ovls; + + /* ensure GFX layer is never scaled */ + if ((dsscomp->num_ovls == 0) && (!hwc_dev->primary_transform)) { + scaled_gfx = scaled(layer) || is_NV12(handle); + } else if (scaled_gfx && !scaled(layer) && !is_NV12(handle)) { + /* swap GFX layer with this one */ + dsscomp->ovls[dsscomp->num_ovls].cfg.ix = 0; + dsscomp->ovls[0].cfg.ix = dsscomp->num_ovls; + scaled_gfx = 0; + } + + /* remember largest dockable layer */ + if (dockable(layer) && + (ix_docking < 0 || + display_area(&dsscomp->ovls[dsscomp->num_ovls]) > display_area(&dsscomp->ovls[ix_docking]))) + ix_docking = dsscomp->num_ovls; +#ifdef OMAP_ENHANCEMENT_S3D + /* remember the ix for s3d layer */ + if (get_s3d_layout_type(layer) != eMono) { + ix_s3d = dsscomp->num_ovls; + } +#endif + dsscomp->num_ovls++; + z++; + } else if (hwc_dev->use_sgx) { + if (fb_z < 0) { + /* NOTE: we are not handling transparent cutout for now */ + fb_z = z; + z++; + } else { + /* move fb z-order up (by lowering dss layers) */ + while (fb_z < z - 1) + dsscomp->ovls[1 + fb_z++].cfg.zorder--; + } + } + } + + /* if scaling GFX (e.g. only 1 scaled surface) use a VID pipe */ + if (scaled_gfx) + dsscomp->ovls[0].cfg.ix = dsscomp->num_ovls; + + if (hwc_dev->blt_policy == BLTPOLICY_DEFAULT) { + /* + * As long as we keep blitting on consecutive frames keep the regionizer + * state, if this is not possible the regionizer state is unreliable and + * we need to reset its state. + */ + if (hwc_dev->use_sgx) { + if (blit_layers(hwc_dev, list, dsscomp->num_ovls == 1 ? 0 : dsscomp->num_ovls)) { + hwc_dev->use_sgx = 0; + } + } else + rgz_release(&grgz); + } + + /* If the SGX is not used and there is blit data we need a framebuffer and + * a DSS pipe well configured for it + */ + if (needs_fb) { + /* assign a z-layer for fb */ + if (fb_z < 0) { + if (!hwc_dev->blt_policy != BLTPOLICY_DISABLED && num->composited_layers) + ALOGE("**** should have assigned z-layer for fb"); + fb_z = z++; + } + /* + * This is needed because if we blit all we would lose the handle of + * the first layer + */ + if (hwc_dev->use_sgx) { + hwc_dev->buffers[0] = NULL; + } + setup_layer_base(&dsscomp->ovls[0].cfg, fb_z, + hwc_dev->fb_dev->base.format, + 1, /* FB is always premultiplied */ + hwc_dev->fb_dev->base.width, + hwc_dev->fb_dev->base.height); + dsscomp->ovls[0].cfg.pre_mult_alpha = 1; + dsscomp->ovls[0].addressing = OMAP_DSS_BUFADDR_LAYER_IX; + dsscomp->ovls[0].ba = 0; + dsscomp->ovls[0].cfg.ix = hwc_dev->primary_transform; + } + + /* mirror layers */ + hwc_dev->post2_layers = dsscomp->num_ovls; + + omap_hwc_ext_t *ext = &hwc_dev->ext; + if (ext->current.enabled && ((!num->protected && hwc_dev->ext_ovls) || + (hwc_dev->ext_ovls_wanted && hwc_dev->ext_ovls >= hwc_dev->ext_ovls_wanted))) { +#ifdef OMAP_ENHANCEMENT_S3D + if (ext->current.docking && ix_s3d >= 0) { + if (clone_s3d_external_layer(hwc_dev, ix_s3d) == 0) { + dsscomp->ovls[dsscomp->num_ovls - 2].cfg.zorder = z++; + dsscomp->ovls[dsscomp->num_ovls - 1].cfg.zorder = z++; + /* For now, show only the left view of an S3D layer + * in the local display while we have hdmi attached */ + switch (hwc_dev->s3d_input_type) { + case eSideBySide: + dsscomp->ovls[ix_s3d].cfg.crop.w = dsscomp->ovls[ix_s3d].cfg.crop.w/2; + break; + case eTopBottom: + dsscomp->ovls[ix_s3d].cfg.crop.h = dsscomp->ovls[ix_s3d].cfg.crop.h/2; + break; + default: + ALOGE("Unsupported S3D input type"); + break; + } + } + } else if (ext->current.docking && ix_docking >= 0) { +#else + if (ext->current.docking && ix_docking >= 0) { +#endif + if (clone_external_layer(hwc_dev, ix_docking) == 0) + dsscomp->ovls[dsscomp->num_ovls - 1].cfg.zorder = z++; + } else if (ext->current.docking && ix_docking < 0 && ext->force_dock) { + ix_docking = dsscomp->num_ovls; + struct dss2_ovl_info *oi = &dsscomp->ovls[ix_docking]; + image_info_t *dock_image = get_dock_image(); + setup_layer_base(&oi->cfg, 0, HAL_PIXEL_FORMAT_BGRA_8888, 1, + dock_image->width, dock_image->height); + oi->cfg.stride = dock_image->rowbytes; + if (clone_external_layer(hwc_dev, ix_docking) == 0) { + oi->addressing = OMAP_DSS_BUFADDR_FB; + oi->ba = 0; + z++; + } + } else if (!ext->current.docking) { + int res = 0; + + /* reset mode if we are coming from docking */ + if (ext->last.docking) + res = setup_mirroring(hwc_dev); + + /* mirror all layers */ + for (ix = 0; res == 0 && ix < hwc_dev->post2_layers; ix++) { + if (clone_layer(hwc_dev, ix)) + break; + z++; + } + } + } + + /* Apply transform for primary display */ + if (hwc_dev->primary_transform) + for (i = 0; i < dsscomp->num_ovls; i++) { + if(dsscomp->ovls[i].cfg.mgr_ix == 0) + adjust_primary_display_layer(hwc_dev, &dsscomp->ovls[i]); + } + +#ifdef OMAP_ENHANCEMENT_S3D + enable_s3d_hdmi(hwc_dev, ix_s3d >= 0); +#endif + ext->last = ext->current; + + if (z != dsscomp->num_ovls || dsscomp->num_ovls > MAX_HW_OVERLAYS) + ALOGE("**** used %d z-layers for %d overlays\n", z, dsscomp->num_ovls); + + /* verify all z-orders and overlay indices are distinct */ + for (i = z = ix = 0; i < dsscomp->num_ovls; i++) { + struct dss2_ovl_cfg *c = &dsscomp->ovls[i].cfg; + + if (z & (1 << c->zorder)) + ALOGE("**** used z-order #%d multiple times", c->zorder); + if (ix & (1 << c->ix)) + ALOGE("**** used ovl index #%d multiple times", c->ix); + z |= 1 << c->zorder; + ix |= 1 << c->ix; + } + dsscomp->mode = DSSCOMP_SETUP_DISPLAY; + dsscomp->mgrs[0].ix = 0; + dsscomp->mgrs[0].alpha_blending = 1; + dsscomp->mgrs[0].swap_rb = hwc_dev->swap_rb; + dsscomp->num_mgrs = 1; + + if (ext->current.enabled || hwc_dev->last_ext_ovls) { + dsscomp->mgrs[1] = dsscomp->mgrs[0]; + dsscomp->mgrs[1].ix = 1; + dsscomp->num_mgrs++; + hwc_dev->ext_ovls = dsscomp->num_ovls - hwc_dev->post2_layers; + } + + /* + * Whilst the mode of the display is being changed drop compositions to the + * display + */ + if (ext->last_mode == 0 && hwc_dev->on_tv) { + dsscomp->num_ovls = 0; + } + + if (debug) { + ALOGD("prepare (%d) - %s (comp=%d, poss=%d/%d scaled, RGB=%d,BGR=%d,NV12=%d) (ext=%s%s%ddeg%s %dex/%dmx (last %dex,%din)\n", + dsscomp->sync_id, + hwc_dev->use_sgx ? "SGX+OVL" : "all-OVL", + num->composited_layers, + num->possible_overlay_layers, num->scaled_layers, + num->RGB, num->BGR, num->NV12, + ext->on_tv ? "tv+" : "", + ext->current.enabled ? ext->current.docking ? "dock+" : "mirror+" : "OFF+", + ext->current.rotation * 90, + ext->current.hflip ? "+hflip" : "", + hwc_dev->ext_ovls, num->max_hw_overlays, hwc_dev->last_ext_ovls, hwc_dev->last_int_ovls); + } + + pthread_mutex_unlock(&hwc_dev->lock); + return 0; +} + +static void reset_screen(omap_hwc_device_t *hwc_dev) +{ + static int first_set = 1; + int ret; + + if (first_set) { + first_set = 0; + struct dsscomp_setup_dispc_data d = { + .num_mgrs = 1, + }; + /* remove bootloader image from the screen as blank/unblank does not change the composition */ + ret = ioctl(hwc_dev->dsscomp_fd, DSSCIOC_SETUP_DISPC, &d); + if (ret) + ALOGW("failed to remove bootloader image"); + + /* blank and unblank fd to make sure display is properly programmed on boot. + * This is needed because the bootloader can not be trusted. + */ + ret = ioctl(hwc_dev->fb_fd, FBIOBLANK, FB_BLANK_POWERDOWN); + if (ret) + ALOGW("failed to blank display"); + + ret = ioctl(hwc_dev->fb_fd, FBIOBLANK, FB_BLANK_UNBLANK); + if (ret) + ALOGW("failed to blank display"); + } +} + +static int hwc_set(struct hwc_composer_device_1 *dev, + size_t numDisplays, hwc_display_contents_1_t** displays) +{ + if (!numDisplays || displays == NULL) { + ALOGD("set: empty display list"); + return 0; + } + hwc_display_t dpy = NULL; + hwc_surface_t sur = NULL; + hwc_display_contents_1_t* list = displays[0]; // ignore displays beyond the first + if (list != NULL) { + dpy = list->dpy; + sur = list->sur; + } + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *)dev; + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + int err = 0; + bool invalidate; + + pthread_mutex_lock(&hwc_dev->lock); + + reset_screen(hwc_dev); + + invalidate = hwc_dev->ext_ovls_wanted && (hwc_dev->ext_ovls < hwc_dev->ext_ovls_wanted) && + (hwc_dev->counts.protected || !hwc_dev->ext_ovls); + + if (debug) + dump_set_info(hwc_dev, list); + + if (dpy && sur) { + // list can be NULL which means hwc is temporarily disabled. + // however, if dpy and sur are null it means we're turning the + // screen off. no shall not call eglSwapBuffers() in that case. + + if (hwc_dev->use_sgx) { + if (!eglSwapBuffers((EGLDisplay)dpy, (EGLSurface)sur)) { + ALOGE("eglSwapBuffers error"); + err = HWC_EGL_ERROR; + goto err_out; + } + } + + //dump_dsscomp(dsscomp); + + // signal the event thread that a post has happened + write(hwc_dev->pipe_fds[1], "s", 1); + if (hwc_dev->force_sgx > 0) + hwc_dev->force_sgx--; + + hwc_dev->comp_data.blit_data.rgz_flags = hwc_dev->blit_flags; + hwc_dev->comp_data.blit_data.rgz_items = hwc_dev->blit_num; + int omaplfb_comp_data_sz = sizeof(hwc_dev->comp_data) + + (hwc_dev->comp_data.blit_data.rgz_items * sizeof(struct rgz_blt_entry)); + + + uint32_t nbufs = hwc_dev->post2_layers; + if (hwc_dev->post2_blit_buffers) { + /* + * We don't want to pass a NULL entry in the Post2, but we need to + * fix up buffer handle array and overlay indexes to account for + * this + */ + nbufs += hwc_dev->post2_blit_buffers - 1; + + if (hwc_dev->post2_layers > 1) { + uint32_t i, j; + for (i = 0; i < nbufs; i++) { + hwc_dev->buffers[i] = hwc_dev->buffers[i+1]; + } + for (i = 1, j= 1; j < hwc_dev->post2_layers; i++, j++) { + dsscomp->ovls[j].ba = i; + } + } + } + ALOGI_IF(debugblt && hwc_dev->blt_policy != BLTPOLICY_DISABLED, + "Post2, blits %d, ovl_buffers %d, blit_buffers %d sgx %d", + hwc_dev->blit_num, hwc_dev->post2_layers, hwc_dev->post2_blit_buffers, + hwc_dev->use_sgx); + + debug_post2(hwc_dev, nbufs); + err = hwc_dev->fb_dev->Post2((framebuffer_device_t *)hwc_dev->fb_dev, + hwc_dev->buffers, + nbufs, + dsscomp, omaplfb_comp_data_sz); + showfps(); + } + hwc_dev->last_ext_ovls = hwc_dev->ext_ovls; + hwc_dev->last_int_ovls = hwc_dev->post2_layers; + if (err) + ALOGE("Post2 error"); + + check_sync_fds(numDisplays, displays); + +err_out: + pthread_mutex_unlock(&hwc_dev->lock); + + if (invalidate) + hwc_dev->procs->invalidate(hwc_dev->procs); + + return err; +} + +static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff, int buff_len) +{ + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *)dev; + struct dsscomp_setup_dispc_data *dsscomp = &hwc_dev->comp_data.dsscomp_data; + struct dump_buf log = { + .buf = buff, + .buf_len = buff_len, + }; + int i; + + dump_printf(&log, "omap_hwc %d:\n", dsscomp->num_ovls); + dump_printf(&log, " idle timeout: %dms\n", hwc_dev->idle); + + for (i = 0; i < dsscomp->num_ovls; i++) { + struct dss2_ovl_cfg *cfg = &dsscomp->ovls[i].cfg; + + dump_printf(&log, " layer %d:\n", i); + dump_printf(&log, " enabled:%s buff:%p %dx%d stride:%d\n", + cfg->enabled ? "true" : "false", hwc_dev->buffers[i], + cfg->width, cfg->height, cfg->stride); + dump_printf(&log, " src:(%d,%d) %dx%d dst:(%d,%d) %dx%d ix:%d zorder:%d\n", + cfg->crop.x, cfg->crop.y, cfg->crop.w, cfg->crop.h, + cfg->win.x, cfg->win.y, cfg->win.w, cfg->win.h, + cfg->ix, cfg->zorder); + } + + if (hwc_dev->blt_policy != BLTPOLICY_DISABLED) { + dump_printf(&log, " bltpolicy: %s, bltmode: %s\n", + hwc_dev->blt_policy == BLTPOLICY_DEFAULT ? "default" : + hwc_dev->blt_policy == BLTPOLICY_ALL ? "all" : "unknown", + hwc_dev->blt_mode == BLTMODE_PAINT ? "paint" : "regionize"); + } + dump_printf(&log, "\n"); +} + +static int hwc_device_close(hw_device_t* device) +{ + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) device;; + + if (hwc_dev) { + if (hwc_dev->dsscomp_fd >= 0) + close(hwc_dev->dsscomp_fd); + if (hwc_dev->hdmi_fb_fd >= 0) + close(hwc_dev->hdmi_fb_fd); + if (hwc_dev->fb_fd >= 0) + close(hwc_dev->fb_fd); + if (hwc_dev->ion_fd >= 0) + ion_close(hwc_dev->ion_fd); + + /* pthread will get killed when parent process exits */ + pthread_mutex_destroy(&hwc_dev->lock); + free(hwc_dev); + } + + return 0; +} + +static int open_fb_hal(IMG_framebuffer_device_public_t **fb_dev) +{ + const struct hw_module_t *psModule; + IMG_gralloc_module_public_t *psGrallocModule; + int err; + + err = hw_get_module(GRALLOC_HARDWARE_MODULE_ID, &psModule); + psGrallocModule = (IMG_gralloc_module_public_t *) psModule; + + if(err) + goto err_out; + + if (strcmp(psGrallocModule->base.common.author, "Imagination Technologies")) { + err = -EINVAL; + goto err_out; + } + + *fb_dev = psGrallocModule->psFrameBufferDevice; + + return 0; + +err_out: + ALOGE("Composer HAL failed to load compatible Graphics HAL"); + return err; +} + +static void set_primary_display_transform_matrix(omap_hwc_device_t *hwc_dev) +{ + /* create primary display translation matrix */ + hwc_dev->fb_dis.ix = 0;/*Default display*/ + + int ret = ioctl(hwc_dev->dsscomp_fd, DSSCIOC_QUERY_DISPLAY, &hwc_dev->fb_dis); + if (ret) + ALOGE("failed to get display info (%d): %m", errno); + + int lcd_w = hwc_dev->fb_dis.timings.x_res; + int lcd_h = hwc_dev->fb_dis.timings.y_res; + int orig_w = hwc_dev->fb_dev->base.width; + int orig_h = hwc_dev->fb_dev->base.height; + hwc_rect_t region = {.left = 0, .top = 0, .right = orig_w, .bottom = orig_h}; + hwc_dev->primary_region = region; + hwc_dev->primary_rotation = ((lcd_w > lcd_h) ^ (orig_w > orig_h)) ? 1 : 0; + hwc_dev->primary_transform = ((lcd_w != orig_w)||(lcd_h != orig_h)) ? 1 : 0; + + ALOGI("transforming FB (%dx%d) => (%dx%d) rot%d", orig_w, orig_h, lcd_w, lcd_h, hwc_dev->primary_rotation); + + /* reorientation matrix is: + m = (center-from-target-center) * (scale-to-target) * (mirror) * (rotate) * (center-to-original-center) */ + + memcpy(hwc_dev->primary_m, m_unit, sizeof(m_unit)); + m_translate(hwc_dev->primary_m, -(orig_w >> 1), -(orig_h >> 1)); + m_rotate(hwc_dev->primary_m, hwc_dev->primary_rotation); + if (hwc_dev->primary_rotation & 1) + swap(orig_w, orig_h); + m_scale(hwc_dev->primary_m, orig_w, lcd_w, orig_h, lcd_h); + m_translate(hwc_dev->primary_m, lcd_w >> 1, lcd_h >> 1); +} + +#ifdef OMAP_ENHANCEMENT_S3D +static void handle_s3d_hotplug(omap_hwc_ext_t *ext, bool state) +{ + struct edid_t *edid = NULL; + if (state) { + int fd = open("/sys/devices/platform/omapdss/display1/edid", O_RDONLY); + if (!fd) + return; + uint8_t edid_data[EDID_SIZE]; + size_t bytes_read = read(fd, edid_data, EDID_SIZE); + close(fd); + if (bytes_read < EDID_SIZE) + return; + if (edid_parser_init(&edid, edid_data)) + return; + } + + ext->s3d_enabled = false; + ext->s3d_capable = false; + ext->s3d_type = eMono; + ext->s3d_order = eLeftViewFirst; + + if (edid) { + ext->s3d_capable = edid_s3d_capable(edid); + /* For now assume Side-by-Side half support applies to all modes */ + ext->s3d_type = eSideBySide; + ext->s3d_order = eLeftViewFirst; + edid_parser_deinit(edid); + } +} +#endif +static void handle_hotplug(omap_hwc_device_t *hwc_dev) +{ + omap_hwc_ext_t *ext = &hwc_dev->ext; + bool state = ext->hdmi_state; + + /* Ignore external HDMI logic if the primary display is HDMI */ + if (hwc_dev->on_tv) { + ALOGI("Primary display is HDMI - skip clone/dock logic"); + + if (state) { + uint32_t xres = hwc_dev->fb_dev->base.width; + uint32_t yres = hwc_dev->fb_dev->base.height; + if (set_best_hdmi_mode(hwc_dev, xres, yres, ext->lcd_xpy)) { + ALOGE("Failed to set HDMI mode"); + } + set_primary_display_transform_matrix(hwc_dev); + + ioctl(hwc_dev->fb_fd, FBIOBLANK, FB_BLANK_UNBLANK); + + if (hwc_dev->procs && hwc_dev->procs->invalidate) { + hwc_dev->procs->invalidate(hwc_dev->procs); + } + } else + ext->last_mode = 0; + + return; + } + + pthread_mutex_lock(&hwc_dev->lock); +#ifdef OMAP_ENHANCEMENT_S3D + handle_s3d_hotplug(ext, state); +#endif + ext->dock.enabled = ext->mirror.enabled = 0; + if (state) { + /* check whether we can clone and/or dock */ + char value[PROPERTY_VALUE_MAX]; + property_get("persist.hwc.docking.enabled", value, "1"); + ext->dock.enabled = atoi(value) > 0; + property_get("persist.hwc.mirroring.enabled", value, "1"); + ext->mirror.enabled = atoi(value) > 0; + property_get("persist.hwc.avoid_mode_change", value, "1"); + ext->avoid_mode_change = atoi(value) > 0; + + /* get cloning transformation */ + property_get("persist.hwc.docking.transform", value, "0"); + ext->dock.rotation = atoi(value) & EXT_ROTATION; + ext->dock.hflip = (atoi(value) & EXT_HFLIP) > 0; + ext->dock.docking = 1; + property_get("persist.hwc.mirroring.transform", value, hwc_dev->fb_dis.timings.y_res > hwc_dev->fb_dis.timings.x_res ? "3" : "0"); + ext->mirror.rotation = atoi(value) & EXT_ROTATION; + ext->mirror.hflip = (atoi(value) & EXT_HFLIP) > 0; + ext->mirror.docking = 0; + + if (ext->force_dock) { + /* restrict to docking with no transform */ + ext->mirror.enabled = 0; + ext->dock.rotation = 0; + ext->dock.hflip = 0; + + load_dock_image(); + } + + /* select best mode for mirroring */ + if (ext->mirror.enabled) { + ext->current = ext->mirror; + ext->mirror_mode = 0; + if (setup_mirroring(hwc_dev) == 0) { + ext->mirror_mode = ext->last_mode; + ioctl(hwc_dev->hdmi_fb_fd, FBIOBLANK, FB_BLANK_UNBLANK); + } else + ext->mirror.enabled = 0; + } + /* Allocate backup buffers for FB rotation + * This is required only if the FB tranform is different from that + * of the external display and the FB is not in TILER2D space + */ + if (ext->mirror.rotation && (limits.fbmem_type != DSSCOMP_FBMEM_TILER2D)) + allocate_tiler2d_buffers(hwc_dev); + + } else { + ext->last_mode = 0; + if (ext->mirror.rotation && (limits.fbmem_type != DSSCOMP_FBMEM_TILER2D)) { + /* free tiler 2D buffer on detach */ + free_tiler2d_buffers(hwc_dev); + } + } + ALOGI("external display changed (state=%d, mirror={%s tform=%ddeg%s}, dock={%s tform=%ddeg%s%s}, tv=%d", state, + ext->mirror.enabled ? "enabled" : "disabled", + ext->mirror.rotation * 90, + ext->mirror.hflip ? "+hflip" : "", + ext->dock.enabled ? "enabled" : "disabled", + ext->dock.rotation * 90, + ext->dock.hflip ? "+hflip" : "", + ext->force_dock ? " forced" : "", + ext->on_tv); + + pthread_mutex_unlock(&hwc_dev->lock); + + /* hwc_dev->procs is set right after the device is opened, but there is + * still a race condition where a hotplug event might occur after the open + * but before the procs are registered. */ + if (hwc_dev->procs) + hwc_dev->procs->invalidate(hwc_dev->procs); +} + +static void handle_uevents(omap_hwc_device_t *hwc_dev, const char *buff, int len) +{ + int dock; + int hdmi; + int vsync; + int state = 0; + uint64_t timestamp = 0; + const char *s = buff; + + dock = !strcmp(s, "change@/devices/virtual/switch/dock"); + hdmi = !strcmp(s, "change@/devices/virtual/switch/hdmi"); + vsync = !strcmp(s, "change@/devices/platform/omapfb") || + !strcmp(s, "change@/devices/virtual/switch/omapfb-vsync"); + + if (!dock && !vsync && !hdmi) + return; + + s += strlen(s) + 1; + + while(*s) { + if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE="))) + state = atoi(s + strlen("SWITCH_STATE=")); + else if (!strncmp(s, "SWITCH_TIME=", strlen("SWITCH_TIME="))) + timestamp = strtoull(s + strlen("SWITCH_TIME="), NULL, 0); + else if (!strncmp(s, "VSYNC=", strlen("VSYNC="))) + timestamp = strtoull(s + strlen("VSYNC="), NULL, 0); + + s += strlen(s) + 1; + if (s - buff >= len) + break; + } + + if (vsync) { + if (hwc_dev->procs) + hwc_dev->procs->vsync(hwc_dev->procs, 0, timestamp); + } else { + if (dock) + hwc_dev->ext.force_dock = state == 1; + else + hwc_dev->ext.hdmi_state = state == 1; + handle_hotplug(hwc_dev); + } +} + +#ifdef SYSFS_VSYNC_NOTIFICATION +static void *omap4_hwc_vsync_sysfs_loop(void *data) +{ + omap_hwc_device_t *hwc_dev = data; + static char buf[4096]; + int vsync_timestamp_fd; + fd_set exceptfds; + int res; + int64_t timestamp = 0; + + vsync_timestamp_fd = open("/sys/devices/platform/omapfb/vsync_time", O_RDONLY); + char thread_name[64] = "hwcVsyncThread"; + prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); + setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); + memset(buf, 0, sizeof(buf)); + + ALOGD("Using sysfs mechanism for VSYNC notification"); + + FD_ZERO(&exceptfds); + FD_SET(vsync_timestamp_fd, &exceptfds); + do { + ssize_t len = read(vsync_timestamp_fd, buf, sizeof(buf)); + timestamp = strtoull(buf, NULL, 0); + hwc_dev->procs->vsync(hwc_dev->procs, 0, timestamp); + select(vsync_timestamp_fd + 1, NULL, NULL, &exceptfds, NULL); + lseek(vsync_timestamp_fd, 0, SEEK_SET); + } while (1); + + return NULL; +} +#endif + +static void *hdmi_thread(void *data) +{ + omap_hwc_device_t *hwc_dev = data; + static char uevent_desc[4096]; + struct pollfd fds[2]; + bool invalidate = false; + int timeout; + int err; + + setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); + + uevent_init(); + + fds[0].fd = uevent_get_fd(); + fds[0].events = POLLIN; + fds[1].fd = hwc_dev->pipe_fds[0]; + fds[1].events = POLLIN; + + timeout = hwc_dev->idle ? hwc_dev->idle : -1; + + memset(uevent_desc, 0, sizeof(uevent_desc)); + + do { + err = poll(fds, hwc_dev->idle ? 2 : 1, timeout); + + if (err == 0) { + if (hwc_dev->idle) { + if (hwc_dev->procs) { + pthread_mutex_lock(&hwc_dev->lock); + invalidate = hwc_dev->last_int_ovls > 1 && !hwc_dev->force_sgx; + if (invalidate) { + hwc_dev->force_sgx = 2; + } + pthread_mutex_unlock(&hwc_dev->lock); + + if (invalidate) { + hwc_dev->procs->invalidate(hwc_dev->procs); + timeout = -1; + } + } + + continue; + } + } + + if (err == -1) { + if (errno != EINTR) + ALOGE("event error: %m"); + continue; + } + + if (hwc_dev->idle && fds[1].revents & POLLIN) { + char c; + read(hwc_dev->pipe_fds[0], &c, 1); + if (!hwc_dev->force_sgx) + timeout = hwc_dev->idle ? hwc_dev->idle : -1; + } + + if (fds[0].revents & POLLIN) { + /* keep last 2 zeroes to ensure double 0 termination */ + int len = uevent_next_event(uevent_desc, sizeof(uevent_desc) - 2); + handle_uevents(hwc_dev, uevent_desc, len); + } + } while (1); + + return NULL; +} + +static void hwc_registerProcs(struct hwc_composer_device_1* dev, + hwc_procs_t const* procs) +{ + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev; + + hwc_dev->procs = (typeof(hwc_dev->procs)) procs; +} + +static int hwc_query(struct hwc_composer_device_1* dev, int what, int* value) +{ + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev; + + switch (what) { + case HWC_BACKGROUND_LAYER_SUPPORTED: + // we don't support the background layer yet + value[0] = 0; + break; + case HWC_VSYNC_PERIOD: + // vsync period in nanosecond + value[0] = 1000000000.0 / hwc_dev->fb_dev->base.fps; + break; + default: + // unsupported query + return -EINVAL; + } + return 0; +} + +static int hwc_eventControl(struct hwc_composer_device_1* dev, + int dpy, int event, int enabled) +{ + omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev; + + switch (event) { + case HWC_EVENT_VSYNC: + { + int val = !!enabled; + int err; + + if (hwc_dev->use_sw_vsync) { + if (enabled) + start_sw_vsync(hwc_dev); + else + stop_sw_vsync(); + return 0; + } + + err = ioctl(hwc_dev->fb_fd, OMAPFB_ENABLEVSYNC, &val); + if (err < 0) + return -errno; + + return 0; + } + default: + return -EINVAL; + } +} + +static int hwc_blank(struct hwc_composer_device_1 *dev, int dpy, int blank) +{ + // We're using an older method of screen blanking based on + // early_suspend in the kernel. No need to do anything here. + return 0; +} + +static int hwc_device_open(const hw_module_t* module, const char* name, hw_device_t** device) +{ + omap_hwc_module_t *hwc_mod = (omap_hwc_module_t *)module; + omap_hwc_device_t *hwc_dev; + int err = 0; + + if (strcmp(name, HWC_HARDWARE_COMPOSER)) { + return -EINVAL; + } + + if (!hwc_mod->fb_dev) { + err = open_fb_hal(&hwc_mod->fb_dev); + if (err) + return err; + + if (!hwc_mod->fb_dev) { + ALOGE("Framebuffer HAL not opened before HWC"); + return -EFAULT; + } + hwc_mod->fb_dev->bBypassPost = 1; + } + + hwc_dev = (omap_hwc_device_t *)malloc(sizeof(*hwc_dev)); + if (hwc_dev == NULL) + return -ENOMEM; + + memset(hwc_dev, 0, sizeof(*hwc_dev)); + + hwc_dev->base.common.tag = HARDWARE_DEVICE_TAG; + hwc_dev->base.common.version = HWC_DEVICE_API_VERSION_1_0; + + if (use_sw_vsync()) { + hwc_dev->use_sw_vsync = true; + init_sw_vsync(hwc_dev); + } + + hwc_dev->base.common.module = (hw_module_t *)module; + hwc_dev->base.common.close = hwc_device_close; + hwc_dev->base.prepare = hwc_prepare; + hwc_dev->base.set = hwc_set; + hwc_dev->base.eventControl = hwc_eventControl; + hwc_dev->base.blank = hwc_blank; + hwc_dev->base.dump = hwc_dump; + hwc_dev->base.registerProcs = hwc_registerProcs; + hwc_dev->base.query = hwc_query; + + hwc_dev->fb_dev = hwc_mod->fb_dev; + *device = &hwc_dev->base.common; + + hwc_dev->dsscomp_fd = open("/dev/dsscomp", O_RDWR); + if (hwc_dev->dsscomp_fd < 0) { + ALOGE("failed to open dsscomp (%d)", errno); + err = -errno; + goto done; + } + + int ret = ioctl(hwc_dev->dsscomp_fd, DSSCIOC_QUERY_PLATFORM, &limits); + if (ret) { + ALOGE("failed to get platform limits (%d): %m", errno); + err = -errno; + goto done; + } + + hwc_dev->fb_fd = open("/dev/graphics/fb0", O_RDWR); + if (hwc_dev->fb_fd < 0) { + ALOGE("failed to open fb (%d)", errno); + err = -errno; + goto done; + } + + err = init_dock_image(hwc_dev, limits.max_width, limits.max_height); + if (err) + goto done; + + /* Allocate the maximum buffers that we can receive from HWC */ + hwc_dev->buffers = malloc(sizeof(buffer_handle_t) * MAX_HWC_LAYERS); + if (!hwc_dev->buffers) { + err = -ENOMEM; + goto done; + } + + ret = ioctl(hwc_dev->dsscomp_fd, DSSCIOC_QUERY_DISPLAY, &hwc_dev->fb_dis); + if (ret) { + ALOGE("failed to get display info (%d): %m", errno); + err = -errno; + goto done; + } + + hwc_dev->ion_fd = ion_open(); + if (hwc_dev->ion_fd < 0) { + ALOGE("failed to open ion driver (%d)", errno); + } + + int i; + for (i = 0; i < NUM_EXT_DISPLAY_BACK_BUFFERS; i++) { + hwc_dev->ion_handles[i] = NULL; + } + + /* use default value in case some of requested display parameters missing */ + hwc_dev->ext.lcd_xpy = 1.0; + if (hwc_dev->fb_dis.timings.x_res && hwc_dev->fb_dis.height_in_mm) { + hwc_dev->ext.lcd_xpy = (float) + hwc_dev->fb_dis.width_in_mm / hwc_dev->fb_dis.timings.x_res / + hwc_dev->fb_dis.height_in_mm * hwc_dev->fb_dis.timings.y_res; + } + + if (hwc_dev->fb_dis.channel == OMAP_DSS_CHANNEL_DIGIT) { + ALOGI("Primary display is HDMI"); + hwc_dev->on_tv = 1; + } else { + hwc_dev->hdmi_fb_fd = open("/dev/graphics/fb1", O_RDWR); + if (hwc_dev->hdmi_fb_fd < 0) { + ALOGE("failed to open hdmi fb (%d)", errno); + err = -errno; + goto done; + } + } + + set_primary_display_transform_matrix(hwc_dev); + + if (pipe(hwc_dev->pipe_fds) == -1) { + ALOGE("failed to event pipe (%d): %m", errno); + err = -errno; + goto done; + } + + if (pthread_mutex_init(&hwc_dev->lock, NULL)) { + ALOGE("failed to create mutex (%d): %m", errno); + err = -errno; + goto done; + } + + if (pthread_create(&hwc_dev->hdmi_thread, NULL, hdmi_thread, hwc_dev)) + { + ALOGE("failed to create HDMI listening thread (%d): %m", errno); + err = -errno; + goto done; + } + + /* get debug properties */ + + /* see if hwc is enabled at all */ + char value[PROPERTY_VALUE_MAX]; + property_get("debug.hwc.rgb_order", value, "1"); + hwc_dev->flags_rgb_order = atoi(value); + property_get("debug.hwc.nv12_only", value, "0"); + hwc_dev->flags_nv12_only = atoi(value); + property_get("debug.hwc.idle", value, "250"); + hwc_dev->idle = atoi(value); + + /* get the board specific clone properties */ + /* 0:0:1280:720 */ + if (property_get("persist.hwc.mirroring.region", value, "") <= 0 || + sscanf(value, "%d:%d:%d:%d", + &hwc_dev->ext.mirror_region.left, &hwc_dev->ext.mirror_region.top, + &hwc_dev->ext.mirror_region.right, &hwc_dev->ext.mirror_region.bottom) != 4 || + hwc_dev->ext.mirror_region.left >= hwc_dev->ext.mirror_region.right || + hwc_dev->ext.mirror_region.top >= hwc_dev->ext.mirror_region.bottom) { + struct hwc_rect fb_region = { .right = hwc_dev->fb_dev->base.width, .bottom = hwc_dev->fb_dev->base.height }; + hwc_dev->ext.mirror_region = fb_region; + } + ALOGI("clone region is set to (%d,%d) to (%d,%d)", + hwc_dev->ext.mirror_region.left, hwc_dev->ext.mirror_region.top, + hwc_dev->ext.mirror_region.right, hwc_dev->ext.mirror_region.bottom); + + /* read switch state */ + int sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY); + if (sw_fd >= 0) { + char value; + if (read(sw_fd, &value, 1) == 1) + hwc_dev->ext.hdmi_state = value == '1'; + close(sw_fd); + } + sw_fd = open("/sys/class/switch/dock/state", O_RDONLY); + if (sw_fd >= 0) { + char value; + if (read(sw_fd, &value, 1) == 1) + hwc_dev->ext.force_dock = value == '1'; + close(sw_fd); + } + handle_hotplug(hwc_dev); + +#ifdef SYSFS_VSYNC_NOTIFICATION + if (pthread_create(&hwc_dev->vsync_thread, NULL, omap4_hwc_vsync_sysfs_loop, hwc_dev)) + { + ALOGE("pthread_create() failed (%d): %m", errno); + err = -errno; + goto done; + } +#endif + + ALOGI("open_device(rgb_order=%d nv12_only=%d)", + hwc_dev->flags_rgb_order, hwc_dev->flags_nv12_only); + + int gc2d_fd = open("/dev/gcioctl", O_RDWR); + if (gc2d_fd < 0) { + ALOGI("Unable to open gc-core device (%d), blits disabled", errno); + hwc_dev->blt_policy = BLTPOLICY_DISABLED; + } else { + property_get("persist.hwc.bltmode", value, "1"); + hwc_dev->blt_mode = atoi(value); + property_get("persist.hwc.bltpolicy", value, "1"); + hwc_dev->blt_policy = atoi(value); + ALOGI("blitter present, blits mode %d, blits policy %d", hwc_dev->blt_mode, hwc_dev->blt_policy); + close(gc2d_fd); + + if (rgz_get_screengeometry(hwc_dev->fb_fd, &gscrngeom, + hwc_dev->fb_dev->base.format) != 0) { + err = -EINVAL; + goto done; + } + } + + property_get("persist.hwc.upscaled_nv12_limit", value, "2."); + sscanf(value, "%f", &hwc_dev->upscaled_nv12_limit); + if (hwc_dev->upscaled_nv12_limit < 0. || hwc_dev->upscaled_nv12_limit > 2048.) { + ALOGW("Invalid upscaled_nv12_limit (%s), setting to 2.", value); + hwc_dev->upscaled_nv12_limit = 2.; + } + +done: + if (err && hwc_dev) { + if (hwc_dev->dsscomp_fd >= 0) + close(hwc_dev->dsscomp_fd); + if (hwc_dev->hdmi_fb_fd >= 0) + close(hwc_dev->hdmi_fb_fd); + if (hwc_dev->fb_fd >= 0) + close(hwc_dev->fb_fd); + pthread_mutex_destroy(&hwc_dev->lock); + free(hwc_dev->buffers); + free(hwc_dev); + } + + return err; +} + +static struct hw_module_methods_t module_methods = { + .open = hwc_device_open, +}; + +omap_hwc_module_t HAL_MODULE_INFO_SYM = { + .base = { + .common = { + .tag = HARDWARE_MODULE_TAG, + .module_api_version = HWC_MODULE_API_VERSION_0_1, + .hal_api_version = HARDWARE_HAL_API_VERSION, + .id = HWC_HARDWARE_MODULE_ID, + .name = "OMAP 44xx Hardware Composer HAL", + .author = "Texas Instruments", + .methods = &module_methods, + }, + }, +}; diff --git a/hwc/hwc_dev.h b/hwc/hwc_dev.h new file mode 100644 index 0000000..32cc273 --- /dev/null +++ b/hwc/hwc_dev.h @@ -0,0 +1,180 @@ +/* + * Copyright (C) Texas Instruments - http://www.ti.com/ + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __HWC_DEV__ +#define __HWC_DEV__ + +#include +#include + +#include +#ifdef OMAP_ENHANCEMENT_S3D +#include +#endif + +#include +#include