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| author | Bob Wilson <bob.wilson@apple.com> | 2010-09-09 05:40:26 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-09-09 05:40:26 +0000 |
| commit | 0f1e9457a578cbc2073107f4d3d7529cbac7e5c3 (patch) | |
| tree | af1d3640b5ae783ad3d90daa1d42f1bf36ec83f9 | |
| parent | ac1a19e18ad73198ae54cc4bc08000523031f84a (diff) | |
| download | external_llvm-0f1e9457a578cbc2073107f4d3d7529cbac7e5c3.zip external_llvm-0f1e9457a578cbc2073107f4d3d7529cbac7e5c3.tar.gz external_llvm-0f1e9457a578cbc2073107f4d3d7529cbac7e5c3.tar.bz2 | |
Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from
the VST pseudos. The VLD/VST scheduling still needs work (see pr6722), but
at least we shouldn't confuse the loads with the stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113473 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 10 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/machine-licm-vdup.ll | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 4d2f116..d22839c 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -170,20 +170,20 @@ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in { // Classes for VLD* pseudo-instructions with multi-register operands. // These are expanded to real instructions after register allocation. class VLDQPseudo - : PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VST, "">; + : PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VLD2, "">; class VLDQWBPseudo : PseudoNLdSt<(outs QPR:$dst, GPR:$wb), - (ins addrmode6:$addr, am6offset:$offset), IIC_VST, + (ins addrmode6:$addr, am6offset:$offset), IIC_VLD2, "$addr.addr = $wb">; class VLDQQPseudo - : PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VST, "">; + : PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VLD4, "">; class VLDQQWBPseudo : PseudoNLdSt<(outs QQPR:$dst, GPR:$wb), - (ins addrmode6:$addr, am6offset:$offset), IIC_VST, + (ins addrmode6:$addr, am6offset:$offset), IIC_VLD4, "$addr.addr = $wb">; class VLDQQQQWBPseudo : PseudoNLdSt<(outs QQQQPR:$dst, GPR:$wb), - (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VST, + (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VLD4, "$addr.addr = $wb, $src = $dst">; // VLD1 : Vector Load (multiple single elements) diff --git a/test/CodeGen/Thumb2/machine-licm-vdup.ll b/test/CodeGen/Thumb2/machine-licm-vdup.ll index fde2ee0..f7494ec 100644 --- a/test/CodeGen/Thumb2/machine-licm-vdup.ll +++ b/test/CodeGen/Thumb2/machine-licm-vdup.ll @@ -12,7 +12,7 @@ entry: bb1: ; CHECK-NEXT: %bb1 -; CHECK: vdup.32 q1, r3 +; CHECK: vdup.32 q{{.*}}, r3 %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ] %tmp1 = shl i32 %indvar, 2 %gep1 = getelementptr i8* %ptr1, i32 %tmp1 |