Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize

it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 7 insertions, 5 deletions

diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 3ce360b..3f1cdd2 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -400,7 +400,7 @@ def SUBREG_TO_REG : Instruction {
   let Namespace = "TargetInstrInfo";
   let neverHasSideEffects = 1;
 }
-def COPY_TO_SUBCLASS : Instruction {
+def COPY_TO_REGCLASS : Instruction {
   let OutOperandList = (ops unknown:$dst);
   let InOperandList = (ops unknown:$src, i32imm:$regclass);
   let AsmString = "";
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index fb41e4d..c6b8987 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -75,12 +75,14 @@ public:
     /// zext from i32 to i64 via implicit zero-extension).
     SUBREG_TO_REG = 9,
 
-    /// COPY_TO_SUBCLASS - This instruction is a placeholder for a plain
+    /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
     /// register-to-register copy into a specific register class. This is only
     /// used between instruction selection and MachineInstr creation, before
-    /// virtual registers have been created for all the instructions. As with
-    /// normal copies, these may be optimized away by the coalescer.
-    COPY_TO_SUBCLASS = 10
+    /// virtual registers have been created for all the instructions, and it's
+    /// only needed in cases where the register classes implied by the
+    /// instructions are insufficient. The actual MachineInstrs to perform
+    /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
+    COPY_TO_REGCLASS = 10
   };
 
   unsigned getNumOpcodes() const { return NumOpcodes; }