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| author | Chris Lattner <sabre@nondot.org> | 2007-04-17 21:14:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-04-17 21:14:16 +0000 |
| commit | 895c4ab564c145d16a585201ea49b91541d806b6 (patch) | |
| tree | 62f66e25a48fdb2e404d16a9e955a30c4f2f4d34 /lib/AsmParser/llvmAsmParser.cpp.cvs | |
| parent | e54ec7ab0fe5a233032a7e429272c926385d1d24 (diff) | |
| download | external_llvm-895c4ab564c145d16a585201ea49b91541d806b6.zip external_llvm-895c4ab564c145d16a585201ea49b91541d806b6.tar.gz external_llvm-895c4ab564c145d16a585201ea49b91541d806b6.tar.bz2 | |
Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
srwi r2, r3, 1
extsh r3, r2
blr
on PPC, instead of:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
GCC produces:
_baz:
srwi r10,r4,24
insrwi r10,r3,24,0
srawi r9,r3,24
srawi r3,r10,9
extsh r3,r3
blr
This implements CodeGen/PowerPC/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/AsmParser/llvmAsmParser.cpp.cvs')
0 files changed, 0 insertions, 0 deletions