diff options
| author | Nate Begeman <natebegeman@mac.com> | 2005-10-13 03:11:28 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-10-13 03:11:28 +0000 |
| commit | ded4963ab98c424a8e83f4dc0e63203754ca353b (patch) | |
| tree | 4c6ccca41d6f6761fea0c1f6ba47a82cbf096508 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | ced9d5dcd307743a373dd6e1e036a565a73d2667 (diff) | |
| download | external_llvm-ded4963ab98c424a8e83f4dc0e63203754ca353b.zip external_llvm-ded4963ab98c424a8e83f4dc0e63203754ca353b.tar.gz external_llvm-ded4963ab98c424a8e83f4dc0e63203754ca353b.tar.bz2 | |
Move some Legalize functionality over to the DAGCombiner where it belongs.
Kill some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e254811..547bee1 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -451,6 +451,9 @@ SDOperand DAGCombiner::visit(SDNode *N) { } SDOperand DAGCombiner::visitTokenFactor(SDNode *N) { + std::vector<SDOperand> Ops; + bool Changed = false; + // If the token factor has two operands and one is the entry token, replace // the token factor with the other operand. if (N->getNumOperands() == 2) { @@ -459,6 +462,19 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) { if (N->getOperand(1).getOpcode() == ISD::EntryToken) return N->getOperand(0); } + // fold (tokenfactor (tokenfactor)) -> tokenfactor + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + SDOperand Op = N->getOperand(i); + if (Op.getOpcode() == ISD::TokenFactor && Op.hasOneUse()) { + Changed = true; + for (unsigned j = 0, e = Op.getNumOperands(); j != e; ++j) + Ops.push_back(Op.getOperand(j)); + } else { + Ops.push_back(Op); + } + } + if (Changed) + return DAG.getNode(ISD::TokenFactor, MVT::Other, Ops); return SDOperand(); } @@ -782,6 +798,40 @@ SDOperand DAGCombiner::visitAND(SDNode *N) { WorkList.push_back(ANDNode.Val); return DAG.getNode(N0.getOpcode(), VT, ANDNode, N0.getOperand(1)); } + // fold (zext_inreg (extload x)) -> (zextload x) + if (N1C && N0.getOpcode() == ISD::EXTLOAD) { + MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT(); + // If the type of the zext_inreg and the extload match, and we're running + // before Legalize, or the resulting zextload is legal on the target, then + // go ahead and do the fold. + if ((N1C->getValue() == (1ULL << MVT::getSizeInBits(EVT))-1) && + (!AfterLegalize || + TargetLowering::Legal == TLI.getOperationAction(ISD::ZEXTLOAD, EVT))) { + SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0), + N0.getOperand(1), N0.getOperand(2), + EVT); + CombineTo(N0.Val, ExtLoad, ExtLoad.getOperand(0)); + WorkList.push_back(N); + return SDOperand(); + } + } + // fold (zext_inreg (sextload x)) -> (zextload x) iff load has one use + if (N1C && N0.getOpcode() == ISD::SEXTLOAD && N0.Val->hasNUsesOfValue(1, 0)) { + MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT(); + // If the type of the zext_inreg and the extload match, and we're running + // before Legalize, or the resulting zextload is legal on the target, then + // go ahead and do the fold. + if ((N1C->getValue() == (1ULL << MVT::getSizeInBits(EVT))-1) && + (!AfterLegalize || + TargetLowering::Legal == TLI.getOperationAction(ISD::ZEXTLOAD, EVT))) { + SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0), + N0.getOperand(1), N0.getOperand(2), + EVT); + CombineTo(N0.Val, ExtLoad, ExtLoad.getOperand(0)); + WorkList.push_back(N); + return SDOperand(); + } + } return SDOperand(); } @@ -1272,6 +1322,30 @@ SDOperand DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { return DAG.getNode(ISD::SRA, N0.getValueType(), N0.getOperand(0), N0.getOperand(1)); } + // fold (sext_inreg (extload x)) -> (sextload x) + if (N0.getOpcode() == ISD::EXTLOAD && + EVT == cast<VTSDNode>(N0.getOperand(3))->getVT() && + (!AfterLegalize || + (TargetLowering::Legal == TLI.getOperationAction(ISD::SEXTLOAD, EVT)))) { + SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0), + N0.getOperand(1), N0.getOperand(2), + EVT); + CombineTo(N0.Val, ExtLoad, ExtLoad.getOperand(0)); + WorkList.push_back(N); + return SDOperand(); + } + // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use + if (N0.getOpcode() == ISD::ZEXTLOAD && N0.Val->hasNUsesOfValue(1, 0) && + EVT == cast<VTSDNode>(N0.getOperand(3))->getVT() && + (!AfterLegalize || + (TargetLowering::Legal == TLI.getOperationAction(ISD::SEXTLOAD, EVT)))) { + SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0), + N0.getOperand(1), N0.getOperand(2), + EVT); + CombineTo(N0.Val, ExtLoad, ExtLoad.getOperand(0)); + WorkList.push_back(N); + return SDOperand(); + } return SDOperand(); } |
