diff options
| author | Dan Gohman <gohman@apple.com> | 2009-09-11 00:34:46 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-09-11 00:34:46 +0000 |
| commit | b144a5210c2df1b248b0c92fbf18f0cb1f9f9f91 (patch) | |
| tree | 16ae74cdb85d40581b3921facc7e09092fd8e741 /lib/CodeGen/SelectionDAG/FastISel.cpp | |
| parent | 78894ba572c0da894a177328a0b37d4e8b0cff39 (diff) | |
| download | external_llvm-b144a5210c2df1b248b0c92fbf18f0cb1f9f9f91.zip external_llvm-b144a5210c2df1b248b0c92fbf18f0cb1f9f9f91.tar.gz external_llvm-b144a5210c2df1b248b0c92fbf18f0cb1f9f9f91.tar.bz2 | |
Reapply r81171 with a fix: don't try to use i64 when it
isn't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81492 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index f0c7086..15c2140 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -615,12 +615,27 @@ FastISel::SelectFNeg(User *I) { unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); if (OpReg == 0) return false; - // Twiddle the sign bit with xor. + // Bitcast the value to integer, twiddle the sign bit with xor, + // and then bitcast it back to floating-point. EVT VT = TLI.getValueType(I->getType()); if (VT.getSizeInBits() > 64) return false; - unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISD::XOR, OpReg, - UINT64_C(1) << (VT.getSizeInBits()-1), - VT.getSimpleVT()); + EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); + if (!TLI.isTypeLegal(IntVT)) + return false; + + unsigned IntReg = FastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), + ISD::BIT_CONVERT, OpReg); + if (IntReg == 0) + return false; + + unsigned IntResultReg = FastEmit_ri_(IntVT.getSimpleVT(), ISD::XOR, IntReg, + UINT64_C(1) << (VT.getSizeInBits()-1), + IntVT.getSimpleVT()); + if (IntResultReg == 0) + return false; + + ResultReg = FastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), + ISD::BIT_CONVERT, IntResultReg); if (ResultReg == 0) return false; |
