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| author | Hal Finkel <hfinkel@anl.gov> | 2013-07-08 06:16:58 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-07-08 06:16:58 +0000 |
| commit | 63e7a38c8980d70197ecdb9ba54b79b87c7b064d (patch) | |
| tree | 6b7cb7f93339b3eb90387b74f3688b672c553481 /lib/CodeGen/SelectionDAG | |
| parent | 5310cdbcc909a7c35d4c7df0fd5703850a9db2a5 (diff) | |
| download | external_llvm-63e7a38c8980d70197ecdb9ba54b79b87c7b064d.zip external_llvm-63e7a38c8980d70197ecdb9ba54b79b87c7b064d.tar.gz external_llvm-63e7a38c8980d70197ecdb9ba54b79b87c7b064d.tar.bz2 | |
Fix PromoteIntRes_BUILD_VECTOR crash with i1 vectors
This fixes a bug (found by llvm-stress) in
DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR where it assumed that the result
type would always be larger than the original operands. This is not always
true, however, with boolean vectors. For example, promoting a node of type v8i1
(where the operands will be of type i32, the type to which i1 is promoted) will
yield a node with a result vector element type of i16 (and operands of type
i32). As a result, we cannot blindly assume that we can ANY_EXTEND the operands
to the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index b3ec9bc..df38898 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -2930,7 +2930,13 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR(SDNode *N) { SmallVector<SDValue, 8> Ops; Ops.reserve(NumElems); for (unsigned i = 0; i != NumElems; ++i) { - SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i)); + SDValue Op; + // It is possible for the operands to be larger than the result, for example, + // when the operands are promoted booleans and the result was an i1 vector. + if (N->getOperand(i).getValueType().bitsLT(NOutVTElem)) + Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i)); + else + Op = N->getOperand(i); Ops.push_back(Op); } |
