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| author | Bob Wilson <bob.wilson@apple.com> | 2010-09-29 17:54:10 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-09-29 17:54:10 +0000 |
| commit | 7122ba7efb5430d724ed3a0ac86fa7f7185b43ba (patch) | |
| tree | 221bcb00ba6237d7faba0d6bd836515b6782b2cd /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 6cded231a3a748e4fb1339891c81d385058e571f (diff) | |
| download | external_llvm-7122ba7efb5430d724ed3a0ac86fa7f7185b43ba.zip external_llvm-7122ba7efb5430d724ed3a0ac86fa7f7185b43ba.tar.gz external_llvm-7122ba7efb5430d724ed3a0ac86fa7f7185b43ba.tar.bz2 | |
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned. Radar 8489376.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index ec2b74a..a7d1d9f 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1370,7 +1370,7 @@ ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, unsigned Align = (*Op0->memoperands_begin())->getAlignment(); const Function *Func = MF->getFunction(); unsigned ReqAlign = STI->hasV6Ops() - ? TD->getPrefTypeAlignment(Type::getInt64Ty(Func->getContext())) + ? TD->getABITypeAlignment(Type::getInt64Ty(Func->getContext())) : 8; // Pre-v6 need 8-byte align if (Align < ReqAlign) return false; |