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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 03:55:05 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 03:55:05 +0000 |
commit | 39dfb0ff848be6b380ca81ff95d4ca4e0ae09c76 (patch) | |
tree | 0c4371425daad97700cfaee4ad5fde935ff33bc7 /lib/Target/ARM/ARMSubtarget.cpp | |
parent | 6a6b8c3e96b9e1ca7092eafd0cfb219cbbfbdfc4 (diff) | |
download | external_llvm-39dfb0ff848be6b380ca81ff95d4ca4e0ae09c76.zip external_llvm-39dfb0ff848be6b380ca81ff95d4ca4e0ae09c76.tar.gz external_llvm-39dfb0ff848be6b380ca81ff95d4ca4e0ae09c76.tar.bz2 |
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.cpp')
-rw-r--r-- | lib/Target/ARM/ARMSubtarget.cpp | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index da572d2..4affc15 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -39,9 +39,16 @@ StrictAlign("arm-strict-align", cl::Hidden, ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) : ARMGenSubtargetInfo() - , ARMArchVersion(V4) , ARMProcFamily(Others) - , ARMFPUType(None) + , HasV4TOps(false) + , HasV5TOps(false) + , HasV5TEOps(false) + , HasV6Ops(false) + , HasV6T2Ops(false) + , HasV7Ops(false) + , HasVFPv2(false) + , HasVFPv3(false) + , HasNEON(false) , UseNEONForSinglePrecisionFP(false) , SlowFPVMLx(false) , HasVMLxForwarding(false) @@ -89,8 +96,8 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, // Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a // ARM version or CPU and then remove this. - if (ARMArchVersion < V6T2 && hasThumb2()) - ARMArchVersion = V6T2; + if (!HasV6T2Ops && hasThumb2()) + HasV4TOps = HasV5TOps = HasV5TEOps = HasV6Ops = HasV6T2Ops = true; // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUString); @@ -104,7 +111,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, if (!isTargetDarwin()) UseMovt = hasV6T2Ops(); else { - IsR9Reserved = ReserveR9 | (ARMArchVersion < V6); + IsR9Reserved = ReserveR9 | !HasV6Ops; UseMovt = DarwinUseMOVT && hasV6T2Ops(); } |