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authorBob Wilson <bob.wilson@apple.com>2009-09-28 14:30:20 +0000
committerBob Wilson <bob.wilson@apple.com>2009-09-28 14:30:20 +0000
commitf4ecc68efa92c06e2de1937f2a6408f57318ee3f (patch)
tree858643786c87f2b6432334784f20184f2e04bdd8 /lib/Target/ARM/ARMTargetMachine.cpp
parent16c012d9a28fe4db3ee081192a587ad7f30d4cc2 (diff)
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Pass the optimization level when constructing the ARM instruction selector.
Otherwise, it is always set to "default", which prevents debug info from even being generated during isel. Radar 7250345. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82988 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--lib/Target/ARM/ARMTargetMachine.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 045df15..dcb64c5 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -86,7 +86,7 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
// Pass Pipeline Configuration
bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
- PM.add(createARMISelDag(*this));
+ PM.add(createARMISelDag(*this, OptLevel));
return false;
}