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| author | Chris Lattner <sabre@nondot.org> | 2010-06-05 04:17:30 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-06-05 04:17:30 +0000 |
| commit | d6b67b086e22513262254c0f1b5cf056e84ac72e (patch) | |
| tree | dc95c8cba3a2dd08aa0facb0293c7689bca5e6bb /lib/Target/ARM/Disassembler/ARMDisassemblerCore.h | |
| parent | 2525d7f040971a06e4e36f946dbd6bcbd722c3b5 (diff) | |
| download | external_llvm-d6b67b086e22513262254c0f1b5cf056e84ac72e.zip external_llvm-d6b67b086e22513262254c0f1b5cf056e84ac72e.tar.gz external_llvm-d6b67b086e22513262254c0f1b5cf056e84ac72e.tar.bz2 | |
revert r105521, which is breaking the buildbots with stuff like this:
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassemblerCore.h')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassemblerCore.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h index 7d21256..b1d90df 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h @@ -137,25 +137,25 @@ static inline void setSlice(uint32_t &Bits, unsigned From, unsigned To, /// Various utilities for checking the target specific flags. /// A unary data processing instruction doesn't have an Rn operand. -static inline bool isUnaryDP(uint64_t TSFlags) { +static inline bool isUnaryDP(unsigned TSFlags) { return (TSFlags & ARMII::UnaryDP); } /// This four-bit field describes the addressing mode used. /// See also ARMBaseInstrInfo.h. -static inline unsigned getAddrMode(uint64_t TSFlags) { +static inline unsigned getAddrMode(unsigned TSFlags) { return (TSFlags & ARMII::AddrModeMask); } /// {IndexModePre, IndexModePost} /// Only valid for load and store ops. /// See also ARMBaseInstrInfo.h. -static inline unsigned getIndexMode(uint64_t TSFlags) { +static inline unsigned getIndexMode(unsigned TSFlags) { return (TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; } /// Pre-/post-indexed operations define an extra $base_wb in the OutOperandList. -static inline bool isPrePostLdSt(uint64_t TSFlags) { +static inline bool isPrePostLdSt(unsigned TSFlags) { return (TSFlags & ARMII::IndexModeMask) != 0; } |
