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authorShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
committerShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
commit7744acd1ab73b3eec6f1449f47083abe3fb1b527 (patch)
tree17ef28b6d1034fdea7f42a19bebe7ad834901d62 /lib/Target/Mips/MipsTargetMachine.cpp
parent4a05ed708aed4c7a099d924ed3feb604d3e44074 (diff)
parenta94d6e87c4c49f2e81b01d66d8bfb591277f8f96 (diff)
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Merge with LLVM upstream r160668 (Jul 24th 2012)
Conflicts: include/llvm/Support/ELF.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Support/Memory.cpp lib/Transforms/Instrumentation/AddressSanitizer.cpp Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp27
1 files changed, 8 insertions, 19 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index ad02231..dd5d35f 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -105,8 +105,6 @@ public:
}
virtual bool addInstSelector();
- virtual bool addPreRegAlloc();
- virtual bool addPreSched2();
virtual bool addPreEmitPass();
};
} // namespace
@@ -117,31 +115,22 @@ TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
-bool MipsPassConfig::addInstSelector()
-{
- PM.add(createMipsISelDag(getMipsTargetMachine()));
+bool MipsPassConfig::addInstSelector() {
+ addPass(createMipsISelDag(getMipsTargetMachine()));
return false;
}
// Implemented by targets that want to run passes immediately before
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
-bool MipsPassConfig::addPreEmitPass()
-{
- PM.add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
- return true;
-}
+bool MipsPassConfig::addPreEmitPass() {
+ MipsTargetMachine &TM = getMipsTargetMachine();
+ addPass(createMipsDelaySlotFillerPass(TM));
-bool MipsPassConfig::addPreRegAlloc() {
- // Do not restore $gp if target is Mips64.
- // In N32/64, $gp is a callee-saved register.
- if (!getMipsSubtarget().hasMips64())
- PM.add(createMipsEmitGPRestorePass(getMipsTargetMachine()));
- return true;
-}
+ // NOTE: long branch has not been implemented for mips16.
+ if (TM.getSubtarget<MipsSubtarget>().hasStandardEncoding())
+ addPass(createMipsLongBranchPass(TM));
-bool MipsPassConfig::addPreSched2() {
- PM.add(createMipsExpandPseudoPass(getMipsTargetMachine()));
return true;
}