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author | Dan Gohman <gohman@apple.com> | 2008-09-12 16:56:44 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-09-12 16:56:44 +0000 |
commit | f5aeb1a8e4cf272c7348376d185ef8d8267653e0 (patch) | |
tree | 26c1d701871fd86197411a728c2dfde5c805254b /lib/Target/PowerPC/PPCInstrInfo.td | |
parent | 0e3b7b2f91427807c3f544e96818072cc804e1d3 (diff) | |
download | external_llvm-f5aeb1a8e4cf272c7348376d185ef8d8267653e0.zip external_llvm-f5aeb1a8e4cf272c7348376d185ef8d8267653e0.tar.gz external_llvm-f5aeb1a8e4cf272c7348376d185ef8d8267653e0.tar.bz2 |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index bb78e16..d2f7d18 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -155,47 +155,47 @@ def PPCdynalloc : SDNode<"PPCISD::DYNALLOC", SDTDynOp, [SDNPHasChain]>; def SHL32 : SDNodeXForm<imm, [{ // Transformation function: 31 - imm - return getI32Imm(31 - N->getValue()); + return getI32Imm(31 - N->getZExtValue()); }]>; def SRL32 : SDNodeXForm<imm, [{ // Transformation function: 32 - imm - return N->getValue() ? getI32Imm(32 - N->getValue()) : getI32Imm(0); + return N->getZExtValue() ? getI32Imm(32 - N->getZExtValue()) : getI32Imm(0); }]>; def LO16 : SDNodeXForm<imm, [{ // Transformation function: get the low 16 bits. - return getI32Imm((unsigned short)N->getValue()); + return getI32Imm((unsigned short)N->getZExtValue()); }]>; def HI16 : SDNodeXForm<imm, [{ // Transformation function: shift the immediate value down into the low bits. - return getI32Imm((unsigned)N->getValue() >> 16); + return getI32Imm((unsigned)N->getZExtValue() >> 16); }]>; def HA16 : SDNodeXForm<imm, [{ // Transformation function: shift the immediate value down into the low bits. - signed int Val = N->getValue(); + signed int Val = N->getZExtValue(); return getI32Imm((Val - (signed short)Val) >> 16); }]>; def MB : SDNodeXForm<imm, [{ // Transformation function: get the start bit of a mask unsigned mb, me; - (void)isRunOfOnes((unsigned)N->getValue(), mb, me); + (void)isRunOfOnes((unsigned)N->getZExtValue(), mb, me); return getI32Imm(mb); }]>; def ME : SDNodeXForm<imm, [{ // Transformation function: get the end bit of a mask unsigned mb, me; - (void)isRunOfOnes((unsigned)N->getValue(), mb, me); + (void)isRunOfOnes((unsigned)N->getZExtValue(), mb, me); return getI32Imm(me); }]>; def maskimm32 : PatLeaf<(imm), [{ // maskImm predicate - True if immediate is a run of ones. unsigned mb, me; if (N->getValueType(0) == MVT::i32) - return isRunOfOnes((unsigned)N->getValue(), mb, me); + return isRunOfOnes((unsigned)N->getZExtValue(), mb, me); else return false; }]>; @@ -204,14 +204,14 @@ def immSExt16 : PatLeaf<(imm), [{ // immSExt16 predicate - True if the immediate fits in a 16-bit sign extended // field. Used by instructions like 'addi'. if (N->getValueType(0) == MVT::i32) - return (int32_t)N->getValue() == (short)N->getValue(); + return (int32_t)N->getZExtValue() == (short)N->getZExtValue(); else - return (int64_t)N->getValue() == (short)N->getValue(); + return (int64_t)N->getZExtValue() == (short)N->getZExtValue(); }]>; def immZExt16 : PatLeaf<(imm), [{ // immZExt16 predicate - True if the immediate fits in a 16-bit zero extended // field. Used by instructions like 'ori'. - return (uint64_t)N->getValue() == (unsigned short)N->getValue(); + return (uint64_t)N->getZExtValue() == (unsigned short)N->getZExtValue(); }], LO16>; // imm16Shifted* - These match immediates where the low 16-bits are zero. There @@ -222,18 +222,18 @@ def immZExt16 : PatLeaf<(imm), [{ def imm16ShiftedZExt : PatLeaf<(imm), [{ // imm16ShiftedZExt predicate - True if only bits in the top 16-bits of the // immediate are set. Used by instructions like 'xoris'. - return (N->getValue() & ~uint64_t(0xFFFF0000)) == 0; + return (N->getZExtValue() & ~uint64_t(0xFFFF0000)) == 0; }], HI16>; def imm16ShiftedSExt : PatLeaf<(imm), [{ // imm16ShiftedSExt predicate - True if only bits in the top 16-bits of the // immediate are set. Used by instructions like 'addis'. Identical to // imm16ShiftedZExt in 32-bit mode. - if (N->getValue() & 0xFFFF) return false; + if (N->getZExtValue() & 0xFFFF) return false; if (N->getValueType(0) == MVT::i32) return true; // For 64-bit, make sure it is sext right. - return N->getValue() == (uint64_t)(int)N->getValue(); + return N->getZExtValue() == (uint64_t)(int)N->getZExtValue(); }], HI16>; |