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| author | Stephen Hines <srhines@google.com> | 2013-03-20 04:33:54 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2013-03-20 04:33:54 +0000 |
| commit | 3dd51ae3a043f2edf9dd2bc7c906c3f602967e5a (patch) | |
| tree | 90c0395880593bf195fb818c2af1139cb7e846df /lib/Target/PowerPC/PPCMachineFunctionInfo.h | |
| parent | 84ba0bec3eb1a5f63c13a01e6d510ecd85fa6ab7 (diff) | |
| parent | 2d4629c5d7dcc6582fa7b85a517744f1a3654eba (diff) | |
| download | external_llvm-3dd51ae3a043f2edf9dd2bc7c906c3f602967e5a.zip external_llvm-3dd51ae3a043f2edf9dd2bc7c906c3f602967e5a.tar.gz external_llvm-3dd51ae3a043f2edf9dd2bc7c906c3f602967e5a.tar.bz2 | |
am 2d4629c5: Merge branch \'upstream\' into merge_2013_03_18
* commit '2d4629c5d7dcc6582fa7b85a517744f1a3654eba': (424 commits)
Change NULL to 0.
Register the flush function for each compile unit.
Remove trailing spaces.
Fix PPC unaligned 64-bit loads and stores
ARM cost model: Make some vector integer to float casts cheaper
ARM cost model: Correct cost for some cheap float to integer conversions
Extend global merge pass to optionally consider global constant variables. Also add some checks to not merge globals used within landing pad instructions or marked as "used".
Change test cases to handle unaligned references.
Remove unnecessary leading comment characters in lit-only file
Add SchedRW annotations to most of X86InstrSSE.td.
Annotate X86 arithmetic instructions with SchedRW lists.
Check whether a pointer is non-null (isKnownNonNull) in isKnownNonZero.
TableGen fix for the new machine model.
Include '.test' suffix in target specific lit configs that need it
Make the fields in the diagram match the descriptive text above them.
Update
Fix 80-col. violations in PPCCTRLoops
Fix large count and negative constant count handling in PPCCTRLoops
Cleanup initial-value constants in PPCCTRLoops
Fix integer comparison in DIEInteger::BestForm.
...
Diffstat (limited to 'lib/Target/PowerPC/PPCMachineFunctionInfo.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCMachineFunctionInfo.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/lib/Target/PowerPC/PPCMachineFunctionInfo.h index 045b375..b1636a2 100644 --- a/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -37,6 +37,13 @@ class PPCFunctionInfo : public MachineFunctionInfo { /// PEI. bool MustSaveLR; + /// Does this function have any stack spills. + bool HasSpills; + + /// Does this function spill using instructions with only r+r (not r+i) + /// forms. + bool HasNonRISpills; + /// SpillsCR - Indicates whether CR is spilled in the current function. bool SpillsCR; @@ -78,6 +85,8 @@ public: explicit PPCFunctionInfo(MachineFunction &MF) : FramePointerSaveIndex(0), ReturnAddrSaveIndex(0), + HasSpills(false), + HasNonRISpills(false), SpillsCR(false), LRStoreRequired(false), MinReservedArea(0), @@ -109,6 +118,12 @@ public: void setMustSaveLR(bool U) { MustSaveLR = U; } bool mustSaveLR() const { return MustSaveLR; } + void setHasSpills() { HasSpills = true; } + bool hasSpills() const { return HasSpills; } + + void setHasNonRISpills() { HasNonRISpills = true; } + bool hasNonRISpills() const { return HasNonRISpills; } + void setSpillsCR() { SpillsCR = true; } bool isCRSpilled() const { return SpillsCR; } |
