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| author | Chad Rosier <mcrosier@apple.com> | 2012-09-21 16:58:35 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-09-21 16:58:35 +0000 |
| commit | e5e674ba1191d9e9c528eb363babdcbea1359e10 (patch) | |
| tree | 9cf78ef31576add8cc889326a9bf8c0a955266db /lib | |
| parent | e5bd3cf0006b7f5ec79533a827f5645197d75d2c (diff) | |
| download | external_llvm-e5e674ba1191d9e9c528eb363babdcbea1359e10.zip external_llvm-e5e674ba1191d9e9c528eb363babdcbea1359e10.tar.gz external_llvm-e5e674ba1191d9e9c528eb363babdcbea1359e10.tar.bz2 | |
[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
non-aligned i32 loads/stores.
rdar://12304911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index af45ed7..f7f6b5d 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -1036,6 +1036,9 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr, RC = &ARM::GPRRegClass; break; case MVT::i32: + if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem()) + return false; + if (isThumb2) { if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) Opc = ARM::t2LDRi8; @@ -1156,6 +1159,9 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr, } break; case MVT::i32: + if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem()) + return false; + if (isThumb2) { if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) StrOpc = ARM::t2STRi8; |