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| author | Chad Rosier <mcrosier@apple.com> | 2011-12-15 21:34:44 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2011-12-15 21:34:44 +0000 |
| commit | 0660cfe3c88bbe2b06fc272bab36048826ccef1e (patch) | |
| tree | fc2c6157d0c56157d71fe95548e165125bab3db7 /test/CodeGen | |
| parent | b012eb8cc48fb5f29f911e7866c92c277616b875 (diff) | |
| download | external_llvm-0660cfe3c88bbe2b06fc272bab36048826ccef1e.zip external_llvm-0660cfe3c88bbe2b06fc272bab36048826ccef1e.tar.gz external_llvm-0660cfe3c88bbe2b06fc272bab36048826ccef1e.tar.bz2 | |
Fix assert in LowerBUILD_VECTOR for v16i16 type on AVX.
Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146684 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/avx-basic.ll | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx-basic.ll b/test/CodeGen/X86/avx-basic.ll index 7802606..8ad0fa8 100644 --- a/test/CodeGen/X86/avx-basic.ll +++ b/test/CodeGen/X86/avx-basic.ll @@ -113,3 +113,11 @@ define <16 x float> @fneg(<16 x float> addrspace(1)* nocapture %out) nounwind { %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> ret <16 x float> %1 } + +;;; Don't crash on build vector +; CHECK: @build_vec_16x16 +; CHECK: vmovd +define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { + %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 + ret <16 x i16> %res +} |