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authorOwen Anderson <resistor@mac.com>2010-09-23 23:45:25 +0000
committerOwen Anderson <resistor@mac.com>2010-09-23 23:45:25 +0000
commit325fc0b687d114113f2cb557248677be8817ebf0 (patch)
treee439d049eede2f1e69d813fddde9c163f10366a2 /utils/TableGen/InstrInfoEmitter.cpp
parent85a5c32287005113b019b2bb105f66a70ccd8c73 (diff)
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Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
reflection, this isn't going to achieve the purpose I intended it for. Back to the drawing board! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/InstrInfoEmitter.cpp')
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index ce066b9..4d3aa5e 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -274,7 +274,6 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
if (Inst.isBarrier) OS << "|(1<<TID::Barrier)";
if (Inst.hasDelaySlot) OS << "|(1<<TID::DelaySlot)";
if (Inst.isCall) OS << "|(1<<TID::Call)";
- if (Inst.isConditionalMove) OS << "|(1<<TID::ConditionalMove)";
if (Inst.canFoldAsLoad) OS << "|(1<<TID::FoldableAsLoad)";
if (Inst.mayLoad) OS << "|(1<<TID::MayLoad)";
if (Inst.mayStore) OS << "|(1<<TID::MayStore)";