diff options
| -rw-r--r-- | lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index f5e9601..dc92f07 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -329,18 +329,20 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { LowerSubReg32_Op0(OutMI, X86::MOV32r0); // MOV64r0 -> MOV32r0 LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr break; - - // CALL64pcrel32 - This instruction has register inputs modeled as normal - // uses instead of implicit uses. As such, truncate off all but the first - // operand (the callee). FIXME: Change isel. + + // CALL64r, CALL64pcrel32 - These instructions have register inputs modeled as + // normal uses instead of implicit uses. As such, truncate off all but the + // first operand (the callee). FIXME: Change isel. + case X86::CALL64r: case X86::CALL64pcrel32: { + unsigned Opcode = OutMI.getOpcode(); MCOperand Saved = OutMI.getOperand(0); OutMI = MCInst(); - OutMI.setOpcode(X86::CALL64pcrel32); + OutMI.setOpcode(Opcode); OutMI.addOperand(Saved); break; } - + // The assembler backend wants to see branches in their small form and relax // them to their large form. The JIT can only handle the large form because // it does not do relaxation. For now, translate the large form to the |