diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 11 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/tlv-1.ll | 16 |
3 files changed, 25 insertions, 6 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 8998b5b..f38cad7 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -6181,7 +6181,7 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const { OpFlag = X86II::MO_TLVP; DebugLoc DL = Op.getDebugLoc(); SDValue Result = DAG.getTargetGlobalAddress(GA->getGlobal(), DL, - getPointerTy(), + GA->getValueType(0), GA->getOffset(), OpFlag); SDValue Offset = DAG.getNode(WrapperKind, DL, getPointerTy(), Result); @@ -6194,8 +6194,10 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const { // Lowering the machine isd will make sure everything is in the right // location. - SDValue Args[] = { Offset }; - SDValue RetVal = DAG.getNode(X86ISD::TLSCALL, DL, MVT::Other, Args, 1); + SDValue Chain = DAG.getEntryNode(); + SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); + SDValue Args[] = { Chain, Offset }; + Chain = DAG.getNode(X86ISD::TLSCALL, DL, NodeTys, Args, 2); // TLSCALL will be codegen'ed as call. Inform MFI that function has calls. MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); @@ -6203,7 +6205,8 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const { // And our return value (tls address) is in the standard call return value // location. - return RetVal; + unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; + return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy()); } assert(false && diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index d6e7f58..8b5a8cf 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -84,7 +84,7 @@ def SDTX86Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>; def SDT_X86TLSADDR : SDTypeProfile<0, 1, [SDTCisInt<0>]>; -def SDT_X86TLSCALL : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; +def SDT_X86TLSCALL : SDTypeProfile<0, 1, [SDTCisInt<0>]>; def SDT_X86EHRET : SDTypeProfile<0, 1, [SDTCisInt<0>]>; @@ -212,7 +212,7 @@ def X86WinAlloca : SDNode<"X86ISD::WIN_ALLOCA", SDTX86Void, [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; def X86TLSCall : SDNode<"X86ISD::TLSCALL", SDT_X86TLSCALL, - []>; + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; //===----------------------------------------------------------------------===// // X86 Operand Definitions. diff --git a/test/CodeGen/X86/tlv-1.ll b/test/CodeGen/X86/tlv-1.ll index de694d8..42940f1 100644 --- a/test/CodeGen/X86/tlv-1.ll +++ b/test/CodeGen/X86/tlv-1.ll @@ -1,5 +1,21 @@ ; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s +%struct.A = type { [48 x i8], i32, i32, i32 } + +@c = external thread_local global %struct.A, align 4 + +define void @main() nounwind ssp { +entry: + call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false) + unreachable + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK-NEXT: callq *(%rdi) + ; CHECK-NEXT: movl $0, 56(%rax) + ; CHECK-NEXT: movq $0, 48(%rax) +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind + @a = thread_local global i32 0 ; <i32*> [#uses=0] @b = thread_local global i32 0 ; <i32*> [#uses=0] |