diff options
-rw-r--r-- | lib/CodeGen/PostRASchedulerList.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp index 73caea9..f3aef57 100644 --- a/lib/CodeGen/PostRASchedulerList.cpp +++ b/lib/CodeGen/PostRASchedulerList.cpp @@ -160,9 +160,12 @@ bool SchedulePostRATDList::BreakAntiDependencies() { for (SUnit::pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end(); P != PE; ++P) { SUnit *PredSU = P->Dep; - unsigned PredLatency = PredSU->CycleBound + PredSU->Latency; - if (SU->CycleBound < PredLatency) { - SU->CycleBound = PredLatency; + // This assumes that there's no delay for reusing registers. + unsigned PredLatency = (P->isCtrl && P->Reg != 0) ? 1 : PredSU->Latency; + unsigned PredTotalLatency = PredSU->CycleBound + PredLatency; + if (SU->CycleBound < PredTotalLatency || + (SU->CycleBound == PredTotalLatency && !P->isAntiDep)) { + SU->CycleBound = PredTotalLatency; CriticalPath[*I] = &*P; } } |