diff options
| -rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 16 | ||||
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 6 |
2 files changed, 14 insertions, 8 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index b69f7de..1aeff40 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -764,20 +764,20 @@ def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2), [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, immBitp:$src2))]>; -def SEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), - "sext $dst, $src2", - [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, - GRRegs:$src2))]>; +def SEXT_2r : + _F2RSrcDst<0b001100, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), + "sext $dst, $src2", + [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, GRRegs:$src2))]>; def ZEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2), "zext $dst, $src2", [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, immBitp:$src2))]>; -def ZEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src2, GRRegs:$src1), - "zext $dst, $src2", - [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, - GRRegs:$src2))]>; +def ZEXT_2r : + _F2RSrcDst<0b010000, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), + "zext $dst, $src2", + [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, GRRegs:$src2))]>; def ANDNOT_2r : _F2RSrcDst<0b001010, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index aa1e0bb..44c870a 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -132,3 +132,9 @@ # CHECK: setpsc res[r8], r2 0x28 0xc7 + +# CHECK: zext r3, r8 +0x2c 0x47 + +# CHECK: sext r9, r1 +0x45 0x37 |