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-rw-r--r--include/llvm/CodeGen/ISDOpcodes.h2
-rw-r--r--include/llvm/CodeGen/ScheduleDAGInstrs.h2
-rw-r--r--include/llvm/CodeGen/SlotIndexes.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h
index 7c2864f..e380650 100644
--- a/include/llvm/CodeGen/ISDOpcodes.h
+++ b/include/llvm/CodeGen/ISDOpcodes.h
@@ -582,7 +582,7 @@ namespace ISD {
// TRAP - Trapping instruction
TRAP,
- // DEBUGTRAP - Trap intented to get the attention of a debugger.
+ // DEBUGTRAP - Trap intended to get the attention of a debugger.
DEBUGTRAP,
// PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
diff --git a/include/llvm/CodeGen/ScheduleDAGInstrs.h b/include/llvm/CodeGen/ScheduleDAGInstrs.h
index dcf72c7..968cc56 100644
--- a/include/llvm/CodeGen/ScheduleDAGInstrs.h
+++ b/include/llvm/CodeGen/ScheduleDAGInstrs.h
@@ -230,7 +230,7 @@ namespace llvm {
///
LoopDependencies LoopRegs;
- /// DbgValues - Remember instruction that preceeds DBG_VALUE.
+ /// DbgValues - Remember instruction that precedes DBG_VALUE.
/// These are generated by buildSchedGraph but persist so they can be
/// referenced when emitting the final schedule.
typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
diff --git a/include/llvm/CodeGen/SlotIndexes.h b/include/llvm/CodeGen/SlotIndexes.h
index 02d64c9..c7fa512 100644
--- a/include/llvm/CodeGen/SlotIndexes.h
+++ b/include/llvm/CodeGen/SlotIndexes.h
@@ -576,7 +576,7 @@ namespace llvm {
nextItr = getIndexAfter(mi).listEntry();
prevItr = prior(nextItr);
} else {
- // Insert mi's index immediately after the preceeding instruction.
+ // Insert mi's index immediately after the preceding instruction.
prevItr = getIndexBefore(mi).listEntry();
nextItr = llvm::next(prevItr);
}