diff options
Diffstat (limited to 'include/llvm/MC/MCInstrItineraries.h')
-rw-r--r-- | include/llvm/MC/MCInstrItineraries.h | 73 |
1 files changed, 66 insertions, 7 deletions
diff --git a/include/llvm/MC/MCInstrItineraries.h b/include/llvm/MC/MCInstrItineraries.h index e942892..1994895 100644 --- a/include/llvm/MC/MCInstrItineraries.h +++ b/include/llvm/MC/MCInstrItineraries.h @@ -104,26 +104,85 @@ struct InstrItinerary { //===----------------------------------------------------------------------===// +/// Instruction itinerary properties - These properties provide general +/// information about the microarchitecture to the scheduler. +/// +struct InstrItineraryProps { + // IssueWidth is the maximum number of instructions that may be scheduled in + // the same per-cycle group. + unsigned IssueWidth; + + // MinLatency is the minimum latency between a register write + // followed by a data dependent read. This determines which + // instructions may be scheduled in the same per-cycle group. This + // is distinct from *expected* latency, which determines the likely + // critical path but does not guarantee a pipeline + // hazard. MinLatency can always be overridden by the number of + // InstrStage cycles. + // + // (-1) Standard in-order processor. + // Use InstrItinerary OperandCycles as MinLatency. + // If no OperandCycles exist, then use the cycle of the last InstrStage. + // + // (0) Out-of-order processor, or in-order with bundled dependencies. + // RAW dependencies may be dispatched in the same cycle. + // Optional InstrItinerary OperandCycles provides expected latency. + // + // (>0) In-order processor with variable latencies. + // Use the greater of this value or the cycle of the last InstrStage. + // Optional InstrItinerary OperandCycles provides expected latency. + // TODO: can't yet specify both min and expected latency per operand. + int MinLatency; + + // LoadLatency is the expected latency of load instructions. + // + // If MinLatency >= 0, this may be overriden for individual load opcodes by + // InstrItinerary OperandCycles. + unsigned LoadLatency; + + // HighLatency is the expected latency of "very high latency" operations. + // See TargetInstrInfo::isHighLatencyDef(). + // By default, this is set to an arbitrarily high number of cycles + // likely to have some impact on scheduling heuristics. + // If MinLatency >= 0, this may be overriden by InstrItinData OperandCycles. + unsigned HighLatency; + + InstrItineraryProps(): IssueWidth(1), MinLatency(-1), LoadLatency(4), + HighLatency(10) {} + + InstrItineraryProps(unsigned iw, int ml, unsigned ll, unsigned hl): + IssueWidth(iw), MinLatency(ml), LoadLatency(ll), HighLatency(hl) {} +}; + +//===----------------------------------------------------------------------===// +/// Encapsulate all subtarget specific information for scheduling for use with +/// SubtargetInfoKV. +struct InstrItinerarySubtargetValue { + const InstrItineraryProps *Props; + const InstrItinerary *Itineraries; +}; + +//===----------------------------------------------------------------------===// /// Instruction itinerary Data - Itinerary data supplied by a subtarget to be /// used by a target. /// class InstrItineraryData { public: + InstrItineraryProps Props; const InstrStage *Stages; ///< Array of stages selected const unsigned *OperandCycles; ///< Array of operand cycles selected const unsigned *Forwardings; ///< Array of pipeline forwarding pathes const InstrItinerary *Itineraries; ///< Array of itineraries selected - unsigned IssueWidth; ///< Max issue per cycle. 0=Unknown. /// Ctors. /// InstrItineraryData() : Stages(0), OperandCycles(0), Forwardings(0), - Itineraries(0), IssueWidth(0) {} + Itineraries(0) {} - InstrItineraryData(const InstrStage *S, const unsigned *OS, - const unsigned *F, const InstrItinerary *I) - : Stages(S), OperandCycles(OS), Forwardings(F), Itineraries(I), - IssueWidth(0) {} + InstrItineraryData(const InstrItineraryProps *P, const InstrStage *S, + const unsigned *OS, const unsigned *F, + const InstrItinerary *I) + : Props(*P), Stages(S), OperandCycles(OS), Forwardings(F), Itineraries(I) {} /// isEmpty - Returns true if there are no itineraries. /// @@ -160,7 +219,7 @@ public: // non-zero default value for all instructions. Some target's provide a // dummy (Generic) itinerary which should be handled as if it's itinerary is // empty. We identify this by looking for a reference to stage zero (invalid - // stage). This is different from beginStage == endState != 0, which could + // stage). This is different from beginStage == endStage != 0, which could // be used for zero-latency pseudo ops. if (isEmpty() || Itineraries[ItinClassIndx].FirstStage == 0) return 1; |