diff options
Diffstat (limited to 'include/llvm/Target')
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 4 | ||||
-rw-r--r-- | include/llvm/Target/TargetSchedule.td | 19 |
2 files changed, 13 insertions, 10 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 4e73139..87f1fe5 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -648,7 +648,9 @@ public: } /// getNumMicroOps - Return the number of u-operations the given machine - /// instruction will be decoded to on the target cpu. + /// instruction will be decoded to on the target cpu. The itinerary's + /// IssueWidth is the number of microops that can be dispatched each + /// cycle. An instruction with zero microops takes no dispatch resources. virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr *MI) const = 0; diff --git a/include/llvm/Target/TargetSchedule.td b/include/llvm/Target/TargetSchedule.td index e22e67c..caa5a84 100644 --- a/include/llvm/Target/TargetSchedule.td +++ b/include/llvm/Target/TargetSchedule.td @@ -73,20 +73,20 @@ class InstrStage<int cycles, list<FuncUnit> units, // across all chip sets. Thus a new chip set can be added without modifying // instruction information. // -// NumMicroOps represents the number of micro-operations that each instruction -// in the class are decoded to. If the number is zero, then it means the -// instruction can decode into variable number of micro-ops and it must be -// determined dynamically. -// -class InstrItinClass<int ops = 1> { - int NumMicroOps = ops; -} +class InstrItinClass; def NoItinerary : InstrItinClass; //===----------------------------------------------------------------------===// // Instruction itinerary data - These values provide a runtime map of an // instruction itinerary class (name) to its itinerary data. // +// NumMicroOps represents the number of micro-operations that each instruction +// in the class are decoded to. If the number is zero, then it means the +// instruction can decode into variable number of micro-ops and it must be +// determined dynamically. This directly relates to the itineraries +// global IssueWidth property, which constrains the number of microops +// that can issue per cycle. +// // OperandCycles are optional "cycle counts". They specify the cycle after // instruction issue the values which correspond to specific operand indices // are defined or read. Bypasses are optional "pipeline forwarding pathes", if @@ -106,8 +106,9 @@ def NoItinerary : InstrItinClass; // is reduced by 1. class InstrItinData<InstrItinClass Class, list<InstrStage> stages, list<int> operandcycles = [], - list<Bypass> bypasses = []> { + list<Bypass> bypasses = [], int uops = 1> { InstrItinClass TheClass = Class; + int NumMicroOps = uops; list<InstrStage> Stages = stages; list<int> OperandCycles = operandcycles; list<Bypass> Bypasses = bypasses; |