diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 8 | ||||
| -rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 32 |
2 files changed, 26 insertions, 14 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 27265da..de22710 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -275,11 +275,13 @@ public: /// isSafeToMove - Return true if it is safe to move this instruction. If /// SawStore is set to true, it means that there is a store (or call) between /// the instruction's location and its intended destination. - bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) const; + bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore, + AliasAnalysis *AA) const; /// isSafeToReMat - Return true if it's safe to rematerialize the specified /// instruction which defined the specified register instead of copying it. - bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg) const; + bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg, + AliasAnalysis *AA) const; /// hasVolatileMemoryRef - Return true if this instruction may have a /// volatile memory reference, or if the information describing the @@ -292,7 +294,7 @@ public: /// loading a value from the constant pool or from from the argument area of /// a function if it does not change. This should only return true of *all* /// loads the instruction does are invariant (if it does multiple loads). - bool isInvariantLoad(AliasAnalysis *AA = 0) const; + bool isInvariantLoad(AliasAnalysis *AA) const; // // Debugging support diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 74a47c2..8070c7d 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -103,24 +103,34 @@ public: /// isTriviallyReMaterializable - Return true if the instruction is trivially /// rematerializable, meaning it has no side effects and requires no operands /// that aren't always available. - bool isTriviallyReMaterializable(const MachineInstr *MI) const { - return MI->getDesc().isRematerializable() && - isReallyTriviallyReMaterializable(MI); + bool isTriviallyReMaterializable(const MachineInstr *MI, + AliasAnalysis *AA = 0) const { + return MI->getOpcode() == IMPLICIT_DEF || + (MI->getDesc().isRematerializable() && + (isReallyTriviallyReMaterializable(MI) || + isReallyTriviallyReMaterializableGeneric(MI, AA))); } protected: /// isReallyTriviallyReMaterializable - For instructions with opcodes for - /// which the M_REMATERIALIZABLE flag is set, this function tests whether the - /// instruction itself is actually trivially rematerializable, considering - /// its operands. This is used for targets that have instructions that are - /// only trivially rematerializable for specific uses. This predicate must - /// return false if the instruction has any side effects other than - /// producing a value, or if it requres any address registers that are not - /// always available. + /// which the M_REMATERIALIZABLE flag is set, this hook lets the target + /// specify whether the instruction is actually trivially rematerializable, + /// taking into consideration its operands. This predicate must return false + /// if the instruction has any side effects other than producing a value, or + /// if it requres any address registers that are not always available. virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const { - return true; + return false; } +private: + /// isReallyTriviallyReMaterializableGeneric - For instructions with opcodes + /// for which the M_REMATERIALIZABLE flag is set and the target hook + /// isReallyTriviallyReMaterializable returns false, this function does + /// target-independent tests to determine if the instruction is really + /// trivially rematerializable. + bool isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, + AliasAnalysis *AA) const; + public: /// Return true if the instruction is a register to register move and return /// the source and dest operands and their sub-register indices by reference. |