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-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp135
-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.h11
2 files changed, 86 insertions, 60 deletions
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 2afb20d..97da232 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -243,15 +243,6 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
return;
}
- // Thumb1 NOP
- if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 &&
- MI->getOperand(1).getReg() == ARM::R8) {
- O << "\tnop";
- printPredicateOperand(MI, 2, O);
- printAnnotation(O, Annot);
- return;
- }
-
// Combine 2 GPRs from disassember into a GPRPair to match with instr def.
// ldrexd/strexd require even/odd GPR pair. To enforce this constraint,
// a single GPRPair reg operand is used in the .td file to replace the two
@@ -315,15 +306,29 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &MO1 = MI->getOperand(OpNum);
- if (MO1.isExpr())
+ if (MO1.isExpr()) {
O << *MO1.getExpr();
- else if (MO1.isImm()) {
- O << markup("<mem:") << "[pc, "
- << markup("<imm:") << "#" << formatImm(MO1.getImm())
- << markup(">]>", "]");
+ return;
}
- else
- llvm_unreachable("Unknown LDR label operand?");
+
+ O << markup("<mem:") << "[pc, ";
+
+ int32_t OffImm = (int32_t)MO1.getImm();
+ bool isSub = OffImm < 0;
+
+ // Special value for #-0. All others are normal.
+ if (OffImm == INT32_MIN)
+ OffImm = 0;
+ if (isSub) {
+ O << markup("<imm:")
+ << "#-" << formatImm(-OffImm)
+ << markup(">");
+ } else {
+ O << markup("<imm:")
+ << "#" << formatImm(OffImm)
+ << markup(">");
+ }
+ O << "]" << markup(">");
}
// so_reg is a 4-operand unit corresponding to register forms of the A5.1
@@ -490,7 +495,8 @@ void ARMInstPrinter::printAM3PostIndexOp(const MCInst *MI, unsigned Op,
}
void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
- raw_ostream &O) {
+ raw_ostream &O,
+ bool AlwaysPrintImm0) {
const MCOperand &MO1 = MI->getOperand(Op);
const MCOperand &MO2 = MI->getOperand(Op+1);
const MCOperand &MO3 = MI->getOperand(Op+2);
@@ -509,7 +515,7 @@ void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm());
ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm());
- if (ImmOffs || (op == ARM_AM::sub)) {
+ if (AlwaysPrintImm0 || ImmOffs || (op == ARM_AM::sub)) {
O << ", "
<< markup("<imm:")
<< "#"
@@ -520,6 +526,7 @@ void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
O << ']' << markup(">");
}
+template <bool AlwaysPrintImm0>
void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,
raw_ostream &O) {
const MCOperand &MO1 = MI->getOperand(Op);
@@ -535,7 +542,7 @@ void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,
printAM3PostIndexOp(MI, Op, O);
return;
}
- printAM3PreOrOffsetIndexOp(MI, Op, O);
+ printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0);
}
void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI,
@@ -593,6 +600,7 @@ void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum,
O << ARM_AM::getAMSubModeStr(Mode);
}
+template <bool AlwaysPrintImm0>
void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &MO1 = MI->getOperand(OpNum);
@@ -608,7 +616,7 @@ void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm());
unsigned Op = ARM_AM::getAM5Op(MO2.getImm());
- if (ImmOffs || Op == ARM_AM::sub) {
+ if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) {
O << ", "
<< markup("<imm:")
<< "#"
@@ -657,8 +665,8 @@ void ARMInstPrinter::printBitfieldInvMaskImmOperand(const MCInst *MI,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand(OpNum);
uint32_t v = ~MO.getImm();
- int32_t lsb = CountTrailingZeros_32(v);
- int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
+ int32_t lsb = countTrailingZeros(v);
+ int32_t width = (32 - countLeadingZeros (v)) - lsb;
assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
O << markup("<imm:") << '#' << lsb << markup(">")
<< ", "
@@ -671,6 +679,12 @@ void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum,
O << ARM_MB::MemBOptToString(val);
}
+void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum,
+ raw_ostream &O) {
+ unsigned val = MI->getOperand(OpNum).getImm();
+ O << ARM_ISB::InstSyncBOptToString(val);
+}
+
void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
unsigned ShiftOp = MI->getOperand(OpNum).getImm();
@@ -886,6 +900,7 @@ void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum,
llvm_unreachable("Unhandled PC-relative pseudo-instruction!");
}
+template<unsigned scale>
void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand(OpNum);
@@ -895,7 +910,7 @@ void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum,
return;
}
- int32_t OffImm = (int32_t)MO.getImm();
+ int32_t OffImm = (int32_t)MO.getImm() << scale;
O << markup("<imm:");
if (OffImm == INT32_MIN)
@@ -928,7 +943,7 @@ void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum,
unsigned Mask = MI->getOperand(OpNum).getImm();
unsigned Firstcond = MI->getOperand(OpNum-1).getImm();
unsigned CondBit0 = Firstcond & 1;
- unsigned NumTZ = CountTrailingZeros_32(Mask);
+ unsigned NumTZ = countTrailingZeros(Mask);
assert(NumTZ <= 3 && "Invalid IT mask!");
for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
bool T = ((Mask >> Pos) & 1) == CondBit0;
@@ -1022,6 +1037,7 @@ void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum,
ARM_AM::getSORegOffset(MO2.getImm()), UseMarkup);
}
+template <bool AlwaysPrintImm0>
void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &MO1 = MI->getOperand(OpNum);
@@ -1042,19 +1058,20 @@ void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
OffImm = 0;
if (isSub) {
O << ", "
- << markup("<imm:")
+ << markup("<imm:")
<< "#-" << -OffImm
<< markup(">");
}
- else if (OffImm > 0) {
+ else if (AlwaysPrintImm0 || OffImm > 0) {
O << ", "
- << markup("<imm:")
+ << markup("<imm:")
<< "#" << OffImm
<< markup(">");
}
O << "]" << markup(">");
}
+template<bool AlwaysPrintImm0>
void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI,
unsigned OpNum,
raw_ostream &O) {
@@ -1065,22 +1082,25 @@ void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI,
printRegName(O, MO1.getReg());
int32_t OffImm = (int32_t)MO2.getImm();
+ bool isSub = OffImm < 0;
// Don't print +0.
- if (OffImm != 0)
- O << ", ";
- if (OffImm != 0 && UseMarkup)
- O << "<imm:";
if (OffImm == INT32_MIN)
- O << "#-0";
- else if (OffImm < 0)
- O << "#-" << -OffImm;
- else if (OffImm > 0)
- O << "#" << OffImm;
- if (OffImm != 0 && UseMarkup)
- O << ">";
+ OffImm = 0;
+ if (isSub) {
+ O << ", "
+ << markup("<imm:")
+ << "#-" << -OffImm
+ << markup(">");
+ } else if (AlwaysPrintImm0 || OffImm > 0) {
+ O << ", "
+ << markup("<imm:")
+ << "#" << OffImm
+ << markup(">");
+ }
O << "]" << markup(">");
}
+template<bool AlwaysPrintImm0>
void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI,
unsigned OpNum,
raw_ostream &O) {
@@ -1096,22 +1116,24 @@ void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI,
printRegName(O, MO1.getReg());
int32_t OffImm = (int32_t)MO2.getImm();
+ bool isSub = OffImm < 0;
assert(((OffImm & 0x3) == 0) && "Not a valid immediate!");
// Don't print +0.
- if (OffImm != 0)
- O << ", ";
- if (OffImm != 0 && UseMarkup)
- O << "<imm:";
if (OffImm == INT32_MIN)
- O << "#-0";
- else if (OffImm < 0)
- O << "#-" << -OffImm;
- else if (OffImm > 0)
- O << "#" << OffImm;
- if (OffImm != 0 && UseMarkup)
- O << ">";
+ OffImm = 0;
+ if (isSub) {
+ O << ", "
+ << markup("<imm:")
+ << "#-" << -OffImm
+ << markup(">");
+ } else if (AlwaysPrintImm0 || OffImm > 0) {
+ O << ", "
+ << markup("<imm:")
+ << "#" << OffImm
+ << markup(">");
+ }
O << "]" << markup(">");
}
@@ -1138,7 +1160,9 @@ void ARMInstPrinter::printT2AddrModeImm8OffsetOperand(const MCInst *MI,
const MCOperand &MO1 = MI->getOperand(OpNum);
int32_t OffImm = (int32_t)MO1.getImm();
O << ", " << markup("<imm:");
- if (OffImm < 0)
+ if (OffImm == INT32_MIN)
+ O << "#-0";
+ else if (OffImm < 0)
O << "#-" << -OffImm;
else
O << "#" << OffImm;
@@ -1153,19 +1177,14 @@ void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI,
assert(((OffImm & 0x3) == 0) && "Not a valid immediate!");
- // Don't print +0.
- if (OffImm != 0)
- O << ", ";
- if (OffImm != 0 && UseMarkup)
- O << "<imm:";
+ O << ", " << markup("<imm:");
if (OffImm == INT32_MIN)
O << "#-0";
else if (OffImm < 0)
O << "#-" << -OffImm;
- else if (OffImm > 0)
+ else
O << "#" << OffImm;
- if (OffImm != 0 && UseMarkup)
- O << ">";
+ O << markup(">");
}
void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI,
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
index edff75d..15ae8d1 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
@@ -47,12 +47,13 @@ public:
raw_ostream &O);
void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
-
+ template <bool AlwaysPrintImm0>
void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printAM3PostIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O);
- void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,raw_ostream &O);
+ void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O,
+ bool AlwaysPrintImm0);
void printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
@@ -60,6 +61,7 @@ public:
raw_ostream &O);
void printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+ template <bool AlwaysPrintImm0>
void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printAddrMode7Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
@@ -69,10 +71,12 @@ public:
void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+ void printInstSyncBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+ template <unsigned scale>
void printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printThumbSRImm(const MCInst *MI, unsigned OpNum, raw_ostream &O);
@@ -91,10 +95,13 @@ public:
raw_ostream &O);
void printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
+ template<bool AlwaysPrintImm0>
void printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
+ template<bool AlwaysPrintImm0>
void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
+ template<bool AlwaysPrintImm0>
void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printT2AddrModeImm0_1020s4Operand(const MCInst *MI, unsigned OpNum,
generated by cgit v1.1 at 2025-11-13 18:17:29 +0000